3 * Damien Bergamini <damien.bergamini@free.fr>
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $FreeBSD: src/sys/dev/ral/rt2661.c,v 1.4 2006/03/21 21:15:43 damien Exp $
18 * $DragonFly: src/sys/dev/netif/ral/rt2661.c,v 1.5 2006/11/18 04:13:39 sephe Exp $
22 * Ralink Technology RT2561, RT2561S and RT2661 chipset driver
23 * http://www.ralinktech.com/
26 #include <sys/param.h>
27 #include <sys/sysctl.h>
28 #include <sys/sockio.h>
30 #include <sys/kernel.h>
31 #include <sys/socket.h>
32 #include <sys/systm.h>
33 #include <sys/malloc.h>
34 #include <sys/module.h>
37 #include <sys/endian.h>
39 #include <machine/clock.h>
43 #include <net/if_arp.h>
44 #include <net/ethernet.h>
45 #include <net/if_dl.h>
46 #include <net/if_media.h>
47 #include <net/if_types.h>
48 #include <net/ifq_var.h>
50 #include <netproto/802_11/ieee80211_var.h>
51 #include <netproto/802_11/ieee80211_radiotap.h>
53 #include <netinet/in.h>
54 #include <netinet/in_systm.h>
55 #include <netinet/in_var.h>
56 #include <netinet/ip.h>
57 #include <netinet/if_ether.h>
59 #include <dev/netif/ral/if_ralrate.h>
60 #include <dev/netif/ral/rt2661reg.h>
61 #include <dev/netif/ral/rt2661var.h>
62 #include <dev/netif/ral/rt2661_ucode.h>
65 #define DPRINTF(x) do { if (ral_debug > 0) printf x; } while (0)
66 #define DPRINTFN(n, x) do { if (ral_debug >= (n)) printf x; } while (0)
68 SYSCTL_INT(_debug, OID_AUTO, ral, CTLFLAG_RW, &ral_debug, 0, "ral debug level");
71 #define DPRINTFN(n, x)
74 static void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int,
76 static void rt2661_dma_map_mbuf(void *, bus_dma_segment_t *, int,
78 static int rt2661_alloc_tx_ring(struct rt2661_softc *,
79 struct rt2661_tx_ring *, int);
80 static void rt2661_reset_tx_ring(struct rt2661_softc *,
81 struct rt2661_tx_ring *);
82 static void rt2661_free_tx_ring(struct rt2661_softc *,
83 struct rt2661_tx_ring *);
84 static int rt2661_alloc_rx_ring(struct rt2661_softc *,
85 struct rt2661_rx_ring *, int);
86 static void rt2661_reset_rx_ring(struct rt2661_softc *,
87 struct rt2661_rx_ring *);
88 static void rt2661_free_rx_ring(struct rt2661_softc *,
89 struct rt2661_rx_ring *);
90 static struct ieee80211_node *rt2661_node_alloc(
91 struct ieee80211_node_table *);
92 static int rt2661_media_change(struct ifnet *);
93 static void rt2661_next_scan(void *);
94 static int rt2661_newstate(struct ieee80211com *,
95 enum ieee80211_state, int);
96 static uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t);
97 static void rt2661_rx_intr(struct rt2661_softc *);
98 static void rt2661_tx_intr(struct rt2661_softc *);
99 static void rt2661_tx_dma_intr(struct rt2661_softc *,
100 struct rt2661_tx_ring *);
101 static void rt2661_mcu_beacon_expire(struct rt2661_softc *);
102 static void rt2661_mcu_wakeup(struct rt2661_softc *);
103 static void rt2661_mcu_cmd_intr(struct rt2661_softc *);
104 static int rt2661_ack_rate(struct ieee80211com *, int);
105 static uint16_t rt2661_txtime(int, int, uint32_t);
106 static uint8_t rt2661_rxrate(struct rt2661_rx_desc *);
107 static uint8_t rt2661_plcp_signal(int);
108 static void rt2661_setup_tx_desc(struct rt2661_softc *,
109 struct rt2661_tx_desc *, uint32_t, uint16_t, int,
110 int, const bus_dma_segment_t *, int, int);
111 static struct mbuf * rt2661_get_rts(struct rt2661_softc *,
112 struct ieee80211_frame *, uint16_t);
113 static int rt2661_tx_data(struct rt2661_softc *, struct mbuf *,
114 struct ieee80211_node *, int);
115 static int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *,
116 struct ieee80211_node *);
117 static void rt2661_start(struct ifnet *);
118 static void rt2661_watchdog(struct ifnet *);
119 static int rt2661_reset(struct ifnet *);
120 static int rt2661_ioctl(struct ifnet *, u_long, caddr_t,
122 static void rt2661_bbp_write(struct rt2661_softc *, uint8_t,
124 static uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t);
125 static void rt2661_rf_write(struct rt2661_softc *, uint8_t,
127 static int rt2661_tx_cmd(struct rt2661_softc *, uint8_t,
129 static void rt2661_select_antenna(struct rt2661_softc *);
130 static void rt2661_enable_mrr(struct rt2661_softc *);
131 static void rt2661_set_txpreamble(struct rt2661_softc *);
132 static void rt2661_set_basicrates(struct rt2661_softc *,
133 const struct ieee80211_rateset *);
134 static void rt2661_select_band(struct rt2661_softc *,
135 struct ieee80211_channel *);
136 static void rt2661_set_chan(struct rt2661_softc *,
137 struct ieee80211_channel *);
138 static void rt2661_set_bssid(struct rt2661_softc *,
140 static void rt2661_set_macaddr(struct rt2661_softc *,
142 static void rt2661_update_promisc(struct rt2661_softc *);
143 static int rt2661_wme_update(struct ieee80211com *) __unused;
144 static void rt2661_update_slot(struct ifnet *);
145 static const char *rt2661_get_rf(int);
146 static void rt2661_read_eeprom(struct rt2661_softc *);
147 static int rt2661_bbp_init(struct rt2661_softc *);
148 static void rt2661_init(void *);
149 static void rt2661_stop(void *);
150 static void rt2661_intr(void *);
151 static int rt2661_load_microcode(struct rt2661_softc *,
152 const uint8_t *, int);
154 static void rt2661_rx_tune(struct rt2661_softc *);
155 static void rt2661_radar_start(struct rt2661_softc *);
156 static int rt2661_radar_stop(struct rt2661_softc *);
158 static int rt2661_prepare_beacon(struct rt2661_softc *);
159 static void rt2661_enable_tsf_sync(struct rt2661_softc *);
160 static int rt2661_get_rssi(struct rt2661_softc *, uint8_t);
161 static void rt2661_led_newstate(struct rt2661_softc *,
162 enum ieee80211_state);
165 * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
167 static const struct ieee80211_rateset rt2661_rateset_11a =
168 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
170 static const struct ieee80211_rateset rt2661_rateset_11b =
171 { 4, { 2, 4, 11, 22 } };
173 static const struct ieee80211_rateset rt2661_rateset_11g =
174 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
176 static const struct {
179 } rt2661_def_mac[] = {
183 static const struct {
186 } rt2661_def_bbp[] = {
190 static const struct rfprog {
192 uint32_t r1, r2, r3, r4;
193 } rt2661_rf5225_1[] = {
195 }, rt2661_rf5225_2[] = {
199 #define LED_EE2MCU(bit) { \
200 .ee_bit = RT2661_EE_LED_##bit, \
201 .mcu_bit = RT2661_MCU_LED_##bit \
203 static const struct {
218 struct rt2661_dmamap {
219 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
224 rt2661_attach(device_t dev, int id)
226 struct rt2661_softc *sc = device_get_softc(dev);
227 struct ieee80211com *ic = &sc->sc_ic;
228 struct ifnet *ifp = &ic->ic_if;
230 const uint8_t *ucode = NULL;
231 int error, i, ac, ntries, size = 0;
233 callout_init(&sc->scan_ch);
234 callout_init(&sc->rssadapt_ch);
237 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irq_rid,
238 RF_ACTIVE | RF_SHAREABLE);
239 if (sc->sc_irq == NULL) {
240 device_printf(dev, "could not allocate interrupt resource\n");
244 /* wait for NIC to initialize */
245 for (ntries = 0; ntries < 1000; ntries++) {
246 if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)
250 if (ntries == 1000) {
251 device_printf(sc->sc_dev,
252 "timeout waiting for NIC to initialize\n");
257 /* retrieve RF rev. no and various other things from EEPROM */
258 rt2661_read_eeprom(sc);
260 device_printf(dev, "MAC/BBP RT%X, RF %s\n", val,
261 rt2661_get_rf(sc->rf_rev));
264 * Load 8051 microcode into NIC.
268 ucode = rt2561s_ucode;
269 size = sizeof rt2561s_ucode;
272 ucode = rt2561_ucode;
273 size = sizeof rt2561_ucode;
276 ucode = rt2661_ucode;
277 size = sizeof rt2661_ucode;
281 error = rt2661_load_microcode(sc, ucode, size);
283 device_printf(sc->sc_dev, "could not load 8051 microcode\n");
288 * Allocate Tx and Rx rings.
290 for (ac = 0; ac < 4; ac++) {
291 error = rt2661_alloc_tx_ring(sc, &sc->txq[ac],
292 RT2661_TX_RING_COUNT);
294 device_printf(sc->sc_dev,
295 "could not allocate Tx ring %d\n", ac);
300 error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
302 device_printf(sc->sc_dev, "could not allocate Mgt ring\n");
306 error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT);
308 device_printf(sc->sc_dev, "could not allocate Rx ring\n");
312 sysctl_ctx_init(&sc->sysctl_ctx);
313 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
314 SYSCTL_STATIC_CHILDREN(_hw),
316 device_get_nameunit(dev),
318 if (sc->sysctl_tree == NULL) {
319 device_printf(dev, "could not add sysctl node\n");
325 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
326 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
327 ifp->if_init = rt2661_init;
328 ifp->if_ioctl = rt2661_ioctl;
329 ifp->if_start = rt2661_start;
330 ifp->if_watchdog = rt2661_watchdog;
331 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
332 ifq_set_ready(&ifp->if_snd);
334 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
335 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
336 ic->ic_state = IEEE80211_S_INIT;
337 rt2661_led_newstate(sc, IEEE80211_S_INIT);
339 /* set device capabilities */
341 IEEE80211_C_IBSS | /* IBSS mode supported */
342 IEEE80211_C_MONITOR | /* monitor mode supported */
343 IEEE80211_C_HOSTAP | /* HostAp mode supported */
344 IEEE80211_C_TXPMGT | /* tx power management */
345 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
346 IEEE80211_C_SHSLOT | /* short slot time supported */
348 IEEE80211_C_WME | /* 802.11e */
350 IEEE80211_C_WEP | /* WEP */
351 IEEE80211_C_WPA; /* 802.11i */
353 if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) {
354 /* set supported .11a rates */
355 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2661_rateset_11a;
357 /* set supported .11a channels */
358 for (i = 36; i <= 64; i += 4) {
359 ic->ic_channels[i].ic_freq =
360 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
361 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
363 for (i = 100; i <= 140; i += 4) {
364 ic->ic_channels[i].ic_freq =
365 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
366 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
368 for (i = 149; i <= 165; i += 4) {
369 ic->ic_channels[i].ic_freq =
370 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
371 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
375 /* set supported .11b and .11g rates */
376 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2661_rateset_11b;
377 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2661_rateset_11g;
379 /* set supported .11b and .11g channels (1 through 14) */
380 for (i = 1; i <= 14; i++) {
381 ic->ic_channels[i].ic_freq =
382 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
383 ic->ic_channels[i].ic_flags =
384 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
385 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
388 ieee80211_ifattach(ic);
389 ic->ic_node_alloc = rt2661_node_alloc;
390 /* ic->ic_wme.wme_update = rt2661_wme_update;*/
391 ic->ic_updateslot = rt2661_update_slot;
392 ic->ic_reset = rt2661_reset;
393 /* enable s/w bmiss handling in sta mode */
394 ic->ic_flags_ext |= IEEE80211_FEXT_SWBMISS;
396 /* override state transition machine */
397 sc->sc_newstate = ic->ic_newstate;
398 ic->ic_newstate = rt2661_newstate;
399 ieee80211_media_init(ic, rt2661_media_change, ieee80211_media_status);
401 bpfattach_dlt(ifp, DLT_IEEE802_11_RADIO,
402 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
404 sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
405 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
406 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2661_RX_RADIOTAP_PRESENT);
408 sc->sc_txtap_len = sizeof sc->sc_txtapu;
409 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
410 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2661_TX_RADIOTAP_PRESENT);
413 * Add a few sysctl knobs.
417 SYSCTL_ADD_INT(&sc->sysctl_ctx,
418 SYSCTL_CHILDREN(sc->sysctl_tree), OID_AUTO, "dwell",
419 CTLFLAG_RW, &sc->dwelltime, 0,
420 "channel dwell time (ms) for AP/station scanning");
422 error = bus_setup_intr(dev, sc->sc_irq, INTR_MPSAFE, rt2661_intr,
423 sc, &sc->sc_ih, ifp->if_serializer);
425 device_printf(dev, "could not set up interrupt\n");
427 ieee80211_ifdetach(ic);
432 ieee80211_announce(ic);
440 rt2661_detach(void *xsc)
442 struct rt2661_softc *sc = xsc;
443 struct ieee80211com *ic = &sc->sc_ic;
444 struct ifnet *ifp = &ic->ic_if;
446 if (device_is_attached(sc->sc_dev)) {
447 lwkt_serialize_enter(ifp->if_serializer);
449 callout_stop(&sc->scan_ch);
450 callout_stop(&sc->rssadapt_ch);
452 bus_teardown_intr(sc->sc_dev, sc->sc_irq, sc->sc_ih);
454 lwkt_serialize_exit(ifp->if_serializer);
457 ieee80211_ifdetach(ic);
460 rt2661_free_tx_ring(sc, &sc->txq[0]);
461 rt2661_free_tx_ring(sc, &sc->txq[1]);
462 rt2661_free_tx_ring(sc, &sc->txq[2]);
463 rt2661_free_tx_ring(sc, &sc->txq[3]);
464 rt2661_free_tx_ring(sc, &sc->mgtq);
465 rt2661_free_rx_ring(sc, &sc->rxq);
467 if (sc->sc_irq != NULL) {
468 bus_release_resource(sc->sc_dev, SYS_RES_IRQ, sc->sc_irq_rid,
472 if (sc->sysctl_tree != NULL)
473 sysctl_ctx_free(&sc->sysctl_ctx);
479 rt2661_shutdown(void *xsc)
481 struct rt2661_softc *sc = xsc;
482 struct ifnet *ifp = &sc->sc_ic.ic_if;
484 lwkt_serialize_enter(ifp->if_serializer);
486 lwkt_serialize_exit(ifp->if_serializer);
490 rt2661_suspend(void *xsc)
492 struct rt2661_softc *sc = xsc;
493 struct ifnet *ifp = &sc->sc_ic.ic_if;
495 lwkt_serialize_enter(ifp->if_serializer);
497 lwkt_serialize_exit(ifp->if_serializer);
501 rt2661_resume(void *xsc)
503 struct rt2661_softc *sc = xsc;
504 struct ifnet *ifp = sc->sc_ic.ic_ifp;
506 lwkt_serialize_enter(ifp->if_serializer);
507 if (ifp->if_flags & IFF_UP) {
508 ifp->if_init(ifp->if_softc);
509 if (ifp->if_flags & IFF_RUNNING)
512 lwkt_serialize_exit(ifp->if_serializer);
516 rt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
521 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
523 *(bus_addr_t *)arg = segs[0].ds_addr;
527 rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring,
534 ring->cur = ring->next = ring->stat = 0;
536 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
537 BUS_SPACE_MAXADDR, NULL, NULL, count * RT2661_TX_DESC_SIZE, 1,
538 count * RT2661_TX_DESC_SIZE, 0, &ring->desc_dmat);
540 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
544 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
545 BUS_DMA_WAITOK | BUS_DMA_ZERO, &ring->desc_map);
547 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
551 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
552 count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
555 device_printf(sc->sc_dev, "could not load desc DMA map\n");
557 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
562 ring->data = kmalloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF,
565 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
566 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES * RT2661_MAX_SCATTER,
567 RT2661_MAX_SCATTER, MCLBYTES, 0, &ring->data_dmat);
569 device_printf(sc->sc_dev, "could not create data DMA tag\n");
573 for (i = 0; i < count; i++) {
574 error = bus_dmamap_create(ring->data_dmat, 0,
577 device_printf(sc->sc_dev, "could not create DMA map\n");
583 fail: rt2661_free_tx_ring(sc, ring);
588 rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
590 struct rt2661_tx_desc *desc;
591 struct rt2661_tx_data *data;
594 for (i = 0; i < ring->count; i++) {
595 desc = &ring->desc[i];
596 data = &ring->data[i];
598 if (data->m != NULL) {
599 bus_dmamap_sync(ring->data_dmat, data->map,
600 BUS_DMASYNC_POSTWRITE);
601 bus_dmamap_unload(ring->data_dmat, data->map);
606 if (data->ni != NULL) {
607 ieee80211_free_node(data->ni);
614 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
617 ring->cur = ring->next = ring->stat = 0;
621 rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
623 struct rt2661_tx_data *data;
626 if (ring->desc != NULL) {
627 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
628 BUS_DMASYNC_POSTWRITE);
629 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
630 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
634 if (ring->desc_dmat != NULL) {
635 bus_dma_tag_destroy(ring->desc_dmat);
636 ring->desc_dmat = NULL;
639 if (ring->data != NULL) {
640 for (i = 0; i < ring->count; i++) {
641 data = &ring->data[i];
643 if (data->m != NULL) {
644 bus_dmamap_sync(ring->data_dmat, data->map,
645 BUS_DMASYNC_POSTWRITE);
646 bus_dmamap_unload(ring->data_dmat, data->map);
651 if (data->ni != NULL) {
652 ieee80211_free_node(data->ni);
656 if (data->map != NULL) {
657 bus_dmamap_destroy(ring->data_dmat, data->map);
662 kfree(ring->data, M_DEVBUF);
666 if (ring->data_dmat != NULL) {
667 bus_dma_tag_destroy(ring->data_dmat);
668 ring->data_dmat = NULL;
673 rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring,
676 struct rt2661_rx_desc *desc;
677 struct rt2661_rx_data *data;
682 ring->cur = ring->next = 0;
684 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
685 BUS_SPACE_MAXADDR, NULL, NULL, count * RT2661_RX_DESC_SIZE, 1,
686 count * RT2661_RX_DESC_SIZE, 0, &ring->desc_dmat);
688 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
692 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
693 BUS_DMA_WAITOK | BUS_DMA_ZERO, &ring->desc_map);
695 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
699 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
700 count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
703 device_printf(sc->sc_dev, "could not load desc DMA map\n");
705 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
710 ring->data = kmalloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF,
714 * Pre-allocate Rx buffers and populate Rx ring.
716 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
717 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 1, MCLBYTES, 0,
720 device_printf(sc->sc_dev, "could not create data DMA tag\n");
724 for (i = 0; i < count; i++) {
725 desc = &sc->rxq.desc[i];
726 data = &sc->rxq.data[i];
728 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
730 device_printf(sc->sc_dev, "could not create DMA map\n");
734 data->m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
735 if (data->m == NULL) {
736 device_printf(sc->sc_dev,
737 "could not allocate rx mbuf\n");
742 error = bus_dmamap_load(ring->data_dmat, data->map,
743 mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr,
746 device_printf(sc->sc_dev,
747 "could not load rx buf DMA map");
754 desc->flags = htole32(RT2661_RX_BUSY);
755 desc->physaddr = htole32(physaddr);
758 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
762 fail: rt2661_free_rx_ring(sc, ring);
767 rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
771 for (i = 0; i < ring->count; i++)
772 ring->desc[i].flags = htole32(RT2661_RX_BUSY);
774 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
776 ring->cur = ring->next = 0;
780 rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
782 struct rt2661_rx_data *data;
785 if (ring->desc != NULL) {
786 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
787 BUS_DMASYNC_POSTWRITE);
788 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
789 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
793 if (ring->desc_dmat != NULL) {
794 bus_dma_tag_destroy(ring->desc_dmat);
795 ring->desc_dmat = NULL;
798 if (ring->data != NULL) {
799 for (i = 0; i < ring->count; i++) {
800 data = &ring->data[i];
802 if (data->m != NULL) {
803 bus_dmamap_sync(ring->data_dmat, data->map,
804 BUS_DMASYNC_POSTREAD);
805 bus_dmamap_unload(ring->data_dmat, data->map);
810 if (data->map != NULL) {
811 bus_dmamap_destroy(ring->data_dmat, data->map);
816 kfree(ring->data, M_DEVBUF);
820 if (ring->data_dmat != NULL) {
821 bus_dma_tag_destroy(ring->data_dmat);
822 ring->data_dmat = NULL;
826 static struct ieee80211_node *
827 rt2661_node_alloc(struct ieee80211_node_table *nt)
829 struct rt2661_node *rn;
831 rn = kmalloc(sizeof (struct rt2661_node), M_80211_NODE,
834 return (rn != NULL) ? &rn->ni : NULL;
838 rt2661_media_change(struct ifnet *ifp)
840 struct rt2661_softc *sc = ifp->if_softc;
843 error = ieee80211_media_change(ifp);
844 if (error != ENETRESET)
847 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
853 * This function is called periodically (every 200ms) during scanning to
854 * switch from one channel to another.
857 rt2661_next_scan(void *arg)
859 struct rt2661_softc *sc = arg;
860 struct ieee80211com *ic = &sc->sc_ic;
861 struct ifnet *ifp = &ic->ic_if;
863 lwkt_serialize_enter(ifp->if_serializer);
864 if (ic->ic_state == IEEE80211_S_SCAN)
865 ieee80211_next_scan(ic);
866 lwkt_serialize_exit(ifp->if_serializer);
870 * This function is called for each node present in the node station table.
873 rt2661_iter_func(void *arg, struct ieee80211_node *ni)
875 struct rt2661_node *rn = (struct rt2661_node *)ni;
877 ral_rssadapt_updatestats(&rn->rssadapt);
881 * This function is called periodically (every 100ms) in RUN state to update
882 * the rate adaptation statistics.
885 rt2661_update_rssadapt(void *arg)
887 struct rt2661_softc *sc = arg;
888 struct ieee80211com *ic = &sc->sc_ic;
889 struct ifnet *ifp = &ic->ic_if;
891 lwkt_serialize_enter(ifp->if_serializer);
893 ieee80211_iterate_nodes(&ic->ic_sta, rt2661_iter_func, arg);
894 callout_reset(&sc->rssadapt_ch, hz / 10, rt2661_update_rssadapt, sc);
896 lwkt_serialize_exit(ifp->if_serializer);
900 rt2661_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
902 struct rt2661_softc *sc = ic->ic_ifp->if_softc;
903 enum ieee80211_state ostate;
904 struct ieee80211_node *ni;
908 ostate = ic->ic_state;
909 callout_stop(&sc->scan_ch);
911 if (ostate != nstate)
912 rt2661_led_newstate(sc, nstate);
915 case IEEE80211_S_INIT:
916 callout_stop(&sc->rssadapt_ch);
918 if (ostate == IEEE80211_S_RUN) {
919 /* abort TSF synchronization */
920 tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
921 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);
925 case IEEE80211_S_SCAN:
926 rt2661_set_chan(sc, ic->ic_curchan);
927 callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000,
928 rt2661_next_scan, sc);
931 case IEEE80211_S_AUTH:
932 case IEEE80211_S_ASSOC:
933 rt2661_set_chan(sc, ic->ic_curchan);
936 case IEEE80211_S_RUN:
937 rt2661_set_chan(sc, ic->ic_curchan);
941 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
942 rt2661_enable_mrr(sc);
943 rt2661_set_txpreamble(sc);
944 rt2661_set_basicrates(sc, &ni->ni_rates);
945 rt2661_set_bssid(sc, ni->ni_bssid);
948 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
949 ic->ic_opmode == IEEE80211_M_IBSS) {
950 if ((error = rt2661_prepare_beacon(sc)) != 0)
954 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
955 callout_reset(&sc->rssadapt_ch, hz / 10,
956 rt2661_update_rssadapt, sc);
957 rt2661_enable_tsf_sync(sc);
962 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg);
966 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
970 rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr)
976 /* clock C once before the first command */
977 RT2661_EEPROM_CTL(sc, 0);
979 RT2661_EEPROM_CTL(sc, RT2661_S);
980 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
981 RT2661_EEPROM_CTL(sc, RT2661_S);
983 /* write start bit (1) */
984 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
985 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
987 /* write READ opcode (10) */
988 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
989 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
990 RT2661_EEPROM_CTL(sc, RT2661_S);
991 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
993 /* write address (A5-A0 or A7-A0) */
994 n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7;
995 for (; n >= 0; n--) {
996 RT2661_EEPROM_CTL(sc, RT2661_S |
997 (((addr >> n) & 1) << RT2661_SHIFT_D));
998 RT2661_EEPROM_CTL(sc, RT2661_S |
999 (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C);
1002 RT2661_EEPROM_CTL(sc, RT2661_S);
1004 /* read data Q15-Q0 */
1006 for (n = 15; n >= 0; n--) {
1007 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
1008 tmp = RAL_READ(sc, RT2661_E2PROM_CSR);
1009 val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;
1010 RT2661_EEPROM_CTL(sc, RT2661_S);
1013 RT2661_EEPROM_CTL(sc, 0);
1015 /* clear Chip Select and clock C */
1016 RT2661_EEPROM_CTL(sc, RT2661_S);
1017 RT2661_EEPROM_CTL(sc, 0);
1018 RT2661_EEPROM_CTL(sc, RT2661_C);
1024 rt2661_tx_intr(struct rt2661_softc *sc)
1026 struct ieee80211com *ic = &sc->sc_ic;
1027 struct ifnet *ifp = ic->ic_ifp;
1028 struct rt2661_tx_ring *txq;
1029 struct rt2661_tx_data *data;
1030 struct rt2661_node *rn;
1035 val = RAL_READ(sc, RT2661_STA_CSR4);
1036 if (!(val & RT2661_TX_STAT_VALID))
1039 /* retrieve the queue in which this frame was sent */
1040 qid = RT2661_TX_QID(val);
1041 txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq;
1043 /* retrieve rate control algorithm context */
1044 data = &txq->data[txq->stat];
1045 rn = (struct rt2661_node *)data->ni;
1047 switch (RT2661_TX_RESULT(val)) {
1048 case RT2661_TX_SUCCESS:
1049 retrycnt = RT2661_TX_RETRYCNT(val);
1051 DPRINTFN(10, ("data frame sent successfully after "
1052 "%d retries\n", retrycnt));
1053 if (retrycnt == 0 && data->id.id_node != NULL) {
1054 ral_rssadapt_raise_rate(ic, &rn->rssadapt,
1060 case RT2661_TX_RETRY_FAIL:
1061 DPRINTFN(9, ("sending data frame failed (too much "
1063 if (data->id.id_node != NULL) {
1064 ral_rssadapt_lower_rate(ic, data->ni,
1065 &rn->rssadapt, &data->id);
1072 device_printf(sc->sc_dev,
1073 "sending data frame failed 0x%08x\n", val);
1077 ieee80211_free_node(data->ni);
1080 DPRINTFN(15, ("tx done q=%d idx=%u\n", qid, txq->stat));
1083 if (++txq->stat >= txq->count) /* faster than % count */
1087 sc->sc_tx_timer = 0;
1088 ifp->if_flags &= ~IFF_OACTIVE;
1093 rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq)
1095 struct rt2661_tx_desc *desc;
1096 struct rt2661_tx_data *data;
1098 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD);
1101 desc = &txq->desc[txq->next];
1102 data = &txq->data[txq->next];
1104 if ((le32toh(desc->flags) & RT2661_TX_BUSY) ||
1105 !(le32toh(desc->flags) & RT2661_TX_VALID))
1108 bus_dmamap_sync(txq->data_dmat, data->map,
1109 BUS_DMASYNC_POSTWRITE);
1110 bus_dmamap_unload(txq->data_dmat, data->map);
1113 /* node reference is released in rt2661_tx_intr() */
1115 /* descriptor is no longer valid */
1116 desc->flags &= ~htole32(RT2661_TX_VALID);
1118 DPRINTFN(15, ("tx dma done q=%p idx=%u\n", txq, txq->next));
1120 if (++txq->next >= txq->count) /* faster than % count */
1124 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1128 rt2661_rx_intr(struct rt2661_softc *sc)
1130 struct ieee80211com *ic = &sc->sc_ic;
1131 struct ifnet *ifp = ic->ic_ifp;
1132 struct rt2661_rx_desc *desc;
1133 struct rt2661_rx_data *data;
1134 bus_addr_t physaddr;
1135 struct ieee80211_frame *wh;
1136 struct ieee80211_node *ni;
1137 struct rt2661_node *rn;
1138 struct mbuf *mnew, *m;
1141 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1142 BUS_DMASYNC_POSTREAD);
1145 desc = &sc->rxq.desc[sc->rxq.cur];
1146 data = &sc->rxq.data[sc->rxq.cur];
1148 if (le32toh(desc->flags) & RT2661_RX_BUSY)
1151 if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) ||
1152 (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) {
1154 * This should not happen since we did not request
1155 * to receive those frames when we filled TXRX_CSR0.
1157 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n",
1158 le32toh(desc->flags)));
1163 if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) {
1169 * Try to allocate a new mbuf for this ring element and load it
1170 * before processing the current mbuf. If the ring element
1171 * cannot be loaded, drop the received packet and reuse the old
1172 * mbuf. In the unlikely case that the old mbuf can't be
1173 * reloaded either, explicitly panic.
1175 mnew = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
1181 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1182 BUS_DMASYNC_POSTREAD);
1183 bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1185 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1186 mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr,
1191 /* try to reload the old mbuf */
1192 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1193 mtod(data->m, void *), MCLBYTES,
1194 rt2661_dma_map_addr, &physaddr, 0);
1196 /* very unlikely that it will fail... */
1197 panic("%s: could not load old rx mbuf",
1198 device_get_name(sc->sc_dev));
1205 * New mbuf successfully loaded, update Rx ring and continue
1210 desc->physaddr = htole32(physaddr);
1213 m->m_pkthdr.rcvif = ifp;
1214 m->m_pkthdr.len = m->m_len =
1215 (le32toh(desc->flags) >> 16) & 0xfff;
1217 if (sc->sc_drvbpf != NULL) {
1218 struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap;
1219 uint32_t tsf_lo, tsf_hi;
1221 /* get timestamp (low and high 32 bits) */
1222 tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13);
1223 tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12);
1226 htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1228 tap->wr_rate = rt2661_rxrate(desc);
1229 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
1230 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
1231 tap->wr_antsignal = desc->rssi;
1233 bpf_ptap(sc->sc_drvbpf, m, tap, sc->sc_rxtap_len);
1236 wh = mtod(m, struct ieee80211_frame *);
1237 ni = ieee80211_find_rxnode(ic,
1238 (struct ieee80211_frame_min *)wh);
1240 /* send the frame to the 802.11 layer */
1241 ieee80211_input(ic, m, ni, desc->rssi, 0);
1243 /* give rssi to the rate adatation algorithm */
1244 rn = (struct rt2661_node *)ni;
1245 ral_rssadapt_input(ic, ni, &rn->rssadapt,
1246 rt2661_get_rssi(sc, desc->rssi));
1248 /* node is no longer needed */
1249 ieee80211_free_node(ni);
1251 skip: desc->flags |= htole32(RT2661_RX_BUSY);
1253 DPRINTFN(15, ("rx intr idx=%u\n", sc->rxq.cur));
1255 sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT;
1258 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1259 BUS_DMASYNC_PREWRITE);
1264 rt2661_mcu_beacon_expire(struct rt2661_softc *sc)
1270 rt2661_mcu_wakeup(struct rt2661_softc *sc)
1272 RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16);
1274 RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7);
1275 RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18);
1276 RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20);
1278 /* send wakeup command to MCU */
1279 rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0);
1283 rt2661_mcu_cmd_intr(struct rt2661_softc *sc)
1285 RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR);
1286 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
1290 rt2661_intr(void *arg)
1292 struct rt2661_softc *sc = arg;
1293 struct ifnet *ifp = &sc->sc_ic.ic_if;
1296 /* disable MAC and MCU interrupts */
1297 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
1298 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
1300 /* don't re-enable interrupts if we're shutting down */
1301 if (!(ifp->if_flags & IFF_RUNNING))
1304 r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR);
1305 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1);
1307 r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR);
1308 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2);
1310 if (r1 & RT2661_MGT_DONE)
1311 rt2661_tx_dma_intr(sc, &sc->mgtq);
1313 if (r1 & RT2661_RX_DONE)
1316 if (r1 & RT2661_TX0_DMA_DONE)
1317 rt2661_tx_dma_intr(sc, &sc->txq[0]);
1319 if (r1 & RT2661_TX1_DMA_DONE)
1320 rt2661_tx_dma_intr(sc, &sc->txq[1]);
1322 if (r1 & RT2661_TX2_DMA_DONE)
1323 rt2661_tx_dma_intr(sc, &sc->txq[2]);
1325 if (r1 & RT2661_TX3_DMA_DONE)
1326 rt2661_tx_dma_intr(sc, &sc->txq[3]);
1328 if (r1 & RT2661_TX_DONE)
1331 if (r2 & RT2661_MCU_CMD_DONE)
1332 rt2661_mcu_cmd_intr(sc);
1334 if (r2 & RT2661_MCU_BEACON_EXPIRE)
1335 rt2661_mcu_beacon_expire(sc);
1337 if (r2 & RT2661_MCU_WAKEUP)
1338 rt2661_mcu_wakeup(sc);
1340 /* re-enable MAC and MCU interrupts */
1341 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
1342 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
1345 /* quickly determine if a given rate is CCK or OFDM */
1346 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
1348 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */
1349 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */
1351 #define RAL_SIFS 10 /* us */
1354 * This function is only used by the Rx radiotap code. It returns the rate at
1355 * which a given frame was received.
1358 rt2661_rxrate(struct rt2661_rx_desc *desc)
1360 if (le32toh(desc->flags) & RT2661_RX_OFDM) {
1361 /* reverse function of rt2661_plcp_signal */
1362 switch (desc->rate & 0xf) {
1363 case 0xb: return 12;
1364 case 0xf: return 18;
1365 case 0xa: return 24;
1366 case 0xe: return 36;
1367 case 0x9: return 48;
1368 case 0xd: return 72;
1369 case 0x8: return 96;
1370 case 0xc: return 108;
1373 if (desc->rate == 10)
1375 if (desc->rate == 20)
1377 if (desc->rate == 55)
1379 if (desc->rate == 110)
1382 return 2; /* should not get there */
1386 * Return the expected ack rate for a frame transmitted at rate `rate'.
1387 * XXX: this should depend on the destination node basic rate set.
1390 rt2661_ack_rate(struct ieee80211com *ic, int rate)
1399 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
1415 /* default to 1Mbps */
1420 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
1421 * The function automatically determines the operating mode depending on the
1422 * given rate. `flags' indicates whether short preamble is in use or not.
1425 rt2661_txtime(int len, int rate, uint32_t flags)
1429 if (RAL_RATE_IS_OFDM(rate)) {
1430 /* IEEE Std 802.11a-1999, pp. 37 */
1431 txtime = (8 + 4 * len + 3 + rate - 1) / rate;
1432 txtime = 16 + 4 + 4 * txtime + 6;
1434 /* IEEE Std 802.11b-1999, pp. 28 */
1435 txtime = (16 * len + rate - 1) / rate;
1436 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
1446 rt2661_plcp_signal(int rate)
1449 /* CCK rates (returned values are device-dependent) */
1452 case 11: return 0x2;
1453 case 22: return 0x3;
1455 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1456 case 12: return 0xb;
1457 case 18: return 0xf;
1458 case 24: return 0xa;
1459 case 36: return 0xe;
1460 case 48: return 0x9;
1461 case 72: return 0xd;
1462 case 96: return 0x8;
1463 case 108: return 0xc;
1465 /* unsupported rates (should not get there) */
1466 default: return 0xff;
1471 rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc,
1472 uint32_t flags, uint16_t xflags, int len, int rate,
1473 const bus_dma_segment_t *segs, int nsegs, int ac)
1475 struct ieee80211com *ic = &sc->sc_ic;
1476 uint16_t plcp_length;
1479 desc->flags = htole32(flags);
1480 desc->flags |= htole32(len << 16);
1481 desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID);
1483 desc->xflags = htole16(xflags);
1484 desc->xflags |= htole16(nsegs << 13);
1486 desc->wme = htole16(
1489 RT2661_LOGCWMIN(4) |
1490 RT2661_LOGCWMAX(10));
1493 * Remember in which queue this frame was sent. This field is driver
1494 * private data only. It will be made available by the NIC in STA_CSR4
1499 /* setup PLCP fields */
1500 desc->plcp_signal = rt2661_plcp_signal(rate);
1501 desc->plcp_service = 4;
1503 len += IEEE80211_CRC_LEN;
1504 if (RAL_RATE_IS_OFDM(rate)) {
1505 desc->flags |= htole32(RT2661_TX_OFDM);
1507 plcp_length = len & 0xfff;
1508 desc->plcp_length_hi = plcp_length >> 6;
1509 desc->plcp_length_lo = plcp_length & 0x3f;
1511 plcp_length = (16 * len + rate - 1) / rate;
1513 remainder = (16 * len) % 22;
1514 if (remainder != 0 && remainder < 7)
1515 desc->plcp_service |= RT2661_PLCP_LENGEXT;
1517 desc->plcp_length_hi = plcp_length >> 8;
1518 desc->plcp_length_lo = plcp_length & 0xff;
1520 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1521 desc->plcp_signal |= 0x08;
1524 /* RT2x61 supports scatter with up to 5 segments */
1525 for (i = 0; i < nsegs; i++) {
1526 desc->addr[i] = htole32(segs[i].ds_addr);
1527 desc->len [i] = htole16(segs[i].ds_len);
1532 rt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0,
1533 struct ieee80211_node *ni)
1535 struct ieee80211com *ic = &sc->sc_ic;
1536 struct rt2661_tx_desc *desc;
1537 struct rt2661_tx_data *data;
1538 struct ieee80211_frame *wh;
1539 struct rt2661_dmamap map;
1541 uint32_t flags = 0; /* XXX HWSEQ */
1544 desc = &sc->mgtq.desc[sc->mgtq.cur];
1545 data = &sc->mgtq.data[sc->mgtq.cur];
1547 /* send mgt frames at the lowest available rate */
1548 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1550 error = bus_dmamap_load_mbuf(sc->mgtq.data_dmat, data->map, m0,
1551 rt2661_dma_map_mbuf, &map, 0);
1553 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1559 if (sc->sc_drvbpf != NULL) {
1560 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1563 tap->wt_rate = rate;
1564 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1565 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1567 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1573 wh = mtod(m0, struct ieee80211_frame *);
1575 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1576 flags |= RT2661_TX_NEED_ACK;
1578 dur = rt2661_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) +
1580 *(uint16_t *)wh->i_dur = htole16(dur);
1582 /* tell hardware to add timestamp in probe responses */
1584 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1585 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1586 flags |= RT2661_TX_TIMESTAMP;
1589 rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */,
1590 m0->m_pkthdr.len, rate, map.segs, map.nseg, RT2661_QID_MGT);
1592 bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1593 bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map,
1594 BUS_DMASYNC_PREWRITE);
1596 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n",
1597 m0->m_pkthdr.len, sc->mgtq.cur, rate));
1601 sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
1602 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT);
1608 * Build a RTS control frame.
1610 static struct mbuf *
1611 rt2661_get_rts(struct rt2661_softc *sc, struct ieee80211_frame *wh,
1614 struct ieee80211_frame_rts *rts;
1617 MGETHDR(m, MB_DONTWAIT, MT_DATA);
1619 sc->sc_ic.ic_stats.is_tx_nobuf++;
1620 device_printf(sc->sc_dev, "could not allocate RTS frame\n");
1624 rts = mtod(m, struct ieee80211_frame_rts *);
1626 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL |
1627 IEEE80211_FC0_SUBTYPE_RTS;
1628 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS;
1629 *(uint16_t *)rts->i_dur = htole16(dur);
1630 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1);
1631 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2);
1633 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts);
1639 rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
1640 struct ieee80211_node *ni, int ac)
1642 struct ieee80211com *ic = &sc->sc_ic;
1643 struct rt2661_tx_ring *txq = &sc->txq[ac];
1644 struct rt2661_tx_desc *desc;
1645 struct rt2661_tx_data *data;
1646 struct rt2661_node *rn;
1647 struct ieee80211_rateset *rs;
1648 struct ieee80211_frame *wh;
1649 struct ieee80211_key *k;
1650 const struct chanAccParams *cap;
1652 struct rt2661_dmamap map;
1655 int error, rate, noack = 0;
1657 wh = mtod(m0, struct ieee80211_frame *);
1659 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) {
1660 rs = &ic->ic_sup_rates[ic->ic_curmode];
1661 rate = rs->rs_rates[ic->ic_fixed_rate];
1664 rn = (struct rt2661_node *)ni;
1665 ni->ni_txrate = ral_rssadapt_choose(&rn->rssadapt, rs,
1666 wh, m0->m_pkthdr.len, NULL, 0);
1667 rate = rs->rs_rates[ni->ni_txrate];
1669 rate &= IEEE80211_RATE_VAL;
1671 if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
1672 cap = &ic->ic_wme.wme_chanParams;
1673 noack = cap->cap_wmeParams[ac].wmep_noackPolicy;
1676 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1677 k = ieee80211_crypto_encap(ic, ni, m0);
1683 /* packet header may have moved, reset our local pointer */
1684 wh = mtod(m0, struct ieee80211_frame *);
1688 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange
1689 * for directed frames only when the length of the MPDU is greater
1690 * than the length threshold indicated by [...]" ic_rtsthreshold.
1692 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
1693 m0->m_pkthdr.len > ic->ic_rtsthreshold) {
1696 int rtsrate, ackrate;
1698 rtsrate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1699 ackrate = rt2661_ack_rate(ic, rate);
1701 dur = rt2661_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) +
1702 rt2661_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) +
1703 /* XXX: noack (QoS)? */
1704 rt2661_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) +
1707 m = rt2661_get_rts(sc, wh, dur);
1709 desc = &txq->desc[txq->cur];
1710 data = &txq->data[txq->cur];
1712 error = bus_dmamap_load_mbuf(txq->data_dmat, data->map, m,
1713 rt2661_dma_map_mbuf, &map, 0);
1715 device_printf(sc->sc_dev,
1716 "could not map mbuf (error %d)\n", error);
1722 /* avoid multiple free() of the same node for each fragment */
1723 ieee80211_ref_node(ni);
1728 /* RTS frames are not taken into account for rssadapt */
1729 data->id.id_node = NULL;
1731 rt2661_setup_tx_desc(sc, desc, RT2661_TX_NEED_ACK |
1732 RT2661_TX_MORE_FRAG, 0, m->m_pkthdr.len,
1733 rtsrate, map.segs, map.nseg, ac);
1735 bus_dmamap_sync(txq->data_dmat, data->map,
1736 BUS_DMASYNC_PREWRITE);
1739 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1742 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the
1743 * asynchronous data frame shall be transmitted after the CTS
1744 * frame and a SIFS period.
1746 flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS;
1749 data = &txq->data[txq->cur];
1750 desc = &txq->desc[txq->cur];
1752 error = bus_dmamap_load_mbuf(txq->data_dmat, data->map, m0,
1753 rt2661_dma_map_mbuf, &map, 0);
1754 if (error != 0 && error != EFBIG) {
1755 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1761 mnew = m_defrag(m0, MB_DONTWAIT);
1763 device_printf(sc->sc_dev,
1764 "could not defragment mbuf\n");
1770 error = bus_dmamap_load_mbuf(txq->data_dmat, data->map, m0,
1771 rt2661_dma_map_mbuf, &map, 0);
1773 device_printf(sc->sc_dev,
1774 "could not map mbuf (error %d)\n", error);
1779 /* packet header have moved, reset our local pointer */
1780 wh = mtod(m0, struct ieee80211_frame *);
1783 if (sc->sc_drvbpf != NULL) {
1784 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1787 tap->wt_rate = rate;
1788 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1789 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1791 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1797 /* remember link conditions for rate adaptation algorithm */
1798 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) {
1799 data->id.id_len = m0->m_pkthdr.len;
1800 data->id.id_rateidx = ni->ni_txrate;
1801 data->id.id_node = ni;
1802 data->id.id_rssi = ni->ni_rssi;
1804 data->id.id_node = NULL;
1806 if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1807 flags |= RT2661_TX_NEED_ACK;
1809 dur = rt2661_txtime(RAL_ACK_SIZE, rt2661_ack_rate(ic, rate),
1810 ic->ic_flags) + RAL_SIFS;
1811 *(uint16_t *)wh->i_dur = htole16(dur);
1814 rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate,
1815 map.segs, map.nseg, ac);
1817 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1818 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1820 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n",
1821 m0->m_pkthdr.len, txq->cur, rate));
1825 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1826 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac);
1832 rt2661_start(struct ifnet *ifp)
1834 struct rt2661_softc *sc = ifp->if_softc;
1835 struct ieee80211com *ic = &sc->sc_ic;
1837 struct ether_header *eh;
1838 struct ieee80211_node *ni;
1841 /* prevent management frames from being sent if we're not ready */
1842 if (!(ifp->if_flags & IFF_RUNNING))
1846 IF_POLL(&ic->ic_mgtq, m0);
1848 if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
1849 ifp->if_flags |= IFF_OACTIVE;
1852 IF_DEQUEUE(&ic->ic_mgtq, m0);
1854 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1855 m0->m_pkthdr.rcvif = NULL;
1857 if (ic->ic_rawbpf != NULL)
1858 bpf_mtap(ic->ic_rawbpf, m0);
1860 if (rt2661_tx_mgt(sc, m0, ni) != 0)
1864 if (ic->ic_state != IEEE80211_S_RUN)
1867 m0 = ifq_dequeue(&ifp->if_snd, NULL);
1871 if (m0->m_len < sizeof (struct ether_header) &&
1872 !(m0 = m_pullup(m0, sizeof (struct ether_header))))
1875 eh = mtod(m0, struct ether_header *);
1876 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1883 /* classify mbuf so we can find which tx ring to use */
1884 if (ieee80211_classify(ic, m0, ni) != 0) {
1886 ieee80211_free_node(ni);
1891 /* no QoS encapsulation for EAPOL frames */
1892 ac = (eh->ether_type != htons(ETHERTYPE_PAE)) ?
1893 M_WME_GETAC(m0) : WME_AC_BE;
1895 if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) {
1896 /* there is no place left in this ring */
1897 ifp->if_flags |= IFF_OACTIVE;
1899 ieee80211_free_node(ni);
1905 m0 = ieee80211_encap(ic, m0, ni);
1907 ieee80211_free_node(ni);
1912 if (ic->ic_rawbpf != NULL)
1913 bpf_mtap(ic->ic_rawbpf, m0);
1915 if (rt2661_tx_data(sc, m0, ni, ac) != 0) {
1916 ieee80211_free_node(ni);
1922 sc->sc_tx_timer = 5;
1928 rt2661_watchdog(struct ifnet *ifp)
1930 struct rt2661_softc *sc = ifp->if_softc;
1931 struct ieee80211com *ic = &sc->sc_ic;
1935 if (sc->sc_tx_timer > 0) {
1936 if (--sc->sc_tx_timer == 0) {
1937 device_printf(sc->sc_dev, "device timeout\n");
1945 ieee80211_watchdog(ic);
1949 * This function allows for fast channel switching in monitor mode (used by
1950 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
1951 * generate a new beacon frame.
1954 rt2661_reset(struct ifnet *ifp)
1956 struct rt2661_softc *sc = ifp->if_softc;
1957 struct ieee80211com *ic = &sc->sc_ic;
1959 if (ic->ic_opmode != IEEE80211_M_MONITOR)
1962 rt2661_set_chan(sc, ic->ic_curchan);
1968 rt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1970 struct rt2661_softc *sc = ifp->if_softc;
1971 struct ieee80211com *ic = &sc->sc_ic;
1976 if (ifp->if_flags & IFF_UP) {
1977 if (ifp->if_flags & IFF_RUNNING)
1978 rt2661_update_promisc(sc);
1982 if (ifp->if_flags & IFF_RUNNING)
1988 error = ieee80211_ioctl(ic, cmd, data, cr);
1991 if (error == ENETRESET) {
1992 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1993 (IFF_UP | IFF_RUNNING) &&
1994 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL))
2002 rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)
2007 for (ntries = 0; ntries < 100; ntries++) {
2008 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
2012 if (ntries == 100) {
2013 device_printf(sc->sc_dev, "could not write to BBP\n");
2017 tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;
2018 RAL_WRITE(sc, RT2661_PHY_CSR3, tmp);
2020 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val));
2024 rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg)
2029 for (ntries = 0; ntries < 100; ntries++) {
2030 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
2034 if (ntries == 100) {
2035 device_printf(sc->sc_dev, "could not read from BBP\n");
2039 val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;
2040 RAL_WRITE(sc, RT2661_PHY_CSR3, val);
2042 for (ntries = 0; ntries < 100; ntries++) {
2043 val = RAL_READ(sc, RT2661_PHY_CSR3);
2044 if (!(val & RT2661_BBP_BUSY))
2049 device_printf(sc->sc_dev, "could not read from BBP\n");
2054 rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)
2059 for (ntries = 0; ntries < 100; ntries++) {
2060 if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY))
2064 if (ntries == 100) {
2065 device_printf(sc->sc_dev, "could not write to RF\n");
2069 tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |
2071 RAL_WRITE(sc, RT2661_PHY_CSR4, tmp);
2073 /* remember last written value in sc */
2074 sc->rf_regs[reg] = val;
2076 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff));
2080 rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg)
2082 if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY)
2083 return EIO; /* there is already a command pending */
2085 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
2086 RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg);
2088 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd);
2094 rt2661_select_antenna(struct rt2661_softc *sc)
2096 uint8_t bbp4, bbp77;
2099 bbp4 = rt2661_bbp_read(sc, 4);
2100 bbp77 = rt2661_bbp_read(sc, 77);
2104 /* make sure Rx is disabled before switching antenna */
2105 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2106 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2108 rt2661_bbp_write(sc, 4, bbp4);
2109 rt2661_bbp_write(sc, 77, bbp77);
2111 /* restore Rx filter */
2112 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2116 * Enable multi-rate retries for frames sent at OFDM rates.
2117 * In 802.11b/g mode, allow fallback to CCK rates.
2120 rt2661_enable_mrr(struct rt2661_softc *sc)
2122 struct ieee80211com *ic = &sc->sc_ic;
2125 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
2127 tmp &= ~RT2661_MRR_CCK_FALLBACK;
2128 if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan))
2129 tmp |= RT2661_MRR_CCK_FALLBACK;
2130 tmp |= RT2661_MRR_ENABLED;
2132 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
2136 rt2661_set_txpreamble(struct rt2661_softc *sc)
2140 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
2142 tmp &= ~RT2661_SHORT_PREAMBLE;
2143 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
2144 tmp |= RT2661_SHORT_PREAMBLE;
2146 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
2150 rt2661_set_basicrates(struct rt2661_softc *sc,
2151 const struct ieee80211_rateset *rs)
2153 #define RV(r) ((r) & IEEE80211_RATE_VAL)
2158 for (i = 0; i < rs->rs_nrates; i++) {
2159 rate = rs->rs_rates[i];
2161 if (!(rate & IEEE80211_RATE_BASIC))
2165 * Find h/w rate index. We know it exists because the rate
2166 * set has already been negotiated.
2168 for (j = 0; rt2661_rateset_11g.rs_rates[j] != RV(rate); j++);
2173 RAL_WRITE(sc, RT2661_TXRX_CSR5, mask);
2175 DPRINTF(("Setting basic rate mask to 0x%x\n", mask));
2180 * Reprogram MAC/BBP to switch to a new band. Values taken from the reference
2184 rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c)
2186 uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104;
2189 /* update all BBP registers that depend on the band */
2190 bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c;
2191 bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48;
2192 if (IEEE80211_IS_CHAN_5GHZ(c)) {
2193 bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c;
2194 bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10;
2196 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
2197 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
2198 bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10;
2201 rt2661_bbp_write(sc, 17, bbp17);
2202 rt2661_bbp_write(sc, 96, bbp96);
2203 rt2661_bbp_write(sc, 104, bbp104);
2205 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
2206 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
2207 rt2661_bbp_write(sc, 75, 0x80);
2208 rt2661_bbp_write(sc, 86, 0x80);
2209 rt2661_bbp_write(sc, 88, 0x80);
2212 rt2661_bbp_write(sc, 35, bbp35);
2213 rt2661_bbp_write(sc, 97, bbp97);
2214 rt2661_bbp_write(sc, 98, bbp98);
2216 tmp = RAL_READ(sc, RT2661_PHY_CSR0);
2217 tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ);
2218 if (IEEE80211_IS_CHAN_2GHZ(c))
2219 tmp |= RT2661_PA_PE_2GHZ;
2221 tmp |= RT2661_PA_PE_5GHZ;
2222 RAL_WRITE(sc, RT2661_PHY_CSR0, tmp);
2226 rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c)
2228 struct ieee80211com *ic = &sc->sc_ic;
2229 const struct rfprog *rfprog;
2230 uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT;
2234 chan = ieee80211_chan2ieee(ic, c);
2235 if (chan == 0 || chan == IEEE80211_CHAN_ANY)
2238 /* select the appropriate RF settings based on what EEPROM says */
2239 rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2;
2241 /* find the settings for this channel (we know it exists) */
2242 for (i = 0; rfprog[i].chan != chan; i++);
2244 power = sc->txpow[i];
2248 } else if (power > 31) {
2249 bbp94 += power - 31;
2254 * If we are switching from the 2GHz band to the 5GHz band or
2255 * vice-versa, BBP registers need to be reprogrammed.
2257 if (c->ic_flags != sc->sc_curchan->ic_flags) {
2258 rt2661_select_band(sc, c);
2259 rt2661_select_antenna(sc);
2263 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2264 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2265 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2266 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2270 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2271 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2272 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1);
2273 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2277 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2278 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2279 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2280 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2282 /* enable smart mode for MIMO-capable RFs */
2283 bbp3 = rt2661_bbp_read(sc, 3);
2285 bbp3 &= ~RT2661_SMART_MODE;
2286 if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529)
2287 bbp3 |= RT2661_SMART_MODE;
2289 rt2661_bbp_write(sc, 3, bbp3);
2291 if (bbp94 != RT2661_BBPR94_DEFAULT)
2292 rt2661_bbp_write(sc, 94, bbp94);
2294 /* 5GHz radio needs a 1ms delay here */
2295 if (IEEE80211_IS_CHAN_5GHZ(c))
2300 rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid)
2304 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2305 RAL_WRITE(sc, RT2661_MAC_CSR4, tmp);
2307 tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16;
2308 RAL_WRITE(sc, RT2661_MAC_CSR5, tmp);
2312 rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr)
2316 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2317 RAL_WRITE(sc, RT2661_MAC_CSR2, tmp);
2319 tmp = addr[4] | addr[5] << 8;
2320 RAL_WRITE(sc, RT2661_MAC_CSR3, tmp);
2324 rt2661_update_promisc(struct rt2661_softc *sc)
2326 struct ifnet *ifp = sc->sc_ic.ic_ifp;
2329 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2331 tmp &= ~RT2661_DROP_NOT_TO_ME;
2332 if (!(ifp->if_flags & IFF_PROMISC))
2333 tmp |= RT2661_DROP_NOT_TO_ME;
2335 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2337 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2338 "entering" : "leaving"));
2342 * Update QoS (802.11e) settings for each h/w Tx ring.
2345 rt2661_wme_update(struct ieee80211com *ic)
2347 struct rt2661_softc *sc = ic->ic_ifp->if_softc;
2348 const struct wmeParams *wmep;
2350 wmep = ic->ic_wme.wme_chanParams.cap_wmeParams;
2352 /* XXX: not sure about shifts. */
2353 /* XXX: the reference driver plays with AC_VI settings too. */
2356 RAL_WRITE(sc, RT2661_AC_TXOP_CSR0,
2357 wmep[WME_AC_BE].wmep_txopLimit << 16 |
2358 wmep[WME_AC_BK].wmep_txopLimit);
2359 RAL_WRITE(sc, RT2661_AC_TXOP_CSR1,
2360 wmep[WME_AC_VI].wmep_txopLimit << 16 |
2361 wmep[WME_AC_VO].wmep_txopLimit);
2364 RAL_WRITE(sc, RT2661_CWMIN_CSR,
2365 wmep[WME_AC_BE].wmep_logcwmin << 12 |
2366 wmep[WME_AC_BK].wmep_logcwmin << 8 |
2367 wmep[WME_AC_VI].wmep_logcwmin << 4 |
2368 wmep[WME_AC_VO].wmep_logcwmin);
2371 RAL_WRITE(sc, RT2661_CWMAX_CSR,
2372 wmep[WME_AC_BE].wmep_logcwmax << 12 |
2373 wmep[WME_AC_BK].wmep_logcwmax << 8 |
2374 wmep[WME_AC_VI].wmep_logcwmax << 4 |
2375 wmep[WME_AC_VO].wmep_logcwmax);
2378 RAL_WRITE(sc, RT2661_AIFSN_CSR,
2379 wmep[WME_AC_BE].wmep_aifsn << 12 |
2380 wmep[WME_AC_BK].wmep_aifsn << 8 |
2381 wmep[WME_AC_VI].wmep_aifsn << 4 |
2382 wmep[WME_AC_VO].wmep_aifsn);
2388 rt2661_update_slot(struct ifnet *ifp)
2390 struct rt2661_softc *sc = ifp->if_softc;
2391 struct ieee80211com *ic = &sc->sc_ic;
2395 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2397 tmp = RAL_READ(sc, RT2661_MAC_CSR9);
2398 tmp = (tmp & ~0xff) | slottime;
2399 RAL_WRITE(sc, RT2661_MAC_CSR9, tmp);
2403 rt2661_get_rf(int rev)
2406 case RT2661_RF_5225: return "RT5225";
2407 case RT2661_RF_5325: return "RT5325 (MIMO XR)";
2408 case RT2661_RF_2527: return "RT2527";
2409 case RT2661_RF_2529: return "RT2529 (MIMO XR)";
2410 default: return "unknown";
2415 rt2661_read_eeprom(struct rt2661_softc *sc)
2417 struct ieee80211com *ic = &sc->sc_ic;
2421 /* read MAC address */
2422 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);
2423 ic->ic_myaddr[0] = val & 0xff;
2424 ic->ic_myaddr[1] = val >> 8;
2426 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);
2427 ic->ic_myaddr[2] = val & 0xff;
2428 ic->ic_myaddr[3] = val >> 8;
2430 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);
2431 ic->ic_myaddr[4] = val & 0xff;
2432 ic->ic_myaddr[5] = val >> 8;
2434 val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);
2435 /* XXX: test if different from 0xffff? */
2436 sc->rf_rev = (val >> 11) & 0x1f;
2437 sc->hw_radio = (val >> 10) & 0x1;
2438 sc->rx_ant = (val >> 4) & 0x3;
2439 sc->tx_ant = (val >> 2) & 0x3;
2440 sc->nb_ant = val & 0x3;
2442 DPRINTF(("RF revision=%d\n", sc->rf_rev));
2444 val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);
2445 sc->ext_5ghz_lna = (val >> 6) & 0x1;
2446 sc->ext_2ghz_lna = (val >> 4) & 0x1;
2448 DPRINTF(("External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n",
2449 sc->ext_2ghz_lna, sc->ext_5ghz_lna));
2451 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);
2452 if ((val & 0xff) != 0xff)
2453 sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */
2455 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);
2456 if ((val & 0xff) != 0xff)
2457 sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */
2459 /* adjust RSSI correction for external low-noise amplifier */
2460 if (sc->ext_2ghz_lna)
2461 sc->rssi_2ghz_corr -= 14;
2462 if (sc->ext_5ghz_lna)
2463 sc->rssi_5ghz_corr -= 14;
2465 DPRINTF(("RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n",
2466 sc->rssi_2ghz_corr, sc->rssi_5ghz_corr));
2468 val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);
2469 if ((val >> 8) != 0xff)
2470 sc->rfprog = (val >> 8) & 0x3;
2471 if ((val & 0xff) != 0xff)
2472 sc->rffreq = val & 0xff;
2474 DPRINTF(("RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq));
2476 /* read Tx power for all a/b/g channels */
2477 for (i = 0; i < 19; i++) {
2478 val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);
2479 sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */
2480 DPRINTF(("Channel=%d Tx power=%d\n",
2481 rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]));
2482 sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */
2483 DPRINTF(("Channel=%d Tx power=%d\n",
2484 rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]));
2487 /* read vendor-specific BBP values */
2488 for (i = 0; i < 16; i++) {
2489 val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);
2490 if (val == 0 || val == 0xffff)
2491 continue; /* skip invalid entries */
2492 sc->bbp_prom[i].reg = val >> 8;
2493 sc->bbp_prom[i].val = val & 0xff;
2494 DPRINTF(("BBP R%d=%02x\n", sc->bbp_prom[i].reg,
2495 sc->bbp_prom[i].val));
2498 val = rt2661_eeprom_read(sc, RT2661_EEPROM_LED_OFFSET);
2499 DPRINTF(("LED %02x\n", val));
2500 if (val == 0xffff) {
2501 sc->mcu_led = RT2661_MCU_LED_DEFAULT;
2503 #define N(arr) (int)(sizeof(arr) / sizeof(arr[0]))
2505 for (i = 0; i < N(led_ee2mcu); ++i) {
2506 if (val & led_ee2mcu[i].ee_bit)
2507 sc->mcu_led |= led_ee2mcu[i].mcu_bit;
2512 sc->mcu_led |= ((val >> RT2661_EE_LED_MODE_SHIFT) &
2513 RT2661_EE_LED_MODE_MASK);
2518 rt2661_bbp_init(struct rt2661_softc *sc)
2520 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2524 /* wait for BBP to be ready */
2525 for (ntries = 0; ntries < 100; ntries++) {
2526 val = rt2661_bbp_read(sc, 0);
2527 if (val != 0 && val != 0xff)
2531 if (ntries == 100) {
2532 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2536 /* initialize BBP registers to default values */
2537 for (i = 0; i < N(rt2661_def_bbp); i++) {
2538 rt2661_bbp_write(sc, rt2661_def_bbp[i].reg,
2539 rt2661_def_bbp[i].val);
2542 /* write vendor-specific BBP values (from EEPROM) */
2543 for (i = 0; i < 16; i++) {
2544 if (sc->bbp_prom[i].reg == 0)
2546 rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2554 rt2661_init(void *priv)
2556 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2557 struct rt2661_softc *sc = priv;
2558 struct ieee80211com *ic = &sc->sc_ic;
2559 struct ifnet *ifp = ic->ic_ifp;
2560 uint32_t tmp, sta[3];
2565 /* initialize Tx rings */
2566 RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr);
2567 RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr);
2568 RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr);
2569 RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr);
2571 /* initialize Mgt ring */
2572 RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
2574 /* initialize Rx ring */
2575 RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr);
2577 /* initialize Tx rings sizes */
2578 RAL_WRITE(sc, RT2661_TX_RING_CSR0,
2579 RT2661_TX_RING_COUNT << 24 |
2580 RT2661_TX_RING_COUNT << 16 |
2581 RT2661_TX_RING_COUNT << 8 |
2582 RT2661_TX_RING_COUNT);
2584 RAL_WRITE(sc, RT2661_TX_RING_CSR1,
2585 RT2661_TX_DESC_WSIZE << 16 |
2586 RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */
2587 RT2661_MGT_RING_COUNT);
2589 /* initialize Rx rings */
2590 RAL_WRITE(sc, RT2661_RX_RING_CSR,
2591 RT2661_RX_DESC_BACK << 16 |
2592 RT2661_RX_DESC_WSIZE << 8 |
2593 RT2661_RX_RING_COUNT);
2595 /* XXX: some magic here */
2596 RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa);
2598 /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */
2599 RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f);
2601 /* load base address of Rx ring */
2602 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2);
2604 /* initialize MAC registers to default values */
2605 for (i = 0; i < N(rt2661_def_mac); i++)
2606 RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);
2608 IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp));
2609 rt2661_set_macaddr(sc, ic->ic_myaddr);
2611 /* set host ready */
2612 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2613 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2615 /* wait for BBP/RF to wakeup */
2616 for (ntries = 0; ntries < 1000; ntries++) {
2617 if (RAL_READ(sc, RT2661_MAC_CSR12) & 8)
2621 if (ntries == 1000) {
2622 printf("timeout waiting for BBP/RF to wakeup\n");
2627 if (rt2661_bbp_init(sc) != 0) {
2632 /* select default channel */
2633 sc->sc_curchan = ic->ic_curchan;
2634 rt2661_select_band(sc, sc->sc_curchan);
2635 rt2661_select_antenna(sc);
2636 rt2661_set_chan(sc, sc->sc_curchan);
2638 /* update Rx filter */
2639 tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff;
2641 tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR;
2642 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2643 tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR |
2645 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2646 tmp |= RT2661_DROP_TODS;
2647 if (!(ifp->if_flags & IFF_PROMISC))
2648 tmp |= RT2661_DROP_NOT_TO_ME;
2651 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2653 /* clear STA registers */
2654 RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta));
2656 /* initialize ASIC */
2657 RAL_WRITE(sc, RT2661_MAC_CSR1, 4);
2659 /* clear any pending interrupt */
2660 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2662 /* enable interrupts */
2663 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
2664 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
2667 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1);
2669 ifp->if_flags &= ~IFF_OACTIVE;
2670 ifp->if_flags |= IFF_RUNNING;
2672 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2673 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
2674 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2676 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2681 rt2661_stop(void *priv)
2683 struct rt2661_softc *sc = priv;
2684 struct ieee80211com *ic = &sc->sc_ic;
2685 struct ifnet *ifp = ic->ic_ifp;
2688 sc->sc_tx_timer = 0;
2690 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2692 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2694 /* abort Tx (for all 5 Tx rings) */
2695 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16);
2697 /* disable Rx (value remains after reset!) */
2698 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2699 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2702 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2703 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2705 /* disable interrupts */
2706 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff);
2707 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
2709 /* clear any pending interrupt */
2710 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2711 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff);
2713 /* reset Tx and Rx rings */
2714 rt2661_reset_tx_ring(sc, &sc->txq[0]);
2715 rt2661_reset_tx_ring(sc, &sc->txq[1]);
2716 rt2661_reset_tx_ring(sc, &sc->txq[2]);
2717 rt2661_reset_tx_ring(sc, &sc->txq[3]);
2718 rt2661_reset_tx_ring(sc, &sc->mgtq);
2719 rt2661_reset_rx_ring(sc, &sc->rxq);
2723 rt2661_load_microcode(struct rt2661_softc *sc, const uint8_t *ucode, int size)
2728 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2730 /* cancel any pending Host to MCU command */
2731 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0);
2732 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
2733 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0);
2735 /* write 8051's microcode */
2736 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL);
2737 RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, ucode, size);
2738 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2740 /* kick 8051's ass */
2741 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0);
2743 /* wait for 8051 to initialize */
2744 for (ntries = 0; ntries < 500; ntries++) {
2745 if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY)
2749 if (ntries == 500) {
2750 printf("timeout waiting for MCU to initialize\n");
2758 * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and
2759 * false CCA count. This function is called periodically (every seconds) when
2760 * in the RUN state. Values taken from the reference driver.
2763 rt2661_rx_tune(struct rt2661_softc *sc)
2770 * Tuning range depends on operating band and on the presence of an
2771 * external low-noise amplifier.
2774 if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan))
2776 if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) ||
2777 (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna))
2781 /* retrieve false CCA count since last call (clear on read) */
2782 cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff;
2786 } else if (dbm >= -58) {
2788 } else if (dbm >= -66) {
2790 } else if (dbm >= -74) {
2793 /* RSSI < -74dBm, tune using false CCA count */
2795 bbp17 = sc->bbp17; /* current value */
2797 hi -= 2 * (-74 - dbm);
2804 } else if (cca > 512) {
2807 } else if (cca < 100) {
2813 if (bbp17 != sc->bbp17) {
2814 rt2661_bbp_write(sc, 17, bbp17);
2820 * Enter/Leave radar detection mode.
2821 * This is for 802.11h additional regulatory domains.
2824 rt2661_radar_start(struct rt2661_softc *sc)
2829 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2830 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2832 rt2661_bbp_write(sc, 82, 0x20);
2833 rt2661_bbp_write(sc, 83, 0x00);
2834 rt2661_bbp_write(sc, 84, 0x40);
2836 /* save current BBP registers values */
2837 sc->bbp18 = rt2661_bbp_read(sc, 18);
2838 sc->bbp21 = rt2661_bbp_read(sc, 21);
2839 sc->bbp22 = rt2661_bbp_read(sc, 22);
2840 sc->bbp16 = rt2661_bbp_read(sc, 16);
2841 sc->bbp17 = rt2661_bbp_read(sc, 17);
2842 sc->bbp64 = rt2661_bbp_read(sc, 64);
2844 rt2661_bbp_write(sc, 18, 0xff);
2845 rt2661_bbp_write(sc, 21, 0x3f);
2846 rt2661_bbp_write(sc, 22, 0x3f);
2847 rt2661_bbp_write(sc, 16, 0xbd);
2848 rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34);
2849 rt2661_bbp_write(sc, 64, 0x21);
2851 /* restore Rx filter */
2852 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2856 rt2661_radar_stop(struct rt2661_softc *sc)
2860 /* read radar detection result */
2861 bbp66 = rt2661_bbp_read(sc, 66);
2863 /* restore BBP registers values */
2864 rt2661_bbp_write(sc, 16, sc->bbp16);
2865 rt2661_bbp_write(sc, 17, sc->bbp17);
2866 rt2661_bbp_write(sc, 18, sc->bbp18);
2867 rt2661_bbp_write(sc, 21, sc->bbp21);
2868 rt2661_bbp_write(sc, 22, sc->bbp22);
2869 rt2661_bbp_write(sc, 64, sc->bbp64);
2876 rt2661_prepare_beacon(struct rt2661_softc *sc)
2878 struct ieee80211com *ic = &sc->sc_ic;
2879 struct ieee80211_beacon_offsets bo;
2880 struct rt2661_tx_desc desc;
2884 m0 = ieee80211_beacon_alloc(ic, ic->ic_bss, &bo);
2886 device_printf(sc->sc_dev, "could not allocate beacon frame\n");
2890 /* send beacons at the lowest available rate */
2891 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan) ? 12 : 2;
2893 rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ,
2894 m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT);
2896 /* copy the first 24 bytes of Tx descriptor into NIC memory */
2897 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
2899 /* copy beacon header and payload into NIC memory */
2900 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24,
2901 mtod(m0, uint8_t *), m0->m_pkthdr.len);
2908 * Enable TSF synchronization and tell h/w to start sending beacons for IBSS
2909 * and HostAP operating modes.
2912 rt2661_enable_tsf_sync(struct rt2661_softc *sc)
2914 struct ieee80211com *ic = &sc->sc_ic;
2917 if (ic->ic_opmode != IEEE80211_M_STA) {
2919 * Change default 16ms TBTT adjustment to 8ms.
2920 * Must be done before enabling beacon generation.
2922 RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8);
2925 tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000;
2927 /* set beacon interval (in 1/16ms unit) */
2928 tmp |= ic->ic_bss->ni_intval * 16;
2930 tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT;
2931 if (ic->ic_opmode == IEEE80211_M_STA)
2932 tmp |= RT2661_TSF_MODE(1);
2934 tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON;
2936 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp);
2940 * Retrieve the "Received Signal Strength Indicator" from the raw values
2941 * contained in Rx descriptors. The computation depends on which band the
2942 * frame was received. Correction values taken from the reference driver.
2945 rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw)
2949 lna = (raw >> 5) & 0x3;
2954 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) {
2955 rssi += sc->rssi_2ghz_corr;
2964 rssi += sc->rssi_5ghz_corr;
2977 rt2661_dma_map_mbuf(void *arg, bus_dma_segment_t *seg, int nseg,
2978 bus_size_t map_size __unused, int error)
2980 struct rt2661_dmamap *map = arg;
2985 KASSERT(nseg <= RT2661_MAX_SCATTER, ("too many DMA segments"));
2987 bcopy(seg, map->segs, nseg * sizeof(bus_dma_segment_t));
2992 rt2661_led_newstate(struct rt2661_softc *sc, enum ieee80211_state nstate)
2994 struct ieee80211com *ic = &sc->sc_ic;
2996 uint32_t mail = sc->mcu_led;
2998 if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY) {
2999 DPRINTF(("%s failed", __func__));
3004 case IEEE80211_S_INIT:
3005 mail &= ~(RT2661_MCU_LED_LINKA | RT2661_MCU_LED_LINKG |
3009 if (ic->ic_curchan == NULL)
3012 on = RT2661_MCU_LED_LINKG;
3013 off = RT2661_MCU_LED_LINKA;
3014 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan)) {
3015 on = RT2661_MCU_LED_LINKA;
3016 off = RT2661_MCU_LED_LINKG;
3019 mail |= RT2661_MCU_LED_RF | on;
3024 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
3025 RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | mail);
3026 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | RT2661_MCU_SET_LED);