sys/dev/drm/i915/dvo_tfp410.c

   1 /*
   2  * Copyright © 2007 Dave Mueller
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Dave Mueller <dave.mueller@gmx.ch>
  25  *
  26  */
  27
  28 #include "dvo.h"
  29
  30 /* register definitions according to the TFP410 data sheet */
  31 #define TFP410_VID              0x014C
  32 #define TFP410_DID              0x0410
  33
  34 #define TFP410_VID_LO           0x00
  35 #define TFP410_VID_HI           0x01
  36 #define TFP410_DID_LO           0x02
  37 #define TFP410_DID_HI           0x03
  38 #define TFP410_REV              0x04
  39
  40 #define TFP410_CTL_1            0x08
  41 #define TFP410_CTL_1_TDIS       (1<<6)
  42 #define TFP410_CTL_1_VEN        (1<<5)
  43 #define TFP410_CTL_1_HEN        (1<<4)
  44 #define TFP410_CTL_1_DSEL       (1<<3)
  45 #define TFP410_CTL_1_BSEL       (1<<2)
  46 #define TFP410_CTL_1_EDGE       (1<<1)
  47 #define TFP410_CTL_1_PD         (1<<0)
  48
  49 #define TFP410_CTL_2            0x09
  50 #define TFP410_CTL_2_VLOW       (1<<7)
  51 #define TFP410_CTL_2_MSEL_MASK  (0x7<<4)
  52 #define TFP410_CTL_2_MSEL       (1<<4)
  53 #define TFP410_CTL_2_TSEL       (1<<3)
  54 #define TFP410_CTL_2_RSEN       (1<<2)
  55 #define TFP410_CTL_2_HTPLG      (1<<1)
  56 #define TFP410_CTL_2_MDI        (1<<0)
  57
  58 #define TFP410_CTL_3            0x0A
  59 #define TFP410_CTL_3_DK_MASK    (0x7<<5)
  60 #define TFP410_CTL_3_DK         (1<<5)
  61 #define TFP410_CTL_3_DKEN       (1<<4)
  62 #define TFP410_CTL_3_CTL_MASK   (0x7<<1)
  63 #define TFP410_CTL_3_CTL        (1<<1)
  64
  65 #define TFP410_USERCFG          0x0B
  66
  67 #define TFP410_DE_DLY           0x32
  68
  69 #define TFP410_DE_CTL           0x33
  70 #define TFP410_DE_CTL_DEGEN     (1<<6)
  71 #define TFP410_DE_CTL_VSPOL     (1<<5)
  72 #define TFP410_DE_CTL_HSPOL     (1<<4)
  73 #define TFP410_DE_CTL_DEDLY8    (1<<0)
  74
  75 #define TFP410_DE_TOP           0x34
  76
  77 #define TFP410_DE_CNT_LO        0x36
  78 #define TFP410_DE_CNT_HI        0x37
  79
  80 #define TFP410_DE_LIN_LO        0x38
  81 #define TFP410_DE_LIN_HI        0x39
  82
  83 #define TFP410_H_RES_LO         0x3A
  84 #define TFP410_H_RES_HI         0x3B
  85
  86 #define TFP410_V_RES_LO         0x3C
  87 #define TFP410_V_RES_HI         0x3D
  88
  89 struct tfp410_priv {
  90         bool quiet;
  91 };
  92
  93 static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
  94 {
  95         struct intel_iic_softc *sc;
  96         struct tfp410_priv *tfp = dvo->dev_priv;
  97         struct i2c_adapter *adapter = dvo->i2c_bus;
  98         u8 out_buf[2];
  99         u8 in_buf[2];
 100
 101         struct i2c_msg msgs[] = {
 102                 {
 103                         .slave = dvo->slave_addr << 1,
 104                         .flags = 0,
 105                         .len = 1,
 106                         .buf = out_buf,
 107                 },
 108                 {
 109                         .slave = dvo->slave_addr << 1,
 110                         .flags = I2C_M_RD,
 111                         .len = 1,
 112                         .buf = in_buf,
 113                 }
 114         };
 115
 116         *ch = 0;        /* silence gcc warnings */
 117         out_buf[0] = addr;
 118         out_buf[1] = 0;
 119
 120         sc = device_get_softc(adapter);
 121
 122         if (iicbus_transfer(adapter, msgs, 2) == 0) {
 123                 *ch = in_buf[0];
 124                 return true;
 125         }
 126
 127         if (!tfp->quiet) {
 128                 DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
 129                           addr, sc->name, dvo->slave_addr);
 130         }
 131         return false;
 132 }
 133
 134 static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
 135 {
 136         struct intel_iic_softc *sc;
 137         struct tfp410_priv *tfp = dvo->dev_priv;
 138         struct i2c_adapter *adapter = dvo->i2c_bus;
 139         uint8_t out_buf[2];
 140         struct i2c_msg msg = {
 141                 .slave = dvo->slave_addr << 1,
 142                 .flags = 0,
 143                 .len = 2,
 144                 .buf = out_buf,
 145         };
 146
 147         out_buf[0] = addr;
 148         out_buf[1] = ch;
 149
 150         sc = device_get_softc(adapter);
 151
 152         if (iicbus_transfer(adapter, &msg, 1) == 0)
 153                 return true;
 154
 155         if (!tfp->quiet) {
 156                 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
 157                           addr, sc->name, dvo->slave_addr);
 158         }
 159
 160         return false;
 161 }
 162
 163 static int tfp410_getid(struct intel_dvo_device *dvo, int addr)
 164 {
 165         uint8_t ch1, ch2;
 166
 167         if (tfp410_readb(dvo, addr+0, &ch1) &&
 168             tfp410_readb(dvo, addr+1, &ch2))
 169                 return ((ch2 << 8) & 0xFF00) | (ch1 & 0x00FF);
 170
 171         return -1;
 172 }
 173
 174 /* Ti TFP410 driver for chip on i2c bus */
 175 static bool tfp410_init(struct intel_dvo_device *dvo,
 176                         struct i2c_adapter *adapter)
 177 {
 178         struct intel_iic_softc *sc;
 179         /* this will detect the tfp410 chip on the specified i2c bus */
 180         struct tfp410_priv *tfp;
 181         int id;
 182
 183         sc = device_get_softc(adapter);
 184
 185         tfp = kzalloc(sizeof(struct tfp410_priv), GFP_KERNEL);
 186         if (tfp == NULL)
 187                 return false;
 188
 189         dvo->i2c_bus = adapter;
 190         dvo->dev_priv = tfp;
 191         tfp->quiet = true;
 192
 193         if ((id = tfp410_getid(dvo, TFP410_VID_LO)) != TFP410_VID) {
 194                 DRM_DEBUG_KMS("tfp410 not detected got VID %X: from %s "
 195                                 "Slave %d.\n",
 196                           id, sc->name, dvo->slave_addr);
 197                 goto out;
 198         }
 199
 200         if ((id = tfp410_getid(dvo, TFP410_DID_LO)) != TFP410_DID) {
 201                 DRM_DEBUG_KMS("tfp410 not detected got DID %X: from %s "
 202                                 "Slave %d.\n",
 203                           id, sc->name, dvo->slave_addr);
 204                 goto out;
 205         }
 206         tfp->quiet = false;
 207         return true;
 208 out:
 209         kfree(tfp);
 210         return false;
 211 }
 212
 213 static enum drm_connector_status tfp410_detect(struct intel_dvo_device *dvo)
 214 {
 215         enum drm_connector_status ret = connector_status_disconnected;
 216         uint8_t ctl2;
 217
 218         if (tfp410_readb(dvo, TFP410_CTL_2, &ctl2)) {
 219                 if (ctl2 & TFP410_CTL_2_RSEN)
 220                         ret = connector_status_connected;
 221                 else
 222                         ret = connector_status_disconnected;
 223         }
 224
 225         return ret;
 226 }
 227
 228 static enum drm_mode_status tfp410_mode_valid(struct intel_dvo_device *dvo,
 229                                               struct drm_display_mode *mode)
 230 {
 231         return MODE_OK;
 232 }
 233
 234 static void tfp410_mode_set(struct intel_dvo_device *dvo,
 235                             const struct drm_display_mode *mode,
 236                             const struct drm_display_mode *adjusted_mode)
 237 {
 238         /* As long as the basics are set up, since we don't have clock dependencies
 239         * in the mode setup, we can just leave the registers alone and everything
 240         * will work fine.
 241         */
 242         /* don't do much */
 243         return;
 244 }
 245
 246 /* set the tfp410 power state */
 247 static void tfp410_dpms(struct intel_dvo_device *dvo, bool enable)
 248 {
 249         uint8_t ctl1;
 250
 251         if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1))
 252                 return;
 253
 254         if (enable)
 255                 ctl1 |= TFP410_CTL_1_PD;
 256         else
 257                 ctl1 &= ~TFP410_CTL_1_PD;
 258
 259         tfp410_writeb(dvo, TFP410_CTL_1, ctl1);
 260 }
 261
 262 static bool tfp410_get_hw_state(struct intel_dvo_device *dvo)
 263 {
 264         uint8_t ctl1;
 265
 266         if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1))
 267                 return false;
 268
 269         if (ctl1 & TFP410_CTL_1_PD)
 270                 return true;
 271         else
 272                 return false;
 273 }
 274
 275 static void tfp410_dump_regs(struct intel_dvo_device *dvo)
 276 {
 277         uint8_t val, val2;
 278
 279         tfp410_readb(dvo, TFP410_REV, &val);
 280         DRM_DEBUG_KMS("TFP410_REV: 0x%02X\n", val);
 281         tfp410_readb(dvo, TFP410_CTL_1, &val);
 282         DRM_DEBUG_KMS("TFP410_CTL1: 0x%02X\n", val);
 283         tfp410_readb(dvo, TFP410_CTL_2, &val);
 284         DRM_DEBUG_KMS("TFP410_CTL2: 0x%02X\n", val);
 285         tfp410_readb(dvo, TFP410_CTL_3, &val);
 286         DRM_DEBUG_KMS("TFP410_CTL3: 0x%02X\n", val);
 287         tfp410_readb(dvo, TFP410_USERCFG, &val);
 288         DRM_DEBUG_KMS("TFP410_USERCFG: 0x%02X\n", val);
 289         tfp410_readb(dvo, TFP410_DE_DLY, &val);
 290         DRM_DEBUG_KMS("TFP410_DE_DLY: 0x%02X\n", val);
 291         tfp410_readb(dvo, TFP410_DE_CTL, &val);
 292         DRM_DEBUG_KMS("TFP410_DE_CTL: 0x%02X\n", val);
 293         tfp410_readb(dvo, TFP410_DE_TOP, &val);
 294         DRM_DEBUG_KMS("TFP410_DE_TOP: 0x%02X\n", val);
 295         tfp410_readb(dvo, TFP410_DE_CNT_LO, &val);
 296         tfp410_readb(dvo, TFP410_DE_CNT_HI, &val2);
 297         DRM_DEBUG_KMS("TFP410_DE_CNT: 0x%02X%02X\n", val2, val);
 298         tfp410_readb(dvo, TFP410_DE_LIN_LO, &val);
 299         tfp410_readb(dvo, TFP410_DE_LIN_HI, &val2);
 300         DRM_DEBUG_KMS("TFP410_DE_LIN: 0x%02X%02X\n", val2, val);
 301         tfp410_readb(dvo, TFP410_H_RES_LO, &val);
 302         tfp410_readb(dvo, TFP410_H_RES_HI, &val2);
 303         DRM_DEBUG_KMS("TFP410_H_RES: 0x%02X%02X\n", val2, val);
 304         tfp410_readb(dvo, TFP410_V_RES_LO, &val);
 305         tfp410_readb(dvo, TFP410_V_RES_HI, &val2);
 306         DRM_DEBUG_KMS("TFP410_V_RES: 0x%02X%02X\n", val2, val);
 307 }
 308
 309 static void tfp410_destroy(struct intel_dvo_device *dvo)
 310 {
 311         struct tfp410_priv *tfp = dvo->dev_priv;
 312
 313         if (tfp) {
 314                 kfree(tfp);
 315                 dvo->dev_priv = NULL;
 316         }
 317 }
 318
 319 struct intel_dvo_dev_ops tfp410_ops = {
 320         .init = tfp410_init,
 321         .detect = tfp410_detect,
 322         .mode_valid = tfp410_mode_valid,
 323         .mode_set = tfp410_mode_set,
 324         .dpms = tfp410_dpms,
 325         .get_hw_state = tfp410_get_hw_state,
 326         .dump_regs = tfp410_dump_regs,
 327         .destroy = tfp410_destroy,
 328 };