2 * Copyright 1996 Massachusetts Institute of Technology
4 * Permission to use, copy, modify, and distribute this software and
5 * its documentation for any purpose and without fee is hereby
6 * granted, provided that both the above copyright notice and this
7 * permission notice appear in all copies, that both the above
8 * copyright notice and this permission notice appear in all
9 * supporting documentation, and that the name of M.I.T. not be used
10 * in advertising or publicity pertaining to distribution of the
11 * software without specific, written prior permission. M.I.T. makes
12 * no representations about the suitability of this software for any
13 * purpose. It is provided "as is" without express or implied
16 * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
17 * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
18 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
20 * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * $FreeBSD: src/sys/i386/i386/perfmon.c,v 1.21 1999/09/25 18:24:04 phk Exp $
30 * $DragonFly: src/sys/platform/pc32/i386/perfmon.c,v 1.5 2003/07/12 16:55:47 dillon Exp $
33 #include <sys/param.h>
34 #include <sys/systm.h>
36 #include <sys/fcntl.h>
40 #include <machine/cputypes.h>
42 #include <machine/clock.h>
43 #include <machine/perfmon.h>
45 static int perfmon_inuse;
46 static int perfmon_cpuok;
48 static int msr_ctl[NPMC];
50 static int msr_pmc[NPMC];
51 static unsigned int ctl_shadow[NPMC];
52 static quad_t pmc_shadow[NPMC]; /* used when ctr is stopped on P5 */
53 static int (*writectl)(int);
55 static int writectl5(int);
56 static int writectl6(int);
59 static d_close_t perfmon_close;
60 static d_open_t perfmon_open;
61 static d_ioctl_t perfmon_ioctl;
63 #define CDEV_MAJOR 2 /* We're really a minor of mem.c */
64 static struct cdevsw perfmon_cdevsw = {
65 /* open */ perfmon_open,
66 /* close */ perfmon_close,
69 /* ioctl */ perfmon_ioctl,
72 /* strategy */ nostrategy,
82 * Must be called after cpu_class is set up.
103 writectl = writectl6;
111 make_dev(&perfmon_cdevsw, 32, UID_ROOT, GID_KMEM, 0640, "perfmon");
117 return perfmon_cpuok;
121 perfmon_setup(int pmc, unsigned int control)
123 if (pmc < 0 || pmc >= NPMC)
126 perfmon_inuse |= (1 << pmc);
127 control &= ~(PMCF_SYS_FLAGS << 16);
128 mpintr_lock(); /* doesn't have to be mpintr_lock YYY */
129 ctl_shadow[pmc] = control;
131 wrmsr(msr_pmc[pmc], pmc_shadow[pmc] = 0);
137 perfmon_get(int pmc, unsigned int *control)
139 if (pmc < 0 || pmc >= NPMC)
142 if (perfmon_inuse & (1 << pmc)) {
143 *control = ctl_shadow[pmc];
146 return EBUSY; /* XXX reversed sense */
150 perfmon_fini(int pmc)
152 if (pmc < 0 || pmc >= NPMC)
155 if (perfmon_inuse & (1 << pmc)) {
158 perfmon_inuse &= ~(1 << pmc);
161 return EBUSY; /* XXX reversed sense */
165 perfmon_start(int pmc)
167 if (pmc < 0 || pmc >= NPMC)
170 if (perfmon_inuse & (1 << pmc)) {
171 mpintr_lock(); /* doesn't have to be mpintr YYY */
172 ctl_shadow[pmc] |= (PMCF_EN << 16);
173 wrmsr(msr_pmc[pmc], pmc_shadow[pmc]);
182 perfmon_stop(int pmc)
184 if (pmc < 0 || pmc >= NPMC)
187 if (perfmon_inuse & (1 << pmc)) {
189 pmc_shadow[pmc] = rdmsr(msr_pmc[pmc]) & 0xffffffffffULL;
190 ctl_shadow[pmc] &= ~(PMCF_EN << 16);
199 perfmon_read(int pmc, quad_t *val)
201 if (pmc < 0 || pmc >= NPMC)
204 if (perfmon_inuse & (1 << pmc)) {
205 if (ctl_shadow[pmc] & (PMCF_EN << 16))
206 *val = rdmsr(msr_pmc[pmc]) & 0xffffffffffULL;
208 *val = pmc_shadow[pmc];
216 perfmon_reset(int pmc)
218 if (pmc < 0 || pmc >= NPMC)
221 if (perfmon_inuse & (1 << pmc)) {
222 wrmsr(msr_pmc[pmc], pmc_shadow[pmc] = 0);
230 * Unfortunately, the performance-monitoring registers are laid out
231 * differently in the P5 and P6. We keep everything in P6 format
232 * internally (except for the event code), and convert to P5
233 * format as needed on those CPUs. The writectl function pointer
234 * is set up to point to one of these functions by perfmon_init().
239 if (pmc > 0 && !(ctl_shadow[pmc] & (PMCF_EN << 16))) {
240 wrmsr(msr_ctl[pmc], 0);
242 wrmsr(msr_ctl[pmc], ctl_shadow[pmc]);
247 #define P5FLAG_P 0x200
248 #define P5FLAG_E 0x100
249 #define P5FLAG_USR 0x80
250 #define P5FLAG_OS 0x40
257 if (ctl_shadow[1] & (PMCF_EN << 16)) {
258 if (ctl_shadow[1] & (PMCF_USR << 16))
259 newval |= P5FLAG_USR << 16;
260 if (ctl_shadow[1] & (PMCF_OS << 16))
261 newval |= P5FLAG_OS << 16;
262 if (!(ctl_shadow[1] & (PMCF_E << 16)))
263 newval |= P5FLAG_E << 16;
264 newval |= (ctl_shadow[1] & 0x3f) << 16;
266 if (ctl_shadow[0] & (PMCF_EN << 16)) {
267 if (ctl_shadow[0] & (PMCF_USR << 16))
268 newval |= P5FLAG_USR;
269 if (ctl_shadow[0] & (PMCF_OS << 16))
271 if (!(ctl_shadow[0] & (PMCF_E << 16)))
273 newval |= ctl_shadow[0] & 0x3f;
276 wrmsr(msr_ctl[0], newval);
277 return 0; /* XXX should check for unimplemented bits */
282 * Now the user-mode interface, called from a subdevice of mem.c.
285 static int writerpmc;
288 perfmon_open(dev_t dev, int flags, int fmt, struct thread *td)
293 if (flags & FWRITE) {
305 perfmon_close(dev_t dev, int flags, int fmt, struct thread *td)
307 if (flags & FWRITE) {
310 for (i = 0; i < NPMC; i++) {
311 if (writerpmc & (1 << i))
320 perfmon_ioctl(dev_t dev, u_long cmd, caddr_t param, int flags, struct thread *td)
323 struct pmc_data *pmcd;
324 struct pmc_tstamp *pmct;
330 if (!(flags & FWRITE))
332 pmc = (struct pmc *)param;
334 rv = perfmon_setup(pmc->pmc_num, pmc->pmc_val);
336 writerpmc |= (1 << pmc->pmc_num);
341 pmc = (struct pmc *)param;
342 rv = perfmon_get(pmc->pmc_num, &pmc->pmc_val);
346 if (!(flags & FWRITE))
350 rv = perfmon_start(*ip);
354 if (!(flags & FWRITE))
358 rv = perfmon_stop(*ip);
362 if (!(flags & FWRITE))
366 rv = perfmon_reset(*ip);
370 pmcd = (struct pmc_data *)param;
371 rv = perfmon_read(pmcd->pmcd_num, &pmcd->pmcd_value);
379 pmct = (struct pmc_tstamp *)param;
380 /* XXX interface loses precision. */
381 pmct->pmct_rate = tsc_freq / 1000000;
382 pmct->pmct_value = rdtsc();