2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Dave Airlie
28 * $FreeBSD: head/sys/dev/drm2/radeon/radeon_gart.c 254885 2013-08-25 19:37:15Z dumbbell $
32 #include "drm/drm_legacy.h" /* for drm_dma_handle_t */
33 #include <uapi_drm/radeon_drm.h>
38 * The GART (Graphics Aperture Remapping Table) is an aperture
39 * in the GPU's address space. System pages can be mapped into
40 * the aperture and look like contiguous pages from the GPU's
41 * perspective. A page table maps the pages in the aperture
42 * to the actual backing pages in system memory.
44 * Radeon GPUs support both an internal GART, as described above,
45 * and AGP. AGP works similarly, but the GART table is configured
46 * and maintained by the northbridge rather than the driver.
47 * Radeon hw has a separate AGP aperture that is programmed to
48 * point to the AGP aperture provided by the northbridge and the
49 * requests are passed through to the northbridge aperture.
50 * Both AGP and internal GART can be used at the same time, however
51 * that is not currently supported by the driver.
53 * This file handles the common internal GART management.
57 * Common GART table functions.
60 * radeon_gart_table_ram_alloc - allocate system ram for gart page table
62 * @rdev: radeon_device pointer
64 * Allocate system memory for GART page table
65 * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
66 * gart table to be in system memory.
67 * Returns 0 for success, -ENOMEM for failure.
69 int radeon_gart_table_ram_alloc(struct radeon_device *rdev)
71 drm_dma_handle_t *dmah;
73 dmah = drm_pci_alloc(rdev->ddev, rdev->gart.table_size,
78 rdev->gart.dmah = dmah;
79 rdev->gart.ptr = dmah->vaddr;
80 #if defined(__i386) || defined(__amd64) || defined(__amd64__) || defined(__x86_64__)
81 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
82 rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
83 pmap_change_attr((vm_offset_t)rdev->gart.ptr,
84 rdev->gart.table_size >> PAGE_SHIFT, PAT_UNCACHED);
87 rdev->gart.table_addr = dmah->busaddr;
88 memset((void *)rdev->gart.ptr, 0, rdev->gart.table_size);
93 * radeon_gart_table_ram_free - free system ram for gart page table
95 * @rdev: radeon_device pointer
97 * Free system memory for GART page table
98 * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
99 * gart table to be in system memory.
101 void radeon_gart_table_ram_free(struct radeon_device *rdev)
103 if (rdev->gart.ptr == NULL) {
106 #if defined(__i386) || defined(__amd64) || defined(__amd64__) || defined(__x86_64__)
107 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
108 rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
109 pmap_change_attr((vm_offset_t)rdev->gart.ptr,
110 rdev->gart.table_size >> PAGE_SHIFT, PAT_WRITE_COMBINING);
113 drm_pci_free(rdev->ddev, rdev->gart.dmah);
114 rdev->gart.dmah = NULL;
115 rdev->gart.ptr = NULL;
116 rdev->gart.table_addr = 0;
120 * radeon_gart_table_vram_alloc - allocate vram for gart page table
122 * @rdev: radeon_device pointer
124 * Allocate video memory for GART page table
125 * (pcie r4xx, r5xx+). These asics require the
126 * gart table to be in video memory.
127 * Returns 0 for success, error for failure.
129 int radeon_gart_table_vram_alloc(struct radeon_device *rdev)
133 if (rdev->gart.robj == NULL) {
134 r = radeon_bo_create(rdev, rdev->gart.table_size,
135 PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
136 0, NULL, &rdev->gart.robj);
145 * radeon_gart_table_vram_pin - pin gart page table in vram
147 * @rdev: radeon_device pointer
149 * Pin the GART page table in vram so it will not be moved
150 * by the memory manager (pcie r4xx, r5xx+). These asics require the
151 * gart table to be in video memory.
152 * Returns 0 for success, error for failure.
154 int radeon_gart_table_vram_pin(struct radeon_device *rdev)
159 r = radeon_bo_reserve(rdev->gart.robj, false);
160 if (unlikely(r != 0))
162 r = radeon_bo_pin(rdev->gart.robj,
163 RADEON_GEM_DOMAIN_VRAM, (u64 *)&gpu_addr);
165 radeon_bo_unreserve(rdev->gart.robj);
168 r = radeon_bo_kmap(rdev->gart.robj, &rdev->gart.ptr);
170 radeon_bo_unpin(rdev->gart.robj);
171 radeon_bo_unreserve(rdev->gart.robj);
172 rdev->gart.table_addr = gpu_addr;
177 /* We might have dropped some GART table updates while it wasn't
178 * mapped, restore all entries
180 for (i = 0; i < rdev->gart.num_gpu_pages; i++)
181 radeon_gart_set_page(rdev, i, rdev->gart.pages_entry[i]);
183 radeon_gart_tlb_flush(rdev);
190 * radeon_gart_table_vram_unpin - unpin gart page table in vram
192 * @rdev: radeon_device pointer
194 * Unpin the GART page table in vram (pcie r4xx, r5xx+).
195 * These asics require the gart table to be in video memory.
197 void radeon_gart_table_vram_unpin(struct radeon_device *rdev)
201 if (rdev->gart.robj == NULL) {
204 r = radeon_bo_reserve(rdev->gart.robj, false);
205 if (likely(r == 0)) {
206 radeon_bo_kunmap(rdev->gart.robj);
207 radeon_bo_unpin(rdev->gart.robj);
208 radeon_bo_unreserve(rdev->gart.robj);
209 rdev->gart.ptr = NULL;
214 * radeon_gart_table_vram_free - free gart page table vram
216 * @rdev: radeon_device pointer
218 * Free the video memory used for the GART page table
219 * (pcie r4xx, r5xx+). These asics require the gart table to
220 * be in video memory.
222 void radeon_gart_table_vram_free(struct radeon_device *rdev)
224 if (rdev->gart.robj == NULL) {
227 radeon_bo_unref(&rdev->gart.robj);
231 * Common gart functions.
234 * radeon_gart_unbind - unbind pages from the gart page table
236 * @rdev: radeon_device pointer
237 * @offset: offset into the GPU's gart aperture
238 * @pages: number of pages to unbind
240 * Unbinds the requested pages from the gart page table and
241 * replaces them with the dummy page (all asics).
243 void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
250 if (!rdev->gart.ready) {
251 WARN(1, "trying to unbind memory from uninitialized GART !\n");
254 t = offset / RADEON_GPU_PAGE_SIZE;
255 p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
256 for (i = 0; i < pages; i++, p++) {
257 if (rdev->gart.pages[p]) {
258 rdev->gart.pages[p] = NULL;
259 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
260 rdev->gart.pages_entry[t] = rdev->dummy_page.entry;
261 if (rdev->gart.ptr) {
262 radeon_gart_set_page(rdev, t,
263 rdev->dummy_page.entry);
268 if (rdev->gart.ptr) {
270 radeon_gart_tlb_flush(rdev);
275 * radeon_gart_bind - bind pages into the gart page table
277 * @rdev: radeon_device pointer
278 * @offset: offset into the GPU's gart aperture
279 * @pages: number of pages to bind
280 * @pagelist: pages to bind
281 * @dma_addr: DMA addresses of pages
282 * @flags: RADEON_GART_PAGE_* flags
284 * Binds the requested pages to the gart page table
286 * Returns 0 for success, -EINVAL for failure.
288 int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
289 int pages, vm_page_t *pagelist, dma_addr_t *dma_addr,
294 uint64_t page_base, page_entry;
297 if (!rdev->gart.ready) {
298 WARN(1, "trying to bind memory to uninitialized GART !\n");
301 t = offset / RADEON_GPU_PAGE_SIZE;
302 p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
304 for (i = 0; i < pages; i++, p++) {
305 rdev->gart.pages[p] = pagelist[i];
306 page_base = dma_addr[i];
307 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
308 page_entry = radeon_gart_get_page_entry(page_base, flags);
309 rdev->gart.pages_entry[t] = page_entry;
310 if (rdev->gart.ptr) {
311 radeon_gart_set_page(rdev, t, page_entry);
313 page_base += RADEON_GPU_PAGE_SIZE;
316 if (rdev->gart.ptr) {
318 radeon_gart_tlb_flush(rdev);
324 * radeon_gart_init - init the driver info for managing the gart
326 * @rdev: radeon_device pointer
328 * Allocate the dummy page and init the gart driver info (all asics).
329 * Returns 0 for success, error for failure.
331 int radeon_gart_init(struct radeon_device *rdev)
335 if (rdev->gart.pages) {
338 /* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */
339 if (PAGE_SIZE < RADEON_GPU_PAGE_SIZE) {
340 DRM_ERROR("Page size is smaller than GPU page size!\n");
343 r = radeon_dummy_page_init(rdev);
346 /* Compute table size */
347 rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE;
348 rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE;
349 DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
350 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages);
351 /* Allocate pages table */
352 rdev->gart.pages = kmalloc(sizeof(void *) * rdev->gart.num_cpu_pages,
353 M_DRM, M_ZERO | M_WAITOK);
354 if (rdev->gart.pages == NULL) {
355 radeon_gart_fini(rdev);
358 rdev->gart.pages_entry = kmalloc(sizeof(uint64_t) * rdev->gart.num_gpu_pages,
360 if (rdev->gart.pages_entry == NULL) {
361 radeon_gart_fini(rdev);
364 /* set GART entry to point to the dummy page by default */
365 for (i = 0; i < rdev->gart.num_gpu_pages; i++)
366 rdev->gart.pages_entry[i] = rdev->dummy_page.entry;
371 * radeon_gart_fini - tear down the driver info for managing the gart
373 * @rdev: radeon_device pointer
375 * Tear down the gart driver info and free the dummy page (all asics).
377 void radeon_gart_fini(struct radeon_device *rdev)
379 if (rdev->gart.ready) {
381 radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages);
383 rdev->gart.ready = false;
384 kfree(rdev->gart.pages);
385 kfree(rdev->gart.pages_entry);
386 rdev->gart.pages = NULL;
387 rdev->gart.pages_entry = NULL;
389 radeon_dummy_page_fini(rdev);