2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <linux/dmi.h>
31 #include <linux/i2c.h>
33 #include <drm/drm_atomic_helper.h>
34 #include <drm/drm_crtc.h>
35 #include <drm/drm_edid.h>
36 #include "intel_drv.h"
37 #include <drm/i915_drm.h>
40 /* Private structure for the integrated LVDS support */
41 struct intel_lvds_connector {
42 struct intel_connector base;
44 struct notifier_block lid_notifier;
47 struct intel_lvds_encoder {
48 struct intel_encoder base;
54 struct intel_lvds_connector *attached_connector;
57 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
59 return container_of(encoder, struct intel_lvds_encoder, base.base);
62 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
64 return container_of(connector, struct intel_lvds_connector, base.base);
67 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
70 struct drm_device *dev = encoder->base.dev;
71 struct drm_i915_private *dev_priv = dev->dev_private;
72 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
73 enum intel_display_power_domain power_domain;
77 power_domain = intel_display_port_power_domain(encoder);
78 if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
83 tmp = I915_READ(lvds_encoder->reg);
85 if (!(tmp & LVDS_PORT_EN))
89 *pipe = PORT_TO_PIPE_CPT(tmp);
91 *pipe = PORT_TO_PIPE(tmp);
96 intel_display_power_put(dev_priv, power_domain);
101 static void intel_lvds_get_config(struct intel_encoder *encoder,
102 struct intel_crtc_state *pipe_config)
104 struct drm_device *dev = encoder->base.dev;
105 struct drm_i915_private *dev_priv = dev->dev_private;
106 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
110 tmp = I915_READ(lvds_encoder->reg);
111 if (tmp & LVDS_HSYNC_POLARITY)
112 flags |= DRM_MODE_FLAG_NHSYNC;
114 flags |= DRM_MODE_FLAG_PHSYNC;
115 if (tmp & LVDS_VSYNC_POLARITY)
116 flags |= DRM_MODE_FLAG_NVSYNC;
118 flags |= DRM_MODE_FLAG_PVSYNC;
120 pipe_config->base.adjusted_mode.flags |= flags;
122 /* gen2/3 store dither state in pfit control, needs to match */
123 if (INTEL_INFO(dev)->gen < 4) {
124 tmp = I915_READ(PFIT_CONTROL);
126 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
129 dotclock = pipe_config->port_clock;
131 if (HAS_PCH_SPLIT(dev_priv->dev))
132 ironlake_check_encoder_dotclock(pipe_config, dotclock);
134 pipe_config->base.adjusted_mode.crtc_clock = dotclock;
137 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
139 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
140 struct drm_device *dev = encoder->base.dev;
141 struct drm_i915_private *dev_priv = dev->dev_private;
142 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
143 const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
144 int pipe = crtc->pipe;
147 if (HAS_PCH_SPLIT(dev)) {
148 assert_fdi_rx_pll_disabled(dev_priv, pipe);
149 assert_shared_dpll_disabled(dev_priv,
150 intel_crtc_to_shared_dpll(crtc));
152 assert_pll_disabled(dev_priv, pipe);
155 temp = I915_READ(lvds_encoder->reg);
156 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
158 if (HAS_PCH_CPT(dev)) {
159 temp &= ~PORT_TRANS_SEL_MASK;
160 temp |= PORT_TRANS_SEL_CPT(pipe);
163 temp |= LVDS_PIPEB_SELECT;
165 temp &= ~LVDS_PIPEB_SELECT;
169 /* set the corresponsding LVDS_BORDER bit */
170 temp &= ~LVDS_BORDER_ENABLE;
171 temp |= crtc->config->gmch_pfit.lvds_border_bits;
172 /* Set the B0-B3 data pairs corresponding to whether we're going to
173 * set the DPLLs for dual-channel mode or not.
175 if (lvds_encoder->is_dual_link)
176 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
178 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
180 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
181 * appropriately here, but we need to look more thoroughly into how
182 * panels behave in the two modes. For now, let's just maintain the
183 * value we got from the BIOS.
185 temp &= ~LVDS_A3_POWER_MASK;
186 temp |= lvds_encoder->a3_power;
188 /* Set the dithering flag on LVDS as needed, note that there is no
189 * special lvds dither control bit on pch-split platforms, dithering is
190 * only controlled through the PIPECONF reg. */
191 if (INTEL_INFO(dev)->gen == 4) {
192 /* Bspec wording suggests that LVDS port dithering only exists
193 * for 18bpp panels. */
194 if (crtc->config->dither && crtc->config->pipe_bpp == 18)
195 temp |= LVDS_ENABLE_DITHER;
197 temp &= ~LVDS_ENABLE_DITHER;
199 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
200 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
201 temp |= LVDS_HSYNC_POLARITY;
202 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
203 temp |= LVDS_VSYNC_POLARITY;
205 I915_WRITE(lvds_encoder->reg, temp);
209 * Sets the power state for the panel.
211 static void intel_enable_lvds(struct intel_encoder *encoder)
213 struct drm_device *dev = encoder->base.dev;
214 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
215 struct intel_connector *intel_connector =
216 &lvds_encoder->attached_connector->base;
217 struct drm_i915_private *dev_priv = dev->dev_private;
218 i915_reg_t ctl_reg, stat_reg;
220 if (HAS_PCH_SPLIT(dev)) {
221 ctl_reg = PCH_PP_CONTROL;
222 stat_reg = PCH_PP_STATUS;
224 ctl_reg = PP_CONTROL;
225 stat_reg = PP_STATUS;
228 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
230 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
231 POSTING_READ(lvds_encoder->reg);
232 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
233 DRM_ERROR("timed out waiting for panel to power on\n");
235 intel_panel_enable_backlight(intel_connector);
238 static void intel_disable_lvds(struct intel_encoder *encoder)
240 struct drm_device *dev = encoder->base.dev;
241 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
242 struct drm_i915_private *dev_priv = dev->dev_private;
243 i915_reg_t ctl_reg, stat_reg;
245 if (HAS_PCH_SPLIT(dev)) {
246 ctl_reg = PCH_PP_CONTROL;
247 stat_reg = PCH_PP_STATUS;
249 ctl_reg = PP_CONTROL;
250 stat_reg = PP_STATUS;
253 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
254 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
255 DRM_ERROR("timed out waiting for panel to power off\n");
257 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
258 POSTING_READ(lvds_encoder->reg);
261 static void gmch_disable_lvds(struct intel_encoder *encoder)
263 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
264 struct intel_connector *intel_connector =
265 &lvds_encoder->attached_connector->base;
267 intel_panel_disable_backlight(intel_connector);
269 intel_disable_lvds(encoder);
272 static void pch_disable_lvds(struct intel_encoder *encoder)
274 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
275 struct intel_connector *intel_connector =
276 &lvds_encoder->attached_connector->base;
278 intel_panel_disable_backlight(intel_connector);
281 static void pch_post_disable_lvds(struct intel_encoder *encoder)
283 intel_disable_lvds(encoder);
286 static enum drm_mode_status
287 intel_lvds_mode_valid(struct drm_connector *connector,
288 struct drm_display_mode *mode)
290 struct intel_connector *intel_connector = to_intel_connector(connector);
291 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
292 int max_pixclk = to_i915(connector->dev)->max_dotclk_freq;
294 if (mode->hdisplay > fixed_mode->hdisplay)
296 if (mode->vdisplay > fixed_mode->vdisplay)
298 if (fixed_mode->clock > max_pixclk)
299 return MODE_CLOCK_HIGH;
304 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
305 struct intel_crtc_state *pipe_config)
307 struct drm_device *dev = intel_encoder->base.dev;
308 struct intel_lvds_encoder *lvds_encoder =
309 to_lvds_encoder(&intel_encoder->base);
310 struct intel_connector *intel_connector =
311 &lvds_encoder->attached_connector->base;
312 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
313 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
314 unsigned int lvds_bpp;
316 /* Should never happen!! */
317 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
318 DRM_ERROR("Can't support LVDS on pipe A\n");
322 if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
327 if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
328 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
329 pipe_config->pipe_bpp, lvds_bpp);
330 pipe_config->pipe_bpp = lvds_bpp;
334 * We have timings from the BIOS for the panel, put them in
335 * to the adjusted mode. The CRTC will be set up for this mode,
336 * with the panel scaling set up to source from the H/VDisplay
337 * of the original mode.
339 intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
342 if (HAS_PCH_SPLIT(dev)) {
343 pipe_config->has_pch_encoder = true;
345 intel_pch_panel_fitting(intel_crtc, pipe_config,
346 intel_connector->panel.fitting_mode);
348 intel_gmch_panel_fitting(intel_crtc, pipe_config,
349 intel_connector->panel.fitting_mode);
354 * XXX: It would be nice to support lower refresh rates on the
355 * panels to reduce power consumption, and perhaps match the
356 * user's requested refresh rate.
363 * Detect the LVDS connection.
365 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
366 * connected and closed means disconnected. We also send hotplug events as
367 * needed, using lid status notification from the input layer.
369 static enum drm_connector_status
370 intel_lvds_detect(struct drm_connector *connector, bool force)
372 struct drm_device *dev = connector->dev;
373 enum drm_connector_status status;
375 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
376 connector->base.id, connector->name);
378 status = intel_panel_detect(dev);
379 if (status != connector_status_unknown)
382 return connector_status_connected;
386 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
388 static int intel_lvds_get_modes(struct drm_connector *connector)
390 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
391 struct drm_device *dev = connector->dev;
392 struct drm_display_mode *mode;
394 /* use cached edid if we have one */
395 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
396 return drm_add_edid_modes(connector, lvds_connector->base.edid);
398 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
402 drm_mode_probed_add(connector, mode);
406 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
408 DRM_INFO("Skipping forced modeset for %s\n", id->ident);
412 /* The GPU hangs up on these systems if modeset is performed on LID open */
413 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
415 .callback = intel_no_modeset_on_lid_dmi_callback,
416 .ident = "Toshiba Tecra A11",
418 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
419 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
423 { } /* terminating entry */
428 * Lid events. Note the use of 'modeset':
429 * - we set it to MODESET_ON_LID_OPEN on lid close,
430 * and set it to MODESET_DONE on open
431 * - we use it as a "only once" bit (ie we ignore
432 * duplicate events where it was already properly set)
433 * - the suspend/resume paths will set it to
434 * MODESET_SUSPENDED and ignore the lid open event,
435 * because they restore the mode ("lid open").
437 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
440 struct intel_lvds_connector *lvds_connector =
441 container_of(nb, struct intel_lvds_connector, lid_notifier);
442 struct drm_connector *connector = &lvds_connector->base.base;
443 struct drm_device *dev = connector->dev;
444 struct drm_i915_private *dev_priv = dev->dev_private;
446 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
449 mutex_lock(&dev_priv->modeset_restore_lock);
450 if (dev_priv->modeset_restore == MODESET_SUSPENDED)
453 * check and update the status of LVDS connector after receiving
454 * the LID nofication event.
456 connector->status = connector->funcs->detect(connector, false);
458 /* Don't force modeset on machines where it causes a GPU lockup */
459 if (dmi_check_system(intel_no_modeset_on_lid))
461 if (!acpi_lid_open()) {
462 /* do modeset on next lid open event */
463 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
467 if (dev_priv->modeset_restore == MODESET_DONE)
471 * Some old platform's BIOS love to wreak havoc while the lid is closed.
472 * We try to detect this here and undo any damage. The split for PCH
473 * platforms is rather conservative and a bit arbitrary expect that on
474 * those platforms VGA disabling requires actual legacy VGA I/O access,
475 * and as part of the cleanup in the hw state restore we also redisable
478 if (!HAS_PCH_SPLIT(dev)) {
479 drm_modeset_lock_all(dev);
480 intel_display_resume(dev);
481 drm_modeset_unlock_all(dev);
484 dev_priv->modeset_restore = MODESET_DONE;
487 mutex_unlock(&dev_priv->modeset_restore_lock);
493 * intel_lvds_destroy - unregister and free LVDS structures
494 * @connector: connector to free
496 * Unregister the DDC bus for this connector then free the driver private
499 static void intel_lvds_destroy(struct drm_connector *connector)
501 struct intel_lvds_connector *lvds_connector =
502 to_lvds_connector(connector);
505 if (lvds_connector->lid_notifier.notifier_call)
506 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
509 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
510 kfree(lvds_connector->base.edid);
512 intel_panel_fini(&lvds_connector->base.panel);
514 drm_connector_cleanup(connector);
518 static int intel_lvds_set_property(struct drm_connector *connector,
519 struct drm_property *property,
522 struct intel_connector *intel_connector = to_intel_connector(connector);
523 struct drm_device *dev = connector->dev;
525 if (property == dev->mode_config.scaling_mode_property) {
526 struct drm_crtc *crtc;
528 if (value == DRM_MODE_SCALE_NONE) {
529 DRM_DEBUG_KMS("no scaling not supported\n");
533 if (intel_connector->panel.fitting_mode == value) {
534 /* the LVDS scaling property is not changed */
537 intel_connector->panel.fitting_mode = value;
539 crtc = intel_attached_encoder(connector)->base.crtc;
540 if (crtc && crtc->state->enable) {
542 * If the CRTC is enabled, the display will be changed
543 * according to the new panel fitting mode.
545 intel_crtc_restore_mode(crtc);
552 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
553 .get_modes = intel_lvds_get_modes,
554 .mode_valid = intel_lvds_mode_valid,
555 .best_encoder = intel_best_encoder,
558 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
559 .dpms = drm_atomic_helper_connector_dpms,
560 .detect = intel_lvds_detect,
561 .fill_modes = drm_helper_probe_single_connector_modes,
562 .set_property = intel_lvds_set_property,
563 .atomic_get_property = intel_connector_atomic_get_property,
564 .destroy = intel_lvds_destroy,
565 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
566 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
569 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
570 .destroy = intel_encoder_destroy,
573 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
575 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
579 /* These systems claim to have LVDS, but really don't */
580 static const struct dmi_system_id intel_no_lvds[] = {
582 .callback = intel_no_lvds_dmi_callback,
583 .ident = "Apple Mac Mini (Core series)",
585 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
586 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
590 .callback = intel_no_lvds_dmi_callback,
591 .ident = "Apple Mac Mini (Core 2 series)",
593 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
594 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
598 .callback = intel_no_lvds_dmi_callback,
599 .ident = "MSI IM-945GSE-A",
601 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
602 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
606 .callback = intel_no_lvds_dmi_callback,
607 .ident = "Dell Studio Hybrid",
609 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
610 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
614 .callback = intel_no_lvds_dmi_callback,
615 .ident = "Dell OptiPlex FX170",
617 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
618 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
622 .callback = intel_no_lvds_dmi_callback,
623 .ident = "AOpen Mini PC",
625 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
626 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
630 .callback = intel_no_lvds_dmi_callback,
631 .ident = "AOpen Mini PC MP915",
633 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
634 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
638 .callback = intel_no_lvds_dmi_callback,
639 .ident = "AOpen i915GMm-HFS",
641 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
642 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
646 .callback = intel_no_lvds_dmi_callback,
647 .ident = "AOpen i45GMx-I",
649 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
650 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
654 .callback = intel_no_lvds_dmi_callback,
655 .ident = "Aopen i945GTt-VFA",
657 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
661 .callback = intel_no_lvds_dmi_callback,
662 .ident = "Clientron U800",
664 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
665 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
669 .callback = intel_no_lvds_dmi_callback,
670 .ident = "Clientron E830",
672 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
673 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
677 .callback = intel_no_lvds_dmi_callback,
678 .ident = "Asus EeeBox PC EB1007",
680 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
681 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
685 .callback = intel_no_lvds_dmi_callback,
686 .ident = "Asus AT5NM10T-I",
688 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
689 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
693 .callback = intel_no_lvds_dmi_callback,
694 .ident = "Hewlett-Packard HP t5740",
696 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
697 DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
701 .callback = intel_no_lvds_dmi_callback,
702 .ident = "Hewlett-Packard t5745",
704 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
705 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
709 .callback = intel_no_lvds_dmi_callback,
710 .ident = "Hewlett-Packard st5747",
712 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
713 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
717 .callback = intel_no_lvds_dmi_callback,
718 .ident = "MSI Wind Box DC500",
720 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
721 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
725 .callback = intel_no_lvds_dmi_callback,
726 .ident = "Gigabyte GA-D525TUD",
728 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
729 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
733 .callback = intel_no_lvds_dmi_callback,
734 .ident = "Supermicro X7SPA-H",
736 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
737 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
741 .callback = intel_no_lvds_dmi_callback,
742 .ident = "Fujitsu Esprimo Q900",
744 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
745 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
749 .callback = intel_no_lvds_dmi_callback,
750 .ident = "Intel D410PT",
752 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
753 DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
757 .callback = intel_no_lvds_dmi_callback,
758 .ident = "Intel D425KT",
760 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
761 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
765 .callback = intel_no_lvds_dmi_callback,
766 .ident = "Intel D510MO",
768 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
769 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
773 .callback = intel_no_lvds_dmi_callback,
774 .ident = "Intel D525MW",
776 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
777 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
781 { } /* terminating entry */
785 * Enumerate the child dev array parsed from VBT to check whether
786 * the LVDS is present.
787 * If it is present, return 1.
788 * If it is not present, return false.
789 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
791 static bool lvds_is_present_in_vbt(struct drm_device *dev,
794 struct drm_i915_private *dev_priv = dev->dev_private;
797 if (!dev_priv->vbt.child_dev_num)
800 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
801 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
802 struct old_child_dev_config *child = &uchild->old;
804 /* If the device type is not LFP, continue.
805 * We have to check both the new identifiers as well as the
806 * old for compatibility with some BIOSes.
808 if (child->device_type != DEVICE_TYPE_INT_LFP &&
809 child->device_type != DEVICE_TYPE_LFP)
812 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
813 *i2c_pin = child->i2c_pin;
815 /* However, we cannot trust the BIOS writers to populate
816 * the VBT correctly. Since LVDS requires additional
817 * information from AIM blocks, a non-zero addin offset is
818 * a good indicator that the LVDS is actually present.
820 if (child->addin_offset)
823 /* But even then some BIOS writers perform some black magic
824 * and instantiate the device without reference to any
825 * additional data. Trust that if the VBT was written into
826 * the OpRegion then they have validated the LVDS's existence.
828 if (dev_priv->opregion.vbt)
835 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
837 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
841 static const struct dmi_system_id intel_dual_link_lvds[] = {
843 .callback = intel_dual_link_lvds_callback,
844 .ident = "Apple MacBook Pro 15\" (2010)",
846 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
847 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"),
851 .callback = intel_dual_link_lvds_callback,
852 .ident = "Apple MacBook Pro 15\" (2011)",
854 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
855 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
859 .callback = intel_dual_link_lvds_callback,
860 .ident = "Apple MacBook Pro 15\" (2012)",
862 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
863 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"),
866 { } /* terminating entry */
869 bool intel_is_dual_link_lvds(struct drm_device *dev)
871 struct intel_encoder *encoder;
872 struct intel_lvds_encoder *lvds_encoder;
874 for_each_intel_encoder(dev, encoder) {
875 if (encoder->type == INTEL_OUTPUT_LVDS) {
876 lvds_encoder = to_lvds_encoder(&encoder->base);
878 return lvds_encoder->is_dual_link;
885 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
887 struct drm_device *dev = lvds_encoder->base.base.dev;
889 struct drm_i915_private *dev_priv = dev->dev_private;
891 /* use the module option value if specified */
892 if (i915.lvds_channel_mode > 0)
893 return i915.lvds_channel_mode == 2;
895 /* single channel LVDS is limited to 112 MHz */
896 if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock
900 if (dmi_check_system(intel_dual_link_lvds))
903 /* BIOS should set the proper LVDS register value at boot, but
904 * in reality, it doesn't set the value when the lid is closed;
905 * we need to check "the value to be set" in VBT when LVDS
906 * register is uninitialized.
908 val = I915_READ(lvds_encoder->reg);
909 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
910 val = dev_priv->vbt.bios_lvds_val;
912 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
915 static bool intel_lvds_supported(struct drm_device *dev)
917 /* With the introduction of the PCH we gained a dedicated
918 * LVDS presence pin, use it. */
919 if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
922 /* Otherwise LVDS was only attached to mobile products,
923 * except for the inglorious 830gm */
924 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
931 * intel_lvds_init - setup LVDS connectors on this device
934 * Create the connector, register the LVDS DDC bus, and try to figure out what
935 * modes we can display on the LVDS panel (if present).
937 void intel_lvds_init(struct drm_device *dev)
939 struct drm_i915_private *dev_priv = dev->dev_private;
940 struct intel_lvds_encoder *lvds_encoder;
941 struct intel_encoder *intel_encoder;
942 struct intel_lvds_connector *lvds_connector;
943 struct intel_connector *intel_connector;
944 struct drm_connector *connector;
945 struct drm_encoder *encoder;
946 struct drm_display_mode *scan; /* *modes, *bios_mode; */
947 struct drm_display_mode *fixed_mode = NULL;
948 struct drm_display_mode *downclock_mode = NULL;
950 struct drm_crtc *crtc;
957 * Unlock registers and just leave them unlocked. Do this before
958 * checking quirk lists to avoid bogus WARNINGs.
960 if (HAS_PCH_SPLIT(dev)) {
961 I915_WRITE(PCH_PP_CONTROL,
962 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
963 } else if (INTEL_INFO(dev_priv)->gen < 5) {
964 I915_WRITE(PP_CONTROL,
965 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
967 if (!intel_lvds_supported(dev))
970 /* Skip init on machines we know falsely report LVDS */
971 if (dmi_check_system(intel_no_lvds))
974 if (HAS_PCH_SPLIT(dev))
979 lvds = I915_READ(lvds_reg);
981 if (HAS_PCH_SPLIT(dev)) {
982 if ((lvds & LVDS_DETECTED) == 0)
984 if (dev_priv->vbt.edp_support) {
985 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
990 pin = GMBUS_PIN_PANEL;
991 if (!lvds_is_present_in_vbt(dev, &pin)) {
992 if ((lvds & LVDS_PORT_EN) == 0) {
993 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
996 DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n");
999 /* Set the Panel Power On/Off timings if uninitialized. */
1000 if (INTEL_INFO(dev_priv)->gen < 5 &&
1001 I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
1002 /* Set T2 to 40ms and T5 to 200ms */
1003 I915_WRITE(PP_ON_DELAYS, 0x019007d0);
1005 /* Set T3 to 35ms and Tx to 200ms */
1006 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
1008 DRM_DEBUG_KMS("Panel power timings uninitialized, setting defaults\n");
1011 lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
1015 lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
1016 if (!lvds_connector) {
1017 kfree(lvds_encoder);
1021 if (intel_connector_init(&lvds_connector->base) < 0) {
1022 kfree(lvds_connector);
1023 kfree(lvds_encoder);
1027 lvds_encoder->attached_connector = lvds_connector;
1029 intel_encoder = &lvds_encoder->base;
1030 encoder = &intel_encoder->base;
1031 intel_connector = &lvds_connector->base;
1032 connector = &intel_connector->base;
1033 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
1034 DRM_MODE_CONNECTOR_LVDS);
1036 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
1037 DRM_MODE_ENCODER_LVDS, NULL);
1039 intel_encoder->enable = intel_enable_lvds;
1040 intel_encoder->pre_enable = intel_pre_enable_lvds;
1041 intel_encoder->compute_config = intel_lvds_compute_config;
1042 if (HAS_PCH_SPLIT(dev_priv)) {
1043 intel_encoder->disable = pch_disable_lvds;
1044 intel_encoder->post_disable = pch_post_disable_lvds;
1046 intel_encoder->disable = gmch_disable_lvds;
1048 intel_encoder->get_hw_state = intel_lvds_get_hw_state;
1049 intel_encoder->get_config = intel_lvds_get_config;
1050 intel_connector->get_hw_state = intel_connector_get_hw_state;
1051 intel_connector->unregister = intel_connector_unregister;
1053 intel_connector_attach_encoder(intel_connector, intel_encoder);
1054 intel_encoder->type = INTEL_OUTPUT_LVDS;
1056 intel_encoder->cloneable = 0;
1057 if (HAS_PCH_SPLIT(dev))
1058 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1059 else if (IS_GEN4(dev))
1060 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1062 intel_encoder->crtc_mask = (1 << 1);
1064 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1065 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1066 connector->interlace_allowed = false;
1067 connector->doublescan_allowed = false;
1069 lvds_encoder->reg = lvds_reg;
1071 /* create the scaling mode property */
1072 drm_mode_create_scaling_mode_property(dev);
1073 drm_object_attach_property(&connector->base,
1074 dev->mode_config.scaling_mode_property,
1075 DRM_MODE_SCALE_ASPECT);
1076 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1079 * 1) check for EDID on DDC
1080 * 2) check for VBT data
1081 * 3) check to see if LVDS is already on
1082 * if none of the above, no panel
1083 * 4) make sure lid is open
1084 * if closed, act like it's not there for now
1088 * Attempt to get the fixed panel mode from DDC. Assume that the
1089 * preferred mode is the right one.
1091 mutex_lock(&dev->mode_config.mutex);
1092 edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1094 if (drm_add_edid_modes(connector, edid)) {
1095 drm_mode_connector_update_edid_property(connector,
1099 edid = ERR_PTR(-EINVAL);
1102 edid = ERR_PTR(-ENOENT);
1104 lvds_connector->base.edid = edid;
1106 if (IS_ERR_OR_NULL(edid)) {
1107 /* Didn't get an EDID, so
1108 * Set wide sync ranges so we get all modes
1109 * handed to valid_mode for checking
1111 connector->display_info.min_vfreq = 0;
1112 connector->display_info.max_vfreq = 200;
1113 connector->display_info.min_hfreq = 0;
1114 connector->display_info.max_hfreq = 200;
1117 list_for_each_entry(scan, &connector->probed_modes, head) {
1118 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1119 DRM_DEBUG_KMS("using preferred mode from EDID: ");
1120 drm_mode_debug_printmodeline(scan);
1122 fixed_mode = drm_mode_duplicate(dev, scan);
1128 /* Failed to get EDID, what about VBT? */
1129 if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1130 DRM_DEBUG_KMS("using mode from VBT: ");
1131 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1133 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1135 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1141 * If we didn't get EDID, try checking if the panel is already turned
1142 * on. If so, assume that whatever is currently programmed is the
1146 /* Ironlake: FIXME if still fail, not try pipe mode now */
1147 if (HAS_PCH_SPLIT(dev))
1150 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1151 crtc = intel_get_crtc_for_pipe(dev, pipe);
1153 if (crtc && (lvds & LVDS_PORT_EN)) {
1154 fixed_mode = intel_crtc_mode_get(dev, crtc);
1156 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1157 drm_mode_debug_printmodeline(fixed_mode);
1158 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1163 /* If we still don't have a mode after all that, give up. */
1168 mutex_unlock(&dev->mode_config.mutex);
1170 intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
1172 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1173 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1174 lvds_encoder->is_dual_link ? "dual" : "single");
1176 lvds_encoder->a3_power = lvds & LVDS_A3_POWER_MASK;
1179 lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1180 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1181 DRM_DEBUG_KMS("lid notifier registration failed\n");
1182 lvds_connector->lid_notifier.notifier_call = NULL;
1184 drm_connector_register(connector);
1187 intel_panel_setup_backlight(connector, INVALID_PIPE);
1192 mutex_unlock(&dev->mode_config.mutex);
1194 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1195 drm_connector_cleanup(connector);
1196 drm_encoder_cleanup(encoder);
1197 kfree(lvds_encoder);
1198 kfree(lvds_connector);