2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1993 The Regents of the University of California.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by the University of
17 * California, Berkeley and its contributors.
18 * 4. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * $FreeBSD: src/sys/amd64/include/cpufunc.h,v 1.139 2004/01/28 23:53:04 peter Exp $
35 * $DragonFly: src/sys/amd64/include/Attic/cpufunc.h,v 1.2 2005/05/07 16:22:42 corecode Exp $
39 * Functions to provide access to special i386 instructions.
40 * This in included in sys/systm.h, and that file should be
41 * used in preference to this.
44 #ifndef _MACHINE_CPUFUNC_H_
45 #define _MACHINE_CPUFUNC_H_
47 #include <sys/cdefs.h>
48 #include <machine/psl.h>
51 struct region_descriptor;
54 #define readb(va) (*(volatile u_int8_t *) (va))
55 #define readw(va) (*(volatile u_int16_t *) (va))
56 #define readl(va) (*(volatile u_int32_t *) (va))
57 #define readq(va) (*(volatile u_int64_t *) (va))
59 #define writeb(va, d) (*(volatile u_int8_t *) (va) = (d))
60 #define writew(va, d) (*(volatile u_int16_t *) (va) = (d))
61 #define writel(va, d) (*(volatile u_int32_t *) (va) = (d))
62 #define writeq(va, d) (*(volatile u_int64_t *) (va) = (d))
69 __asm __volatile("int $3");
77 __asm __volatile("bsfl %1,%0" : "=r" (result) : "rm" (mask));
81 static __inline u_long
86 __asm __volatile("bsfq %1,%0" : "=r" (result) : "rm" (mask));
95 __asm __volatile("bsrl %1,%0" : "=r" (result) : "rm" (mask));
99 static __inline u_long
104 __asm __volatile("bsrq %1,%0" : "=r" (result) : "rm" (mask));
111 __asm __volatile("cli" : : : "memory");
115 do_cpuid(u_int ax, u_int *p)
117 __asm __volatile("cpuid"
118 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3])
125 __asm __volatile("sti");
130 #define HAVE_INLINE_FFS
137 * Note that gcc-2's builtin ffs would be used if we didn't declare
138 * this inline or turn off the builtin. The builtin is faster but
139 * broken in gcc-2.4.5 and slower but working in gcc-2.5 and later
142 return (mask == 0 ? mask : (int)bsfl((u_int)mask) + 1);
144 /* Actually, the above is way out of date. The builtins use cmov etc */
145 return (__builtin_ffs(mask));
149 #define HAVE_INLINE_FFSL
154 return (mask == 0 ? mask : (int)bsfq((u_long)mask) + 1);
157 #define HAVE_INLINE_FLS
162 return (mask == 0 ? mask : (int)bsrl((u_int)mask) + 1);
165 #define HAVE_INLINE_FLSL
170 return (mask == 0 ? mask : (int)bsrq((u_long)mask) + 1);
178 __asm __volatile("hlt");
183 #define inb(port) inbv(port)
184 #define outb(port, data) outbv(port, data)
186 #else /* __GNUC >= 2 */
189 * The following complications are to get around gcc not having a
190 * constraint letter for the range 0..255. We still put "d" in the
191 * constraint because "i" isn't a valid constraint when the port
192 * isn't constant. This only matters for -O0 because otherwise
193 * the non-working version gets optimized away.
195 * Use an expression-statement instead of a conditional expression
196 * because gcc-2.6.0 would promote the operands of the conditional
197 * and produce poor code for "if ((inb(var) & const1) == const2)".
199 * The unnecessary test `(port) < 0x10000' is to generate a warning if
200 * the `port' has type u_short or smaller. Such types are pessimal.
201 * This actually only works for signed types. The range check is
202 * careful to avoid generating warnings.
204 #define inb(port) __extension__ ({ \
206 if (__builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \
207 && (port) < 0x10000) \
208 _data = inbc(port); \
210 _data = inbv(port); \
213 #define outb(port, data) ( \
214 __builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \
215 && (port) < 0x10000 \
216 ? outbc(port, data) : outbv(port, data))
218 static __inline u_char
223 __asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port)));
228 outbc(u_int port, u_char data)
230 __asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port)));
233 #endif /* __GNUC <= 2 */
235 static __inline u_char
240 * We use %%dx and not %1 here because i/o is done at %dx and not at
241 * %edx, while gcc generates inferior code (movw instead of movl)
242 * if we tell it to load (u_short) port.
244 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
248 static __inline u_int
253 __asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port));
258 insb(u_int port, void *addr, size_t cnt)
260 __asm __volatile("cld; rep; insb"
261 : "+D" (addr), "+c" (cnt)
267 insw(u_int port, void *addr, size_t cnt)
269 __asm __volatile("cld; rep; insw"
270 : "+D" (addr), "+c" (cnt)
276 insl(u_int port, void *addr, size_t cnt)
278 __asm __volatile("cld; rep; insl"
279 : "+D" (addr), "+c" (cnt)
287 __asm __volatile("invd");
290 static __inline u_short
295 __asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port));
300 outbv(u_int port, u_char data)
304 * Use an unnecessary assignment to help gcc's register allocator.
305 * This make a large difference for gcc-1.40 and a tiny difference
306 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
307 * best results. gcc-2.6.0 can't handle this.
310 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
314 outl(u_int port, u_int data)
317 * outl() and outw() aren't used much so we haven't looked at
318 * possible micro-optimizations such as the unnecessary
319 * assignment for them.
321 __asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port));
325 outsb(u_int port, const void *addr, size_t cnt)
327 __asm __volatile("cld; rep; outsb"
328 : "+S" (addr), "+c" (cnt)
333 outsw(u_int port, const void *addr, size_t cnt)
335 __asm __volatile("cld; rep; outsw"
336 : "+S" (addr), "+c" (cnt)
341 outsl(u_int port, const void *addr, size_t cnt)
343 __asm __volatile("cld; rep; outsl"
344 : "+S" (addr), "+c" (cnt)
349 outw(u_int port, u_short data)
351 __asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port));
357 __asm __volatile("pause");
360 static __inline u_long
365 __asm __volatile("pushfq; popq %0" : "=r" (rf));
369 static __inline u_int64_t
374 __asm __volatile("rdmsr" : "=a" (low), "=d" (high) : "c" (msr));
375 return (low | ((u_int64_t)high << 32));
378 static __inline u_int64_t
383 __asm __volatile("rdpmc" : "=a" (low), "=d" (high) : "c" (pmc));
384 return (low | ((u_int64_t)high << 32));
387 static __inline u_int64_t
392 __asm __volatile("rdtsc" : "=a" (low), "=d" (high));
393 return (low | ((u_int64_t)high << 32));
399 __asm __volatile("wbinvd");
403 write_rflags(u_long rf)
405 __asm __volatile("pushq %0; popfq" : : "r" (rf));
409 wrmsr(u_int msr, u_int64_t newval)
415 __asm __volatile("wrmsr" : : "a" (low), "d" (high), "c" (msr));
419 load_cr0(u_long data)
422 __asm __volatile("movq %0,%%cr0" : : "r" (data));
425 static __inline u_long
430 __asm __volatile("movq %%cr0,%0" : "=r" (data));
434 static __inline u_long
439 __asm __volatile("movq %%cr2,%0" : "=r" (data));
444 load_cr3(u_long data)
447 __asm __volatile("movq %0,%%cr3" : : "r" (data) : "memory");
450 static __inline u_long
455 __asm __volatile("movq %%cr3,%0" : "=r" (data));
460 load_cr4(u_long data)
462 __asm __volatile("movq %0,%%cr4" : : "r" (data));
465 static __inline u_long
470 __asm __volatile("movq %%cr4,%0" : "=r" (data));
475 * Global TLB flush (except for thise for pages marked PG_G)
485 * TLB flush for an individual page (even if it has PG_G).
486 * Only works on 486+ CPUs (i386 does not have PG_G).
492 __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
495 static __inline u_int
499 __asm __volatile("movl %%fs,%0" : "=rm" (sel));
503 static __inline u_int
507 __asm __volatile("movl %%gs,%0" : "=rm" (sel));
514 __asm __volatile("movl %0,%%ds" : : "rm" (sel));
520 __asm __volatile("movl %0,%%es" : : "rm" (sel));
524 /* This is defined in <machine/specialreg.h> but is too painful to get to */
526 #define MSR_FSBASE 0xc0000100
531 register u_int32_t fsbase __asm("ecx");
533 /* Preserve the fsbase value across the selector load */
535 __asm __volatile("rdmsr; movl %0,%%fs; wrmsr"
536 : : "rm" (sel), "c" (fsbase) : "eax", "edx");
540 #define MSR_GSBASE 0xc0000101
545 register u_int32_t gsbase __asm("ecx");
548 * Preserve the gsbase value across the selector load.
549 * Note that we have to disable interrupts because the gsbase
550 * being trashed happens to be the kernel gsbase at the time.
553 __asm __volatile("pushfq; cli; rdmsr; movl %0,%%gs; wrmsr; popfq"
554 : : "rm" (sel), "c" (gsbase) : "eax", "edx");
557 /* Usable by userland */
561 __asm __volatile("movl %0,%%fs" : : "rm" (sel));
567 __asm __volatile("movl %0,%%gs" : : "rm" (sel));
571 /* void lidt(struct region_descriptor *addr); */
573 lidt(struct region_descriptor *addr)
575 __asm __volatile("lidt (%0)" : : "r" (addr));
578 /* void lldt(u_short sel); */
582 __asm __volatile("lldt %0" : : "r" (sel));
585 /* void ltr(u_short sel); */
589 __asm __volatile("ltr %0" : : "r" (sel));
592 static __inline u_int64_t
596 __asm __volatile("movq %%dr0,%0" : "=r" (data));
601 load_dr0(u_int64_t dr0)
603 __asm __volatile("movq %0,%%dr0" : : "r" (dr0));
606 static __inline u_int64_t
610 __asm __volatile("movq %%dr1,%0" : "=r" (data));
615 load_dr1(u_int64_t dr1)
617 __asm __volatile("movq %0,%%dr1" : : "r" (dr1));
620 static __inline u_int64_t
624 __asm __volatile("movq %%dr2,%0" : "=r" (data));
629 load_dr2(u_int64_t dr2)
631 __asm __volatile("movq %0,%%dr2" : : "r" (dr2));
634 static __inline u_int64_t
638 __asm __volatile("movq %%dr3,%0" : "=r" (data));
643 load_dr3(u_int64_t dr3)
645 __asm __volatile("movq %0,%%dr3" : : "r" (dr3));
648 static __inline u_int64_t
652 __asm __volatile("movq %%dr4,%0" : "=r" (data));
657 load_dr4(u_int64_t dr4)
659 __asm __volatile("movq %0,%%dr4" : : "r" (dr4));
662 static __inline u_int64_t
666 __asm __volatile("movq %%dr5,%0" : "=r" (data));
671 load_dr5(u_int64_t dr5)
673 __asm __volatile("movq %0,%%dr5" : : "r" (dr5));
676 static __inline u_int64_t
680 __asm __volatile("movq %%dr6,%0" : "=r" (data));
685 load_dr6(u_int64_t dr6)
687 __asm __volatile("movq %0,%%dr6" : : "r" (dr6));
690 static __inline u_int64_t
694 __asm __volatile("movq %%dr7,%0" : "=r" (data));
699 load_dr7(u_int64_t dr7)
701 __asm __volatile("movq %0,%%dr7" : : "r" (dr7));
704 static __inline register_t
709 rflags = read_rflags();
715 intr_restore(register_t rflags)
717 write_rflags(rflags);
720 #else /* !__GNUC__ */
722 int breakpoint(void);
723 u_int bsfl(u_int mask);
724 u_int bsrl(u_int mask);
725 void cpu_invlpg(u_long addr);
726 void cpu_invlpg_range(u_long start, u_long end);
727 void disable_intr(void);
728 void do_cpuid(u_int ax, u_int *p);
729 void enable_intr(void);
731 u_char inb(u_int port);
732 u_int inl(u_int port);
733 void insb(u_int port, void *addr, size_t cnt);
734 void insl(u_int port, void *addr, size_t cnt);
735 void insw(u_int port, void *addr, size_t cnt);
737 void invlpg(u_int addr);
738 void invlpg_range(u_int start, u_int end);
740 u_short inw(u_int port);
741 void load_cr0(u_int cr0);
742 void load_cr3(u_int cr3);
743 void load_cr4(u_int cr4);
744 void load_fs(u_int sel);
745 void load_gs(u_int sel);
746 struct region_descriptor;
747 void lidt(struct region_descriptor *addr);
748 void lldt(u_short sel);
749 void ltr(u_short sel);
750 void outb(u_int port, u_char data);
751 void outl(u_int port, u_int data);
752 void outsb(u_int port, void *addr, size_t cnt);
753 void outsl(u_int port, void *addr, size_t cnt);
754 void outsw(u_int port, void *addr, size_t cnt);
755 void outw(u_int port, u_short data);
756 void ia32_pause(void);
763 u_int64_t rdmsr(u_int msr);
764 u_int64_t rdpmc(u_int pmc);
765 u_int64_t rdtsc(void);
766 u_int read_rflags(void);
768 void write_rflags(u_int rf);
769 void wrmsr(u_int msr, u_int64_t newval);
770 u_int64_t rdr0(void);
771 void load_dr0(u_int64_t dr0);
772 u_int64_t rdr1(void);
773 void load_dr1(u_int64_t dr1);
774 u_int64_t rdr2(void);
775 void load_dr2(u_int64_t dr2);
776 u_int64_t rdr3(void);
777 void load_dr3(u_int64_t dr3);
778 u_int64_t rdr4(void);
779 void load_dr4(u_int64_t dr4);
780 u_int64_t rdr5(void);
781 void load_dr5(u_int64_t dr5);
782 u_int64_t rdr6(void);
783 void load_dr6(u_int64_t dr6);
784 u_int64_t rdr7(void);
785 void load_dr7(u_int64_t dr7);
786 register_t intr_disable(void);
787 void intr_restore(register_t rf);
789 #endif /* __GNUC__ */
791 void reset_dbregs(void);
795 #endif /* !_MACHINE_CPUFUNC_H_ */