1 .\" Copyright (c) 1996-1998 Greg Ungerer (gerg@stallion.oz.au).
2 .\" All rights reserved.
4 .\" Redistribution and use in source and binary forms, with or without
5 .\" modification, are permitted provided that the following conditions
7 .\" 1. Redistributions of source code must retain the above copyright
8 .\" notice, this list of conditions and the following disclaimer.
9 .\" 2. Redistributions in binary form must reproduce the above copyright
10 .\" notice, this list of conditions and the following disclaimer in the
11 .\" documentation and/or other materials provided with the distribution.
12 .\" 3. All advertising materials mentioning features or use of this software
13 .\" must display the following acknowledgement:
14 .\" This product includes software developed by Greg Ungerer.
15 .\" 4. Neither the name of the author nor the names of any co-contributors
16 .\" may be used to endorse or promote products derived from this software
17 .\" without specific prior written permission.
19 .\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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23 .\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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31 .\" $FreeBSD: src/usr.sbin/stallion/stlstty/stlstty.8,v 1.1.2.3 2001/12/21 09:51:30 ru Exp $
32 .\" $DragonFly: src/usr.sbin/stallion/stlstty/stlstty.8,v 1.2 2003/06/17 04:30:03 dillon Exp $
39 .Nd "Stallion Technologies multiport serial port enhanced switches"
46 is used to view and set the advanced driver switches available on
47 Stallion Technologies multiport serial ports.
49 The advanced switches configurable through
51 are only available on the intelligent boards of the Stallion
52 Technologies multiport serial board range.
53 This includes the EasyConnection 8/64 (ISA and EISA),
54 ONboard and Brumby boards.
55 The switches are not available on the EasyIO, EasyConnection 8/32
56 and EasyConnection 8/64-PCI boards.
58 If no switch settings are listed on the
60 command line then it will display the current setting of all switches
63 If one or more switches is listed on the
65 command line then those switches will be set accordingly.
68 .Bl -tag -width indent
70 Output usage information.
72 Output version information.
75 All switches are enabled by using the switch name as a parameter
78 To disable a setting use a
80 character in front of the switch name.
82 All switches configurable by
84 are persistent through opens and closes of the port.
85 Once a switch is set it will remain set until changed using
87 or by a reboot of the board or system.
89 The following switches are configurable through
91 .Bl -tag -width indent
92 .It Cm maprts Pq Fl maprts
93 Maps the functionality normally associated with the DTR pin to
94 action on the RTS pin instead.
95 So in other words the RTS pin will now act as if it were the DTR pin.
96 This is useful for boards that have ports that do not have full
97 modem signaling on their connector (e.g. ONboard 16).
98 .It Cm mapcts Pq Fl mapcts
99 Maps the functionality normally associated with the DCD pin to
100 be actioned on the CTS pin.
101 So in other words the CTS pin will now act as if it were the DCD pin.
102 This is useful for boards that have ports that do not have full
103 modem signaling on their connector (e.g. ONboard 16).
104 .It Cm rtslock Pq Fl rtslock
105 Locks RTS based flow control on this port on.
106 No matter what the port flow control is configured to be via
109 program, RTS based (hardware) flow control will be active on
111 .It Cm ctslock Pq Fl ctslock
112 Locks CTS based flow control on this port on.
113 No matter what the port flow control is configured to be via
116 program, CTS based (hardware) flow control will be active on
118 .It Cm loopback Pq Fl loopback
119 Enables the internal loopback mode of the port UART.
120 All data transmitted on this port will be received,
121 and none will physically be transmitted by the port.
122 .It Cm fakedcd Pq Fl fakedcd
123 The DCD pin will always be reported as being asserted,
124 regardless of the physical state of the hardware pin.
125 .It Cm dtrfollow Pq Fl dtrfollow
126 The DTR signal will only be asserted when data is being
127 transmitted from the port.
128 This is useful in conjunction with the EasyConnection
129 Dual Interface module when fitted with RS-485 line drivers.
130 .It Cm rximin Pq Fl rximin
131 Disables (or enables) the slave processor's received character
134 By default the slave processor will bunch up received data,
135 so that it can be sent to the host in large chunks.
136 This increases the time it takes for any individual character
137 to be seen by an application.
138 This may be undesirable for latency sensitive applications or
140 To reduce received character latency the
142 switch should be turned on.
143 .It Cm rxitime Pq Fl rxitime
144 Disables (or enables) the slave processor's received character
146 This timer is used as part of the slave processor's data
149 By turning this switch on the timer is reduced to a minimum,
150 so that received data will immediately be sent to the host system.
151 .It Cm rxthold Pq Fl rxthold
152 Disables the UART received FIFO for this port.
153 By default the UART received FIFO is programmed to a reasonably
154 high level, to minimize CPU overhead.
155 Some third party serial devices do not respond quickly to flow
156 control signals (hardware or software) and this may cause the
157 UART's received FIFO to over-run - thus losing data.
158 Turning this switch on disables use of the received FIFO.
165 This program was originally developed by
166 .An Greg Ungerer Aq gerg@stallion.com .