2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
39 * $DragonFly: src/sys/i386/i386/Attic/machdep.c,v 1.99 2006/10/20 17:02:19 dillon Exp $
43 #include "use_ether.h"
46 #include "opt_atalk.h"
47 #include "opt_compat.h"
50 #include "opt_directio.h"
53 #include "opt_maxmem.h"
54 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
57 #include "opt_userconfig.h"
59 #include <sys/param.h>
60 #include <sys/systm.h>
61 #include <sys/sysproto.h>
62 #include <sys/signalvar.h>
63 #include <sys/kernel.h>
64 #include <sys/linker.h>
65 #include <sys/malloc.h>
68 #include <sys/reboot.h>
70 #include <sys/msgbuf.h>
71 #include <sys/sysent.h>
72 #include <sys/sysctl.h>
73 #include <sys/vmmeter.h>
75 #include <sys/upcall.h>
76 #include <sys/usched.h>
79 #include <vm/vm_param.h>
81 #include <vm/vm_kern.h>
82 #include <vm/vm_object.h>
83 #include <vm/vm_page.h>
84 #include <vm/vm_map.h>
85 #include <vm/vm_pager.h>
86 #include <vm/vm_extern.h>
88 #include <sys/thread2.h>
96 #include <machine/cpu.h>
97 #include <machine/reg.h>
98 #include <machine/clock.h>
99 #include <machine/specialreg.h>
100 #include <machine/bootinfo.h>
101 #include <machine/ipl.h>
102 #include <machine/md_var.h>
103 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
104 #include <machine/globaldata.h> /* CPU_prvspace */
105 #include <machine/smp.h>
107 #include <machine/perfmon.h>
109 #include <machine/cputypes.h>
112 #include <bus/isa/i386/isa_device.h>
114 #include <i386/isa/intr_machdep.h>
115 #include <bus/isa/rtc.h>
116 #include <machine/vm86.h>
117 #include <sys/random.h>
118 #include <sys/ptrace.h>
119 #include <machine/sigframe.h>
121 #define PHYSMAP_ENTRIES 10
123 extern void init386 (int first);
124 extern void dblfault_handler (void);
126 extern void printcpuinfo(void); /* XXX header file */
127 extern void finishidentcpu(void);
128 extern void panicifcpuunsupported(void);
129 extern void initializecpu(void);
131 static void cpu_startup (void *);
132 #ifndef CPU_DISABLE_SSE
133 static void set_fpregs_xmm (struct save87 *, struct savexmm *);
134 static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
135 #endif /* CPU_DISABLE_SSE */
137 extern void ffs_rawread_setup(void);
138 #endif /* DIRECTIO */
139 static void init_locks(void);
141 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
143 int _udatasel, _ucodesel;
146 int64_t tsc_offsets[MAXCPU];
148 int64_t tsc_offsets[1];
151 #if defined(SWTCH_OPTIM_STATS)
152 extern int swtch_optim_stats;
153 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
154 CTLFLAG_RD, &swtch_optim_stats, 0, "");
155 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
156 CTLFLAG_RD, &tlb_flush_count, 0, "");
163 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
165 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
169 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
170 0, 0, sysctl_hw_physmem, "IU", "");
173 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
175 int error = sysctl_handle_int(oidp, 0,
176 ctob(physmem - vmstats.v_wire_count), req);
180 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
181 0, 0, sysctl_hw_usermem, "IU", "");
184 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
186 int error = sysctl_handle_int(oidp, 0,
187 i386_btop(avail_end - avail_start), req);
191 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
192 0, 0, sysctl_hw_availpages, "I", "");
195 sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
199 /* Unwind the buffer, so that it's linear (possibly starting with
200 * some initial nulls).
202 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
203 msgbufp->msg_size-msgbufp->msg_bufr,req);
204 if(error) return(error);
205 if(msgbufp->msg_bufr>0) {
206 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
207 msgbufp->msg_bufr,req);
212 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
213 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
215 static int msgbuf_clear;
218 sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
221 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
223 if (!error && req->newptr) {
224 /* Clear the buffer and reset write pointer */
225 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
226 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
232 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
233 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
234 "Clear kernel message buffer");
237 vm_paddr_t Maxmem = 0;
240 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
242 static vm_offset_t buffer_sva, buffer_eva;
243 vm_offset_t clean_sva, clean_eva;
244 static vm_offset_t pager_sva, pager_eva;
245 static struct trapframe proc0_tf;
248 cpu_startup(void *dummy)
256 if (boothowto & RB_VERBOSE)
260 * Good {morning,afternoon,evening,night}.
262 printf("%s", version);
265 panicifcpuunsupported();
269 printf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
271 * Display any holes after the first chunk of extended memory.
276 printf("Physical memory chunk(s):\n");
277 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
278 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
280 printf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
281 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
287 * Allocate space for system data structures.
288 * The first available kernel virtual address is in "v".
289 * As pages of kernel virtual memory are allocated, "v" is incremented.
290 * As pages of memory are allocated and cleared,
291 * "firstaddr" is incremented.
292 * An index into the kernel page table corresponding to the
293 * virtual memory address maintained in "v" is kept in "mapaddr".
297 * Make two passes. The first pass calculates how much memory is
298 * needed and allocates it. The second pass assigns virtual
299 * addresses to the various data structures.
303 v = (caddr_t)firstaddr;
305 #define valloc(name, type, num) \
306 (name) = (type *)v; v = (caddr_t)((name)+(num))
307 #define valloclim(name, type, num, lim) \
308 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
311 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
312 * For the first 64MB of ram nominally allocate sufficient buffers to
313 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
314 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
315 * the buffer cache we limit the eventual kva reservation to
318 * factor represents the 1/4 x ram conversion.
321 int factor = 4 * BKVASIZE / 1024;
322 int kbytes = physmem * (PAGE_SIZE / 1024);
326 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
328 nbuf += (kbytes - 65536) * 2 / (factor * 5);
329 if (maxbcache && nbuf > maxbcache / BKVASIZE)
330 nbuf = maxbcache / BKVASIZE;
334 * Do not allow the buffer_map to be more then 1/2 the size of the
337 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
339 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
341 printf("Warning: nbufs capped at %d\n", nbuf);
344 nswbuf = max(min(nbuf/4, 256), 16);
346 if (nswbuf < NSWBUF_MIN)
353 valloc(swbuf, struct buf, nswbuf);
354 valloc(buf, struct buf, nbuf);
357 * End of first pass, size has been calculated so allocate memory
359 if (firstaddr == 0) {
360 size = (vm_size_t)(v - firstaddr);
361 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
363 panic("startup: no room for tables");
368 * End of second pass, addresses have been assigned
370 if ((vm_size_t)(v - firstaddr) != size)
371 panic("startup: table size inconsistency");
373 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
374 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
375 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
377 buffer_map->system_map = 1;
378 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
379 (nswbuf*MAXPHYS) + pager_map_size);
380 pager_map->system_map = 1;
381 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
382 (16*(ARG_MAX+(PAGE_SIZE*3))));
384 #if defined(USERCONFIG)
386 cninit(); /* the preferred console may have changed */
389 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
390 ptoa(vmstats.v_free_count) / 1024);
393 * Set up buffers, so they can be used to read disk labels.
396 vm_pager_bufferinit();
400 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
402 mp_start(); /* fire up the APs and APICs */
409 * Send an interrupt to process.
411 * Stack is set up to allow sigcode stored
412 * at top to call routine, followed by kcall
413 * to sigreturn routine below. After sigreturn
414 * resets the signal mask, the stack, and the
415 * frame pointer, it returns to the user
419 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
421 struct lwp *lp = curthread->td_lwp;
422 struct proc *p = lp->lwp_proc;
423 struct trapframe *regs;
424 struct sigacts *psp = p->p_sigacts;
425 struct sigframe sf, *sfp;
428 regs = lp->lwp_md.md_regs;
429 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
431 /* save user context */
432 bzero(&sf, sizeof(struct sigframe));
433 sf.sf_uc.uc_sigmask = *mask;
434 sf.sf_uc.uc_stack = lp->lwp_sigstk;
435 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
436 sf.sf_uc.uc_mcontext.mc_gs = rgs();
437 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
439 /* Allocate and validate space for the signal handler context. */
441 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
442 SIGISMEMBER(psp->ps_sigonstack, sig)) {
443 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
444 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
445 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
448 sfp = (struct sigframe *)regs->tf_esp - 1;
450 /* Translate the signal is appropriate */
451 if (p->p_sysent->sv_sigtbl) {
452 if (sig <= p->p_sysent->sv_sigsize)
453 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
456 /* Build the argument list for the signal handler. */
458 sf.sf_ucontext = (register_t)&sfp->sf_uc;
459 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
460 /* Signal handler installed with SA_SIGINFO. */
461 sf.sf_siginfo = (register_t)&sfp->sf_si;
462 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
464 /* fill siginfo structure */
465 sf.sf_si.si_signo = sig;
466 sf.sf_si.si_code = code;
467 sf.sf_si.si_addr = (void*)regs->tf_err;
470 /* Old FreeBSD-style arguments. */
471 sf.sf_siginfo = code;
472 sf.sf_addr = regs->tf_err;
473 sf.sf_ahu.sf_handler = catcher;
477 * If we're a vm86 process, we want to save the segment registers.
478 * We also change eflags to be our emulated eflags, not the actual
481 if (regs->tf_eflags & PSL_VM) {
482 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
483 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
485 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
486 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
487 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
488 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
490 if (vm86->vm86_has_vme == 0)
491 sf.sf_uc.uc_mcontext.mc_eflags =
492 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
493 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
496 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
497 * syscalls made by the signal handler. This just avoids
498 * wasting time for our lazy fixup of such faults. PSL_NT
499 * does nothing in vm86 mode, but vm86 programs can set it
500 * almost legitimately in probes for old cpu types.
502 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
506 * Copy the sigframe out to the user's stack.
508 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
510 * Something is wrong with the stack pointer.
511 * ...Kill the process.
516 regs->tf_esp = (int)sfp;
517 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
518 regs->tf_eflags &= ~PSL_T;
519 regs->tf_cs = _ucodesel;
520 regs->tf_ds = _udatasel;
521 regs->tf_es = _udatasel;
522 regs->tf_fs = _udatasel;
523 regs->tf_ss = _udatasel;
527 * Sanitize the trapframe for a virtual kernel passing control to a custom
530 * Allow userland to set or maintain PSL_RF, the resume flag. This flag
531 * basically controls whether the return PC should skip the first instruction
532 * (as in an explicit system call) or re-execute it (as in an exception).
535 cpu_sanitize_frame(struct trapframe *frame)
537 frame->tf_cs = _ucodesel;
538 frame->tf_ds = _udatasel;
539 frame->tf_es = _udatasel;
540 frame->tf_fs = _udatasel;
541 frame->tf_ss = _udatasel;
542 frame->tf_eflags &= (PSL_USER | PSL_RF);
543 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
548 * sigreturn(ucontext_t *sigcntxp)
550 * System call to cleanup state after a signal
551 * has been taken. Reset signal mask and
552 * stack state from context left by sendsig (above).
553 * Return to previous pc and psl as specified by
554 * context left by sendsig. Check carefully to
555 * make sure that the user has not modified the
556 * state to gain improper privileges.
558 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
559 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
562 sys_sigreturn(struct sigreturn_args *uap)
564 struct lwp *lp = curthread->td_lwp;
565 struct trapframe *regs;
571 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
574 regs = lp->lwp_md.md_regs;
575 eflags = ucp->uc_mcontext.mc_eflags;
577 if (eflags & PSL_VM) {
578 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
579 struct vm86_kernel *vm86;
582 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
583 * set up the vm86 area, and we can't enter vm86 mode.
585 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
587 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
588 if (vm86->vm86_inited == 0)
591 /* go back to user mode if both flags are set */
592 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
593 trapsignal(lp->lwp_proc, SIGBUS, 0);
595 if (vm86->vm86_has_vme) {
596 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
597 (eflags & VME_USERCHANGE) | PSL_VM;
599 vm86->vm86_eflags = eflags; /* save VIF, VIP */
600 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
602 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
603 tf->tf_eflags = eflags;
604 tf->tf_vm86_ds = tf->tf_ds;
605 tf->tf_vm86_es = tf->tf_es;
606 tf->tf_vm86_fs = tf->tf_fs;
607 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
608 tf->tf_ds = _udatasel;
609 tf->tf_es = _udatasel;
610 tf->tf_fs = _udatasel;
613 * Don't allow users to change privileged or reserved flags.
616 * XXX do allow users to change the privileged flag PSL_RF.
617 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
618 * should sometimes set it there too. tf_eflags is kept in
619 * the signal context during signal handling and there is no
620 * other place to remember it, so the PSL_RF bit may be
621 * corrupted by the signal handler without us knowing.
622 * Corruption of the PSL_RF bit at worst causes one more or
623 * one less debugger trap, so allowing it is fairly harmless.
625 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
626 printf("sigreturn: eflags = 0x%x\n", eflags);
631 * Don't allow users to load a valid privileged %cs. Let the
632 * hardware check for invalid selectors, excess privilege in
633 * other selectors, invalid %eip's and invalid %esp's.
635 cs = ucp->uc_mcontext.mc_cs;
636 if (!CS_SECURE(cs)) {
637 printf("sigreturn: cs = 0x%x\n", cs);
638 trapsignal(lp->lwp_proc, SIGBUS, T_PROTFLT);
641 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
644 if (ucp->uc_mcontext.mc_onstack & 1)
645 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
647 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
649 lp->lwp_sigmask = ucp->uc_sigmask;
650 SIG_CANTMASK(lp->lwp_sigmask);
655 * Stack frame on entry to function. %eax will contain the function vector,
656 * %ecx will contain the function data. flags, ecx, and eax will have
657 * already been pushed on the stack.
668 sendupcall(struct vmupcall *vu, int morepending)
670 struct lwp *lp = curthread->td_lwp;
671 struct trapframe *regs;
672 struct upcall upcall;
673 struct upc_frame upc_frame;
677 * Get the upcall data structure
679 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
680 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
683 printf("bad upcall address\n");
688 * If the data structure is already marked pending or has a critical
689 * section count, mark the data structure as pending and return
690 * without doing an upcall. vu_pending is left set.
692 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
693 if (upcall.upc_pending < vu->vu_pending) {
694 upcall.upc_pending = vu->vu_pending;
695 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
696 sizeof(upcall.upc_pending));
702 * We can run this upcall now, clear vu_pending.
704 * Bump our critical section count and set or clear the
705 * user pending flag depending on whether more upcalls are
706 * pending. The user will be responsible for calling
707 * upc_dispatch(-1) to process remaining upcalls.
710 upcall.upc_pending = morepending;
711 crit_count += TDPRI_CRIT;
712 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
713 sizeof(upcall.upc_pending));
714 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
718 * Construct a stack frame and issue the upcall
720 regs = lp->lwp_md.md_regs;
721 upc_frame.eax = regs->tf_eax;
722 upc_frame.ecx = regs->tf_ecx;
723 upc_frame.edx = regs->tf_edx;
724 upc_frame.flags = regs->tf_eflags;
725 upc_frame.oldip = regs->tf_eip;
726 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
727 sizeof(upc_frame)) != 0) {
728 printf("bad stack on upcall\n");
730 regs->tf_eax = (register_t)vu->vu_func;
731 regs->tf_ecx = (register_t)vu->vu_data;
732 regs->tf_edx = (register_t)lp->lwp_upcall;
733 regs->tf_eip = (register_t)vu->vu_ctx;
734 regs->tf_esp -= sizeof(upc_frame);
739 * fetchupcall occurs in the context of a system call, which means that
740 * we have to return EJUSTRETURN in order to prevent eax and edx from
741 * being overwritten by the syscall return value.
743 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
744 * and the function pointer in %eax.
747 fetchupcall (struct vmupcall *vu, int morepending, void *rsp)
749 struct upc_frame upc_frame;
750 struct lwp *lp = curthread->td_lwp;
751 struct trapframe *regs;
753 struct upcall upcall;
756 regs = lp->lwp_md.md_regs;
758 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
762 * This jumps us to the next ready context.
765 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
768 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
769 crit_count += TDPRI_CRIT;
771 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
772 regs->tf_eax = (register_t)vu->vu_func;
773 regs->tf_ecx = (register_t)vu->vu_data;
774 regs->tf_edx = (register_t)lp->lwp_upcall;
775 regs->tf_eip = (register_t)vu->vu_ctx;
776 regs->tf_esp = (register_t)rsp;
779 * This returns us to the originally interrupted code.
781 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
782 regs->tf_eax = upc_frame.eax;
783 regs->tf_ecx = upc_frame.ecx;
784 regs->tf_edx = upc_frame.edx;
785 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
786 (upc_frame.flags & PSL_USERCHANGE);
787 regs->tf_eip = upc_frame.oldip;
788 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
797 * Machine dependent boot() routine
799 * I haven't seen anything to put here yet
800 * Possibly some stuff might be grafted back here from boot()
808 * Shutdown the CPU as much as possible
818 * cpu_idle() represents the idle LWKT. You cannot return from this function
819 * (unless you want to blow things up!). Instead we look for runnable threads
820 * and loop or halt as appropriate. Giant is not held on entry to the thread.
822 * The main loop is entered with a critical section held, we must release
823 * the critical section before doing anything else. lwkt_switch() will
824 * check for pending interrupts due to entering and exiting its own
827 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
828 * to wake a HLTed cpu up. However, there are cases where the idlethread
829 * will be entered with the possibility that no IPI will occur and in such
830 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
832 static int cpu_idle_hlt = 1;
833 static int cpu_idle_hltcnt;
834 static int cpu_idle_spincnt;
835 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
836 &cpu_idle_hlt, 0, "Idle loop HLT enable");
837 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
838 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
839 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
840 &cpu_idle_spincnt, 0, "Idle loop entry spins");
843 cpu_idle_default_hook(void)
846 * We must guarentee that hlt is exactly the instruction
849 __asm __volatile("sti; hlt");
852 /* Other subsystems (e.g., ACPI) can hook this later. */
853 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
858 struct thread *td = curthread;
861 KKASSERT(td->td_pri < TDPRI_CRIT);
864 * See if there are any LWKTs ready to go.
869 * If we are going to halt call splz unconditionally after
870 * CLIing to catch any interrupt races. Note that we are
871 * at SPL0 and interrupts are enabled.
873 if (cpu_idle_hlt && !lwkt_runnable() &&
874 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
875 __asm __volatile("cli");
877 if (!lwkt_runnable())
881 __asm __volatile("pause");
885 td->td_flags &= ~TDF_IDLE_NOHLT;
888 __asm __volatile("sti; pause");
890 __asm __volatile("sti");
898 * Clear registers on exec
901 setregs(struct lwp *lp, u_long entry, u_long stack, u_long ps_strings)
903 struct trapframe *regs = lp->lwp_md.md_regs;
904 struct pcb *pcb = lp->lwp_thread->td_pcb;
906 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
907 pcb->pcb_gs = _udatasel;
910 /* was i386_user_cleanup() in NetBSD */
913 bzero((char *)regs, sizeof(struct trapframe));
914 regs->tf_eip = entry;
915 regs->tf_esp = stack;
916 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
917 regs->tf_ss = _udatasel;
918 regs->tf_ds = _udatasel;
919 regs->tf_es = _udatasel;
920 regs->tf_fs = _udatasel;
921 regs->tf_cs = _ucodesel;
923 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
924 regs->tf_ebx = ps_strings;
927 * Reset the hardware debug registers if they were in use.
928 * They won't have any meaning for the newly exec'd process.
930 if (pcb->pcb_flags & PCB_DBREGS) {
937 if (pcb == curthread->td_pcb) {
939 * Clear the debug registers on the running
940 * CPU, otherwise they will end up affecting
941 * the next process we switch to.
945 pcb->pcb_flags &= ~PCB_DBREGS;
949 * Initialize the math emulator (if any) for the current process.
950 * Actually, just clear the bit that says that the emulator has
951 * been initialized. Initialization is delayed until the process
952 * traps to the emulator (if it is done at all) mainly because
953 * emulators don't provide an entry point for initialization.
955 lp->lwp_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
958 * note: do not set CR0_TS here. npxinit() must do it after clearing
959 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
963 load_cr0(rcr0() | CR0_MP);
966 /* Initialize the npx (if any) for the current process. */
967 npxinit(__INITIAL_NPXCW__);
972 * note: linux emulator needs edx to be 0x0 on entry, which is
973 * handled in execve simply by setting the 64 bit syscall
984 cr0 |= CR0_NE; /* Done by npxinit() */
985 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
987 if (cpu_class != CPUCLASS_386)
989 cr0 |= CR0_WP | CR0_AM;
995 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
998 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1000 if (!error && req->newptr)
1005 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1006 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1008 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1009 CTLFLAG_RW, &disable_rtc_set, 0, "");
1011 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1012 CTLFLAG_RD, &bootinfo, bootinfo, "");
1014 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1015 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1017 extern u_long bootdev; /* not a cdev_t - encoding is different */
1018 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1019 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1022 * Initialize 386 and configure to run kernel
1026 * Initialize segments & interrupt table
1030 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1031 static struct gate_descriptor idt0[NIDT];
1032 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1033 union descriptor ldt[NLDT]; /* local descriptor table */
1035 /* table descriptors - used to load tables by cpu */
1036 struct region_descriptor r_gdt, r_idt;
1038 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1039 extern int has_f00f_bug;
1042 static struct i386tss dblfault_tss;
1043 static char dblfault_stack[PAGE_SIZE];
1045 extern struct user *proc0paddr;
1048 /* software prototypes -- in more palatable form */
1049 struct soft_segment_descriptor gdt_segs[] = {
1050 /* GNULL_SEL 0 Null Descriptor */
1051 { 0x0, /* segment base address */
1053 0, /* segment type */
1054 0, /* segment descriptor priority level */
1055 0, /* segment descriptor present */
1057 0, /* default 32 vs 16 bit size */
1058 0 /* limit granularity (byte/page units)*/ },
1059 /* GCODE_SEL 1 Code Descriptor for kernel */
1060 { 0x0, /* segment base address */
1061 0xfffff, /* length - all address space */
1062 SDT_MEMERA, /* segment type */
1063 0, /* segment descriptor priority level */
1064 1, /* segment descriptor present */
1066 1, /* default 32 vs 16 bit size */
1067 1 /* limit granularity (byte/page units)*/ },
1068 /* GDATA_SEL 2 Data Descriptor for kernel */
1069 { 0x0, /* segment base address */
1070 0xfffff, /* length - all address space */
1071 SDT_MEMRWA, /* segment type */
1072 0, /* segment descriptor priority level */
1073 1, /* segment descriptor present */
1075 1, /* default 32 vs 16 bit size */
1076 1 /* limit granularity (byte/page units)*/ },
1077 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1078 { 0x0, /* segment base address */
1079 0xfffff, /* length - all address space */
1080 SDT_MEMRWA, /* segment type */
1081 0, /* segment descriptor priority level */
1082 1, /* segment descriptor present */
1084 1, /* default 32 vs 16 bit size */
1085 1 /* limit granularity (byte/page units)*/ },
1086 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1088 0x0, /* segment base address */
1089 sizeof(struct i386tss)-1,/* length - all address space */
1090 SDT_SYS386TSS, /* segment type */
1091 0, /* segment descriptor priority level */
1092 1, /* segment descriptor present */
1094 0, /* unused - default 32 vs 16 bit size */
1095 0 /* limit granularity (byte/page units)*/ },
1096 /* GLDT_SEL 5 LDT Descriptor */
1097 { (int) ldt, /* segment base address */
1098 sizeof(ldt)-1, /* length - all address space */
1099 SDT_SYSLDT, /* segment type */
1100 SEL_UPL, /* segment descriptor priority level */
1101 1, /* segment descriptor present */
1103 0, /* unused - default 32 vs 16 bit size */
1104 0 /* limit granularity (byte/page units)*/ },
1105 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1106 { (int) ldt, /* segment base address */
1107 (512 * sizeof(union descriptor)-1), /* length */
1108 SDT_SYSLDT, /* segment type */
1109 0, /* segment descriptor priority level */
1110 1, /* segment descriptor present */
1112 0, /* unused - default 32 vs 16 bit size */
1113 0 /* limit granularity (byte/page units)*/ },
1114 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1115 { 0x0, /* segment base address */
1116 0x0, /* length - all address space */
1117 0, /* segment type */
1118 0, /* segment descriptor priority level */
1119 0, /* segment descriptor present */
1121 0, /* default 32 vs 16 bit size */
1122 0 /* limit granularity (byte/page units)*/ },
1123 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1124 { 0x400, /* segment base address */
1125 0xfffff, /* length */
1126 SDT_MEMRWA, /* segment type */
1127 0, /* segment descriptor priority level */
1128 1, /* segment descriptor present */
1130 1, /* default 32 vs 16 bit size */
1131 1 /* limit granularity (byte/page units)*/ },
1132 /* GPANIC_SEL 9 Panic Tss Descriptor */
1133 { (int) &dblfault_tss, /* segment base address */
1134 sizeof(struct i386tss)-1,/* length - all address space */
1135 SDT_SYS386TSS, /* segment type */
1136 0, /* segment descriptor priority level */
1137 1, /* segment descriptor present */
1139 0, /* unused - default 32 vs 16 bit size */
1140 0 /* limit granularity (byte/page units)*/ },
1141 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1142 { 0, /* segment base address (overwritten) */
1143 0xfffff, /* length */
1144 SDT_MEMERA, /* segment type */
1145 0, /* segment descriptor priority level */
1146 1, /* segment descriptor present */
1148 0, /* default 32 vs 16 bit size */
1149 1 /* limit granularity (byte/page units)*/ },
1150 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1151 { 0, /* segment base address (overwritten) */
1152 0xfffff, /* length */
1153 SDT_MEMERA, /* segment type */
1154 0, /* segment descriptor priority level */
1155 1, /* segment descriptor present */
1157 0, /* default 32 vs 16 bit size */
1158 1 /* limit granularity (byte/page units)*/ },
1159 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1160 { 0, /* segment base address (overwritten) */
1161 0xfffff, /* length */
1162 SDT_MEMRWA, /* segment type */
1163 0, /* segment descriptor priority level */
1164 1, /* segment descriptor present */
1166 1, /* default 32 vs 16 bit size */
1167 1 /* limit granularity (byte/page units)*/ },
1168 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1169 { 0, /* segment base address (overwritten) */
1170 0xfffff, /* length */
1171 SDT_MEMRWA, /* segment type */
1172 0, /* segment descriptor priority level */
1173 1, /* segment descriptor present */
1175 0, /* default 32 vs 16 bit size */
1176 1 /* limit granularity (byte/page units)*/ },
1177 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1178 { 0, /* segment base address (overwritten) */
1179 0xfffff, /* length */
1180 SDT_MEMRWA, /* segment type */
1181 0, /* segment descriptor priority level */
1182 1, /* segment descriptor present */
1184 0, /* default 32 vs 16 bit size */
1185 1 /* limit granularity (byte/page units)*/ },
1186 /* GTLS_START 15 TLS */
1187 { 0x0, /* segment base address */
1189 0, /* segment type */
1190 0, /* segment descriptor priority level */
1191 0, /* segment descriptor present */
1193 0, /* default 32 vs 16 bit size */
1194 0 /* limit granularity (byte/page units)*/ },
1195 /* GTLS_START+1 16 TLS */
1196 { 0x0, /* segment base address */
1198 0, /* segment type */
1199 0, /* segment descriptor priority level */
1200 0, /* segment descriptor present */
1202 0, /* default 32 vs 16 bit size */
1203 0 /* limit granularity (byte/page units)*/ },
1204 /* GTLS_END 17 TLS */
1205 { 0x0, /* segment base address */
1207 0, /* segment type */
1208 0, /* segment descriptor priority level */
1209 0, /* segment descriptor present */
1211 0, /* default 32 vs 16 bit size */
1212 0 /* limit granularity (byte/page units)*/ },
1215 static struct soft_segment_descriptor ldt_segs[] = {
1216 /* Null Descriptor - overwritten by call gate */
1217 { 0x0, /* segment base address */
1218 0x0, /* length - all address space */
1219 0, /* segment type */
1220 0, /* segment descriptor priority level */
1221 0, /* segment descriptor present */
1223 0, /* default 32 vs 16 bit size */
1224 0 /* limit granularity (byte/page units)*/ },
1225 /* Null Descriptor - overwritten by call gate */
1226 { 0x0, /* segment base address */
1227 0x0, /* length - all address space */
1228 0, /* segment type */
1229 0, /* segment descriptor priority level */
1230 0, /* segment descriptor present */
1232 0, /* default 32 vs 16 bit size */
1233 0 /* limit granularity (byte/page units)*/ },
1234 /* Null Descriptor - overwritten by call gate */
1235 { 0x0, /* segment base address */
1236 0x0, /* length - all address space */
1237 0, /* segment type */
1238 0, /* segment descriptor priority level */
1239 0, /* segment descriptor present */
1241 0, /* default 32 vs 16 bit size */
1242 0 /* limit granularity (byte/page units)*/ },
1243 /* Code Descriptor for user */
1244 { 0x0, /* segment base address */
1245 0xfffff, /* length - all address space */
1246 SDT_MEMERA, /* segment type */
1247 SEL_UPL, /* segment descriptor priority level */
1248 1, /* segment descriptor present */
1250 1, /* default 32 vs 16 bit size */
1251 1 /* limit granularity (byte/page units)*/ },
1252 /* Null Descriptor - overwritten by call gate */
1253 { 0x0, /* segment base address */
1254 0x0, /* length - all address space */
1255 0, /* segment type */
1256 0, /* segment descriptor priority level */
1257 0, /* segment descriptor present */
1259 0, /* default 32 vs 16 bit size */
1260 0 /* limit granularity (byte/page units)*/ },
1261 /* Data Descriptor for user */
1262 { 0x0, /* segment base address */
1263 0xfffff, /* length - all address space */
1264 SDT_MEMRWA, /* segment type */
1265 SEL_UPL, /* segment descriptor priority level */
1266 1, /* segment descriptor present */
1268 1, /* default 32 vs 16 bit size */
1269 1 /* limit granularity (byte/page units)*/ },
1273 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1275 struct gate_descriptor *ip;
1278 ip->gd_looffset = (int)func;
1279 ip->gd_selector = selec;
1285 ip->gd_hioffset = ((int)func)>>16 ;
1288 #define IDTVEC(name) __CONCAT(X,name)
1291 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1292 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1293 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1294 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1295 IDTVEC(xmm), IDTVEC(syscall),
1298 IDTVEC(int0x80_syscall);
1300 #ifdef DEBUG_INTERRUPTS
1301 extern inthand_t *Xrsvdary[256];
1305 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1307 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1308 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1309 ssd->ssd_type = sd->sd_type;
1310 ssd->ssd_dpl = sd->sd_dpl;
1311 ssd->ssd_p = sd->sd_p;
1312 ssd->ssd_def32 = sd->sd_def32;
1313 ssd->ssd_gran = sd->sd_gran;
1317 * Populate the (physmap) array with base/bound pairs describing the
1318 * available physical memory in the system, then test this memory and
1319 * build the phys_avail array describing the actually-available memory.
1321 * If we cannot accurately determine the physical memory map, then use
1322 * value from the 0xE801 call, and failing that, the RTC.
1324 * Total memory size may be set by the kernel environment variable
1325 * hw.physmem or the compile-time define MAXMEM.
1328 getmemsize(int first)
1330 int i, physmap_idx, pa_indx;
1332 u_int basemem, extmem;
1333 struct vm86frame vmf;
1334 struct vm86context vmc;
1336 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1344 quad_t dcons_addr, dcons_size;
1347 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1348 bzero(&vmf, sizeof(struct vm86frame));
1349 bzero(physmap, sizeof(physmap));
1353 * Some newer BIOSes has broken INT 12H implementation which cause
1354 * kernel panic immediately. In this case, we need to scan SMAP
1355 * with INT 15:E820 first, then determine base memory size.
1357 if (hasbrokenint12) {
1362 * Perform "base memory" related probes & setup. If we get a crazy
1363 * value give the bios some scribble space just in case.
1365 vm86_intcall(0x12, &vmf);
1366 basemem = vmf.vmf_ax;
1367 if (basemem > 640) {
1368 printf("Preposterous BIOS basemem of %uK, "
1369 "truncating to < 640K\n", basemem);
1374 * XXX if biosbasemem is now < 640, there is a `hole'
1375 * between the end of base memory and the start of
1376 * ISA memory. The hole may be empty or it may
1377 * contain BIOS code or data. Map it read/write so
1378 * that the BIOS can write to it. (Memory from 0 to
1379 * the physical end of the kernel is mapped read-only
1380 * to begin with and then parts of it are remapped.
1381 * The parts that aren't remapped form holes that
1382 * remain read-only and are unused by the kernel.
1383 * The base memory area is below the physical end of
1384 * the kernel and right now forms a read-only hole.
1385 * The part of it from PAGE_SIZE to
1386 * (trunc_page(biosbasemem * 1024) - 1) will be
1387 * remapped and used by the kernel later.)
1389 * This code is similar to the code used in
1390 * pmap_mapdev, but since no memory needs to be
1391 * allocated we simply change the mapping.
1393 for (pa = trunc_page(basemem * 1024);
1394 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1395 pte = vtopte(pa + KERNBASE);
1396 *pte = pa | PG_RW | PG_V;
1400 * if basemem != 640, map pages r/w into vm86 page table so
1401 * that the bios can scribble on it.
1404 for (i = basemem / 4; i < 160; i++)
1405 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1409 * map page 1 R/W into the kernel page table so we can use it
1410 * as a buffer. The kernel will unmap this page later.
1412 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1413 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1416 * get memory map with INT 15:E820
1418 #define SMAPSIZ sizeof(*smap)
1419 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1422 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1423 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1428 vmf.vmf_eax = 0xE820;
1429 vmf.vmf_edx = SMAP_SIG;
1430 vmf.vmf_ecx = SMAPSIZ;
1431 i = vm86_datacall(0x15, &vmf, &vmc);
1432 if (i || vmf.vmf_eax != SMAP_SIG)
1434 if (boothowto & RB_VERBOSE)
1435 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1437 *(u_int32_t *)((char *)&smap->base + 4),
1438 (u_int32_t)smap->base,
1439 *(u_int32_t *)((char *)&smap->length + 4),
1440 (u_int32_t)smap->length);
1442 if (smap->type != 0x01)
1445 if (smap->length == 0)
1448 if (smap->base >= 0xffffffff) {
1449 printf("%uK of memory above 4GB ignored\n",
1450 (u_int)(smap->length / 1024));
1454 for (i = 0; i <= physmap_idx; i += 2) {
1455 if (smap->base < physmap[i + 1]) {
1456 if (boothowto & RB_VERBOSE)
1458 "Overlapping or non-montonic memory region, ignoring second region\n");
1463 if (smap->base == physmap[physmap_idx + 1]) {
1464 physmap[physmap_idx + 1] += smap->length;
1469 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1471 "Too many segments in the physical address map, giving up\n");
1474 physmap[physmap_idx] = smap->base;
1475 physmap[physmap_idx + 1] = smap->base + smap->length;
1477 ; /* fix GCC3.x warning */
1478 } while (vmf.vmf_ebx != 0);
1481 * Perform "base memory" related probes & setup based on SMAP
1484 for (i = 0; i <= physmap_idx; i += 2) {
1485 if (physmap[i] == 0x00000000) {
1486 basemem = physmap[i + 1] / 1024;
1495 if (basemem > 640) {
1496 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1501 for (pa = trunc_page(basemem * 1024);
1502 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1503 pte = vtopte(pa + KERNBASE);
1504 *pte = pa | PG_RW | PG_V;
1508 for (i = basemem / 4; i < 160; i++)
1509 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1512 if (physmap[1] != 0)
1516 * If we failed above, try memory map with INT 15:E801
1518 vmf.vmf_ax = 0xE801;
1519 if (vm86_intcall(0x15, &vmf) == 0) {
1520 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1524 vm86_intcall(0x15, &vmf);
1525 extmem = vmf.vmf_ax;
1528 * Prefer the RTC value for extended memory.
1530 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1535 * Special hack for chipsets that still remap the 384k hole when
1536 * there's 16MB of memory - this really confuses people that
1537 * are trying to use bus mastering ISA controllers with the
1538 * "16MB limit"; they only have 16MB, but the remapping puts
1539 * them beyond the limit.
1541 * If extended memory is between 15-16MB (16-17MB phys address range),
1544 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1548 physmap[1] = basemem * 1024;
1550 physmap[physmap_idx] = 0x100000;
1551 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1555 * Now, physmap contains a map of physical memory.
1559 /* make hole for AP bootstrap code YYY */
1560 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1562 /* look for the MP hardware - needed for apic addresses */
1567 * Maxmem isn't the "maximum memory", it's one larger than the
1568 * highest page of the physical address space. It should be
1569 * called something like "Maxphyspage". We may adjust this
1570 * based on ``hw.physmem'' and the results of the memory test.
1572 Maxmem = atop(physmap[physmap_idx + 1]);
1575 Maxmem = MAXMEM / 4;
1579 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
1580 * for the appropriate modifiers. This overrides MAXMEM.
1582 if ((cp = kgetenv("hw.physmem")) != NULL) {
1583 u_int64_t AllowMem, sanity;
1586 sanity = AllowMem = strtouq(cp, &ep, 0);
1587 if ((ep != cp) && (*ep != 0)) {
1600 AllowMem = sanity = 0;
1602 if (AllowMem < sanity)
1606 printf("Ignoring invalid memory size of '%s'\n", cp);
1608 Maxmem = atop(AllowMem);
1611 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1612 (boothowto & RB_VERBOSE))
1613 printf("Physical memory use set to %lluK\n", Maxmem * 4);
1616 * If Maxmem has been increased beyond what the system has detected,
1617 * extend the last memory segment to the new limit.
1619 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1620 physmap[physmap_idx + 1] = ptoa(Maxmem);
1622 /* call pmap initialization to make new kernel address space */
1623 pmap_bootstrap(first, 0);
1626 * Size up each available chunk of physical memory.
1628 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1630 phys_avail[pa_indx++] = physmap[0];
1631 phys_avail[pa_indx] = physmap[0];
1635 * Get dcons buffer address
1637 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1638 kgetenv_quad("dcons.size", &dcons_size) == 0)
1642 * physmap is in bytes, so when converting to page boundaries,
1643 * round up the start address and round down the end address.
1645 for (i = 0; i <= physmap_idx; i += 2) {
1649 if (physmap[i + 1] < end)
1650 end = trunc_page(physmap[i + 1]);
1651 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1656 int *ptr = (int *)CADDR1;
1660 * block out kernel memory as not available.
1662 if (pa >= 0x100000 && pa < first)
1666 * block out dcons buffer
1669 && pa >= trunc_page(dcons_addr)
1670 && pa < dcons_addr + dcons_size)
1676 * map page into kernel: valid, read/write,non-cacheable
1678 *pte = pa | PG_V | PG_RW | PG_N;
1683 * Test for alternating 1's and 0's
1685 *(volatile int *)ptr = 0xaaaaaaaa;
1686 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1690 * Test for alternating 0's and 1's
1692 *(volatile int *)ptr = 0x55555555;
1693 if (*(volatile int *)ptr != 0x55555555) {
1699 *(volatile int *)ptr = 0xffffffff;
1700 if (*(volatile int *)ptr != 0xffffffff) {
1706 *(volatile int *)ptr = 0x0;
1707 if (*(volatile int *)ptr != 0x0) {
1711 * Restore original value.
1716 * Adjust array of valid/good pages.
1718 if (page_bad == TRUE) {
1722 * If this good page is a continuation of the
1723 * previous set of good pages, then just increase
1724 * the end pointer. Otherwise start a new chunk.
1725 * Note that "end" points one higher than end,
1726 * making the range >= start and < end.
1727 * If we're also doing a speculative memory
1728 * test and we at or past the end, bump up Maxmem
1729 * so that we keep going. The first bad page
1730 * will terminate the loop.
1732 if (phys_avail[pa_indx] == pa) {
1733 phys_avail[pa_indx] += PAGE_SIZE;
1736 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1737 printf("Too many holes in the physical address space, giving up\n");
1741 phys_avail[pa_indx++] = pa; /* start */
1742 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1752 * The last chunk must contain at least one page plus the message
1753 * buffer to avoid complicating other code (message buffer address
1754 * calculation, etc.).
1756 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1757 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1758 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1759 phys_avail[pa_indx--] = 0;
1760 phys_avail[pa_indx--] = 0;
1763 Maxmem = atop(phys_avail[pa_indx]);
1765 /* Trim off space for the message buffer. */
1766 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1768 avail_end = phys_avail[pa_indx];
1780 * 7 Device Not Available (x87)
1782 * 9 Coprocessor Segment overrun (unsupported, reserved)
1784 * 11 Segment not present
1786 * 13 General Protection
1789 * 16 x87 FP Exception pending
1790 * 17 Alignment Check
1792 * 19 SIMD floating point
1794 * 32-255 INTn/external sources
1799 struct gate_descriptor *gdp;
1800 int gsel_tss, metadata_missing, off, x;
1801 struct mdglobaldata *gd;
1804 * Prevent lowering of the ipl if we call tsleep() early.
1806 gd = &CPU_prvspace[0].mdglobaldata;
1807 bzero(gd, sizeof(*gd));
1809 gd->mi.gd_curthread = &thread0;
1811 atdevbase = ISA_HOLE_START + KERNBASE;
1813 metadata_missing = 0;
1814 if (bootinfo.bi_modulep) {
1815 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1816 preload_bootstrap_relocate(KERNBASE);
1818 metadata_missing = 1;
1820 if (bootinfo.bi_envp)
1821 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1824 * start with one cpu. Note: ncpus2_shift and ncpus2_mask are left
1829 /* Init basic tunables, hz etc */
1833 * make gdt memory segments, the code segment goes up to end of the
1834 * page with etext in it, the data segment goes to the end of
1838 * XXX text protection is temporarily (?) disabled. The limit was
1839 * i386_btop(round_page(etext)) - 1.
1841 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1842 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1844 gdt_segs[GPRIV_SEL].ssd_limit =
1845 atop(sizeof(struct privatespace) - 1);
1846 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1847 gdt_segs[GPROC0_SEL].ssd_base =
1848 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1850 gd->mi.gd_prvspace = &CPU_prvspace[0];
1853 * Note: on both UP and SMP curthread must be set non-NULL
1854 * early in the boot sequence because the system assumes
1855 * that 'curthread' is never NULL.
1858 for (x = 0; x < NGDT; x++) {
1860 /* avoid overwriting db entries with APM ones */
1861 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1864 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1867 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1868 r_gdt.rd_base = (int) gdt;
1871 mi_gdinit(&gd->mi, 0);
1873 lwkt_init_thread(&thread0, proc0paddr, LWKT_THREAD_STACK, 0, &gd->mi);
1874 lwkt_set_comm(&thread0, "thread0");
1875 proc0.p_addr = (void *)thread0.td_kstack;
1876 LIST_INIT(&proc0.p_lwps);
1877 LIST_INSERT_HEAD(&proc0.p_lwps, &proc0.p_lwp, lwp_list);
1878 proc0.p_lwp.lwp_thread = &thread0;
1879 proc0.p_lwp.lwp_proc = &proc0;
1880 proc0.p_usched = usched_init();
1881 proc0.p_lwp.lwp_cpumask = 0xFFFFFFFF;
1882 varsymset_init(&proc0.p_varsymset, NULL);
1883 thread0.td_flags |= TDF_RUNNING;
1884 thread0.td_proc = &proc0;
1885 thread0.td_lwp = &proc0.p_lwp;
1886 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1887 safepri = TDPRI_MAX;
1889 /* make ldt memory segments */
1891 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1892 * should be spelled ...MAX_USER...
1894 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1895 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1896 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1897 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1899 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1901 gd->gd_currentldt = _default_ldt;
1902 /* spinlocks and the BGL */
1906 * Setup the hardware exception table. Most exceptions use
1907 * SDT_SYS386TGT, known as a 'trap gate'. Trap gates leave
1908 * interrupts enabled. VM page faults use SDT_SYS386IGT, known as
1909 * an 'interrupt trap gate', which disables interrupts on entry,
1910 * in order to be able to poll the appropriate CRn register to
1911 * determine the fault address.
1913 for (x = 0; x < NIDT; x++) {
1914 #ifdef DEBUG_INTERRUPTS
1915 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1917 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1920 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1921 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1922 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1923 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1924 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1925 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1926 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1927 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1928 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1929 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1930 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1931 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1932 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1933 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1934 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1935 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1936 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1937 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1938 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1939 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1940 setidt(0x80, &IDTVEC(int0x80_syscall),
1941 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1943 r_idt.rd_limit = sizeof(idt0) - 1;
1944 r_idt.rd_base = (int) idt;
1948 * Initialize the console before we print anything out.
1952 if (metadata_missing)
1953 printf("WARNING: loader(8) metadata is missing!\n");
1962 if (boothowto & RB_KDB)
1963 Debugger("Boot flags requested debugger");
1966 finishidentcpu(); /* Final stage of CPU initialization */
1967 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1968 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1969 initializecpu(); /* Initialize CPU registers */
1972 * make an initial tss so cpu can get interrupt stack on syscall!
1973 * The 16 bytes is to save room for a VM86 context.
1975 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1976 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
1977 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1978 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1979 gd->gd_common_tssd = *gd->gd_tss_gdt;
1980 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
1983 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1984 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1985 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1986 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1987 dblfault_tss.tss_cr3 = (int)IdlePTD;
1988 dblfault_tss.tss_eip = (int) dblfault_handler;
1989 dblfault_tss.tss_eflags = PSL_KERNEL;
1990 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1991 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1992 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1993 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1994 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1998 init_param2(physmem);
2000 /* now running on new page tables, configured,and u/iom is accessible */
2002 /* Map the message buffer. */
2003 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2004 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2006 msgbufinit(msgbufp, MSGBUF_SIZE);
2008 /* make a call gate to reenter kernel with */
2009 gdp = &ldt[LSYS5CALLS_SEL].gd;
2011 x = (int) &IDTVEC(syscall);
2012 gdp->gd_looffset = x++;
2013 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2015 gdp->gd_type = SDT_SYS386CGT;
2016 gdp->gd_dpl = SEL_UPL;
2018 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2020 /* XXX does this work? */
2021 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2022 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2024 /* transfer to user mode */
2026 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2027 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2029 /* setup proc 0's pcb */
2030 thread0.td_pcb->pcb_flags = 0;
2031 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2032 thread0.td_pcb->pcb_ext = 0;
2033 proc0.p_lwp.lwp_md.md_regs = &proc0_tf;
2037 * Initialize machine-dependant portions of the global data structure.
2038 * Note that the global data area and cpu0's idlestack in the private
2039 * data space were allocated in locore.
2041 * Note: the idlethread's cpl is 0
2043 * WARNING! Called from early boot, 'mycpu' may not work yet.
2046 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2049 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2051 lwkt_init_thread(&gd->mi.gd_idlethread,
2052 gd->mi.gd_prvspace->idlestack,
2053 sizeof(gd->mi.gd_prvspace->idlestack),
2054 TDF_MPSAFE, &gd->mi);
2055 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2056 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2057 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2058 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2062 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2064 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2065 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2072 globaldata_find(int cpu)
2074 KKASSERT(cpu >= 0 && cpu < ncpus);
2075 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2078 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2079 static void f00f_hack(void *unused);
2080 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2083 f00f_hack(void *unused)
2085 struct gate_descriptor *new_idt;
2091 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2093 r_idt.rd_limit = sizeof(idt0) - 1;
2095 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2097 panic("kmem_alloc returned 0");
2098 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2099 panic("kmem_alloc returned non-page-aligned memory");
2100 /* Put the first seven entries in the lower page */
2101 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2102 bcopy(idt, new_idt, sizeof(idt0));
2103 r_idt.rd_base = (int)new_idt;
2106 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2107 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2108 panic("vm_map_protect failed");
2111 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2114 ptrace_set_pc(struct proc *p, unsigned long addr)
2116 p->p_md.md_regs->tf_eip = addr;
2121 ptrace_single_step(struct lwp *lp)
2123 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2128 fill_regs(struct lwp *lp, struct reg *regs)
2131 struct trapframe *tp;
2133 tp = lp->lwp_md.md_regs;
2134 regs->r_fs = tp->tf_fs;
2135 regs->r_es = tp->tf_es;
2136 regs->r_ds = tp->tf_ds;
2137 regs->r_edi = tp->tf_edi;
2138 regs->r_esi = tp->tf_esi;
2139 regs->r_ebp = tp->tf_ebp;
2140 regs->r_ebx = tp->tf_ebx;
2141 regs->r_edx = tp->tf_edx;
2142 regs->r_ecx = tp->tf_ecx;
2143 regs->r_eax = tp->tf_eax;
2144 regs->r_eip = tp->tf_eip;
2145 regs->r_cs = tp->tf_cs;
2146 regs->r_eflags = tp->tf_eflags;
2147 regs->r_esp = tp->tf_esp;
2148 regs->r_ss = tp->tf_ss;
2149 pcb = lp->lwp_thread->td_pcb;
2150 regs->r_gs = pcb->pcb_gs;
2155 set_regs(struct lwp *lp, struct reg *regs)
2158 struct trapframe *tp;
2160 tp = lp->lwp_md.md_regs;
2161 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2162 !CS_SECURE(regs->r_cs))
2164 tp->tf_fs = regs->r_fs;
2165 tp->tf_es = regs->r_es;
2166 tp->tf_ds = regs->r_ds;
2167 tp->tf_edi = regs->r_edi;
2168 tp->tf_esi = regs->r_esi;
2169 tp->tf_ebp = regs->r_ebp;
2170 tp->tf_ebx = regs->r_ebx;
2171 tp->tf_edx = regs->r_edx;
2172 tp->tf_ecx = regs->r_ecx;
2173 tp->tf_eax = regs->r_eax;
2174 tp->tf_eip = regs->r_eip;
2175 tp->tf_cs = regs->r_cs;
2176 tp->tf_eflags = regs->r_eflags;
2177 tp->tf_esp = regs->r_esp;
2178 tp->tf_ss = regs->r_ss;
2179 pcb = lp->lwp_thread->td_pcb;
2180 pcb->pcb_gs = regs->r_gs;
2184 #ifndef CPU_DISABLE_SSE
2186 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2188 struct env87 *penv_87 = &sv_87->sv_env;
2189 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2192 /* FPU control/status */
2193 penv_87->en_cw = penv_xmm->en_cw;
2194 penv_87->en_sw = penv_xmm->en_sw;
2195 penv_87->en_tw = penv_xmm->en_tw;
2196 penv_87->en_fip = penv_xmm->en_fip;
2197 penv_87->en_fcs = penv_xmm->en_fcs;
2198 penv_87->en_opcode = penv_xmm->en_opcode;
2199 penv_87->en_foo = penv_xmm->en_foo;
2200 penv_87->en_fos = penv_xmm->en_fos;
2203 for (i = 0; i < 8; ++i)
2204 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2206 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2210 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2212 struct env87 *penv_87 = &sv_87->sv_env;
2213 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2216 /* FPU control/status */
2217 penv_xmm->en_cw = penv_87->en_cw;
2218 penv_xmm->en_sw = penv_87->en_sw;
2219 penv_xmm->en_tw = penv_87->en_tw;
2220 penv_xmm->en_fip = penv_87->en_fip;
2221 penv_xmm->en_fcs = penv_87->en_fcs;
2222 penv_xmm->en_opcode = penv_87->en_opcode;
2223 penv_xmm->en_foo = penv_87->en_foo;
2224 penv_xmm->en_fos = penv_87->en_fos;
2227 for (i = 0; i < 8; ++i)
2228 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2230 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2232 #endif /* CPU_DISABLE_SSE */
2235 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2237 #ifndef CPU_DISABLE_SSE
2239 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2240 (struct save87 *)fpregs);
2243 #endif /* CPU_DISABLE_SSE */
2244 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2249 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2251 #ifndef CPU_DISABLE_SSE
2253 set_fpregs_xmm((struct save87 *)fpregs,
2254 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2257 #endif /* CPU_DISABLE_SSE */
2258 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2263 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2266 dbregs->dr0 = rdr0();
2267 dbregs->dr1 = rdr1();
2268 dbregs->dr2 = rdr2();
2269 dbregs->dr3 = rdr3();
2270 dbregs->dr4 = rdr4();
2271 dbregs->dr5 = rdr5();
2272 dbregs->dr6 = rdr6();
2273 dbregs->dr7 = rdr7();
2277 pcb = lp->lwp_thread->td_pcb;
2278 dbregs->dr0 = pcb->pcb_dr0;
2279 dbregs->dr1 = pcb->pcb_dr1;
2280 dbregs->dr2 = pcb->pcb_dr2;
2281 dbregs->dr3 = pcb->pcb_dr3;
2284 dbregs->dr6 = pcb->pcb_dr6;
2285 dbregs->dr7 = pcb->pcb_dr7;
2291 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2294 load_dr0(dbregs->dr0);
2295 load_dr1(dbregs->dr1);
2296 load_dr2(dbregs->dr2);
2297 load_dr3(dbregs->dr3);
2298 load_dr4(dbregs->dr4);
2299 load_dr5(dbregs->dr5);
2300 load_dr6(dbregs->dr6);
2301 load_dr7(dbregs->dr7);
2304 struct ucred *ucred;
2306 uint32_t mask1, mask2;
2309 * Don't let an illegal value for dr7 get set. Specifically,
2310 * check for undefined settings. Setting these bit patterns
2311 * result in undefined behaviour and can lead to an unexpected
2314 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2315 i++, mask1 <<= 2, mask2 <<= 2)
2316 if ((dbregs->dr7 & mask1) == mask2)
2319 pcb = lp->lwp_thread->td_pcb;
2320 ucred = lp->lwp_proc->p_ucred;
2323 * Don't let a process set a breakpoint that is not within the
2324 * process's address space. If a process could do this, it
2325 * could halt the system by setting a breakpoint in the kernel
2326 * (if ddb was enabled). Thus, we need to check to make sure
2327 * that no breakpoints are being enabled for addresses outside
2328 * process's address space, unless, perhaps, we were called by
2331 * XXX - what about when the watched area of the user's
2332 * address space is written into from within the kernel
2333 * ... wouldn't that still cause a breakpoint to be generated
2334 * from within kernel mode?
2337 if (suser_cred(ucred, 0) != 0) {
2338 if (dbregs->dr7 & 0x3) {
2339 /* dr0 is enabled */
2340 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2344 if (dbregs->dr7 & (0x3<<2)) {
2345 /* dr1 is enabled */
2346 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2350 if (dbregs->dr7 & (0x3<<4)) {
2351 /* dr2 is enabled */
2352 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2356 if (dbregs->dr7 & (0x3<<6)) {
2357 /* dr3 is enabled */
2358 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2363 pcb->pcb_dr0 = dbregs->dr0;
2364 pcb->pcb_dr1 = dbregs->dr1;
2365 pcb->pcb_dr2 = dbregs->dr2;
2366 pcb->pcb_dr3 = dbregs->dr3;
2367 pcb->pcb_dr6 = dbregs->dr6;
2368 pcb->pcb_dr7 = dbregs->dr7;
2370 pcb->pcb_flags |= PCB_DBREGS;
2377 * Return > 0 if a hardware breakpoint has been hit, and the
2378 * breakpoint was in user space. Return 0, otherwise.
2381 user_dbreg_trap(void)
2383 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2384 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2385 int nbp; /* number of breakpoints that triggered */
2386 caddr_t addr[4]; /* breakpoint addresses */
2390 if ((dr7 & 0x000000ff) == 0) {
2392 * all GE and LE bits in the dr7 register are zero,
2393 * thus the trap couldn't have been caused by the
2394 * hardware debug registers
2401 bp = dr6 & 0x0000000f;
2405 * None of the breakpoint bits are set meaning this
2406 * trap was not caused by any of the debug registers
2412 * at least one of the breakpoints were hit, check to see
2413 * which ones and if any of them are user space addresses
2417 addr[nbp++] = (caddr_t)rdr0();
2420 addr[nbp++] = (caddr_t)rdr1();
2423 addr[nbp++] = (caddr_t)rdr2();
2426 addr[nbp++] = (caddr_t)rdr3();
2429 for (i=0; i<nbp; i++) {
2431 (caddr_t)VM_MAXUSER_ADDRESS) {
2433 * addr[i] is in user space
2440 * None of the breakpoints are in user space.
2448 Debugger(const char *msg)
2450 printf("Debugger(\"%s\") called.\n", msg);
2454 #include <sys/disklabel.h>
2457 * Determine the size of the transfer, and make sure it is
2458 * within the boundaries of the partition. Adjust transfer
2459 * if needed, and signal errors or early completion.
2461 * On success a new bio layer is pushed with the translated
2462 * block number, and returned.
2465 bounds_check_with_label(cdev_t dev, struct bio *bio,
2466 struct disklabel *lp, int wlabel)
2469 struct buf *bp = bio->bio_buf;
2470 struct partition *p = lp->d_partitions + dkpart(dev);
2471 int labelsect = lp->d_partitions[0].p_offset;
2472 int maxsz = p->p_size,
2473 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2474 daddr_t blkno = (daddr_t)(bio->bio_offset >> DEV_BSHIFT);
2476 /* overwriting disk label ? */
2477 /* XXX should also protect bootstrap in first 8K */
2478 if (blkno + p->p_offset <= LABELSECTOR + labelsect &&
2479 #if LABELSECTOR != 0
2480 blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2482 bp->b_cmd != BUF_CMD_READ && wlabel == 0) {
2483 bp->b_error = EROFS;
2487 #if defined(DOSBBSECTOR) && defined(notyet)
2488 /* overwriting master boot record? */
2489 if (blkno + p->p_offset <= DOSBBSECTOR &&
2490 bp->b_cmd != BUF_CMD_READ && wlabel == 0) {
2491 bp->b_error = EROFS;
2497 * Check for out of bounds, EOF, and EOF clipping.
2499 if (bio->bio_offset < 0)
2501 if (blkno + sz > maxsz) {
2503 * Past EOF or B_BNOCLIP flag was set, the request is bad.
2505 if (blkno > maxsz || (bp->b_flags & B_BNOCLIP))
2509 * If exactly on EOF just complete the I/O with no bytes
2510 * transfered. B_INVAL must be set to throw away the
2511 * contents of the buffer. Otherwise clip b_bcount.
2513 if (blkno == maxsz) {
2514 bp->b_resid = bp->b_bcount;
2515 bp->b_flags |= B_INVAL;
2518 bp->b_bcount = (maxsz - blkno) << DEV_BSHIFT;
2520 nbio = push_bio(bio);
2521 nbio->bio_offset = bio->bio_offset + ((off_t)p->p_offset << DEV_BSHIFT);
2525 * The caller is responsible for calling biodone() on the passed bio
2526 * when we return NULL.
2529 bp->b_error = EINVAL;
2531 bp->b_resid = bp->b_bcount;
2532 bp->b_flags |= B_ERROR | B_INVAL;
2540 * Provide inb() and outb() as functions. They are normally only
2541 * available as macros calling inlined functions, thus cannot be
2542 * called inside DDB.
2544 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2550 /* silence compiler warnings */
2552 void outb(u_int, u_char);
2559 * We use %%dx and not %1 here because i/o is done at %dx and not at
2560 * %edx, while gcc generates inferior code (movw instead of movl)
2561 * if we tell it to load (u_short) port.
2563 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2568 outb(u_int port, u_char data)
2572 * Use an unnecessary assignment to help gcc's register allocator.
2573 * This make a large difference for gcc-1.40 and a tiny difference
2574 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2575 * best results. gcc-2.6.0 can't handle this.
2578 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2585 #include "opt_cpu.h"
2589 * initialize all the SMP locks
2592 /* critical region when masking or unmasking interupts */
2593 struct spinlock_deprecated imen_spinlock;
2595 /* Make FAST_INTR() routines sequential */
2596 struct spinlock_deprecated fast_intr_spinlock;
2598 /* critical region for old style disable_intr/enable_intr */
2599 struct spinlock_deprecated mpintr_spinlock;
2601 /* critical region around INTR() routines */
2602 struct spinlock_deprecated intr_spinlock;
2604 /* lock region used by kernel profiling */
2605 struct spinlock_deprecated mcount_spinlock;
2607 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2608 struct spinlock_deprecated com_spinlock;
2610 /* locks kernel printfs */
2611 struct spinlock_deprecated cons_spinlock;
2613 /* lock regions around the clock hardware */
2614 struct spinlock_deprecated clock_spinlock;
2616 /* lock around the MP rendezvous */
2617 struct spinlock_deprecated smp_rv_spinlock;
2623 * mp_lock = 0; BSP already owns the MP lock
2626 * Get the initial mp_lock with a count of 1 for the BSP.
2627 * This uses a LOGICAL cpu ID, ie BSP == 0.
2630 cpu_get_initial_mplock();
2633 spin_lock_init(&mcount_spinlock);
2634 spin_lock_init(&fast_intr_spinlock);
2635 spin_lock_init(&intr_spinlock);
2636 spin_lock_init(&mpintr_spinlock);
2637 spin_lock_init(&imen_spinlock);
2638 spin_lock_init(&smp_rv_spinlock);
2639 spin_lock_init(&com_spinlock);
2640 spin_lock_init(&clock_spinlock);
2641 spin_lock_init(&cons_spinlock);
2643 /* our token pool needs to work early */
2644 lwkt_token_pool_init();