Merge branch 'vendor/OPENSSL'
[dragonfly.git] / sys / dev / drm / i915 / intel_panel.c
1 /*
2  * Copyright © 2006-2010 Intel Corporation
3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  *      Eric Anholt <eric@anholt.net>
26  *      Dave Airlie <airlied@linux.ie>
27  *      Jesse Barnes <jesse.barnes@intel.com>
28  *      Chris Wilson <chris@chris-wilson.co.uk>
29  *
30  * $FreeBSD: src/sys/dev/drm2/i915/intel_panel.c,v 1.1 2012/05/22 11:07:44 kib Exp $
31  */
32
33 #include <drm/drmP.h>
34 #include <drm/i915_drm.h>
35 #include "intel_drv.h"
36
37 #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
38
39 void
40 intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
41                        struct drm_display_mode *adjusted_mode)
42 {
43         adjusted_mode->hdisplay = fixed_mode->hdisplay;
44         adjusted_mode->hsync_start = fixed_mode->hsync_start;
45         adjusted_mode->hsync_end = fixed_mode->hsync_end;
46         adjusted_mode->htotal = fixed_mode->htotal;
47
48         adjusted_mode->vdisplay = fixed_mode->vdisplay;
49         adjusted_mode->vsync_start = fixed_mode->vsync_start;
50         adjusted_mode->vsync_end = fixed_mode->vsync_end;
51         adjusted_mode->vtotal = fixed_mode->vtotal;
52
53         adjusted_mode->clock = fixed_mode->clock;
54 }
55
56 /* adjusted_mode has been preset to be the panel's fixed mode */
57 void
58 intel_pch_panel_fitting(struct drm_device *dev,
59                         int fitting_mode,
60                         const struct drm_display_mode *mode,
61                         struct drm_display_mode *adjusted_mode)
62 {
63         struct drm_i915_private *dev_priv = dev->dev_private;
64         int x, y, width, height;
65
66         x = y = width = height = 0;
67
68         /* Native modes don't need fitting */
69         if (adjusted_mode->hdisplay == mode->hdisplay &&
70             adjusted_mode->vdisplay == mode->vdisplay)
71                 goto done;
72
73         switch (fitting_mode) {
74         case DRM_MODE_SCALE_CENTER:
75                 width = mode->hdisplay;
76                 height = mode->vdisplay;
77                 x = (adjusted_mode->hdisplay - width + 1)/2;
78                 y = (adjusted_mode->vdisplay - height + 1)/2;
79                 break;
80
81         case DRM_MODE_SCALE_ASPECT:
82                 /* Scale but preserve the aspect ratio */
83                 {
84                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
85                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
86                         if (scaled_width > scaled_height) { /* pillar */
87                                 width = scaled_height / mode->vdisplay;
88                                 if (width & 1)
89                                         width++;
90                                 x = (adjusted_mode->hdisplay - width + 1) / 2;
91                                 y = 0;
92                                 height = adjusted_mode->vdisplay;
93                         } else if (scaled_width < scaled_height) { /* letter */
94                                 height = scaled_width / mode->hdisplay;
95                                 if (height & 1)
96                                         height++;
97                                 y = (adjusted_mode->vdisplay - height + 1) / 2;
98                                 x = 0;
99                                 width = adjusted_mode->hdisplay;
100                         } else {
101                                 x = y = 0;
102                                 width = adjusted_mode->hdisplay;
103                                 height = adjusted_mode->vdisplay;
104                         }
105                 }
106                 break;
107
108         default:
109         case DRM_MODE_SCALE_FULLSCREEN:
110                 x = y = 0;
111                 width = adjusted_mode->hdisplay;
112                 height = adjusted_mode->vdisplay;
113                 break;
114         }
115
116 done:
117         dev_priv->pch_pf_pos = (x << 16) | y;
118         dev_priv->pch_pf_size = (width << 16) | height;
119 }
120
121 static int is_backlight_combination_mode(struct drm_device *dev)
122 {
123         struct drm_i915_private *dev_priv = dev->dev_private;
124
125         if (INTEL_INFO(dev)->gen >= 4)
126                 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
127
128         if (IS_GEN2(dev))
129                 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
130
131         return 0;
132 }
133
134 static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
135 {
136         struct drm_i915_private *dev_priv = dev->dev_private;
137         u32 val;
138
139         /* Restore the CTL value if it lost, e.g. GPU reset */
140
141         if (HAS_PCH_SPLIT(dev_priv->dev)) {
142                 val = I915_READ(BLC_PWM_PCH_CTL2);
143                 if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
144                         dev_priv->regfile.saveBLC_PWM_CTL2 = val;
145                 } else if (val == 0) {
146                         val = dev_priv->regfile.saveBLC_PWM_CTL2;
147                         I915_WRITE(BLC_PWM_PCH_CTL2, val);
148                 }
149         } else {
150                 val = I915_READ(BLC_PWM_CTL);
151                 if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
152                         dev_priv->regfile.saveBLC_PWM_CTL = val;
153                         if (INTEL_INFO(dev)->gen >= 4)
154                                 dev_priv->regfile.saveBLC_PWM_CTL2 =
155                                         I915_READ(BLC_PWM_CTL2);
156                 } else if (val == 0) {
157                         val = dev_priv->regfile.saveBLC_PWM_CTL;
158                         I915_WRITE(BLC_PWM_CTL, val);
159                         if (INTEL_INFO(dev)->gen >= 4)
160                                 I915_WRITE(BLC_PWM_CTL2,
161                                            dev_priv->regfile.saveBLC_PWM_CTL2);
162                 }
163         }
164
165         return val;
166 }
167
168 static u32 _intel_panel_get_max_backlight(struct drm_device *dev)
169 {
170         u32 max;
171
172         max = i915_read_blc_pwm_ctl(dev);
173
174         if (HAS_PCH_SPLIT(dev)) {
175                 max >>= 16;
176         } else {
177                 if (INTEL_INFO(dev)->gen < 4)
178                         max >>= 17;
179                 else
180                         max >>= 16;
181
182                 if (is_backlight_combination_mode(dev))
183                         max *= 0xff;
184         }
185
186         return max;
187 }
188
189 u32 intel_panel_get_max_backlight(struct drm_device *dev)
190 {
191         u32 max;
192
193         max = _intel_panel_get_max_backlight(dev);
194         if (max == 0) {
195                 /* XXX add code here to query mode clock or hardware clock
196                  * and program max PWM appropriately.
197                  */
198 #if 0
199                 pr_warn_once("fixme: max PWM is zero\n");
200 #endif
201                 return 1;
202         }
203
204         DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
205         return max;
206 }
207
208 u32 intel_panel_get_backlight(struct drm_device *dev)
209 {
210         struct drm_i915_private *dev_priv = dev->dev_private;
211         u32 val;
212
213         if (HAS_PCH_SPLIT(dev)) {
214                 val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
215         } else {
216                 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
217                 if (INTEL_INFO(dev)->gen < 4)
218                         val >>= 1;
219
220                 if (is_backlight_combination_mode(dev)) {
221                         u8 lbpc;
222
223                         lbpc = pci_read_config(dev->dev, PCI_LBPC, 1);
224                         val *= lbpc;
225                 }
226         }
227
228         DRM_DEBUG("get backlight PWM = %d\n", val);
229         return val;
230 }
231
232 static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
233 {
234         struct drm_i915_private *dev_priv = dev->dev_private;
235         u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
236         I915_WRITE(BLC_PWM_CPU_CTL, val | level);
237 }
238
239 static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
240 {
241         struct drm_i915_private *dev_priv = dev->dev_private;
242         u32 tmp;
243
244         DRM_DEBUG("set backlight PWM = %d\n", level);
245
246         if (HAS_PCH_SPLIT(dev))
247                 return intel_pch_panel_set_backlight(dev, level);
248
249         if (is_backlight_combination_mode(dev)) {
250                 u32 max = intel_panel_get_max_backlight(dev);
251                 u8 lbpc;
252
253                 lbpc = level * 0xfe / max + 1;
254                 level /= lbpc;
255                 pci_write_config(dev->dev, PCI_LBPC, lbpc, 4);
256         }
257
258         tmp = I915_READ(BLC_PWM_CTL);
259         if (INTEL_INFO(dev)->gen < 4) 
260                 level <<= 1;
261         tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
262         I915_WRITE(BLC_PWM_CTL, tmp | level);
263 }
264
265 void intel_panel_set_backlight(struct drm_device *dev, u32 level)
266 {
267         struct drm_i915_private *dev_priv = dev->dev_private;
268
269         dev_priv->backlight_level = level;
270         if (dev_priv->backlight_enabled)
271                 intel_panel_actually_set_backlight(dev, level);
272 }
273
274 void intel_panel_disable_backlight(struct drm_device *dev)
275 {
276         struct drm_i915_private *dev_priv = dev->dev_private;
277
278         dev_priv->backlight_enabled = false;
279         intel_panel_actually_set_backlight(dev, 0);
280 }
281
282 void intel_panel_enable_backlight(struct drm_device *dev)
283 {
284         struct drm_i915_private *dev_priv = dev->dev_private;
285
286         if (dev_priv->backlight_level == 0)
287                 dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
288
289         dev_priv->backlight_enabled = true;
290         intel_panel_actually_set_backlight(dev, dev_priv->backlight_level);
291 }
292
293 static void intel_panel_init_backlight(struct drm_device *dev)
294 {
295         struct drm_i915_private *dev_priv = dev->dev_private;
296
297         dev_priv->backlight_level = intel_panel_get_backlight(dev);
298         dev_priv->backlight_enabled = dev_priv->backlight_level != 0;
299 }
300
301 enum drm_connector_status
302 intel_panel_detect(struct drm_device *dev)
303 {
304 #if 0
305         struct drm_i915_private *dev_priv = dev->dev_private;
306 #endif
307
308         if (i915_panel_ignore_lid)
309                 return i915_panel_ignore_lid > 0 ?
310                         connector_status_connected :
311                         connector_status_disconnected;
312
313         /* opregion lid state on HP 2540p is wrong at boot up,
314          * appears to be either the BIOS or Linux ACPI fault */
315 #if 0
316         /* Assume that the BIOS does not lie through the OpRegion... */
317         if (dev_priv->opregion.lid_state)
318                 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
319                         connector_status_connected :
320                         connector_status_disconnected;
321 #endif
322
323         return connector_status_unknown;
324 }
325
326 int intel_panel_setup_backlight(struct drm_device *dev)
327 {
328         intel_panel_init_backlight(dev);
329         return 0;
330 }
331
332 void intel_panel_destroy_backlight(struct drm_device *dev)
333 {
334         return;
335 }