2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.42 2003/11/03 22:50:11 dillon Exp $
43 #include "use_ether.h"
46 #include "opt_atalk.h"
47 #include "opt_compat.h"
50 #include "opt_directio.h"
53 #include "opt_maxmem.h"
54 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
57 #include "opt_user_ldt.h"
58 #include "opt_userconfig.h"
60 #include <sys/param.h>
61 #include <sys/systm.h>
62 #include <sys/sysproto.h>
63 #include <sys/signalvar.h>
64 #include <sys/kernel.h>
65 #include <sys/linker.h>
66 #include <sys/malloc.h>
69 #include <sys/reboot.h>
70 #include <sys/callout.h>
72 #include <sys/msgbuf.h>
73 #include <sys/sysent.h>
74 #include <sys/sysctl.h>
75 #include <sys/vmmeter.h>
79 #include <vm/vm_param.h>
81 #include <vm/vm_kern.h>
82 #include <vm/vm_object.h>
83 #include <vm/vm_page.h>
84 #include <vm/vm_map.h>
85 #include <vm/vm_pager.h>
86 #include <vm/vm_extern.h>
88 #include <sys/thread2.h>
96 #include <machine/cpu.h>
97 #include <machine/reg.h>
98 #include <machine/clock.h>
99 #include <machine/specialreg.h>
100 #include <machine/bootinfo.h>
101 #include <machine/ipl.h>
102 #include <machine/md_var.h>
103 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
104 #include <machine/globaldata.h> /* CPU_prvspace */
106 #include <machine/smp.h>
109 #include <machine/perfmon.h>
111 #include <machine/cputypes.h>
114 #include <bus/isa/i386/isa_device.h>
116 #include <i386/isa/intr_machdep.h>
117 #include <bus/isa/rtc.h>
118 #include <machine/vm86.h>
119 #include <sys/random.h>
120 #include <sys/ptrace.h>
121 #include <machine/sigframe.h>
123 extern void init386 (int first);
124 extern void dblfault_handler (void);
126 extern void printcpuinfo(void); /* XXX header file */
127 extern void finishidentcpu(void);
128 extern void panicifcpuunsupported(void);
129 extern void initializecpu(void);
131 static void cpu_startup (void *);
132 #ifndef CPU_DISABLE_SSE
133 static void set_fpregs_xmm (struct save87 *, struct savexmm *);
134 static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
135 #endif /* CPU_DISABLE_SSE */
137 extern void ffs_rawread_setup(void);
138 #endif /* DIRECTIO */
139 static void init_locks(void);
141 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
143 static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
145 int _udatasel, _ucodesel;
148 #if defined(SWTCH_OPTIM_STATS)
149 extern int swtch_optim_stats;
150 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
151 CTLFLAG_RD, &swtch_optim_stats, 0, "");
152 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
153 CTLFLAG_RD, &tlb_flush_count, 0, "");
157 static int ispc98 = 1;
159 static int ispc98 = 0;
161 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
167 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
169 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
173 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
174 0, 0, sysctl_hw_physmem, "IU", "");
177 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
179 int error = sysctl_handle_int(oidp, 0,
180 ctob(physmem - vmstats.v_wire_count), req);
184 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
185 0, 0, sysctl_hw_usermem, "IU", "");
188 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
190 int error = sysctl_handle_int(oidp, 0,
191 i386_btop(avail_end - avail_start), req);
195 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
196 0, 0, sysctl_hw_availpages, "I", "");
199 sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
203 /* Unwind the buffer, so that it's linear (possibly starting with
204 * some initial nulls).
206 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
207 msgbufp->msg_size-msgbufp->msg_bufr,req);
208 if(error) return(error);
209 if(msgbufp->msg_bufr>0) {
210 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
211 msgbufp->msg_bufr,req);
216 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
217 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
219 static int msgbuf_clear;
222 sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
225 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
227 if (!error && req->newptr) {
228 /* Clear the buffer and reset write pointer */
229 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
230 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
236 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
237 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
238 "Clear kernel message buffer");
241 vm_paddr_t Maxmem = 0;
244 vm_paddr_t phys_avail[10];
246 /* must be 2 less so 0 0 can signal end of chunks */
247 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
249 static vm_offset_t buffer_sva, buffer_eva;
250 vm_offset_t clean_sva, clean_eva;
251 static vm_offset_t pager_sva, pager_eva;
252 static struct trapframe proc0_tf;
265 if (boothowto & RB_VERBOSE)
269 * Good {morning,afternoon,evening,night}.
271 printf("%s", version);
274 panicifcpuunsupported();
278 printf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
280 * Display any holes after the first chunk of extended memory.
285 printf("Physical memory chunk(s):\n");
286 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
287 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
289 printf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
290 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
296 * Calculate callout wheel size
298 for (callwheelsize = 1, callwheelbits = 0;
299 callwheelsize < ncallout;
300 callwheelsize <<= 1, ++callwheelbits)
302 callwheelmask = callwheelsize - 1;
305 * Allocate space for system data structures.
306 * The first available kernel virtual address is in "v".
307 * As pages of kernel virtual memory are allocated, "v" is incremented.
308 * As pages of memory are allocated and cleared,
309 * "firstaddr" is incremented.
310 * An index into the kernel page table corresponding to the
311 * virtual memory address maintained in "v" is kept in "mapaddr".
315 * Make two passes. The first pass calculates how much memory is
316 * needed and allocates it. The second pass assigns virtual
317 * addresses to the various data structures.
321 v = (caddr_t)firstaddr;
323 #define valloc(name, type, num) \
324 (name) = (type *)v; v = (caddr_t)((name)+(num))
325 #define valloclim(name, type, num, lim) \
326 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
328 valloc(callout, struct callout, ncallout);
329 valloc(callwheel, struct callout_tailq, callwheelsize);
332 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
333 * For the first 64MB of ram nominally allocate sufficient buffers to
334 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
335 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
336 * the buffer cache we limit the eventual kva reservation to
339 * factor represents the 1/4 x ram conversion.
342 int factor = 4 * BKVASIZE / 1024;
343 int kbytes = physmem * (PAGE_SIZE / 1024);
347 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
349 nbuf += (kbytes - 65536) * 2 / (factor * 5);
350 if (maxbcache && nbuf > maxbcache / BKVASIZE)
351 nbuf = maxbcache / BKVASIZE;
355 * Do not allow the buffer_map to be more then 1/2 the size of the
358 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
360 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
362 printf("Warning: nbufs capped at %d\n", nbuf);
365 nswbuf = max(min(nbuf/4, 256), 16);
367 if (nswbuf < NSWBUF_MIN)
374 valloc(swbuf, struct buf, nswbuf);
375 valloc(buf, struct buf, nbuf);
379 * End of first pass, size has been calculated so allocate memory
381 if (firstaddr == 0) {
382 size = (vm_size_t)(v - firstaddr);
383 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
385 panic("startup: no room for tables");
390 * End of second pass, addresses have been assigned
392 if ((vm_size_t)(v - firstaddr) != size)
393 panic("startup: table size inconsistency");
395 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
396 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
397 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
399 buffer_map->system_map = 1;
400 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
401 (nswbuf*MAXPHYS) + pager_map_size);
402 pager_map->system_map = 1;
403 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
404 (16*(ARG_MAX+(PAGE_SIZE*3))));
407 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
408 * we use the more space efficient malloc in place of kmem_alloc.
411 vm_offset_t mb_map_size;
413 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
414 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
415 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT);
416 bzero(mclrefcnt, mb_map_size / MCLBYTES);
417 mb_map = kmem_suballoc(kernel_map, (vm_offset_t *)&mbutl,
418 &maxaddr, mb_map_size);
419 mb_map->system_map = 1;
423 * Initialize callouts
425 SLIST_INIT(&callfree);
426 for (i = 0; i < ncallout; i++) {
427 callout_init(&callout[i]);
428 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
429 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
432 for (i = 0; i < callwheelsize; i++) {
433 TAILQ_INIT(&callwheel[i]);
436 #if defined(USERCONFIG)
438 cninit(); /* the preferred console may have changed */
441 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
442 ptoa(vmstats.v_free_count) / 1024);
445 * Set up buffers, so they can be used to read disk labels.
448 vm_pager_bufferinit();
452 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
454 mp_start(); /* fire up the APs and APICs */
461 * Send an interrupt to process.
463 * Stack is set up to allow sigcode stored
464 * at top to call routine, followed by kcall
465 * to sigreturn routine below. After sigreturn
466 * resets the signal mask, the stack, and the
467 * frame pointer, it returns to the user
471 sendsig(catcher, sig, mask, code)
477 struct proc *p = curproc;
478 struct trapframe *regs;
479 struct sigacts *psp = p->p_sigacts;
480 struct sigframe sf, *sfp;
483 regs = p->p_md.md_regs;
484 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
486 /* save user context */
487 bzero(&sf, sizeof(struct sigframe));
488 sf.sf_uc.uc_sigmask = *mask;
489 sf.sf_uc.uc_stack = p->p_sigstk;
490 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
491 sf.sf_uc.uc_mcontext.mc_gs = rgs();
492 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
494 /* Allocate and validate space for the signal handler context. */
495 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
496 SIGISMEMBER(psp->ps_sigonstack, sig)) {
497 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
498 p->p_sigstk.ss_size - sizeof(struct sigframe));
499 p->p_sigstk.ss_flags |= SS_ONSTACK;
502 sfp = (struct sigframe *)regs->tf_esp - 1;
504 /* Translate the signal is appropriate */
505 if (p->p_sysent->sv_sigtbl) {
506 if (sig <= p->p_sysent->sv_sigsize)
507 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
510 /* Build the argument list for the signal handler. */
512 sf.sf_ucontext = (register_t)&sfp->sf_uc;
513 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
514 /* Signal handler installed with SA_SIGINFO. */
515 sf.sf_siginfo = (register_t)&sfp->sf_si;
516 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
518 /* fill siginfo structure */
519 sf.sf_si.si_signo = sig;
520 sf.sf_si.si_code = code;
521 sf.sf_si.si_addr = (void*)regs->tf_err;
524 /* Old FreeBSD-style arguments. */
525 sf.sf_siginfo = code;
526 sf.sf_addr = regs->tf_err;
527 sf.sf_ahu.sf_handler = catcher;
531 * If we're a vm86 process, we want to save the segment registers.
532 * We also change eflags to be our emulated eflags, not the actual
535 if (regs->tf_eflags & PSL_VM) {
536 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
537 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
539 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
540 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
541 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
542 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
544 if (vm86->vm86_has_vme == 0)
545 sf.sf_uc.uc_mcontext.mc_eflags =
546 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
547 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
550 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
551 * syscalls made by the signal handler. This just avoids
552 * wasting time for our lazy fixup of such faults. PSL_NT
553 * does nothing in vm86 mode, but vm86 programs can set it
554 * almost legitimately in probes for old cpu types.
556 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
560 * Copy the sigframe out to the user's stack.
562 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
564 * Something is wrong with the stack pointer.
565 * ...Kill the process.
570 regs->tf_esp = (int)sfp;
571 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
572 regs->tf_eflags &= ~PSL_T;
573 regs->tf_cs = _ucodesel;
574 regs->tf_ds = _udatasel;
575 regs->tf_es = _udatasel;
576 regs->tf_fs = _udatasel;
578 regs->tf_ss = _udatasel;
582 * sigreturn(ucontext_t *sigcntxp)
584 * System call to cleanup state after a signal
585 * has been taken. Reset signal mask and
586 * stack state from context left by sendsig (above).
587 * Return to previous pc and psl as specified by
588 * context left by sendsig. Check carefully to
589 * make sure that the user has not modified the
590 * state to gain improper privileges.
592 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
593 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
596 sigreturn(struct sigreturn_args *uap)
598 struct proc *p = curproc;
599 struct trapframe *regs;
605 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
608 regs = p->p_md.md_regs;
609 eflags = ucp->uc_mcontext.mc_eflags;
611 if (eflags & PSL_VM) {
612 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
613 struct vm86_kernel *vm86;
616 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
617 * set up the vm86 area, and we can't enter vm86 mode.
619 if (p->p_thread->td_pcb->pcb_ext == 0)
621 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
622 if (vm86->vm86_inited == 0)
625 /* go back to user mode if both flags are set */
626 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
627 trapsignal(p, SIGBUS, 0);
629 if (vm86->vm86_has_vme) {
630 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
631 (eflags & VME_USERCHANGE) | PSL_VM;
633 vm86->vm86_eflags = eflags; /* save VIF, VIP */
634 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
636 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
637 tf->tf_eflags = eflags;
638 tf->tf_vm86_ds = tf->tf_ds;
639 tf->tf_vm86_es = tf->tf_es;
640 tf->tf_vm86_fs = tf->tf_fs;
641 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
642 tf->tf_ds = _udatasel;
643 tf->tf_es = _udatasel;
644 tf->tf_fs = _udatasel;
647 * Don't allow users to change privileged or reserved flags.
650 * XXX do allow users to change the privileged flag PSL_RF.
651 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
652 * should sometimes set it there too. tf_eflags is kept in
653 * the signal context during signal handling and there is no
654 * other place to remember it, so the PSL_RF bit may be
655 * corrupted by the signal handler without us knowing.
656 * Corruption of the PSL_RF bit at worst causes one more or
657 * one less debugger trap, so allowing it is fairly harmless.
659 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
660 printf("sigreturn: eflags = 0x%x\n", eflags);
665 * Don't allow users to load a valid privileged %cs. Let the
666 * hardware check for invalid selectors, excess privilege in
667 * other selectors, invalid %eip's and invalid %esp's.
669 cs = ucp->uc_mcontext.mc_cs;
670 if (!CS_SECURE(cs)) {
671 printf("sigreturn: cs = 0x%x\n", cs);
672 trapsignal(p, SIGBUS, T_PROTFLT);
675 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
678 if (ucp->uc_mcontext.mc_onstack & 1)
679 p->p_sigstk.ss_flags |= SS_ONSTACK;
681 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
683 p->p_sigmask = ucp->uc_sigmask;
684 SIG_CANTMASK(p->p_sigmask);
689 * Machine dependent boot() routine
691 * I haven't seen anything to put here yet
692 * Possibly some stuff might be grafted back here from boot()
700 * Shutdown the CPU as much as possible
710 * cpu_idle() represents the idle LWKT. You cannot return from this function
711 * (unless you want to blow things up!). Instead we look for runnable threads
712 * and loop or halt as appropriate. Giant is not held on entry to the thread.
714 * The main loop is entered with a critical section held, we must release
715 * the critical section before doing anything else. lwkt_switch() will
716 * check for pending interrupts due to entering and exiting its own
719 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
720 * to wake a HLTed cpu up. However, there are cases where the idlethread
721 * will be entered with the possibility that no IPI will occur and in such
722 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
724 static int cpu_idle_hlt = 1;
725 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
726 &cpu_idle_hlt, 0, "Idle loop HLT enable");
731 struct thread *td = curthread;
734 KKASSERT(td->td_pri < TDPRI_CRIT);
737 * See if there are any LWKTs ready to go.
742 * If we are going to halt call splz unconditionally after
743 * CLIing to catch any interrupt races. Note that we are
744 * at SPL0 and interrupts are enabled.
746 if (cpu_idle_hlt && !lwkt_runnable() &&
747 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
749 * We must guarentee that hlt is exactly the instruction
752 __asm __volatile("cli");
754 __asm __volatile("sti; hlt");
756 td->td_flags &= ~TDF_IDLE_NOHLT;
757 __asm __volatile("sti");
763 * Clear registers on exec
766 setregs(p, entry, stack, ps_strings)
772 struct trapframe *regs = p->p_md.md_regs;
773 struct pcb *pcb = p->p_thread->td_pcb;
775 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
776 pcb->pcb_gs = _udatasel;
780 /* was i386_user_cleanup() in NetBSD */
784 bzero((char *)regs, sizeof(struct trapframe));
785 regs->tf_eip = entry;
786 regs->tf_esp = stack;
787 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
788 regs->tf_ss = _udatasel;
789 regs->tf_ds = _udatasel;
790 regs->tf_es = _udatasel;
791 regs->tf_fs = _udatasel;
792 regs->tf_cs = _ucodesel;
794 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
795 regs->tf_ebx = ps_strings;
798 * Reset the hardware debug registers if they were in use.
799 * They won't have any meaning for the newly exec'd process.
801 if (pcb->pcb_flags & PCB_DBREGS) {
808 if (pcb == curthread->td_pcb) {
810 * Clear the debug registers on the running
811 * CPU, otherwise they will end up affecting
812 * the next process we switch to.
816 pcb->pcb_flags &= ~PCB_DBREGS;
820 * Initialize the math emulator (if any) for the current process.
821 * Actually, just clear the bit that says that the emulator has
822 * been initialized. Initialization is delayed until the process
823 * traps to the emulator (if it is done at all) mainly because
824 * emulators don't provide an entry point for initialization.
826 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
829 * Arrange to trap the next npx or `fwait' instruction (see npx.c
830 * for why fwait must be trapped at least if there is an npx or an
831 * emulator). This is mainly to handle the case where npx0 is not
832 * configured, since the npx routines normally set up the trap
833 * otherwise. It should be done only at boot time, but doing it
834 * here allows modifying `npx_exists' for testing the emulator on
835 * systems with an npx.
837 load_cr0(rcr0() | CR0_MP | CR0_TS);
840 /* Initialize the npx (if any) for the current process. */
841 npxinit(__INITIAL_NPXCW__);
845 * note: linux emulator needs edx to be 0x0 on entry, which is
846 * handled in execve simply by setting the 64 bit syscall
857 cr0 |= CR0_NE; /* Done by npxinit() */
858 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
860 if (cpu_class != CPUCLASS_386)
862 cr0 |= CR0_WP | CR0_AM;
868 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
871 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
873 if (!error && req->newptr)
878 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
879 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
881 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
882 CTLFLAG_RW, &disable_rtc_set, 0, "");
884 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
885 CTLFLAG_RD, &bootinfo, bootinfo, "");
887 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
888 CTLFLAG_RW, &wall_cmos_clock, 0, "");
890 extern u_long bootdev; /* not a dev_t - encoding is different */
891 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
892 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
895 * Initialize 386 and configure to run kernel
899 * Initialize segments & interrupt table
903 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
904 static struct gate_descriptor idt0[NIDT];
905 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
906 union descriptor ldt[NLDT]; /* local descriptor table */
908 /* table descriptors - used to load tables by cpu */
909 struct region_descriptor r_gdt, r_idt;
911 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
912 extern int has_f00f_bug;
915 static struct i386tss dblfault_tss;
916 static char dblfault_stack[PAGE_SIZE];
918 extern struct user *proc0paddr;
921 /* software prototypes -- in more palatable form */
922 struct soft_segment_descriptor gdt_segs[] = {
923 /* GNULL_SEL 0 Null Descriptor */
924 { 0x0, /* segment base address */
926 0, /* segment type */
927 0, /* segment descriptor priority level */
928 0, /* segment descriptor present */
930 0, /* default 32 vs 16 bit size */
931 0 /* limit granularity (byte/page units)*/ },
932 /* GCODE_SEL 1 Code Descriptor for kernel */
933 { 0x0, /* segment base address */
934 0xfffff, /* length - all address space */
935 SDT_MEMERA, /* segment type */
936 0, /* segment descriptor priority level */
937 1, /* segment descriptor present */
939 1, /* default 32 vs 16 bit size */
940 1 /* limit granularity (byte/page units)*/ },
941 /* GDATA_SEL 2 Data Descriptor for kernel */
942 { 0x0, /* segment base address */
943 0xfffff, /* length - all address space */
944 SDT_MEMRWA, /* segment type */
945 0, /* segment descriptor priority level */
946 1, /* segment descriptor present */
948 1, /* default 32 vs 16 bit size */
949 1 /* limit granularity (byte/page units)*/ },
950 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
951 { 0x0, /* segment base address */
952 0xfffff, /* length - all address space */
953 SDT_MEMRWA, /* segment type */
954 0, /* segment descriptor priority level */
955 1, /* segment descriptor present */
957 1, /* default 32 vs 16 bit size */
958 1 /* limit granularity (byte/page units)*/ },
959 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
961 0x0, /* segment base address */
962 sizeof(struct i386tss)-1,/* length - all address space */
963 SDT_SYS386TSS, /* segment type */
964 0, /* segment descriptor priority level */
965 1, /* segment descriptor present */
967 0, /* unused - default 32 vs 16 bit size */
968 0 /* limit granularity (byte/page units)*/ },
969 /* GLDT_SEL 5 LDT Descriptor */
970 { (int) ldt, /* segment base address */
971 sizeof(ldt)-1, /* length - all address space */
972 SDT_SYSLDT, /* segment type */
973 SEL_UPL, /* segment descriptor priority level */
974 1, /* segment descriptor present */
976 0, /* unused - default 32 vs 16 bit size */
977 0 /* limit granularity (byte/page units)*/ },
978 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
979 { (int) ldt, /* segment base address */
980 (512 * sizeof(union descriptor)-1), /* length */
981 SDT_SYSLDT, /* segment type */
982 0, /* segment descriptor priority level */
983 1, /* segment descriptor present */
985 0, /* unused - default 32 vs 16 bit size */
986 0 /* limit granularity (byte/page units)*/ },
987 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
988 { 0x0, /* segment base address */
989 0x0, /* length - all address space */
990 0, /* segment type */
991 0, /* segment descriptor priority level */
992 0, /* segment descriptor present */
994 0, /* default 32 vs 16 bit size */
995 0 /* limit granularity (byte/page units)*/ },
996 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
997 { 0x400, /* segment base address */
998 0xfffff, /* length */
999 SDT_MEMRWA, /* segment type */
1000 0, /* segment descriptor priority level */
1001 1, /* segment descriptor present */
1003 1, /* default 32 vs 16 bit size */
1004 1 /* limit granularity (byte/page units)*/ },
1005 /* GPANIC_SEL 9 Panic Tss Descriptor */
1006 { (int) &dblfault_tss, /* segment base address */
1007 sizeof(struct i386tss)-1,/* length - all address space */
1008 SDT_SYS386TSS, /* segment type */
1009 0, /* segment descriptor priority level */
1010 1, /* segment descriptor present */
1012 0, /* unused - default 32 vs 16 bit size */
1013 0 /* limit granularity (byte/page units)*/ },
1014 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1015 { 0, /* segment base address (overwritten) */
1016 0xfffff, /* length */
1017 SDT_MEMERA, /* segment type */
1018 0, /* segment descriptor priority level */
1019 1, /* segment descriptor present */
1021 0, /* default 32 vs 16 bit size */
1022 1 /* limit granularity (byte/page units)*/ },
1023 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1024 { 0, /* segment base address (overwritten) */
1025 0xfffff, /* length */
1026 SDT_MEMERA, /* segment type */
1027 0, /* segment descriptor priority level */
1028 1, /* segment descriptor present */
1030 0, /* default 32 vs 16 bit size */
1031 1 /* limit granularity (byte/page units)*/ },
1032 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1033 { 0, /* segment base address (overwritten) */
1034 0xfffff, /* length */
1035 SDT_MEMRWA, /* segment type */
1036 0, /* segment descriptor priority level */
1037 1, /* segment descriptor present */
1039 1, /* default 32 vs 16 bit size */
1040 1 /* limit granularity (byte/page units)*/ },
1041 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1042 { 0, /* segment base address (overwritten) */
1043 0xfffff, /* length */
1044 SDT_MEMRWA, /* segment type */
1045 0, /* segment descriptor priority level */
1046 1, /* segment descriptor present */
1048 0, /* default 32 vs 16 bit size */
1049 1 /* limit granularity (byte/page units)*/ },
1050 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1051 { 0, /* segment base address (overwritten) */
1052 0xfffff, /* length */
1053 SDT_MEMRWA, /* segment type */
1054 0, /* segment descriptor priority level */
1055 1, /* segment descriptor present */
1057 0, /* default 32 vs 16 bit size */
1058 1 /* limit granularity (byte/page units)*/ },
1061 static struct soft_segment_descriptor ldt_segs[] = {
1062 /* Null Descriptor - overwritten by call gate */
1063 { 0x0, /* segment base address */
1064 0x0, /* length - all address space */
1065 0, /* segment type */
1066 0, /* segment descriptor priority level */
1067 0, /* segment descriptor present */
1069 0, /* default 32 vs 16 bit size */
1070 0 /* limit granularity (byte/page units)*/ },
1071 /* Null Descriptor - overwritten by call gate */
1072 { 0x0, /* segment base address */
1073 0x0, /* length - all address space */
1074 0, /* segment type */
1075 0, /* segment descriptor priority level */
1076 0, /* segment descriptor present */
1078 0, /* default 32 vs 16 bit size */
1079 0 /* limit granularity (byte/page units)*/ },
1080 /* Null Descriptor - overwritten by call gate */
1081 { 0x0, /* segment base address */
1082 0x0, /* length - all address space */
1083 0, /* segment type */
1084 0, /* segment descriptor priority level */
1085 0, /* segment descriptor present */
1087 0, /* default 32 vs 16 bit size */
1088 0 /* limit granularity (byte/page units)*/ },
1089 /* Code Descriptor for user */
1090 { 0x0, /* segment base address */
1091 0xfffff, /* length - all address space */
1092 SDT_MEMERA, /* segment type */
1093 SEL_UPL, /* segment descriptor priority level */
1094 1, /* segment descriptor present */
1096 1, /* default 32 vs 16 bit size */
1097 1 /* limit granularity (byte/page units)*/ },
1098 /* Null Descriptor - overwritten by call gate */
1099 { 0x0, /* segment base address */
1100 0x0, /* length - all address space */
1101 0, /* segment type */
1102 0, /* segment descriptor priority level */
1103 0, /* segment descriptor present */
1105 0, /* default 32 vs 16 bit size */
1106 0 /* limit granularity (byte/page units)*/ },
1107 /* Data Descriptor for user */
1108 { 0x0, /* segment base address */
1109 0xfffff, /* length - all address space */
1110 SDT_MEMRWA, /* segment type */
1111 SEL_UPL, /* segment descriptor priority level */
1112 1, /* segment descriptor present */
1114 1, /* default 32 vs 16 bit size */
1115 1 /* limit granularity (byte/page units)*/ },
1119 setidt(idx, func, typ, dpl, selec)
1126 struct gate_descriptor *ip;
1129 ip->gd_looffset = (int)func;
1130 ip->gd_selector = selec;
1136 ip->gd_hioffset = ((int)func)>>16 ;
1139 #define IDTVEC(name) __CONCAT(X,name)
1142 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1143 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1144 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1145 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1146 IDTVEC(xmm), IDTVEC(syscall),
1149 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall);
1151 #ifdef DEBUG_INTERRUPTS
1152 extern inthand_t *Xrsvdary[256];
1157 struct segment_descriptor *sd;
1158 struct soft_segment_descriptor *ssd;
1160 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1161 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1162 ssd->ssd_type = sd->sd_type;
1163 ssd->ssd_dpl = sd->sd_dpl;
1164 ssd->ssd_p = sd->sd_p;
1165 ssd->ssd_def32 = sd->sd_def32;
1166 ssd->ssd_gran = sd->sd_gran;
1169 #define PHYSMAP_SIZE (2 * 8)
1172 * Populate the (physmap) array with base/bound pairs describing the
1173 * available physical memory in the system, then test this memory and
1174 * build the phys_avail array describing the actually-available memory.
1176 * If we cannot accurately determine the physical memory map, then use
1177 * value from the 0xE801 call, and failing that, the RTC.
1179 * Total memory size may be set by the kernel environment variable
1180 * hw.physmem or the compile-time define MAXMEM.
1183 getmemsize(int first)
1185 int i, physmap_idx, pa_indx;
1187 u_int basemem, extmem;
1188 struct vm86frame vmf;
1189 struct vm86context vmc;
1190 vm_offset_t pa, physmap[PHYSMAP_SIZE];
1200 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1201 bzero(&vmf, sizeof(struct vm86frame));
1202 bzero(physmap, sizeof(physmap));
1206 * Some newer BIOSes has broken INT 12H implementation which cause
1207 * kernel panic immediately. In this case, we need to scan SMAP
1208 * with INT 15:E820 first, then determine base memory size.
1210 if (hasbrokenint12) {
1215 * Perform "base memory" related probes & setup
1217 vm86_intcall(0x12, &vmf);
1218 basemem = vmf.vmf_ax;
1219 if (basemem > 640) {
1220 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1226 * XXX if biosbasemem is now < 640, there is a `hole'
1227 * between the end of base memory and the start of
1228 * ISA memory. The hole may be empty or it may
1229 * contain BIOS code or data. Map it read/write so
1230 * that the BIOS can write to it. (Memory from 0 to
1231 * the physical end of the kernel is mapped read-only
1232 * to begin with and then parts of it are remapped.
1233 * The parts that aren't remapped form holes that
1234 * remain read-only and are unused by the kernel.
1235 * The base memory area is below the physical end of
1236 * the kernel and right now forms a read-only hole.
1237 * The part of it from PAGE_SIZE to
1238 * (trunc_page(biosbasemem * 1024) - 1) will be
1239 * remapped and used by the kernel later.)
1241 * This code is similar to the code used in
1242 * pmap_mapdev, but since no memory needs to be
1243 * allocated we simply change the mapping.
1245 for (pa = trunc_page(basemem * 1024);
1246 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1247 pte = vtopte(pa + KERNBASE);
1248 *pte = pa | PG_RW | PG_V;
1252 * if basemem != 640, map pages r/w into vm86 page table so
1253 * that the bios can scribble on it.
1256 for (i = basemem / 4; i < 160; i++)
1257 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1261 * map page 1 R/W into the kernel page table so we can use it
1262 * as a buffer. The kernel will unmap this page later.
1264 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1265 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1268 * get memory map with INT 15:E820
1270 #define SMAPSIZ sizeof(*smap)
1271 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1274 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1275 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1280 vmf.vmf_eax = 0xE820;
1281 vmf.vmf_edx = SMAP_SIG;
1282 vmf.vmf_ecx = SMAPSIZ;
1283 i = vm86_datacall(0x15, &vmf, &vmc);
1284 if (i || vmf.vmf_eax != SMAP_SIG)
1286 if (boothowto & RB_VERBOSE)
1287 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1289 *(u_int32_t *)((char *)&smap->base + 4),
1290 (u_int32_t)smap->base,
1291 *(u_int32_t *)((char *)&smap->length + 4),
1292 (u_int32_t)smap->length);
1294 if (smap->type != 0x01)
1297 if (smap->length == 0)
1300 if (smap->base >= 0xffffffff) {
1301 printf("%uK of memory above 4GB ignored\n",
1302 (u_int)(smap->length / 1024));
1306 for (i = 0; i <= physmap_idx; i += 2) {
1307 if (smap->base < physmap[i + 1]) {
1308 if (boothowto & RB_VERBOSE)
1310 "Overlapping or non-montonic memory region, ignoring second region\n");
1315 if (smap->base == physmap[physmap_idx + 1]) {
1316 physmap[physmap_idx + 1] += smap->length;
1321 if (physmap_idx == PHYSMAP_SIZE) {
1323 "Too many segments in the physical address map, giving up\n");
1326 physmap[physmap_idx] = smap->base;
1327 physmap[physmap_idx + 1] = smap->base + smap->length;
1329 } while (vmf.vmf_ebx != 0);
1332 * Perform "base memory" related probes & setup based on SMAP
1335 for (i = 0; i <= physmap_idx; i += 2) {
1336 if (physmap[i] == 0x00000000) {
1337 basemem = physmap[i + 1] / 1024;
1346 if (basemem > 640) {
1347 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1352 for (pa = trunc_page(basemem * 1024);
1353 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1354 pte = vtopte(pa + KERNBASE);
1355 *pte = pa | PG_RW | PG_V;
1359 for (i = basemem / 4; i < 160; i++)
1360 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1363 if (physmap[1] != 0)
1367 * If we failed above, try memory map with INT 15:E801
1369 vmf.vmf_ax = 0xE801;
1370 if (vm86_intcall(0x15, &vmf) == 0) {
1371 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1375 vm86_intcall(0x15, &vmf);
1376 extmem = vmf.vmf_ax;
1379 * Prefer the RTC value for extended memory.
1381 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1386 * Special hack for chipsets that still remap the 384k hole when
1387 * there's 16MB of memory - this really confuses people that
1388 * are trying to use bus mastering ISA controllers with the
1389 * "16MB limit"; they only have 16MB, but the remapping puts
1390 * them beyond the limit.
1392 * If extended memory is between 15-16MB (16-17MB phys address range),
1395 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1399 physmap[1] = basemem * 1024;
1401 physmap[physmap_idx] = 0x100000;
1402 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1406 * Now, physmap contains a map of physical memory.
1410 /* make hole for AP bootstrap code YYY */
1411 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1413 /* look for the MP hardware - needed for apic addresses */
1418 * Maxmem isn't the "maximum memory", it's one larger than the
1419 * highest page of the physical address space. It should be
1420 * called something like "Maxphyspage". We may adjust this
1421 * based on ``hw.physmem'' and the results of the memory test.
1423 Maxmem = atop(physmap[physmap_idx + 1]);
1426 Maxmem = MAXMEM / 4;
1430 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
1431 * for the appropriate modifiers. This overrides MAXMEM.
1433 if ((cp = getenv("hw.physmem")) != NULL) {
1434 u_int64_t AllowMem, sanity;
1437 sanity = AllowMem = strtouq(cp, &ep, 0);
1438 if ((ep != cp) && (*ep != 0)) {
1451 AllowMem = sanity = 0;
1453 if (AllowMem < sanity)
1457 printf("Ignoring invalid memory size of '%s'\n", cp);
1459 Maxmem = atop(AllowMem);
1462 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1463 (boothowto & RB_VERBOSE))
1464 printf("Physical memory use set to %lluK\n", Maxmem * 4);
1467 * If Maxmem has been increased beyond what the system has detected,
1468 * extend the last memory segment to the new limit.
1470 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1471 physmap[physmap_idx + 1] = ptoa(Maxmem);
1473 /* call pmap initialization to make new kernel address space */
1474 pmap_bootstrap(first, 0);
1477 * Size up each available chunk of physical memory.
1479 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1481 phys_avail[pa_indx++] = physmap[0];
1482 phys_avail[pa_indx] = physmap[0];
1486 * physmap is in bytes, so when converting to page boundaries,
1487 * round up the start address and round down the end address.
1489 for (i = 0; i <= physmap_idx; i += 2) {
1493 if (physmap[i + 1] < end)
1494 end = trunc_page(physmap[i + 1]);
1495 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1500 int *ptr = (int *)CADDR1;
1504 * block out kernel memory as not available.
1506 if (pa >= 0x100000 && pa < first)
1512 * map page into kernel: valid, read/write,non-cacheable
1514 *pte = pa | PG_V | PG_RW | PG_N;
1519 * Test for alternating 1's and 0's
1521 *(volatile int *)ptr = 0xaaaaaaaa;
1522 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1526 * Test for alternating 0's and 1's
1528 *(volatile int *)ptr = 0x55555555;
1529 if (*(volatile int *)ptr != 0x55555555) {
1535 *(volatile int *)ptr = 0xffffffff;
1536 if (*(volatile int *)ptr != 0xffffffff) {
1542 *(volatile int *)ptr = 0x0;
1543 if (*(volatile int *)ptr != 0x0) {
1547 * Restore original value.
1552 * Adjust array of valid/good pages.
1554 if (page_bad == TRUE) {
1558 * If this good page is a continuation of the
1559 * previous set of good pages, then just increase
1560 * the end pointer. Otherwise start a new chunk.
1561 * Note that "end" points one higher than end,
1562 * making the range >= start and < end.
1563 * If we're also doing a speculative memory
1564 * test and we at or past the end, bump up Maxmem
1565 * so that we keep going. The first bad page
1566 * will terminate the loop.
1568 if (phys_avail[pa_indx] == pa) {
1569 phys_avail[pa_indx] += PAGE_SIZE;
1572 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1573 printf("Too many holes in the physical address space, giving up\n");
1577 phys_avail[pa_indx++] = pa; /* start */
1578 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1588 * The last chunk must contain at least one page plus the message
1589 * buffer to avoid complicating other code (message buffer address
1590 * calculation, etc.).
1592 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1593 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1594 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1595 phys_avail[pa_indx--] = 0;
1596 phys_avail[pa_indx--] = 0;
1599 Maxmem = atop(phys_avail[pa_indx]);
1601 /* Trim off space for the message buffer. */
1602 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1604 avail_end = phys_avail[pa_indx];
1616 * 7 Device Not Available (x87)
1618 * 9 Coprocessor Segment overrun (unsupported, reserved)
1620 * 11 Segment not present
1622 * 13 General Protection
1625 * 16 x87 FP Exception pending
1626 * 17 Alignment Check
1628 * 19 SIMD floating point
1630 * 32-255 INTn/external sources
1635 struct gate_descriptor *gdp;
1636 int gsel_tss, metadata_missing, off, x;
1637 struct mdglobaldata *gd;
1640 * Prevent lowering of the ipl if we call tsleep() early.
1642 gd = &CPU_prvspace[0].mdglobaldata;
1643 bzero(gd, sizeof(*gd));
1645 gd->mi.gd_curthread = &thread0;
1647 atdevbase = ISA_HOLE_START + KERNBASE;
1649 metadata_missing = 0;
1650 if (bootinfo.bi_modulep) {
1651 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1652 preload_bootstrap_relocate(KERNBASE);
1654 metadata_missing = 1;
1656 if (bootinfo.bi_envp)
1657 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1659 /* start with one cpu */
1661 /* Init basic tunables, hz etc */
1665 * make gdt memory segments, the code segment goes up to end of the
1666 * page with etext in it, the data segment goes to the end of
1670 * XXX text protection is temporarily (?) disabled. The limit was
1671 * i386_btop(round_page(etext)) - 1.
1673 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1674 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1676 gdt_segs[GPRIV_SEL].ssd_limit =
1677 atop(sizeof(struct privatespace) - 1);
1678 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1679 gdt_segs[GPROC0_SEL].ssd_base =
1680 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1682 gd->mi.gd_prvspace = &CPU_prvspace[0];
1685 * Note: on both UP and SMP curthread must be set non-NULL
1686 * early in the boot sequence because the system assumes
1687 * that 'curthread' is never NULL.
1690 for (x = 0; x < NGDT; x++) {
1692 /* avoid overwriting db entries with APM ones */
1693 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1696 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1699 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1700 r_gdt.rd_base = (int) gdt;
1703 mi_gdinit(&gd->mi, 0);
1705 lwkt_init_thread(&thread0, proc0paddr, 0, &gd->mi);
1706 lwkt_set_comm(&thread0, "thread0");
1707 proc0.p_addr = (void *)thread0.td_kstack;
1708 proc0.p_thread = &thread0;
1709 proc0.p_flag |= P_CP_RELEASED; /* early set. See also init_main.c */
1710 thread0.td_flags |= TDF_RUNNING;
1711 thread0.td_proc = &proc0;
1712 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1713 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1715 /* make ldt memory segments */
1717 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1718 * should be spelled ...MAX_USER...
1720 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1721 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1722 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1723 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1725 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1728 gd->gd_currentldt = _default_ldt;
1730 /* spinlocks and the BGL */
1734 for (x = 0; x < NIDT; x++) {
1735 #ifdef DEBUG_INTERRUPTS
1736 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1738 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1741 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1742 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1743 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1744 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1745 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1746 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1747 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1748 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1749 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1750 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1751 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1752 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1753 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1754 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1755 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1756 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1757 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1758 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1759 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1760 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1761 setidt(0x80, &IDTVEC(int0x80_syscall),
1762 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1763 setidt(0x81, &IDTVEC(int0x81_syscall),
1764 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1766 r_idt.rd_limit = sizeof(idt0) - 1;
1767 r_idt.rd_base = (int) idt;
1771 * Initialize the console before we print anything out.
1775 if (metadata_missing)
1776 printf("WARNING: loader(8) metadata is missing!\n");
1785 if (boothowto & RB_KDB)
1786 Debugger("Boot flags requested debugger");
1789 finishidentcpu(); /* Final stage of CPU initialization */
1790 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1791 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1792 initializecpu(); /* Initialize CPU registers */
1795 * make an initial tss so cpu can get interrupt stack on syscall!
1796 * The 16 bytes is to save room for a VM86 context.
1798 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1799 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
1800 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1801 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1802 gd->gd_common_tssd = *gd->gd_tss_gdt;
1803 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
1806 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1807 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1808 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1809 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1810 dblfault_tss.tss_cr3 = (int)IdlePTD;
1811 dblfault_tss.tss_eip = (int) dblfault_handler;
1812 dblfault_tss.tss_eflags = PSL_KERNEL;
1813 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1814 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1815 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1816 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1817 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1821 init_param2(physmem);
1823 /* now running on new page tables, configured,and u/iom is accessible */
1825 /* Map the message buffer. */
1826 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1827 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1829 msgbufinit(msgbufp, MSGBUF_SIZE);
1831 /* make a call gate to reenter kernel with */
1832 gdp = &ldt[LSYS5CALLS_SEL].gd;
1834 x = (int) &IDTVEC(syscall);
1835 gdp->gd_looffset = x++;
1836 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
1838 gdp->gd_type = SDT_SYS386CGT;
1839 gdp->gd_dpl = SEL_UPL;
1841 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
1843 /* XXX does this work? */
1844 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
1845 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
1847 /* transfer to user mode */
1849 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
1850 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
1852 /* setup proc 0's pcb */
1853 thread0.td_pcb->pcb_flags = 0;
1854 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
1855 thread0.td_pcb->pcb_ext = 0;
1856 proc0.p_md.md_regs = &proc0_tf;
1860 * Initialize machine-dependant portions of the global data structure.
1861 * Note that the global data area and cpu0's idlestack in the private
1862 * data space were allocated in locore.
1864 * Note: the idlethread's cpl is 0
1866 * WARNING! Called from early boot, 'mycpu' may not work yet.
1869 cpu_gdinit(struct mdglobaldata *gd, int cpu)
1874 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1876 sp = gd->mi.gd_prvspace->idlestack;
1877 lwkt_init_thread(&gd->mi.gd_idlethread, sp, 0, &gd->mi);
1878 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1879 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1880 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1881 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
1885 globaldata_find(int cpu)
1887 KKASSERT(cpu >= 0 && cpu < ncpus);
1888 return(&CPU_prvspace[cpu].mdglobaldata.mi);
1891 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1892 static void f00f_hack(void *unused);
1893 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
1896 f00f_hack(void *unused)
1898 struct gate_descriptor *new_idt;
1904 printf("Intel Pentium detected, installing workaround for F00F bug\n");
1906 r_idt.rd_limit = sizeof(idt0) - 1;
1908 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
1910 panic("kmem_alloc returned 0");
1911 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
1912 panic("kmem_alloc returned non-page-aligned memory");
1913 /* Put the first seven entries in the lower page */
1914 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
1915 bcopy(idt, new_idt, sizeof(idt0));
1916 r_idt.rd_base = (int)new_idt;
1919 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
1920 VM_PROT_READ, FALSE) != KERN_SUCCESS)
1921 panic("vm_map_protect failed");
1924 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
1927 ptrace_set_pc(p, addr)
1931 p->p_md.md_regs->tf_eip = addr;
1936 ptrace_single_step(p)
1939 p->p_md.md_regs->tf_eflags |= PSL_T;
1943 int ptrace_read_u_check(p, addr, len)
1950 if ((vm_offset_t) (addr + len) < addr)
1952 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
1955 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
1957 if ((vm_offset_t) addr < gap)
1959 if ((vm_offset_t) (addr + len) <=
1960 (vm_offset_t) (gap + sizeof(struct trapframe)))
1965 int ptrace_write_u(p, off, data)
1970 struct trapframe frame_copy;
1972 struct trapframe *tp;
1975 * Privileged kernel state is scattered all over the user area.
1976 * Only allow write access to parts of regs and to fpregs.
1978 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
1979 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
1980 tp = p->p_md.md_regs;
1982 *(int *)((char *)&frame_copy + (off - min)) = data;
1983 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
1984 !CS_SECURE(frame_copy.tf_cs))
1986 *(int*)((char *)p->p_addr + off) = data;
1991 * The PCB is at the end of the user area YYY
1993 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
1994 min += offsetof(struct pcb, pcb_save);
1995 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
1996 *(int*)((char *)p->p_addr + off) = data;
2008 struct trapframe *tp;
2010 tp = p->p_md.md_regs;
2011 regs->r_fs = tp->tf_fs;
2012 regs->r_es = tp->tf_es;
2013 regs->r_ds = tp->tf_ds;
2014 regs->r_edi = tp->tf_edi;
2015 regs->r_esi = tp->tf_esi;
2016 regs->r_ebp = tp->tf_ebp;
2017 regs->r_ebx = tp->tf_ebx;
2018 regs->r_edx = tp->tf_edx;
2019 regs->r_ecx = tp->tf_ecx;
2020 regs->r_eax = tp->tf_eax;
2021 regs->r_eip = tp->tf_eip;
2022 regs->r_cs = tp->tf_cs;
2023 regs->r_eflags = tp->tf_eflags;
2024 regs->r_esp = tp->tf_esp;
2025 regs->r_ss = tp->tf_ss;
2026 pcb = p->p_thread->td_pcb;
2027 regs->r_gs = pcb->pcb_gs;
2037 struct trapframe *tp;
2039 tp = p->p_md.md_regs;
2040 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2041 !CS_SECURE(regs->r_cs))
2043 tp->tf_fs = regs->r_fs;
2044 tp->tf_es = regs->r_es;
2045 tp->tf_ds = regs->r_ds;
2046 tp->tf_edi = regs->r_edi;
2047 tp->tf_esi = regs->r_esi;
2048 tp->tf_ebp = regs->r_ebp;
2049 tp->tf_ebx = regs->r_ebx;
2050 tp->tf_edx = regs->r_edx;
2051 tp->tf_ecx = regs->r_ecx;
2052 tp->tf_eax = regs->r_eax;
2053 tp->tf_eip = regs->r_eip;
2054 tp->tf_cs = regs->r_cs;
2055 tp->tf_eflags = regs->r_eflags;
2056 tp->tf_esp = regs->r_esp;
2057 tp->tf_ss = regs->r_ss;
2058 pcb = p->p_thread->td_pcb;
2059 pcb->pcb_gs = regs->r_gs;
2063 #ifndef CPU_DISABLE_SSE
2065 fill_fpregs_xmm(sv_xmm, sv_87)
2066 struct savexmm *sv_xmm;
2067 struct save87 *sv_87;
2069 struct env87 *penv_87 = &sv_87->sv_env;
2070 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2073 /* FPU control/status */
2074 penv_87->en_cw = penv_xmm->en_cw;
2075 penv_87->en_sw = penv_xmm->en_sw;
2076 penv_87->en_tw = penv_xmm->en_tw;
2077 penv_87->en_fip = penv_xmm->en_fip;
2078 penv_87->en_fcs = penv_xmm->en_fcs;
2079 penv_87->en_opcode = penv_xmm->en_opcode;
2080 penv_87->en_foo = penv_xmm->en_foo;
2081 penv_87->en_fos = penv_xmm->en_fos;
2084 for (i = 0; i < 8; ++i)
2085 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2087 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2091 set_fpregs_xmm(sv_87, sv_xmm)
2092 struct save87 *sv_87;
2093 struct savexmm *sv_xmm;
2095 struct env87 *penv_87 = &sv_87->sv_env;
2096 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2099 /* FPU control/status */
2100 penv_xmm->en_cw = penv_87->en_cw;
2101 penv_xmm->en_sw = penv_87->en_sw;
2102 penv_xmm->en_tw = penv_87->en_tw;
2103 penv_xmm->en_fip = penv_87->en_fip;
2104 penv_xmm->en_fcs = penv_87->en_fcs;
2105 penv_xmm->en_opcode = penv_87->en_opcode;
2106 penv_xmm->en_foo = penv_87->en_foo;
2107 penv_xmm->en_fos = penv_87->en_fos;
2110 for (i = 0; i < 8; ++i)
2111 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2113 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2115 #endif /* CPU_DISABLE_SSE */
2118 fill_fpregs(p, fpregs)
2120 struct fpreg *fpregs;
2122 #ifndef CPU_DISABLE_SSE
2124 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
2125 (struct save87 *)fpregs);
2128 #endif /* CPU_DISABLE_SSE */
2129 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2134 set_fpregs(p, fpregs)
2136 struct fpreg *fpregs;
2138 #ifndef CPU_DISABLE_SSE
2140 set_fpregs_xmm((struct save87 *)fpregs,
2141 &p->p_thread->td_pcb->pcb_save.sv_xmm);
2144 #endif /* CPU_DISABLE_SSE */
2145 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2150 fill_dbregs(p, dbregs)
2152 struct dbreg *dbregs;
2157 dbregs->dr0 = rdr0();
2158 dbregs->dr1 = rdr1();
2159 dbregs->dr2 = rdr2();
2160 dbregs->dr3 = rdr3();
2161 dbregs->dr4 = rdr4();
2162 dbregs->dr5 = rdr5();
2163 dbregs->dr6 = rdr6();
2164 dbregs->dr7 = rdr7();
2167 pcb = p->p_thread->td_pcb;
2168 dbregs->dr0 = pcb->pcb_dr0;
2169 dbregs->dr1 = pcb->pcb_dr1;
2170 dbregs->dr2 = pcb->pcb_dr2;
2171 dbregs->dr3 = pcb->pcb_dr3;
2174 dbregs->dr6 = pcb->pcb_dr6;
2175 dbregs->dr7 = pcb->pcb_dr7;
2181 set_dbregs(p, dbregs)
2183 struct dbreg *dbregs;
2187 u_int32_t mask1, mask2;
2190 load_dr0(dbregs->dr0);
2191 load_dr1(dbregs->dr1);
2192 load_dr2(dbregs->dr2);
2193 load_dr3(dbregs->dr3);
2194 load_dr4(dbregs->dr4);
2195 load_dr5(dbregs->dr5);
2196 load_dr6(dbregs->dr6);
2197 load_dr7(dbregs->dr7);
2201 * Don't let an illegal value for dr7 get set. Specifically,
2202 * check for undefined settings. Setting these bit patterns
2203 * result in undefined behaviour and can lead to an unexpected
2206 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2207 i++, mask1 <<= 2, mask2 <<= 2)
2208 if ((dbregs->dr7 & mask1) == mask2)
2211 pcb = p->p_thread->td_pcb;
2214 * Don't let a process set a breakpoint that is not within the
2215 * process's address space. If a process could do this, it
2216 * could halt the system by setting a breakpoint in the kernel
2217 * (if ddb was enabled). Thus, we need to check to make sure
2218 * that no breakpoints are being enabled for addresses outside
2219 * process's address space, unless, perhaps, we were called by
2222 * XXX - what about when the watched area of the user's
2223 * address space is written into from within the kernel
2224 * ... wouldn't that still cause a breakpoint to be generated
2225 * from within kernel mode?
2228 if (suser_cred(p->p_ucred, 0) != 0) {
2229 if (dbregs->dr7 & 0x3) {
2230 /* dr0 is enabled */
2231 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2235 if (dbregs->dr7 & (0x3<<2)) {
2236 /* dr1 is enabled */
2237 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2241 if (dbregs->dr7 & (0x3<<4)) {
2242 /* dr2 is enabled */
2243 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2247 if (dbregs->dr7 & (0x3<<6)) {
2248 /* dr3 is enabled */
2249 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2254 pcb->pcb_dr0 = dbregs->dr0;
2255 pcb->pcb_dr1 = dbregs->dr1;
2256 pcb->pcb_dr2 = dbregs->dr2;
2257 pcb->pcb_dr3 = dbregs->dr3;
2258 pcb->pcb_dr6 = dbregs->dr6;
2259 pcb->pcb_dr7 = dbregs->dr7;
2261 pcb->pcb_flags |= PCB_DBREGS;
2268 * Return > 0 if a hardware breakpoint has been hit, and the
2269 * breakpoint was in user space. Return 0, otherwise.
2272 user_dbreg_trap(void)
2274 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2275 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2276 int nbp; /* number of breakpoints that triggered */
2277 caddr_t addr[4]; /* breakpoint addresses */
2281 if ((dr7 & 0x000000ff) == 0) {
2283 * all GE and LE bits in the dr7 register are zero,
2284 * thus the trap couldn't have been caused by the
2285 * hardware debug registers
2292 bp = dr6 & 0x0000000f;
2296 * None of the breakpoint bits are set meaning this
2297 * trap was not caused by any of the debug registers
2303 * at least one of the breakpoints were hit, check to see
2304 * which ones and if any of them are user space addresses
2308 addr[nbp++] = (caddr_t)rdr0();
2311 addr[nbp++] = (caddr_t)rdr1();
2314 addr[nbp++] = (caddr_t)rdr2();
2317 addr[nbp++] = (caddr_t)rdr3();
2320 for (i=0; i<nbp; i++) {
2322 (caddr_t)VM_MAXUSER_ADDRESS) {
2324 * addr[i] is in user space
2331 * None of the breakpoints are in user space.
2339 Debugger(const char *msg)
2341 printf("Debugger(\"%s\") called.\n", msg);
2345 #include <sys/disklabel.h>
2348 * Determine the size of the transfer, and make sure it is
2349 * within the boundaries of the partition. Adjust transfer
2350 * if needed, and signal errors or early completion.
2353 bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2355 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2356 int labelsect = lp->d_partitions[0].p_offset;
2357 int maxsz = p->p_size,
2358 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2360 /* overwriting disk label ? */
2361 /* XXX should also protect bootstrap in first 8K */
2362 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2363 #if LABELSECTOR != 0
2364 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2366 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2367 bp->b_error = EROFS;
2371 #if defined(DOSBBSECTOR) && defined(notyet)
2372 /* overwriting master boot record? */
2373 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2374 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2375 bp->b_error = EROFS;
2380 /* beyond partition? */
2381 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2382 /* if exactly at end of disk, return an EOF */
2383 if (bp->b_blkno == maxsz) {
2384 bp->b_resid = bp->b_bcount;
2387 /* or truncate if part of it fits */
2388 sz = maxsz - bp->b_blkno;
2390 bp->b_error = EINVAL;
2393 bp->b_bcount = sz << DEV_BSHIFT;
2396 bp->b_pblkno = bp->b_blkno + p->p_offset;
2400 bp->b_flags |= B_ERROR;
2407 * Provide inb() and outb() as functions. They are normally only
2408 * available as macros calling inlined functions, thus cannot be
2409 * called inside DDB.
2411 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2417 /* silence compiler warnings */
2419 void outb(u_int, u_char);
2426 * We use %%dx and not %1 here because i/o is done at %dx and not at
2427 * %edx, while gcc generates inferior code (movw instead of movl)
2428 * if we tell it to load (u_short) port.
2430 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2435 outb(u_int port, u_char data)
2439 * Use an unnecessary assignment to help gcc's register allocator.
2440 * This make a large difference for gcc-1.40 and a tiny difference
2441 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2442 * best results. gcc-2.6.0 can't handle this.
2445 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2452 #include "opt_cpu.h"
2453 #include "opt_htt.h"
2454 #include "opt_user_ldt.h"
2458 * initialize all the SMP locks
2461 /* critical region around IO APIC, apic_imen */
2462 struct spinlock imen_spinlock;
2464 /* Make FAST_INTR() routines sequential */
2465 struct spinlock fast_intr_spinlock;
2467 /* critical region for old style disable_intr/enable_intr */
2468 struct spinlock mpintr_spinlock;
2470 /* critical region around INTR() routines */
2471 struct spinlock intr_spinlock;
2473 /* lock region used by kernel profiling */
2474 struct spinlock mcount_spinlock;
2476 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2477 struct spinlock com_spinlock;
2479 /* locks kernel printfs */
2480 struct spinlock cons_spinlock;
2482 /* lock regions around the clock hardware */
2483 struct spinlock clock_spinlock;
2485 /* lock around the MP rendezvous */
2486 struct spinlock smp_rv_spinlock;
2492 * mp_lock = 0; BSP already owns the MP lock
2495 * Get the initial mp_lock with a count of 1 for the BSP.
2496 * This uses a LOGICAL cpu ID, ie BSP == 0.
2499 cpu_get_initial_mplock();
2501 spin_lock_init(&mcount_spinlock);
2502 spin_lock_init(&fast_intr_spinlock);
2503 spin_lock_init(&intr_spinlock);
2504 spin_lock_init(&mpintr_spinlock);
2505 spin_lock_init(&imen_spinlock);
2506 spin_lock_init(&smp_rv_spinlock);
2507 spin_lock_init(&com_spinlock);
2508 spin_lock_init(&clock_spinlock);
2509 spin_lock_init(&cons_spinlock);