2 * Copyright (c) 2007 The DragonFly Project. All rights reserved.
4 * This code is derived from software contributed to The DragonFly Project
5 * by Sepherosa Ziehau <sepherosa@gmail.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * $DragonFly: src/sys/dev/netif/bwi/bwimac.c,v 1.13 2008/02/15 11:15:38 sephe Exp $
37 #include <sys/param.h>
38 #include <sys/bitops.h>
39 #include <sys/endian.h>
40 #include <sys/kernel.h>
42 #include <sys/firmware.h>
43 #include <sys/malloc.h>
46 #include <sys/serialize.h>
47 #include <sys/socket.h>
48 #include <sys/sockio.h>
49 #include <sys/sysctl.h>
51 #include <net/ethernet.h>
54 #include <net/if_arp.h>
55 #include <net/if_dl.h>
56 #include <net/if_media.h>
57 #include <net/ifq_var.h>
59 #include <netproto/802_11/ieee80211_radiotap.h>
60 #include <netproto/802_11/ieee80211_var.h>
61 #include <netproto/802_11/wlan_ratectl/onoe/ieee80211_onoe_param.h>
63 #include <bus/pci/pcireg.h>
64 #include <bus/pci/pcivar.h>
65 #include <bus/pci/pcidevs.h>
67 #include <dev/netif/bwi/if_bwireg.h>
68 #include <dev/netif/bwi/if_bwivar.h>
69 #include <dev/netif/bwi/bwiphy.h>
70 #include <dev/netif/bwi/bwirf.h>
71 #include <dev/netif/bwi/bwimac.h>
73 struct bwi_retry_lim {
80 static int bwi_mac_test(struct bwi_mac *);
81 static int bwi_mac_get_property(struct bwi_mac *);
83 static void bwi_mac_set_retry_lim(struct bwi_mac *,
84 const struct bwi_retry_lim *);
85 static void bwi_mac_set_ackrates(struct bwi_mac *,
86 const struct ieee80211_rateset *);
88 static int bwi_mac_gpio_init(struct bwi_mac *);
89 static int bwi_mac_gpio_fini(struct bwi_mac *);
90 static void bwi_mac_opmode_init(struct bwi_mac *);
91 static void bwi_mac_hostflags_init(struct bwi_mac *);
92 static void bwi_mac_bss_param_init(struct bwi_mac *);
94 static int bwi_mac_fw_alloc(struct bwi_mac *);
95 static void bwi_mac_fw_free(struct bwi_mac *);
96 static int bwi_mac_fw_load(struct bwi_mac *);
97 static int bwi_mac_fw_init(struct bwi_mac *);
98 static int bwi_mac_fw_load_iv(struct bwi_mac *, const struct fw_image *);
100 static void bwi_mac_setup_tpctl(struct bwi_mac *);
101 static void bwi_mac_adjust_tpctl(struct bwi_mac *, int, int);
103 static void bwi_mac_lock(struct bwi_mac *);
104 static void bwi_mac_unlock(struct bwi_mac *);
106 static const uint8_t bwi_sup_macrev[] = { 2, 4, 5, 6, 7, 9, 10 };
109 bwi_tmplt_write_4(struct bwi_mac *mac, uint32_t ofs, uint32_t val)
111 struct bwi_softc *sc = mac->mac_sc;
113 if (mac->mac_flags & BWI_MAC_F_BSWAP)
116 CSR_WRITE_4(sc, BWI_MAC_TMPLT_CTRL, ofs);
117 CSR_WRITE_4(sc, BWI_MAC_TMPLT_DATA, val);
121 bwi_hostflags_write(struct bwi_mac *mac, uint64_t flags)
125 val = flags & 0xffff;
126 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_LO, val);
128 val = (flags >> 16) & 0xffff;
129 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_MI, val);
131 /* HI has unclear meaning, so leave it as it is */
135 bwi_hostflags_read(struct bwi_mac *mac)
139 /* HI has unclear meaning, so don't touch it */
142 val = MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_MI);
145 val = MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_HFLAGS_LO);
152 bwi_memobj_read_2(struct bwi_mac *mac, uint16_t obj_id, uint16_t ofs0)
154 struct bwi_softc *sc = mac->mac_sc;
158 data_reg = BWI_MOBJ_DATA;
162 data_reg = BWI_MOBJ_DATA_UNALIGN;
164 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
165 return CSR_READ_2(sc, data_reg);
169 bwi_memobj_read_4(struct bwi_mac *mac, uint16_t obj_id, uint16_t ofs0)
171 struct bwi_softc *sc = mac->mac_sc;
178 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
179 ret = CSR_READ_2(sc, BWI_MOBJ_DATA_UNALIGN);
182 CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
183 BWI_MOBJ_CTRL_VAL(obj_id, ofs + 1));
184 ret |= CSR_READ_2(sc, BWI_MOBJ_DATA);
188 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
189 return CSR_READ_4(sc, BWI_MOBJ_DATA);
194 bwi_memobj_write_2(struct bwi_mac *mac, uint16_t obj_id, uint16_t ofs0,
197 struct bwi_softc *sc = mac->mac_sc;
201 data_reg = BWI_MOBJ_DATA;
205 data_reg = BWI_MOBJ_DATA_UNALIGN;
207 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
208 CSR_WRITE_2(sc, data_reg, v);
212 bwi_memobj_write_4(struct bwi_mac *mac, uint16_t obj_id, uint16_t ofs0,
215 struct bwi_softc *sc = mac->mac_sc;
220 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
221 CSR_WRITE_2(sc, BWI_MOBJ_DATA_UNALIGN, v >> 16);
223 CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
224 BWI_MOBJ_CTRL_VAL(obj_id, ofs + 1));
225 CSR_WRITE_2(sc, BWI_MOBJ_DATA, v & 0xffff);
227 CSR_WRITE_4(sc, BWI_MOBJ_CTRL, BWI_MOBJ_CTRL_VAL(obj_id, ofs));
228 CSR_WRITE_4(sc, BWI_MOBJ_DATA, v);
233 bwi_mac_lateattach(struct bwi_mac *mac)
237 if (mac->mac_rev >= 5)
238 CSR_READ_4(mac->mac_sc, BWI_STATE_HI); /* dummy read */
240 bwi_mac_reset(mac, 1);
242 error = bwi_phy_attach(mac);
246 error = bwi_rf_attach(mac);
250 /* Link 11B/G PHY, unlink 11A PHY */
251 if (mac->mac_phy.phy_mode == IEEE80211_MODE_11A)
252 bwi_mac_reset(mac, 0);
254 bwi_mac_reset(mac, 1);
256 error = bwi_mac_test(mac);
260 error = bwi_mac_get_property(mac);
264 error = bwi_rf_map_txpower(mac);
269 CSR_WRITE_2(mac->mac_sc, BWI_BBP_ATTEN, BWI_BBP_ATTEN_MAGIC);
270 bwi_regwin_disable(mac->mac_sc, &mac->mac_regwin, 0);
276 bwi_mac_init(struct bwi_mac *mac)
278 struct bwi_softc *sc = mac->mac_sc;
281 /* Clear MAC/PHY/RF states */
282 bwi_mac_setup_tpctl(mac);
283 bwi_rf_clear_state(&mac->mac_rf);
284 bwi_phy_clear_state(&mac->mac_phy);
286 /* Enable MAC and linked it to PHY */
287 if (!bwi_regwin_is_enabled(sc, &mac->mac_regwin))
288 bwi_mac_reset(mac, 1);
290 /* Initialize backplane */
291 error = bwi_bus_init(sc, mac);
295 /* XXX work around for hardware bugs? */
296 if (sc->sc_bus_regwin.rw_rev <= 5 &&
297 sc->sc_bus_regwin.rw_type != BWI_REGWIN_T_BUSPCIE) {
298 CSR_SETBITS_4(sc, BWI_CONF_LO,
299 __SHIFTIN(BWI_CONF_LO_SERVTO, BWI_CONF_LO_SERVTO_MASK) |
300 __SHIFTIN(BWI_CONF_LO_REQTO, BWI_CONF_LO_REQTO_MASK));
304 error = bwi_phy_calibrate(mac);
306 if_printf(&sc->sc_ic.ic_if, "PHY calibrate failed\n");
310 /* Prepare to initialize firmware */
311 CSR_WRITE_4(sc, BWI_MAC_STATUS,
312 BWI_MAC_STATUS_UCODE_JUMP0 |
313 BWI_MAC_STATUS_IHREN);
316 * Load and initialize firmwares
318 error = bwi_mac_fw_alloc(mac);
322 error = bwi_mac_fw_load(mac);
326 error = bwi_mac_gpio_init(mac);
330 error = bwi_mac_fw_init(mac);
339 /* TODO: LED, hardware rf enabled is only related to LED setting */
344 CSR_WRITE_2(sc, BWI_BBP_ATTEN, 0);
347 /* TODO: interference mitigation */
352 bwi_rf_set_ant_mode(mac, mac->mac_rf.rf_ant_mode);
355 * Initialize operation mode (RX configuration)
357 bwi_mac_opmode_init(mac);
359 /* XXX what's these */
360 if (mac->mac_rev < 3) {
361 CSR_WRITE_2(sc, 0x60e, 0);
362 CSR_WRITE_2(sc, 0x610, 0x8000);
363 CSR_WRITE_2(sc, 0x604, 0);
364 CSR_WRITE_2(sc, 0x606, 0x200);
366 CSR_WRITE_4(sc, 0x188, 0x80000000);
367 CSR_WRITE_4(sc, 0x18c, 0x2000000);
371 * Initialize TX/RX interrupts' mask
373 CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, BWI_INTR_TIMER1);
374 for (i = 0; i < BWI_TXRX_NRING; ++i) {
377 if (BWI_TXRX_IS_RX(i))
378 intrs = BWI_TXRX_RX_INTRS;
380 intrs = BWI_TXRX_TX_INTRS;
381 CSR_WRITE_4(sc, BWI_TXRX_INTR_MASK(i), intrs);
384 /* XXX what's this */
385 CSR_SETBITS_4(sc, BWI_STATE_LO, 0x100000);
387 /* Setup MAC power up delay */
388 CSR_WRITE_2(sc, BWI_MAC_POWERUP_DELAY, sc->sc_pwron_delay);
390 /* Set MAC regwin revision */
391 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_MACREV, mac->mac_rev);
394 * Initialize host flags
396 bwi_mac_hostflags_init(mac);
399 * Initialize BSS parameters
401 bwi_mac_bss_param_init(mac);
404 * Initialize TX rings
406 for (i = 0; i < BWI_TX_NRING; ++i) {
407 error = sc->sc_init_tx_ring(sc, i);
409 if_printf(&sc->sc_ic.ic_if,
410 "can't initialize %dth TX ring\n", i);
418 error = sc->sc_init_rx_ring(sc);
420 if_printf(&sc->sc_ic.ic_if, "can't initialize RX ring\n");
425 * Initialize TX stats if the current MAC uses that
427 if (mac->mac_flags & BWI_MAC_F_HAS_TXSTATS) {
428 error = sc->sc_init_txstats(sc);
430 if_printf(&sc->sc_ic.ic_if,
431 "can't initialize TX stats ring\n");
436 /* XXX what's these */
437 CSR_WRITE_2(sc, 0x612, 0x50); /* Force Pre-TBTT to 80? */
438 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, 0x416, 0x50);
439 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, 0x414, 0x1f4);
441 mac->mac_flags |= BWI_MAC_F_INITED;
446 bwi_mac_reset(struct bwi_mac *mac, int link_phy)
448 struct bwi_softc *sc = mac->mac_sc;
449 uint32_t flags, state_lo, status;
451 flags = BWI_STATE_LO_FLAG_PHYRST | BWI_STATE_LO_FLAG_PHYCLKEN;
453 flags |= BWI_STATE_LO_FLAG_PHYLNK;
454 bwi_regwin_enable(sc, &mac->mac_regwin, flags);
457 state_lo = CSR_READ_4(sc, BWI_STATE_LO);
458 state_lo |= BWI_STATE_LO_GATED_CLOCK;
459 state_lo &= ~__SHIFTIN(BWI_STATE_LO_FLAG_PHYRST,
460 BWI_STATE_LO_FLAGS_MASK);
461 CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
462 /* Flush pending bus write */
463 CSR_READ_4(sc, BWI_STATE_LO);
466 state_lo &= ~BWI_STATE_LO_GATED_CLOCK;
467 CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
468 /* Flush pending bus write */
469 CSR_READ_4(sc, BWI_STATE_LO);
472 CSR_WRITE_2(sc, BWI_BBP_ATTEN, 0);
474 status = CSR_READ_4(sc, BWI_MAC_STATUS);
475 status |= BWI_MAC_STATUS_IHREN;
477 status |= BWI_MAC_STATUS_PHYLNK;
479 status &= ~BWI_MAC_STATUS_PHYLNK;
480 CSR_WRITE_4(sc, BWI_MAC_STATUS, status);
483 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH | BWI_DBG_INIT,
484 "%s\n", "PHY is linked");
485 mac->mac_phy.phy_flags |= BWI_PHY_F_LINKED;
487 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH | BWI_DBG_INIT,
488 "%s\n", "PHY is unlinked");
489 mac->mac_phy.phy_flags &= ~BWI_PHY_F_LINKED;
494 bwi_mac_set_tpctl_11bg(struct bwi_mac *mac, const struct bwi_tpctl *new_tpctl)
496 struct bwi_rf *rf = &mac->mac_rf;
497 struct bwi_tpctl *tpctl = &mac->mac_tpctl;
499 if (new_tpctl != NULL) {
500 KKASSERT(new_tpctl->bbp_atten <= BWI_BBP_ATTEN_MAX);
501 KKASSERT(new_tpctl->rf_atten <=
502 (rf->rf_rev < 6 ? BWI_RF_ATTEN_MAX0
503 : BWI_RF_ATTEN_MAX1));
504 KKASSERT(new_tpctl->tp_ctrl1 <= BWI_TPCTL1_MAX);
506 tpctl->bbp_atten = new_tpctl->bbp_atten;
507 tpctl->rf_atten = new_tpctl->rf_atten;
508 tpctl->tp_ctrl1 = new_tpctl->tp_ctrl1;
511 /* Set BBP attenuation */
512 bwi_phy_set_bbp_atten(mac, tpctl->bbp_atten);
514 /* Set RF attenuation */
515 RF_WRITE(mac, BWI_RFR_ATTEN, tpctl->rf_atten);
516 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_RF_ATTEN,
520 if (rf->rf_type == BWI_RF_T_BCM2050) {
521 RF_FILT_SETBITS(mac, BWI_RFR_TXPWR, ~BWI_RFR_TXPWR1_MASK,
522 __SHIFTIN(tpctl->tp_ctrl1, BWI_RFR_TXPWR1_MASK));
525 /* Adjust RF Local Oscillator */
526 if (mac->mac_phy.phy_mode == IEEE80211_MODE_11G)
527 bwi_rf_lo_adjust(mac, tpctl);
531 bwi_mac_test(struct bwi_mac *mac)
533 struct bwi_softc *sc = mac->mac_sc;
534 uint32_t orig_val, val;
536 #define TEST_VAL1 0xaa5555aa
537 #define TEST_VAL2 0x55aaaa55
539 /* Save it for later restoring */
540 orig_val = MOBJ_READ_4(mac, BWI_COMM_MOBJ, 0);
543 MOBJ_WRITE_4(mac, BWI_COMM_MOBJ, 0, TEST_VAL1);
544 val = MOBJ_READ_4(mac, BWI_COMM_MOBJ, 0);
545 if (val != TEST_VAL1) {
546 device_printf(sc->sc_dev, "TEST1 failed\n");
551 MOBJ_WRITE_4(mac, BWI_COMM_MOBJ, 0, TEST_VAL2);
552 val = MOBJ_READ_4(mac, BWI_COMM_MOBJ, 0);
553 if (val != TEST_VAL2) {
554 device_printf(sc->sc_dev, "TEST2 failed\n");
558 /* Restore to the original value */
559 MOBJ_WRITE_4(mac, BWI_COMM_MOBJ, 0, orig_val);
561 val = CSR_READ_4(sc, BWI_MAC_STATUS);
562 if ((val & ~BWI_MAC_STATUS_PHYLNK) != BWI_MAC_STATUS_IHREN) {
563 device_printf(sc->sc_dev, "%s failed, MAC status 0x%08x\n",
568 val = CSR_READ_4(sc, BWI_MAC_INTR_STATUS);
570 device_printf(sc->sc_dev, "%s failed, intr status %08x\n",
582 bwi_mac_setup_tpctl(struct bwi_mac *mac)
584 struct bwi_softc *sc = mac->mac_sc;
585 struct bwi_rf *rf = &mac->mac_rf;
586 struct bwi_phy *phy = &mac->mac_phy;
587 struct bwi_tpctl *tpctl = &mac->mac_tpctl;
589 /* Calc BBP attenuation */
590 if (rf->rf_type == BWI_RF_T_BCM2050 && rf->rf_rev < 6)
591 tpctl->bbp_atten = 0;
593 tpctl->bbp_atten = 2;
595 /* Calc TX power CTRL1?? */
597 if (rf->rf_type == BWI_RF_T_BCM2050) {
600 else if (rf->rf_rev < 6)
602 else if (rf->rf_rev == 8)
606 /* Empty TX power CTRL2?? */
607 tpctl->tp_ctrl2 = 0xffff;
610 * Calc RF attenuation
612 if (phy->phy_mode == IEEE80211_MODE_11A) {
613 tpctl->rf_atten = 0x60;
617 if (BWI_IS_BRCM_BCM4309G(sc) && sc->sc_pci_revid < 0x51) {
618 tpctl->rf_atten = sc->sc_pci_revid < 0x43 ? 2 : 3;
624 if (rf->rf_type != BWI_RF_T_BCM2050) {
625 if (rf->rf_type == BWI_RF_T_BCM2053 && rf->rf_rev == 1)
631 * NB: If we reaches here and the card is BRCM_BCM4309G,
632 * then the card's PCI revision must >= 0x51
636 switch (rf->rf_rev) {
638 if (phy->phy_mode == IEEE80211_MODE_11G) {
639 if (BWI_IS_BRCM_BCM4309G(sc) || BWI_IS_BRCM_BU4306(sc))
644 if (BWI_IS_BRCM_BCM4309G(sc))
651 if (phy->phy_mode == IEEE80211_MODE_11G) {
653 * NOTE: Order of following conditions is critical
655 if (BWI_IS_BRCM_BCM4309G(sc))
657 else if (BWI_IS_BRCM_BU4306(sc))
659 else if (sc->sc_bbp_id == BWI_BBPID_BCM4320)
672 tpctl->rf_atten = 0x1a;
676 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_INIT | BWI_DBG_TXPOWER,
677 "bbp atten: %u, rf atten: %u, ctrl1: %u, ctrl2: %u\n",
678 tpctl->bbp_atten, tpctl->rf_atten,
679 tpctl->tp_ctrl1, tpctl->tp_ctrl2);
683 bwi_mac_dummy_xmit(struct bwi_mac *mac)
686 static const uint32_t packet_11a[PACKET_LEN] =
687 { 0x000201cc, 0x00d40000, 0x00000000, 0x01000000, 0x00000000 };
688 static const uint32_t packet_11bg[PACKET_LEN] =
689 { 0x000b846e, 0x00d40000, 0x00000000, 0x01000000, 0x00000000 };
691 struct bwi_softc *sc = mac->mac_sc;
692 struct bwi_rf *rf = &mac->mac_rf;
693 const uint32_t *packet;
697 if (mac->mac_phy.phy_mode == IEEE80211_MODE_11A) {
703 packet = packet_11bg;
707 for (i = 0; i < PACKET_LEN; ++i)
708 TMPLT_WRITE_4(mac, i * 4, packet[i]);
710 CSR_READ_4(sc, BWI_MAC_STATUS); /* dummy read */
712 CSR_WRITE_2(sc, 0x568, 0);
713 CSR_WRITE_2(sc, 0x7c0, 0);
714 CSR_WRITE_2(sc, 0x50c, val_50c);
715 CSR_WRITE_2(sc, 0x508, 0);
716 CSR_WRITE_2(sc, 0x50a, 0);
717 CSR_WRITE_2(sc, 0x54c, 0);
718 CSR_WRITE_2(sc, 0x56a, 0x14);
719 CSR_WRITE_2(sc, 0x568, 0x826);
720 CSR_WRITE_2(sc, 0x500, 0);
721 CSR_WRITE_2(sc, 0x502, 0x30);
723 if (rf->rf_type == BWI_RF_T_BCM2050 && rf->rf_rev <= 5)
724 RF_WRITE(mac, 0x51, 0x17);
726 for (i = 0; i < wait_max; ++i) {
727 if (CSR_READ_2(sc, 0x50e) & 0x80)
731 for (i = 0; i < 10; ++i) {
732 if (CSR_READ_2(sc, 0x50e) & 0x400)
736 for (i = 0; i < 10; ++i) {
737 if ((CSR_READ_2(sc, 0x690) & 0x100) == 0)
742 if (rf->rf_type == BWI_RF_T_BCM2050 && rf->rf_rev <= 5)
743 RF_WRITE(mac, 0x51, 0x37);
748 bwi_mac_init_tpctl_11bg(struct bwi_mac *mac)
750 struct bwi_softc *sc = mac->mac_sc;
751 struct bwi_phy *phy = &mac->mac_phy;
752 struct bwi_rf *rf = &mac->mac_rf;
753 struct bwi_tpctl tpctl_orig;
754 int restore_tpctl = 0;
756 KKASSERT(phy->phy_mode != IEEE80211_MODE_11A);
758 if (BWI_IS_BRCM_BU4306(sc))
761 PHY_WRITE(mac, 0x28, 0x8018);
762 CSR_CLRBITS_2(sc, BWI_BBP_ATTEN, 0x20);
764 if (phy->phy_mode == IEEE80211_MODE_11G) {
765 if ((phy->phy_flags & BWI_PHY_F_LINKED) == 0)
767 PHY_WRITE(mac, 0x47a, 0xc111);
769 if (mac->mac_flags & BWI_MAC_F_TPCTL_INITED)
772 if (phy->phy_mode == IEEE80211_MODE_11B && phy->phy_rev >= 2 &&
773 rf->rf_type == BWI_RF_T_BCM2050) {
774 RF_SETBITS(mac, 0x76, 0x84);
776 struct bwi_tpctl tpctl;
778 /* Backup original TX power control variables */
779 bcopy(&mac->mac_tpctl, &tpctl_orig, sizeof(tpctl_orig));
782 bcopy(&mac->mac_tpctl, &tpctl, sizeof(tpctl));
783 tpctl.bbp_atten = 11;
786 if (rf->rf_rev >= 6 && rf->rf_rev <= 8)
792 bwi_mac_set_tpctl_11bg(mac, &tpctl);
795 bwi_mac_dummy_xmit(mac);
797 mac->mac_flags |= BWI_MAC_F_TPCTL_INITED;
798 rf->rf_base_tssi = PHY_READ(mac, 0x29);
799 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_INIT | BWI_DBG_TXPOWER,
800 "base tssi %d\n", rf->rf_base_tssi);
802 if (abs(rf->rf_base_tssi - rf->rf_idle_tssi) >= 20) {
803 if_printf(&sc->sc_ic.ic_if, "base tssi measure failed\n");
804 mac->mac_flags |= BWI_MAC_F_TPCTL_ERROR;
808 bwi_mac_set_tpctl_11bg(mac, &tpctl_orig);
810 RF_CLRBITS(mac, 0x76, 0x84);
812 bwi_rf_clear_tssi(mac);
816 bwi_mac_detach(struct bwi_mac *mac)
818 bwi_mac_fw_free(mac);
822 bwi_fwimage_is_valid(struct bwi_softc *sc, const struct fw_image *fw,
825 const struct bwi_fwhdr *hdr;
826 struct ifnet *ifp = &sc->sc_ic.ic_if;
828 if (fw->fw_imglen < sizeof(*hdr)) {
829 if_printf(ifp, "invalid firmware (%s): invalid size %zu\n",
830 fw->fw_name, fw->fw_imglen);
834 hdr = (const struct bwi_fwhdr *)fw->fw_image;
836 if (fw_type != BWI_FW_T_IV) {
838 * Don't verify IV's size, it has different meaning
840 if (be32toh(hdr->fw_size) != fw->fw_imglen - sizeof(*hdr)) {
842 "invalid firmware (%s): size mismatch, "
844 fw->fw_name, be32toh(hdr->fw_size),
845 fw->fw_imglen - sizeof(*hdr));
850 if (hdr->fw_type != fw_type) {
851 if_printf(ifp, "invalid firmware (%s): type mismatch, "
852 "fw \'%c\', target \'%c\'\n", fw->fw_name,
853 hdr->fw_type, fw_type);
857 if (hdr->fw_gen != BWI_FW_GEN_1) {
858 if_printf(ifp, "invalid firmware (%s): wrong generation, "
859 "fw %d, target %d\n", fw->fw_name,
860 hdr->fw_gen, BWI_FW_GEN_1);
870 bwi_mac_fw_alloc(struct bwi_mac *mac)
872 struct bwi_softc *sc = mac->mac_sc;
873 struct ifnet *ifp = &sc->sc_ic.ic_if;
874 struct fw_image *img;
879 * NB: serializer need to be released before loading firmware
880 * image to avoid possible dead lock
882 ASSERT_SERIALIZED(ifp->if_serializer);
884 if (mac->mac_ucode == NULL) {
885 ksnprintf(fwname, sizeof(fwname), BWI_FW_UCODE_PATH,
887 mac->mac_rev >= 5 ? 5 : mac->mac_rev);
889 lwkt_serialize_exit(ifp->if_serializer);
890 img = firmware_image_load(fwname, NULL);
891 lwkt_serialize_enter(ifp->if_serializer);
893 mac->mac_ucode = img;
894 if (mac->mac_ucode == NULL) {
895 if_printf(ifp, "request firmware %s failed\n", fwname);
899 if (!bwi_fwimage_is_valid(sc, mac->mac_ucode, BWI_FW_T_UCODE))
903 if (mac->mac_pcm == NULL) {
904 ksnprintf(fwname, sizeof(fwname), BWI_FW_PCM_PATH,
906 mac->mac_rev < 5 ? 4 : 5);
908 lwkt_serialize_exit(ifp->if_serializer);
909 img = firmware_image_load(fwname, NULL);
910 lwkt_serialize_enter(ifp->if_serializer);
913 if (mac->mac_pcm == NULL) {
914 if_printf(ifp, "request firmware %s failed\n", fwname);
918 if (!bwi_fwimage_is_valid(sc, mac->mac_pcm, BWI_FW_T_PCM))
922 if (mac->mac_iv == NULL) {
924 if (mac->mac_rev == 2 || mac->mac_rev == 4) {
926 } else if (mac->mac_rev >= 5 && mac->mac_rev <= 10) {
929 if_printf(ifp, "no suitable IV for MAC rev %d\n",
934 ksnprintf(fwname, sizeof(fwname), BWI_FW_IV_PATH,
935 sc->sc_fw_version, idx);
937 lwkt_serialize_exit(ifp->if_serializer);
938 img = firmware_image_load(fwname, NULL);
939 lwkt_serialize_enter(ifp->if_serializer);
942 if (mac->mac_iv == NULL) {
943 if_printf(ifp, "request firmware %s failed\n", fwname);
946 if (!bwi_fwimage_is_valid(sc, mac->mac_iv, BWI_FW_T_IV))
950 if (mac->mac_iv_ext == NULL) {
952 if (mac->mac_rev == 2 || mac->mac_rev == 4 ||
953 mac->mac_rev >= 11) {
956 } else if (mac->mac_rev >= 5 && mac->mac_rev <= 10) {
959 if_printf(ifp, "no suitible ExtIV for MAC rev %d\n",
964 ksnprintf(fwname, sizeof(fwname), BWI_FW_IV_EXT_PATH,
965 sc->sc_fw_version, idx);
967 lwkt_serialize_exit(ifp->if_serializer);
968 img = firmware_image_load(fwname, NULL);
969 lwkt_serialize_enter(ifp->if_serializer);
971 mac->mac_iv_ext = img;
972 if (mac->mac_iv_ext == NULL) {
973 if_printf(ifp, "request firmware %s failed\n", fwname);
976 if (!bwi_fwimage_is_valid(sc, mac->mac_iv_ext, BWI_FW_T_IV))
984 bwi_mac_fw_free(struct bwi_mac *mac)
986 if (mac->mac_ucode != NULL) {
987 firmware_image_unload(mac->mac_ucode);
988 mac->mac_ucode = NULL;
991 if (mac->mac_pcm != NULL) {
992 firmware_image_unload(mac->mac_pcm);
996 if (mac->mac_iv != NULL) {
997 firmware_image_unload(mac->mac_iv);
1001 if (mac->mac_iv_ext != NULL) {
1002 firmware_image_unload(mac->mac_iv_ext);
1003 mac->mac_iv_ext = NULL;
1008 bwi_mac_fw_load(struct bwi_mac *mac)
1010 struct bwi_softc *sc = mac->mac_sc;
1011 struct ifnet *ifp = &sc->sc_ic.ic_if;
1019 fw = (const uint32_t *)
1020 ((const uint8_t *)mac->mac_ucode->fw_image + BWI_FWHDR_SZ);
1021 fw_len = (mac->mac_ucode->fw_imglen - BWI_FWHDR_SZ) / sizeof(uint32_t);
1023 CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
1025 BWI_FW_UCODE_MOBJ | BWI_WR_MOBJ_AUTOINC, 0));
1026 for (i = 0; i < fw_len; ++i) {
1027 CSR_WRITE_4(sc, BWI_MOBJ_DATA, be32toh(fw[i]));
1034 fw = (const uint32_t *)
1035 ((const uint8_t *)mac->mac_pcm->fw_image + BWI_FWHDR_SZ);
1036 fw_len = (mac->mac_pcm->fw_imglen - BWI_FWHDR_SZ) / sizeof(uint32_t);
1038 CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
1039 BWI_MOBJ_CTRL_VAL(BWI_FW_PCM_MOBJ, 0x01ea));
1040 CSR_WRITE_4(sc, BWI_MOBJ_DATA, 0x4000);
1042 CSR_WRITE_4(sc, BWI_MOBJ_CTRL,
1043 BWI_MOBJ_CTRL_VAL(BWI_FW_PCM_MOBJ, 0x01eb));
1044 for (i = 0; i < fw_len; ++i) {
1045 CSR_WRITE_4(sc, BWI_MOBJ_DATA, be32toh(fw[i]));
1049 CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, BWI_ALL_INTRS);
1050 CSR_WRITE_4(sc, BWI_MAC_STATUS,
1051 BWI_MAC_STATUS_UCODE_START |
1052 BWI_MAC_STATUS_IHREN |
1053 BWI_MAC_STATUS_INFRA);
1057 for (i = 0; i < NRETRY; ++i) {
1058 uint32_t intr_status;
1060 intr_status = CSR_READ_4(sc, BWI_MAC_INTR_STATUS);
1061 if (intr_status == BWI_INTR_READY)
1066 if_printf(ifp, "firmware (ucode&pcm) loading timed out\n");
1072 CSR_READ_4(sc, BWI_MAC_INTR_STATUS); /* dummy read */
1074 fw_rev = MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_FWREV);
1075 if (fw_rev > BWI_FW_VERSION3_REVMAX) {
1076 if_printf(ifp, "firmware version 4 is not supported yet\n");
1080 if_printf(ifp, "firmware rev 0x%04x, patch level 0x%04x\n", fw_rev,
1081 MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_FWPATCHLV));
1086 bwi_mac_gpio_init(struct bwi_mac *mac)
1088 struct bwi_softc *sc = mac->mac_sc;
1089 struct bwi_regwin *old, *gpio_rw;
1090 uint32_t filt, bits;
1093 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_GPOSEL_MASK);
1096 CSR_SETBITS_2(sc, BWI_MAC_GPIO_MASK, 0xf);
1100 if (sc->sc_bbp_id == BWI_BBPID_BCM4301) {
1104 if (sc->sc_card_flags & BWI_CARD_F_PA_GPIO9) {
1105 CSR_SETBITS_2(sc, BWI_MAC_GPIO_MASK, 0x200);
1110 gpio_rw = BWI_GPIO_REGWIN(sc);
1111 error = bwi_regwin_switch(sc, gpio_rw, &old);
1115 CSR_FILT_SETBITS_4(sc, BWI_GPIO_CTRL, filt, bits);
1117 return bwi_regwin_switch(sc, old, NULL);
1121 bwi_mac_gpio_fini(struct bwi_mac *mac)
1123 struct bwi_softc *sc = mac->mac_sc;
1124 struct bwi_regwin *old, *gpio_rw;
1127 gpio_rw = BWI_GPIO_REGWIN(sc);
1128 error = bwi_regwin_switch(sc, gpio_rw, &old);
1132 CSR_WRITE_4(sc, BWI_GPIO_CTRL, 0);
1134 return bwi_regwin_switch(sc, old, NULL);
1138 bwi_mac_fw_load_iv(struct bwi_mac *mac, const struct fw_image *fw)
1140 struct bwi_softc *sc = mac->mac_sc;
1141 struct ifnet *ifp = &sc->sc_ic.ic_if;
1142 const struct bwi_fwhdr *hdr;
1143 const struct bwi_fw_iv *iv;
1144 int n, i, iv_img_size;
1146 /* Get the number of IVs in the IV image */
1147 hdr = (const struct bwi_fwhdr *)fw->fw_image;
1148 n = be32toh(hdr->fw_iv_cnt);
1149 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_INIT | BWI_DBG_FIRMWARE,
1150 "IV count %d\n", n);
1152 /* Calculate the IV image size, for later sanity check */
1153 iv_img_size = fw->fw_imglen - sizeof(*hdr);
1155 /* Locate the first IV */
1156 iv = (const struct bwi_fw_iv *)
1157 ((const uint8_t *)fw->fw_image + sizeof(*hdr));
1159 for (i = 0; i < n; ++i) {
1160 uint16_t iv_ofs, ofs;
1163 if (iv_img_size < sizeof(iv->iv_ofs)) {
1164 if_printf(ifp, "invalid IV image, ofs\n");
1167 iv_img_size -= sizeof(iv->iv_ofs);
1168 sz += sizeof(iv->iv_ofs);
1170 iv_ofs = be16toh(iv->iv_ofs);
1172 ofs = __SHIFTOUT(iv_ofs, BWI_FW_IV_OFS_MASK);
1173 if (ofs >= 0x1000) {
1174 if_printf(ifp, "invalid ofs (0x%04x) "
1175 "for %dth iv\n", ofs, i);
1179 if (iv_ofs & BWI_FW_IV_IS_32BIT) {
1182 if (iv_img_size < sizeof(iv->iv_val.val32)) {
1183 if_printf(ifp, "invalid IV image, val32\n");
1186 iv_img_size -= sizeof(iv->iv_val.val32);
1187 sz += sizeof(iv->iv_val.val32);
1189 val32 = be32toh(iv->iv_val.val32);
1190 CSR_WRITE_4(sc, ofs, val32);
1194 if (iv_img_size < sizeof(iv->iv_val.val16)) {
1195 if_printf(ifp, "invalid IV image, val16\n");
1198 iv_img_size -= sizeof(iv->iv_val.val16);
1199 sz += sizeof(iv->iv_val.val16);
1201 val16 = be16toh(iv->iv_val.val16);
1202 CSR_WRITE_2(sc, ofs, val16);
1205 iv = (const struct bwi_fw_iv *)((const uint8_t *)iv + sz);
1208 if (iv_img_size != 0) {
1209 if_printf(ifp, "invalid IV image, size left %d\n", iv_img_size);
1216 bwi_mac_fw_init(struct bwi_mac *mac)
1218 struct ifnet *ifp = &mac->mac_sc->sc_ic.ic_if;
1221 error = bwi_mac_fw_load_iv(mac, mac->mac_iv);
1223 if_printf(ifp, "load IV failed\n");
1227 if (mac->mac_iv_ext != NULL) {
1228 error = bwi_mac_fw_load_iv(mac, mac->mac_iv_ext);
1230 if_printf(ifp, "load ExtIV failed\n");
1236 bwi_mac_opmode_init(struct bwi_mac *mac)
1238 struct bwi_softc *sc = mac->mac_sc;
1239 struct ieee80211com *ic = &sc->sc_ic;
1240 uint32_t mac_status;
1243 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_INFRA);
1244 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_INFRA);
1245 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_PASS_BCN);
1247 /* Set probe resp timeout to infinite */
1248 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_PROBE_RESP_TO, 0);
1251 * TODO: factor out following part
1254 mac_status = CSR_READ_4(sc, BWI_MAC_STATUS);
1255 mac_status &= ~(BWI_MAC_STATUS_OPMODE_HOSTAP |
1256 BWI_MAC_STATUS_PASS_CTL |
1257 BWI_MAC_STATUS_PASS_BADPLCP |
1258 BWI_MAC_STATUS_PASS_BADFCS |
1259 BWI_MAC_STATUS_PROMISC);
1260 mac_status |= BWI_MAC_STATUS_INFRA;
1262 /* Always turn on PROMISC on old hardware */
1263 if (mac->mac_rev < 5)
1264 mac_status |= BWI_MAC_STATUS_PROMISC;
1266 switch (ic->ic_opmode) {
1267 case IEEE80211_M_IBSS:
1268 mac_status &= ~BWI_MAC_STATUS_INFRA;
1270 case IEEE80211_M_HOSTAP:
1271 mac_status |= BWI_MAC_STATUS_OPMODE_HOSTAP;
1273 case IEEE80211_M_MONITOR:
1275 /* Do you want data from your microwave oven? */
1276 mac_status |= BWI_MAC_STATUS_PASS_CTL |
1277 BWI_MAC_STATUS_PASS_BADPLCP |
1278 BWI_MAC_STATUS_PASS_BADFCS;
1280 mac_status |= BWI_MAC_STATUS_PASS_CTL;
1288 if (ic->ic_if.if_flags & IFF_PROMISC)
1289 mac_status |= BWI_MAC_STATUS_PROMISC;
1291 CSR_WRITE_4(sc, BWI_MAC_STATUS, mac_status);
1293 if (ic->ic_opmode != IEEE80211_M_IBSS &&
1294 ic->ic_opmode != IEEE80211_M_HOSTAP) {
1295 if (sc->sc_bbp_id == BWI_BBPID_BCM4306 && sc->sc_bbp_rev == 3)
1302 CSR_WRITE_2(sc, BWI_MAC_PRE_TBTT, pre_tbtt);
1306 bwi_mac_hostflags_init(struct bwi_mac *mac)
1308 struct bwi_softc *sc = mac->mac_sc;
1309 struct bwi_phy *phy = &mac->mac_phy;
1310 struct bwi_rf *rf = &mac->mac_rf;
1311 uint64_t host_flags;
1313 if (phy->phy_mode == IEEE80211_MODE_11A)
1316 host_flags = HFLAGS_READ(mac);
1317 host_flags |= BWI_HFLAG_SYM_WA;
1319 if (phy->phy_mode == IEEE80211_MODE_11G) {
1320 if (phy->phy_rev == 1)
1321 host_flags |= BWI_HFLAG_GDC_WA;
1322 if (sc->sc_card_flags & BWI_CARD_F_PA_GPIO9)
1323 host_flags |= BWI_HFLAG_OFDM_PA;
1324 } else if (phy->phy_mode == IEEE80211_MODE_11B) {
1325 if (phy->phy_rev >= 2 && rf->rf_type == BWI_RF_T_BCM2050)
1326 host_flags &= ~BWI_HFLAG_GDC_WA;
1328 panic("unknown PHY mode %u\n", phy->phy_mode);
1331 HFLAGS_WRITE(mac, host_flags);
1335 bwi_mac_bss_param_init(struct bwi_mac *mac)
1337 struct bwi_softc *sc = mac->mac_sc;
1338 struct bwi_phy *phy = &mac->mac_phy;
1339 struct bwi_retry_lim lim;
1343 * Set short/long retry limits
1345 bzero(&lim, sizeof(lim));
1346 lim.shretry = BWI_SHRETRY;
1347 lim.shretry_fb = BWI_SHRETRY_FB;
1348 lim.lgretry = BWI_LGRETRY;
1349 lim.lgretry_fb = BWI_LGRETRY_FB;
1350 bwi_mac_set_retry_lim(mac, &lim);
1353 * Implicitly prevent firmware from sending probe response
1354 * by setting its "probe response timeout" to 1us.
1356 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_PROBE_RESP_TO, 1);
1359 * XXX MAC level acknowledge and CW min/max should depend
1360 * on the char rateset of the IBSS/BSS to join.
1364 * Set MAC level acknowledge rates
1366 bwi_mac_set_ackrates(mac, &sc->sc_ic.ic_sup_rates[phy->phy_mode]);
1371 if (phy->phy_mode == IEEE80211_MODE_11B)
1372 cw_min = IEEE80211_CW_MIN_0;
1374 cw_min = IEEE80211_CW_MIN_1;
1375 MOBJ_WRITE_2(mac, BWI_80211_MOBJ, BWI_80211_MOBJ_CWMIN, cw_min);
1380 MOBJ_WRITE_2(mac, BWI_80211_MOBJ, BWI_80211_MOBJ_CWMAX,
1385 bwi_mac_set_retry_lim(struct bwi_mac *mac, const struct bwi_retry_lim *lim)
1387 /* Short/Long retry limit */
1388 MOBJ_WRITE_2(mac, BWI_80211_MOBJ, BWI_80211_MOBJ_SHRETRY,
1390 MOBJ_WRITE_2(mac, BWI_80211_MOBJ, BWI_80211_MOBJ_LGRETRY,
1393 /* Short/Long retry fallback limit */
1394 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_SHRETRY_FB,
1396 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_LGRETEY_FB,
1401 bwi_mac_set_ackrates(struct bwi_mac *mac, const struct ieee80211_rateset *rs)
1405 /* XXX not standard conforming */
1406 for (i = 0; i < rs->rs_nrates; ++i) {
1407 enum ieee80211_modtype modtype;
1410 modtype = ieee80211_rate2modtype(rs->rs_rates[i]);
1412 case IEEE80211_MODTYPE_DS:
1415 case IEEE80211_MODTYPE_OFDM:
1419 panic("unsupported modtype %u\n", modtype);
1421 ofs += (bwi_rate2plcp(rs->rs_rates[i]) & 0xf) * 2;
1423 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, ofs + 0x20,
1424 MOBJ_READ_2(mac, BWI_COMM_MOBJ, ofs));
1429 bwi_mac_start(struct bwi_mac *mac)
1431 struct bwi_softc *sc = mac->mac_sc;
1433 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_ENABLE);
1434 CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, BWI_INTR_READY);
1436 /* Flush pending bus writes */
1437 CSR_READ_4(sc, BWI_MAC_STATUS);
1438 CSR_READ_4(sc, BWI_MAC_INTR_STATUS);
1440 return bwi_mac_config_ps(mac);
1444 bwi_mac_stop(struct bwi_mac *mac)
1446 struct bwi_softc *sc = mac->mac_sc;
1449 error = bwi_mac_config_ps(mac);
1453 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_ENABLE);
1455 /* Flush pending bus write */
1456 CSR_READ_4(sc, BWI_MAC_STATUS);
1458 #define NRETRY 10000
1459 for (i = 0; i < NRETRY; ++i) {
1460 if (CSR_READ_4(sc, BWI_MAC_INTR_STATUS) & BWI_INTR_READY)
1465 if_printf(&sc->sc_ic.ic_if, "can't stop MAC\n");
1474 bwi_mac_config_ps(struct bwi_mac *mac)
1476 struct bwi_softc *sc = mac->mac_sc;
1479 status = CSR_READ_4(sc, BWI_MAC_STATUS);
1481 status &= ~BWI_MAC_STATUS_HW_PS;
1482 status |= BWI_MAC_STATUS_WAKEUP;
1483 CSR_WRITE_4(sc, BWI_MAC_STATUS, status);
1485 /* Flush pending bus write */
1486 CSR_READ_4(sc, BWI_MAC_STATUS);
1488 if (mac->mac_rev >= 5) {
1492 for (i = 0; i < NRETRY; ++i) {
1493 if (MOBJ_READ_2(mac, BWI_COMM_MOBJ,
1494 BWI_COMM_MOBJ_UCODE_STATE) != BWI_UCODE_STATE_PS)
1499 if_printf(&sc->sc_ic.ic_if, "config PS failed\n");
1508 bwi_mac_reset_hwkeys(struct bwi_mac *mac)
1510 /* TODO: firmware crypto */
1511 MOBJ_READ_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_KEYTABLE_OFS);
1515 bwi_mac_shutdown(struct bwi_mac *mac)
1517 struct bwi_softc *sc = mac->mac_sc;
1520 if (mac->mac_flags & BWI_MAC_F_HAS_TXSTATS)
1521 sc->sc_free_txstats(sc);
1523 sc->sc_free_rx_ring(sc);
1525 for (i = 0; i < BWI_TX_NRING; ++i)
1526 sc->sc_free_tx_ring(sc, i);
1532 bwi_mac_gpio_fini(mac);
1534 bwi_rf_off(mac); /* XXX again */
1535 CSR_WRITE_2(sc, BWI_BBP_ATTEN, BWI_BBP_ATTEN_MAGIC);
1536 bwi_regwin_disable(sc, &mac->mac_regwin, 0);
1538 mac->mac_flags &= ~BWI_MAC_F_INITED;
1542 bwi_mac_get_property(struct bwi_mac *mac)
1544 struct bwi_softc *sc = mac->mac_sc;
1545 enum bwi_bus_space old_bus_space;
1551 val = CSR_READ_4(sc, BWI_MAC_STATUS);
1552 if (val & BWI_MAC_STATUS_BSWAP) {
1553 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1555 mac->mac_flags |= BWI_MAC_F_BSWAP;
1561 old_bus_space = sc->sc_bus_space;
1563 val = CSR_READ_4(sc, BWI_STATE_HI);
1564 if (__SHIFTOUT(val, BWI_STATE_HI_FLAGS_MASK) &
1565 BWI_STATE_HI_FLAG_64BIT) {
1567 sc->sc_bus_space = BWI_BUS_SPACE_64BIT;
1568 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1571 uint32_t txrx_reg = BWI_TXRX_CTRL_BASE + BWI_TX32_CTRL;
1573 CSR_WRITE_4(sc, txrx_reg, BWI_TXRX32_CTRL_ADDRHI_MASK);
1574 if (CSR_READ_4(sc, txrx_reg) & BWI_TXRX32_CTRL_ADDRHI_MASK) {
1576 sc->sc_bus_space = BWI_BUS_SPACE_32BIT;
1577 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1581 sc->sc_bus_space = BWI_BUS_SPACE_30BIT;
1582 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1587 if (old_bus_space != 0 && old_bus_space != sc->sc_bus_space) {
1588 device_printf(sc->sc_dev, "MACs bus space mismatch!\n");
1595 bwi_mac_updateslot(struct bwi_mac *mac, int shslot)
1599 if (mac->mac_phy.phy_mode == IEEE80211_MODE_11B)
1603 slot_time = IEEE80211_DUR_SHSLOT;
1605 slot_time = IEEE80211_DUR_SLOT;
1607 CSR_WRITE_2(mac->mac_sc, BWI_MAC_SLOTTIME,
1608 slot_time + BWI_MAC_SLOTTIME_ADJUST);
1609 MOBJ_WRITE_2(mac, BWI_COMM_MOBJ, BWI_COMM_MOBJ_SLOTTIME, slot_time);
1613 bwi_mac_attach(struct bwi_softc *sc, int id, uint8_t rev)
1615 struct bwi_mac *mac;
1618 KKASSERT(sc->sc_nmac <= BWI_MAC_MAX && sc->sc_nmac >= 0);
1620 if (sc->sc_nmac == BWI_MAC_MAX) {
1621 device_printf(sc->sc_dev, "too many MACs\n");
1626 * More than one MAC is only supported by BCM4309
1628 if (sc->sc_nmac != 0 &&
1629 pci_get_device(sc->sc_dev) != PCI_PRODUCT_BROADCOM_BCM4309) {
1630 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1631 "ignore second MAC");
1635 mac = &sc->sc_mac[sc->sc_nmac];
1637 /* XXX will this happen? */
1638 if (BWI_REGWIN_EXIST(&mac->mac_regwin)) {
1639 device_printf(sc->sc_dev, "%dth MAC already attached\n",
1645 * Test whether the revision of this MAC is supported
1647 #define N(arr) (int)(sizeof(arr) / sizeof(arr[0]))
1648 for (i = 0; i < N(bwi_sup_macrev); ++i) {
1649 if (bwi_sup_macrev[i] == rev)
1652 if (i == N(bwi_sup_macrev)) {
1653 device_printf(sc->sc_dev, "MAC rev %u is "
1654 "not supported\n", rev);
1659 BWI_CREATE_MAC(mac, sc, id, rev);
1662 if (mac->mac_rev < 5) {
1663 mac->mac_flags |= BWI_MAC_F_HAS_TXSTATS;
1664 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_ATTACH, "%s\n",
1667 mac->mac_flags |= BWI_MAC_F_PHYE_RESET;
1670 device_printf(sc->sc_dev, "MAC: rev %u\n", rev);
1674 static __inline void
1675 bwi_mac_balance_atten(int *bbp_atten0, int *rf_atten0)
1677 int bbp_atten, rf_atten, rf_atten_lim = -1;
1679 bbp_atten = *bbp_atten0;
1680 rf_atten = *rf_atten0;
1683 * RF attenuation affects TX power BWI_RF_ATTEN_FACTOR times
1684 * as much as BBP attenuation, so we try our best to keep RF
1685 * attenuation within range. BBP attenuation will be clamped
1686 * later if it is out of range during balancing.
1688 * BWI_RF_ATTEN_MAX0 is used as RF attenuation upper limit.
1692 * Use BBP attenuation to balance RF attenuation
1696 else if (rf_atten > BWI_RF_ATTEN_MAX0)
1697 rf_atten_lim = BWI_RF_ATTEN_MAX0;
1699 if (rf_atten_lim >= 0) {
1700 bbp_atten += (BWI_RF_ATTEN_FACTOR * (rf_atten - rf_atten_lim));
1701 rf_atten = rf_atten_lim;
1705 * If possible, use RF attenuation to balance BBP attenuation
1706 * NOTE: RF attenuation is still kept within range.
1708 while (rf_atten < BWI_RF_ATTEN_MAX0 && bbp_atten > BWI_BBP_ATTEN_MAX) {
1709 bbp_atten -= BWI_RF_ATTEN_FACTOR;
1712 while (rf_atten > 0 && bbp_atten < 0) {
1713 bbp_atten += BWI_RF_ATTEN_FACTOR;
1717 /* RF attenuation MUST be within range */
1718 KKASSERT(rf_atten >= 0 && rf_atten <= BWI_RF_ATTEN_MAX0);
1721 * Clamp BBP attenuation
1725 else if (bbp_atten > BWI_BBP_ATTEN_MAX)
1726 bbp_atten = BWI_BBP_ATTEN_MAX;
1728 *rf_atten0 = rf_atten;
1729 *bbp_atten0 = bbp_atten;
1733 bwi_mac_adjust_tpctl(struct bwi_mac *mac, int rf_atten_adj, int bbp_atten_adj)
1735 struct bwi_softc *sc = mac->mac_sc;
1736 struct bwi_rf *rf = &mac->mac_rf;
1737 struct bwi_tpctl tpctl;
1738 int bbp_atten, rf_atten, tp_ctrl1;
1740 bcopy(&mac->mac_tpctl, &tpctl, sizeof(tpctl));
1742 /* NOTE: Use signed value to do calulation */
1743 bbp_atten = tpctl.bbp_atten;
1744 rf_atten = tpctl.rf_atten;
1745 tp_ctrl1 = tpctl.tp_ctrl1;
1747 bbp_atten += bbp_atten_adj;
1748 rf_atten += rf_atten_adj;
1750 bwi_mac_balance_atten(&bbp_atten, &rf_atten);
1752 if (rf->rf_type == BWI_RF_T_BCM2050 && rf->rf_rev == 2) {
1753 if (rf_atten <= 1) {
1754 if (tp_ctrl1 == 0) {
1758 } else if (sc->sc_card_flags & BWI_CARD_F_PA_GPIO9) {
1760 (BWI_RF_ATTEN_FACTOR * (rf_atten - 2));
1763 } else if (rf_atten > 4 && tp_ctrl1 != 0) {
1765 if (bbp_atten < 3) {
1773 bwi_mac_balance_atten(&bbp_atten, &rf_atten);
1776 tpctl.bbp_atten = bbp_atten;
1777 tpctl.rf_atten = rf_atten;
1778 tpctl.tp_ctrl1 = tp_ctrl1;
1781 bwi_mac_set_tpctl_11bg(mac, &tpctl);
1782 bwi_mac_unlock(mac);
1786 * http://bcm-specs.sipsolutions.net/RecalculateTransmissionPower
1789 bwi_mac_calibrate_txpower(struct bwi_mac *mac, enum bwi_txpwrcb_type type)
1791 struct bwi_softc *sc = mac->mac_sc;
1792 struct bwi_rf *rf = &mac->mac_rf;
1793 int8_t tssi[4], tssi_avg, cur_txpwr;
1794 int error, i, ofdm_tssi;
1795 int txpwr_diff, rf_atten_adj, bbp_atten_adj;
1797 if (!sc->sc_txpwr_calib)
1800 if (mac->mac_flags & BWI_MAC_F_TPCTL_ERROR) {
1801 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "%s\n",
1802 "tpctl error happened, can't set txpower");
1806 if (BWI_IS_BRCM_BU4306(sc)) {
1807 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "%s\n",
1808 "BU4306, can't set txpower");
1813 * Save latest TSSI and reset the related memory objects
1816 error = bwi_rf_get_latest_tssi(mac, tssi, BWI_COMM_MOBJ_TSSI_DS);
1818 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "%s\n",
1821 if (mac->mac_phy.phy_mode == IEEE80211_MODE_11B) {
1822 if (type == BWI_TXPWR_FORCE) {
1831 error = bwi_rf_get_latest_tssi(mac, tssi,
1832 BWI_COMM_MOBJ_TSSI_OFDM);
1834 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "%s\n",
1836 if (type == BWI_TXPWR_FORCE) {
1845 for (i = 0; i < 4; ++i) {
1851 bwi_rf_clear_tssi(mac);
1853 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER,
1854 "tssi0 %d, tssi1 %d, tssi2 %d, tssi3 %d\n",
1855 tssi[0], tssi[1], tssi[2], tssi[3]);
1858 * Calculate RF/BBP attenuation adjustment based on
1859 * the difference between desired TX power and sampled
1862 /* +8 == "each incremented by 1/2" */
1863 tssi_avg = (tssi[0] + tssi[1] + tssi[2] + tssi[3] + 8) / 4;
1864 if (ofdm_tssi && (HFLAGS_READ(mac) & BWI_HFLAG_PWR_BOOST_DS))
1867 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "tssi avg %d\n", tssi_avg);
1869 error = bwi_rf_tssi2dbm(mac, tssi_avg, &cur_txpwr);
1872 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "current txpower %d\n",
1875 txpwr_diff = rf->rf_txpower_max - cur_txpwr; /* XXX ni_txpower */
1877 rf_atten_adj = -howmany(txpwr_diff, 8);
1878 if (type == BWI_TXPWR_INIT) {
1880 * Move toward EEPROM max TX power as fast as we can
1882 bbp_atten_adj = -txpwr_diff;
1884 bbp_atten_adj = -(txpwr_diff / 2);
1886 bbp_atten_adj -= (BWI_RF_ATTEN_FACTOR * rf_atten_adj);
1888 if (rf_atten_adj == 0 && bbp_atten_adj == 0) {
1889 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER, "%s\n",
1890 "no need to adjust RF/BBP attenuation");
1896 DPRINTF(sc, BWI_DBG_MAC | BWI_DBG_TXPOWER,
1897 "rf atten adjust %d, bbp atten adjust %d\n",
1898 rf_atten_adj, bbp_atten_adj);
1899 bwi_mac_adjust_tpctl(mac, rf_atten_adj, bbp_atten_adj);
1904 bwi_mac_lock(struct bwi_mac *mac)
1906 struct bwi_softc *sc = mac->mac_sc;
1907 struct ieee80211com *ic = &sc->sc_ic;
1909 KKASSERT((mac->mac_flags & BWI_MAC_F_LOCKED) == 0);
1911 if (mac->mac_rev < 3)
1913 else if (ic->ic_opmode != IEEE80211_M_HOSTAP)
1914 bwi_mac_config_ps(mac);
1916 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_RFLOCK);
1918 /* Flush pending bus write */
1919 CSR_READ_4(sc, BWI_MAC_STATUS);
1922 mac->mac_flags |= BWI_MAC_F_LOCKED;
1926 bwi_mac_unlock(struct bwi_mac *mac)
1928 struct bwi_softc *sc = mac->mac_sc;
1929 struct ieee80211com *ic = &sc->sc_ic;
1931 KKASSERT(mac->mac_flags & BWI_MAC_F_LOCKED);
1933 CSR_READ_2(sc, BWI_PHYINFO); /* dummy read */
1935 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_RFLOCK);
1937 if (mac->mac_rev < 3)
1939 else if (ic->ic_opmode != IEEE80211_M_HOSTAP)
1940 bwi_mac_config_ps(mac);
1942 mac->mac_flags &= ~BWI_MAC_F_LOCKED;
1946 bwi_mac_set_promisc(struct bwi_mac *mac, int promisc)
1948 struct bwi_softc *sc = mac->mac_sc;
1950 if (mac->mac_rev < 5) /* Promisc is always on */
1954 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_PROMISC);
1956 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_PROMISC);