1 ;; Constraint definitions for IA-32 and x86-64.
2 ;; Copyright (C) 2006, 2007 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
24 ;; Integer register constraints.
25 ;; It is not necessary to define 'r' here.
26 (define_register_constraint "R" "LEGACY_REGS"
27 "Legacy register---the eight integer registers available on all
28 i386 processors (@code{a}, @code{b}, @code{c}, @code{d},
29 @code{si}, @code{di}, @code{bp}, @code{sp}).")
31 (define_register_constraint "q" "TARGET_64BIT ? GENERAL_REGS : Q_REGS"
32 "Any register accessible as @code{@var{r}l}. In 32-bit mode, @code{a},
33 @code{b}, @code{c}, and @code{d}; in 64-bit mode, any integer register.")
35 (define_register_constraint "Q" "Q_REGS"
36 "Any register accessible as @code{@var{r}h}: @code{a}, @code{b},
37 @code{c}, and @code{d}.")
39 (define_register_constraint "l" "INDEX_REGS"
40 "@internal Any register that can be used as the index in a base+index
41 memory access: that is, any general register except the stack pointer.")
43 (define_register_constraint "a" "AREG"
44 "The @code{a} register.")
46 (define_register_constraint "b" "BREG"
47 "The @code{b} register.")
49 (define_register_constraint "c" "CREG"
50 "The @code{c} register.")
52 (define_register_constraint "d" "DREG"
53 "The @code{d} register.")
55 (define_register_constraint "S" "SIREG"
56 "The @code{si} register.")
58 (define_register_constraint "D" "DIREG"
59 "The @code{di} register.")
61 (define_register_constraint "A" "AD_REGS"
62 "The @code{a} and @code{d} registers, as a pair (for instructions
63 that return half the result in one and half in the other).")
65 (define_register_constraint "U" "CLOBBERED_REGS"
66 "The call-clobbered integer registers.")
68 ;; Floating-point register constraints.
69 (define_register_constraint "f"
70 "TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FLOAT_REGS : NO_REGS"
71 "Any 80387 floating-point (stack) register.")
73 (define_register_constraint "t"
74 "TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FP_TOP_REG : NO_REGS"
75 "Top of 80387 floating-point stack (@code{%st(0)}).")
77 (define_register_constraint "u"
78 "TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FP_SECOND_REG : NO_REGS"
79 "Second from top of 80387 floating-point stack (@code{%st(1)}).")
81 ;; Vector registers (also used for plain floating point nowadays).
82 (define_register_constraint "y" "TARGET_MMX ? MMX_REGS : NO_REGS"
85 (define_register_constraint "x" "TARGET_SSE ? SSE_REGS : NO_REGS"
88 ;; We use the Y prefix to denote any number of conditional register sets:
89 ;; z First SSE register.
91 ;; i SSE2 inter-unit moves enabled
92 ;; m MMX inter-unit moves enabled
94 (define_register_constraint "Yz" "TARGET_SSE ? SSE_FIRST_REG : NO_REGS"
95 "First SSE register (@code{%xmm0}).")
97 (define_register_constraint "Y2" "TARGET_SSE2 ? SSE_REGS : NO_REGS"
98 "@internal Any SSE register, when SSE2 is enabled.")
100 (define_register_constraint "Yi"
101 "TARGET_SSE2 && TARGET_INTER_UNIT_MOVES ? SSE_REGS : NO_REGS"
102 "@internal Any SSE register, when SSE2 and inter-unit moves are enabled.")
104 (define_register_constraint "Ym"
105 "TARGET_MMX && TARGET_INTER_UNIT_MOVES ? MMX_REGS : NO_REGS"
106 "@internal Any MMX register, when inter-unit moves are enabled.")
108 ;; Integer constant constraints.
109 (define_constraint "I"
110 "Integer constant in the range 0 @dots{} 31, for 32-bit shifts."
111 (and (match_code "const_int")
112 (match_test "IN_RANGE (ival, 0, 31)")))
114 (define_constraint "J"
115 "Integer constant in the range 0 @dots{} 63, for 64-bit shifts."
116 (and (match_code "const_int")
117 (match_test "IN_RANGE (ival, 0, 63)")))
119 (define_constraint "K"
120 "Signed 8-bit integer constant."
121 (and (match_code "const_int")
122 (match_test "IN_RANGE (ival, -128, 127)")))
124 (define_constraint "L"
125 "@code{0xFF} or @code{0xFFFF}, for andsi as a zero-extending move."
126 (and (match_code "const_int")
127 (match_test "ival == 0xFF || ival == 0xFFFF")))
129 (define_constraint "M"
130 "0, 1, 2, or 3 (shifts for the @code{lea} instruction)."
131 (and (match_code "const_int")
132 (match_test "IN_RANGE (ival, 0, 3)")))
134 (define_constraint "N"
135 "Unsigned 8-bit integer constant (for @code{in} and @code{out}
137 (and (match_code "const_int")
138 (match_test "IN_RANGE (ival, 0, 255)")))
140 (define_constraint "O"
141 "@internal Integer constant in the range 0 @dots{} 127, for 128-bit shifts."
142 (and (match_code "const_int")
143 (match_test "IN_RANGE (ival, 0, 127)")))
145 ;; Floating-point constant constraints.
146 ;; We allow constants even if TARGET_80387 isn't set, because the
147 ;; stack register converter may need to load 0.0 into the function
148 ;; value register (top of stack).
149 (define_constraint "G"
150 "Standard 80387 floating point constant."
151 (and (match_code "const_double")
152 (match_test "standard_80387_constant_p (op)")))
154 ;; This can theoretically be any mode's CONST0_RTX.
155 (define_constraint "C"
156 "Standard SSE floating point constant."
157 (match_test "standard_sse_constant_p (op)"))
159 ;; Constant-or-symbol-reference constraints.
161 (define_constraint "e"
162 "32-bit signed integer constant, or a symbolic reference known
163 to fit that range (for immediate operands in sign-extending x86-64
165 (match_operand 0 "x86_64_immediate_operand"))
167 (define_constraint "Z"
168 "32-bit unsigned integer constant, or a symbolic reference known
169 to fit that range (for immediate operands in zero-extending x86-64
171 (match_operand 0 "x86_64_zext_immediate_operand"))