sys/dev/netif/em/if_em.c

   1 /*
   2  *
   3  * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
   4  *
   5  * Copyright (c) 2001-2006, Intel Corporation
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions are met:
  10  *
  11  *  1. Redistributions of source code must retain the above copyright notice,
  12  *     this list of conditions and the following disclaimer.
  13  *
  14  *  2. Redistributions in binary form must reproduce the above copyright
  15  *     notice, this list of conditions and the following disclaimer in the
  16  *     documentation and/or other materials provided with the distribution.
  17  *
  18  *  3. Neither the name of the Intel Corporation nor the names of its
  19  *     contributors may be used to endorse or promote products derived from
  20  *     this software without specific prior written permission.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  26  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  32  * POSSIBILITY OF SUCH DAMAGE.
  33  *
  34  *
  35  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
  36  *
  37  * This code is derived from software contributed to The DragonFly Project
  38  * by Matthew Dillon <dillon@backplane.com>
  39  *
  40  * Redistribution and use in source and binary forms, with or without
  41  * modification, are permitted provided that the following conditions
  42  * are met:
  43  *
  44  * 1. Redistributions of source code must retain the above copyright
  45  *    notice, this list of conditions and the following disclaimer.
  46  * 2. Redistributions in binary form must reproduce the above copyright
  47  *    notice, this list of conditions and the following disclaimer in
  48  *    the documentation and/or other materials provided with the
  49  *    distribution.
  50  * 3. Neither the name of The DragonFly Project nor the names of its
  51  *    contributors may be used to endorse or promote products derived
  52  *    from this software without specific, prior written permission.
  53  *
  54  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  55  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  56  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  57  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  58  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  59  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  60  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  61  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  62  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  63  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  64  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  65  * SUCH DAMAGE.
  66  *
  67  * $DragonFly: src/sys/dev/netif/em/if_em.c,v 1.51 2006/12/09 01:44:23 swildner Exp $
  68  * $FreeBSD$
  69  */
  70 /*
  71  * SERIALIZATION API RULES:
  72  *
  73  * - If the driver uses the same serializer for the interrupt as for the
  74  *   ifnet, most of the serialization will be done automatically for the
  75  *   driver.
  76  *
  77  * - ifmedia entry points will be serialized by the ifmedia code using the
  78  *   ifnet serializer.
  79  *
  80  * - if_* entry points except for if_input will be serialized by the IF
  81  *   and protocol layers.
  82  *
  83  * - The device driver must be sure to serialize access from timeout code
  84  *   installed by the device driver.
  85  *
  86  * - The device driver typically holds the serializer at the time it wishes
  87  *   to call if_input.  If so, it should pass the serializer to if_input and
  88  *   note that the serializer might be dropped temporarily by if_input
  89  *   (e.g. in case it has to bridge the packet to another interface).
  90  *
  91  *   NOTE!  Since callers into the device driver hold the ifnet serializer,
  92  *   the device driver may be holding a serializer at the time it calls
  93  *   if_input even if it is not serializer-aware.
  94  */
  95
  96 #include "opt_polling.h"
  97
  98 #include <dev/netif/em/if_em.h>
  99 #include <net/ifq_var.h>
 100
 101 /*********************************************************************
 102  *  Set this to one to display debug statistics
 103  *********************************************************************/
 104 int             em_display_debug_stats = 0;
 105
 106 /*********************************************************************
 107  *  Driver version
 108  *********************************************************************/
 109
 110 char em_driver_version[] = "6.1.4";
 111
 112
 113 /*********************************************************************
 114  *  PCI Device ID Table
 115  *
 116  *  Used by probe to select devices to load on
 117  *  Last field stores an index into em_strings
 118  *  Last entry must be all 0s
 119  *
 120  *  { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index }
 121  *********************************************************************/
 122
 123 static em_vendor_info_t em_vendor_info_array[] =
 124 {
 125         /* Intel(R) PRO/1000 Network Connection */
 126         { 0x8086, E1000_DEV_ID_82540EM,         PCI_ANY_ID, PCI_ANY_ID, 0},
 127         { 0x8086, E1000_DEV_ID_82540EM_LOM,     PCI_ANY_ID, PCI_ANY_ID, 0},
 128         { 0x8086, E1000_DEV_ID_82540EP,         PCI_ANY_ID, PCI_ANY_ID, 0},
 129         { 0x8086, E1000_DEV_ID_82540EP_LOM,     PCI_ANY_ID, PCI_ANY_ID, 0},
 130         { 0x8086, E1000_DEV_ID_82540EP_LP,      PCI_ANY_ID, PCI_ANY_ID, 0},
 131
 132         { 0x8086, E1000_DEV_ID_82541EI,         PCI_ANY_ID, PCI_ANY_ID, 0},
 133         { 0x8086, E1000_DEV_ID_82541ER,         PCI_ANY_ID, PCI_ANY_ID, 0},
 134         { 0x8086, E1000_DEV_ID_82541EI_MOBILE,  PCI_ANY_ID, PCI_ANY_ID, 0},
 135         { 0x8086, E1000_DEV_ID_82541GI,         PCI_ANY_ID, PCI_ANY_ID, 0},
 136         { 0x8086, E1000_DEV_ID_82541GI_LF,      PCI_ANY_ID, PCI_ANY_ID, 0},
 137         { 0x8086, E1000_DEV_ID_82541GI_MOBILE,  PCI_ANY_ID, PCI_ANY_ID, 0},
 138
 139         { 0x8086, E1000_DEV_ID_82542,           PCI_ANY_ID, PCI_ANY_ID, 0},
 140
 141         { 0x8086, E1000_DEV_ID_82543GC_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 142         { 0x8086, E1000_DEV_ID_82543GC_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 143
 144         { 0x8086, E1000_DEV_ID_82544EI_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 145         { 0x8086, E1000_DEV_ID_82544EI_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 146         { 0x8086, E1000_DEV_ID_82544GC_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 147         { 0x8086, E1000_DEV_ID_82544GC_LOM,     PCI_ANY_ID, PCI_ANY_ID, 0},
 148
 149         { 0x8086, E1000_DEV_ID_82545EM_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 150         { 0x8086, E1000_DEV_ID_82545EM_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 151         { 0x8086, E1000_DEV_ID_82545GM_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 152         { 0x8086, E1000_DEV_ID_82545GM_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 153         { 0x8086, E1000_DEV_ID_82545GM_SERDES,  PCI_ANY_ID, PCI_ANY_ID, 0},
 154
 155         { 0x8086, E1000_DEV_ID_82546EB_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 156         { 0x8086, E1000_DEV_ID_82546EB_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 157         { 0x8086, E1000_DEV_ID_82546EB_QUAD_COPPER, PCI_ANY_ID, PCI_ANY_ID, 0},
 158         { 0x8086, E1000_DEV_ID_82546GB_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 159         { 0x8086, E1000_DEV_ID_82546GB_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 160         { 0x8086, E1000_DEV_ID_82546GB_SERDES,  PCI_ANY_ID, PCI_ANY_ID, 0},
 161         { 0x8086, E1000_DEV_ID_82546GB_PCIE,    PCI_ANY_ID, PCI_ANY_ID, 0},
 162         { 0x8086, E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3,
 163                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 164
 165         { 0x8086, E1000_DEV_ID_82547EI,         PCI_ANY_ID, PCI_ANY_ID, 0},
 166         { 0x8086, E1000_DEV_ID_82547GI,         PCI_ANY_ID, PCI_ANY_ID, 0},
 167
 168         { 0x8086, E1000_DEV_ID_82571EB_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 169         { 0x8086, E1000_DEV_ID_82571EB_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 170         { 0x8086, E1000_DEV_ID_82571EB_SERDES,  PCI_ANY_ID, PCI_ANY_ID, 0},
 171         { 0x8086, E1000_DEV_ID_82571EB_QUAD_COPPER,
 172                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 173
 174         { 0x8086, E1000_DEV_ID_82572EI_COPPER,  PCI_ANY_ID, PCI_ANY_ID, 0},
 175         { 0x8086, E1000_DEV_ID_82572EI_FIBER,   PCI_ANY_ID, PCI_ANY_ID, 0},
 176         { 0x8086, E1000_DEV_ID_82572EI_SERDES,  PCI_ANY_ID, PCI_ANY_ID, 0},
 177         { 0x8086, E1000_DEV_ID_82572EI,         PCI_ANY_ID, PCI_ANY_ID, 0},
 178
 179         { 0x8086, E1000_DEV_ID_82573E,          PCI_ANY_ID, PCI_ANY_ID, 0},
 180         { 0x8086, E1000_DEV_ID_82573E_IAMT,     PCI_ANY_ID, PCI_ANY_ID, 0},
 181         { 0x8086, E1000_DEV_ID_82573L,          PCI_ANY_ID, PCI_ANY_ID, 0},
 182
 183         { 0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_SPT,
 184                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 185         { 0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_SPT,
 186                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 187         { 0x8086, E1000_DEV_ID_80003ES2LAN_COPPER_DPT,
 188                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 189         { 0x8086, E1000_DEV_ID_80003ES2LAN_SERDES_DPT,
 190                                                 PCI_ANY_ID, PCI_ANY_ID, 0},
 191
 192         { 0x8086, E1000_DEV_ID_ICH8_IGP_AMT,    PCI_ANY_ID, PCI_ANY_ID, 0},
 193         { 0x8086, E1000_DEV_ID_ICH8_IGP_C,      PCI_ANY_ID, PCI_ANY_ID, 0},
 194         { 0x8086, E1000_DEV_ID_ICH8_IFE,        PCI_ANY_ID, PCI_ANY_ID, 0},
 195
 196         { 0x8086, 0x101A, PCI_ANY_ID, PCI_ANY_ID, 0},
 197         { 0x8086, 0x1014, PCI_ANY_ID, PCI_ANY_ID, 0},
 198         /* required last entry */
 199         { 0, 0, 0, 0, 0}
 200 };
 201
 202 /*********************************************************************
 203  *  Table of branding strings for all supported NICs.
 204  *********************************************************************/
 205
 206 static const char *em_strings[] = {
 207         "Intel(R) PRO/1000 Network Connection"
 208 };
 209
 210 /*********************************************************************
 211  *  Function prototypes
 212  *********************************************************************/
 213 static int      em_probe(device_t);
 214 static int      em_attach(device_t);
 215 static int      em_detach(device_t);
 216 static int      em_shutdown(device_t);
 217 static void     em_intr(void *);
 218 static void     em_start(struct ifnet *);
 219 static int      em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
 220 static void     em_watchdog(struct ifnet *);
 221 static void     em_init(void *);
 222 static void     em_stop(void *);
 223 static void     em_media_status(struct ifnet *, struct ifmediareq *);
 224 static int      em_media_change(struct ifnet *);
 225 static void     em_identify_hardware(struct adapter *);
 226 static int      em_allocate_pci_resource(device_t);
 227 static void     em_free_pci_resource(device_t);
 228 static void     em_local_timer(void *);
 229 static int      em_hardware_init(struct adapter *);
 230 static void     em_setup_interface(device_t, struct adapter *);
 231 static int      em_setup_transmit_structures(struct adapter *);
 232 static void     em_initialize_transmit_unit(struct adapter *);
 233 static int      em_setup_receive_structures(struct adapter *);
 234 static void     em_initialize_receive_unit(struct adapter *);
 235 static void     em_enable_intr(struct adapter *);
 236 static void     em_disable_intr(struct adapter *);
 237 static void     em_free_transmit_structures(struct adapter *);
 238 static void     em_free_receive_structures(struct adapter *);
 239 static void     em_update_stats_counters(struct adapter *);
 240 static void     em_clean_transmit_interrupts(struct adapter *);
 241 static int      em_allocate_receive_structures(struct adapter *);
 242 static int      em_allocate_transmit_structures(struct adapter *);
 243 static void     em_process_receive_interrupts(struct adapter *, int);
 244 static void     em_receive_checksum(struct adapter *, struct em_rx_desc *,
 245                                     struct mbuf *);
 246 static void     em_transmit_checksum_setup(struct adapter *, struct mbuf *,
 247                                            uint32_t *, uint32_t *);
 248 static void     em_set_promisc(struct adapter *);
 249 static void     em_disable_promisc(struct adapter *);
 250 static void     em_set_multi(struct adapter *);
 251 static void     em_print_hw_stats(struct adapter *);
 252 static void     em_print_link_status(struct adapter *);
 253 static int      em_get_buf(int i, struct adapter *, struct mbuf *, int how);
 254 static void     em_enable_vlans(struct adapter *);
 255 static void     em_disable_vlans(struct adapter *);
 256 static int      em_encap(struct adapter *, struct mbuf *);
 257 static void     em_smartspeed(struct adapter *);
 258 static int      em_82547_fifo_workaround(struct adapter *, int);
 259 static void     em_82547_update_fifo_head(struct adapter *, int);
 260 static int      em_82547_tx_fifo_reset(struct adapter *);
 261 static void     em_82547_move_tail(void *);
 262 static void     em_82547_move_tail_serialized(struct adapter *);
 263 static int      em_dma_malloc(struct adapter *, bus_size_t,
 264                               struct em_dma_alloc *, int);
 265 static void     em_dma_free(struct adapter *, struct em_dma_alloc *);
 266 static void     em_print_debug_info(struct adapter *);
 267 static int      em_is_valid_ether_addr(uint8_t *);
 268 static int      em_sysctl_stats(SYSCTL_HANDLER_ARGS);
 269 static int      em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
 270 static uint32_t em_fill_descriptors(uint64_t address, uint32_t length,
 271                                    PDESC_ARRAY desc_array);
 272 static int      em_sysctl_int_delay(SYSCTL_HANDLER_ARGS);
 273 static int      em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
 274 static void     em_add_int_delay_sysctl(struct adapter *, const char *,
 275                                         const char *,
 276                                         struct em_int_delay_info *, int, int);
 277
 278 /*********************************************************************
 279  *  FreeBSD Device Interface Entry Points
 280  *********************************************************************/
 281
 282 static device_method_t em_methods[] = {
 283         /* Device interface */
 284         DEVMETHOD(device_probe, em_probe),
 285         DEVMETHOD(device_attach, em_attach),
 286         DEVMETHOD(device_detach, em_detach),
 287         DEVMETHOD(device_shutdown, em_shutdown),
 288         {0, 0}
 289 };
 290
 291 static driver_t em_driver = {
 292         "em", em_methods, sizeof(struct adapter),
 293 };
 294
 295 static devclass_t em_devclass;
 296
 297 DECLARE_DUMMY_MODULE(if_em);
 298 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, 0, 0);
 299
 300 /*********************************************************************
 301  *  Tunable default values.
 302  *********************************************************************/
 303
 304 #define E1000_TICKS_TO_USECS(ticks)     ((1024 * (ticks) + 500) / 1000)
 305 #define E1000_USECS_TO_TICKS(usecs)     ((1000 * (usecs) + 512) / 1024)
 306
 307 static int em_tx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TIDV);
 308 static int em_rx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RDTR);
 309 static int em_tx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TADV);
 310 static int em_rx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RADV);
 311 static int em_int_throttle_ceil = 10000;
 312 static int em_rxd = EM_DEFAULT_RXD;
 313 static int em_txd = EM_DEFAULT_TXD;
 314 static int em_smart_pwr_down = FALSE;
 315
 316 TUNABLE_INT("hw.em.tx_int_delay", &em_tx_int_delay_dflt);
 317 TUNABLE_INT("hw.em.rx_int_delay", &em_rx_int_delay_dflt);
 318 TUNABLE_INT("hw.em.tx_abs_int_delay", &em_tx_abs_int_delay_dflt);
 319 TUNABLE_INT("hw.em.rx_abs_int_delay", &em_rx_abs_int_delay_dflt);
 320 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
 321 TUNABLE_INT("hw.em.rxd", &em_rxd);
 322 TUNABLE_INT("hw.em.txd", &em_txd);
 323 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
 324
 325 /*
 326  * Kernel trace for characterization of operations
 327  */
 328 #if !defined(KTR_IF_EM)
 329 #define KTR_IF_EM       KTR_ALL
 330 #endif
 331 KTR_INFO_MASTER(if_em);
 332 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin", 0);
 333 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end", 0);
 334 #ifdef DEVICE_POLLING
 335 KTR_INFO(KTR_IF_EM, if_em, poll_beg, 2, "poll begin", 0);
 336 KTR_INFO(KTR_IF_EM, if_em, poll_end, 3, "poll end", 0);
 337 #endif
 338 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet", 0);
 339 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet", 0);
 340 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean", 0);
 341 #define logif(name)     KTR_LOG(if_em_ ## name)
 342
 343 /*********************************************************************
 344  *  Device identification routine
 345  *
 346  *  em_probe determines if the driver should be loaded on
 347  *  adapter based on PCI vendor/device id of the adapter.
 348  *
 349  *  return 0 on success, positive on failure
 350  *********************************************************************/
 351
 352 static int
 353 em_probe(device_t dev)
 354 {
 355         em_vendor_info_t *ent;
 356
 357         uint16_t pci_vendor_id = 0;
 358         uint16_t pci_device_id = 0;
 359         uint16_t pci_subvendor_id = 0;
 360         uint16_t pci_subdevice_id = 0;
 361         char adapter_name[60];
 362
 363         INIT_DEBUGOUT("em_probe: begin");
 364
 365         pci_vendor_id = pci_get_vendor(dev);
 366         if (pci_vendor_id != EM_VENDOR_ID)
 367                 return(ENXIO);
 368
 369         pci_device_id = pci_get_device(dev);
 370         pci_subvendor_id = pci_get_subvendor(dev);
 371         pci_subdevice_id = pci_get_subdevice(dev);
 372
 373         ent = em_vendor_info_array;
 374         while (ent->vendor_id != 0) {
 375                 if ((pci_vendor_id == ent->vendor_id) &&
 376                     (pci_device_id == ent->device_id) &&
 377
 378                     ((pci_subvendor_id == ent->subvendor_id) ||
 379                      (ent->subvendor_id == PCI_ANY_ID)) &&
 380
 381                     ((pci_subdevice_id == ent->subdevice_id) ||
 382                      (ent->subdevice_id == PCI_ANY_ID))) {
 383                         snprintf(adapter_name, sizeof(adapter_name),
 384                                  "%s, Version - %s",  em_strings[ent->index],
 385                                  em_driver_version);
 386                         device_set_desc_copy(dev, adapter_name);
 387                         return(0);
 388                 }
 389                 ent++;
 390         }
 391
 392         return(ENXIO);
 393 }
 394
 395 /*********************************************************************
 396  *  Device initialization routine
 397  *
 398  *  The attach entry point is called when the driver is being loaded.
 399  *  This routine identifies the type of hardware, allocates all resources
 400  *  and initializes the hardware.
 401  *
 402  *  return 0 on success, positive on failure
 403  *********************************************************************/
 404
 405 static int
 406 em_attach(device_t dev)
 407 {
 408         struct adapter *adapter;
 409         int tsize, rsize;
 410         int error = 0;
 411
 412         INIT_DEBUGOUT("em_attach: begin");
 413
 414         adapter = device_get_softc(dev);
 415
 416         callout_init(&adapter->timer);
 417         callout_init(&adapter->tx_fifo_timer);
 418
 419         adapter->dev = dev;
 420         adapter->osdep.dev = dev;
 421
 422         /* SYSCTL stuff */
 423         sysctl_ctx_init(&adapter->sysctl_ctx);
 424         adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx,
 425                                                SYSCTL_STATIC_CHILDREN(_hw),
 426                                                OID_AUTO,
 427                                                device_get_nameunit(dev),
 428                                                CTLFLAG_RD,
 429                                                0, "");
 430
 431         if (adapter->sysctl_tree == NULL) {
 432                 device_printf(dev, "Unable to create sysctl tree\n");
 433                 return EIO;
 434         }
 435
 436         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
 437                         SYSCTL_CHILDREN(adapter->sysctl_tree),
 438                         OID_AUTO, "debug_info", CTLTYPE_INT|CTLFLAG_RW,
 439                         (void *)adapter, 0,
 440                         em_sysctl_debug_info, "I", "Debug Information");
 441
 442         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
 443                         SYSCTL_CHILDREN(adapter->sysctl_tree),
 444                         OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW,
 445                         (void *)adapter, 0,
 446                         em_sysctl_stats, "I", "Statistics");
 447
 448         /* Determine hardware revision */
 449         em_identify_hardware(adapter);
 450
 451         /* Set up some sysctls for the tunable interrupt delays */
 452         em_add_int_delay_sysctl(adapter, "rx_int_delay",
 453                                 "receive interrupt delay in usecs",
 454                                 &adapter->rx_int_delay,
 455                                 E1000_REG_OFFSET(&adapter->hw, RDTR),
 456                                 em_rx_int_delay_dflt);
 457         em_add_int_delay_sysctl(adapter, "tx_int_delay",
 458                                 "transmit interrupt delay in usecs",
 459                                 &adapter->tx_int_delay,
 460                                 E1000_REG_OFFSET(&adapter->hw, TIDV),
 461                                 em_tx_int_delay_dflt);
 462         if (adapter->hw.mac_type >= em_82540) {
 463                 em_add_int_delay_sysctl(adapter, "rx_abs_int_delay",
 464                                         "receive interrupt delay limit in usecs",
 465                                         &adapter->rx_abs_int_delay,
 466                                         E1000_REG_OFFSET(&adapter->hw, RADV),
 467                                         em_rx_abs_int_delay_dflt);
 468                 em_add_int_delay_sysctl(adapter, "tx_abs_int_delay",
 469                                         "transmit interrupt delay limit in usecs",
 470                                         &adapter->tx_abs_int_delay,
 471                                         E1000_REG_OFFSET(&adapter->hw, TADV),
 472                                         em_tx_abs_int_delay_dflt);
 473                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
 474                         SYSCTL_CHILDREN(adapter->sysctl_tree),
 475                         OID_AUTO, "int_throttle_ceil", CTLTYPE_INT|CTLFLAG_RW,
 476                         adapter, 0, em_sysctl_int_throttle, "I", NULL);
 477         }
 478
 479         /*
 480          * Validate number of transmit and receive descriptors. It
 481          * must not exceed hardware maximum, and must be multiple
 482          * of EM_DBA_ALIGN (128)
 483          */
 484         if (((em_txd * sizeof(struct em_tx_desc)) % EM_DBA_ALIGN) != 0 ||
 485             (adapter->hw.mac_type >= em_82544 && em_txd > EM_MAX_TXD) ||
 486             (adapter->hw.mac_type < em_82544 && em_txd > EM_MAX_TXD_82543) ||
 487             (em_txd < EM_MIN_TXD)) {
 488                 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
 489                               EM_DEFAULT_TXD, em_txd);
 490                 adapter->num_tx_desc = EM_DEFAULT_TXD;
 491         } else {
 492                 adapter->num_tx_desc = em_txd;
 493         }
 494
 495         if (((em_rxd * sizeof(struct em_rx_desc)) % EM_DBA_ALIGN) != 0 ||
 496             (adapter->hw.mac_type >= em_82544 && em_rxd > EM_MAX_RXD) ||
 497             (adapter->hw.mac_type < em_82544 && em_rxd > EM_MAX_RXD_82543) ||
 498             (em_rxd < EM_MIN_RXD)) {
 499                 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
 500                               EM_DEFAULT_RXD, em_rxd);
 501                 adapter->num_rx_desc = EM_DEFAULT_RXD;
 502         } else {
 503                 adapter->num_rx_desc = em_rxd;
 504         }
 505
 506         adapter->hw.autoneg = DO_AUTO_NEG;
 507         adapter->hw.wait_autoneg_complete = WAIT_FOR_AUTO_NEG_DEFAULT;
 508         adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT;
 509         adapter->hw.tbi_compatibility_en = TRUE;
 510         adapter->rx_buffer_len = EM_RXBUFFER_2048;
 511
 512         adapter->hw.phy_init_script = 1;
 513         adapter->hw.phy_reset_disable = FALSE;
 514
 515 #ifndef EM_MASTER_SLAVE
 516         adapter->hw.master_slave = em_ms_hw_default;
 517 #else
 518         adapter->hw.master_slave = EM_MASTER_SLAVE;
 519 #endif
 520
 521         /*
 522          * Set the max frame size assuming standard ethernet
 523          * sized frames
 524          */
 525         adapter->hw.max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
 526
 527         adapter->hw.min_frame_size =
 528             MINIMUM_ETHERNET_PACKET_SIZE + ETHER_CRC_LEN;
 529
 530         /*
 531          * This controls when hardware reports transmit completion
 532          * status.
 533          */
 534         adapter->hw.report_tx_early = 1;
 535
 536         error = em_allocate_pci_resource(dev);
 537         if (error)
 538                 goto fail;
 539
 540         /* Initialize eeprom parameters */
 541         em_init_eeprom_params(&adapter->hw);
 542
 543         tsize = roundup2(adapter->num_tx_desc * sizeof(struct em_tx_desc),
 544                          EM_DBA_ALIGN);
 545
 546         /* Allocate Transmit Descriptor ring */
 547         if (em_dma_malloc(adapter, tsize, &adapter->txdma, BUS_DMA_WAITOK)) {
 548                 device_printf(dev, "Unable to allocate TxDescriptor memory\n");
 549                 error = ENOMEM;
 550                 goto fail;
 551         }
 552         adapter->tx_desc_base = (struct em_tx_desc *) adapter->txdma.dma_vaddr;
 553
 554         rsize = roundup2(adapter->num_rx_desc * sizeof(struct em_rx_desc),
 555                          EM_DBA_ALIGN);
 556
 557         /* Allocate Receive Descriptor ring */
 558         if (em_dma_malloc(adapter, rsize, &adapter->rxdma, BUS_DMA_WAITOK)) {
 559                 device_printf(dev, "Unable to allocate rx_desc memory\n");
 560                 error = ENOMEM;
 561                 goto fail;
 562         }
 563         adapter->rx_desc_base = (struct em_rx_desc *) adapter->rxdma.dma_vaddr;
 564
 565         /* Initialize the hardware */
 566         if (em_hardware_init(adapter)) {
 567                 device_printf(dev, "Unable to initialize the hardware\n");
 568                 error = EIO;
 569                 goto fail;
 570         }
 571
 572         /* Copy the permanent MAC address out of the EEPROM */
 573         if (em_read_mac_addr(&adapter->hw) < 0) {
 574                 device_printf(dev,
 575                               "EEPROM read error while reading mac address\n");
 576                 error = EIO;
 577                 goto fail;
 578         }
 579
 580         if (!em_is_valid_ether_addr(adapter->hw.mac_addr)) {
 581                 device_printf(dev, "Invalid mac address\n");
 582                 error = EIO;
 583                 goto fail;
 584         }
 585
 586         /* Setup OS specific network interface */
 587         em_setup_interface(dev, adapter);
 588
 589         /* Initialize statistics */
 590         em_clear_hw_cntrs(&adapter->hw);
 591         em_update_stats_counters(adapter);
 592         adapter->hw.get_link_status = 1;
 593         em_check_for_link(&adapter->hw);
 594
 595         /* Print the link status */
 596         if (adapter->link_active == 1) {
 597                 em_get_speed_and_duplex(&adapter->hw, &adapter->link_speed,
 598                                         &adapter->link_duplex);
 599                 device_printf(dev, "Speed: %d Mbps, Duplex: %s\n",
 600                     adapter->link_speed,
 601                     adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half");
 602         } else {
 603                 device_printf(dev, "Speed: N/A, Duplex:N/A\n");
 604         }
 605
 606         /* Indicate SOL/IDER usage */
 607         if (em_check_phy_reset_block(&adapter->hw)) {
 608                 device_printf(dev, "PHY reset is blocked due to "
 609                               "SOL/IDER session.\n");
 610         }
 611
 612         /* Identify 82544 on PCIX */
 613         em_get_bus_info(&adapter->hw);
 614         if (adapter->hw.bus_type == em_bus_type_pcix &&
 615             adapter->hw.mac_type == em_82544)
 616                 adapter->pcix_82544 = TRUE;
 617         else
 618                 adapter->pcix_82544 = FALSE;
 619
 620         error = bus_setup_intr(dev, adapter->res_interrupt, INTR_NETSAFE,
 621                            em_intr, adapter,
 622                            &adapter->int_handler_tag,
 623                            adapter->interface_data.ac_if.if_serializer);
 624         if (error) {
 625                 device_printf(dev, "Error registering interrupt handler!\n");
 626                 ether_ifdetach(&adapter->interface_data.ac_if);
 627                 goto fail;
 628         }
 629
 630         INIT_DEBUGOUT("em_attach: end");
 631         return(0);
 632
 633 fail:
 634         em_detach(dev);
 635         return(error);
 636 }
 637
 638 /*********************************************************************
 639  *  Device removal routine
 640  *
 641  *  The detach entry point is called when the driver is being removed.
 642  *  This routine stops the adapter and deallocates all the resources
 643  *  that were allocated for driver operation.
 644  *
 645  *  return 0 on success, positive on failure
 646  *********************************************************************/
 647
 648 static int
 649 em_detach(device_t dev)
 650 {
 651         struct adapter *adapter = device_get_softc(dev);
 652
 653         INIT_DEBUGOUT("em_detach: begin");
 654
 655         if (device_is_attached(dev)) {
 656                 struct ifnet *ifp = &adapter->interface_data.ac_if;
 657
 658                 lwkt_serialize_enter(ifp->if_serializer);
 659                 adapter->in_detach = 1;
 660                 em_stop(adapter);
 661                 em_phy_hw_reset(&adapter->hw);
 662                 bus_teardown_intr(dev, adapter->res_interrupt,
 663                                   adapter->int_handler_tag);
 664                 lwkt_serialize_exit(ifp->if_serializer);
 665
 666                 ether_ifdetach(ifp);
 667         }
 668         bus_generic_detach(dev);
 669
 670         em_free_pci_resource(dev);
 671
 672         /* Free Transmit Descriptor ring */
 673         if (adapter->tx_desc_base != NULL) {
 674                 em_dma_free(adapter, &adapter->txdma);
 675                 adapter->tx_desc_base = NULL;
 676         }
 677
 678         /* Free Receive Descriptor ring */
 679         if (adapter->rx_desc_base != NULL) {
 680                 em_dma_free(adapter, &adapter->rxdma);
 681                 adapter->rx_desc_base = NULL;
 682         }
 683
 684         /* Free sysctl tree */
 685         if (adapter->sysctl_tree != NULL) {
 686                 adapter->sysctl_tree = NULL;
 687                 sysctl_ctx_free(&adapter->sysctl_ctx);
 688         }
 689
 690         return(0);
 691 }
 692
 693 /*********************************************************************
 694  *
 695  *  Shutdown entry point
 696  *
 697  **********************************************************************/
 698
 699 static int
 700 em_shutdown(device_t dev)
 701 {
 702         struct adapter *adapter = device_get_softc(dev);
 703         struct ifnet *ifp = &adapter->interface_data.ac_if;
 704
 705         lwkt_serialize_enter(ifp->if_serializer);
 706         em_stop(adapter);
 707         lwkt_serialize_exit(ifp->if_serializer);
 708
 709         return(0);
 710 }
 711
 712 /*********************************************************************
 713  *  Transmit entry point
 714  *
 715  *  em_start is called by the stack to initiate a transmit.
 716  *  The driver will remain in this routine as long as there are
 717  *  packets to transmit and transmit resources are available.
 718  *  In case resources are not available stack is notified and
 719  *  the packet is requeued.
 720  **********************************************************************/
 721
 722 static void
 723 em_start(struct ifnet *ifp)
 724 {
 725         struct mbuf *m_head;
 726         struct adapter *adapter = ifp->if_softc;
 727
 728         ASSERT_SERIALIZED(ifp->if_serializer);
 729
 730         if (!adapter->link_active)
 731                 return;
 732         while (!ifq_is_empty(&ifp->if_snd)) {
 733                 m_head = ifq_poll(&ifp->if_snd);
 734
 735                 if (m_head == NULL)
 736                         break;
 737
 738                 logif(pkt_txqueue);
 739                 if (em_encap(adapter, m_head)) {
 740                         ifp->if_flags |= IFF_OACTIVE;
 741                         break;
 742                 }
 743                 ifq_dequeue(&ifp->if_snd, m_head);
 744
 745                 /* Send a copy of the frame to the BPF listener */
 746                 BPF_MTAP(ifp, m_head);
 747
 748                 /* Set timeout in case hardware has problems transmitting */
 749                 ifp->if_timer = EM_TX_TIMEOUT;
 750         }
 751 }
 752
 753 /*********************************************************************
 754  *  Ioctl entry point
 755  *
 756  *  em_ioctl is called when the user wants to configure the
 757  *  interface.
 758  *
 759  *  return 0 on success, positive on failure
 760  **********************************************************************/
 761
 762 static int
 763 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
 764 {
 765         int max_frame_size, mask, error = 0, reinit = 0;
 766         struct ifreq *ifr = (struct ifreq *) data;
 767         struct adapter *adapter = ifp->if_softc;
 768         uint16_t eeprom_data = 0;
 769
 770         ASSERT_SERIALIZED(ifp->if_serializer);
 771
 772         if (adapter->in_detach)
 773                 return 0;
 774
 775         switch (command) {
 776         case SIOCSIFMTU:
 777                 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFMTU (Set Interface MTU)");
 778                 switch (adapter->hw.mac_type) {
 779                 case em_82573:
 780                         /*
 781                          * 82573 only supports jumbo frames
 782                          * if ASPM is disabled.
 783                          */
 784                         em_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3,
 785                             1, &eeprom_data);
 786                         if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
 787                                 max_frame_size = ETHER_MAX_LEN;
 788                                 break;
 789                         }
 790                         /* Allow Jumbo frames */
 791                         /* FALLTHROUGH */
 792                 case em_82571:
 793                 case em_82572:
 794                 case em_80003es2lan:    /* Limit Jumbo Frame size */
 795                         max_frame_size = 9234;
 796                         break;
 797                 case em_ich8lan:
 798                         /* ICH8 does not support jumbo frames */
 799                         max_frame_size = ETHER_MAX_LEN;
 800                         break;
 801                 default:
 802                         max_frame_size = MAX_JUMBO_FRAME_SIZE;
 803                         break;
 804                 }
 805                 if (ifr->ifr_mtu >
 806                         max_frame_size - ETHER_HDR_LEN - ETHER_CRC_LEN) {
 807                         error = EINVAL;
 808                 } else {
 809                         ifp->if_mtu = ifr->ifr_mtu;
 810                         adapter->hw.max_frame_size =
 811                         ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
 812                         em_init(adapter);
 813                 }
 814                 break;
 815         case SIOCSIFFLAGS:
 816                 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFFLAGS "
 817                                "(Set Interface Flags)");
 818                 if (ifp->if_flags & IFF_UP) {
 819                         if (!(ifp->if_flags & IFF_RUNNING))
 820                                 em_init(adapter);
 821                         em_disable_promisc(adapter);
 822                         em_set_promisc(adapter);
 823                 } else {
 824                         if (ifp->if_flags & IFF_RUNNING)
 825                                 em_stop(adapter);
 826                 }
 827                 break;
 828         case SIOCADDMULTI:
 829         case SIOCDELMULTI:
 830                 IOCTL_DEBUGOUT("ioctl rcv'd: SIOC(ADD|DEL)MULTI");
 831                 if (ifp->if_flags & IFF_RUNNING) {
 832                         em_disable_intr(adapter);
 833                         em_set_multi(adapter);
 834                         if (adapter->hw.mac_type == em_82542_rev2_0)
 835                                 em_initialize_receive_unit(adapter);
 836 #ifdef DEVICE_POLLING
 837                         /* Do not enable interrupt if polling(4) is enabled */
 838                         if ((ifp->if_flags & IFF_POLLING) == 0)
 839 #endif
 840                         em_enable_intr(adapter);
 841                 }
 842                 break;
 843         case SIOCSIFMEDIA:
 844         case SIOCGIFMEDIA:
 845                 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCxIFMEDIA "
 846                                "(Get/Set Interface Media)");
 847                 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
 848                 break;
 849         case SIOCSIFCAP:
 850                 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFCAP (Set Capabilities)");
 851                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
 852                 if (mask & IFCAP_HWCSUM) {
 853                         ifp->if_capenable ^= IFCAP_HWCSUM;
 854                         reinit = 1;
 855                 }
 856                 if (mask & IFCAP_VLAN_HWTAGGING) {
 857                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
 858                         reinit = 1;
 859                 }
 860                 if (reinit && (ifp->if_flags & IFF_RUNNING))
 861                         em_init(adapter);
 862                 break;
 863         default:
 864                 error = ether_ioctl(ifp, command, data);
 865                 break;
 866         }
 867
 868         return(error);
 869 }
 870
 871 /*********************************************************************
 872  *  Watchdog entry point
 873  *
 874  *  This routine is called whenever hardware quits transmitting.
 875  *
 876  **********************************************************************/
 877
 878 static void
 879 em_watchdog(struct ifnet *ifp)
 880 {
 881         struct adapter *adapter = ifp->if_softc;
 882
 883         /*
 884          * If we are in this routine because of pause frames, then
 885          * don't reset the hardware.
 886          */
 887         if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_TXOFF) {
 888                 ifp->if_timer = EM_TX_TIMEOUT;
 889                 return;
 890         }
 891
 892 #ifdef foo
 893         if (em_check_for_link(&adapter->hw))
 894 #endif
 895                 if_printf(ifp, "watchdog timeout -- resetting\n");
 896
 897         ifp->if_flags &= ~IFF_RUNNING;
 898
 899         em_init(adapter);
 900
 901         adapter->watchdog_timeouts++;
 902 }
 903
 904 /*********************************************************************
 905  *  Init entry point
 906  *
 907  *  This routine is used in two ways. It is used by the stack as
 908  *  init entry point in network interface structure. It is also used
 909  *  by the driver as a hw/sw initialization routine to get to a
 910  *  consistent state.
 911  *
 912  *  return 0 on success, positive on failure
 913  **********************************************************************/
 914
 915 static void
 916 em_init(void *arg)
 917 {
 918         struct adapter *adapter = arg;
 919         uint32_t pba;
 920         struct ifnet *ifp = &adapter->interface_data.ac_if;
 921
 922         INIT_DEBUGOUT("em_init: begin");
 923
 924         em_stop(adapter);
 925
 926         /*
 927          * Packet Buffer Allocation (PBA)
 928          * Writing PBA sets the receive portion of the buffer
 929          * the remainder is used for the transmit buffer.
 930          *
 931          * Devices before the 82547 had a Packet Buffer of 64K.
 932          *   Default allocation: PBA=48K for Rx, leaving 16K for Tx.
 933          * After the 82547 the buffer was reduced to 40K.
 934          *   Default allocation: PBA=30K for Rx, leaving 10K for Tx.
 935          *   Note: default does not leave enough room for Jumbo Frame >10k.
 936          */
 937         switch (adapter->hw.mac_type) {
 938         case em_82547:
 939         case em_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
 940                 if (adapter->hw.max_frame_size > EM_RXBUFFER_8192)
 941                         pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
 942                 else
 943                         pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
 944
 945                 adapter->tx_fifo_head = 0;
 946                 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
 947                 adapter->tx_fifo_size =
 948                         (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
 949                 break;
 950         case em_80003es2lan: /* 80003es2lan: Total Packet Buffer is 48K */
 951         case em_82571: /* 82571: Total Packet Buffer is 48K */
 952         case em_82572: /* 82572: Total Packet Buffer is 48K */
 953                 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
 954                 break;
 955         case em_82573: /* 82573: Total Packet Buffer is 32K */
 956                 /* Jumbo frames not supported */
 957                 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
 958                 break;
 959         case em_ich8lan:
 960                 pba = E1000_PBA_8K;
 961                 break;
 962         default:
 963                 /* Devices before 82547 had a Packet Buffer of 64K.   */
 964                 if(adapter->hw.max_frame_size > EM_RXBUFFER_8192)
 965                         pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
 966                 else
 967                         pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
 968         }
 969
 970         INIT_DEBUGOUT1("em_init: pba=%dK",pba);
 971         E1000_WRITE_REG(&adapter->hw, PBA, pba);
 972
 973         /* Get the latest mac address, User can use a LAA */
 974         bcopy(adapter->interface_data.ac_enaddr, adapter->hw.mac_addr,
 975               ETHER_ADDR_LEN);
 976
 977         /* Initialize the hardware */
 978         if (em_hardware_init(adapter)) {
 979                 if_printf(ifp, "Unable to initialize the hardware\n");
 980                 return;
 981         }
 982
 983         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING)
 984                 em_enable_vlans(adapter);
 985
 986         /* Prepare transmit descriptors and buffers */
 987         if (em_setup_transmit_structures(adapter)) {
 988                 if_printf(ifp, "Could not setup transmit structures\n");
 989                 em_stop(adapter);
 990                 return;
 991         }
 992         em_initialize_transmit_unit(adapter);
 993
 994         /* Setup Multicast table */
 995         em_set_multi(adapter);
 996
 997         /* Prepare receive descriptors and buffers */
 998         if (em_setup_receive_structures(adapter)) {
 999                 if_printf(ifp, "Could not setup receive structures\n");
1000                 em_stop(adapter);
1001                 return;
1002         }
1003         em_initialize_receive_unit(adapter);
1004
1005         /* Don't loose promiscuous settings */
1006         em_set_promisc(adapter);
1007
1008         ifp->if_flags |= IFF_RUNNING;
1009         ifp->if_flags &= ~IFF_OACTIVE;
1010
1011         if (adapter->hw.mac_type >= em_82543) {
1012                 if (ifp->if_capenable & IFCAP_TXCSUM)
1013                         ifp->if_hwassist = EM_CHECKSUM_FEATURES;
1014                 else
1015                         ifp->if_hwassist = 0;
1016         }
1017
1018         callout_reset(&adapter->timer, hz, em_local_timer, adapter);
1019         em_clear_hw_cntrs(&adapter->hw);
1020
1021 #ifdef DEVICE_POLLING
1022         /* Do not enable interrupt if polling(4) is enabled */
1023         if (ifp->if_flags & IFF_POLLING)
1024                 em_disable_intr(adapter);
1025         else
1026 #endif
1027         em_enable_intr(adapter);
1028
1029         /* Don't reset the phy next time init gets called */
1030         adapter->hw.phy_reset_disable = TRUE;
1031 }
1032
1033 #ifdef DEVICE_POLLING
1034
1035 static void
1036 em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1037 {
1038         struct adapter *adapter = ifp->if_softc;
1039         uint32_t reg_icr;
1040
1041         logif(poll_beg);
1042
1043         ASSERT_SERIALIZED(ifp->if_serializer);
1044
1045         switch(cmd) {
1046         case POLL_REGISTER:
1047                 em_disable_intr(adapter);
1048                 break;
1049         case POLL_DEREGISTER:
1050                 em_enable_intr(adapter);
1051                 break;
1052         case POLL_AND_CHECK_STATUS:
1053                 reg_icr = E1000_READ_REG(&adapter->hw, ICR);
1054                 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1055                         callout_stop(&adapter->timer);
1056                         adapter->hw.get_link_status = 1;
1057                         em_check_for_link(&adapter->hw);
1058                         em_print_link_status(adapter);
1059                         callout_reset(&adapter->timer, hz, em_local_timer,
1060                                       adapter);
1061                 }
1062                 /* fall through */
1063         case POLL_ONLY:
1064                 if (ifp->if_flags & IFF_RUNNING) {
1065                         em_process_receive_interrupts(adapter, count);
1066                         em_clean_transmit_interrupts(adapter);
1067
1068                         if (!ifq_is_empty(&ifp->if_snd))
1069                                 em_start(ifp);
1070                 }
1071                 break;
1072         }
1073         logif(poll_end);
1074 }
1075
1076 #endif /* DEVICE_POLLING */
1077
1078 /*********************************************************************
1079  *
1080  *  Interrupt Service routine
1081  *
1082  **********************************************************************/
1083 static void
1084 em_intr(void *arg)
1085 {
1086         uint32_t reg_icr;
1087         struct ifnet *ifp;
1088         struct adapter *adapter = arg;
1089
1090         ifp = &adapter->interface_data.ac_if;
1091
1092         logif(intr_beg);
1093         ASSERT_SERIALIZED(ifp->if_serializer);
1094
1095         reg_icr = E1000_READ_REG(&adapter->hw, ICR);
1096         if ((adapter->hw.mac_type >= em_82571 &&
1097              (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1098             reg_icr == 0) {
1099                 logif(intr_end);
1100                 return;
1101         }
1102
1103         if (reg_icr & E1000_ICR_RXO)
1104                 adapter->rx_overruns++;
1105
1106         /* Link status change */
1107         if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1108                 callout_stop(&adapter->timer);
1109                 adapter->hw.get_link_status = 1;
1110                 em_check_for_link(&adapter->hw);
1111                 em_print_link_status(adapter);
1112                 callout_reset(&adapter->timer, hz, em_local_timer, adapter);
1113         }
1114
1115         /*
1116          * note: do not attempt to improve efficiency by looping.  This
1117          * only results in unnecessary piecemeal collection of received
1118          * packets and unnecessary piecemeal cleanups of the transmit ring.
1119          */
1120         if (ifp->if_flags & IFF_RUNNING) {
1121                 em_process_receive_interrupts(adapter, -1);
1122                 em_clean_transmit_interrupts(adapter);
1123         }
1124
1125         if ((ifp->if_flags & IFF_RUNNING) && !ifq_is_empty(&ifp->if_snd))
1126                 em_start(ifp);
1127         logif(intr_end);
1128 }
1129
1130 /*********************************************************************
1131  *
1132  *  Media Ioctl callback
1133  *
1134  *  This routine is called whenever the user queries the status of
1135  *  the interface using ifconfig.
1136  *
1137  **********************************************************************/
1138 static void
1139 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1140 {
1141         struct adapter * adapter = ifp->if_softc;
1142         u_char fiber_type = IFM_1000_SX;
1143
1144         INIT_DEBUGOUT("em_media_status: begin");
1145
1146         ASSERT_SERIALIZED(ifp->if_serializer);
1147
1148         em_check_for_link(&adapter->hw);
1149         if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) {
1150                 if (adapter->link_active == 0) {
1151                         em_get_speed_and_duplex(&adapter->hw,
1152                                                 &adapter->link_speed,
1153                                                 &adapter->link_duplex);
1154                         adapter->link_active = 1;
1155                 }
1156         } else {
1157                 if (adapter->link_active == 1) {
1158                         adapter->link_speed = 0;
1159                         adapter->link_duplex = 0;
1160                         adapter->link_active = 0;
1161                 }
1162         }
1163
1164         ifmr->ifm_status = IFM_AVALID;
1165         ifmr->ifm_active = IFM_ETHER;
1166
1167         if (!adapter->link_active)
1168                 return;
1169
1170         ifmr->ifm_status |= IFM_ACTIVE;
1171
1172         if (adapter->hw.media_type == em_media_type_fiber ||
1173             adapter->hw.media_type == em_media_type_internal_serdes) {
1174                 if (adapter->hw.mac_type == em_82545)
1175                         fiber_type = IFM_1000_LX;
1176                 ifmr->ifm_active |= fiber_type | IFM_FDX;
1177                 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX;
1178         } else {
1179                 switch (adapter->link_speed) {
1180                 case 10:
1181                         ifmr->ifm_active |= IFM_10_T;
1182                         break;
1183                 case 100:
1184                         ifmr->ifm_active |= IFM_100_TX;
1185                         break;
1186                 case 1000:
1187                         ifmr->ifm_active |= IFM_1000_T;
1188                         break;
1189                 }
1190                 if (adapter->link_duplex == FULL_DUPLEX)
1191                         ifmr->ifm_active |= IFM_FDX;
1192                 else
1193                         ifmr->ifm_active |= IFM_HDX;
1194         }
1195 }
1196
1197 /*********************************************************************
1198  *
1199  *  Media Ioctl callback
1200  *
1201  *  This routine is called when the user changes speed/duplex using
1202  *  media/mediopt option with ifconfig.
1203  *
1204  **********************************************************************/
1205 static int
1206 em_media_change(struct ifnet *ifp)
1207 {
1208         struct adapter * adapter = ifp->if_softc;
1209         struct ifmedia  *ifm = &adapter->media;
1210
1211         INIT_DEBUGOUT("em_media_change: begin");
1212
1213         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1214                 return(EINVAL);
1215
1216         ASSERT_SERIALIZED(ifp->if_serializer);
1217
1218         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1219         case IFM_AUTO:
1220                 adapter->hw.autoneg = DO_AUTO_NEG;
1221                 adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1222                 break;
1223         case IFM_1000_LX:
1224         case IFM_1000_SX:
1225         case IFM_1000_T:
1226                 adapter->hw.autoneg = DO_AUTO_NEG;
1227                 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
1228                 break;
1229         case IFM_100_TX:
1230                 adapter->hw.autoneg = FALSE;
1231                 adapter->hw.autoneg_advertised = 0;
1232                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1233                         adapter->hw.forced_speed_duplex = em_100_full;
1234                 else
1235                         adapter->hw.forced_speed_duplex = em_100_half;
1236                 break;
1237         case IFM_10_T:
1238                 adapter->hw.autoneg = FALSE;
1239                 adapter->hw.autoneg_advertised = 0;
1240                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1241                         adapter->hw.forced_speed_duplex = em_10_full;
1242                 else
1243                         adapter->hw.forced_speed_duplex = em_10_half;
1244                 break;
1245         default:
1246                 if_printf(ifp, "Unsupported media type\n");
1247         }
1248         /*
1249          * As the speed/duplex settings may have changed we need to
1250          * reset the PHY.
1251          */
1252         adapter->hw.phy_reset_disable = FALSE;
1253
1254         em_init(adapter);
1255
1256         return(0);
1257 }
1258
1259 static void
1260 em_tx_cb(void *arg, bus_dma_segment_t *seg, int nsegs, bus_size_t mapsize,
1261          int error)
1262 {
1263         struct em_q *q = arg;
1264
1265         if (error)
1266                 return;
1267         KASSERT(nsegs <= EM_MAX_SCATTER,
1268                 ("Too many DMA segments returned when mapping tx packet"));
1269         q->nsegs = nsegs;
1270         bcopy(seg, q->segs, nsegs * sizeof(seg[0]));
1271 }
1272
1273 /*********************************************************************
1274  *
1275  *  This routine maps the mbufs to tx descriptors.
1276  *
1277  *  return 0 on success, positive on failure
1278  **********************************************************************/
1279 static int
1280 em_encap(struct adapter *adapter, struct mbuf *m_head)
1281 {
1282         uint32_t txd_upper;
1283         uint32_t txd_lower, txd_used = 0, txd_saved = 0;
1284         int i, j, error;
1285         uint64_t address;
1286
1287         /* For 82544 Workaround */
1288         DESC_ARRAY desc_array;
1289         uint32_t array_elements;
1290         uint32_t counter;
1291
1292         struct ifvlan *ifv = NULL;
1293         struct em_q q;
1294         struct em_buffer *tx_buffer = NULL, *tx_buffer_map;
1295         bus_dmamap_t map;
1296         struct em_tx_desc *current_tx_desc = NULL;
1297         struct ifnet *ifp = &adapter->interface_data.ac_if;
1298
1299         /*
1300          * Force a cleanup if number of TX descriptors
1301          * available hits the threshold
1302          */
1303         if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) {
1304                 em_clean_transmit_interrupts(adapter);
1305                 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) {
1306                         adapter->no_tx_desc_avail1++;
1307                         return(ENOBUFS);
1308                 }
1309         }
1310         /*
1311          * Map the packet for DMA.
1312          */
1313         tx_buffer_map = &adapter->tx_buffer_area[adapter->next_avail_tx_desc];
1314         map = tx_buffer_map->map;
1315         error = bus_dmamap_load_mbuf(adapter->txtag, map, m_head, em_tx_cb,
1316                                      &q, BUS_DMA_NOWAIT);
1317         if (error != 0) {
1318                 adapter->no_tx_dma_setup++;
1319                 return(error);
1320         }
1321         KASSERT(q.nsegs != 0, ("em_encap: empty packet"));
1322
1323         if (q.nsegs > adapter->num_tx_desc_avail) {
1324                 adapter->no_tx_desc_avail2++;
1325                 error = ENOBUFS;
1326                 goto fail;
1327         }
1328
1329         if (ifp->if_hwassist > 0) {
1330                 em_transmit_checksum_setup(adapter,  m_head,
1331                                            &txd_upper, &txd_lower);
1332         } else {
1333                 txd_upper = txd_lower = 0;
1334         }
1335
1336         /* Find out if we are in vlan mode */
1337         if ((m_head->m_flags & (M_PROTO1|M_PKTHDR)) == (M_PROTO1|M_PKTHDR) &&
1338             m_head->m_pkthdr.rcvif != NULL &&
1339             m_head->m_pkthdr.rcvif->if_type == IFT_L2VLAN)
1340                 ifv = m_head->m_pkthdr.rcvif->if_softc;
1341
1342         i = adapter->next_avail_tx_desc;
1343         if (adapter->pcix_82544) {
1344                 txd_saved = i;
1345                 txd_used = 0;
1346         }
1347         for (j = 0; j < q.nsegs; j++) {
1348                 /* If adapter is 82544 and on PCIX bus */
1349                 if(adapter->pcix_82544) {
1350                         array_elements = 0;
1351                         address = htole64(q.segs[j].ds_addr);
1352                         /*
1353                          * Check the Address and Length combination and
1354                          * split the data accordingly
1355                          */
1356                         array_elements = em_fill_descriptors(address,
1357                                                 htole32(q.segs[j].ds_len),
1358                                                 &desc_array);
1359                         for (counter = 0; counter < array_elements; counter++) {
1360                                 if (txd_used == adapter->num_tx_desc_avail) {
1361                                         adapter->next_avail_tx_desc = txd_saved;
1362                                         adapter->no_tx_desc_avail2++;
1363                                         error = ENOBUFS;
1364                                         goto fail;
1365                                 }
1366                                 tx_buffer = &adapter->tx_buffer_area[i];
1367                                 current_tx_desc = &adapter->tx_desc_base[i];
1368                                 current_tx_desc->buffer_addr = htole64(
1369                                 desc_array.descriptor[counter].address);
1370                                 current_tx_desc->lower.data = htole32(
1371                                 (adapter->txd_cmd | txd_lower |
1372                                 (uint16_t)desc_array.descriptor[counter].length));
1373                                 current_tx_desc->upper.data = htole32((txd_upper));
1374                                 if (++i == adapter->num_tx_desc)
1375                                         i = 0;
1376
1377                                 tx_buffer->m_head = NULL;
1378                                 txd_used++;
1379                         }
1380                 } else {
1381                         tx_buffer = &adapter->tx_buffer_area[i];
1382                         current_tx_desc = &adapter->tx_desc_base[i];
1383
1384                         current_tx_desc->buffer_addr = htole64(q.segs[j].ds_addr);
1385                         current_tx_desc->lower.data = htole32(
1386                                 adapter->txd_cmd | txd_lower | q.segs[j].ds_len);
1387                         current_tx_desc->upper.data = htole32(txd_upper);
1388
1389                         if (++i == adapter->num_tx_desc)
1390                                 i = 0;
1391
1392                         tx_buffer->m_head = NULL;
1393                 }
1394         }
1395
1396         adapter->next_avail_tx_desc = i;
1397         if (adapter->pcix_82544)
1398                 adapter->num_tx_desc_avail -= txd_used;
1399         else
1400                 adapter->num_tx_desc_avail -= q.nsegs;
1401
1402         if (ifv != NULL) {
1403                 /* Set the vlan id */
1404                 current_tx_desc->upper.fields.special = htole16(ifv->ifv_tag);
1405
1406                 /* Tell hardware to add tag */
1407                 current_tx_desc->lower.data |= htole32(E1000_TXD_CMD_VLE);
1408         }
1409
1410         tx_buffer->m_head = m_head;
1411         tx_buffer_map->map = tx_buffer->map;
1412         tx_buffer->map = map;
1413         bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1414
1415         /*
1416          * Last Descriptor of Packet needs End Of Packet (EOP)
1417          */
1418         current_tx_desc->lower.data |= htole32(E1000_TXD_CMD_EOP);
1419
1420         bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map,
1421                         BUS_DMASYNC_PREWRITE);
1422
1423         /*
1424          * Advance the Transmit Descriptor Tail (Tdt), this tells the E1000
1425          * that this frame is available to transmit.
1426          */
1427         if (adapter->hw.mac_type == em_82547 &&
1428             adapter->link_duplex == HALF_DUPLEX) {
1429                 em_82547_move_tail_serialized(adapter);
1430         } else {
1431                 E1000_WRITE_REG(&adapter->hw, TDT, i);
1432                 if (adapter->hw.mac_type == em_82547) {
1433                         em_82547_update_fifo_head(adapter,
1434                                                   m_head->m_pkthdr.len);
1435                 }
1436         }
1437
1438         return(0);
1439 fail:
1440         bus_dmamap_unload(adapter->txtag, map);
1441         return error;
1442 }
1443
1444 /*********************************************************************
1445  *
1446  * 82547 workaround to avoid controller hang in half-duplex environment.
1447  * The workaround is to avoid queuing a large packet that would span
1448  * the internal Tx FIFO ring boundary. We need to reset the FIFO pointers
1449  * in this case. We do that only when FIFO is quiescent.
1450  *
1451  **********************************************************************/
1452 static void
1453 em_82547_move_tail(void *arg)
1454 {
1455         struct adapter *adapter = arg;
1456         struct ifnet *ifp = &adapter->interface_data.ac_if;
1457
1458         lwkt_serialize_enter(ifp->if_serializer);
1459         em_82547_move_tail_serialized(adapter);
1460         lwkt_serialize_exit(ifp->if_serializer);
1461 }
1462
1463 static void
1464 em_82547_move_tail_serialized(struct adapter *adapter)
1465 {
1466         uint16_t hw_tdt;
1467         uint16_t sw_tdt;
1468         struct em_tx_desc *tx_desc;
1469         uint16_t length = 0;
1470         boolean_t eop = 0;
1471
1472         hw_tdt = E1000_READ_REG(&adapter->hw, TDT);
1473         sw_tdt = adapter->next_avail_tx_desc;
1474
1475         while (hw_tdt != sw_tdt) {
1476                 tx_desc = &adapter->tx_desc_base[hw_tdt];
1477                 length += tx_desc->lower.flags.length;
1478                 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1479                 if(++hw_tdt == adapter->num_tx_desc)
1480                         hw_tdt = 0;
1481
1482                 if(eop) {
1483                         if (em_82547_fifo_workaround(adapter, length)) {
1484                                 adapter->tx_fifo_wrk_cnt++;
1485                                 callout_reset(&adapter->tx_fifo_timer, 1,
1486                                         em_82547_move_tail, adapter);
1487                                 break;
1488                         }
1489                         E1000_WRITE_REG(&adapter->hw, TDT, hw_tdt);
1490                         em_82547_update_fifo_head(adapter, length);
1491                         length = 0;
1492                 }
1493         }
1494 }
1495
1496 static int
1497 em_82547_fifo_workaround(struct adapter *adapter, int len)
1498 {
1499         int fifo_space, fifo_pkt_len;
1500
1501         fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1502
1503         if (adapter->link_duplex == HALF_DUPLEX) {
1504                 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1505
1506                 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1507                         if (em_82547_tx_fifo_reset(adapter))
1508                                 return(0);
1509                         else
1510                                 return(1);
1511                 }
1512         }
1513
1514         return(0);
1515 }
1516
1517 static void
1518 em_82547_update_fifo_head(struct adapter *adapter, int len)
1519 {
1520         int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1521
1522         /* tx_fifo_head is always 16 byte aligned */
1523         adapter->tx_fifo_head += fifo_pkt_len;
1524         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1525                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1526 }
1527
1528 static int
1529 em_82547_tx_fifo_reset(struct adapter *adapter)
1530 {
1531         uint32_t tctl;
1532
1533         if ( (E1000_READ_REG(&adapter->hw, TDT) ==
1534               E1000_READ_REG(&adapter->hw, TDH)) &&
1535              (E1000_READ_REG(&adapter->hw, TDFT) ==
1536               E1000_READ_REG(&adapter->hw, TDFH)) &&
1537              (E1000_READ_REG(&adapter->hw, TDFTS) ==
1538               E1000_READ_REG(&adapter->hw, TDFHS)) &&
1539              (E1000_READ_REG(&adapter->hw, TDFPC) == 0)) {
1540
1541                 /* Disable TX unit */
1542                 tctl = E1000_READ_REG(&adapter->hw, TCTL);
1543                 E1000_WRITE_REG(&adapter->hw, TCTL, tctl & ~E1000_TCTL_EN);
1544
1545                 /* Reset FIFO pointers */
1546                 E1000_WRITE_REG(&adapter->hw, TDFT,  adapter->tx_head_addr);
1547                 E1000_WRITE_REG(&adapter->hw, TDFH,  adapter->tx_head_addr);
1548                 E1000_WRITE_REG(&adapter->hw, TDFTS, adapter->tx_head_addr);
1549                 E1000_WRITE_REG(&adapter->hw, TDFHS, adapter->tx_head_addr);
1550
1551                 /* Re-enable TX unit */
1552                 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
1553                 E1000_WRITE_FLUSH(&adapter->hw);
1554
1555                 adapter->tx_fifo_head = 0;
1556                 adapter->tx_fifo_reset_cnt++;
1557
1558                 return(TRUE);
1559         } else {
1560                 return(FALSE);
1561         }
1562 }
1563
1564 static void
1565 em_set_promisc(struct adapter *adapter)
1566 {
1567         uint32_t reg_rctl;
1568         struct ifnet *ifp = &adapter->interface_data.ac_if;
1569
1570         reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1571
1572         adapter->em_insert_vlan_header = 0;
1573         if (ifp->if_flags & IFF_PROMISC) {
1574                 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1575                 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1576
1577                 /*
1578                  * Disable VLAN stripping in promiscous mode.
1579                  * This enables bridging of vlan tagged frames to occur
1580                  * and also allows vlan tags to be seen in tcpdump.
1581                  */
1582                 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING)
1583                         em_disable_vlans(adapter);
1584                 adapter->em_insert_vlan_header = 1;
1585         } else if (ifp->if_flags & IFF_ALLMULTI) {
1586                 reg_rctl |= E1000_RCTL_MPE;
1587                 reg_rctl &= ~E1000_RCTL_UPE;
1588                 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1589         }
1590 }
1591
1592 static void
1593 em_disable_promisc(struct adapter *adapter)
1594 {
1595         struct ifnet *ifp = &adapter->interface_data.ac_if;
1596
1597         uint32_t reg_rctl;
1598
1599         reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1600
1601         reg_rctl &= (~E1000_RCTL_UPE);
1602         reg_rctl &= (~E1000_RCTL_MPE);
1603         E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1604
1605         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING)
1606                 em_enable_vlans(adapter);
1607         adapter->em_insert_vlan_header = 0;
1608 }
1609
1610 /*********************************************************************
1611  *  Multicast Update
1612  *
1613  *  This routine is called whenever multicast address list is updated.
1614  *
1615  **********************************************************************/
1616
1617 static void
1618 em_set_multi(struct adapter *adapter)
1619 {
1620         uint32_t reg_rctl = 0;
1621         uint8_t mta[MAX_NUM_MULTICAST_ADDRESSES * ETH_LENGTH_OF_ADDRESS];
1622         struct ifmultiaddr *ifma;
1623         int mcnt = 0;
1624         struct ifnet *ifp = &adapter->interface_data.ac_if;
1625
1626         IOCTL_DEBUGOUT("em_set_multi: begin");
1627
1628         if (adapter->hw.mac_type == em_82542_rev2_0) {
1629                 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1630                 if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1631                         em_pci_clear_mwi(&adapter->hw);
1632                 reg_rctl |= E1000_RCTL_RST;
1633                 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1634                 msec_delay(5);
1635         }
1636
1637         LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1638                 if (ifma->ifma_addr->sa_family != AF_LINK)
1639                         continue;
1640
1641                 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1642                         break;
1643
1644                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1645                       &mta[mcnt*ETH_LENGTH_OF_ADDRESS], ETH_LENGTH_OF_ADDRESS);
1646                 mcnt++;
1647         }
1648
1649         if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
1650                 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1651                 reg_rctl |= E1000_RCTL_MPE;
1652                 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1653         } else {
1654                 em_mc_addr_list_update(&adapter->hw, mta, mcnt, 0, 1);
1655         }
1656
1657         if (adapter->hw.mac_type == em_82542_rev2_0) {
1658                 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1659                 reg_rctl &= ~E1000_RCTL_RST;
1660                 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1661                 msec_delay(5);
1662                 if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1663                         em_pci_set_mwi(&adapter->hw);
1664         }
1665 }
1666
1667 /*********************************************************************
1668  *  Timer routine
1669  *
1670  *  This routine checks for link status and updates statistics.
1671  *
1672  **********************************************************************/
1673
1674 static void
1675 em_local_timer(void *arg)
1676 {
1677         struct ifnet *ifp;
1678         struct adapter *adapter = arg;
1679         ifp = &adapter->interface_data.ac_if;
1680
1681         lwkt_serialize_enter(ifp->if_serializer);
1682
1683         em_check_for_link(&adapter->hw);
1684         em_print_link_status(adapter);
1685         em_update_stats_counters(adapter);
1686         if (em_display_debug_stats && ifp->if_flags & IFF_RUNNING)
1687                 em_print_hw_stats(adapter);
1688         em_smartspeed(adapter);
1689
1690         callout_reset(&adapter->timer, hz, em_local_timer, adapter);
1691
1692         lwkt_serialize_exit(ifp->if_serializer);
1693 }
1694
1695 static void
1696 em_print_link_status(struct adapter *adapter)
1697 {
1698         if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) {
1699                 if (adapter->link_active == 0) {
1700                         em_get_speed_and_duplex(&adapter->hw,
1701                                                 &adapter->link_speed,
1702                                                 &adapter->link_duplex);
1703                         /* Check if we may set SPEED_MODE bit on PCI-E */
1704                         if ((adapter->link_speed == SPEED_1000) &&
1705                             ((adapter->hw.mac_type == em_82571) ||
1706                              (adapter->hw.mac_type == em_82572))) {
1707                                 int tarc0;
1708
1709 #define SPEED_MODE_BIT  (1 << 21)       /* On PCI-E MACs only */
1710
1711                                 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
1712                                 tarc0 |= SPEED_MODE_BIT;
1713                                 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
1714
1715 #undef SPEED_MODE_BIT
1716                         }
1717                         if (bootverbose) {
1718                                 if_printf(&adapter->interface_data.ac_if,
1719                                           "Link is up %d Mbps %s\n",
1720                                           adapter->link_speed,
1721                                           adapter->link_duplex == FULL_DUPLEX ?
1722                                                 "Full Duplex" : "Half Duplex");
1723                         }
1724                         adapter->link_active = 1;
1725                         adapter->smartspeed = 0;
1726                 }
1727         } else {
1728                 if (adapter->link_active == 1) {
1729                         adapter->link_speed = 0;
1730                         adapter->link_duplex = 0;
1731                         if (bootverbose) {
1732                                 if_printf(&adapter->interface_data.ac_if,
1733                                           "Link is Down\n");
1734                         }
1735                         adapter->link_active = 0;
1736                 }
1737         }
1738 }
1739
1740 /*********************************************************************
1741  *
1742  *  This routine disables all traffic on the adapter by issuing a
1743  *  global reset on the MAC and deallocates TX/RX buffers.
1744  *
1745  **********************************************************************/
1746
1747 static void
1748 em_stop(void *arg)
1749 {
1750         struct ifnet   *ifp;
1751         struct adapter * adapter = arg;
1752         ifp = &adapter->interface_data.ac_if;
1753
1754         ASSERT_SERIALIZED(ifp->if_serializer);
1755
1756         INIT_DEBUGOUT("em_stop: begin");
1757         em_disable_intr(adapter);
1758         em_reset_hw(&adapter->hw);
1759         callout_stop(&adapter->timer);
1760         callout_stop(&adapter->tx_fifo_timer);
1761         em_free_transmit_structures(adapter);
1762         em_free_receive_structures(adapter);
1763
1764         /* Tell the stack that the interface is no longer active */
1765         ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1766         ifp->if_timer = 0;
1767 }
1768
1769 /*********************************************************************
1770  *
1771  *  Determine hardware revision.
1772  *
1773  **********************************************************************/
1774 static void
1775 em_identify_hardware(struct adapter * adapter)
1776 {
1777         device_t dev = adapter->dev;
1778
1779         /* Make sure our PCI config space has the necessary stuff set */
1780         adapter->hw.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
1781         if (!((adapter->hw.pci_cmd_word & PCIM_CMD_BUSMASTEREN) &&
1782               (adapter->hw.pci_cmd_word & PCIM_CMD_MEMEN))) {
1783                 device_printf(dev, "Memory Access and/or Bus Master bits "
1784                               "were not set!\n");
1785                 adapter->hw.pci_cmd_word |= (PCIM_CMD_BUSMASTEREN |
1786                                              PCIM_CMD_MEMEN);
1787                 pci_write_config(dev, PCIR_COMMAND,
1788                                  adapter->hw.pci_cmd_word, 2);
1789         }
1790
1791         /* Save off the information about this board */
1792         adapter->hw.vendor_id = pci_get_vendor(dev);
1793         adapter->hw.device_id = pci_get_device(dev);
1794         adapter->hw.revision_id = pci_get_revid(dev);
1795         adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
1796         adapter->hw.subsystem_id = pci_get_subdevice(dev);
1797
1798         /* Identify the MAC */
1799         if (em_set_mac_type(&adapter->hw))
1800                 device_printf(dev, "Unknown MAC Type\n");
1801
1802         if (adapter->hw.mac_type == em_82541 ||
1803             adapter->hw.mac_type == em_82541_rev_2 ||
1804             adapter->hw.mac_type == em_82547 ||
1805             adapter->hw.mac_type == em_82547_rev_2)
1806                 adapter->hw.phy_init_script = TRUE;
1807 }
1808
1809 static int
1810 em_allocate_pci_resource(device_t dev)
1811 {
1812         struct adapter *adapter = device_get_softc(dev);
1813         int rid;
1814
1815         rid = EM_MMBA;
1816         adapter->res_memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
1817                                                      &rid, RF_ACTIVE);
1818         if (!(adapter->res_memory)) {
1819                 device_printf(dev, "Unable to allocate bus resource: memory\n");
1820                 return ENXIO;
1821         }
1822         adapter->osdep.mem_bus_space_tag =
1823                 rman_get_bustag(adapter->res_memory);
1824         adapter->osdep.mem_bus_space_handle =
1825             rman_get_bushandle(adapter->res_memory);
1826         adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
1827
1828         if (adapter->hw.mac_type > em_82543) {
1829                 int i, val;
1830
1831                 /* Figure our where our IO BAR is ? */
1832                 rid = EM_MMBA;
1833                 for (i = 0; i < 5; i++) {
1834                         val = pci_read_config(dev, rid, 4);
1835                         if (val & 0x00000001) {
1836                                 adapter->io_rid = rid;
1837                                 break;
1838                         }
1839                         rid += 4;
1840                 }
1841
1842                 adapter->res_ioport = bus_alloc_resource_any(dev,
1843                     SYS_RES_IOPORT, &adapter->io_rid, RF_ACTIVE);
1844                 if (!(adapter->res_ioport)) {
1845                         device_printf(dev, "Unable to allocate bus resource: "
1846                                       "ioport\n");
1847                         return ENXIO;
1848                 }
1849
1850                 adapter->hw.reg_io_tag = rman_get_bustag(adapter->res_ioport);
1851                 adapter->hw.reg_io_handle =
1852                         rman_get_bushandle(adapter->res_ioport);
1853         }
1854
1855         /* For ICH8 we need to find the flash memory */
1856         if (adapter->hw.mac_type == em_ich8lan) {
1857                 rid = EM_FLASH;
1858
1859                 adapter->flash_mem = bus_alloc_resource_any(dev,
1860                     SYS_RES_MEMORY, &rid, RF_ACTIVE);
1861                 if (adapter->flash_mem == NULL) {
1862                         device_printf(dev, "Unable to allocate bus resource: "
1863                                       "flash memory\n");
1864                         return ENXIO;
1865                 }
1866                 adapter->osdep.flash_bus_space_tag =
1867                     rman_get_bustag(adapter->flash_mem);
1868                 adapter->osdep.flash_bus_space_handle =
1869                     rman_get_bushandle(adapter->flash_mem);
1870         }
1871
1872         rid = 0x0;
1873         adapter->res_interrupt = bus_alloc_resource_any(dev, SYS_RES_IRQ,
1874             &rid, RF_SHAREABLE | RF_ACTIVE);
1875         if (!(adapter->res_interrupt)) {
1876                 device_printf(dev, "Unable to allocate bus resource: "
1877                               "interrupt\n");
1878                 return ENXIO;
1879         }
1880
1881         adapter->hw.back = &adapter->osdep;
1882
1883         return 0;
1884 }
1885
1886 static void
1887 em_free_pci_resource(device_t dev)
1888 {
1889         struct adapter *adapter = device_get_softc(dev);
1890
1891         if (adapter->res_interrupt != NULL) {
1892                 bus_release_resource(dev, SYS_RES_IRQ, 0,
1893                                      adapter->res_interrupt);
1894         }
1895         if (adapter->res_memory != NULL) {
1896                 bus_release_resource(dev, SYS_RES_MEMORY, EM_MMBA,
1897                                      adapter->res_memory);
1898         }
1899
1900         if (adapter->res_ioport != NULL) {
1901                 bus_release_resource(dev, SYS_RES_IOPORT, adapter->io_rid,
1902                                      adapter->res_ioport);
1903         }
1904
1905         if (adapter->flash_mem != NULL) {
1906                 bus_release_resource(dev, SYS_RES_MEMORY, EM_FLASH,
1907                                      adapter->flash_mem);
1908         }
1909 }
1910
1911 /*********************************************************************
1912  *
1913  *  Initialize the hardware to a configuration as specified by the
1914  *  adapter structure. The controller is reset, the EEPROM is
1915  *  verified, the MAC address is set, then the shared initialization
1916  *  routines are called.
1917  *
1918  **********************************************************************/
1919 static int
1920 em_hardware_init(struct adapter *adapter)
1921 {
1922         uint16_t        rx_buffer_size;
1923
1924         INIT_DEBUGOUT("em_hardware_init: begin");
1925         /* Issue a global reset */
1926         em_reset_hw(&adapter->hw);
1927
1928         /* When hardware is reset, fifo_head is also reset */
1929         adapter->tx_fifo_head = 0;
1930
1931         /* Make sure we have a good EEPROM before we read from it */
1932         if (em_validate_eeprom_checksum(&adapter->hw) < 0) {
1933                 device_printf(adapter->dev,
1934                               "The EEPROM Checksum Is Not Valid\n");
1935                 return(EIO);
1936         }
1937
1938         if (em_read_part_num(&adapter->hw, &(adapter->part_num)) < 0) {
1939                 device_printf(adapter->dev,
1940                               "EEPROM read error while reading part number\n");
1941                 return(EIO);
1942         }
1943
1944         /* Set up smart power down as default off on newer adapters */
1945         if (!em_smart_pwr_down &&
1946             (adapter->hw.mac_type == em_82571 ||
1947              adapter->hw.mac_type == em_82572)) {
1948                 uint16_t phy_tmp = 0;
1949
1950                 /* Speed up time to link by disabling smart power down */
1951                 em_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
1952                                 &phy_tmp);
1953                 phy_tmp &= ~IGP02E1000_PM_SPD;
1954                 em_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
1955                                  phy_tmp);
1956         }
1957
1958         /*
1959          * These parameters control the automatic generation (Tx) and
1960          * response(Rx) to Ethernet PAUSE frames.
1961          * - High water mark should allow for at least two frames to be
1962          *   received after sending an XOFF.
1963          * - Low water mark works best when it is very near the high water mark.
1964          *   This allows the receiver to restart by sending XON when it has
1965          *   drained a bit.  Here we use an arbitary value of 1500 which will
1966          *   restart after one full frame is pulled from the buffer.  There
1967          *   could be several smaller frames in the buffer and if so they will
1968          *   not trigger the XON until their total number reduces the buffer
1969          *   by 1500.
1970          * - The pause time is fairly large at 1000 x 512ns = 512 usec.
1971          */
1972         rx_buffer_size = ((E1000_READ_REG(&adapter->hw, PBA) & 0xffff) << 10);
1973
1974         adapter->hw.fc_high_water =
1975             rx_buffer_size - roundup2(1 * adapter->hw.max_frame_size, 1024);
1976         adapter->hw.fc_low_water = adapter->hw.fc_high_water - 1500;
1977         if (adapter->hw.mac_type == em_80003es2lan)
1978                 adapter->hw.fc_pause_time = 0xFFFF;
1979         else
1980                 adapter->hw.fc_pause_time = 0x1000;
1981         adapter->hw.fc_send_xon = TRUE;
1982         adapter->hw.fc = em_fc_full;
1983
1984         if (em_init_hw(&adapter->hw) < 0) {
1985                 device_printf(adapter->dev, "Hardware Initialization Failed");
1986                 return(EIO);
1987         }
1988
1989         em_check_for_link(&adapter->hw);
1990         /*
1991          * At the time this code runs copper NICS fail, but fiber
1992          * succeed, however, this causes a problem downstream,
1993          * so for now have fiber NICs just not do this, then
1994          * everything seems to work correctly.
1995          */
1996         if ((adapter->hw.media_type != em_media_type_fiber &&
1997              adapter->hw.media_type != em_media_type_internal_serdes) &&
1998             (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU))
1999                 adapter->link_active = 1;
2000         else
2001                 adapter->link_active = 0;
2002
2003         if (adapter->link_active) {
2004                 em_get_speed_and_duplex(&adapter->hw,
2005                                         &adapter->link_speed,
2006                                         &adapter->link_duplex);
2007         } else {
2008                 adapter->link_speed = 0;
2009                 adapter->link_duplex = 0;
2010         }
2011
2012         return(0);
2013 }
2014
2015 /*********************************************************************
2016  *
2017  *  Setup networking device structure and register an interface.
2018  *
2019  **********************************************************************/
2020 static void
2021 em_setup_interface(device_t dev, struct adapter *adapter)
2022 {
2023         struct ifnet   *ifp;
2024         u_char fiber_type = IFM_1000_SX;        /* default type */
2025         INIT_DEBUGOUT("em_setup_interface: begin");
2026
2027         ifp = &adapter->interface_data.ac_if;
2028         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
2029         ifp->if_mtu = ETHERMTU;
2030         ifp->if_baudrate = 1000000000;
2031         ifp->if_init =  em_init;
2032         ifp->if_softc = adapter;
2033         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2034         ifp->if_ioctl = em_ioctl;
2035         ifp->if_start = em_start;
2036 #ifdef DEVICE_POLLING
2037         ifp->if_poll = em_poll;
2038 #endif
2039         ifp->if_watchdog = em_watchdog;
2040         ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2041         ifq_set_ready(&ifp->if_snd);
2042
2043         if (adapter->hw.mac_type >= em_82543)
2044                 ifp->if_capabilities |= IFCAP_HWCSUM;
2045
2046         ifp->if_capenable = ifp->if_capabilities;
2047
2048         ether_ifattach(ifp, adapter->hw.mac_addr, NULL);
2049
2050         /*
2051          * Tell the upper layer(s) we support long frames.
2052          */
2053         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2054         ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2055
2056         /*
2057          * Specify the media types supported by this adapter and register
2058          * callbacks to update media and link information
2059          */
2060         ifmedia_init(&adapter->media, IFM_IMASK, em_media_change,
2061                      em_media_status);
2062         if (adapter->hw.media_type == em_media_type_fiber ||
2063             adapter->hw.media_type == em_media_type_internal_serdes) {
2064                 if (adapter->hw.mac_type == em_82545)
2065                         fiber_type = IFM_1000_LX;
2066                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2067                             0, NULL);
2068                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type,
2069                             0, NULL);
2070         } else {
2071                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2072                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2073                             0, NULL);
2074                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2075                             0, NULL);
2076                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2077                             0, NULL);
2078                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T | IFM_FDX,
2079                             0, NULL);
2080                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T, 0, NULL);
2081         }
2082         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2083         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2084 }
2085
2086 /*********************************************************************
2087  *
2088  *  Workaround for SmartSpeed on 82541 and 82547 controllers
2089  *
2090  **********************************************************************/
2091 static void
2092 em_smartspeed(struct adapter *adapter)
2093 {
2094         uint16_t phy_tmp;
2095
2096         if (adapter->link_active || (adapter->hw.phy_type != em_phy_igp) ||
2097             !adapter->hw.autoneg ||
2098             !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
2099                 return;
2100
2101         if (adapter->smartspeed == 0) {
2102                 /*
2103                  * If Master/Slave config fault is asserted twice,
2104                  * we assume back-to-back.
2105                  */
2106                 em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2107                 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2108                         return;
2109                 em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2110                 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2111                         em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL,
2112                                         &phy_tmp);
2113                         if (phy_tmp & CR_1000T_MS_ENABLE) {
2114                                 phy_tmp &= ~CR_1000T_MS_ENABLE;
2115                                 em_write_phy_reg(&adapter->hw,
2116                                                  PHY_1000T_CTRL, phy_tmp);
2117                                 adapter->smartspeed++;
2118                                 if (adapter->hw.autoneg &&
2119                                     !em_phy_setup_autoneg(&adapter->hw) &&
2120                                     !em_read_phy_reg(&adapter->hw, PHY_CTRL,
2121                                                      &phy_tmp)) {
2122                                         phy_tmp |= (MII_CR_AUTO_NEG_EN |
2123                                                     MII_CR_RESTART_AUTO_NEG);
2124                                         em_write_phy_reg(&adapter->hw,
2125                                                          PHY_CTRL, phy_tmp);
2126                                 }
2127                         }
2128                 }
2129                 return;
2130         } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2131                 /* If still no link, perhaps using 2/3 pair cable */
2132                 em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2133                 phy_tmp |= CR_1000T_MS_ENABLE;
2134                 em_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2135                 if (adapter->hw.autoneg &&
2136                     !em_phy_setup_autoneg(&adapter->hw) &&
2137                     !em_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_tmp)) {
2138                         phy_tmp |= (MII_CR_AUTO_NEG_EN |
2139                                     MII_CR_RESTART_AUTO_NEG);
2140                         em_write_phy_reg(&adapter->hw, PHY_CTRL, phy_tmp);
2141                 }
2142         }
2143         /* Restart process after EM_SMARTSPEED_MAX iterations */
2144         if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2145                 adapter->smartspeed = 0;
2146 }
2147
2148 /*
2149  * Manage DMA'able memory.
2150  */
2151 static void
2152 em_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
2153 {
2154         if (error)
2155                 return;
2156         *(bus_addr_t*) arg = segs->ds_addr;
2157 }
2158
2159 static int
2160 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2161               struct em_dma_alloc *dma, int mapflags)
2162 {
2163         int r;
2164         device_t dev = adapter->dev;
2165
2166         r = bus_dma_tag_create(NULL,                    /* parent */
2167                                PAGE_SIZE, 0,            /* alignment, bounds */
2168                                BUS_SPACE_MAXADDR,       /* lowaddr */
2169                                BUS_SPACE_MAXADDR,       /* highaddr */
2170                                NULL, NULL,              /* filter, filterarg */
2171                                size,                    /* maxsize */
2172                                1,                       /* nsegments */
2173                                size,                    /* maxsegsize */
2174                                BUS_DMA_ALLOCNOW,        /* flags */
2175                                &dma->dma_tag);
2176         if (r != 0) {
2177                 device_printf(dev, "em_dma_malloc: bus_dma_tag_create failed; "
2178                               "error %u\n", r);
2179                 goto fail_0;
2180         }
2181
2182         r = bus_dmamem_alloc(dma->dma_tag, (void**) &dma->dma_vaddr,
2183                              BUS_DMA_NOWAIT, &dma->dma_map);
2184         if (r != 0) {
2185                 device_printf(dev, "em_dma_malloc: bus_dmammem_alloc failed; "
2186                               "size %llu, error %d\n", (uintmax_t)size, r);
2187                 goto fail_2;
2188         }
2189
2190         r = bus_dmamap_load(dma->dma_tag, dma->dma_map, dma->dma_vaddr,
2191                             size,
2192                             em_dmamap_cb,
2193                             &dma->dma_paddr,
2194                             mapflags | BUS_DMA_NOWAIT);
2195         if (r != 0) {
2196                 device_printf(dev, "em_dma_malloc: bus_dmamap_load failed; "
2197                               "error %u\n", r);
2198                 goto fail_3;
2199         }
2200
2201         dma->dma_size = size;
2202         return(0);
2203
2204 fail_3:
2205         bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2206 fail_2:
2207         bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2208         bus_dma_tag_destroy(dma->dma_tag);
2209 fail_0:
2210         dma->dma_map = NULL;
2211         dma->dma_tag = NULL;
2212         return(r);
2213 }
2214
2215 static void
2216 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2217 {
2218         bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2219         bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2220         bus_dma_tag_destroy(dma->dma_tag);
2221 }
2222
2223 /*********************************************************************
2224  *
2225  *  Allocate memory for tx_buffer structures. The tx_buffer stores all
2226  *  the information needed to transmit a packet on the wire.
2227  *
2228  **********************************************************************/
2229 static int
2230 em_allocate_transmit_structures(struct adapter * adapter)
2231 {
2232         adapter->tx_buffer_area = kmalloc(sizeof(struct em_buffer) *
2233             adapter->num_tx_desc, M_DEVBUF, M_NOWAIT | M_ZERO);
2234         if (adapter->tx_buffer_area == NULL) {
2235                 device_printf(adapter->dev, "Unable to allocate tx_buffer memory\n");
2236                 return(ENOMEM);
2237         }
2238
2239         return(0);
2240 }
2241
2242 /*********************************************************************
2243  *
2244  *  Allocate and initialize transmit structures.
2245  *
2246  **********************************************************************/
2247 static int
2248 em_setup_transmit_structures(struct adapter *adapter)
2249 {
2250         struct em_buffer *tx_buffer;
2251         bus_size_t size;
2252         int error, i;
2253
2254         /*
2255          * Setup DMA descriptor areas.
2256          */
2257         size = roundup2(adapter->hw.max_frame_size, MCLBYTES);
2258         if (bus_dma_tag_create(NULL,                    /* parent */
2259                                1, 0,                    /* alignment, bounds */
2260                                BUS_SPACE_MAXADDR,       /* lowaddr */
2261                                BUS_SPACE_MAXADDR,       /* highaddr */
2262                                NULL, NULL,              /* filter, filterarg */
2263                                size,                    /* maxsize */
2264                                EM_MAX_SCATTER,          /* nsegments */
2265                                size,                    /* maxsegsize */
2266                                BUS_DMA_ALLOCNOW,        /* flags */
2267                                &adapter->txtag)) {
2268                 device_printf(adapter->dev, "Unable to allocate TX DMA tag\n");
2269                 return(ENOMEM);
2270         }
2271
2272         if (em_allocate_transmit_structures(adapter))
2273                 return(ENOMEM);
2274
2275         bzero((void *) adapter->tx_desc_base,
2276               (sizeof(struct em_tx_desc)) * adapter->num_tx_desc);
2277         tx_buffer = adapter->tx_buffer_area;
2278         for (i = 0; i < adapter->num_tx_desc; i++) {
2279                 error = bus_dmamap_create(adapter->txtag, 0, &tx_buffer->map);
2280                 if (error) {
2281                         device_printf(adapter->dev,
2282                                       "Unable to create TX DMA map\n");
2283                         goto fail;
2284                 }
2285                 tx_buffer++;
2286         }
2287
2288         adapter->next_avail_tx_desc = 0;
2289         adapter->oldest_used_tx_desc = 0;
2290
2291         /* Set number of descriptors available */
2292         adapter->num_tx_desc_avail = adapter->num_tx_desc;
2293
2294         /* Set checksum context */
2295         adapter->active_checksum_context = OFFLOAD_NONE;
2296
2297         bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map,
2298                         BUS_DMASYNC_PREWRITE);
2299
2300         return(0);
2301 fail:
2302         em_free_transmit_structures(adapter);
2303         return (error);
2304 }
2305
2306 /*********************************************************************
2307  *
2308  *  Enable transmit unit.
2309  *
2310  **********************************************************************/
2311 static void
2312 em_initialize_transmit_unit(struct adapter * adapter)
2313 {
2314         uint32_t reg_tctl, reg_tarc;
2315         uint32_t reg_tipg = 0;
2316         uint64_t bus_addr;
2317
2318         INIT_DEBUGOUT("em_initialize_transmit_unit: begin");
2319
2320         /* Setup the Base and Length of the Tx Descriptor Ring */
2321         bus_addr = adapter->txdma.dma_paddr;
2322         E1000_WRITE_REG(&adapter->hw, TDLEN,
2323                         adapter->num_tx_desc * sizeof(struct em_tx_desc));
2324         E1000_WRITE_REG(&adapter->hw, TDBAH, (uint32_t)(bus_addr >> 32));
2325         E1000_WRITE_REG(&adapter->hw, TDBAL, (uint32_t)bus_addr);
2326
2327         /* Setup the HW Tx Head and Tail descriptor pointers */
2328         E1000_WRITE_REG(&adapter->hw, TDT, 0);
2329         E1000_WRITE_REG(&adapter->hw, TDH, 0);
2330
2331         HW_DEBUGOUT2("Base = %x, Length = %x\n",
2332                      E1000_READ_REG(&adapter->hw, TDBAL),
2333                      E1000_READ_REG(&adapter->hw, TDLEN));
2334
2335         /* Set the default values for the Tx Inter Packet Gap timer */
2336         switch (adapter->hw.mac_type) {
2337         case em_82542_rev2_0:
2338         case em_82542_rev2_1:
2339                 reg_tipg = DEFAULT_82542_TIPG_IPGT;
2340                 reg_tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2341                 reg_tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2342                 break;
2343         case em_80003es2lan:
2344                 reg_tipg = DEFAULT_82543_TIPG_IPGR1;
2345                 reg_tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2346                 break;
2347         default:
2348                 if (adapter->hw.media_type == em_media_type_fiber ||
2349                     adapter->hw.media_type == em_media_type_internal_serdes)
2350                         reg_tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2351                 else
2352                         reg_tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2353                 reg_tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2354                 reg_tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2355         }
2356
2357         E1000_WRITE_REG(&adapter->hw, TIPG, reg_tipg);
2358         E1000_WRITE_REG(&adapter->hw, TIDV, adapter->tx_int_delay.value);
2359         if (adapter->hw.mac_type >= em_82540)
2360                 E1000_WRITE_REG(&adapter->hw, TADV,
2361                                 adapter->tx_abs_int_delay.value);
2362
2363         /* Do adapter specific tweaks before we enable the transmitter */
2364         if (adapter->hw.mac_type == em_82571 || adapter->hw.mac_type == em_82572) {
2365                 reg_tarc = E1000_READ_REG(&adapter->hw, TARC0);
2366                 reg_tarc |= (1 << 25);
2367                 E1000_WRITE_REG(&adapter->hw, TARC0, reg_tarc);
2368                 reg_tarc = E1000_READ_REG(&adapter->hw, TARC1);
2369                 reg_tarc |= (1 << 25);
2370                 reg_tarc &= ~(1 << 28);
2371                 E1000_WRITE_REG(&adapter->hw, TARC1, reg_tarc);
2372         } else if (adapter->hw.mac_type == em_80003es2lan) {
2373                 reg_tarc = E1000_READ_REG(&adapter->hw, TARC0);
2374                 reg_tarc |= 1;
2375                 E1000_WRITE_REG(&adapter->hw, TARC0, reg_tarc);
2376                 reg_tarc = E1000_READ_REG(&adapter->hw, TARC1);
2377                 reg_tarc |= 1;
2378                 E1000_WRITE_REG(&adapter->hw, TARC1, reg_tarc);
2379         }
2380
2381         /* Program the Transmit Control Register */
2382         reg_tctl = E1000_TCTL_PSP | E1000_TCTL_EN |
2383                    (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2384         if (adapter->hw.mac_type >= em_82571)
2385                 reg_tctl |= E1000_TCTL_MULR;
2386         if (adapter->link_duplex == 1)
2387                 reg_tctl |= E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT;
2388         else
2389                 reg_tctl |= E1000_HDX_COLLISION_DISTANCE << E1000_COLD_SHIFT;
2390
2391         /* This write will effectively turn on the transmit unit */
2392         E1000_WRITE_REG(&adapter->hw, TCTL, reg_tctl);
2393
2394         /* Setup Transmit Descriptor Settings for this adapter */
2395         adapter->txd_cmd = E1000_TXD_CMD_IFCS | E1000_TXD_CMD_RS;
2396
2397         if (adapter->tx_int_delay.value > 0)
2398                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2399 }
2400
2401 /*********************************************************************
2402  *
2403  *  Free all transmit related data structures.
2404  *
2405  **********************************************************************/
2406 static void
2407 em_free_transmit_structures(struct adapter * adapter)
2408 {
2409         struct em_buffer *tx_buffer;
2410         int i;
2411
2412         INIT_DEBUGOUT("free_transmit_structures: begin");
2413
2414         if (adapter->tx_buffer_area != NULL) {
2415                 tx_buffer = adapter->tx_buffer_area;
2416                 for (i = 0; i < adapter->num_tx_desc; i++, tx_buffer++) {
2417                         if (tx_buffer->m_head != NULL) {
2418                                 bus_dmamap_unload(adapter->txtag,
2419                                                   tx_buffer->map);
2420                                 m_freem(tx_buffer->m_head);
2421                         }
2422
2423                         if (tx_buffer->map != NULL) {
2424                                 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2425                                 tx_buffer->map = NULL;
2426                         }
2427                         tx_buffer->m_head = NULL;
2428                 }
2429         }
2430         if (adapter->tx_buffer_area != NULL) {
2431                 kfree(adapter->tx_buffer_area, M_DEVBUF);
2432                 adapter->tx_buffer_area = NULL;
2433         }
2434         if (adapter->txtag != NULL) {
2435                 bus_dma_tag_destroy(adapter->txtag);
2436                 adapter->txtag = NULL;
2437         }
2438 }
2439
2440 /*********************************************************************
2441  *
2442  *  The offload context needs to be set when we transfer the first
2443  *  packet of a particular protocol (TCP/UDP). We change the
2444  *  context only if the protocol type changes.
2445  *
2446  **********************************************************************/
2447 static void
2448 em_transmit_checksum_setup(struct adapter * adapter,
2449                            struct mbuf *mp,
2450                            uint32_t *txd_upper,
2451                            uint32_t *txd_lower)
2452 {
2453         struct em_context_desc *TXD;
2454         struct em_buffer *tx_buffer;
2455         int curr_txd;
2456
2457         if (mp->m_pkthdr.csum_flags) {
2458                 if (mp->m_pkthdr.csum_flags & CSUM_TCP) {
2459                         *txd_upper = E1000_TXD_POPTS_TXSM << 8;
2460                         *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2461                         if (adapter->active_checksum_context == OFFLOAD_TCP_IP)
2462                                 return;
2463                         else
2464                                 adapter->active_checksum_context = OFFLOAD_TCP_IP;
2465                 } else if (mp->m_pkthdr.csum_flags & CSUM_UDP) {
2466                         *txd_upper = E1000_TXD_POPTS_TXSM << 8;
2467                         *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2468                         if (adapter->active_checksum_context == OFFLOAD_UDP_IP)
2469                                 return;
2470                         else
2471                                 adapter->active_checksum_context = OFFLOAD_UDP_IP;
2472                 } else {
2473                         *txd_upper = 0;
2474                         *txd_lower = 0;
2475                         return;
2476                 }
2477         } else {
2478                 *txd_upper = 0;
2479                 *txd_lower = 0;
2480                 return;
2481         }
2482
2483         /*
2484          * If we reach this point, the checksum offload context
2485          * needs to be reset.
2486          */
2487         curr_txd = adapter->next_avail_tx_desc;
2488         tx_buffer = &adapter->tx_buffer_area[curr_txd];
2489         TXD = (struct em_context_desc *) &adapter->tx_desc_base[curr_txd];
2490
2491         TXD->lower_setup.ip_fields.ipcss = ETHER_HDR_LEN;
2492         TXD->lower_setup.ip_fields.ipcso =
2493             ETHER_HDR_LEN + offsetof(struct ip, ip_sum);
2494         TXD->lower_setup.ip_fields.ipcse =
2495             htole16(ETHER_HDR_LEN + sizeof(struct ip) - 1);
2496
2497         TXD->upper_setup.tcp_fields.tucss =
2498             ETHER_HDR_LEN + sizeof(struct ip);
2499         TXD->upper_setup.tcp_fields.tucse = htole16(0);
2500
2501         if (adapter->active_checksum_context == OFFLOAD_TCP_IP) {
2502                 TXD->upper_setup.tcp_fields.tucso =
2503                     ETHER_HDR_LEN + sizeof(struct ip) +
2504                     offsetof(struct tcphdr, th_sum);
2505         } else if (adapter->active_checksum_context == OFFLOAD_UDP_IP) {
2506                 TXD->upper_setup.tcp_fields.tucso =
2507                         ETHER_HDR_LEN + sizeof(struct ip) +
2508                         offsetof(struct udphdr, uh_sum);
2509         }
2510
2511         TXD->tcp_seg_setup.data = htole32(0);
2512         TXD->cmd_and_length = htole32(adapter->txd_cmd | E1000_TXD_CMD_DEXT);
2513
2514         tx_buffer->m_head = NULL;
2515
2516         if (++curr_txd == adapter->num_tx_desc)
2517                 curr_txd = 0;
2518
2519         adapter->num_tx_desc_avail--;
2520         adapter->next_avail_tx_desc = curr_txd;
2521 }
2522
2523 /**********************************************************************
2524  *
2525  *  Examine each tx_buffer in the used queue. If the hardware is done
2526  *  processing the packet then free associated resources. The
2527  *  tx_buffer is put back on the free queue.
2528  *
2529  **********************************************************************/
2530
2531 static void
2532 em_clean_transmit_interrupts(struct adapter *adapter)
2533 {
2534         int i, num_avail;
2535         struct em_buffer *tx_buffer;
2536         struct em_tx_desc *tx_desc;
2537         struct ifnet *ifp = &adapter->interface_data.ac_if;
2538
2539         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2540                 return;
2541
2542         num_avail = adapter->num_tx_desc_avail;
2543         i = adapter->oldest_used_tx_desc;
2544
2545         tx_buffer = &adapter->tx_buffer_area[i];
2546         tx_desc = &adapter->tx_desc_base[i];
2547
2548         bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map,
2549                         BUS_DMASYNC_POSTREAD);
2550
2551         while(tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2552                 tx_desc->upper.data = 0;
2553                 num_avail++;
2554
2555                 logif(pkt_txclean);
2556
2557                 if (tx_buffer->m_head) {
2558                         ifp->if_opackets++;
2559                         bus_dmamap_sync(adapter->txtag, tx_buffer->map,
2560                                         BUS_DMASYNC_POSTWRITE);
2561                         bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2562
2563                         m_freem(tx_buffer->m_head);
2564                         tx_buffer->m_head = NULL;
2565                 }
2566
2567                 if (++i == adapter->num_tx_desc)
2568                         i = 0;
2569
2570                 tx_buffer = &adapter->tx_buffer_area[i];
2571                 tx_desc = &adapter->tx_desc_base[i];
2572         }
2573
2574         bus_dmamap_sync(adapter->txdma.dma_tag, adapter->txdma.dma_map,
2575                         BUS_DMASYNC_PREWRITE);
2576
2577         adapter->oldest_used_tx_desc = i;
2578
2579         /*
2580          * If we have enough room, clear IFF_OACTIVE to tell the stack
2581          * that it is OK to send packets.
2582          * If there are no pending descriptors, clear the timeout. Otherwise,
2583          * if some descriptors have been freed, restart the timeout.
2584          */
2585         if (num_avail > EM_TX_CLEANUP_THRESHOLD) {
2586                 ifp->if_flags &= ~IFF_OACTIVE;
2587                 if (num_avail == adapter->num_tx_desc)
2588                         ifp->if_timer = 0;
2589                 else if (num_avail == adapter->num_tx_desc_avail)
2590                         ifp->if_timer = EM_TX_TIMEOUT;
2591         }
2592         adapter->num_tx_desc_avail = num_avail;
2593 }
2594
2595 /*********************************************************************
2596  *
2597  *  Get a buffer from system mbuf buffer pool.
2598  *
2599  **********************************************************************/
2600 static int
2601 em_get_buf(int i, struct adapter *adapter, struct mbuf *nmp, int how)
2602 {
2603         struct mbuf *mp = nmp;
2604         struct em_buffer *rx_buffer;
2605         struct ifnet *ifp;
2606         bus_addr_t paddr;
2607         int error;
2608
2609         ifp = &adapter->interface_data.ac_if;
2610
2611         if (mp == NULL) {
2612                 mp = m_getcl(how, MT_DATA, M_PKTHDR);
2613                 if (mp == NULL) {
2614                         adapter->mbuf_cluster_failed++;
2615                         return(ENOBUFS);
2616                 }
2617                 mp->m_len = mp->m_pkthdr.len = MCLBYTES;
2618         } else {
2619                 mp->m_len = mp->m_pkthdr.len = MCLBYTES;
2620                 mp->m_data = mp->m_ext.ext_buf;
2621                 mp->m_next = NULL;
2622         }
2623         if (ifp->if_mtu <= ETHERMTU)
2624                 m_adj(mp, ETHER_ALIGN);
2625
2626         rx_buffer = &adapter->rx_buffer_area[i];
2627
2628         /*
2629          * Using memory from the mbuf cluster pool, invoke the
2630          * bus_dma machinery to arrange the memory mapping.
2631          */
2632         error = bus_dmamap_load(adapter->rxtag, rx_buffer->map,
2633                                 mtod(mp, void *), mp->m_len,
2634                                 em_dmamap_cb, &paddr, 0);
2635         if (error) {
2636                 m_free(mp);
2637                 return(error);
2638         }
2639         rx_buffer->m_head = mp;
2640         adapter->rx_desc_base[i].buffer_addr = htole64(paddr);
2641         bus_dmamap_sync(adapter->rxtag, rx_buffer->map, BUS_DMASYNC_PREREAD);
2642
2643         return(0);
2644 }
2645
2646 /*********************************************************************
2647  *
2648  *  Allocate memory for rx_buffer structures. Since we use one
2649  *  rx_buffer per received packet, the maximum number of rx_buffer's
2650  *  that we'll need is equal to the number of receive descriptors
2651  *  that we've allocated.
2652  *
2653  **********************************************************************/
2654 static int
2655 em_allocate_receive_structures(struct adapter *adapter)
2656 {
2657         int i, error, size;
2658         struct em_buffer *rx_buffer;
2659
2660         size = adapter->num_rx_desc * sizeof(struct em_buffer);
2661         adapter->rx_buffer_area = kmalloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
2662
2663         error = bus_dma_tag_create(NULL,                /* parent */
2664                                    1, 0,                /* alignment, bounds */
2665                                    BUS_SPACE_MAXADDR,   /* lowaddr */
2666                                    BUS_SPACE_MAXADDR,   /* highaddr */
2667                                    NULL, NULL,          /* filter, filterarg */
2668                                    MCLBYTES,            /* maxsize */
2669                                    1,                   /* nsegments */
2670                                    MCLBYTES,            /* maxsegsize */
2671                                    BUS_DMA_ALLOCNOW,    /* flags */
2672                                    &adapter->rxtag);
2673         if (error != 0) {
2674                 device_printf(adapter->dev, "em_allocate_receive_structures: "
2675                               "bus_dma_tag_create failed; error %u\n", error);
2676                 goto fail_0;
2677         }
2678
2679         rx_buffer = adapter->rx_buffer_area;
2680         for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) {
2681                 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_NOWAIT,
2682                                           &rx_buffer->map);
2683                 if (error != 0) {
2684                         device_printf(adapter->dev,
2685                                       "em_allocate_receive_structures: "
2686                                       "bus_dmamap_create failed; error %u\n",
2687                                       error);
2688                         goto fail_1;
2689                 }
2690         }
2691
2692         for (i = 0; i < adapter->num_rx_desc; i++) {
2693                 error = em_get_buf(i, adapter, NULL, MB_WAIT);
2694                 if (error != 0) {
2695                         adapter->rx_buffer_area[i].m_head = NULL;
2696                         adapter->rx_desc_base[i].buffer_addr = 0;
2697                         return(error);
2698                 }
2699         }
2700
2701         bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map,
2702                         BUS_DMASYNC_PREWRITE);
2703
2704         return(0);
2705
2706 fail_1:
2707         bus_dma_tag_destroy(adapter->rxtag);
2708 fail_0:
2709         adapter->rxtag = NULL;
2710         kfree(adapter->rx_buffer_area, M_DEVBUF);
2711         adapter->rx_buffer_area = NULL;
2712         return(error);
2713 }
2714
2715 /*********************************************************************
2716  *
2717  *  Allocate and initialize receive structures.
2718  *
2719  **********************************************************************/
2720 static int
2721 em_setup_receive_structures(struct adapter *adapter)
2722 {
2723         bzero((void *) adapter->rx_desc_base,
2724               (sizeof(struct em_rx_desc)) * adapter->num_rx_desc);
2725
2726         if (em_allocate_receive_structures(adapter))
2727                 return(ENOMEM);
2728
2729         /* Setup our descriptor pointers */
2730         adapter->next_rx_desc_to_check = 0;
2731         return(0);
2732 }
2733
2734 /*********************************************************************
2735  *
2736  *  Enable receive unit.
2737  *
2738  **********************************************************************/
2739 static void
2740 em_initialize_receive_unit(struct adapter *adapter)
2741 {
2742         uint32_t reg_rctl;
2743         uint32_t reg_rxcsum;
2744         struct ifnet *ifp;
2745         uint64_t bus_addr;
2746
2747         INIT_DEBUGOUT("em_initialize_receive_unit: begin");
2748
2749         ifp = &adapter->interface_data.ac_if;
2750
2751         /* Make sure receives are disabled while setting up the descriptor ring */
2752         E1000_WRITE_REG(&adapter->hw, RCTL, 0);
2753
2754         /* Set the Receive Delay Timer Register */
2755         E1000_WRITE_REG(&adapter->hw, RDTR,
2756                         adapter->rx_int_delay.value | E1000_RDT_FPDB);
2757
2758         if(adapter->hw.mac_type >= em_82540) {
2759                 E1000_WRITE_REG(&adapter->hw, RADV,
2760                                 adapter->rx_abs_int_delay.value);
2761
2762                 /* Set the interrupt throttling rate in 256ns increments */
2763                 if (em_int_throttle_ceil) {
2764                         E1000_WRITE_REG(&adapter->hw, ITR,
2765                                 1000000000 / 256 / em_int_throttle_ceil);
2766                 } else {
2767                         E1000_WRITE_REG(&adapter->hw, ITR, 0);
2768                 }
2769         }
2770
2771         /* Setup the Base and Length of the Rx Descriptor Ring */
2772         bus_addr = adapter->rxdma.dma_paddr;
2773         E1000_WRITE_REG(&adapter->hw, RDLEN, adapter->num_rx_desc *
2774                         sizeof(struct em_rx_desc));
2775         E1000_WRITE_REG(&adapter->hw, RDBAH, (uint32_t)(bus_addr >> 32));
2776         E1000_WRITE_REG(&adapter->hw, RDBAL, (uint32_t)bus_addr);
2777
2778         /* Setup the HW Rx Head and Tail Descriptor Pointers */
2779         E1000_WRITE_REG(&adapter->hw, RDT, adapter->num_rx_desc - 1);
2780         E1000_WRITE_REG(&adapter->hw, RDH, 0);
2781
2782         /* Setup the Receive Control Register */
2783         reg_rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
2784                    E1000_RCTL_RDMTS_HALF |
2785                    (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
2786
2787         if (adapter->hw.tbi_compatibility_on == TRUE)
2788                 reg_rctl |= E1000_RCTL_SBP;
2789
2790         switch (adapter->rx_buffer_len) {
2791         default:
2792         case EM_RXBUFFER_2048:
2793                 reg_rctl |= E1000_RCTL_SZ_2048;
2794                 break;
2795         case EM_RXBUFFER_4096:
2796                 reg_rctl |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX | E1000_RCTL_LPE;
2797                 break;
2798         case EM_RXBUFFER_8192:
2799                 reg_rctl |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX | E1000_RCTL_LPE;
2800                 break;
2801         case EM_RXBUFFER_16384:
2802                 reg_rctl |= E1000_RCTL_SZ_16384 | E1000_RCTL_BSEX | E1000_RCTL_LPE;
2803                 break;
2804         }
2805
2806         if (ifp->if_mtu > ETHERMTU)
2807                 reg_rctl |= E1000_RCTL_LPE;
2808
2809         /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2810         if ((adapter->hw.mac_type >= em_82543) &&
2811             (ifp->if_capenable & IFCAP_RXCSUM)) {
2812                 reg_rxcsum = E1000_READ_REG(&adapter->hw, RXCSUM);
2813                 reg_rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
2814                 E1000_WRITE_REG(&adapter->hw, RXCSUM, reg_rxcsum);
2815         }
2816
2817         /* Enable Receives */
2818         E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
2819 }
2820
2821 /*********************************************************************
2822  *
2823  *  Free receive related data structures.
2824  *
2825  **********************************************************************/
2826 static void
2827 em_free_receive_structures(struct adapter *adapter)
2828 {
2829         struct em_buffer *rx_buffer;
2830         int i;
2831
2832         INIT_DEBUGOUT("free_receive_structures: begin");
2833
2834         if (adapter->rx_buffer_area != NULL) {
2835                 rx_buffer = adapter->rx_buffer_area;
2836                 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) {
2837                         if (rx_buffer->map != NULL) {
2838                                 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2839                                 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
2840                         }
2841                         if (rx_buffer->m_head != NULL)
2842                                 m_freem(rx_buffer->m_head);
2843                         rx_buffer->m_head = NULL;
2844                 }
2845         }
2846         if (adapter->rx_buffer_area != NULL) {
2847                 kfree(adapter->rx_buffer_area, M_DEVBUF);
2848                 adapter->rx_buffer_area = NULL;
2849         }
2850         if (adapter->rxtag != NULL) {
2851                 bus_dma_tag_destroy(adapter->rxtag);
2852                 adapter->rxtag = NULL;
2853         }
2854 }
2855
2856 /*********************************************************************
2857  *
2858  *  This routine executes in interrupt context. It replenishes
2859  *  the mbufs in the descriptor and sends data which has been
2860  *  dma'ed into host memory to upper layer.
2861  *
2862  *  We loop at most count times if count is > 0, or until done if
2863  *  count < 0.
2864  *
2865  *********************************************************************/
2866 static void
2867 em_process_receive_interrupts(struct adapter *adapter, int count)
2868 {
2869         struct ifnet *ifp;
2870         struct mbuf *mp;
2871         uint8_t accept_frame = 0;
2872         uint8_t eop = 0;
2873         uint16_t len, desc_len, prev_len_adj;
2874         int i;
2875
2876         /* Pointer to the receive descriptor being examined. */
2877         struct em_rx_desc *current_desc;
2878
2879         ifp = &adapter->interface_data.ac_if;
2880         i = adapter->next_rx_desc_to_check;
2881         current_desc = &adapter->rx_desc_base[i];
2882
2883         bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map,
2884                         BUS_DMASYNC_POSTREAD);
2885
2886         if (!((current_desc->status) & E1000_RXD_STAT_DD))
2887                 return;
2888
2889         while ((current_desc->status & E1000_RXD_STAT_DD) && (count != 0)) {
2890                 logif(pkt_receive);
2891                 mp = adapter->rx_buffer_area[i].m_head;
2892                 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
2893                                 BUS_DMASYNC_POSTREAD);
2894                 bus_dmamap_unload(adapter->rxtag,
2895                                   adapter->rx_buffer_area[i].map);
2896
2897                 accept_frame = 1;
2898                 prev_len_adj = 0;
2899                 desc_len = le16toh(current_desc->length);
2900                 if (current_desc->status & E1000_RXD_STAT_EOP) {
2901                         count--;
2902                         eop = 1;
2903                         if (desc_len < ETHER_CRC_LEN) {
2904                                 len = 0;
2905                                 prev_len_adj = ETHER_CRC_LEN - desc_len;
2906                         } else {
2907                                 len = desc_len - ETHER_CRC_LEN;
2908                         }
2909                 } else {
2910                         eop = 0;
2911                         len = desc_len;
2912                 }
2913
2914                 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
2915                         uint8_t last_byte;
2916                         uint32_t pkt_len = desc_len;
2917
2918                         if (adapter->fmp != NULL)
2919                                 pkt_len += adapter->fmp->m_pkthdr.len;
2920
2921                         last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
2922
2923                         if (TBI_ACCEPT(&adapter->hw, current_desc->status,
2924                                        current_desc->errors,
2925                                        pkt_len, last_byte)) {
2926                                 em_tbi_adjust_stats(&adapter->hw,
2927                                                     &adapter->stats,
2928                                                     pkt_len,
2929                                                     adapter->hw.mac_addr);
2930                                 if (len > 0)
2931                                         len--;
2932                         } else {
2933                                 accept_frame = 0;
2934                         }
2935                 }
2936
2937                 if (accept_frame) {
2938                         if (em_get_buf(i, adapter, NULL, MB_DONTWAIT) == ENOBUFS) {
2939                                 adapter->dropped_pkts++;
2940                                 em_get_buf(i, adapter, mp, MB_DONTWAIT);
2941                                 if (adapter->fmp != NULL)
2942                                         m_freem(adapter->fmp);
2943                                 adapter->fmp = NULL;
2944                                 adapter->lmp = NULL;
2945                                 goto skip;
2946                         }
2947
2948                         /* Assign correct length to the current fragment */
2949                         mp->m_len = len;
2950
2951                         if (adapter->fmp == NULL) {
2952                                 mp->m_pkthdr.len = len;
2953                                 adapter->fmp = mp;       /* Store the first mbuf */
2954                                 adapter->lmp = mp;
2955                         } else {
2956                                 /* Chain mbuf's together */
2957                                 /*
2958                                  * Adjust length of previous mbuf in chain if we
2959                                  * received less than 4 bytes in the last descriptor.
2960                                  */
2961                                 if (prev_len_adj > 0) {
2962                                         adapter->lmp->m_len -= prev_len_adj;
2963                                         adapter->fmp->m_pkthdr.len -= prev_len_adj;
2964                                 }
2965                                 adapter->lmp->m_next = mp;
2966                                 adapter->lmp = adapter->lmp->m_next;
2967                                 adapter->fmp->m_pkthdr.len += len;
2968                         }
2969
2970                         if (eop) {
2971                                 adapter->fmp->m_pkthdr.rcvif = ifp;
2972                                 ifp->if_ipackets++;
2973
2974                                 em_receive_checksum(adapter, current_desc,
2975                                                     adapter->fmp);
2976                                 if (current_desc->status & E1000_RXD_STAT_VP) {
2977                                         VLAN_INPUT_TAG(adapter->fmp,
2978                                                        (current_desc->special &
2979                                                         E1000_RXD_SPC_VLAN_MASK));
2980                                 } else {
2981                                         ifp->if_input(ifp, adapter->fmp);
2982                                 }
2983                                 adapter->fmp = NULL;
2984                                 adapter->lmp = NULL;
2985                         }
2986                 } else {
2987                         adapter->dropped_pkts++;
2988                         em_get_buf(i, adapter, mp, MB_DONTWAIT);
2989                         if (adapter->fmp != NULL)
2990                                 m_freem(adapter->fmp);
2991                         adapter->fmp = NULL;
2992                         adapter->lmp = NULL;
2993                 }
2994
2995 skip:
2996                 /* Zero out the receive descriptors status  */
2997                 current_desc->status = 0;
2998
2999                 /* Advance our pointers to the next descriptor */
3000                 if (++i == adapter->num_rx_desc) {
3001                         i = 0;
3002                         current_desc = adapter->rx_desc_base;
3003                 } else {
3004                         current_desc++;
3005                 }
3006         }
3007
3008         bus_dmamap_sync(adapter->rxdma.dma_tag, adapter->rxdma.dma_map,
3009                         BUS_DMASYNC_PREWRITE);
3010
3011         adapter->next_rx_desc_to_check = i;
3012
3013         /* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3014         if (--i < 0)
3015                 i = adapter->num_rx_desc - 1;
3016
3017         E1000_WRITE_REG(&adapter->hw, RDT, i);
3018 }
3019
3020 /*********************************************************************
3021  *
3022  *  Verify that the hardware indicated that the checksum is valid.
3023  *  Inform the stack about the status of checksum so that stack
3024  *  doesn't spend time verifying the checksum.
3025  *
3026  *********************************************************************/
3027 static void
3028 em_receive_checksum(struct adapter *adapter,
3029                     struct em_rx_desc *rx_desc,
3030                     struct mbuf *mp)
3031 {
3032         /* 82543 or newer only */
3033         if ((adapter->hw.mac_type < em_82543) ||
3034             /* Ignore Checksum bit is set */
3035             (rx_desc->status & E1000_RXD_STAT_IXSM)) {
3036                 mp->m_pkthdr.csum_flags = 0;
3037                 return;
3038         }
3039
3040         if (rx_desc->status & E1000_RXD_STAT_IPCS) {
3041                 /* Did it pass? */
3042                 if (!(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3043                         /* IP Checksum Good */
3044                         mp->m_pkthdr.csum_flags = CSUM_IP_CHECKED;
3045                         mp->m_pkthdr.csum_flags |= CSUM_IP_VALID;
3046                 } else {
3047                         mp->m_pkthdr.csum_flags = 0;
3048                 }
3049         }
3050
3051         if (rx_desc->status & E1000_RXD_STAT_TCPCS) {
3052                 /* Did it pass? */
3053                 if (!(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3054                         mp->m_pkthdr.csum_flags |=
3055                         (CSUM_DATA_VALID | CSUM_PSEUDO_HDR);
3056                         mp->m_pkthdr.csum_data = htons(0xffff);
3057                 }
3058         }
3059 }
3060
3061
3062 static void
3063 em_enable_vlans(struct adapter *adapter)
3064 {
3065         uint32_t ctrl;
3066
3067         E1000_WRITE_REG(&adapter->hw, VET, ETHERTYPE_VLAN);
3068
3069         ctrl = E1000_READ_REG(&adapter->hw, CTRL);
3070         ctrl |= E1000_CTRL_VME;
3071         E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
3072 }
3073
3074 static void
3075 em_disable_vlans(struct adapter *adapter)
3076 {
3077         uint32_t ctrl;
3078
3079         ctrl = E1000_READ_REG(&adapter->hw, CTRL);
3080         ctrl &= ~E1000_CTRL_VME;
3081         E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
3082 }
3083
3084 /*
3085  * note: we must call bus_enable_intr() prior to enabling the hardware
3086  * interrupt and bus_disable_intr() after disabling the hardware interrupt
3087  * in order to avoid handler execution races from scheduled interrupt
3088  * threads.
3089  */
3090 static void
3091 em_enable_intr(struct adapter *adapter)
3092 {
3093         struct ifnet *ifp = &adapter->interface_data.ac_if;
3094
3095         if ((ifp->if_flags & IFF_POLLING) == 0) {
3096                 lwkt_serialize_handler_enable(ifp->if_serializer);
3097                 E1000_WRITE_REG(&adapter->hw, IMS, (IMS_ENABLE_MASK));
3098         }
3099 }
3100
3101 static void
3102 em_disable_intr(struct adapter *adapter)
3103 {
3104         /*
3105          * The first version of 82542 had an errata where when link was
3106          * forced it would stay up even up even if the cable was disconnected.
3107          * Sequence errors were used to detect the disconnect and then the
3108          * driver would unforce the link.  This code in the in the ISR.  For
3109          * this to work correctly the Sequence error interrupt had to be
3110          * enabled all the time.
3111          */
3112         if (adapter->hw.mac_type == em_82542_rev2_0) {
3113                 E1000_WRITE_REG(&adapter->hw, IMC,
3114                                 (0xffffffff & ~E1000_IMC_RXSEQ));
3115         } else {
3116                 E1000_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
3117         }
3118
3119         lwkt_serialize_handler_disable(adapter->interface_data.ac_if.if_serializer);
3120 }
3121
3122 static int
3123 em_is_valid_ether_addr(uint8_t *addr)
3124 {
3125         char zero_addr[6] = { 0, 0, 0, 0, 0, 0 };
3126
3127         if ((addr[0] & 1) || (!bcmp(addr, zero_addr, ETHER_ADDR_LEN)))
3128                 return(FALSE);
3129         else
3130                 return(TRUE);
3131 }
3132
3133 void
3134 em_write_pci_cfg(struct em_hw *hw, uint32_t reg, uint16_t *value)
3135 {
3136         pci_write_config(((struct em_osdep *)hw->back)->dev, reg, *value, 2);
3137 }
3138
3139 void
3140 em_read_pci_cfg(struct em_hw *hw, uint32_t reg, uint16_t *value)
3141 {
3142         *value = pci_read_config(((struct em_osdep *)hw->back)->dev, reg, 2);
3143 }
3144
3145 void
3146 em_pci_set_mwi(struct em_hw *hw)
3147 {
3148         pci_write_config(((struct em_osdep *)hw->back)->dev, PCIR_COMMAND,
3149                          (hw->pci_cmd_word | CMD_MEM_WRT_INVALIDATE), 2);
3150 }
3151
3152 void
3153 em_pci_clear_mwi(struct em_hw *hw)
3154 {
3155         pci_write_config(((struct em_osdep *)hw->back)->dev, PCIR_COMMAND,
3156                          (hw->pci_cmd_word & ~CMD_MEM_WRT_INVALIDATE), 2);
3157 }
3158
3159 uint32_t
3160 em_read_reg_io(struct em_hw *hw, uint32_t offset)
3161 {
3162         bus_space_write_4(hw->reg_io_tag, hw->reg_io_handle, 0, offset);
3163         return(bus_space_read_4(hw->reg_io_tag, hw->reg_io_handle, 4));
3164 }
3165
3166 void
3167 em_write_reg_io(struct em_hw *hw, uint32_t offset, uint32_t value)
3168 {
3169         bus_space_write_4(hw->reg_io_tag, hw->reg_io_handle, 0, offset);
3170         bus_space_write_4(hw->reg_io_tag, hw->reg_io_handle, 4, value);
3171 }
3172
3173 /*********************************************************************
3174  * 82544 Coexistence issue workaround.
3175  *    There are 2 issues.
3176  *      1. Transmit Hang issue.
3177  *    To detect this issue, following equation can be used...
3178  *          SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3179  *          If SUM[3:0] is in between 1 to 4, we will have this issue.
3180  *
3181  *      2. DAC issue.
3182  *    To detect this issue, following equation can be used...
3183  *          SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3184  *          If SUM[3:0] is in between 9 to c, we will have this issue.
3185  *
3186  *
3187  *    WORKAROUND:
3188  *          Make sure we do not have ending address as 1,2,3,4(Hang) or
3189  *          9,a,b,c (DAC)
3190  *
3191 *************************************************************************/
3192 static uint32_t
3193 em_fill_descriptors(uint64_t address, uint32_t length, PDESC_ARRAY desc_array)
3194 {
3195         /* Since issue is sensitive to length and address.*/
3196         /* Let us first check the address...*/
3197         uint32_t safe_terminator;
3198         if (length <= 4) {
3199                 desc_array->descriptor[0].address = address;
3200                 desc_array->descriptor[0].length = length;
3201                 desc_array->elements = 1;
3202                 return(desc_array->elements);
3203         }
3204         safe_terminator = (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3205         /* if it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3206         if (safe_terminator == 0 ||
3207             (safe_terminator > 4 && safe_terminator < 9) ||
3208             (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3209                 desc_array->descriptor[0].address = address;
3210                 desc_array->descriptor[0].length = length;
3211                 desc_array->elements = 1;
3212                 return(desc_array->elements);
3213         }
3214
3215         desc_array->descriptor[0].address = address;
3216         desc_array->descriptor[0].length = length - 4;
3217         desc_array->descriptor[1].address = address + (length - 4);
3218         desc_array->descriptor[1].length = 4;
3219         desc_array->elements = 2;
3220         return(desc_array->elements);
3221 }
3222
3223 /**********************************************************************
3224  *
3225  *  Update the board statistics counters.
3226  *
3227  **********************************************************************/
3228 static void
3229 em_update_stats_counters(struct adapter *adapter)
3230 {
3231         struct ifnet   *ifp;
3232
3233         if (adapter->hw.media_type == em_media_type_copper ||
3234             (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
3235                 adapter->stats.symerrs += E1000_READ_REG(&adapter->hw, SYMERRS);
3236                 adapter->stats.sec += E1000_READ_REG(&adapter->hw, SEC);
3237         }
3238         adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, CRCERRS);
3239         adapter->stats.mpc += E1000_READ_REG(&adapter->hw, MPC);
3240         adapter->stats.scc += E1000_READ_REG(&adapter->hw, SCC);
3241         adapter->stats.ecol += E1000_READ_REG(&adapter->hw, ECOL);
3242
3243         adapter->stats.mcc += E1000_READ_REG(&adapter->hw, MCC);
3244         adapter->stats.latecol += E1000_READ_REG(&adapter->hw, LATECOL);
3245         adapter->stats.colc += E1000_READ_REG(&adapter->hw, COLC);
3246         adapter->stats.dc += E1000_READ_REG(&adapter->hw, DC);
3247         adapter->stats.rlec += E1000_READ_REG(&adapter->hw, RLEC);
3248         adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, XONRXC);
3249         adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, XONTXC);
3250         adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, XOFFRXC);
3251         adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, XOFFTXC);
3252         adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, FCRUC);
3253         adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, PRC64);
3254         adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, PRC127);
3255         adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, PRC255);
3256         adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, PRC511);
3257         adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, PRC1023);
3258         adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, PRC1522);
3259         adapter->stats.gprc += E1000_READ_REG(&adapter->hw, GPRC);
3260         adapter->stats.bprc += E1000_READ_REG(&adapter->hw, BPRC);
3261         adapter->stats.mprc += E1000_READ_REG(&adapter->hw, MPRC);
3262         adapter->stats.gptc += E1000_READ_REG(&adapter->hw, GPTC);
3263
3264         /* For the 64-bit byte counters the low dword must be read first. */
3265         /* Both registers clear on the read of the high dword */
3266
3267         adapter->stats.gorcl += E1000_READ_REG(&adapter->hw, GORCL);
3268         adapter->stats.gorch += E1000_READ_REG(&adapter->hw, GORCH);
3269         adapter->stats.gotcl += E1000_READ_REG(&adapter->hw, GOTCL);
3270         adapter->stats.gotch += E1000_READ_REG(&adapter->hw, GOTCH);
3271
3272         adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, RNBC);
3273         adapter->stats.ruc += E1000_READ_REG(&adapter->hw, RUC);
3274         adapter->stats.rfc += E1000_READ_REG(&adapter->hw, RFC);
3275         adapter->stats.roc += E1000_READ_REG(&adapter->hw, ROC);
3276         adapter->stats.rjc += E1000_READ_REG(&adapter->hw, RJC);
3277
3278         adapter->stats.torl += E1000_READ_REG(&adapter->hw, TORL);
3279         adapter->stats.torh += E1000_READ_REG(&adapter->hw, TORH);
3280         adapter->stats.totl += E1000_READ_REG(&adapter->hw, TOTL);
3281         adapter->stats.toth += E1000_READ_REG(&adapter->hw, TOTH);
3282
3283         adapter->stats.tpr += E1000_READ_REG(&adapter->hw, TPR);
3284         adapter->stats.tpt += E1000_READ_REG(&adapter->hw, TPT);
3285         adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, PTC64);
3286         adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, PTC127);
3287         adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, PTC255);
3288         adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, PTC511);
3289         adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, PTC1023);
3290         adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, PTC1522);
3291         adapter->stats.mptc += E1000_READ_REG(&adapter->hw, MPTC);
3292         adapter->stats.bptc += E1000_READ_REG(&adapter->hw, BPTC);
3293
3294         if (adapter->hw.mac_type >= em_82543) {
3295                 adapter->stats.algnerrc +=
3296                     E1000_READ_REG(&adapter->hw, ALGNERRC);
3297                 adapter->stats.rxerrc +=
3298                     E1000_READ_REG(&adapter->hw, RXERRC);
3299                 adapter->stats.tncrs +=
3300                     E1000_READ_REG(&adapter->hw, TNCRS);
3301                 adapter->stats.cexterr +=
3302                     E1000_READ_REG(&adapter->hw, CEXTERR);
3303                 adapter->stats.tsctc +=
3304                     E1000_READ_REG(&adapter->hw, TSCTC);
3305                 adapter->stats.tsctfc +=
3306                     E1000_READ_REG(&adapter->hw, TSCTFC);
3307         }
3308         ifp = &adapter->interface_data.ac_if;
3309
3310         /* Fill out the OS statistics structure */
3311         ifp->if_collisions = adapter->stats.colc;
3312
3313         /* Rx Errors */
3314         ifp->if_ierrors =
3315                 adapter->dropped_pkts +
3316                 adapter->stats.rxerrc +
3317                 adapter->stats.crcerrs +
3318                 adapter->stats.algnerrc +
3319                 adapter->stats.ruc + adapter->stats.roc +
3320                 adapter->stats.mpc + adapter->stats.cexterr +
3321                 adapter->rx_overruns;
3322
3323         /* Tx Errors */
3324         ifp->if_oerrors = adapter->stats.ecol + adapter->stats.latecol +
3325                           adapter->watchdog_timeouts;
3326 }
3327
3328
3329 /**********************************************************************
3330  *
3331  *  This routine is called only when em_display_debug_stats is enabled.
3332  *  This routine provides a way to take a look at important statistics
3333  *  maintained by the driver and hardware.
3334  *
3335  **********************************************************************/
3336 static void
3337 em_print_debug_info(struct adapter *adapter)
3338 {
3339         device_t dev= adapter->dev;
3340         uint8_t *hw_addr = adapter->hw.hw_addr;
3341
3342         device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3343         device_printf(dev, "CTRL  = 0x%x\n",
3344                       E1000_READ_REG(&adapter->hw, CTRL));
3345         device_printf(dev, "RCTL  = 0x%x PS=(0x8402)\n",
3346                       E1000_READ_REG(&adapter->hw, RCTL));
3347         device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk\n",
3348                       ((E1000_READ_REG(&adapter->hw, PBA) & 0xffff0000) >> 16),
3349                       (E1000_READ_REG(&adapter->hw, PBA) & 0xffff));
3350         device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3351                       adapter->hw.fc_high_water, adapter->hw.fc_low_water);
3352         device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3353                       E1000_READ_REG(&adapter->hw, TIDV),
3354                       E1000_READ_REG(&adapter->hw, TADV));
3355         device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3356                       E1000_READ_REG(&adapter->hw, RDTR),
3357                       E1000_READ_REG(&adapter->hw, RADV));
3358         device_printf(dev, "fifo workaround = %lld, fifo_reset = %lld\n",
3359                       (long long)adapter->tx_fifo_wrk_cnt,
3360                       (long long)adapter->tx_fifo_reset_cnt);
3361         device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3362                       E1000_READ_REG(&adapter->hw, TDH),
3363                       E1000_READ_REG(&adapter->hw, TDT));
3364         device_printf(dev, "Num Tx descriptors avail = %d\n",
3365                       adapter->num_tx_desc_avail);
3366         device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3367                       adapter->no_tx_desc_avail1);
3368         device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3369                       adapter->no_tx_desc_avail2);
3370         device_printf(dev, "Std mbuf failed = %ld\n",
3371                       adapter->mbuf_alloc_failed);
3372         device_printf(dev, "Std mbuf cluster failed = %ld\n",
3373                       adapter->mbuf_cluster_failed);
3374         device_printf(dev, "Driver dropped packets = %ld\n",
3375                       adapter->dropped_pkts);
3376 }
3377
3378 static void
3379 em_print_hw_stats(struct adapter *adapter)
3380 {
3381         device_t dev= adapter->dev;
3382
3383         device_printf(dev, "Adapter: %p\n", adapter);
3384
3385         device_printf(dev, "Excessive collisions = %lld\n",
3386                       (long long)adapter->stats.ecol);
3387         device_printf(dev, "Symbol errors = %lld\n",
3388                       (long long)adapter->stats.symerrs);
3389         device_printf(dev, "Sequence errors = %lld\n",
3390                       (long long)adapter->stats.sec);
3391         device_printf(dev, "Defer count = %lld\n",
3392                       (long long)adapter->stats.dc);
3393
3394         device_printf(dev, "Missed Packets = %lld\n",
3395                       (long long)adapter->stats.mpc);
3396         device_printf(dev, "Receive No Buffers = %lld\n",
3397                       (long long)adapter->stats.rnbc);
3398         device_printf(dev, "Receive length errors = %lld\n",
3399                       (long long)adapter->stats.rlec);
3400         device_printf(dev, "Receive errors = %lld\n",
3401                       (long long)adapter->stats.rxerrc);
3402         device_printf(dev, "Crc errors = %lld\n",
3403                       (long long)adapter->stats.crcerrs);
3404         device_printf(dev, "Alignment errors = %lld\n",
3405                       (long long)adapter->stats.algnerrc);
3406         device_printf(dev, "Carrier extension errors = %lld\n",
3407                       (long long)adapter->stats.cexterr);
3408         device_printf(dev, "RX overruns = %lu\n", adapter->rx_overruns);
3409         device_printf(dev, "Watchdog timeouts = %lu\n",
3410                       adapter->watchdog_timeouts);
3411
3412         device_printf(dev, "XON Rcvd = %lld\n",
3413                       (long long)adapter->stats.xonrxc);
3414         device_printf(dev, "XON Xmtd = %lld\n",
3415                       (long long)adapter->stats.xontxc);
3416         device_printf(dev, "XOFF Rcvd = %lld\n",
3417                       (long long)adapter->stats.xoffrxc);
3418         device_printf(dev, "XOFF Xmtd = %lld\n",
3419                       (long long)adapter->stats.xofftxc);
3420
3421         device_printf(dev, "Good Packets Rcvd = %lld\n",
3422                       (long long)adapter->stats.gprc);
3423         device_printf(dev, "Good Packets Xmtd = %lld\n",
3424                       (long long)adapter->stats.gptc);
3425 }
3426
3427 static int
3428 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
3429 {
3430         int error;
3431         int result;
3432         struct adapter *adapter;
3433
3434         result = -1;
3435         error = sysctl_handle_int(oidp, &result, 0, req);
3436
3437         if (error || !req->newptr)
3438                 return(error);
3439
3440         if (result == 1) {
3441                 adapter = (struct adapter *)arg1;
3442                 em_print_debug_info(adapter);
3443         }
3444
3445         return(error);
3446 }
3447
3448 static int
3449 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
3450 {
3451         int error;
3452         int result;
3453         struct adapter *adapter;
3454
3455         result = -1;
3456         error = sysctl_handle_int(oidp, &result, 0, req);
3457
3458         if (error || !req->newptr)
3459                 return(error);
3460
3461         if (result == 1) {
3462                 adapter = (struct adapter *)arg1;
3463                 em_print_hw_stats(adapter);
3464         }
3465
3466         return(error);
3467 }
3468
3469 static int
3470 em_sysctl_int_delay(SYSCTL_HANDLER_ARGS)
3471 {
3472         struct em_int_delay_info *info;
3473         struct adapter *adapter;
3474         uint32_t regval;
3475         int error;
3476         int usecs;
3477         int ticks;
3478
3479         info = (struct em_int_delay_info *)arg1;
3480         adapter = info->adapter;
3481         usecs = info->value;
3482         error = sysctl_handle_int(oidp, &usecs, 0, req);
3483         if (error != 0 || req->newptr == NULL)
3484                 return(error);
3485         if (usecs < 0 || usecs > E1000_TICKS_TO_USECS(65535))
3486                 return(EINVAL);
3487         info->value = usecs;
3488         ticks = E1000_USECS_TO_TICKS(usecs);
3489
3490         lwkt_serialize_enter(adapter->interface_data.ac_if.if_serializer);
3491         regval = E1000_READ_OFFSET(&adapter->hw, info->offset);
3492         regval = (regval & ~0xffff) | (ticks & 0xffff);
3493         /* Handle a few special cases. */
3494         switch (info->offset) {
3495         case E1000_RDTR:
3496         case E1000_82542_RDTR:
3497                 regval |= E1000_RDT_FPDB;
3498                 break;
3499         case E1000_TIDV:
3500         case E1000_82542_TIDV:
3501                 if (ticks == 0) {
3502                         adapter->txd_cmd &= ~E1000_TXD_CMD_IDE;
3503                         /* Don't write 0 into the TIDV register. */
3504                         regval++;
3505                 } else
3506                         adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3507                 break;
3508         }
3509         E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval);
3510         lwkt_serialize_exit(adapter->interface_data.ac_if.if_serializer);
3511         return(0);
3512 }
3513
3514 static void
3515 em_add_int_delay_sysctl(struct adapter *adapter, const char *name,
3516                         const char *description, struct em_int_delay_info *info,
3517                         int offset, int value)
3518 {
3519         info->adapter = adapter;
3520         info->offset = offset;
3521         info->value = value;
3522         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3523                         SYSCTL_CHILDREN(adapter->sysctl_tree),
3524                         OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW,
3525                         info, 0, em_sysctl_int_delay, "I", description);
3526 }
3527
3528 static int
3529 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
3530 {
3531         struct adapter *adapter = (void *)arg1;
3532         int error;
3533         int throttle;
3534
3535         throttle = em_int_throttle_ceil;
3536         error = sysctl_handle_int(oidp, &throttle, 0, req);
3537         if (error || req->newptr == NULL)
3538                 return error;
3539         if (throttle < 0 || throttle > 1000000000 / 256)
3540                 return EINVAL;
3541         if (throttle) {
3542                 /*
3543                  * Set the interrupt throttling rate in 256ns increments,
3544                  * recalculate sysctl value assignment to get exact frequency.
3545                  */
3546                 throttle = 1000000000 / 256 / throttle;
3547                 lwkt_serialize_enter(adapter->interface_data.ac_if.if_serializer);
3548                 em_int_throttle_ceil = 1000000000 / 256 / throttle;
3549                 E1000_WRITE_REG(&adapter->hw, ITR, throttle);
3550                 lwkt_serialize_exit(adapter->interface_data.ac_if.if_serializer);
3551         } else {
3552                 lwkt_serialize_enter(adapter->interface_data.ac_if.if_serializer);
3553                 em_int_throttle_ceil = 0;
3554                 E1000_WRITE_REG(&adapter->hw, ITR, 0);
3555                 lwkt_serialize_exit(adapter->interface_data.ac_if.if_serializer);
3556         }
3557         device_printf(adapter->dev, "Interrupt moderation set to %d/sec\n",
3558                         em_int_throttle_ceil);
3559         return 0;
3560 }
3561