2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
43 #include "opt_atalk.h"
44 #include "opt_compat.h"
47 #include "opt_directio.h"
50 #include "opt_maxmem.h"
51 #include "opt_msgbuf.h"
52 #include "opt_perfmon.h"
54 #include "opt_userconfig.h"
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/sysproto.h>
60 #include <sys/signalvar.h>
61 #include <sys/kernel.h>
62 #include <sys/linker.h>
63 #include <sys/malloc.h>
67 #include <sys/reboot.h>
69 #include <sys/msgbuf.h>
70 #include <sys/sysent.h>
71 #include <sys/sysctl.h>
72 #include <sys/vmmeter.h>
74 #include <sys/upcall.h>
75 #include <sys/usched.h>
79 #include <vm/vm_param.h>
81 #include <vm/vm_kern.h>
82 #include <vm/vm_object.h>
83 #include <vm/vm_page.h>
84 #include <vm/vm_map.h>
85 #include <vm/vm_pager.h>
86 #include <vm/vm_extern.h>
88 #include <sys/thread2.h>
89 #include <sys/mplock2.h>
97 #include <machine/cpu.h>
98 #include <machine/clock.h>
99 #include <machine/specialreg.h>
100 #include <machine/bootinfo.h>
101 #include <machine/md_var.h>
102 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
103 #include <machine/globaldata.h> /* CPU_prvspace */
104 #include <machine/smp.h>
106 #include <machine/perfmon.h>
108 #include <machine/cputypes.h>
111 #include <bus/isa/isa_device.h>
113 #include <machine_base/isa/intr_machdep.h>
114 #include <bus/isa/rtc.h>
115 #include <machine/vm86.h>
116 #include <sys/random.h>
117 #include <sys/ptrace.h>
118 #include <machine/sigframe.h>
120 #include <sys/machintr.h>
122 #define PHYSMAP_ENTRIES 10
124 extern void init386(int first);
125 extern void dblfault_handler(void);
127 extern void printcpuinfo(void); /* XXX header file */
128 extern void finishidentcpu(void);
129 extern void panicifcpuunsupported(void);
130 extern void initializecpu(void);
132 static void cpu_startup(void *);
133 #ifndef CPU_DISABLE_SSE
134 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
135 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
136 #endif /* CPU_DISABLE_SSE */
138 extern void ffs_rawread_setup(void);
139 #endif /* DIRECTIO */
140 static void init_locks(void);
142 SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
144 int _udatasel, _ucodesel;
147 int64_t tsc_offsets[MAXCPU];
149 int64_t tsc_offsets[1];
152 #if defined(SWTCH_OPTIM_STATS)
153 extern int swtch_optim_stats;
154 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
155 CTLFLAG_RD, &swtch_optim_stats, 0, "");
156 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
157 CTLFLAG_RD, &tlb_flush_count, 0, "");
162 u_long ebda_addr = 0;
165 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
167 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
171 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
172 0, 0, sysctl_hw_physmem, "IU", "");
175 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
177 int error = sysctl_handle_int(oidp, 0,
178 ctob(physmem - vmstats.v_wire_count), req);
182 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
183 0, 0, sysctl_hw_usermem, "IU", "");
186 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
188 int error = sysctl_handle_int(oidp, 0,
189 i386_btop(avail_end - avail_start), req);
193 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
194 0, 0, sysctl_hw_availpages, "I", "");
199 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
200 vm_paddr_t dump_avail[PHYSMAP_ENTRIES*2+2];
203 static vm_offset_t buffer_sva, buffer_eva;
204 vm_offset_t clean_sva, clean_eva;
205 static vm_offset_t pager_sva, pager_eva;
206 static struct trapframe proc0_tf;
209 cpu_startup(void *dummy)
213 vm_offset_t firstaddr;
215 if (boothowto & RB_VERBOSE)
219 * Good {morning,afternoon,evening,night}.
221 kprintf("%s", version);
224 panicifcpuunsupported();
228 kprintf("real memory = %ju (%ju MB)\n",
230 (intmax_t)Realmem / 1024 / 1024);
232 * Display any holes after the first chunk of extended memory.
237 kprintf("Physical memory chunk(s):\n");
238 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
239 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
241 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
242 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
248 * Allocate space for system data structures.
249 * The first available kernel virtual address is in "v".
250 * As pages of kernel virtual memory are allocated, "v" is incremented.
251 * As pages of memory are allocated and cleared,
252 * "firstaddr" is incremented.
253 * An index into the kernel page table corresponding to the
254 * virtual memory address maintained in "v" is kept in "mapaddr".
258 * Make two passes. The first pass calculates how much memory is
259 * needed and allocates it. The second pass assigns virtual
260 * addresses to the various data structures.
264 v = (caddr_t)firstaddr;
266 #define valloc(name, type, num) \
267 (name) = (type *)v; v = (caddr_t)((name)+(num))
268 #define valloclim(name, type, num, lim) \
269 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
272 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
273 * For the first 64MB of ram nominally allocate sufficient buffers to
274 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
275 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
276 * the buffer cache we limit the eventual kva reservation to
279 * factor represents the 1/4 x ram conversion.
282 int factor = 4 * BKVASIZE / 1024;
283 int kbytes = physmem * (PAGE_SIZE / 1024);
287 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
289 nbuf += (kbytes - 65536) * 2 / (factor * 5);
290 if (maxbcache && nbuf > maxbcache / BKVASIZE)
291 nbuf = maxbcache / BKVASIZE;
295 * Do not allow the buffer_map to be more then 1/2 the size of the
298 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
299 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
300 kprintf("Warning: nbufs capped at %d\n", nbuf);
303 /* limit to 128 on i386 */
304 nswbuf = max(min(nbuf/4, 128), 16);
306 if (nswbuf < NSWBUF_MIN)
313 valloc(swbuf, struct buf, nswbuf);
314 valloc(buf, struct buf, nbuf);
317 * End of first pass, size has been calculated so allocate memory
319 if (firstaddr == 0) {
320 size = (vm_size_t)(v - firstaddr);
321 firstaddr = kmem_alloc(&kernel_map, round_page(size));
323 panic("startup: no room for tables");
328 * End of second pass, addresses have been assigned
330 if ((vm_size_t)(v - firstaddr) != size)
331 panic("startup: table size inconsistency");
333 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
334 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
335 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
337 buffer_map.system_map = 1;
338 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
339 (nswbuf*MAXPHYS) + pager_map_size);
340 pager_map.system_map = 1;
342 #if defined(USERCONFIG)
344 cninit(); /* the preferred console may have changed */
347 kprintf("avail memory = %ju (%ju MB)\n",
348 (intmax_t)ptoa(vmstats.v_free_count),
349 (intmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
352 * Set up buffers, so they can be used to read disk labels.
355 vm_pager_bufferinit();
359 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
361 mp_start(); /* fire up the APs and APICs */
368 * Send an interrupt to process.
370 * Stack is set up to allow sigcode stored
371 * at top to call routine, followed by kcall
372 * to sigreturn routine below. After sigreturn
373 * resets the signal mask, the stack, and the
374 * frame pointer, it returns to the user
378 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
380 struct lwp *lp = curthread->td_lwp;
381 struct proc *p = lp->lwp_proc;
382 struct trapframe *regs;
383 struct sigacts *psp = p->p_sigacts;
384 struct sigframe sf, *sfp;
387 regs = lp->lwp_md.md_regs;
388 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
390 /* save user context */
391 bzero(&sf, sizeof(struct sigframe));
392 sf.sf_uc.uc_sigmask = *mask;
393 sf.sf_uc.uc_stack = lp->lwp_sigstk;
394 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
395 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
397 /* make the size of the saved context visible to userland */
398 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
400 /* save mailbox pending state for syscall interlock semantics */
401 if (p->p_flag & P_MAILBOX)
402 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
404 /* Allocate and validate space for the signal handler context. */
405 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
406 SIGISMEMBER(psp->ps_sigonstack, sig)) {
407 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
408 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
409 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
411 sfp = (struct sigframe *)regs->tf_esp - 1;
414 /* Translate the signal is appropriate */
415 if (p->p_sysent->sv_sigtbl) {
416 if (sig <= p->p_sysent->sv_sigsize)
417 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
420 /* Build the argument list for the signal handler. */
422 sf.sf_ucontext = (register_t)&sfp->sf_uc;
423 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
424 /* Signal handler installed with SA_SIGINFO. */
425 sf.sf_siginfo = (register_t)&sfp->sf_si;
426 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
428 /* fill siginfo structure */
429 sf.sf_si.si_signo = sig;
430 sf.sf_si.si_code = code;
431 sf.sf_si.si_addr = (void*)regs->tf_err;
434 /* Old FreeBSD-style arguments. */
435 sf.sf_siginfo = code;
436 sf.sf_addr = regs->tf_err;
437 sf.sf_ahu.sf_handler = catcher;
441 * If we're a vm86 process, we want to save the segment registers.
442 * We also change eflags to be our emulated eflags, not the actual
445 if (regs->tf_eflags & PSL_VM) {
446 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
447 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
449 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
450 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
451 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
452 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
454 if (vm86->vm86_has_vme == 0)
455 sf.sf_uc.uc_mcontext.mc_eflags =
456 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
457 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
460 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
461 * syscalls made by the signal handler. This just avoids
462 * wasting time for our lazy fixup of such faults. PSL_NT
463 * does nothing in vm86 mode, but vm86 programs can set it
464 * almost legitimately in probes for old cpu types.
466 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
470 * Save the FPU state and reinit the FP unit
472 npxpush(&sf.sf_uc.uc_mcontext);
475 * Copy the sigframe out to the user's stack.
477 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
479 * Something is wrong with the stack pointer.
480 * ...Kill the process.
485 regs->tf_esp = (int)sfp;
486 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
489 * i386 abi specifies that the direction flag must be cleared
492 regs->tf_eflags &= ~(PSL_T|PSL_D);
494 regs->tf_cs = _ucodesel;
495 regs->tf_ds = _udatasel;
496 regs->tf_es = _udatasel;
499 * Allow the signal handler to inherit %fs in addition to %gs as
500 * the userland program might be using both.
502 * However, if a T_PROTFLT occured the segment registers could be
503 * totally broken. They must be reset in order to be able to
504 * return to userland.
506 if (regs->tf_trapno == T_PROTFLT) {
507 regs->tf_fs = _udatasel;
508 regs->tf_gs = _udatasel;
510 regs->tf_ss = _udatasel;
514 * Sanitize the trapframe for a virtual kernel passing control to a custom
515 * VM context. Remove any items that would otherwise create a privilage
518 * XXX at the moment we allow userland to set the resume flag. Is this a
522 cpu_sanitize_frame(struct trapframe *frame)
524 frame->tf_cs = _ucodesel;
525 frame->tf_ds = _udatasel;
526 frame->tf_es = _udatasel; /* XXX allow userland this one too? */
528 frame->tf_fs = _udatasel;
529 frame->tf_gs = _udatasel;
531 frame->tf_ss = _udatasel;
532 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
533 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
538 cpu_sanitize_tls(struct savetls *tls)
540 struct segment_descriptor *desc;
543 for (i = 0; i < NGTLS; ++i) {
545 if (desc->sd_dpl == 0 && desc->sd_type == 0)
547 if (desc->sd_def32 == 0)
549 if (desc->sd_type != SDT_MEMRWA)
551 if (desc->sd_dpl != SEL_UPL)
553 if (desc->sd_xx != 0 || desc->sd_p != 1)
560 * sigreturn(ucontext_t *sigcntxp)
562 * System call to cleanup state after a signal
563 * has been taken. Reset signal mask and
564 * stack state from context left by sendsig (above).
565 * Return to previous pc and psl as specified by
566 * context left by sendsig. Check carefully to
567 * make sure that the user has not modified the
568 * state to gain improper privileges.
572 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
573 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
576 sys_sigreturn(struct sigreturn_args *uap)
578 struct lwp *lp = curthread->td_lwp;
579 struct proc *p = lp->lwp_proc;
580 struct trapframe *regs;
588 * We have to copy the information into kernel space so userland
589 * can't modify it while we are sniffing it.
591 regs = lp->lwp_md.md_regs;
592 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
596 eflags = ucp->uc_mcontext.mc_eflags;
598 if (eflags & PSL_VM) {
599 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
600 struct vm86_kernel *vm86;
603 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
604 * set up the vm86 area, and we can't enter vm86 mode.
606 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
608 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
609 if (vm86->vm86_inited == 0)
612 /* go back to user mode if both flags are set */
613 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
614 trapsignal(lp, SIGBUS, 0);
616 if (vm86->vm86_has_vme) {
617 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
618 (eflags & VME_USERCHANGE) | PSL_VM;
620 vm86->vm86_eflags = eflags; /* save VIF, VIP */
621 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
622 (eflags & VM_USERCHANGE) | PSL_VM;
624 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
625 tf->tf_eflags = eflags;
626 tf->tf_vm86_ds = tf->tf_ds;
627 tf->tf_vm86_es = tf->tf_es;
628 tf->tf_vm86_fs = tf->tf_fs;
629 tf->tf_vm86_gs = tf->tf_gs;
630 tf->tf_ds = _udatasel;
631 tf->tf_es = _udatasel;
633 tf->tf_fs = _udatasel;
634 tf->tf_gs = _udatasel;
638 * Don't allow users to change privileged or reserved flags.
641 * XXX do allow users to change the privileged flag PSL_RF.
642 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
643 * should sometimes set it there too. tf_eflags is kept in
644 * the signal context during signal handling and there is no
645 * other place to remember it, so the PSL_RF bit may be
646 * corrupted by the signal handler without us knowing.
647 * Corruption of the PSL_RF bit at worst causes one more or
648 * one less debugger trap, so allowing it is fairly harmless.
650 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
651 kprintf("sigreturn: eflags = 0x%x\n", eflags);
656 * Don't allow users to load a valid privileged %cs. Let the
657 * hardware check for invalid selectors, excess privilege in
658 * other selectors, invalid %eip's and invalid %esp's.
660 cs = ucp->uc_mcontext.mc_cs;
661 if (!CS_SECURE(cs)) {
662 kprintf("sigreturn: cs = 0x%x\n", cs);
663 trapsignal(lp, SIGBUS, T_PROTFLT);
666 bcopy(&ucp->uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
670 * Restore the FPU state from the frame
673 npxpop(&ucp->uc_mcontext);
676 * Merge saved signal mailbox pending flag to maintain interlock
677 * semantics against system calls.
679 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
680 p->p_flag |= P_MAILBOX;
682 if (ucp->uc_mcontext.mc_onstack & 1)
683 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
685 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
687 lp->lwp_sigmask = ucp->uc_sigmask;
688 SIG_CANTMASK(lp->lwp_sigmask);
694 * Stack frame on entry to function. %eax will contain the function vector,
695 * %ecx will contain the function data. flags, ecx, and eax will have
696 * already been pushed on the stack.
707 sendupcall(struct vmupcall *vu, int morepending)
709 struct lwp *lp = curthread->td_lwp;
710 struct trapframe *regs;
711 struct upcall upcall;
712 struct upc_frame upc_frame;
716 * If we are a virtual kernel running an emulated user process
717 * context, switch back to the virtual kernel context before
718 * trying to post the signal.
720 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
721 lp->lwp_md.md_regs->tf_trapno = 0;
722 vkernel_trap(lp, lp->lwp_md.md_regs);
726 * Get the upcall data structure
728 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
729 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
732 kprintf("bad upcall address\n");
737 * If the data structure is already marked pending or has a critical
738 * section count, mark the data structure as pending and return
739 * without doing an upcall. vu_pending is left set.
741 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
742 if (upcall.upc_pending < vu->vu_pending) {
743 upcall.upc_pending = vu->vu_pending;
744 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
745 sizeof(upcall.upc_pending));
751 * We can run this upcall now, clear vu_pending.
753 * Bump our critical section count and set or clear the
754 * user pending flag depending on whether more upcalls are
755 * pending. The user will be responsible for calling
756 * upc_dispatch(-1) to process remaining upcalls.
759 upcall.upc_pending = morepending;
761 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
762 sizeof(upcall.upc_pending));
763 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
767 * Construct a stack frame and issue the upcall
769 regs = lp->lwp_md.md_regs;
770 upc_frame.eax = regs->tf_eax;
771 upc_frame.ecx = regs->tf_ecx;
772 upc_frame.edx = regs->tf_edx;
773 upc_frame.flags = regs->tf_eflags;
774 upc_frame.oldip = regs->tf_eip;
775 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
776 sizeof(upc_frame)) != 0) {
777 kprintf("bad stack on upcall\n");
779 regs->tf_eax = (register_t)vu->vu_func;
780 regs->tf_ecx = (register_t)vu->vu_data;
781 regs->tf_edx = (register_t)lp->lwp_upcall;
782 regs->tf_eip = (register_t)vu->vu_ctx;
783 regs->tf_esp -= sizeof(upc_frame);
788 * fetchupcall occurs in the context of a system call, which means that
789 * we have to return EJUSTRETURN in order to prevent eax and edx from
790 * being overwritten by the syscall return value.
792 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
793 * and the function pointer in %eax.
796 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
798 struct upc_frame upc_frame;
799 struct lwp *lp = curthread->td_lwp;
800 struct trapframe *regs;
802 struct upcall upcall;
805 regs = lp->lwp_md.md_regs;
807 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
811 * This jumps us to the next ready context.
814 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
817 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
820 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
821 regs->tf_eax = (register_t)vu->vu_func;
822 regs->tf_ecx = (register_t)vu->vu_data;
823 regs->tf_edx = (register_t)lp->lwp_upcall;
824 regs->tf_eip = (register_t)vu->vu_ctx;
825 regs->tf_esp = (register_t)rsp;
828 * This returns us to the originally interrupted code.
830 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
831 regs->tf_eax = upc_frame.eax;
832 regs->tf_ecx = upc_frame.ecx;
833 regs->tf_edx = upc_frame.edx;
834 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
835 (upc_frame.flags & PSL_USERCHANGE);
836 regs->tf_eip = upc_frame.oldip;
837 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
846 * Machine dependent boot() routine
848 * I haven't seen anything to put here yet
849 * Possibly some stuff might be grafted back here from boot()
857 * Shutdown the CPU as much as possible
863 __asm__ __volatile("hlt");
867 * cpu_idle() represents the idle LWKT. You cannot return from this function
868 * (unless you want to blow things up!). Instead we look for runnable threads
869 * and loop or halt as appropriate. Giant is not held on entry to the thread.
871 * The main loop is entered with a critical section held, we must release
872 * the critical section before doing anything else. lwkt_switch() will
873 * check for pending interrupts due to entering and exiting its own
876 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up.
877 * However, there are cases where the idlethread will be entered with
878 * the possibility that no IPI will occur and in such cases
879 * lwkt_switch() sets RQF_WAKEUP. We usually check
880 * RQF_IDLECHECK_WK_MASK.
882 * NOTE: cpu_idle_hlt again defaults to 2 (use ACPI sleep states). Set to
883 * 1 to just use hlt and for debugging purposes.
885 static int cpu_idle_hlt = 2;
886 static int cpu_idle_hltcnt;
887 static int cpu_idle_spincnt;
888 static u_int cpu_idle_repeat = 4;
889 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
890 &cpu_idle_hlt, 0, "Idle loop HLT enable");
891 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
892 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
893 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
894 &cpu_idle_spincnt, 0, "Idle loop entry spins");
895 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_repeat, CTLFLAG_RW,
896 &cpu_idle_repeat, 0, "Idle entries before acpi hlt");
899 cpu_idle_default_hook(void)
902 * We must guarentee that hlt is exactly the instruction
905 __asm __volatile("sti; hlt");
908 /* Other subsystems (e.g., ACPI) can hook this later. */
909 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
914 globaldata_t gd = mycpu;
915 struct thread *td = gd->gd_curthread;
920 KKASSERT(td->td_critcount == 0);
923 * See if there are any LWKTs ready to go.
928 * When halting inside a cli we must check for reqflags
929 * races, particularly [re]schedule requests. Running
930 * splz() does the job.
933 * 0 Never halt, just spin
935 * 1 Always use HLT (or MONITOR/MWAIT if avail).
936 * This typically eats more power than the
939 * 2 Use HLT/MONITOR/MWAIT up to a point and then
940 * use the ACPI halt (default). This is a hybrid
941 * approach. See machdep.cpu_idle_repeat.
943 * 3 Always use the ACPI halt. This typically
944 * eats the least amount of power but the cpu
945 * will be slow waking up. Slows down e.g.
946 * compiles and other pipe/event oriented stuff.
949 * NOTE: Interrupts are enabled and we are not in a critical
952 * NOTE: Preemptions do not reset gd_idle_repeat. Also we
953 * don't bother capping gd_idle_repeat, it is ok if
956 ++gd->gd_idle_repeat;
957 reqflags = gd->gd_reqflags;
958 quick = (cpu_idle_hlt == 1) ||
960 gd->gd_idle_repeat < cpu_idle_repeat);
962 if (quick && (cpu_mi_feature & CPU_MI_MONITOR) &&
963 (reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
964 cpu_mmw_pause_int(&gd->gd_reqflags, reqflags);
966 } else if (cpu_idle_hlt) {
967 __asm __volatile("cli");
969 if ((gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
971 cpu_idle_default_hook();
975 __asm __volatile("sti");
979 __asm __volatile("sti");
988 * This routine is called if a spinlock has been held through the
989 * exponential backoff period and is seriously contested. On a real cpu
993 cpu_spinlock_contested(void)
1001 * Clear registers on exec
1004 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1006 struct thread *td = curthread;
1007 struct lwp *lp = td->td_lwp;
1008 struct pcb *pcb = td->td_pcb;
1009 struct trapframe *regs = lp->lwp_md.md_regs;
1011 /* was i386_user_cleanup() in NetBSD */
1014 bzero((char *)regs, sizeof(struct trapframe));
1015 regs->tf_eip = entry;
1016 regs->tf_esp = stack;
1017 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1018 regs->tf_ss = _udatasel;
1019 regs->tf_ds = _udatasel;
1020 regs->tf_es = _udatasel;
1021 regs->tf_fs = _udatasel;
1022 regs->tf_gs = _udatasel;
1023 regs->tf_cs = _ucodesel;
1025 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1026 regs->tf_ebx = ps_strings;
1029 * Reset the hardware debug registers if they were in use.
1030 * They won't have any meaning for the newly exec'd process.
1032 if (pcb->pcb_flags & PCB_DBREGS) {
1039 if (pcb == td->td_pcb) {
1041 * Clear the debug registers on the running
1042 * CPU, otherwise they will end up affecting
1043 * the next process we switch to.
1047 pcb->pcb_flags &= ~PCB_DBREGS;
1051 * Initialize the math emulator (if any) for the current process.
1052 * Actually, just clear the bit that says that the emulator has
1053 * been initialized. Initialization is delayed until the process
1054 * traps to the emulator (if it is done at all) mainly because
1055 * emulators don't provide an entry point for initialization.
1057 pcb->pcb_flags &= ~FP_SOFTFP;
1060 * note: do not set CR0_TS here. npxinit() must do it after clearing
1061 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
1065 load_cr0(rcr0() | CR0_MP);
1068 /* Initialize the npx (if any) for the current process. */
1069 npxinit(__INITIAL_NPXCW__);
1074 * note: linux emulator needs edx to be 0x0 on entry, which is
1075 * handled in execve simply by setting the 64 bit syscall
1076 * return value to 0.
1086 cr0 |= CR0_NE; /* Done by npxinit() */
1087 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1088 cr0 |= CR0_WP | CR0_AM;
1094 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1097 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1099 if (!error && req->newptr)
1104 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1105 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1107 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1108 CTLFLAG_RW, &disable_rtc_set, 0, "");
1110 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1111 CTLFLAG_RD, &bootinfo, bootinfo, "");
1113 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1114 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1116 extern u_long bootdev; /* not a cdev_t - encoding is different */
1117 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1118 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1121 * Initialize 386 and configure to run kernel
1125 * Initialize segments & interrupt table
1129 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1130 static struct gate_descriptor idt0[NIDT];
1131 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1132 union descriptor ldt[NLDT]; /* local descriptor table */
1134 /* table descriptors - used to load tables by cpu */
1135 struct region_descriptor r_gdt, r_idt;
1137 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1138 extern int has_f00f_bug;
1141 static struct i386tss dblfault_tss;
1142 static char dblfault_stack[PAGE_SIZE];
1144 extern struct user *proc0paddr;
1147 /* software prototypes -- in more palatable form */
1148 struct soft_segment_descriptor gdt_segs[] = {
1149 /* GNULL_SEL 0 Null Descriptor */
1150 { 0x0, /* segment base address */
1152 0, /* segment type */
1153 0, /* segment descriptor priority level */
1154 0, /* segment descriptor present */
1156 0, /* default 32 vs 16 bit size */
1157 0 /* limit granularity (byte/page units)*/ },
1158 /* GCODE_SEL 1 Code Descriptor for kernel */
1159 { 0x0, /* segment base address */
1160 0xfffff, /* length - all address space */
1161 SDT_MEMERA, /* segment type */
1162 0, /* segment descriptor priority level */
1163 1, /* segment descriptor present */
1165 1, /* default 32 vs 16 bit size */
1166 1 /* limit granularity (byte/page units)*/ },
1167 /* GDATA_SEL 2 Data Descriptor for kernel */
1168 { 0x0, /* segment base address */
1169 0xfffff, /* length - all address space */
1170 SDT_MEMRWA, /* segment type */
1171 0, /* segment descriptor priority level */
1172 1, /* segment descriptor present */
1174 1, /* default 32 vs 16 bit size */
1175 1 /* limit granularity (byte/page units)*/ },
1176 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1177 { 0x0, /* segment base address */
1178 0xfffff, /* length - all address space */
1179 SDT_MEMRWA, /* segment type */
1180 0, /* segment descriptor priority level */
1181 1, /* segment descriptor present */
1183 1, /* default 32 vs 16 bit size */
1184 1 /* limit granularity (byte/page units)*/ },
1185 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1187 0x0, /* segment base address */
1188 sizeof(struct i386tss)-1,/* length - all address space */
1189 SDT_SYS386TSS, /* segment type */
1190 0, /* segment descriptor priority level */
1191 1, /* segment descriptor present */
1193 0, /* unused - default 32 vs 16 bit size */
1194 0 /* limit granularity (byte/page units)*/ },
1195 /* GLDT_SEL 5 LDT Descriptor */
1196 { (int) ldt, /* segment base address */
1197 sizeof(ldt)-1, /* length - all address space */
1198 SDT_SYSLDT, /* segment type */
1199 SEL_UPL, /* segment descriptor priority level */
1200 1, /* segment descriptor present */
1202 0, /* unused - default 32 vs 16 bit size */
1203 0 /* limit granularity (byte/page units)*/ },
1204 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1205 { (int) ldt, /* segment base address */
1206 (512 * sizeof(union descriptor)-1), /* length */
1207 SDT_SYSLDT, /* segment type */
1208 0, /* segment descriptor priority level */
1209 1, /* segment descriptor present */
1211 0, /* unused - default 32 vs 16 bit size */
1212 0 /* limit granularity (byte/page units)*/ },
1213 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1214 { 0x0, /* segment base address */
1215 0x0, /* length - all address space */
1216 0, /* segment type */
1217 0, /* segment descriptor priority level */
1218 0, /* segment descriptor present */
1220 0, /* default 32 vs 16 bit size */
1221 0 /* limit granularity (byte/page units)*/ },
1222 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1223 { 0x400, /* segment base address */
1224 0xfffff, /* length */
1225 SDT_MEMRWA, /* segment type */
1226 0, /* segment descriptor priority level */
1227 1, /* segment descriptor present */
1229 1, /* default 32 vs 16 bit size */
1230 1 /* limit granularity (byte/page units)*/ },
1231 /* GPANIC_SEL 9 Panic Tss Descriptor */
1232 { (int) &dblfault_tss, /* segment base address */
1233 sizeof(struct i386tss)-1,/* length - all address space */
1234 SDT_SYS386TSS, /* segment type */
1235 0, /* segment descriptor priority level */
1236 1, /* segment descriptor present */
1238 0, /* unused - default 32 vs 16 bit size */
1239 0 /* limit granularity (byte/page units)*/ },
1240 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1241 { 0, /* segment base address (overwritten) */
1242 0xfffff, /* length */
1243 SDT_MEMERA, /* segment type */
1244 0, /* segment descriptor priority level */
1245 1, /* segment descriptor present */
1247 0, /* default 32 vs 16 bit size */
1248 1 /* limit granularity (byte/page units)*/ },
1249 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1250 { 0, /* segment base address (overwritten) */
1251 0xfffff, /* length */
1252 SDT_MEMERA, /* segment type */
1253 0, /* segment descriptor priority level */
1254 1, /* segment descriptor present */
1256 0, /* default 32 vs 16 bit size */
1257 1 /* limit granularity (byte/page units)*/ },
1258 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1259 { 0, /* segment base address (overwritten) */
1260 0xfffff, /* length */
1261 SDT_MEMRWA, /* segment type */
1262 0, /* segment descriptor priority level */
1263 1, /* segment descriptor present */
1265 1, /* default 32 vs 16 bit size */
1266 1 /* limit granularity (byte/page units)*/ },
1267 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1268 { 0, /* segment base address (overwritten) */
1269 0xfffff, /* length */
1270 SDT_MEMRWA, /* segment type */
1271 0, /* segment descriptor priority level */
1272 1, /* segment descriptor present */
1274 0, /* default 32 vs 16 bit size */
1275 1 /* limit granularity (byte/page units)*/ },
1276 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1277 { 0, /* segment base address (overwritten) */
1278 0xfffff, /* length */
1279 SDT_MEMRWA, /* segment type */
1280 0, /* segment descriptor priority level */
1281 1, /* segment descriptor present */
1283 0, /* default 32 vs 16 bit size */
1284 1 /* limit granularity (byte/page units)*/ },
1285 /* GTLS_START 15 TLS */
1286 { 0x0, /* segment base address */
1288 0, /* segment type */
1289 0, /* segment descriptor priority level */
1290 0, /* segment descriptor present */
1292 0, /* default 32 vs 16 bit size */
1293 0 /* limit granularity (byte/page units)*/ },
1294 /* GTLS_START+1 16 TLS */
1295 { 0x0, /* segment base address */
1297 0, /* segment type */
1298 0, /* segment descriptor priority level */
1299 0, /* segment descriptor present */
1301 0, /* default 32 vs 16 bit size */
1302 0 /* limit granularity (byte/page units)*/ },
1303 /* GTLS_END 17 TLS */
1304 { 0x0, /* segment base address */
1306 0, /* segment type */
1307 0, /* segment descriptor priority level */
1308 0, /* segment descriptor present */
1310 0, /* default 32 vs 16 bit size */
1311 0 /* limit granularity (byte/page units)*/ },
1314 static struct soft_segment_descriptor ldt_segs[] = {
1315 /* Null Descriptor - overwritten by call gate */
1316 { 0x0, /* segment base address */
1317 0x0, /* length - all address space */
1318 0, /* segment type */
1319 0, /* segment descriptor priority level */
1320 0, /* segment descriptor present */
1322 0, /* default 32 vs 16 bit size */
1323 0 /* limit granularity (byte/page units)*/ },
1324 /* Null Descriptor - overwritten by call gate */
1325 { 0x0, /* segment base address */
1326 0x0, /* length - all address space */
1327 0, /* segment type */
1328 0, /* segment descriptor priority level */
1329 0, /* segment descriptor present */
1331 0, /* default 32 vs 16 bit size */
1332 0 /* limit granularity (byte/page units)*/ },
1333 /* Null Descriptor - overwritten by call gate */
1334 { 0x0, /* segment base address */
1335 0x0, /* length - all address space */
1336 0, /* segment type */
1337 0, /* segment descriptor priority level */
1338 0, /* segment descriptor present */
1340 0, /* default 32 vs 16 bit size */
1341 0 /* limit granularity (byte/page units)*/ },
1342 /* Code Descriptor for user */
1343 { 0x0, /* segment base address */
1344 0xfffff, /* length - all address space */
1345 SDT_MEMERA, /* segment type */
1346 SEL_UPL, /* segment descriptor priority level */
1347 1, /* segment descriptor present */
1349 1, /* default 32 vs 16 bit size */
1350 1 /* limit granularity (byte/page units)*/ },
1351 /* Null Descriptor - overwritten by call gate */
1352 { 0x0, /* segment base address */
1353 0x0, /* length - all address space */
1354 0, /* segment type */
1355 0, /* segment descriptor priority level */
1356 0, /* segment descriptor present */
1358 0, /* default 32 vs 16 bit size */
1359 0 /* limit granularity (byte/page units)*/ },
1360 /* Data Descriptor for user */
1361 { 0x0, /* segment base address */
1362 0xfffff, /* length - all address space */
1363 SDT_MEMRWA, /* segment type */
1364 SEL_UPL, /* segment descriptor priority level */
1365 1, /* segment descriptor present */
1367 1, /* default 32 vs 16 bit size */
1368 1 /* limit granularity (byte/page units)*/ },
1372 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1374 struct gate_descriptor *ip;
1377 ip->gd_looffset = (int)func;
1378 ip->gd_selector = selec;
1384 ip->gd_hioffset = ((int)func)>>16 ;
1387 #define IDTVEC(name) __CONCAT(X,name)
1390 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1391 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1392 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1393 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1394 IDTVEC(xmm), IDTVEC(syscall),
1397 IDTVEC(int0x80_syscall);
1399 #ifdef DEBUG_INTERRUPTS
1400 extern inthand_t *Xrsvdary[256];
1404 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1406 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1407 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1408 ssd->ssd_type = sd->sd_type;
1409 ssd->ssd_dpl = sd->sd_dpl;
1410 ssd->ssd_p = sd->sd_p;
1411 ssd->ssd_def32 = sd->sd_def32;
1412 ssd->ssd_gran = sd->sd_gran;
1416 * Populate the (physmap) array with base/bound pairs describing the
1417 * available physical memory in the system, then test this memory and
1418 * build the phys_avail array describing the actually-available memory.
1420 * If we cannot accurately determine the physical memory map, then use
1421 * value from the 0xE801 call, and failing that, the RTC.
1423 * Total memory size may be set by the kernel environment variable
1424 * hw.physmem or the compile-time define MAXMEM.
1427 getmemsize(int first)
1429 int i, physmap_idx, pa_indx, da_indx;
1431 u_int basemem, extmem;
1432 struct vm86frame vmf;
1433 struct vm86context vmc;
1435 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1443 quad_t dcons_addr, dcons_size;
1445 bzero(&vmf, sizeof(struct vm86frame));
1446 bzero(physmap, sizeof(physmap));
1450 * Some newer BIOSes has broken INT 12H implementation which cause
1451 * kernel panic immediately. In this case, we need to scan SMAP
1452 * with INT 15:E820 first, then determine base memory size.
1455 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1456 if (hasbrokenint12) {
1461 * Perform "base memory" related probes & setup. If we get a crazy
1462 * value give the bios some scribble space just in case.
1464 vm86_intcall(0x12, &vmf);
1465 basemem = vmf.vmf_ax;
1466 if (basemem > 640) {
1467 kprintf("Preposterous BIOS basemem of %uK, "
1468 "truncating to < 640K\n", basemem);
1473 * XXX if biosbasemem is now < 640, there is a `hole'
1474 * between the end of base memory and the start of
1475 * ISA memory. The hole may be empty or it may
1476 * contain BIOS code or data. Map it read/write so
1477 * that the BIOS can write to it. (Memory from 0 to
1478 * the physical end of the kernel is mapped read-only
1479 * to begin with and then parts of it are remapped.
1480 * The parts that aren't remapped form holes that
1481 * remain read-only and are unused by the kernel.
1482 * The base memory area is below the physical end of
1483 * the kernel and right now forms a read-only hole.
1484 * The part of it from PAGE_SIZE to
1485 * (trunc_page(biosbasemem * 1024) - 1) will be
1486 * remapped and used by the kernel later.)
1488 * This code is similar to the code used in
1489 * pmap_mapdev, but since no memory needs to be
1490 * allocated we simply change the mapping.
1492 for (pa = trunc_page(basemem * 1024);
1493 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1494 pte = vtopte(pa + KERNBASE);
1495 *pte = pa | PG_RW | PG_V;
1499 * if basemem != 640, map pages r/w into vm86 page table so
1500 * that the bios can scribble on it.
1503 for (i = basemem / 4; i < 160; i++)
1504 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1508 * map page 1 R/W into the kernel page table so we can use it
1509 * as a buffer. The kernel will unmap this page later.
1511 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1512 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1515 * get memory map with INT 15:E820
1517 #define SMAPSIZ sizeof(*smap)
1518 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1521 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1522 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1527 vmf.vmf_eax = 0xE820;
1528 vmf.vmf_edx = SMAP_SIG;
1529 vmf.vmf_ecx = SMAPSIZ;
1530 i = vm86_datacall(0x15, &vmf, &vmc);
1531 if (i || vmf.vmf_eax != SMAP_SIG)
1533 if (boothowto & RB_VERBOSE)
1534 kprintf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1536 *(u_int32_t *)((char *)&smap->base + 4),
1537 (u_int32_t)smap->base,
1538 *(u_int32_t *)((char *)&smap->length + 4),
1539 (u_int32_t)smap->length);
1541 if (smap->type != 0x01)
1544 if (smap->length == 0)
1547 Realmem += smap->length;
1549 if (smap->base >= 0xffffffffLLU) {
1550 kprintf("%ju MB of memory above 4GB ignored\n",
1551 (uintmax_t)(smap->length / 1024 / 1024));
1555 for (i = 0; i <= physmap_idx; i += 2) {
1556 if (smap->base < physmap[i + 1]) {
1557 if (boothowto & RB_VERBOSE) {
1558 kprintf("Overlapping or non-montonic "
1559 "memory region, ignoring "
1562 Realmem -= smap->length;
1567 if (smap->base == physmap[physmap_idx + 1]) {
1568 physmap[physmap_idx + 1] += smap->length;
1573 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1574 kprintf("Too many segments in the physical "
1575 "address map, giving up\n");
1578 physmap[physmap_idx] = smap->base;
1579 physmap[physmap_idx + 1] = smap->base + smap->length;
1581 ; /* fix GCC3.x warning */
1582 } while (vmf.vmf_ebx != 0);
1585 * Perform "base memory" related probes & setup based on SMAP
1588 for (i = 0; i <= physmap_idx; i += 2) {
1589 if (physmap[i] == 0x00000000) {
1590 basemem = physmap[i + 1] / 1024;
1599 if (basemem > 640) {
1600 kprintf("Preposterous BIOS basemem of %uK, "
1601 "truncating to 640K\n", basemem);
1605 for (pa = trunc_page(basemem * 1024);
1606 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1607 pte = vtopte(pa + KERNBASE);
1608 *pte = pa | PG_RW | PG_V;
1612 for (i = basemem / 4; i < 160; i++)
1613 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1616 if (physmap[1] != 0)
1620 * If we failed above, try memory map with INT 15:E801
1622 vmf.vmf_ax = 0xE801;
1623 if (vm86_intcall(0x15, &vmf) == 0) {
1624 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1628 vm86_intcall(0x15, &vmf);
1629 extmem = vmf.vmf_ax;
1632 * Prefer the RTC value for extended memory.
1634 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1639 * Special hack for chipsets that still remap the 384k hole when
1640 * there's 16MB of memory - this really confuses people that
1641 * are trying to use bus mastering ISA controllers with the
1642 * "16MB limit"; they only have 16MB, but the remapping puts
1643 * them beyond the limit.
1645 * If extended memory is between 15-16MB (16-17MB phys address range),
1648 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1652 physmap[1] = basemem * 1024;
1654 physmap[physmap_idx] = 0x100000;
1655 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1659 * Now, physmap contains a map of physical memory.
1663 /* make hole for AP bootstrap code YYY */
1664 physmap[1] = mp_bootaddress(physmap[1]);
1666 /* Save EBDA address, if any */
1667 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1672 * Maxmem isn't the "maximum memory", it's one larger than the
1673 * highest page of the physical address space. It should be
1674 * called something like "Maxphyspage". We may adjust this
1675 * based on ``hw.physmem'' and the results of the memory test.
1677 Maxmem = atop(physmap[physmap_idx + 1]);
1680 Maxmem = MAXMEM / 4;
1683 if (kgetenv_quad("hw.physmem", &maxmem))
1684 Maxmem = atop(maxmem);
1686 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1687 (boothowto & RB_VERBOSE))
1688 kprintf("Physical memory use set to %lluK\n", Maxmem * 4);
1691 * If Maxmem has been increased beyond what the system has detected,
1692 * extend the last memory segment to the new limit.
1694 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1695 physmap[physmap_idx + 1] = ptoa(Maxmem);
1697 /* call pmap initialization to make new kernel address space */
1698 pmap_bootstrap(first, 0);
1701 * Size up each available chunk of physical memory.
1703 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1706 phys_avail[pa_indx++] = physmap[0];
1707 phys_avail[pa_indx] = physmap[0];
1708 dump_avail[da_indx] = physmap[0];
1713 * Get dcons buffer address
1715 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1716 kgetenv_quad("dcons.size", &dcons_size) == 0)
1720 * physmap is in bytes, so when converting to page boundaries,
1721 * round up the start address and round down the end address.
1723 for (i = 0; i <= physmap_idx; i += 2) {
1727 if (physmap[i + 1] < end)
1728 end = trunc_page(physmap[i + 1]);
1729 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1730 int tmp, page_bad, full;
1734 int *ptr = (int *)CADDR1;
1739 * block out kernel memory as not available.
1741 if (pa >= 0x100000 && pa < first)
1745 * block out dcons buffer
1748 && pa >= trunc_page(dcons_addr)
1749 && pa < dcons_addr + dcons_size)
1755 * map page into kernel: valid, read/write,non-cacheable
1757 *pte = pa | PG_V | PG_RW | PG_N;
1762 * Test for alternating 1's and 0's
1764 *(volatile int *)ptr = 0xaaaaaaaa;
1765 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1769 * Test for alternating 0's and 1's
1771 *(volatile int *)ptr = 0x55555555;
1772 if (*(volatile int *)ptr != 0x55555555) {
1778 *(volatile int *)ptr = 0xffffffff;
1779 if (*(volatile int *)ptr != 0xffffffff) {
1785 *(volatile int *)ptr = 0x0;
1786 if (*(volatile int *)ptr != 0x0) {
1790 * Restore original value.
1795 * Adjust array of valid/good pages.
1797 if (page_bad == TRUE) {
1801 * If this good page is a continuation of the
1802 * previous set of good pages, then just increase
1803 * the end pointer. Otherwise start a new chunk.
1804 * Note that "end" points one higher than end,
1805 * making the range >= start and < end.
1806 * If we're also doing a speculative memory
1807 * test and we at or past the end, bump up Maxmem
1808 * so that we keep going. The first bad page
1809 * will terminate the loop.
1811 if (phys_avail[pa_indx] == pa) {
1812 phys_avail[pa_indx] += PAGE_SIZE;
1815 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1816 kprintf("Too many holes in the physical address space, giving up\n");
1821 phys_avail[pa_indx++] = pa; /* start */
1822 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1826 if (dump_avail[da_indx] == pa) {
1827 dump_avail[da_indx] += PAGE_SIZE;
1830 if (da_indx >= PHYSMAP_ENTRIES*2) {
1834 dump_avail[da_indx++] = pa; /* start */
1835 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1848 * The last chunk must contain at least one page plus the message
1849 * buffer to avoid complicating other code (message buffer address
1850 * calculation, etc.).
1852 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1853 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1854 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1855 phys_avail[pa_indx--] = 0;
1856 phys_avail[pa_indx--] = 0;
1859 Maxmem = atop(phys_avail[pa_indx]);
1861 /* Trim off space for the message buffer. */
1862 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1864 avail_end = phys_avail[pa_indx];
1869 int apic_io_enable = 1; /* Enabled by default for kernels compiled w/APIC_IO */
1871 int apic_io_enable = 0; /* Disabled by default for kernels compiled without */
1873 TUNABLE_INT("hw.apic_io_enable", &apic_io_enable);
1874 extern struct machintr_abi MachIntrABI_APIC;
1877 extern struct machintr_abi MachIntrABI_ICU;
1878 struct machintr_abi MachIntrABI;
1889 * 7 Device Not Available (x87)
1891 * 9 Coprocessor Segment overrun (unsupported, reserved)
1893 * 11 Segment not present
1895 * 13 General Protection
1898 * 16 x87 FP Exception pending
1899 * 17 Alignment Check
1901 * 19 SIMD floating point
1903 * 32-255 INTn/external sources
1908 struct gate_descriptor *gdp;
1909 int gsel_tss, metadata_missing, off, x;
1910 struct mdglobaldata *gd;
1913 * Prevent lowering of the ipl if we call tsleep() early.
1915 gd = &CPU_prvspace[0].mdglobaldata;
1916 bzero(gd, sizeof(*gd));
1918 gd->mi.gd_curthread = &thread0;
1919 thread0.td_gd = &gd->mi;
1921 atdevbase = ISA_HOLE_START + KERNBASE;
1923 metadata_missing = 0;
1924 if (bootinfo.bi_modulep) {
1925 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1926 preload_bootstrap_relocate(KERNBASE);
1928 metadata_missing = 1;
1930 if (bootinfo.bi_envp)
1931 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1935 * XXX: Where is the correct place for it?
1937 MachIntrABI = MachIntrABI_ICU;
1939 TUNABLE_INT_FETCH("hw.apic_io_enable", &apic_io_enable);
1941 MachIntrABI = MachIntrABI_APIC;
1945 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1946 * and ncpus_fit_mask remain 0.
1951 /* Init basic tunables, hz etc */
1955 * make gdt memory segments, the code segment goes up to end of the
1956 * page with etext in it, the data segment goes to the end of
1960 * XXX text protection is temporarily (?) disabled. The limit was
1961 * i386_btop(round_page(etext)) - 1.
1963 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1964 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1966 gdt_segs[GPRIV_SEL].ssd_limit =
1967 atop(sizeof(struct privatespace) - 1);
1968 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1969 gdt_segs[GPROC0_SEL].ssd_base =
1970 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1972 gd->mi.gd_prvspace = &CPU_prvspace[0];
1975 * Note: on both UP and SMP curthread must be set non-NULL
1976 * early in the boot sequence because the system assumes
1977 * that 'curthread' is never NULL.
1980 for (x = 0; x < NGDT; x++) {
1982 /* avoid overwriting db entries with APM ones */
1983 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1986 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1989 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1990 r_gdt.rd_base = (int) gdt;
1993 mi_gdinit(&gd->mi, 0);
1995 mi_proc0init(&gd->mi, proc0paddr);
1996 safepri = TDPRI_MAX;
1998 /* make ldt memory segments */
2000 * XXX - VM_MAX_USER_ADDRESS is an end address, not a max. And it
2001 * should be spelled ...MAX_USER...
2003 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2004 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2005 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2006 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2008 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2010 gd->gd_currentldt = _default_ldt;
2011 /* spinlocks and the BGL */
2015 * Setup the hardware exception table. Most exceptions use
2016 * SDT_SYS386TGT, known as a 'trap gate'. Trap gates leave
2017 * interrupts enabled. VM page faults use SDT_SYS386IGT, known as
2018 * an 'interrupt trap gate', which disables interrupts on entry,
2019 * in order to be able to poll the appropriate CRn register to
2020 * determine the fault address.
2022 for (x = 0; x < NIDT; x++) {
2023 #ifdef DEBUG_INTERRUPTS
2024 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2026 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2029 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2030 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2031 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2032 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2033 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2034 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2035 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2036 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2037 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2038 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2039 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2040 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2041 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2042 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2043 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2044 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2045 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2046 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2047 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2048 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2049 setidt(0x80, &IDTVEC(int0x80_syscall),
2050 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2052 r_idt.rd_limit = sizeof(idt0) - 1;
2053 r_idt.rd_base = (int) idt;
2057 * Initialize the console before we print anything out.
2061 if (metadata_missing)
2062 kprintf("WARNING: loader(8) metadata is missing!\n");
2071 if (boothowto & RB_KDB)
2072 Debugger("Boot flags requested debugger");
2075 finishidentcpu(); /* Final stage of CPU initialization */
2076 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2077 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2078 initializecpu(); /* Initialize CPU registers */
2081 * make an initial tss so cpu can get interrupt stack on syscall!
2082 * The 16 bytes is to save room for a VM86 context.
2084 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2085 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
2086 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2087 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2088 gd->gd_common_tssd = *gd->gd_tss_gdt;
2089 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
2092 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2093 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2094 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2095 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2096 dblfault_tss.tss_cr3 = (int)IdlePTD;
2097 dblfault_tss.tss_eip = (int) dblfault_handler;
2098 dblfault_tss.tss_eflags = PSL_KERNEL;
2099 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2100 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2101 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2102 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2103 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2107 init_param2(physmem);
2109 /* now running on new page tables, configured,and u/iom is accessible */
2111 /* Map the message buffer. */
2112 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2113 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2115 msgbufinit(msgbufp, MSGBUF_SIZE);
2117 /* make a call gate to reenter kernel with */
2118 gdp = &ldt[LSYS5CALLS_SEL].gd;
2120 x = (int) &IDTVEC(syscall);
2121 gdp->gd_looffset = x++;
2122 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2124 gdp->gd_type = SDT_SYS386CGT;
2125 gdp->gd_dpl = SEL_UPL;
2127 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2129 /* XXX does this work? */
2130 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2131 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2133 /* transfer to user mode */
2135 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2136 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2138 /* setup proc 0's pcb */
2139 thread0.td_pcb->pcb_flags = 0;
2140 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2141 thread0.td_pcb->pcb_ext = 0;
2142 lwp0.lwp_md.md_regs = &proc0_tf;
2146 * Initialize machine-dependant portions of the global data structure.
2147 * Note that the global data area and cpu0's idlestack in the private
2148 * data space were allocated in locore.
2150 * Note: the idlethread's cpl is 0
2152 * WARNING! Called from early boot, 'mycpu' may not work yet.
2155 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2158 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2160 lwkt_init_thread(&gd->mi.gd_idlethread,
2161 gd->mi.gd_prvspace->idlestack,
2162 sizeof(gd->mi.gd_prvspace->idlestack),
2164 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2165 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2166 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2167 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2171 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2173 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2174 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2181 globaldata_find(int cpu)
2183 KKASSERT(cpu >= 0 && cpu < ncpus);
2184 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2187 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2188 static void f00f_hack(void *unused);
2189 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
2192 f00f_hack(void *unused)
2194 struct gate_descriptor *new_idt;
2200 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
2202 r_idt.rd_limit = sizeof(idt0) - 1;
2204 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
2206 panic("kmem_alloc returned 0");
2207 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2208 panic("kmem_alloc returned non-page-aligned memory");
2209 /* Put the first seven entries in the lower page */
2210 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2211 bcopy(idt, new_idt, sizeof(idt0));
2212 r_idt.rd_base = (int)new_idt;
2215 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
2216 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2217 panic("vm_map_protect failed");
2220 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2223 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2225 lp->lwp_md.md_regs->tf_eip = addr;
2230 ptrace_single_step(struct lwp *lp)
2232 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2237 fill_regs(struct lwp *lp, struct reg *regs)
2239 struct trapframe *tp;
2241 tp = lp->lwp_md.md_regs;
2242 regs->r_gs = tp->tf_gs;
2243 regs->r_fs = tp->tf_fs;
2244 regs->r_es = tp->tf_es;
2245 regs->r_ds = tp->tf_ds;
2246 regs->r_edi = tp->tf_edi;
2247 regs->r_esi = tp->tf_esi;
2248 regs->r_ebp = tp->tf_ebp;
2249 regs->r_ebx = tp->tf_ebx;
2250 regs->r_edx = tp->tf_edx;
2251 regs->r_ecx = tp->tf_ecx;
2252 regs->r_eax = tp->tf_eax;
2253 regs->r_eip = tp->tf_eip;
2254 regs->r_cs = tp->tf_cs;
2255 regs->r_eflags = tp->tf_eflags;
2256 regs->r_esp = tp->tf_esp;
2257 regs->r_ss = tp->tf_ss;
2262 set_regs(struct lwp *lp, struct reg *regs)
2264 struct trapframe *tp;
2266 tp = lp->lwp_md.md_regs;
2267 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2268 !CS_SECURE(regs->r_cs))
2270 tp->tf_gs = regs->r_gs;
2271 tp->tf_fs = regs->r_fs;
2272 tp->tf_es = regs->r_es;
2273 tp->tf_ds = regs->r_ds;
2274 tp->tf_edi = regs->r_edi;
2275 tp->tf_esi = regs->r_esi;
2276 tp->tf_ebp = regs->r_ebp;
2277 tp->tf_ebx = regs->r_ebx;
2278 tp->tf_edx = regs->r_edx;
2279 tp->tf_ecx = regs->r_ecx;
2280 tp->tf_eax = regs->r_eax;
2281 tp->tf_eip = regs->r_eip;
2282 tp->tf_cs = regs->r_cs;
2283 tp->tf_eflags = regs->r_eflags;
2284 tp->tf_esp = regs->r_esp;
2285 tp->tf_ss = regs->r_ss;
2289 #ifndef CPU_DISABLE_SSE
2291 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2293 struct env87 *penv_87 = &sv_87->sv_env;
2294 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2297 /* FPU control/status */
2298 penv_87->en_cw = penv_xmm->en_cw;
2299 penv_87->en_sw = penv_xmm->en_sw;
2300 penv_87->en_tw = penv_xmm->en_tw;
2301 penv_87->en_fip = penv_xmm->en_fip;
2302 penv_87->en_fcs = penv_xmm->en_fcs;
2303 penv_87->en_opcode = penv_xmm->en_opcode;
2304 penv_87->en_foo = penv_xmm->en_foo;
2305 penv_87->en_fos = penv_xmm->en_fos;
2308 for (i = 0; i < 8; ++i)
2309 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2311 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2315 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2317 struct env87 *penv_87 = &sv_87->sv_env;
2318 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2321 /* FPU control/status */
2322 penv_xmm->en_cw = penv_87->en_cw;
2323 penv_xmm->en_sw = penv_87->en_sw;
2324 penv_xmm->en_tw = penv_87->en_tw;
2325 penv_xmm->en_fip = penv_87->en_fip;
2326 penv_xmm->en_fcs = penv_87->en_fcs;
2327 penv_xmm->en_opcode = penv_87->en_opcode;
2328 penv_xmm->en_foo = penv_87->en_foo;
2329 penv_xmm->en_fos = penv_87->en_fos;
2332 for (i = 0; i < 8; ++i)
2333 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2335 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2337 #endif /* CPU_DISABLE_SSE */
2340 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2342 #ifndef CPU_DISABLE_SSE
2344 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2345 (struct save87 *)fpregs);
2348 #endif /* CPU_DISABLE_SSE */
2349 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2354 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2356 #ifndef CPU_DISABLE_SSE
2358 set_fpregs_xmm((struct save87 *)fpregs,
2359 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2362 #endif /* CPU_DISABLE_SSE */
2363 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2368 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2371 dbregs->dr0 = rdr0();
2372 dbregs->dr1 = rdr1();
2373 dbregs->dr2 = rdr2();
2374 dbregs->dr3 = rdr3();
2375 dbregs->dr4 = rdr4();
2376 dbregs->dr5 = rdr5();
2377 dbregs->dr6 = rdr6();
2378 dbregs->dr7 = rdr7();
2382 pcb = lp->lwp_thread->td_pcb;
2383 dbregs->dr0 = pcb->pcb_dr0;
2384 dbregs->dr1 = pcb->pcb_dr1;
2385 dbregs->dr2 = pcb->pcb_dr2;
2386 dbregs->dr3 = pcb->pcb_dr3;
2389 dbregs->dr6 = pcb->pcb_dr6;
2390 dbregs->dr7 = pcb->pcb_dr7;
2396 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2399 load_dr0(dbregs->dr0);
2400 load_dr1(dbregs->dr1);
2401 load_dr2(dbregs->dr2);
2402 load_dr3(dbregs->dr3);
2403 load_dr4(dbregs->dr4);
2404 load_dr5(dbregs->dr5);
2405 load_dr6(dbregs->dr6);
2406 load_dr7(dbregs->dr7);
2409 struct ucred *ucred;
2411 uint32_t mask1, mask2;
2414 * Don't let an illegal value for dr7 get set. Specifically,
2415 * check for undefined settings. Setting these bit patterns
2416 * result in undefined behaviour and can lead to an unexpected
2419 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2420 i++, mask1 <<= 2, mask2 <<= 2)
2421 if ((dbregs->dr7 & mask1) == mask2)
2424 pcb = lp->lwp_thread->td_pcb;
2425 ucred = lp->lwp_proc->p_ucred;
2428 * Don't let a process set a breakpoint that is not within the
2429 * process's address space. If a process could do this, it
2430 * could halt the system by setting a breakpoint in the kernel
2431 * (if ddb was enabled). Thus, we need to check to make sure
2432 * that no breakpoints are being enabled for addresses outside
2433 * process's address space, unless, perhaps, we were called by
2436 * XXX - what about when the watched area of the user's
2437 * address space is written into from within the kernel
2438 * ... wouldn't that still cause a breakpoint to be generated
2439 * from within kernel mode?
2442 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2443 if (dbregs->dr7 & 0x3) {
2444 /* dr0 is enabled */
2445 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
2449 if (dbregs->dr7 & (0x3<<2)) {
2450 /* dr1 is enabled */
2451 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
2455 if (dbregs->dr7 & (0x3<<4)) {
2456 /* dr2 is enabled */
2457 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
2461 if (dbregs->dr7 & (0x3<<6)) {
2462 /* dr3 is enabled */
2463 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
2468 pcb->pcb_dr0 = dbregs->dr0;
2469 pcb->pcb_dr1 = dbregs->dr1;
2470 pcb->pcb_dr2 = dbregs->dr2;
2471 pcb->pcb_dr3 = dbregs->dr3;
2472 pcb->pcb_dr6 = dbregs->dr6;
2473 pcb->pcb_dr7 = dbregs->dr7;
2475 pcb->pcb_flags |= PCB_DBREGS;
2482 * Return > 0 if a hardware breakpoint has been hit, and the
2483 * breakpoint was in user space. Return 0, otherwise.
2486 user_dbreg_trap(void)
2488 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2489 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2490 int nbp; /* number of breakpoints that triggered */
2491 caddr_t addr[4]; /* breakpoint addresses */
2495 if ((dr7 & 0x000000ff) == 0) {
2497 * all GE and LE bits in the dr7 register are zero,
2498 * thus the trap couldn't have been caused by the
2499 * hardware debug registers
2506 bp = dr6 & 0x0000000f;
2510 * None of the breakpoint bits are set meaning this
2511 * trap was not caused by any of the debug registers
2517 * at least one of the breakpoints were hit, check to see
2518 * which ones and if any of them are user space addresses
2522 addr[nbp++] = (caddr_t)rdr0();
2525 addr[nbp++] = (caddr_t)rdr1();
2528 addr[nbp++] = (caddr_t)rdr2();
2531 addr[nbp++] = (caddr_t)rdr3();
2534 for (i=0; i<nbp; i++) {
2536 (caddr_t)VM_MAX_USER_ADDRESS) {
2538 * addr[i] is in user space
2545 * None of the breakpoints are in user space.
2553 Debugger(const char *msg)
2555 kprintf("Debugger(\"%s\") called.\n", msg);
2562 * Provide inb() and outb() as functions. They are normally only
2563 * available as macros calling inlined functions, thus cannot be
2564 * called inside DDB.
2566 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2572 /* silence compiler warnings */
2574 void outb(u_int, u_char);
2581 * We use %%dx and not %1 here because i/o is done at %dx and not at
2582 * %edx, while gcc generates inferior code (movw instead of movl)
2583 * if we tell it to load (u_short) port.
2585 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2590 outb(u_int port, u_char data)
2594 * Use an unnecessary assignment to help gcc's register allocator.
2595 * This make a large difference for gcc-1.40 and a tiny difference
2596 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2597 * best results. gcc-2.6.0 can't handle this.
2600 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2607 #include "opt_cpu.h"
2611 * initialize all the SMP locks
2614 /* critical region when masking or unmasking interupts */
2615 struct spinlock_deprecated imen_spinlock;
2617 /* critical region for old style disable_intr/enable_intr */
2618 struct spinlock_deprecated mpintr_spinlock;
2620 /* critical region around INTR() routines */
2621 struct spinlock_deprecated intr_spinlock;
2623 /* lock region used by kernel profiling */
2624 struct spinlock_deprecated mcount_spinlock;
2626 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2627 struct spinlock_deprecated com_spinlock;
2629 /* lock regions around the clock hardware */
2630 struct spinlock_deprecated clock_spinlock;
2632 /* lock around the MP rendezvous */
2633 struct spinlock_deprecated smp_rv_spinlock;
2640 * Get the initial mplock with a count of 1 for the BSP.
2641 * This uses a LOGICAL cpu ID, ie BSP == 0.
2643 cpu_get_initial_mplock();
2646 spin_lock_init(&mcount_spinlock);
2647 spin_lock_init(&intr_spinlock);
2648 spin_lock_init(&mpintr_spinlock);
2649 spin_lock_init(&imen_spinlock);
2650 spin_lock_init(&smp_rv_spinlock);
2651 spin_lock_init(&com_spinlock);
2652 spin_lock_init(&clock_spinlock);
2654 /* our token pool needs to work early */
2655 lwkt_token_pool_init();