Deprecate MCLGET() in favor of m_getcl() or m_getl() in order to
[dragonfly.git] / sys / dev / disk / ct / ct_isa.c
1 /* $FreeBSD: src/sys/dev/ct/ct_isa.c,v 1.3.2.3 2003/06/01 04:26:44 nyan Exp $ */
2 /* $DragonFly: src/sys/dev/disk/ct/Attic/ct_isa.c,v 1.6 2005/05/24 20:58:59 dillon Exp $ */
3 /*      $NecBSD: ct_isa.c,v 1.6 1999/07/26 06:32:01 honda Exp $ */
4 /*      $NetBSD$        */
5
6 /*
7  * [NetBSD for NEC PC-98 series]
8  *  Copyright (c) 1995, 1996, 1997, 1998
9  *      NetBSD/pc98 porting staff. All rights reserved.
10  * 
11  *  Redistribution and use in source and binary forms, with or without
12  *  modification, are permitted provided that the following conditions
13  *  are met:
14  *  1. Redistributions of source code must retain the above copyright
15  *     notice, this list of conditions and the following disclaimer.
16  *  2. Redistributions in binary form must reproduce the above copyright
17  *     notice, this list of conditions and the following disclaimer in the
18  *     documentation and/or other materials provided with the distribution.
19  *  3. The name of the author may not be used to endorse or promote products
20  *     derived from this software without specific prior written permission.
21  * 
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
26  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
27  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
30  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
31  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32  * POSSIBILITY OF SUCH DAMAGE.
33  */
34
35 #define SCSIBUS_RESCAN
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
40 #include <sys/disklabel.h>
41 #if defined(__FreeBSD__) && __FreeBSD_version > 500001
42 #include <sys/bio.h>
43 #endif  /* __ FreeBSD__ */
44 #include <sys/buf.h>
45 #include <sys/queue.h>
46 #include <sys/malloc.h>
47 #include <sys/device_port.h>
48 #include <sys/errno.h>
49
50 #include <vm/vm.h>
51
52 #ifdef __NetBSD__
53 #include <machine/bus.h>
54 #include <machine/intr.h>
55
56 #include <dev/scsipi/scsi_all.h>
57 #include <dev/scsipi/scsipi_all.h>
58 #include <dev/scsipi/scsiconf.h>
59 #include <dev/scsipi/scsi_disk.h>
60
61 #include <bus/isa/isareg.h>
62 #include <bus/isa/isavar.h>
63 #include <bus/isa/isadmavar.h>
64
65 #include <machine/dvcfg.h>
66 #include <machine/physio_proc.h>
67 #include <machine/syspmgr.h>
68
69 #include <i386/Cbus/dev/scsi_low.h>
70
71 #include <dev/ic/wd33c93reg.h>
72 #include <i386/Cbus/dev/ct/ctvar.h>
73 #include <i386/Cbus/dev/ct/bshwvar.h>
74 #endif /* __NetBSD__ */
75
76 #if defined(__DragonFly__) || defined(__FreeBSD__)
77 #include <machine/bus.h>
78 #include <machine/resource.h>
79 #include <sys/bus.h>
80 #include <sys/rman.h>
81 #include <machine/md_var.h>
82
83 #include <pc98/pc98/pc98.h>
84 #include <bus/isa/isavar.h>
85
86 #include <machine/dvcfg.h>
87 #include <machine/physio_proc.h>
88
89 #include <bus/cam/scsi/scsi_low.h>
90
91 #include <dev/ic/wd33c93reg.h>
92 #include "ctvar.h"
93 #include "bshwvar.h"
94 #endif /* __FreeBSD__ */
95
96 #define BSHW_IOSZ       0x08
97 #define BSHW_IOBASE     0xcc0
98 #define BSHW_MEMSZ      (PAGE_SIZE * 2)
99
100 static int ct_isa_match(device_t);
101 static int ct_isa_attach(device_t);
102 static int ct_space_map(device_t, struct bshw *,
103                         struct resource **, struct resource **);
104 static void ct_space_unmap(device_t, struct ct_softc *);
105 static struct bshw *ct_find_hw(device_t);
106 static void ct_dmamap(void *, bus_dma_segment_t *, int, int);
107 static void ct_isa_bus_access_weight (struct ct_bus_access_handle *);
108 static void ct_isa_dmasync_before (struct ct_softc *);
109 static void ct_isa_dmasync_after (struct ct_softc *);
110
111 struct ct_isa_softc {
112         struct ct_softc sc_ct;
113         struct bshw_softc sc_bshw;
114 };
115
116 static struct isa_pnp_id ct_pnp_ids[] = {
117         { 0x0100e7b1,   "Logitec LHA-301" },
118         { 0x110154dc,   "I-O DATA SC-98III" },
119         { 0x4120acb4,   "MELCO IFC-NN" },
120         { 0,            NULL }
121 };
122
123 static device_method_t ct_isa_methods[] = {
124         /* Device interface */
125         DEVMETHOD(device_probe,         ct_isa_match),
126         DEVMETHOD(device_attach,        ct_isa_attach),
127         { 0, 0 }
128 };
129
130 static driver_t ct_isa_driver = {
131         "ct", ct_isa_methods, sizeof(struct ct_isa_softc),
132 };
133
134 static devclass_t ct_devclass;
135
136 DRIVER_MODULE(ct, isa, ct_isa_driver, ct_devclass, 0, 0);
137
138 static int
139 ct_isa_match(device_t dev)
140 {
141         struct bshw *hw;
142         struct resource *port_res, *mem_res;
143         struct ct_bus_access_handle ch;
144         int rv;
145
146         if (ISA_PNP_PROBE(device_get_parent(dev), dev, ct_pnp_ids) == ENXIO)
147                 return ENXIO;
148
149         switch (isa_get_logicalid(dev)) {
150         case 0x0100e7b1:        /* LHA-301 */
151         case 0x110154dc:        /* SC-98III */
152         case 0x4120acb4:        /* IFC-NN */
153                 /* XXX - force to SMIT mode */
154                 device_set_flags(dev, device_get_flags(dev) | 0x40000);
155                 break;
156         }
157
158         if (isa_get_port(dev) == -1)
159                 bus_set_resource(dev, SYS_RES_IOPORT, 0,
160                                  BSHW_IOBASE, BSHW_IOSZ);
161
162         if ((hw = ct_find_hw(dev)) == NULL)
163                 return ENXIO;
164         if (ct_space_map(dev, hw, &port_res, &mem_res) != 0)
165                 return ENXIO;
166
167         bzero(&ch, sizeof(ch));
168         ch.ch_iot = rman_get_bustag(port_res);
169         ch.ch_ioh = rman_get_bushandle(port_res),
170         ch.ch_bus_weight = ct_isa_bus_access_weight;
171
172         rv = ctprobesubr(&ch, 0, BSHW_DEFAULT_HOSTID,
173                          BSHW_DEFAULT_CHIPCLK, NULL);
174         if (rv != 0)
175         {
176                 struct bshw_softc bshw_tab;
177                 struct bshw_softc *bs = &bshw_tab;
178
179                 memset(bs, 0, sizeof(*bs));
180                 bshw_read_settings(&ch, bs);
181                 bus_set_resource(dev, SYS_RES_IRQ, 0, bs->sc_irq, 1);
182                 bus_set_resource(dev, SYS_RES_DRQ, 0, bs->sc_drq, 1);
183         }
184
185         bus_release_resource(dev, SYS_RES_IOPORT, 0, port_res);
186         if (mem_res != NULL)
187                 bus_release_resource(dev, SYS_RES_MEMORY, 0, mem_res);
188
189         if (rv != 0)
190                 return 0;
191         return ENXIO;
192 }
193
194 static int
195 ct_isa_attach(device_t dev)
196 {
197         struct ct_isa_softc *pct = device_get_softc(dev);
198         struct ct_softc *ct = &pct->sc_ct;
199         struct ct_bus_access_handle *chp = &ct->sc_ch;
200         struct scsi_low_softc *slp = &ct->sc_sclow;
201         struct bshw_softc *bs = &pct->sc_bshw;
202         struct bshw *hw;
203         int irq_rid, drq_rid, chiprev;
204         u_int8_t *vaddr;
205         bus_addr_t addr;
206         intrmask_t s;
207
208         hw = ct_find_hw(dev);
209         if (ct_space_map(dev, hw, &ct->port_res, &ct->mem_res) != 0) {
210                 device_printf(dev, "bus io mem map failed\n");
211                 return ENXIO;
212         }
213
214         bzero(chp, sizeof(*chp));
215         chp->ch_iot = rman_get_bustag(ct->port_res);
216         chp->ch_ioh = rman_get_bushandle(ct->port_res);
217         if (ct->mem_res) {
218                 chp->ch_memt = rman_get_bustag(ct->mem_res);
219                 chp->ch_memh = rman_get_bushandle(ct->mem_res);
220         }
221         chp->ch_bus_weight = ct_isa_bus_access_weight;
222
223         irq_rid = 0;
224         ct->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &irq_rid, 0, ~0,
225                                          1, RF_ACTIVE);
226         drq_rid = 0;
227         ct->drq_res = bus_alloc_resource(dev, SYS_RES_DRQ, &drq_rid, 0, ~0,
228                                          1, RF_ACTIVE);
229         if (ct->irq_res == NULL || ct->drq_res == NULL) {
230                 ct_space_unmap(dev, ct);
231                 return ENXIO;
232         }
233
234         if (ctprobesubr(chp, 0, BSHW_DEFAULT_HOSTID,
235                         BSHW_DEFAULT_CHIPCLK, &chiprev) == 0)
236         {
237                 device_printf(dev, "hardware missing\n");
238                 ct_space_unmap(dev, ct);
239                 return ENXIO;
240         }
241
242         /* setup DMA map */
243         if (bus_dma_tag_create(NULL, 1, 0,
244                                BUS_SPACE_MAXADDR_24BIT, BUS_SPACE_MAXADDR,
245                                NULL, NULL, MAXBSIZE, 1,
246                                BUS_SPACE_MAXSIZE_32BIT,
247                                BUS_DMA_ALLOCNOW, &ct->sc_dmat) != 0) {
248                 device_printf(dev, "can't set up ISA DMA map\n");
249                 ct_space_unmap(dev, ct);
250                 return ENXIO;
251         }
252
253         if (bus_dmamem_alloc(ct->sc_dmat, (void **)&vaddr, BUS_DMA_NOWAIT,
254                              &ct->sc_dmamapt) != 0) {
255                 device_printf(dev, "can't set up ISA DMA map\n");
256                 ct_space_unmap(dev, ct);
257                 return ENXIO;
258         }
259
260         bus_dmamap_load(ct->sc_dmat, ct->sc_dmamapt, vaddr, MAXBSIZE,
261                         ct_dmamap, &addr, 0);
262
263         /* setup machdep softc */
264         bs->sc_hw = hw;
265         bs->sc_io_control = 0;
266         bs->sc_bounce_phys = (u_int8_t *)addr;
267         bs->sc_bounce_addr = vaddr;
268         bs->sc_bounce_size = MAXBSIZE;
269         bs->sc_minphys = (1 << 24);
270         bs->sc_dmasync_before = ct_isa_dmasync_before;
271         bs->sc_dmasync_after = ct_isa_dmasync_after;
272         bshw_read_settings(chp, bs);
273
274         /* setup ct driver softc */
275         ct->ct_hw = bs;
276         ct->ct_dma_xfer_start = bshw_dma_xfer_start;
277         ct->ct_pio_xfer_start = bshw_smit_xfer_start;
278         ct->ct_dma_xfer_stop = bshw_dma_xfer_stop;
279         ct->ct_pio_xfer_stop = bshw_smit_xfer_stop;
280         ct->ct_bus_reset = bshw_bus_reset;
281         ct->ct_synch_setup = bshw_synch_setup;
282
283         ct->sc_xmode = CT_XMODE_DMA;
284         if (chp->ch_memh != NULL)
285                 ct->sc_xmode |= CT_XMODE_PIO;
286
287         ct->sc_chiprev = chiprev;
288         switch (chiprev)
289         {
290         case CT_WD33C93:
291                 /* s = "WD33C93"; */
292                 ct->sc_chipclk = 8;
293                 break;
294         case CT_WD33C93_A:
295                 if (DVCFG_MAJOR(device_get_flags(dev)) > 0)
296                 {
297                         /* s = "AM33C93_A"; */
298                         ct->sc_chipclk = 20;
299                         ct->sc_chiprev = CT_AM33C93_A;
300                 }
301                 else
302                 {
303                         /* s = "WD33C93_A"; */
304                         ct->sc_chipclk = 10;
305                 }
306                 break;
307
308         case CT_AM33C93_A:
309                 /* s = "AM33C93_A"; */
310                 ct->sc_chipclk = 20;
311                 break;
312
313         default:
314         case CT_WD33C93_B:
315                 /* s = "WD33C93_B"; */
316                 ct->sc_chipclk = 20;
317                 break;
318         }
319 #if     0
320         printf("%s: chiprev %s chipclk %d Mhz\n", 
321                 slp->sl_dev.dv_xname, s, ct->sc_chipclk);
322 #endif
323
324         slp->sl_dev = dev;
325         slp->sl_hostid = bs->sc_hostid;
326         slp->sl_irq = isa_get_irq(dev);
327         slp->sl_cfgflags = device_get_flags(dev);
328
329         s = splcam();
330         ctattachsubr(ct);
331         splx(s);
332
333         if (bus_setup_intr(dev, ct->irq_res, INTR_TYPE_CAM,
334                            (driver_intr_t *)ctintr, ct,
335                            &ct->sc_ih, NULL)) {
336                 ct_space_unmap(dev, ct);
337                 return ENXIO;
338         }
339
340         return 0;
341 }
342
343 static struct bshw *
344 ct_find_hw(device_t dev)
345 {
346         return DVCFG_HW(&bshw_hwsel, DVCFG_MAJOR(device_get_flags(dev)));
347 }
348
349 static int
350 ct_space_map(device_t dev, struct bshw *hw,
351              struct resource **iohp, struct resource **memhp)
352 {
353         int port_rid, mem_rid;
354
355         *memhp = NULL;
356
357         port_rid = 0;
358         *iohp = bus_alloc_resource(dev, SYS_RES_IOPORT, &port_rid, 0, ~0,
359                                    BSHW_IOSZ, RF_ACTIVE);
360         if (*iohp == NULL)
361                 return ENXIO;
362
363         if ((hw->hw_flags & BSHW_SMFIFO) == 0 || isa_get_maddr(dev) == -1)
364                 return 0;
365
366         mem_rid = 0;
367         *memhp = bus_alloc_resource(dev, SYS_RES_MEMORY, &mem_rid, 0, ~0,
368                                     BSHW_MEMSZ, RF_ACTIVE);
369         if (*memhp == NULL) {
370                 bus_release_resource(dev, SYS_RES_IOPORT, port_rid, *iohp);
371                 return ENXIO;
372         }
373
374         return 0;
375 }
376
377 static void
378 ct_space_unmap(device_t dev, struct ct_softc *ct)
379 {
380         if (ct->port_res != NULL)
381                 bus_release_resource(dev, SYS_RES_IOPORT, 0, ct->port_res);
382         if (ct->mem_res != NULL)
383                 bus_release_resource(dev, SYS_RES_MEMORY, 0, ct->mem_res);
384         if (ct->irq_res != NULL)
385                 bus_release_resource(dev, SYS_RES_IRQ, 0, ct->irq_res);
386         if (ct->drq_res != NULL)
387                 bus_release_resource(dev, SYS_RES_DRQ, 0, ct->drq_res);
388 }
389
390 static void
391 ct_dmamap(void *arg, bus_dma_segment_t *seg, int nseg, int error)
392 {
393         bus_addr_t *addr = (bus_addr_t *)arg;
394
395         *addr = seg->ds_addr;
396 }
397
398 static void
399 ct_isa_bus_access_weight(chp)
400         struct ct_bus_access_handle *chp;
401 {
402
403         outb(0x5f, 0);
404 }
405
406 static void
407 ct_isa_dmasync_before(ct)
408         struct ct_softc *ct;
409 {
410
411         if (need_pre_dma_flush)
412                 wbinvd();
413 }
414
415 static void
416 ct_isa_dmasync_after(ct)
417         struct ct_softc *ct;
418 {
419
420         if (need_post_dma_flush)
421                 invd();
422 }