1 /* $NetBSD: est.c,v 1.25 2006/06/18 16:39:56 nonaka Exp $ */
3 * Copyright (c) 2003 Michael Eriksson.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 * Copyright (c) 2004 The NetBSD Foundation, Inc.
30 * All rights reserved.
32 * Redistribution and use in source and binary forms, with or without
33 * modification, are permitted provided that the following conditions
35 * 1. Redistributions of source code must retain the above copyright
36 * notice, this list of conditions and the following disclaimer.
37 * 2. Redistributions in binary form must reproduce the above copyright
38 * notice, this list of conditions and the following disclaimer in the
39 * documentation and/or other materials provided with the distribution.
40 * 3. All advertising materials mentioning features or use of this software
41 * must display the following acknowledgement:
42 * This product includes software developed by the NetBSD
43 * Foundation, Inc. and its contributors.
44 * 4. Neither the name of The NetBSD Foundation nor the names of its
45 * contributors may be used to endorse or promote products derived
46 * from this software without specific prior written permission.
48 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
49 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
50 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
51 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
52 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
53 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
54 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
55 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
56 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
57 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
58 * POSSIBILITY OF SUCH DAMAGE.
62 * This is a driver for Intel's Enhanced SpeedStep Technology (EST),
63 * as implemented in Pentium M processors.
65 * Reference documentation:
67 * - IA-32 Intel Architecture Software Developer's Manual, Volume 3:
68 * System Programming Guide.
69 * Section 13.14, Enhanced Intel SpeedStep technology.
70 * Table B-2, MSRs in Pentium M Processors.
71 * http://www.intel.com/design/pentium4/manuals/253668.htm
73 * - Intel Pentium M Processor Datasheet.
74 * Table 5, Voltage and Current Specifications.
75 * http://www.intel.com/design/mobile/datashts/252612.htm
77 * - Intel Pentium M Processor on 90 nm Process with 2-MB L2 Cache Datasheet
78 * Table 3-4, 3-5, 3-6, Voltage and Current Specifications.
79 * http://www.intel.com/design/mobile/datashts/302189.htm
81 * - Linux cpufreq patches, speedstep-centrino.c.
82 * Encoding of MSR_PERF_CTL and MSR_PERF_STATUS.
83 * http://www.codemonkey.org.uk/projects/cpufreq/cpufreq-2.4.22-pre6-1.gz
85 * ACPI objects: _PCT is MSR location, _PSS is freq/voltage, _PPC is caps.
87 * $NetBSD: est.c,v 1.25 2006/06/18 16:39:56 nonaka Exp $
88 * $DragonFly: src/sys/platform/pc32/i386/est.c,v 1.11 2008/06/05 18:06:32 swildner Exp $
91 #include <sys/param.h>
92 #include <sys/systm.h>
93 #include <sys/malloc.h>
94 #include <sys/kernel.h>
95 #include <sys/module.h>
96 #include <sys/sysctl.h>
98 #include <machine/cpu.h>
99 #include <machine/md_var.h>
100 #include <machine/specialreg.h>
108 /* Ultra Low Voltage Intel Pentium M processor 900 MHz */
109 static const struct fq_info pentium_m_900[] = {
115 /* Ultra Low Voltage Intel Pentium M processor 1.00 GHz */
116 static const struct fq_info pentium_m_1000[] = {
123 /* Low Voltage Intel Pentium M processor 1.10 GHz */
124 static const struct fq_info pentium_m_1100[] = {
132 /* Low Voltage Intel Pentium M processor 1.20 GHz */
133 static const struct fq_info pentium_m_1200[] = {
142 /* Low Voltage Intel Pentium M processor 1.30 GHz */
143 static const struct fq_info pentium_m_1300_lv[] = {
153 /* Intel Pentium M processor 1.30 GHz */
154 static const struct fq_info pentium_m_1300[] = {
162 /* Intel Pentium M processor 1.40 GHz */
163 static const struct fq_info pentium_m_1400[] = {
171 /* Intel Pentium M processor 1.50 GHz */
172 static const struct fq_info pentium_m_1500[] = {
181 /* Intel Pentium M processor 1.60 GHz */
182 static const struct fq_info pentium_m_1600[] = {
191 /* Intel Pentium M processor 1.70 GHz */
192 static const struct fq_info pentium_m_1700[] = {
201 /* Intel Pentium M processor 723 Ultra Low Voltage 1.0 GHz */
202 static const struct fq_info pentium_m_n723[] = {
209 /* Intel Pentium M processor 733 Ultra Low Voltage 1.1 GHz */
210 static const struct fq_info pentium_m_n733[] = {
218 /* Intel Pentium M processor 753 Ultra Low Voltage 1.2 GHz */
219 static const struct fq_info pentium_m_n753[] = {
228 /* Intel Pentium M processor 773 Ultra Low Voltage 1.3 GHz */
229 static const struct fq_info pentium_m_n773[] = {
239 /* Intel Pentium M processor 738 Low Voltage 1.4 GHz */
240 static const struct fq_info pentium_m_n738[] = {
251 /* Intel Pentium M processor 758 Low Voltage 1.5 GHz */
252 static const struct fq_info pentium_m_n758[] = {
264 /* Intel Pentium M processor 778 Low Voltage 1.6 GHz */
265 static const struct fq_info pentium_m_n778[] = {
278 /* Intel Pentium M processor 710 1.4 GHz */
279 static const struct fq_info pentium_m_n710[] = {
287 /* Intel Pentium M processor 715 1.5 GHz */
288 static const struct fq_info pentium_m_n715[] = {
296 /* Intel Pentium M processor 725 1.6 GHz */
297 static const struct fq_info pentium_m_n725[] = {
306 /* Intel Pentium M processor 730 1.6 GHz */
307 static const struct fq_info pentium_m_n730[] = {
315 /* Intel Pentium M processor 735 1.7 GHz */
316 static const struct fq_info pentium_m_n735[] = {
325 /* Intel Pentium M processor 740 1.73 GHz */
326 static const struct fq_info pentium_m_n740[] = {
333 /* Intel Pentium M processor 740 1.73 GHz (988-1308mV version?) */
334 static const struct fq_info pentium_m_n740_2[] = {
341 /* Intel Pentium M processor 745 1.8 GHz */
342 static const struct fq_info pentium_m_n745[] = {
352 /* Intel Pentium M processor 750 1.86 GHz */
353 /* values extracted from \_PR\NPSS (via _PSS) SDST ACPI table */
354 static const struct fq_info pentium_m_n750[] = {
362 static const struct fq_info pentium_m_n750_2[] = {
370 /* Intel Pentium M processor 755 2.0 GHz */
371 static const struct fq_info pentium_m_n755[] = {
382 /* Intel Pentium M processor 760 2.0 GHz */
383 static const struct fq_info pentium_m_n760[] = {
391 /* Intel Pentium M processor 760 2.0 GHz */
392 static const struct fq_info pentium_m_n760_2[] = {
400 /* Intel Pentium M processor 765 2.1 GHz */
401 static const struct fq_info pentium_m_n765[] = {
412 /* Intel Pentium M processor 770 2.13 GHz */
413 static const struct fq_info pentium_m_n770[] = {
424 /* Intel Pentium M processor 770 2.13 GHz */
425 static const struct fq_info pentium_m_n770_2[] = {
434 /* Intel Pentium Core Duo T2300 */
435 static const struct fq_info pentium_core_duo_t2300[] = {
446 static const struct fq_info pentium_core2_duo_t7500[] = {
454 const char *brand_tag;
457 const struct fq_info *table;
458 const int fsbmult; /* in multiples of 133 MHz */
461 #define ENTRY(s, i, v, f) { s, i, sizeof(v) / sizeof((v)[0]), v, f }
462 static const struct fqlist pentium_m[] = { /* Banias */
463 ENTRY(" 900", 0x0695, pentium_m_900, 3),
464 ENTRY("1000", 0x0695, pentium_m_1000, 3),
465 ENTRY("1100", 0x0695, pentium_m_1100, 3),
466 ENTRY("1200", 0x0695, pentium_m_1200, 3),
467 ENTRY("1300", 0x0695, pentium_m_1300, 3),
468 ENTRY("1300", 0x0695, pentium_m_1300_lv, 3),
469 ENTRY("1400", 0x0695, pentium_m_1400, 3),
470 ENTRY("1500", 0x0695, pentium_m_1500, 3),
471 ENTRY("1600", 0x0695, pentium_m_1600, 3),
472 ENTRY("1700", 0x0695, pentium_m_1700, 3),
475 static const struct fqlist pentium_m_dothan[] = {
477 /* low voltage CPUs */
478 ENTRY("1.00", 0x06d8, pentium_m_n723, 3),
479 ENTRY("1.10", 0x06d6, pentium_m_n733, 3),
480 ENTRY("1.20", 0x06d8, pentium_m_n753, 3),
481 ENTRY("1.30", 0, pentium_m_n773, 3), /* does this exist? */
483 /* ultra low voltage CPUs */
484 ENTRY("1.40", 0x06d6, pentium_m_n738, 3),
485 ENTRY("1.50", 0x06d8, pentium_m_n758, 3),
486 ENTRY("1.60", 0x06d8, pentium_m_n778, 3),
488 /* 'regular' 400 MHz FSB CPUs */
489 ENTRY("1.40", 0x06d6, pentium_m_n710, 3),
490 ENTRY("1.50", 0x06d6, pentium_m_n715, 3),
491 ENTRY("1.50", 0x06d8, pentium_m_n715, 3),
492 ENTRY("1.60", 0x06d6, pentium_m_n725, 3),
493 ENTRY("1.70", 0x06d6, pentium_m_n735, 3),
494 ENTRY("1.80", 0x06d6, pentium_m_n745, 3),
495 ENTRY("2.00", 0x06d6, pentium_m_n755, 3),
496 ENTRY("2.10", 0x06d6, pentium_m_n765, 3),
498 /* 533 MHz FSB CPUs */
499 ENTRY("1.60", 0x06d8, pentium_m_n730, 4),
500 ENTRY("1.73", 0x06d8, pentium_m_n740, 4),
501 ENTRY("1.73", 0x06d8, pentium_m_n740_2, 4),
502 ENTRY("1.86", 0x06d8, pentium_m_n750, 4),
503 ENTRY("1.86", 0x06d8, pentium_m_n750_2, 4),
504 ENTRY("2.00", 0x06d8, pentium_m_n760, 4),
505 ENTRY("2.00", 0x06d8, pentium_m_n760_2, 4),
506 ENTRY("2.13", 0x06d8, pentium_m_n770, 4),
507 ENTRY("2.13", 0x06d8, pentium_m_n770_2, 4),
512 static const struct fqlist pentium_yonah[] = {
514 /* 666 MHz FSB CPUs */
515 ENTRY("1.66", 0x06e8, pentium_core_duo_t2300, 5 ),
518 static const struct fqlist pentium_merom[] = {
520 /* 800 MHz FSB CPUs */
521 ENTRY("2.20", 0x06fa, pentium_core2_duo_t7500, 6 ),
527 const char *brand_prefix;
528 const char *brand_suffix;
530 const struct fqlist *list;
533 static const struct est_cpu est_cpus[] = {
535 "Intel(R) Pentium(R) M processor ", "MHz",
536 (sizeof(pentium_m) / sizeof(pentium_m[0])),
540 "Intel(R) Pentium(R) M processor ", "GHz",
541 (sizeof(pentium_m_dothan) / sizeof(pentium_m_dothan[0])),
545 "Genuine Intel(R) CPU T2300 @ ", "GHz",
546 (sizeof(pentium_yonah) / sizeof(pentium_yonah[0])),
550 "Intel(R) Core(TM)2 Duo CPU T7500 @ ", "GHz",
551 (sizeof(pentium_merom) / sizeof(pentium_merom[0])),
556 #define NESTCPUS (sizeof(est_cpus) / sizeof(est_cpus[0]))
558 #define MSR2MV(msr) (((int) (msr) & 0xff) * 16 + 700)
559 #define MSR2MHZ(msr) (((((int) (msr) >> 8) & 0xff) * 100 * fsbmult + 1)/ 3)
560 #define MV2MSR(mv) ((((int) (mv) - 700) >> 4) & 0xff)
561 #define MHZ2MSR(mhz) (((3 * (mhz + 30) / (100 * fsbmult)) & 0xff) << 8)
562 /* XXX 30 is slop to deal with the 33.333 MHz roundoff values */
565 * Names and numbers from IA-32 System Programming Guide
566 * (not found in <machine/specialregs.h>
568 #define MSR_PERF_STATUS 0x198
569 #define MSR_PERF_CTL 0x199
571 static const struct fqlist *est_fqlist; /* not NULL if functional */
574 static const char est_desc[] = "Enhanced SpeedStep";
576 static char freqs_available[80];
579 est_sysctl_helper(SYSCTL_HANDLER_ARGS)
582 int fq, oldfq, err = 0;
585 if (est_fqlist == NULL)
588 oldfq = MSR2MHZ(rdmsr(MSR_PERF_CTL));
590 if (req->newptr != NULL) {
591 err = SYSCTL_IN(req, &fq, sizeof(fq));
596 for (i = est_fqlist->tablec - 1; i > 0; i--) {
597 if (est_fqlist->table[i].mhz >= fq)
600 fq = est_fqlist->table[i].mhz;
601 msr = (rdmsr(MSR_PERF_CTL) & ~0xffffULL) |
602 MV2MSR(est_fqlist->table[i].mv) |
603 MHZ2MSR(est_fqlist->table[i].mhz);
604 wrmsr(MSR_PERF_CTL, msr);
607 err = SYSCTL_OUT(req, &oldfq, sizeof(oldfq));
614 * Look for a CPU matching hw.model
616 static const struct fqlist *
617 findcpu(const char *hwmodel, int mv)
619 const struct est_cpu *ccpu;
620 const struct fqlist *fql;
626 for (ccpu = est_cpus; ccpu < est_cpus + NESTCPUS; ++ccpu) {
627 len = strlen(ccpu->brand_prefix);
628 if (strncmp(ccpu->brand_prefix, hwmodel, len) != 0)
631 for (i = 0; i < ccpu->listc; i++) {
632 fql = &ccpu->list[i];
633 len = strlen(fql->brand_tag);
634 if (strncmp(fql->brand_tag, tag, len) != 0 ||
635 strcmp(ccpu->brand_suffix, tag + len))
638 if (fql->cpu_id == 0 || fql->cpu_id == cpu_id) {
639 /* verify operating point is in table, because
640 CPUID + brand_tag still isn't unique. */
641 for (k = fql->tablec - 1; k >= 0; k--) {
642 if (fql->table[k].mv == mv)
652 static struct sysctl_ctx_list machdep_est_ctx;
658 int mib[] = { CTL_HW, HW_MODEL };
659 size_t modellen = sizeof(hwmodel);
660 struct sysctl_oid *oid, *leaf;
663 size_t len, freq_len;
667 if ((cpu_feature2 & CPUID2_EST) == 0) {
668 kprintf("Enhanced SpeedStep unsupported on this hardware.\n");
672 modellen = sizeof(hwmodel);
673 err = kernel_sysctl(mib, 2, hwmodel, &modellen, NULL, 0, NULL);
675 kprintf("kernel_sysctl hw.model failed\n");
679 msr = rdmsr(MSR_PERF_STATUS);
681 kprintf("%s (%d mV) ", est_desc, mv);
683 est_fqlist = findcpu(hwmodel, mv);
684 if (est_fqlist == NULL) {
685 kprintf(" - unknown CPU or operating point"
686 "(cpu_id:%#x, msr:%#jx).\n", cpu_id, (intmax_t)msr);
691 * OK, tell the user the available frequencies.
693 fsbmult = est_fqlist->fsbmult;
694 kprintf("%d MHz\n", MSR2MHZ(msr));
696 freq_len = est_fqlist->tablec * (sizeof("9999 ")-1) + 1;
697 if (freq_len >= sizeof(freqs_available)) {
698 kprintf("increase the size of freqs_available[]\n");
701 freqs_available[0] = '\0';
703 for (i = 0; i < est_fqlist->tablec; i++) {
704 len += ksnprintf(freqs_available + len, freq_len - len, "%d%s",
705 est_fqlist->table[i].mhz,
706 i < est_fqlist->tablec - 1 ? " " : "");
708 kprintf("%s frequencies available (MHz): %s\n", est_desc,
712 * Setup the sysctl sub-tree machdep.est.*
714 oid = SYSCTL_ADD_NODE(&machdep_est_ctx,
715 SYSCTL_STATIC_CHILDREN(_machdep), OID_AUTO, "est",
716 CTLFLAG_RD, NULL, "");
719 oid = SYSCTL_ADD_NODE(&machdep_est_ctx, SYSCTL_CHILDREN(oid),
720 OID_AUTO, "frequency", CTLFLAG_RD, NULL, "");
723 leaf = SYSCTL_ADD_PROC(&machdep_est_ctx, SYSCTL_CHILDREN(oid),
724 OID_AUTO, "target", CTLTYPE_INT | CTLFLAG_RW, NULL, 0,
725 est_sysctl_helper, "I",
726 "Target CPU frequency for Enhanced SpeedStep");
729 leaf = SYSCTL_ADD_PROC(&machdep_est_ctx, SYSCTL_CHILDREN(oid),
730 OID_AUTO, "current", CTLTYPE_INT | CTLFLAG_RD, NULL, 0,
731 est_sysctl_helper, "I",
732 "Current CPU frequency for Enhanced SpeedStep");
735 leaf = SYSCTL_ADD_STRING(&machdep_est_ctx, SYSCTL_CHILDREN(oid),
736 OID_AUTO, "available", CTLFLAG_RD, freqs_available,
737 sizeof(freqs_available),
738 "CPU frequencies supported by Enhanced SpeedStep");
746 est_modevh(struct module *m __unused, int what, void *arg __unused)
752 error = sysctl_ctx_init(&machdep_est_ctx);
758 error = sysctl_ctx_free(&machdep_est_ctx);
767 static moduledata_t est_mod = {
773 DECLARE_MODULE(est, est_mod, SI_BOOT2_KLD, SI_ORDER_ANY);