2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
27 #include <linux/i2c.h>
29 #include <drm/drm_crtc.h>
30 #include "intel_drv.h"
31 #include <drm/i915_drm.h>
35 #define SIL164_ADDR 0x38
36 #define CH7xxx_ADDR 0x76
37 #define TFP410_ADDR 0x38
38 #define NS2501_ADDR 0x38
40 static const struct intel_dvo_device intel_dvo_devices[] = {
42 .type = INTEL_DVO_CHIP_TMDS,
45 .slave_addr = SIL164_ADDR,
46 .dev_ops = &sil164_ops,
49 .type = INTEL_DVO_CHIP_TMDS,
52 .slave_addr = CH7xxx_ADDR,
53 .dev_ops = &ch7xxx_ops,
56 .type = INTEL_DVO_CHIP_TMDS,
59 .slave_addr = 0x75, /* For some ch7010 */
60 .dev_ops = &ch7xxx_ops,
63 .type = INTEL_DVO_CHIP_LVDS,
66 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
70 .type = INTEL_DVO_CHIP_TMDS,
73 .slave_addr = TFP410_ADDR,
74 .dev_ops = &tfp410_ops,
77 .type = INTEL_DVO_CHIP_LVDS,
81 .gpio = GMBUS_PORT_DPB,
82 .dev_ops = &ch7017_ops,
85 .type = INTEL_DVO_CHIP_TMDS,
88 .slave_addr = NS2501_ADDR,
89 .dev_ops = &ns2501_ops,
94 struct intel_encoder base;
96 struct intel_dvo_device dev;
98 struct drm_display_mode *panel_fixed_mode;
99 bool panel_wants_dither;
102 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
104 return container_of(encoder, struct intel_dvo, base);
107 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
109 return enc_to_dvo(intel_attached_encoder(connector));
112 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
114 struct drm_device *dev = connector->base.dev;
115 struct drm_i915_private *dev_priv = dev->dev_private;
116 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
119 tmp = I915_READ(intel_dvo->dev.dvo_reg);
121 if (!(tmp & DVO_ENABLE))
124 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
127 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
128 enum i915_pipe *pipe)
130 struct drm_device *dev = encoder->base.dev;
131 struct drm_i915_private *dev_priv = dev->dev_private;
132 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
135 tmp = I915_READ(intel_dvo->dev.dvo_reg);
137 if (!(tmp & DVO_ENABLE))
140 *pipe = PORT_TO_PIPE(tmp);
145 static void intel_dvo_get_config(struct intel_encoder *encoder,
146 struct intel_crtc_config *pipe_config)
148 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
149 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
152 tmp = I915_READ(intel_dvo->dev.dvo_reg);
153 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
154 flags |= DRM_MODE_FLAG_PHSYNC;
156 flags |= DRM_MODE_FLAG_NHSYNC;
157 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
158 flags |= DRM_MODE_FLAG_PVSYNC;
160 flags |= DRM_MODE_FLAG_NVSYNC;
162 pipe_config->adjusted_mode.flags |= flags;
164 pipe_config->adjusted_mode.crtc_clock = pipe_config->port_clock;
167 static void intel_disable_dvo(struct intel_encoder *encoder)
169 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
170 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
171 u32 dvo_reg = intel_dvo->dev.dvo_reg;
172 u32 temp = I915_READ(dvo_reg);
174 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
175 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
179 static void intel_enable_dvo(struct intel_encoder *encoder)
181 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
182 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
183 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
184 u32 dvo_reg = intel_dvo->dev.dvo_reg;
185 u32 temp = I915_READ(dvo_reg);
187 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
188 &crtc->config.requested_mode,
189 &crtc->config.adjusted_mode);
191 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
194 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
197 /* Special dpms function to support cloning between dvo/sdvo/crt. */
198 static void intel_dvo_dpms(struct drm_connector *connector, int mode)
200 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
201 struct drm_crtc *crtc;
202 struct intel_crtc_config *config;
204 /* dvo supports only 2 dpms states. */
205 if (mode != DRM_MODE_DPMS_ON)
206 mode = DRM_MODE_DPMS_OFF;
208 if (mode == connector->dpms)
211 connector->dpms = mode;
213 /* Only need to change hw state when actually enabled */
214 crtc = intel_dvo->base.base.crtc;
216 intel_dvo->base.connectors_active = false;
220 /* We call connector dpms manually below in case pipe dpms doesn't
221 * change due to cloning. */
222 if (mode == DRM_MODE_DPMS_ON) {
223 config = &to_intel_crtc(crtc)->config;
225 intel_dvo->base.connectors_active = true;
227 intel_crtc_update_dpms(crtc);
229 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
231 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
233 intel_dvo->base.connectors_active = false;
235 intel_crtc_update_dpms(crtc);
238 intel_modeset_check_state(connector->dev);
241 static enum drm_mode_status
242 intel_dvo_mode_valid(struct drm_connector *connector,
243 struct drm_display_mode *mode)
245 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
247 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
248 return MODE_NO_DBLESCAN;
250 /* XXX: Validate clock range */
252 if (intel_dvo->panel_fixed_mode) {
253 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
255 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
259 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
262 static bool intel_dvo_compute_config(struct intel_encoder *encoder,
263 struct intel_crtc_config *pipe_config)
265 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
266 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
268 /* If we have timings from the BIOS for the panel, put them in
269 * to the adjusted mode. The CRTC will be set up for this mode,
270 * with the panel scaling set up to source from the H/VDisplay
271 * of the original mode.
273 if (intel_dvo->panel_fixed_mode != NULL) {
274 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
286 drm_mode_set_crtcinfo(adjusted_mode, 0);
292 static void intel_dvo_pre_enable(struct intel_encoder *encoder)
294 struct drm_device *dev = encoder->base.dev;
295 struct drm_i915_private *dev_priv = dev->dev_private;
296 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
297 struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
298 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
299 int pipe = crtc->pipe;
301 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
306 dvo_srcdim_reg = DVOA_SRCDIM;
309 dvo_srcdim_reg = DVOB_SRCDIM;
312 dvo_srcdim_reg = DVOC_SRCDIM;
316 /* Save the data order, since I don't know what it should be set to. */
317 dvo_val = I915_READ(dvo_reg) &
318 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
319 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
320 DVO_BLANK_ACTIVE_HIGH;
323 dvo_val |= DVO_PIPE_B_SELECT;
324 dvo_val |= DVO_PIPE_STALL;
325 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
326 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
327 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
328 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
330 /*I915_WRITE(DVOB_SRCDIM,
331 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
332 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
333 I915_WRITE(dvo_srcdim_reg,
334 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
335 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
336 /*I915_WRITE(DVOB, dvo_val);*/
337 I915_WRITE(dvo_reg, dvo_val);
341 * Detect the output connection on our DVO device.
345 static enum drm_connector_status
346 intel_dvo_detect(struct drm_connector *connector, bool force)
348 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
349 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
350 connector->base.id, connector->name);
351 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
354 static int intel_dvo_get_modes(struct drm_connector *connector)
356 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
357 struct drm_i915_private *dev_priv = connector->dev->dev_private;
359 /* We should probably have an i2c driver get_modes function for those
360 * devices which will have a fixed set of modes determined by the chip
361 * (TV-out, for example), but for now with just TMDS and LVDS,
362 * that's not the case.
364 intel_ddc_get_modes(connector,
365 intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
366 if (!list_empty(&connector->probed_modes))
369 if (intel_dvo->panel_fixed_mode != NULL) {
370 struct drm_display_mode *mode;
371 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
373 drm_mode_probed_add(connector, mode);
381 static void intel_dvo_destroy(struct drm_connector *connector)
383 drm_connector_cleanup(connector);
387 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
388 .dpms = intel_dvo_dpms,
389 .detect = intel_dvo_detect,
390 .destroy = intel_dvo_destroy,
391 .fill_modes = drm_helper_probe_single_connector_modes,
394 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
395 .mode_valid = intel_dvo_mode_valid,
396 .get_modes = intel_dvo_get_modes,
397 .best_encoder = intel_best_encoder,
400 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
402 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
404 if (intel_dvo->dev.dev_ops->destroy)
405 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
407 kfree(intel_dvo->panel_fixed_mode);
409 intel_encoder_destroy(encoder);
412 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
413 .destroy = intel_dvo_enc_destroy,
417 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
419 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
420 * chip being on DVOB/C and having multiple pipes.
422 static struct drm_display_mode *
423 intel_dvo_get_current_mode(struct drm_connector *connector)
425 struct drm_device *dev = connector->dev;
426 struct drm_i915_private *dev_priv = dev->dev_private;
427 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
428 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
429 struct drm_display_mode *mode = NULL;
431 /* If the DVO port is active, that'll be the LVDS, so we can pull out
432 * its timings to get how the BIOS set up the panel.
434 if (dvo_val & DVO_ENABLE) {
435 struct drm_crtc *crtc;
436 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
438 crtc = intel_get_crtc_for_pipe(dev, pipe);
440 mode = intel_crtc_mode_get(dev, crtc);
442 mode->type |= DRM_MODE_TYPE_PREFERRED;
443 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
444 mode->flags |= DRM_MODE_FLAG_PHSYNC;
445 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
446 mode->flags |= DRM_MODE_FLAG_PVSYNC;
454 void intel_dvo_init(struct drm_device *dev)
456 struct drm_i915_private *dev_priv = dev->dev_private;
457 struct intel_encoder *intel_encoder;
458 struct intel_dvo *intel_dvo;
459 struct intel_connector *intel_connector;
461 int encoder_type = DRM_MODE_ENCODER_NONE;
463 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
467 intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
468 if (!intel_connector) {
473 intel_encoder = &intel_dvo->base;
474 drm_encoder_init(dev, &intel_encoder->base,
475 &intel_dvo_enc_funcs, encoder_type);
477 intel_encoder->disable = intel_disable_dvo;
478 intel_encoder->enable = intel_enable_dvo;
479 intel_encoder->get_hw_state = intel_dvo_get_hw_state;
480 intel_encoder->get_config = intel_dvo_get_config;
481 intel_encoder->compute_config = intel_dvo_compute_config;
482 intel_encoder->pre_enable = intel_dvo_pre_enable;
483 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
484 intel_connector->unregister = intel_connector_unregister;
486 /* Now, try to find a controller */
487 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
488 struct drm_connector *connector = &intel_connector->base;
489 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
494 /* Allow the I2C driver info to specify the GPIO to be used in
495 * special cases, but otherwise default to what's defined
498 if (intel_gmbus_is_port_valid(dvo->gpio))
500 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
501 gpio = GMBUS_PORT_SSC;
503 gpio = GMBUS_PORT_DPB;
505 /* Set up the I2C bus necessary for the chip we're probing.
506 * It appears that everything is on GPIOE except for panels
507 * on i830 laptops, which are on GPIOB (DVOA).
509 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
511 intel_dvo->dev = *dvo;
513 /* GMBUS NAK handling seems to be unstable, hence let the
514 * transmitter detection run in bit banging mode for now.
516 intel_gmbus_force_bit(i2c, true);
518 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
520 intel_gmbus_force_bit(i2c, false);
525 intel_encoder->type = INTEL_OUTPUT_DVO;
526 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
528 case INTEL_DVO_CHIP_TMDS:
529 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
530 (1 << INTEL_OUTPUT_DVO);
531 drm_connector_init(dev, connector,
532 &intel_dvo_connector_funcs,
533 DRM_MODE_CONNECTOR_DVII);
534 encoder_type = DRM_MODE_ENCODER_TMDS;
536 case INTEL_DVO_CHIP_LVDS:
537 intel_encoder->cloneable = 0;
538 drm_connector_init(dev, connector,
539 &intel_dvo_connector_funcs,
540 DRM_MODE_CONNECTOR_LVDS);
541 encoder_type = DRM_MODE_ENCODER_LVDS;
545 drm_connector_helper_add(connector,
546 &intel_dvo_connector_helper_funcs);
547 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
548 connector->interlace_allowed = false;
549 connector->doublescan_allowed = false;
551 intel_connector_attach_encoder(intel_connector, intel_encoder);
552 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
553 /* For our LVDS chipsets, we should hopefully be able
554 * to dig the fixed panel mode out of the BIOS data.
555 * However, it's in a different format from the BIOS
556 * data on chipsets with integrated LVDS (stored in AIM
557 * headers, likely), so for now, just get the current
558 * mode being output through DVO.
560 intel_dvo->panel_fixed_mode =
561 intel_dvo_get_current_mode(connector);
562 intel_dvo->panel_wants_dither = true;
565 drm_connector_register(connector);
569 drm_encoder_cleanup(&intel_encoder->base);
571 kfree(intel_connector);