1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
49 #include "insn-config.h"
55 /* Commonly used modes. */
57 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
58 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
59 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
60 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
62 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
63 After rtl generation, it is 1 plus the largest register number used. */
65 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Lowest label number in current function. */
74 static int first_label_num;
76 /* Highest label number in current function.
77 Zero means use the value of label_num instead.
78 This is nonzero only when belatedly compiling an inline function. */
80 static int last_label_num;
82 /* Value label_num had when set_new_first_and_last_label_number was called.
83 If label_num has not changed since then, last_label_num is valid. */
85 static int base_label_num;
87 /* Nonzero means do not generate NOTEs for source line numbers. */
89 static int no_line_numbers;
91 /* Commonly used rtx's, so that we only need space for one copy.
92 These are initialized once for the entire compilation.
93 All of these except perhaps the floating-point CONST_DOUBLEs
94 are unique; no other rtx-object will be equal to any of these. */
96 /* Avoid warnings by initializing the `fld' field. Since its a union,
97 bypass problems with KNR compilers by only doing so when __GNUC__. */
104 struct _global_rtl global_rtl =
106 {PC, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* pc_rtx */
107 {CC0, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* cc0_rtx */
108 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* stack_pointer_rtx */
109 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* frame_pointer_rtx */
110 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* hard_frame_pointer_rtx */
111 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* arg_pointer_rtx */
112 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_incoming_args_rtx */
113 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_vars_rtx */
114 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_dynamic_rtx */
115 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_outgoing_args_rtx */
116 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_cfa_rtx */
119 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
120 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
121 record a copy of const[012]_rtx. */
123 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
127 REAL_VALUE_TYPE dconst0;
128 REAL_VALUE_TYPE dconst1;
129 REAL_VALUE_TYPE dconst2;
130 REAL_VALUE_TYPE dconstm1;
132 /* All references to the following fixed hard registers go through
133 these unique rtl objects. On machines where the frame-pointer and
134 arg-pointer are the same register, they use the same unique object.
136 After register allocation, other rtl objects which used to be pseudo-regs
137 may be clobbered to refer to the frame-pointer register.
138 But references that were originally to the frame-pointer can be
139 distinguished from the others because they contain frame_pointer_rtx.
141 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
142 tricky: until register elimination has taken place hard_frame_pointer_rtx
143 should be used if it is being set, and frame_pointer_rtx otherwise. After
144 register elimination hard_frame_pointer_rtx should always be used.
145 On machines where the two registers are same (most) then these are the
148 In an inline procedure, the stack and frame pointer rtxs may not be
149 used for anything else. */
150 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
151 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
152 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
153 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
154 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
156 /* This is used to implement __builtin_return_address for some machines.
157 See for instance the MIPS port. */
158 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
160 /* We make one copy of (const_int C) where C is in
161 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
162 to save space during the compilation and simplify comparisons of
165 struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
167 /* The ends of the doubly-linked chain of rtl for the current function.
168 Both are reset to null at the start of rtl generation for the function.
170 start_sequence saves both of these on `sequence_stack' along with
171 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
173 static rtx first_insn = NULL;
174 static rtx last_insn = NULL;
176 /* RTL_EXPR within which the current sequence will be placed. Use to
177 prevent reuse of any temporaries within the sequence until after the
178 RTL_EXPR is emitted. */
180 tree sequence_rtl_expr = NULL;
182 /* INSN_UID for next insn emitted.
183 Reset to 1 for each function compiled. */
185 static int cur_insn_uid = 1;
187 /* Line number and source file of the last line-number NOTE emitted.
188 This is used to avoid generating duplicates. */
190 static int last_linenum = 0;
191 static char *last_filename = 0;
193 /* A vector indexed by pseudo reg number. The allocated length
194 of this vector is regno_pointer_flag_length. Since this
195 vector is needed during the expansion phase when the total
196 number of registers in the function is not yet known,
197 it is copied and made bigger when necessary. */
199 char *regno_pointer_flag;
200 int regno_pointer_flag_length;
202 /* Indexed by pseudo register number, if nonzero gives the known alignment
203 for that pseudo (if regno_pointer_flag is set).
204 Allocated in parallel with regno_pointer_flag. */
205 char *regno_pointer_align;
207 /* Indexed by pseudo register number, gives the rtx for that pseudo.
208 Allocated in parallel with regno_pointer_flag. */
212 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
213 Each element describes one pending sequence.
214 The main insn-chain is saved in the last element of the chain,
215 unless the chain is empty. */
217 struct sequence_stack *sequence_stack;
219 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
220 shortly thrown away. We use two mechanisms to prevent this waste:
222 First, we keep a list of the expressions used to represent the sequence
223 stack in sequence_element_free_list.
225 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
226 rtvec for use by gen_sequence. One entry for each size is sufficient
227 because most cases are calls to gen_sequence followed by immediately
228 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
229 destructive on the insn in it anyway and hence can't be redone.
231 We do not bother to save this cached data over nested function calls.
232 Instead, we just reinitialize them. */
234 #define SEQUENCE_RESULT_SIZE 5
236 static struct sequence_stack *sequence_element_free_list;
237 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
239 /* During RTL generation, we also keep a list of free INSN rtl codes. */
240 static rtx free_insn;
242 extern int rtx_equal_function_value_matters;
244 /* Filename and line number of last line-number note,
245 whether we actually emitted it or not. */
246 extern char *emit_filename;
247 extern int emit_lineno;
249 static rtx make_jump_insn_raw PROTO((rtx));
250 static rtx make_call_insn_raw PROTO((rtx));
251 static rtx find_line_note PROTO((rtx));
252 static void unshare_all_rtl_1 PROTO((rtx));
253 static void unshare_all_decls PROTO((tree));
254 static void reset_used_decls PROTO((tree));
257 gen_rtx_CONST_INT (mode, arg)
258 enum machine_mode mode;
261 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
262 return &const_int_rtx[arg + MAX_SAVED_CONST_INT];
264 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
265 if (const_true_rtx && arg == STORE_FLAG_VALUE)
266 return const_true_rtx;
269 return gen_rtx_raw_CONST_INT (mode, arg);
272 /* CONST_DOUBLEs needs special handling because its length is known
275 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
276 enum machine_mode mode;
278 HOST_WIDE_INT arg1, arg2;
280 rtx r = rtx_alloc (CONST_DOUBLE);
285 XEXP (r, 1) = NULL_RTX;
289 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
296 gen_rtx_REG (mode, regno)
297 enum machine_mode mode;
300 /* In case the MD file explicitly references the frame pointer, have
301 all such references point to the same frame pointer. This is
302 used during frame pointer elimination to distinguish the explicit
303 references to these registers from pseudos that happened to be
306 If we have eliminated the frame pointer or arg pointer, we will
307 be using it as a normal register, for example as a spill
308 register. In such cases, we might be accessing it in a mode that
309 is not Pmode and therefore cannot use the pre-allocated rtx.
311 Also don't do this when we are making new REGs in reload, since
312 we don't want to get confused with the real pointers. */
314 if (mode == Pmode && !reload_in_progress)
316 if (regno == FRAME_POINTER_REGNUM)
317 return frame_pointer_rtx;
318 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
319 if (regno == HARD_FRAME_POINTER_REGNUM)
320 return hard_frame_pointer_rtx;
322 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
323 if (regno == ARG_POINTER_REGNUM)
324 return arg_pointer_rtx;
326 #ifdef RETURN_ADDRESS_POINTER_REGNUM
327 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
328 return return_address_pointer_rtx;
330 if (regno == STACK_POINTER_REGNUM)
331 return stack_pointer_rtx;
334 return gen_rtx_raw_REG (mode, regno);
338 gen_rtx_MEM (mode, addr)
339 enum machine_mode mode;
342 rtx rt = gen_rtx_raw_MEM (mode, addr);
344 /* This field is not cleared by the mere allocation of the rtx, so
346 MEM_ALIAS_SET (rt) = 0;
351 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
353 ** This routine generates an RTX of the size specified by
354 ** <code>, which is an RTX code. The RTX structure is initialized
355 ** from the arguments <element1> through <elementn>, which are
356 ** interpreted according to the specific RTX type's format. The
357 ** special machine mode associated with the rtx (if any) is specified
360 ** gen_rtx can be invoked in a way which resembles the lisp-like
361 ** rtx it will generate. For example, the following rtx structure:
363 ** (plus:QI (mem:QI (reg:SI 1))
364 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
366 ** ...would be generated by the following C code:
368 ** gen_rtx (PLUS, QImode,
369 ** gen_rtx (MEM, QImode,
370 ** gen_rtx (REG, SImode, 1)),
371 ** gen_rtx (MEM, QImode,
372 ** gen_rtx (PLUS, SImode,
373 ** gen_rtx (REG, SImode, 2),
374 ** gen_rtx (REG, SImode, 3)))),
379 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
381 #ifndef ANSI_PROTOTYPES
383 enum machine_mode mode;
386 register int i; /* Array indices... */
387 register char *fmt; /* Current rtx's format... */
388 register rtx rt_val; /* RTX to return to caller... */
392 #ifndef ANSI_PROTOTYPES
393 code = va_arg (p, enum rtx_code);
394 mode = va_arg (p, enum machine_mode);
400 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
405 rtx arg0 = va_arg (p, rtx);
406 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
407 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
408 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
413 rt_val = gen_rtx_REG (mode, va_arg (p, int));
417 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
421 rt_val = rtx_alloc (code); /* Allocate the storage space. */
422 rt_val->mode = mode; /* Store the machine mode... */
424 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
425 for (i = 0; i < GET_RTX_LENGTH (code); i++)
429 case '0': /* Unused field. */
432 case 'i': /* An integer? */
433 XINT (rt_val, i) = va_arg (p, int);
436 case 'w': /* A wide integer? */
437 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
440 case 's': /* A string? */
441 XSTR (rt_val, i) = va_arg (p, char *);
444 case 'e': /* An expression? */
445 case 'u': /* An insn? Same except when printing. */
446 XEXP (rt_val, i) = va_arg (p, rtx);
449 case 'E': /* An RTX vector? */
450 XVEC (rt_val, i) = va_arg (p, rtvec);
453 case 'b': /* A bitmap? */
454 XBITMAP (rt_val, i) = va_arg (p, bitmap);
457 case 't': /* A tree? */
458 XTREE (rt_val, i) = va_arg (p, tree);
472 /* gen_rtvec (n, [rt1, ..., rtn])
474 ** This routine creates an rtvec and stores within it the
475 ** pointers to rtx's which are its arguments.
480 gen_rtvec VPROTO((int n, ...))
482 #ifndef ANSI_PROTOTYPES
491 #ifndef ANSI_PROTOTYPES
496 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
498 vector = (rtx *) alloca (n * sizeof (rtx));
500 for (i = 0; i < n; i++)
501 vector[i] = va_arg (p, rtx);
504 return gen_rtvec_v (n, vector);
508 gen_rtvec_v (n, argp)
513 register rtvec rt_val;
516 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
518 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
520 for (i = 0; i < n; i++)
521 rt_val->elem[i].rtx = *argp++;
527 gen_rtvec_vv (n, argp)
532 register rtvec rt_val;
535 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
537 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
539 for (i = 0; i < n; i++)
540 rt_val->elem[i].rtx = (argp++)->rtx;
545 /* Generate a REG rtx for a new pseudo register of mode MODE.
546 This pseudo is assigned the next sequential register number. */
550 enum machine_mode mode;
554 /* Don't let anything called after initial flow analysis create new
559 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
560 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
562 /* For complex modes, don't make a single pseudo.
563 Instead, make a CONCAT of two pseudos.
564 This allows noncontiguous allocation of the real and imaginary parts,
565 which makes much better code. Besides, allocating DCmode
566 pseudos overstrains reload on some machines like the 386. */
567 rtx realpart, imagpart;
568 int size = GET_MODE_UNIT_SIZE (mode);
569 enum machine_mode partmode
570 = mode_for_size (size * BITS_PER_UNIT,
571 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
572 ? MODE_FLOAT : MODE_INT),
575 realpart = gen_reg_rtx (partmode);
576 imagpart = gen_reg_rtx (partmode);
577 return gen_rtx_CONCAT (mode, realpart, imagpart);
580 /* Make sure regno_pointer_flag and regno_reg_rtx are large
581 enough to have an element for this pseudo reg number. */
583 if (reg_rtx_no == regno_pointer_flag_length)
587 (char *) savealloc (regno_pointer_flag_length * 2);
588 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
589 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
590 regno_pointer_flag = new;
592 new = (char *) savealloc (regno_pointer_flag_length * 2);
593 bcopy (regno_pointer_align, new, regno_pointer_flag_length);
594 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
595 regno_pointer_align = new;
597 new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx));
598 bcopy ((char *) regno_reg_rtx, (char *) new1,
599 regno_pointer_flag_length * sizeof (rtx));
600 bzero ((char *) &new1[regno_pointer_flag_length],
601 regno_pointer_flag_length * sizeof (rtx));
602 regno_reg_rtx = new1;
604 regno_pointer_flag_length *= 2;
607 val = gen_rtx_raw_REG (mode, reg_rtx_no);
608 regno_reg_rtx[reg_rtx_no++] = val;
612 /* Identify REG (which may be a CONCAT) as a user register. */
618 if (GET_CODE (reg) == CONCAT)
620 REG_USERVAR_P (XEXP (reg, 0)) = 1;
621 REG_USERVAR_P (XEXP (reg, 1)) = 1;
623 else if (GET_CODE (reg) == REG)
624 REG_USERVAR_P (reg) = 1;
629 /* Identify REG as a probable pointer register and show its alignment
630 as ALIGN, if nonzero. */
633 mark_reg_pointer (reg, align)
637 if (! REGNO_POINTER_FLAG (REGNO (reg)))
639 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
642 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
644 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
645 /* We can no-longer be sure just how aligned this pointer is */
646 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
649 /* Return 1 plus largest pseudo reg number used in the current function. */
657 /* Return 1 + the largest label number used so far in the current function. */
662 if (last_label_num && label_num == base_label_num)
663 return last_label_num;
667 /* Return first label number used in this function (if any were used). */
670 get_first_label_num ()
672 return first_label_num;
675 /* Return a value representing some low-order bits of X, where the number
676 of low-order bits is given by MODE. Note that no conversion is done
677 between floating-point and fixed-point values, rather, the bit
678 representation is returned.
680 This function handles the cases in common between gen_lowpart, below,
681 and two variants in cse.c and combine.c. These are the cases that can
682 be safely handled at all points in the compilation.
684 If this is not a case we can handle, return 0. */
687 gen_lowpart_common (mode, x)
688 enum machine_mode mode;
693 if (GET_MODE (x) == mode)
696 /* MODE must occupy no more words than the mode of X. */
697 if (GET_MODE (x) != VOIDmode
698 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
699 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
703 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
704 word = ((GET_MODE_SIZE (GET_MODE (x))
705 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
708 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
709 && (GET_MODE_CLASS (mode) == MODE_INT
710 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
712 /* If we are getting the low-order part of something that has been
713 sign- or zero-extended, we can either just use the object being
714 extended or make a narrower extension. If we want an even smaller
715 piece than the size of the object being extended, call ourselves
718 This case is used mostly by combine and cse. */
720 if (GET_MODE (XEXP (x, 0)) == mode)
722 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
723 return gen_lowpart_common (mode, XEXP (x, 0));
724 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
725 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
727 else if (GET_CODE (x) == SUBREG
728 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
729 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
730 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
732 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
733 else if (GET_CODE (x) == REG)
735 /* Let the backend decide how many registers to skip. This is needed
736 in particular for Sparc64 where fp regs are smaller than a word. */
737 /* ??? Note that subregs are now ambiguous, in that those against
738 pseudos are sized by the Word Size, while those against hard
739 regs are sized by the underlying register size. Better would be
740 to always interpret the subreg offset parameter as bytes or bits. */
742 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
743 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
744 - HARD_REGNO_NREGS (REGNO (x), mode));
746 /* If the register is not valid for MODE, return 0. If we don't
747 do this, there is no way to fix up the resulting REG later.
748 But we do do this if the current REG is not valid for its
749 mode. This latter is a kludge, but is required due to the
750 way that parameters are passed on some machines, most
752 if (REGNO (x) < FIRST_PSEUDO_REGISTER
753 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
754 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
756 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
757 /* integrate.c can't handle parts of a return value register. */
758 && (! REG_FUNCTION_VALUE_P (x)
759 || ! rtx_equal_function_value_matters)
760 #ifdef CLASS_CANNOT_CHANGE_SIZE
761 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
762 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
763 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
764 && (TEST_HARD_REG_BIT
765 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
768 /* We want to keep the stack, frame, and arg pointers
770 && x != frame_pointer_rtx
771 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
772 && x != arg_pointer_rtx
774 && x != stack_pointer_rtx)
775 return gen_rtx_REG (mode, REGNO (x) + word);
777 return gen_rtx_SUBREG (mode, x, word);
779 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
780 from the low-order part of the constant. */
781 else if ((GET_MODE_CLASS (mode) == MODE_INT
782 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
783 && GET_MODE (x) == VOIDmode
784 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
786 /* If MODE is twice the host word size, X is already the desired
787 representation. Otherwise, if MODE is wider than a word, we can't
788 do this. If MODE is exactly a word, return just one CONST_INT.
789 If MODE is smaller than a word, clear the bits that don't belong
790 in our mode, unless they and our sign bit are all one. So we get
791 either a reasonable negative value or a reasonable unsigned value
794 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
796 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
798 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
799 return (GET_CODE (x) == CONST_INT ? x
800 : GEN_INT (CONST_DOUBLE_LOW (x)));
803 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
804 int width = GET_MODE_BITSIZE (mode);
805 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
806 : CONST_DOUBLE_LOW (x));
808 /* Sign extend to HOST_WIDE_INT. */
809 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
811 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
816 /* If X is an integral constant but we want it in floating-point, it
817 must be the case that we have a union of an integer and a floating-point
818 value. If the machine-parameters allow it, simulate that union here
819 and return the result. The two-word and single-word cases are
822 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
823 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
824 || flag_pretend_float)
825 && GET_MODE_CLASS (mode) == MODE_FLOAT
826 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
827 && GET_CODE (x) == CONST_INT
828 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
829 #ifdef REAL_ARITHMETIC
835 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
836 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
840 union {HOST_WIDE_INT i; float d; } u;
843 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
846 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
847 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
848 || flag_pretend_float)
849 && GET_MODE_CLASS (mode) == MODE_FLOAT
850 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
851 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
852 && GET_MODE (x) == VOIDmode
853 && (sizeof (double) * HOST_BITS_PER_CHAR
854 == 2 * HOST_BITS_PER_WIDE_INT))
855 #ifdef REAL_ARITHMETIC
859 HOST_WIDE_INT low, high;
861 if (GET_CODE (x) == CONST_INT)
862 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
864 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
866 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
868 if (WORDS_BIG_ENDIAN)
869 i[0] = high, i[1] = low;
871 i[0] = low, i[1] = high;
873 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
874 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
878 union {HOST_WIDE_INT i[2]; double d; } u;
879 HOST_WIDE_INT low, high;
881 if (GET_CODE (x) == CONST_INT)
882 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
884 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
886 #ifdef HOST_WORDS_BIG_ENDIAN
887 u.i[0] = high, u.i[1] = low;
889 u.i[0] = low, u.i[1] = high;
892 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
896 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
897 same as sizeof (double) or when sizeof (float) is larger than the
898 size of a word on the target machine. */
899 #ifdef REAL_ARITHMETIC
900 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
906 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
907 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
909 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
910 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
911 || flag_pretend_float)
912 && GET_MODE_CLASS (mode) == MODE_FLOAT
913 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
914 && GET_CODE (x) == CONST_INT
915 && (sizeof (double) * HOST_BITS_PER_CHAR
916 == HOST_BITS_PER_WIDE_INT))
922 r = REAL_VALUE_FROM_TARGET_DOUBLE (&i);
923 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
927 /* Similarly, if this is converting a floating-point value into a
928 single-word integer. Only do this is the host and target parameters are
931 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
932 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
933 || flag_pretend_float)
934 && (GET_MODE_CLASS (mode) == MODE_INT
935 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
936 && GET_CODE (x) == CONST_DOUBLE
937 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
938 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
939 return operand_subword (x, word, 0, GET_MODE (x));
941 /* Similarly, if this is converting a floating-point value into a
942 two-word integer, we can do this one word at a time and make an
943 integer. Only do this is the host and target parameters are
946 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
947 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
948 || flag_pretend_float)
949 && (GET_MODE_CLASS (mode) == MODE_INT
950 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
951 && GET_CODE (x) == CONST_DOUBLE
952 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
953 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
956 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
958 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
960 if (lowpart && GET_CODE (lowpart) == CONST_INT
961 && highpart && GET_CODE (highpart) == CONST_INT)
962 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
965 /* Otherwise, we can't do this. */
969 /* Return the real part (which has mode MODE) of a complex value X.
970 This always comes at the low address in memory. */
973 gen_realpart (mode, x)
974 enum machine_mode mode;
977 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
979 else if (WORDS_BIG_ENDIAN
980 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
982 && REGNO (x) < FIRST_PSEUDO_REGISTER)
983 fatal ("Unable to access real part of complex value in a hard register on this target");
984 else if (WORDS_BIG_ENDIAN)
985 return gen_highpart (mode, x);
987 return gen_lowpart (mode, x);
990 /* Return the imaginary part (which has mode MODE) of a complex value X.
991 This always comes at the high address in memory. */
994 gen_imagpart (mode, x)
995 enum machine_mode mode;
998 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
1000 else if (WORDS_BIG_ENDIAN)
1001 return gen_lowpart (mode, x);
1002 else if (!WORDS_BIG_ENDIAN
1003 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1005 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1006 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
1008 return gen_highpart (mode, x);
1011 /* Return 1 iff X, assumed to be a SUBREG,
1012 refers to the real part of the complex value in its containing reg.
1013 Complex values are always stored with the real part in the first word,
1014 regardless of WORDS_BIG_ENDIAN. */
1017 subreg_realpart_p (x)
1020 if (GET_CODE (x) != SUBREG)
1023 return SUBREG_WORD (x) * UNITS_PER_WORD < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x)));
1026 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1027 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1028 least-significant part of X.
1029 MODE specifies how big a part of X to return;
1030 it usually should not be larger than a word.
1031 If X is a MEM whose address is a QUEUED, the value may be so also. */
1034 gen_lowpart (mode, x)
1035 enum machine_mode mode;
1038 rtx result = gen_lowpart_common (mode, x);
1042 else if (GET_CODE (x) == REG)
1044 /* Must be a hard reg that's not valid in MODE. */
1045 result = gen_lowpart_common (mode, copy_to_reg (x));
1050 else if (GET_CODE (x) == MEM)
1052 /* The only additional case we can do is MEM. */
1053 register int offset = 0;
1054 if (WORDS_BIG_ENDIAN)
1055 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1056 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1058 if (BYTES_BIG_ENDIAN)
1059 /* Adjust the address so that the address-after-the-data
1061 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1062 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1064 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1066 else if (GET_CODE (x) == ADDRESSOF)
1067 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1072 /* Like `gen_lowpart', but refer to the most significant part.
1073 This is used to access the imaginary part of a complex number. */
1076 gen_highpart (mode, x)
1077 enum machine_mode mode;
1080 /* This case loses if X is a subreg. To catch bugs early,
1081 complain if an invalid MODE is used even in other cases. */
1082 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
1083 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1085 if (GET_CODE (x) == CONST_DOUBLE
1086 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1087 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1090 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1091 else if (GET_CODE (x) == CONST_INT)
1093 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1095 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1097 else if (GET_CODE (x) == MEM)
1099 register int offset = 0;
1100 if (! WORDS_BIG_ENDIAN)
1101 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1102 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1104 if (! BYTES_BIG_ENDIAN
1105 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1106 offset -= (GET_MODE_SIZE (mode)
1107 - MIN (UNITS_PER_WORD,
1108 GET_MODE_SIZE (GET_MODE (x))));
1110 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1112 else if (GET_CODE (x) == SUBREG)
1114 /* The only time this should occur is when we are looking at a
1115 multi-word item with a SUBREG whose mode is the same as that of the
1116 item. It isn't clear what we would do if it wasn't. */
1117 if (SUBREG_WORD (x) != 0)
1119 return gen_highpart (mode, SUBREG_REG (x));
1121 else if (GET_CODE (x) == REG)
1125 /* Let the backend decide how many registers to skip. This is needed
1126 in particular for sparc64 where fp regs are smaller than a word. */
1127 /* ??? Note that subregs are now ambiguous, in that those against
1128 pseudos are sized by the word size, while those against hard
1129 regs are sized by the underlying register size. Better would be
1130 to always interpret the subreg offset parameter as bytes or bits. */
1132 if (WORDS_BIG_ENDIAN)
1134 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1135 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1136 - HARD_REGNO_NREGS (REGNO (x), mode));
1138 word = ((GET_MODE_SIZE (GET_MODE (x))
1139 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1142 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1143 /* integrate.c can't handle parts of a return value register. */
1144 && (! REG_FUNCTION_VALUE_P (x)
1145 || ! rtx_equal_function_value_matters)
1146 /* We want to keep the stack, frame, and arg pointers special. */
1147 && x != frame_pointer_rtx
1148 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1149 && x != arg_pointer_rtx
1151 && x != stack_pointer_rtx)
1152 return gen_rtx_REG (mode, REGNO (x) + word);
1154 return gen_rtx_SUBREG (mode, x, word);
1160 /* Return 1 iff X, assumed to be a SUBREG,
1161 refers to the least significant part of its containing reg.
1162 If X is not a SUBREG, always return 1 (it is its own low part!). */
1165 subreg_lowpart_p (x)
1168 if (GET_CODE (x) != SUBREG)
1170 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1173 if (WORDS_BIG_ENDIAN
1174 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1175 return (SUBREG_WORD (x)
1176 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1177 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1180 return SUBREG_WORD (x) == 0;
1183 /* Return subword I of operand OP.
1184 The word number, I, is interpreted as the word number starting at the
1185 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1186 otherwise it is the high-order word.
1188 If we cannot extract the required word, we return zero. Otherwise, an
1189 rtx corresponding to the requested word will be returned.
1191 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1192 reload has completed, a valid address will always be returned. After
1193 reload, if a valid address cannot be returned, we return zero.
1195 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1196 it is the responsibility of the caller.
1198 MODE is the mode of OP in case it is a CONST_INT. */
1201 operand_subword (op, i, validate_address, mode)
1204 int validate_address;
1205 enum machine_mode mode;
1208 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1209 int bits_per_word = BITS_PER_WORD;
1211 if (mode == VOIDmode)
1212 mode = GET_MODE (op);
1214 if (mode == VOIDmode)
1217 /* If OP is narrower than a word, fail. */
1219 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1222 /* If we want a word outside OP, return zero. */
1224 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1227 /* If OP is already an integer word, return it. */
1228 if (GET_MODE_CLASS (mode) == MODE_INT
1229 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1232 /* If OP is a REG or SUBREG, we can handle it very simply. */
1233 if (GET_CODE (op) == REG)
1235 /* ??? There is a potential problem with this code. It does not
1236 properly handle extractions of a subword from a hard register
1237 that is larger than word_mode. Presumably the check for
1238 HARD_REGNO_MODE_OK catches these most of these cases. */
1240 /* If OP is a hard register, but OP + I is not a hard register,
1241 then extracting a subword is impossible.
1243 For example, consider if OP is the last hard register and it is
1244 larger than word_mode. If we wanted word N (for N > 0) because a
1245 part of that hard register was known to contain a useful value,
1246 then OP + I would refer to a pseudo, not the hard register we
1248 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1249 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1252 /* If the register is not valid for MODE, return 0. Note we
1253 have to check both OP and OP + I since they may refer to
1254 different parts of the register file.
1256 Consider if OP refers to the last 96bit FP register and we want
1257 subword 3 because that subword is known to contain a value we
1259 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1260 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1261 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1263 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1264 || (REG_FUNCTION_VALUE_P (op)
1265 && rtx_equal_function_value_matters)
1266 /* We want to keep the stack, frame, and arg pointers
1268 || op == frame_pointer_rtx
1269 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1270 || op == arg_pointer_rtx
1272 || op == stack_pointer_rtx)
1273 return gen_rtx_SUBREG (word_mode, op, i);
1275 return gen_rtx_REG (word_mode, REGNO (op) + i);
1277 else if (GET_CODE (op) == SUBREG)
1278 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1279 else if (GET_CODE (op) == CONCAT)
1281 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1283 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1284 return operand_subword (XEXP (op, 1), i - partwords,
1285 validate_address, mode);
1288 /* Form a new MEM at the requested address. */
1289 if (GET_CODE (op) == MEM)
1291 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1294 if (validate_address)
1296 if (reload_completed)
1298 if (! strict_memory_address_p (word_mode, addr))
1302 addr = memory_address (word_mode, addr);
1305 new = gen_rtx_MEM (word_mode, addr);
1307 MEM_COPY_ATTRIBUTES (new, op);
1308 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1313 /* The only remaining cases are when OP is a constant. If the host and
1314 target floating formats are the same, handling two-word floating
1315 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1316 are defined as returning one or two 32 bit values, respectively,
1317 and not values of BITS_PER_WORD bits. */
1318 #ifdef REAL_ARITHMETIC
1319 /* The output is some bits, the width of the target machine's word.
1320 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1322 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1323 && GET_MODE_CLASS (mode) == MODE_FLOAT
1324 && GET_MODE_BITSIZE (mode) == 64
1325 && GET_CODE (op) == CONST_DOUBLE)
1330 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1331 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1333 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1334 which the words are written depends on the word endianness.
1335 ??? This is a potential portability problem and should
1336 be fixed at some point.
1338 We must excercise caution with the sign bit. By definition there
1339 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1340 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1341 So we explicitly mask and sign-extend as necessary. */
1342 if (BITS_PER_WORD == 32)
1345 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1346 return GEN_INT (val);
1348 #if HOST_BITS_PER_WIDE_INT >= 64
1349 else if (BITS_PER_WORD >= 64 && i == 0)
1351 val = k[! WORDS_BIG_ENDIAN];
1352 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1353 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1354 return GEN_INT (val);
1357 else if (BITS_PER_WORD == 16)
1360 if ((i & 1) == !WORDS_BIG_ENDIAN)
1363 return GEN_INT (val);
1368 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1369 && GET_MODE_CLASS (mode) == MODE_FLOAT
1370 && GET_MODE_BITSIZE (mode) > 64
1371 && GET_CODE (op) == CONST_DOUBLE)
1376 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1377 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1379 if (BITS_PER_WORD == 32)
1382 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1383 return GEN_INT (val);
1388 #else /* no REAL_ARITHMETIC */
1389 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1390 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1391 || flag_pretend_float)
1392 && GET_MODE_CLASS (mode) == MODE_FLOAT
1393 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1394 && GET_CODE (op) == CONST_DOUBLE)
1396 /* The constant is stored in the host's word-ordering,
1397 but we want to access it in the target's word-ordering. Some
1398 compilers don't like a conditional inside macro args, so we have two
1399 copies of the return. */
1400 #ifdef HOST_WORDS_BIG_ENDIAN
1401 return GEN_INT (i == WORDS_BIG_ENDIAN
1402 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1404 return GEN_INT (i != WORDS_BIG_ENDIAN
1405 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1408 #endif /* no REAL_ARITHMETIC */
1410 /* Single word float is a little harder, since single- and double-word
1411 values often do not have the same high-order bits. We have already
1412 verified that we want the only defined word of the single-word value. */
1413 #ifdef REAL_ARITHMETIC
1414 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1415 && GET_MODE_BITSIZE (mode) == 32
1416 && GET_CODE (op) == CONST_DOUBLE)
1421 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1422 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1424 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1426 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1428 if (BITS_PER_WORD == 16)
1430 if ((i & 1) == !WORDS_BIG_ENDIAN)
1435 return GEN_INT (val);
1438 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1439 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1440 || flag_pretend_float)
1441 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1442 && GET_MODE_CLASS (mode) == MODE_FLOAT
1443 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1444 && GET_CODE (op) == CONST_DOUBLE)
1447 union {float f; HOST_WIDE_INT i; } u;
1449 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1452 return GEN_INT (u.i);
1454 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1455 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1456 || flag_pretend_float)
1457 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1458 && GET_MODE_CLASS (mode) == MODE_FLOAT
1459 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1460 && GET_CODE (op) == CONST_DOUBLE)
1463 union {double d; HOST_WIDE_INT i; } u;
1465 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1468 return GEN_INT (u.i);
1470 #endif /* no REAL_ARITHMETIC */
1472 /* The only remaining cases that we can handle are integers.
1473 Convert to proper endianness now since these cases need it.
1474 At this point, i == 0 means the low-order word.
1476 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1477 in general. However, if OP is (const_int 0), we can just return
1480 if (op == const0_rtx)
1483 if (GET_MODE_CLASS (mode) != MODE_INT
1484 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1485 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1488 if (WORDS_BIG_ENDIAN)
1489 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1491 /* Find out which word on the host machine this value is in and get
1492 it from the constant. */
1493 val = (i / size_ratio == 0
1494 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1495 : (GET_CODE (op) == CONST_INT
1496 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1498 /* Get the value we want into the low bits of val. */
1499 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1500 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1502 /* Clear the bits that don't belong in our mode, unless they and our sign
1503 bit are all one. So we get either a reasonable negative value or a
1504 reasonable unsigned value for this mode. */
1505 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1506 && ((val & ((HOST_WIDE_INT) (-1) << (bits_per_word - 1)))
1507 != ((HOST_WIDE_INT) (-1) << (bits_per_word - 1))))
1508 val &= ((HOST_WIDE_INT) 1 << bits_per_word) - 1;
1510 /* If this would be an entire word for the target, but is not for
1511 the host, then sign-extend on the host so that the number will look
1512 the same way on the host that it would on the target.
1514 For example, when building a 64 bit alpha hosted 32 bit sparc
1515 targeted compiler, then we want the 32 bit unsigned value -1 to be
1516 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
1517 The later confuses the sparc backend. */
1519 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1520 && (val & ((HOST_WIDE_INT) 1 << (bits_per_word - 1))))
1521 val |= ((HOST_WIDE_INT) (-1) << bits_per_word);
1523 return GEN_INT (val);
1526 /* Similar to `operand_subword', but never return 0. If we can't extract
1527 the required subword, put OP into a register and try again. If that fails,
1528 abort. We always validate the address in this case. It is not valid
1529 to call this function after reload; it is mostly meant for RTL
1532 MODE is the mode of OP, in case it is CONST_INT. */
1535 operand_subword_force (op, i, mode)
1538 enum machine_mode mode;
1540 rtx result = operand_subword (op, i, 1, mode);
1545 if (mode != BLKmode && mode != VOIDmode)
1547 /* If this is a register which can not be accessed by words, copy it
1548 to a pseudo register. */
1549 if (GET_CODE (op) == REG)
1550 op = copy_to_reg (op);
1552 op = force_reg (mode, op);
1555 result = operand_subword (op, i, 1, mode);
1562 /* Given a compare instruction, swap the operands.
1563 A test instruction is changed into a compare of 0 against the operand. */
1566 reverse_comparison (insn)
1569 rtx body = PATTERN (insn);
1572 if (GET_CODE (body) == SET)
1573 comp = SET_SRC (body);
1575 comp = SET_SRC (XVECEXP (body, 0, 0));
1577 if (GET_CODE (comp) == COMPARE)
1579 rtx op0 = XEXP (comp, 0);
1580 rtx op1 = XEXP (comp, 1);
1581 XEXP (comp, 0) = op1;
1582 XEXP (comp, 1) = op0;
1586 rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp);
1587 if (GET_CODE (body) == SET)
1588 SET_SRC (body) = new;
1590 SET_SRC (XVECEXP (body, 0, 0)) = new;
1594 /* Return a memory reference like MEMREF, but with its mode changed
1595 to MODE and its address changed to ADDR.
1596 (VOIDmode means don't change the mode.
1597 NULL for ADDR means don't change the address.) */
1600 change_address (memref, mode, addr)
1602 enum machine_mode mode;
1607 if (GET_CODE (memref) != MEM)
1609 if (mode == VOIDmode)
1610 mode = GET_MODE (memref);
1612 addr = XEXP (memref, 0);
1614 /* If reload is in progress or has completed, ADDR must be valid.
1615 Otherwise, we can call memory_address to make it valid. */
1616 if (reload_completed || reload_in_progress)
1618 if (! memory_address_p (mode, addr))
1622 addr = memory_address (mode, addr);
1624 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1627 new = gen_rtx_MEM (mode, addr);
1628 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1629 MEM_COPY_ATTRIBUTES (new, memref);
1633 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1640 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1641 NULL_RTX, label_num++, NULL_PTR);
1643 LABEL_NUSES (label) = 0;
1647 /* For procedure integration. */
1649 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1650 from a permanent obstack when the opportunity arises. */
1653 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1654 last_labelno, max_parm_regnum, max_regnum, args_size,
1655 pops_args, stack_slots, forced_labels, function_flags,
1656 outgoing_args_size, original_arg_vector,
1657 original_decl_initial, regno_rtx, regno_flag,
1658 regno_align, parm_reg_stack_loc)
1659 rtx first_insn, first_parm_insn;
1660 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1665 int outgoing_args_size;
1666 rtvec original_arg_vector;
1667 rtx original_decl_initial;
1671 rtvec parm_reg_stack_loc;
1673 rtx header = gen_rtx_INLINE_HEADER (VOIDmode,
1674 cur_insn_uid++, NULL_RTX,
1675 first_insn, first_parm_insn,
1676 first_labelno, last_labelno,
1677 max_parm_regnum, max_regnum, args_size,
1678 pops_args, stack_slots, forced_labels,
1679 function_flags, outgoing_args_size,
1680 original_arg_vector,
1681 original_decl_initial,
1682 regno_rtx, regno_flag, regno_align,
1683 parm_reg_stack_loc);
1687 /* Install new pointers to the first and last insns in the chain.
1688 Also, set cur_insn_uid to one higher than the last in use.
1689 Used for an inline-procedure after copying the insn chain. */
1692 set_new_first_and_last_insn (first, last)
1701 for (insn = first; insn; insn = NEXT_INSN (insn))
1702 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1707 /* Set the range of label numbers found in the current function.
1708 This is used when belatedly compiling an inline function. */
1711 set_new_first_and_last_label_num (first, last)
1714 base_label_num = label_num;
1715 first_label_num = first;
1716 last_label_num = last;
1719 /* Save all variables describing the current status into the structure *P.
1720 This is used before starting a nested function. */
1723 save_emit_status (p)
1726 p->reg_rtx_no = reg_rtx_no;
1727 p->first_label_num = first_label_num;
1728 p->first_insn = first_insn;
1729 p->last_insn = last_insn;
1730 p->sequence_rtl_expr = sequence_rtl_expr;
1731 p->sequence_stack = sequence_stack;
1732 p->cur_insn_uid = cur_insn_uid;
1733 p->last_linenum = last_linenum;
1734 p->last_filename = last_filename;
1735 p->regno_pointer_flag = regno_pointer_flag;
1736 p->regno_pointer_align = regno_pointer_align;
1737 p->regno_pointer_flag_length = regno_pointer_flag_length;
1738 p->regno_reg_rtx = regno_reg_rtx;
1741 /* Restore all variables describing the current status from the structure *P.
1742 This is used after a nested function. */
1745 restore_emit_status (p)
1750 reg_rtx_no = p->reg_rtx_no;
1751 first_label_num = p->first_label_num;
1753 first_insn = p->first_insn;
1754 last_insn = p->last_insn;
1755 sequence_rtl_expr = p->sequence_rtl_expr;
1756 sequence_stack = p->sequence_stack;
1757 cur_insn_uid = p->cur_insn_uid;
1758 last_linenum = p->last_linenum;
1759 last_filename = p->last_filename;
1760 regno_pointer_flag = p->regno_pointer_flag;
1761 regno_pointer_align = p->regno_pointer_align;
1762 regno_pointer_flag_length = p->regno_pointer_flag_length;
1763 regno_reg_rtx = p->regno_reg_rtx;
1765 /* Clear our cache of rtx expressions for start_sequence and
1767 sequence_element_free_list = 0;
1768 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1769 sequence_result[i] = 0;
1774 /* Go through all the RTL insn bodies and copy any invalid shared
1775 structure. This routine should only be called once. */
1778 unshare_all_rtl (fndecl, insn)
1784 /* Make sure that virtual stack slots are not shared. */
1785 reset_used_decls (DECL_INITIAL (current_function_decl));
1787 /* Make sure that virtual parameters are not shared. */
1788 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1789 DECL_RTL (decl) = copy_rtx_if_shared (DECL_RTL (decl));
1791 /* Make sure that virtual stack slots are not shared. */
1792 unshare_all_decls (DECL_INITIAL (fndecl));
1794 /* Unshare just about everything else. */
1795 unshare_all_rtl_1 (insn);
1797 /* Make sure the addresses of stack slots found outside the insn chain
1798 (such as, in DECL_RTL of a variable) are not shared
1799 with the insn chain.
1801 This special care is necessary when the stack slot MEM does not
1802 actually appear in the insn chain. If it does appear, its address
1803 is unshared from all else at that point. */
1804 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1807 /* Go through all the RTL insn bodies and copy any invalid shared
1808 structure, again. This is a fairly expensive thing to do so it
1809 should be done sparingly. */
1812 unshare_all_rtl_again (insn)
1816 for (p = insn; p; p = NEXT_INSN (p))
1817 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
1819 reset_used_flags (PATTERN (p));
1820 reset_used_flags (REG_NOTES (p));
1821 reset_used_flags (LOG_LINKS (p));
1823 unshare_all_rtl_1 (insn);
1826 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1827 Assumes the mark bits are cleared at entry. */
1830 unshare_all_rtl_1 (insn)
1833 for (; insn; insn = NEXT_INSN (insn))
1834 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1836 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1837 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1838 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1842 /* Go through all virtual stack slots of a function and copy any
1843 shared structure. */
1845 unshare_all_decls (blk)
1850 /* Copy shared decls. */
1851 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1852 DECL_RTL (t) = copy_rtx_if_shared (DECL_RTL (t));
1854 /* Now process sub-blocks. */
1855 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1856 unshare_all_decls (t);
1859 /* Go through all virtual stack slots of a function and mark them as
1862 reset_used_decls (blk)
1868 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1869 reset_used_flags (DECL_RTL (t));
1871 /* Now process sub-blocks. */
1872 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1873 reset_used_decls (t);
1876 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1877 Recursively does the same for subexpressions. */
1880 copy_rtx_if_shared (orig)
1883 register rtx x = orig;
1885 register enum rtx_code code;
1886 register char *format_ptr;
1892 code = GET_CODE (x);
1894 /* These types may be freely shared. */
1907 /* SCRATCH must be shared because they represent distinct values. */
1911 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1912 a LABEL_REF, it isn't sharable. */
1913 if (GET_CODE (XEXP (x, 0)) == PLUS
1914 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1915 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1924 /* The chain of insns is not being copied. */
1928 /* A MEM is allowed to be shared if its address is constant.
1930 We used to allow sharing of MEMs which referenced
1931 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1932 that can lose. instantiate_virtual_regs will not unshare
1933 the MEMs, and combine may change the structure of the address
1934 because it looks safe and profitable in one context, but
1935 in some other context it creates unrecognizable RTL. */
1936 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1945 /* This rtx may not be shared. If it has already been seen,
1946 replace it with a copy of itself. */
1952 copy = rtx_alloc (code);
1953 bcopy ((char *) x, (char *) copy,
1954 (sizeof (*copy) - sizeof (copy->fld)
1955 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1961 /* Now scan the subexpressions recursively.
1962 We can store any replaced subexpressions directly into X
1963 since we know X is not shared! Any vectors in X
1964 must be copied if X was copied. */
1966 format_ptr = GET_RTX_FORMAT (code);
1968 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1970 switch (*format_ptr++)
1973 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1977 if (XVEC (x, i) != NULL)
1980 int len = XVECLEN (x, i);
1982 if (copied && len > 0)
1983 XVEC (x, i) = gen_rtvec_vv (len, XVEC (x, i)->elem);
1984 for (j = 0; j < len; j++)
1985 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1993 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1994 to look for shared sub-parts. */
1997 reset_used_flags (x)
2001 register enum rtx_code code;
2002 register char *format_ptr;
2007 code = GET_CODE (x);
2009 /* These types may be freely shared so we needn't do any resetting
2030 /* The chain of insns is not being copied. */
2039 format_ptr = GET_RTX_FORMAT (code);
2040 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2042 switch (*format_ptr++)
2045 reset_used_flags (XEXP (x, i));
2049 for (j = 0; j < XVECLEN (x, i); j++)
2050 reset_used_flags (XVECEXP (x, i, j));
2056 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2057 Return X or the rtx for the pseudo reg the value of X was copied into.
2058 OTHER must be valid as a SET_DEST. */
2061 make_safe_from (x, other)
2065 switch (GET_CODE (other))
2068 other = SUBREG_REG (other);
2070 case STRICT_LOW_PART:
2073 other = XEXP (other, 0);
2079 if ((GET_CODE (other) == MEM
2081 && GET_CODE (x) != REG
2082 && GET_CODE (x) != SUBREG)
2083 || (GET_CODE (other) == REG
2084 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2085 || reg_mentioned_p (other, x))))
2087 rtx temp = gen_reg_rtx (GET_MODE (x));
2088 emit_move_insn (temp, x);
2094 /* Emission of insns (adding them to the doubly-linked list). */
2096 /* Return the first insn of the current sequence or current function. */
2104 /* Return the last insn emitted in current sequence or current function. */
2112 /* Specify a new insn as the last in the chain. */
2115 set_last_insn (insn)
2118 if (NEXT_INSN (insn) != 0)
2123 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2126 get_last_insn_anywhere ()
2128 struct sequence_stack *stack;
2131 for (stack = sequence_stack; stack; stack = stack->next)
2132 if (stack->last != 0)
2137 /* Return a number larger than any instruction's uid in this function. */
2142 return cur_insn_uid;
2145 /* Return the next insn. If it is a SEQUENCE, return the first insn
2154 insn = NEXT_INSN (insn);
2155 if (insn && GET_CODE (insn) == INSN
2156 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2157 insn = XVECEXP (PATTERN (insn), 0, 0);
2163 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2167 previous_insn (insn)
2172 insn = PREV_INSN (insn);
2173 if (insn && GET_CODE (insn) == INSN
2174 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2175 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2181 /* Return the next insn after INSN that is not a NOTE. This routine does not
2182 look inside SEQUENCEs. */
2185 next_nonnote_insn (insn)
2190 insn = NEXT_INSN (insn);
2191 if (insn == 0 || GET_CODE (insn) != NOTE)
2198 /* Return the previous insn before INSN that is not a NOTE. This routine does
2199 not look inside SEQUENCEs. */
2202 prev_nonnote_insn (insn)
2207 insn = PREV_INSN (insn);
2208 if (insn == 0 || GET_CODE (insn) != NOTE)
2215 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2216 or 0, if there is none. This routine does not look inside
2220 next_real_insn (insn)
2225 insn = NEXT_INSN (insn);
2226 if (insn == 0 || GET_CODE (insn) == INSN
2227 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2234 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2235 or 0, if there is none. This routine does not look inside
2239 prev_real_insn (insn)
2244 insn = PREV_INSN (insn);
2245 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2246 || GET_CODE (insn) == JUMP_INSN)
2253 /* Find the next insn after INSN that really does something. This routine
2254 does not look inside SEQUENCEs. Until reload has completed, this is the
2255 same as next_real_insn. */
2258 next_active_insn (insn)
2263 insn = NEXT_INSN (insn);
2265 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2266 || (GET_CODE (insn) == INSN
2267 && (! reload_completed
2268 || (GET_CODE (PATTERN (insn)) != USE
2269 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2276 /* Find the last insn before INSN that really does something. This routine
2277 does not look inside SEQUENCEs. Until reload has completed, this is the
2278 same as prev_real_insn. */
2281 prev_active_insn (insn)
2286 insn = PREV_INSN (insn);
2288 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2289 || (GET_CODE (insn) == INSN
2290 && (! reload_completed
2291 || (GET_CODE (PATTERN (insn)) != USE
2292 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2299 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2307 insn = NEXT_INSN (insn);
2308 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2315 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2323 insn = PREV_INSN (insn);
2324 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2332 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2333 and REG_CC_USER notes so we can find it. */
2336 link_cc0_insns (insn)
2339 rtx user = next_nonnote_insn (insn);
2341 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2342 user = XVECEXP (PATTERN (user), 0, 0);
2344 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user));
2345 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2348 /* Return the next insn that uses CC0 after INSN, which is assumed to
2349 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2350 applied to the result of this function should yield INSN).
2352 Normally, this is simply the next insn. However, if a REG_CC_USER note
2353 is present, it contains the insn that uses CC0.
2355 Return 0 if we can't find the insn. */
2358 next_cc0_user (insn)
2361 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2364 return XEXP (note, 0);
2366 insn = next_nonnote_insn (insn);
2367 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2368 insn = XVECEXP (PATTERN (insn), 0, 0);
2370 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2371 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2377 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2378 note, it is the previous insn. */
2381 prev_cc0_setter (insn)
2384 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2387 return XEXP (note, 0);
2389 insn = prev_nonnote_insn (insn);
2390 if (! sets_cc0_p (PATTERN (insn)))
2397 /* Try splitting insns that can be split for better scheduling.
2398 PAT is the pattern which might split.
2399 TRIAL is the insn providing PAT.
2400 LAST is non-zero if we should return the last insn of the sequence produced.
2402 If this routine succeeds in splitting, it returns the first or last
2403 replacement insn depending on the value of LAST. Otherwise, it
2404 returns TRIAL. If the insn to be returned can be split, it will be. */
2407 try_split (pat, trial, last)
2411 rtx before = PREV_INSN (trial);
2412 rtx after = NEXT_INSN (trial);
2413 rtx seq = split_insns (pat, trial);
2414 int has_barrier = 0;
2417 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2418 We may need to handle this specially. */
2419 if (after && GET_CODE (after) == BARRIER)
2422 after = NEXT_INSN (after);
2427 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2428 The latter case will normally arise only when being done so that
2429 it, in turn, will be split (SFmode on the 29k is an example). */
2430 if (GET_CODE (seq) == SEQUENCE)
2434 /* Avoid infinite loop if any insn of the result matches
2435 the original pattern. */
2436 for (i = 0; i < XVECLEN (seq, 0); i++)
2437 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2438 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2441 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2442 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2443 increment the usage count so we don't delete the label. */
2445 if (GET_CODE (trial) == JUMP_INSN)
2446 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2447 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2449 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2451 if (JUMP_LABEL (trial))
2452 LABEL_NUSES (JUMP_LABEL (trial))++;
2455 tem = emit_insn_after (seq, before);
2457 delete_insn (trial);
2459 emit_barrier_after (tem);
2461 /* Recursively call try_split for each new insn created; by the
2462 time control returns here that insn will be fully split, so
2463 set LAST and continue from the insn after the one returned.
2464 We can't use next_active_insn here since AFTER may be a note.
2465 Ignore deleted insns, which can be occur if not optimizing. */
2466 for (tem = NEXT_INSN (before); tem != after;
2467 tem = NEXT_INSN (tem))
2468 if (! INSN_DELETED_P (tem)
2469 && GET_RTX_CLASS (GET_CODE (tem)) == 'i')
2470 tem = try_split (PATTERN (tem), tem, 1);
2472 /* Avoid infinite loop if the result matches the original pattern. */
2473 else if (rtx_equal_p (seq, pat))
2477 PATTERN (trial) = seq;
2478 INSN_CODE (trial) = -1;
2479 try_split (seq, trial, last);
2482 /* Return either the first or the last insn, depending on which was
2484 return last ? prev_active_insn (after) : next_active_insn (before);
2490 /* Make and return an INSN rtx, initializing all its slots.
2491 Store PATTERN in the pattern slots. */
2494 make_insn_raw (pattern)
2499 /* If in RTL generation phase, see if FREE_INSN can be used. */
2500 if (free_insn != 0 && rtx_equal_function_value_matters)
2503 free_insn = NEXT_INSN (free_insn);
2504 PUT_CODE (insn, INSN);
2507 insn = rtx_alloc (INSN);
2509 INSN_UID (insn) = cur_insn_uid++;
2510 PATTERN (insn) = pattern;
2511 INSN_CODE (insn) = -1;
2512 LOG_LINKS (insn) = NULL;
2513 REG_NOTES (insn) = NULL;
2518 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2521 make_jump_insn_raw (pattern)
2526 insn = rtx_alloc (JUMP_INSN);
2527 INSN_UID (insn) = cur_insn_uid++;
2529 PATTERN (insn) = pattern;
2530 INSN_CODE (insn) = -1;
2531 LOG_LINKS (insn) = NULL;
2532 REG_NOTES (insn) = NULL;
2533 JUMP_LABEL (insn) = NULL;
2538 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2541 make_call_insn_raw (pattern)
2546 insn = rtx_alloc (CALL_INSN);
2547 INSN_UID (insn) = cur_insn_uid++;
2549 PATTERN (insn) = pattern;
2550 INSN_CODE (insn) = -1;
2551 LOG_LINKS (insn) = NULL;
2552 REG_NOTES (insn) = NULL;
2553 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2558 /* Add INSN to the end of the doubly-linked list.
2559 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2565 PREV_INSN (insn) = last_insn;
2566 NEXT_INSN (insn) = 0;
2568 if (NULL != last_insn)
2569 NEXT_INSN (last_insn) = insn;
2571 if (NULL == first_insn)
2577 /* Add INSN into the doubly-linked list after insn AFTER. This and
2578 the next should be the only functions called to insert an insn once
2579 delay slots have been filled since only they know how to update a
2583 add_insn_after (insn, after)
2586 rtx next = NEXT_INSN (after);
2588 if (optimize && INSN_DELETED_P (after))
2591 NEXT_INSN (insn) = next;
2592 PREV_INSN (insn) = after;
2596 PREV_INSN (next) = insn;
2597 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2598 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2600 else if (last_insn == after)
2604 struct sequence_stack *stack = sequence_stack;
2605 /* Scan all pending sequences too. */
2606 for (; stack; stack = stack->next)
2607 if (after == stack->last)
2617 NEXT_INSN (after) = insn;
2618 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2620 rtx sequence = PATTERN (after);
2621 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2625 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2626 the previous should be the only functions called to insert an insn once
2627 delay slots have been filled since only they know how to update a
2631 add_insn_before (insn, before)
2634 rtx prev = PREV_INSN (before);
2636 if (optimize && INSN_DELETED_P (before))
2639 PREV_INSN (insn) = prev;
2640 NEXT_INSN (insn) = before;
2644 NEXT_INSN (prev) = insn;
2645 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2647 rtx sequence = PATTERN (prev);
2648 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2651 else if (first_insn == before)
2655 struct sequence_stack *stack = sequence_stack;
2656 /* Scan all pending sequences too. */
2657 for (; stack; stack = stack->next)
2658 if (before == stack->first)
2660 stack->first = insn;
2668 PREV_INSN (before) = insn;
2669 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2670 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2673 /* Remove an insn from its doubly-linked list. This function knows how
2674 to handle sequences. */
2679 rtx next = NEXT_INSN (insn);
2680 rtx prev = PREV_INSN (insn);
2683 NEXT_INSN (prev) = next;
2684 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2686 rtx sequence = PATTERN (prev);
2687 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2690 else if (first_insn == insn)
2694 struct sequence_stack *stack = sequence_stack;
2695 /* Scan all pending sequences too. */
2696 for (; stack; stack = stack->next)
2697 if (insn == stack->first)
2699 stack->first = next;
2709 PREV_INSN (next) = prev;
2710 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2711 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2713 else if (last_insn == insn)
2717 struct sequence_stack *stack = sequence_stack;
2718 /* Scan all pending sequences too. */
2719 for (; stack; stack = stack->next)
2720 if (insn == stack->last)
2731 /* Delete all insns made since FROM.
2732 FROM becomes the new last instruction. */
2735 delete_insns_since (from)
2741 NEXT_INSN (from) = 0;
2745 /* This function is deprecated, please use sequences instead.
2747 Move a consecutive bunch of insns to a different place in the chain.
2748 The insns to be moved are those between FROM and TO.
2749 They are moved to a new position after the insn AFTER.
2750 AFTER must not be FROM or TO or any insn in between.
2752 This function does not know about SEQUENCEs and hence should not be
2753 called after delay-slot filling has been done. */
2756 reorder_insns (from, to, after)
2757 rtx from, to, after;
2759 /* Splice this bunch out of where it is now. */
2760 if (PREV_INSN (from))
2761 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2763 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2764 if (last_insn == to)
2765 last_insn = PREV_INSN (from);
2766 if (first_insn == from)
2767 first_insn = NEXT_INSN (to);
2769 /* Make the new neighbors point to it and it to them. */
2770 if (NEXT_INSN (after))
2771 PREV_INSN (NEXT_INSN (after)) = to;
2773 NEXT_INSN (to) = NEXT_INSN (after);
2774 PREV_INSN (from) = after;
2775 NEXT_INSN (after) = from;
2776 if (after == last_insn)
2780 /* Return the line note insn preceding INSN. */
2783 find_line_note (insn)
2786 if (no_line_numbers)
2789 for (; insn; insn = PREV_INSN (insn))
2790 if (GET_CODE (insn) == NOTE
2791 && NOTE_LINE_NUMBER (insn) >= 0)
2797 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2798 of the moved insns when debugging. This may insert a note between AFTER
2799 and FROM, and another one after TO. */
2802 reorder_insns_with_line_notes (from, to, after)
2803 rtx from, to, after;
2805 rtx from_line = find_line_note (from);
2806 rtx after_line = find_line_note (after);
2808 reorder_insns (from, to, after);
2810 if (from_line == after_line)
2814 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2815 NOTE_LINE_NUMBER (from_line),
2818 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2819 NOTE_LINE_NUMBER (after_line),
2823 /* Emit an insn of given code and pattern
2824 at a specified place within the doubly-linked list. */
2826 /* Make an instruction with body PATTERN
2827 and output it before the instruction BEFORE. */
2830 emit_insn_before (pattern, before)
2831 register rtx pattern, before;
2833 register rtx insn = before;
2835 if (GET_CODE (pattern) == SEQUENCE)
2839 for (i = 0; i < XVECLEN (pattern, 0); i++)
2841 insn = XVECEXP (pattern, 0, i);
2842 add_insn_before (insn, before);
2844 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2845 sequence_result[XVECLEN (pattern, 0)] = pattern;
2849 insn = make_insn_raw (pattern);
2850 add_insn_before (insn, before);
2856 /* Make an instruction with body PATTERN and code JUMP_INSN
2857 and output it before the instruction BEFORE. */
2860 emit_jump_insn_before (pattern, before)
2861 register rtx pattern, before;
2865 if (GET_CODE (pattern) == SEQUENCE)
2866 insn = emit_insn_before (pattern, before);
2869 insn = make_jump_insn_raw (pattern);
2870 add_insn_before (insn, before);
2876 /* Make an instruction with body PATTERN and code CALL_INSN
2877 and output it before the instruction BEFORE. */
2880 emit_call_insn_before (pattern, before)
2881 register rtx pattern, before;
2885 if (GET_CODE (pattern) == SEQUENCE)
2886 insn = emit_insn_before (pattern, before);
2889 insn = make_call_insn_raw (pattern);
2890 add_insn_before (insn, before);
2891 PUT_CODE (insn, CALL_INSN);
2897 /* Make an insn of code BARRIER
2898 and output it before the insn BEFORE. */
2901 emit_barrier_before (before)
2902 register rtx before;
2904 register rtx insn = rtx_alloc (BARRIER);
2906 INSN_UID (insn) = cur_insn_uid++;
2908 add_insn_before (insn, before);
2912 /* Emit the label LABEL before the insn BEFORE. */
2915 emit_label_before (label, before)
2918 /* This can be called twice for the same label as a result of the
2919 confusion that follows a syntax error! So make it harmless. */
2920 if (INSN_UID (label) == 0)
2922 INSN_UID (label) = cur_insn_uid++;
2923 add_insn_before (label, before);
2929 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2932 emit_note_before (subtype, before)
2936 register rtx note = rtx_alloc (NOTE);
2937 INSN_UID (note) = cur_insn_uid++;
2938 NOTE_SOURCE_FILE (note) = 0;
2939 NOTE_LINE_NUMBER (note) = subtype;
2941 add_insn_before (note, before);
2945 /* Make an insn of code INSN with body PATTERN
2946 and output it after the insn AFTER. */
2949 emit_insn_after (pattern, after)
2950 register rtx pattern, after;
2952 register rtx insn = after;
2954 if (GET_CODE (pattern) == SEQUENCE)
2958 for (i = 0; i < XVECLEN (pattern, 0); i++)
2960 insn = XVECEXP (pattern, 0, i);
2961 add_insn_after (insn, after);
2964 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2965 sequence_result[XVECLEN (pattern, 0)] = pattern;
2969 insn = make_insn_raw (pattern);
2970 add_insn_after (insn, after);
2976 /* Similar to emit_insn_after, except that line notes are to be inserted so
2977 as to act as if this insn were at FROM. */
2980 emit_insn_after_with_line_notes (pattern, after, from)
2981 rtx pattern, after, from;
2983 rtx from_line = find_line_note (from);
2984 rtx after_line = find_line_note (after);
2985 rtx insn = emit_insn_after (pattern, after);
2988 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2989 NOTE_LINE_NUMBER (from_line),
2993 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2994 NOTE_LINE_NUMBER (after_line),
2998 /* Make an insn of code JUMP_INSN with body PATTERN
2999 and output it after the insn AFTER. */
3002 emit_jump_insn_after (pattern, after)
3003 register rtx pattern, after;
3007 if (GET_CODE (pattern) == SEQUENCE)
3008 insn = emit_insn_after (pattern, after);
3011 insn = make_jump_insn_raw (pattern);
3012 add_insn_after (insn, after);
3018 /* Make an insn of code BARRIER
3019 and output it after the insn AFTER. */
3022 emit_barrier_after (after)
3025 register rtx insn = rtx_alloc (BARRIER);
3027 INSN_UID (insn) = cur_insn_uid++;
3029 add_insn_after (insn, after);
3033 /* Emit the label LABEL after the insn AFTER. */
3036 emit_label_after (label, after)
3039 /* This can be called twice for the same label
3040 as a result of the confusion that follows a syntax error!
3041 So make it harmless. */
3042 if (INSN_UID (label) == 0)
3044 INSN_UID (label) = cur_insn_uid++;
3045 add_insn_after (label, after);
3051 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3054 emit_note_after (subtype, after)
3058 register rtx note = rtx_alloc (NOTE);
3059 INSN_UID (note) = cur_insn_uid++;
3060 NOTE_SOURCE_FILE (note) = 0;
3061 NOTE_LINE_NUMBER (note) = subtype;
3062 add_insn_after (note, after);
3066 /* Emit a line note for FILE and LINE after the insn AFTER. */
3069 emit_line_note_after (file, line, after)
3076 if (no_line_numbers && line > 0)
3082 note = rtx_alloc (NOTE);
3083 INSN_UID (note) = cur_insn_uid++;
3084 NOTE_SOURCE_FILE (note) = file;
3085 NOTE_LINE_NUMBER (note) = line;
3086 add_insn_after (note, after);
3090 /* Make an insn of code INSN with pattern PATTERN
3091 and add it to the end of the doubly-linked list.
3092 If PATTERN is a SEQUENCE, take the elements of it
3093 and emit an insn for each element.
3095 Returns the last insn emitted. */
3101 rtx insn = last_insn;
3103 if (GET_CODE (pattern) == SEQUENCE)
3107 for (i = 0; i < XVECLEN (pattern, 0); i++)
3109 insn = XVECEXP (pattern, 0, i);
3112 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
3113 sequence_result[XVECLEN (pattern, 0)] = pattern;
3117 insn = make_insn_raw (pattern);
3124 /* Emit the insns in a chain starting with INSN.
3125 Return the last insn emitted. */
3135 rtx next = NEXT_INSN (insn);
3144 /* Emit the insns in a chain starting with INSN and place them in front of
3145 the insn BEFORE. Return the last insn emitted. */
3148 emit_insns_before (insn, before)
3156 rtx next = NEXT_INSN (insn);
3157 add_insn_before (insn, before);
3165 /* Emit the insns in a chain starting with FIRST and place them in back of
3166 the insn AFTER. Return the last insn emitted. */
3169 emit_insns_after (first, after)
3174 register rtx after_after;
3182 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3185 after_after = NEXT_INSN (after);
3187 NEXT_INSN (after) = first;
3188 PREV_INSN (first) = after;
3189 NEXT_INSN (last) = after_after;
3191 PREV_INSN (after_after) = last;
3193 if (after == last_insn)
3198 /* Make an insn of code JUMP_INSN with pattern PATTERN
3199 and add it to the end of the doubly-linked list. */
3202 emit_jump_insn (pattern)
3205 if (GET_CODE (pattern) == SEQUENCE)
3206 return emit_insn (pattern);
3209 register rtx insn = make_jump_insn_raw (pattern);
3215 /* Make an insn of code CALL_INSN with pattern PATTERN
3216 and add it to the end of the doubly-linked list. */
3219 emit_call_insn (pattern)
3222 if (GET_CODE (pattern) == SEQUENCE)
3223 return emit_insn (pattern);
3226 register rtx insn = make_call_insn_raw (pattern);
3228 PUT_CODE (insn, CALL_INSN);
3233 /* Add the label LABEL to the end of the doubly-linked list. */
3239 /* This can be called twice for the same label
3240 as a result of the confusion that follows a syntax error!
3241 So make it harmless. */
3242 if (INSN_UID (label) == 0)
3244 INSN_UID (label) = cur_insn_uid++;
3250 /* Make an insn of code BARRIER
3251 and add it to the end of the doubly-linked list. */
3256 register rtx barrier = rtx_alloc (BARRIER);
3257 INSN_UID (barrier) = cur_insn_uid++;
3262 /* Make an insn of code NOTE
3263 with data-fields specified by FILE and LINE
3264 and add it to the end of the doubly-linked list,
3265 but only if line-numbers are desired for debugging info. */
3268 emit_line_note (file, line)
3272 emit_filename = file;
3276 if (no_line_numbers)
3280 return emit_note (file, line);
3283 /* Make an insn of code NOTE
3284 with data-fields specified by FILE and LINE
3285 and add it to the end of the doubly-linked list.
3286 If it is a line-number NOTE, omit it if it matches the previous one. */
3289 emit_note (file, line)
3297 if (file && last_filename && !strcmp (file, last_filename)
3298 && line == last_linenum)
3300 last_filename = file;
3301 last_linenum = line;
3304 if (no_line_numbers && line > 0)
3310 note = rtx_alloc (NOTE);
3311 INSN_UID (note) = cur_insn_uid++;
3312 NOTE_SOURCE_FILE (note) = file;
3313 NOTE_LINE_NUMBER (note) = line;
3318 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3321 emit_line_note_force (file, line)
3326 return emit_line_note (file, line);
3329 /* Cause next statement to emit a line note even if the line number
3330 has not changed. This is used at the beginning of a function. */
3333 force_next_line_note ()
3338 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3339 note of this type already exists, remove it first. */
3342 set_unique_reg_note (insn, kind, datum)
3347 rtx note = find_reg_note (insn, kind, NULL_RTX);
3349 /* First remove the note if there already is one. */
3351 remove_note (insn, note);
3353 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3356 /* Return an indication of which type of insn should have X as a body.
3357 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3363 if (GET_CODE (x) == CODE_LABEL)
3365 if (GET_CODE (x) == CALL)
3367 if (GET_CODE (x) == RETURN)
3369 if (GET_CODE (x) == SET)
3371 if (SET_DEST (x) == pc_rtx)
3373 else if (GET_CODE (SET_SRC (x)) == CALL)
3378 if (GET_CODE (x) == PARALLEL)
3381 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3382 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3384 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3385 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3387 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3388 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3394 /* Emit the rtl pattern X as an appropriate kind of insn.
3395 If X is a label, it is simply added into the insn chain. */
3401 enum rtx_code code = classify_insn (x);
3403 if (code == CODE_LABEL)
3404 return emit_label (x);
3405 else if (code == INSN)
3406 return emit_insn (x);
3407 else if (code == JUMP_INSN)
3409 register rtx insn = emit_jump_insn (x);
3410 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3411 return emit_barrier ();
3414 else if (code == CALL_INSN)
3415 return emit_call_insn (x);
3420 /* Begin emitting insns to a sequence which can be packaged in an
3421 RTL_EXPR. If this sequence will contain something that might cause
3422 the compiler to pop arguments to function calls (because those
3423 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3424 details), use do_pending_stack_adjust before calling this function.
3425 That will ensure that the deferred pops are not accidentally
3426 emitted in the middel of this sequence. */
3431 struct sequence_stack *tem;
3433 if (sequence_element_free_list)
3435 /* Reuse a previously-saved struct sequence_stack. */
3436 tem = sequence_element_free_list;
3437 sequence_element_free_list = tem->next;
3440 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3442 tem->next = sequence_stack;
3443 tem->first = first_insn;
3444 tem->last = last_insn;
3445 tem->sequence_rtl_expr = sequence_rtl_expr;
3447 sequence_stack = tem;
3453 /* Similarly, but indicate that this sequence will be placed in T, an
3454 RTL_EXPR. See the documentation for start_sequence for more
3455 information about how to use this function. */
3458 start_sequence_for_rtl_expr (t)
3463 sequence_rtl_expr = t;
3466 /* Set up the insn chain starting with FIRST as the current sequence,
3467 saving the previously current one. See the documentation for
3468 start_sequence for more information about how to use this function. */
3471 push_to_sequence (first)
3478 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3484 /* Set up the outer-level insn chain
3485 as the current sequence, saving the previously current one. */
3488 push_topmost_sequence ()
3490 struct sequence_stack *stack, *top = NULL;
3494 for (stack = sequence_stack; stack; stack = stack->next)
3497 first_insn = top->first;
3498 last_insn = top->last;
3499 sequence_rtl_expr = top->sequence_rtl_expr;
3502 /* After emitting to the outer-level insn chain, update the outer-level
3503 insn chain, and restore the previous saved state. */
3506 pop_topmost_sequence ()
3508 struct sequence_stack *stack, *top = NULL;
3510 for (stack = sequence_stack; stack; stack = stack->next)
3513 top->first = first_insn;
3514 top->last = last_insn;
3515 /* ??? Why don't we save sequence_rtl_expr here? */
3520 /* After emitting to a sequence, restore previous saved state.
3522 To get the contents of the sequence just made, you must call
3523 `gen_sequence' *before* calling here.
3525 If the compiler might have deferred popping arguments while
3526 generating this sequence, and this sequence will not be immediately
3527 inserted into the instruction stream, use do_pending_stack_adjust
3528 before calling gen_sequence. That will ensure that the deferred
3529 pops are inserted into this sequence, and not into some random
3530 location in the instruction stream. See INHIBIT_DEFER_POP for more
3531 information about deferred popping of arguments. */
3536 struct sequence_stack *tem = sequence_stack;
3538 first_insn = tem->first;
3539 last_insn = tem->last;
3540 sequence_rtl_expr = tem->sequence_rtl_expr;
3541 sequence_stack = tem->next;
3543 tem->next = sequence_element_free_list;
3544 sequence_element_free_list = tem;
3547 /* Return 1 if currently emitting into a sequence. */
3552 return sequence_stack != 0;
3555 /* Generate a SEQUENCE rtx containing the insns already emitted
3556 to the current sequence.
3558 This is how the gen_... function from a DEFINE_EXPAND
3559 constructs the SEQUENCE that it returns. */
3569 /* Count the insns in the chain. */
3571 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3574 /* If only one insn, return its pattern rather than a SEQUENCE.
3575 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3576 the case of an empty list.) */
3578 && ! RTX_FRAME_RELATED_P (first_insn)
3579 && (GET_CODE (first_insn) == INSN
3580 || GET_CODE (first_insn) == JUMP_INSN
3581 /* Don't discard the call usage field. */
3582 || (GET_CODE (first_insn) == CALL_INSN
3583 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3585 NEXT_INSN (first_insn) = free_insn;
3586 free_insn = first_insn;
3587 return PATTERN (first_insn);
3590 /* Put them in a vector. See if we already have a SEQUENCE of the
3591 appropriate length around. */
3592 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3593 sequence_result[len] = 0;
3596 /* Ensure that this rtl goes in saveable_obstack, since we may
3598 push_obstacks_nochange ();
3599 rtl_in_saveable_obstack ();
3600 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3604 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3605 XVECEXP (result, 0, i) = tem;
3610 /* Put the various virtual registers into REGNO_REG_RTX. */
3613 init_virtual_regs ()
3615 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3616 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3617 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3618 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3619 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3622 /* Initialize data structures and variables in this file
3623 before generating rtl for each function. */
3632 sequence_rtl_expr = NULL;
3634 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3637 first_label_num = label_num;
3639 sequence_stack = NULL;
3641 /* Clear the start_sequence/gen_sequence cache. */
3642 sequence_element_free_list = 0;
3643 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3644 sequence_result[i] = 0;
3647 /* Init the tables that describe all the pseudo regs. */
3649 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3652 = (char *) savealloc (regno_pointer_flag_length);
3653 bzero (regno_pointer_flag, regno_pointer_flag_length);
3656 = (char *) savealloc (regno_pointer_flag_length);
3657 bzero (regno_pointer_align, regno_pointer_flag_length);
3660 = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx));
3661 bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3663 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3664 init_virtual_regs ();
3666 /* Indicate that the virtual registers and stack locations are
3668 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3669 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3670 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3671 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3673 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3674 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3675 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3676 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3677 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3679 #ifdef STACK_BOUNDARY
3680 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3681 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3682 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3683 = STACK_BOUNDARY / BITS_PER_UNIT;
3684 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3686 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3687 = STACK_BOUNDARY / BITS_PER_UNIT;
3688 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3689 = STACK_BOUNDARY / BITS_PER_UNIT;
3690 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3691 = STACK_BOUNDARY / BITS_PER_UNIT;
3692 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3693 = STACK_BOUNDARY / BITS_PER_UNIT;
3694 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = UNITS_PER_WORD;
3697 #ifdef INIT_EXPANDERS
3702 /* Create some permanent unique rtl objects shared between all functions.
3703 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3706 init_emit_once (line_numbers)
3710 enum machine_mode mode;
3711 enum machine_mode double_mode;
3713 no_line_numbers = ! line_numbers;
3715 sequence_stack = NULL;
3717 /* Compute the word and byte modes. */
3719 byte_mode = VOIDmode;
3720 word_mode = VOIDmode;
3721 double_mode = VOIDmode;
3723 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3724 mode = GET_MODE_WIDER_MODE (mode))
3726 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3727 && byte_mode == VOIDmode)
3730 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3731 && word_mode == VOIDmode)
3735 #ifndef DOUBLE_TYPE_SIZE
3736 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
3739 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3740 mode = GET_MODE_WIDER_MODE (mode))
3742 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
3743 && double_mode == VOIDmode)
3747 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3749 /* Create the unique rtx's for certain rtx codes and operand values. */
3751 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3753 PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT);
3754 PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3755 INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3758 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3759 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3760 const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3762 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3764 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
3765 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
3766 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
3767 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
3769 for (i = 0; i <= 2; i++)
3771 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3772 mode = GET_MODE_WIDER_MODE (mode))
3774 rtx tem = rtx_alloc (CONST_DOUBLE);
3775 union real_extract u;
3777 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3778 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3780 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3781 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3782 PUT_MODE (tem, mode);
3784 const_tiny_rtx[i][(int) mode] = tem;
3787 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3789 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3790 mode = GET_MODE_WIDER_MODE (mode))
3791 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3793 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3795 mode = GET_MODE_WIDER_MODE (mode))
3796 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3799 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3800 mode = GET_MODE_WIDER_MODE (mode))
3801 const_tiny_rtx[0][(int) mode] = const0_rtx;
3804 /* Assign register numbers to the globally defined register rtx.
3805 This must be done at runtime because the register number field
3806 is in a union and some compilers can't initialize unions. */
3808 REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM;
3809 PUT_MODE (stack_pointer_rtx, Pmode);
3810 REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM;
3811 PUT_MODE (frame_pointer_rtx, Pmode);
3812 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3813 REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM;
3814 PUT_MODE (hard_frame_pointer_rtx, Pmode);
3816 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3817 REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM;
3818 PUT_MODE (arg_pointer_rtx, Pmode);
3821 REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM;
3822 PUT_MODE (virtual_incoming_args_rtx, Pmode);
3823 REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM;
3824 PUT_MODE (virtual_stack_vars_rtx, Pmode);
3825 REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM;
3826 PUT_MODE (virtual_stack_dynamic_rtx, Pmode);
3827 REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM;
3828 PUT_MODE (virtual_outgoing_args_rtx, Pmode);
3829 REGNO (virtual_cfa_rtx) = VIRTUAL_CFA_REGNUM;
3830 PUT_MODE (virtual_cfa_rtx, Pmode);
3832 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3833 return_address_pointer_rtx
3834 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3838 struct_value_rtx = STRUCT_VALUE;
3840 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3843 #ifdef STRUCT_VALUE_INCOMING
3844 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3846 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3847 struct_value_incoming_rtx
3848 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3850 struct_value_incoming_rtx = struct_value_rtx;
3854 #ifdef STATIC_CHAIN_REGNUM
3855 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3857 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3858 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3859 static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3862 static_chain_incoming_rtx = static_chain_rtx;
3866 static_chain_rtx = STATIC_CHAIN;
3868 #ifdef STATIC_CHAIN_INCOMING
3869 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3871 static_chain_incoming_rtx = static_chain_rtx;
3875 #ifdef PIC_OFFSET_TABLE_REGNUM
3876 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3879 #ifdef INIT_EXPANDERS
3880 /* This is to initialize save_machine_status and restore_machine_status before
3881 the first call to push_function_context_to. This is needed by the Chill
3882 front end which calls push_function_context_to before the first cal to
3883 init_function_start. */
3888 /* Query and clear/ restore no_line_numbers. This is used by the
3889 switch / case handling in stmt.c to give proper line numbers in
3890 warnings about unreachable code. */
3893 force_line_numbers ()
3895 int old = no_line_numbers;
3897 no_line_numbers = 0;
3899 force_next_line_note ();
3904 restore_line_number_status (old_value)
3907 no_line_numbers = old_value;