3 * Damien Bergamini <damien.bergamini@free.fr>
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $FreeBSD: src/sys/dev/ral/rt2661.c,v 1.4 2006/03/21 21:15:43 damien Exp $
18 * $DragonFly: src/sys/dev/netif/ral/rt2661.c,v 1.4 2006/10/25 20:55:58 dillon Exp $
22 * Ralink Technology RT2561, RT2561S and RT2661 chipset driver
23 * http://www.ralinktech.com/
26 #include <sys/param.h>
27 #include <sys/sysctl.h>
28 #include <sys/sockio.h>
30 #include <sys/kernel.h>
31 #include <sys/socket.h>
32 #include <sys/systm.h>
33 #include <sys/malloc.h>
34 #include <sys/module.h>
37 #include <sys/endian.h>
39 #include <machine/clock.h>
43 #include <net/if_arp.h>
44 #include <net/ethernet.h>
45 #include <net/if_dl.h>
46 #include <net/if_media.h>
47 #include <net/if_types.h>
48 #include <net/ifq_var.h>
50 #include <netproto/802_11/ieee80211_var.h>
51 #include <netproto/802_11/ieee80211_radiotap.h>
53 #include <netinet/in.h>
54 #include <netinet/in_systm.h>
55 #include <netinet/in_var.h>
56 #include <netinet/ip.h>
57 #include <netinet/if_ether.h>
59 #include <dev/netif/ral/if_ralrate.h>
60 #include <dev/netif/ral/rt2661reg.h>
61 #include <dev/netif/ral/rt2661var.h>
62 #include <dev/netif/ral/rt2661_ucode.h>
65 #define DPRINTF(x) do { if (ral_debug > 0) printf x; } while (0)
66 #define DPRINTFN(n, x) do { if (ral_debug >= (n)) printf x; } while (0)
68 SYSCTL_INT(_debug, OID_AUTO, ral, CTLFLAG_RW, &ral_debug, 0, "ral debug level");
71 #define DPRINTFN(n, x)
74 static void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int,
76 static void rt2661_dma_map_mbuf(void *, bus_dma_segment_t *, int,
78 static int rt2661_alloc_tx_ring(struct rt2661_softc *,
79 struct rt2661_tx_ring *, int);
80 static void rt2661_reset_tx_ring(struct rt2661_softc *,
81 struct rt2661_tx_ring *);
82 static void rt2661_free_tx_ring(struct rt2661_softc *,
83 struct rt2661_tx_ring *);
84 static int rt2661_alloc_rx_ring(struct rt2661_softc *,
85 struct rt2661_rx_ring *, int);
86 static void rt2661_reset_rx_ring(struct rt2661_softc *,
87 struct rt2661_rx_ring *);
88 static void rt2661_free_rx_ring(struct rt2661_softc *,
89 struct rt2661_rx_ring *);
90 static struct ieee80211_node *rt2661_node_alloc(
91 struct ieee80211_node_table *);
92 static int rt2661_media_change(struct ifnet *);
93 static void rt2661_next_scan(void *);
94 static int rt2661_newstate(struct ieee80211com *,
95 enum ieee80211_state, int);
96 static uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t);
97 static void rt2661_rx_intr(struct rt2661_softc *);
98 static void rt2661_tx_intr(struct rt2661_softc *);
99 static void rt2661_tx_dma_intr(struct rt2661_softc *,
100 struct rt2661_tx_ring *);
101 static void rt2661_mcu_beacon_expire(struct rt2661_softc *);
102 static void rt2661_mcu_wakeup(struct rt2661_softc *);
103 static void rt2661_mcu_cmd_intr(struct rt2661_softc *);
104 static int rt2661_ack_rate(struct ieee80211com *, int);
105 static uint16_t rt2661_txtime(int, int, uint32_t);
106 static uint8_t rt2661_rxrate(struct rt2661_rx_desc *);
107 static uint8_t rt2661_plcp_signal(int);
108 static void rt2661_setup_tx_desc(struct rt2661_softc *,
109 struct rt2661_tx_desc *, uint32_t, uint16_t, int,
110 int, const bus_dma_segment_t *, int, int);
111 static struct mbuf * rt2661_get_rts(struct rt2661_softc *,
112 struct ieee80211_frame *, uint16_t);
113 static int rt2661_tx_data(struct rt2661_softc *, struct mbuf *,
114 struct ieee80211_node *, int);
115 static int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *,
116 struct ieee80211_node *);
117 static void rt2661_start(struct ifnet *);
118 static void rt2661_watchdog(struct ifnet *);
119 static int rt2661_reset(struct ifnet *);
120 static int rt2661_ioctl(struct ifnet *, u_long, caddr_t,
122 static void rt2661_bbp_write(struct rt2661_softc *, uint8_t,
124 static uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t);
125 static void rt2661_rf_write(struct rt2661_softc *, uint8_t,
127 static int rt2661_tx_cmd(struct rt2661_softc *, uint8_t,
129 static void rt2661_select_antenna(struct rt2661_softc *);
130 static void rt2661_enable_mrr(struct rt2661_softc *);
131 static void rt2661_set_txpreamble(struct rt2661_softc *);
132 static void rt2661_set_basicrates(struct rt2661_softc *,
133 const struct ieee80211_rateset *);
134 static void rt2661_select_band(struct rt2661_softc *,
135 struct ieee80211_channel *);
136 static void rt2661_set_chan(struct rt2661_softc *,
137 struct ieee80211_channel *);
138 static void rt2661_set_bssid(struct rt2661_softc *,
140 static void rt2661_set_macaddr(struct rt2661_softc *,
142 static void rt2661_update_promisc(struct rt2661_softc *);
143 static int rt2661_wme_update(struct ieee80211com *) __unused;
144 static void rt2661_update_slot(struct ifnet *);
145 static const char *rt2661_get_rf(int);
146 static void rt2661_read_eeprom(struct rt2661_softc *);
147 static int rt2661_bbp_init(struct rt2661_softc *);
148 static void rt2661_init(void *);
149 static void rt2661_stop(void *);
150 static void rt2661_intr(void *);
151 static int rt2661_load_microcode(struct rt2661_softc *,
152 const uint8_t *, int);
154 static void rt2661_rx_tune(struct rt2661_softc *);
155 static void rt2661_radar_start(struct rt2661_softc *);
156 static int rt2661_radar_stop(struct rt2661_softc *);
158 static int rt2661_prepare_beacon(struct rt2661_softc *);
159 static void rt2661_enable_tsf_sync(struct rt2661_softc *);
160 static int rt2661_get_rssi(struct rt2661_softc *, uint8_t);
163 * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
165 static const struct ieee80211_rateset rt2661_rateset_11a =
166 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
168 static const struct ieee80211_rateset rt2661_rateset_11b =
169 { 4, { 2, 4, 11, 22 } };
171 static const struct ieee80211_rateset rt2661_rateset_11g =
172 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
174 static const struct {
177 } rt2661_def_mac[] = {
181 static const struct {
184 } rt2661_def_bbp[] = {
188 static const struct rfprog {
190 uint32_t r1, r2, r3, r4;
191 } rt2661_rf5225_1[] = {
193 }, rt2661_rf5225_2[] = {
197 struct rt2661_dmamap {
198 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
203 rt2661_attach(device_t dev, int id)
205 struct rt2661_softc *sc = device_get_softc(dev);
206 struct ieee80211com *ic = &sc->sc_ic;
207 struct ifnet *ifp = &ic->ic_if;
209 const uint8_t *ucode = NULL;
210 int error, i, ac, ntries, size = 0;
212 callout_init(&sc->scan_ch);
213 callout_init(&sc->rssadapt_ch);
216 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irq_rid,
217 RF_ACTIVE | RF_SHAREABLE);
218 if (sc->sc_irq == NULL) {
219 device_printf(dev, "could not allocate interrupt resource\n");
223 /* wait for NIC to initialize */
224 for (ntries = 0; ntries < 1000; ntries++) {
225 if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)
229 if (ntries == 1000) {
230 device_printf(sc->sc_dev,
231 "timeout waiting for NIC to initialize\n");
236 /* retrieve RF rev. no and various other things from EEPROM */
237 rt2661_read_eeprom(sc);
239 device_printf(dev, "MAC/BBP RT%X, RF %s\n", val,
240 rt2661_get_rf(sc->rf_rev));
243 * Load 8051 microcode into NIC.
247 ucode = rt2561s_ucode;
248 size = sizeof rt2561s_ucode;
251 ucode = rt2561_ucode;
252 size = sizeof rt2561_ucode;
255 ucode = rt2661_ucode;
256 size = sizeof rt2661_ucode;
260 error = rt2661_load_microcode(sc, ucode, size);
262 device_printf(sc->sc_dev, "could not load 8051 microcode\n");
267 * Allocate Tx and Rx rings.
269 for (ac = 0; ac < 4; ac++) {
270 error = rt2661_alloc_tx_ring(sc, &sc->txq[ac],
271 RT2661_TX_RING_COUNT);
273 device_printf(sc->sc_dev,
274 "could not allocate Tx ring %d\n", ac);
279 error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
281 device_printf(sc->sc_dev, "could not allocate Mgt ring\n");
285 error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT);
287 device_printf(sc->sc_dev, "could not allocate Rx ring\n");
291 sysctl_ctx_init(&sc->sysctl_ctx);
292 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
293 SYSCTL_STATIC_CHILDREN(_hw),
295 device_get_nameunit(dev),
297 if (sc->sysctl_tree == NULL) {
298 device_printf(dev, "could not add sysctl node\n");
304 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
305 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
306 ifp->if_init = rt2661_init;
307 ifp->if_ioctl = rt2661_ioctl;
308 ifp->if_start = rt2661_start;
309 ifp->if_watchdog = rt2661_watchdog;
310 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
311 ifq_set_ready(&ifp->if_snd);
313 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
314 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
315 ic->ic_state = IEEE80211_S_INIT;
317 /* set device capabilities */
319 IEEE80211_C_IBSS | /* IBSS mode supported */
320 IEEE80211_C_MONITOR | /* monitor mode supported */
321 IEEE80211_C_HOSTAP | /* HostAp mode supported */
322 IEEE80211_C_TXPMGT | /* tx power management */
323 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
324 IEEE80211_C_SHSLOT | /* short slot time supported */
326 IEEE80211_C_WME | /* 802.11e */
328 IEEE80211_C_WEP | /* WEP */
329 IEEE80211_C_WPA; /* 802.11i */
331 if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) {
332 /* set supported .11a rates */
333 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2661_rateset_11a;
335 /* set supported .11a channels */
336 for (i = 36; i <= 64; i += 4) {
337 ic->ic_channels[i].ic_freq =
338 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
339 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
341 for (i = 100; i <= 140; i += 4) {
342 ic->ic_channels[i].ic_freq =
343 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
344 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
346 for (i = 149; i <= 165; i += 4) {
347 ic->ic_channels[i].ic_freq =
348 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
349 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
353 /* set supported .11b and .11g rates */
354 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2661_rateset_11b;
355 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2661_rateset_11g;
357 /* set supported .11b and .11g channels (1 through 14) */
358 for (i = 1; i <= 14; i++) {
359 ic->ic_channels[i].ic_freq =
360 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
361 ic->ic_channels[i].ic_flags =
362 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
363 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
366 ieee80211_ifattach(ic);
367 ic->ic_node_alloc = rt2661_node_alloc;
368 /* ic->ic_wme.wme_update = rt2661_wme_update;*/
369 ic->ic_updateslot = rt2661_update_slot;
370 ic->ic_reset = rt2661_reset;
371 /* enable s/w bmiss handling in sta mode */
372 ic->ic_flags_ext |= IEEE80211_FEXT_SWBMISS;
374 /* override state transition machine */
375 sc->sc_newstate = ic->ic_newstate;
376 ic->ic_newstate = rt2661_newstate;
377 ieee80211_media_init(ic, rt2661_media_change, ieee80211_media_status);
379 bpfattach_dlt(ifp, DLT_IEEE802_11_RADIO,
380 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
382 sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
383 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
384 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2661_RX_RADIOTAP_PRESENT);
386 sc->sc_txtap_len = sizeof sc->sc_txtapu;
387 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
388 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2661_TX_RADIOTAP_PRESENT);
391 * Add a few sysctl knobs.
395 SYSCTL_ADD_INT(&sc->sysctl_ctx,
396 SYSCTL_CHILDREN(sc->sysctl_tree), OID_AUTO, "dwell",
397 CTLFLAG_RW, &sc->dwelltime, 0,
398 "channel dwell time (ms) for AP/station scanning");
400 error = bus_setup_intr(dev, sc->sc_irq, INTR_MPSAFE, rt2661_intr,
401 sc, &sc->sc_ih, ifp->if_serializer);
403 device_printf(dev, "could not set up interrupt\n");
405 ieee80211_ifdetach(ic);
410 ieee80211_announce(ic);
418 rt2661_detach(void *xsc)
420 struct rt2661_softc *sc = xsc;
421 struct ieee80211com *ic = &sc->sc_ic;
422 struct ifnet *ifp = &ic->ic_if;
424 if (device_is_attached(sc->sc_dev)) {
425 lwkt_serialize_enter(ifp->if_serializer);
427 callout_stop(&sc->scan_ch);
428 callout_stop(&sc->rssadapt_ch);
430 bus_teardown_intr(sc->sc_dev, sc->sc_irq, sc->sc_ih);
432 lwkt_serialize_exit(ifp->if_serializer);
435 ieee80211_ifdetach(ic);
438 rt2661_free_tx_ring(sc, &sc->txq[0]);
439 rt2661_free_tx_ring(sc, &sc->txq[1]);
440 rt2661_free_tx_ring(sc, &sc->txq[2]);
441 rt2661_free_tx_ring(sc, &sc->txq[3]);
442 rt2661_free_tx_ring(sc, &sc->mgtq);
443 rt2661_free_rx_ring(sc, &sc->rxq);
445 if (sc->sc_irq != NULL) {
446 bus_release_resource(sc->sc_dev, SYS_RES_IRQ, sc->sc_irq_rid,
450 if (sc->sysctl_tree != NULL)
451 sysctl_ctx_free(&sc->sysctl_ctx);
457 rt2661_shutdown(void *xsc)
459 struct rt2661_softc *sc = xsc;
460 struct ifnet *ifp = &sc->sc_ic.ic_if;
462 lwkt_serialize_enter(ifp->if_serializer);
464 lwkt_serialize_exit(ifp->if_serializer);
468 rt2661_suspend(void *xsc)
470 struct rt2661_softc *sc = xsc;
471 struct ifnet *ifp = &sc->sc_ic.ic_if;
473 lwkt_serialize_enter(ifp->if_serializer);
475 lwkt_serialize_exit(ifp->if_serializer);
479 rt2661_resume(void *xsc)
481 struct rt2661_softc *sc = xsc;
482 struct ifnet *ifp = sc->sc_ic.ic_ifp;
484 lwkt_serialize_enter(ifp->if_serializer);
485 if (ifp->if_flags & IFF_UP) {
486 ifp->if_init(ifp->if_softc);
487 if (ifp->if_flags & IFF_RUNNING)
490 lwkt_serialize_exit(ifp->if_serializer);
494 rt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
499 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
501 *(bus_addr_t *)arg = segs[0].ds_addr;
505 rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring,
512 ring->cur = ring->next = ring->stat = 0;
514 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
515 BUS_SPACE_MAXADDR, NULL, NULL, count * RT2661_TX_DESC_SIZE, 1,
516 count * RT2661_TX_DESC_SIZE, 0, &ring->desc_dmat);
518 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
522 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
523 BUS_DMA_WAITOK | BUS_DMA_ZERO, &ring->desc_map);
525 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
529 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
530 count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
533 device_printf(sc->sc_dev, "could not load desc DMA map\n");
535 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
540 ring->data = kmalloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF,
543 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
544 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES * RT2661_MAX_SCATTER,
545 RT2661_MAX_SCATTER, MCLBYTES, 0, &ring->data_dmat);
547 device_printf(sc->sc_dev, "could not create data DMA tag\n");
551 for (i = 0; i < count; i++) {
552 error = bus_dmamap_create(ring->data_dmat, 0,
555 device_printf(sc->sc_dev, "could not create DMA map\n");
561 fail: rt2661_free_tx_ring(sc, ring);
566 rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
568 struct rt2661_tx_desc *desc;
569 struct rt2661_tx_data *data;
572 for (i = 0; i < ring->count; i++) {
573 desc = &ring->desc[i];
574 data = &ring->data[i];
576 if (data->m != NULL) {
577 bus_dmamap_sync(ring->data_dmat, data->map,
578 BUS_DMASYNC_POSTWRITE);
579 bus_dmamap_unload(ring->data_dmat, data->map);
584 if (data->ni != NULL) {
585 ieee80211_free_node(data->ni);
592 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
595 ring->cur = ring->next = ring->stat = 0;
599 rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
601 struct rt2661_tx_data *data;
604 if (ring->desc != NULL) {
605 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
606 BUS_DMASYNC_POSTWRITE);
607 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
608 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
612 if (ring->desc_dmat != NULL) {
613 bus_dma_tag_destroy(ring->desc_dmat);
614 ring->desc_dmat = NULL;
617 if (ring->data != NULL) {
618 for (i = 0; i < ring->count; i++) {
619 data = &ring->data[i];
621 if (data->m != NULL) {
622 bus_dmamap_sync(ring->data_dmat, data->map,
623 BUS_DMASYNC_POSTWRITE);
624 bus_dmamap_unload(ring->data_dmat, data->map);
629 if (data->ni != NULL) {
630 ieee80211_free_node(data->ni);
634 if (data->map != NULL) {
635 bus_dmamap_destroy(ring->data_dmat, data->map);
640 kfree(ring->data, M_DEVBUF);
644 if (ring->data_dmat != NULL) {
645 bus_dma_tag_destroy(ring->data_dmat);
646 ring->data_dmat = NULL;
651 rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring,
654 struct rt2661_rx_desc *desc;
655 struct rt2661_rx_data *data;
660 ring->cur = ring->next = 0;
662 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
663 BUS_SPACE_MAXADDR, NULL, NULL, count * RT2661_RX_DESC_SIZE, 1,
664 count * RT2661_RX_DESC_SIZE, 0, &ring->desc_dmat);
666 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
670 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
671 BUS_DMA_WAITOK | BUS_DMA_ZERO, &ring->desc_map);
673 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
677 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
678 count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
681 device_printf(sc->sc_dev, "could not load desc DMA map\n");
683 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
688 ring->data = kmalloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF,
692 * Pre-allocate Rx buffers and populate Rx ring.
694 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
695 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 1, MCLBYTES, 0,
698 device_printf(sc->sc_dev, "could not create data DMA tag\n");
702 for (i = 0; i < count; i++) {
703 desc = &sc->rxq.desc[i];
704 data = &sc->rxq.data[i];
706 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
708 device_printf(sc->sc_dev, "could not create DMA map\n");
712 data->m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
713 if (data->m == NULL) {
714 device_printf(sc->sc_dev,
715 "could not allocate rx mbuf\n");
720 error = bus_dmamap_load(ring->data_dmat, data->map,
721 mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr,
724 device_printf(sc->sc_dev,
725 "could not load rx buf DMA map");
732 desc->flags = htole32(RT2661_RX_BUSY);
733 desc->physaddr = htole32(physaddr);
736 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
740 fail: rt2661_free_rx_ring(sc, ring);
745 rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
749 for (i = 0; i < ring->count; i++)
750 ring->desc[i].flags = htole32(RT2661_RX_BUSY);
752 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
754 ring->cur = ring->next = 0;
758 rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
760 struct rt2661_rx_data *data;
763 if (ring->desc != NULL) {
764 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
765 BUS_DMASYNC_POSTWRITE);
766 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
767 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
771 if (ring->desc_dmat != NULL) {
772 bus_dma_tag_destroy(ring->desc_dmat);
773 ring->desc_dmat = NULL;
776 if (ring->data != NULL) {
777 for (i = 0; i < ring->count; i++) {
778 data = &ring->data[i];
780 if (data->m != NULL) {
781 bus_dmamap_sync(ring->data_dmat, data->map,
782 BUS_DMASYNC_POSTREAD);
783 bus_dmamap_unload(ring->data_dmat, data->map);
788 if (data->map != NULL) {
789 bus_dmamap_destroy(ring->data_dmat, data->map);
794 kfree(ring->data, M_DEVBUF);
798 if (ring->data_dmat != NULL) {
799 bus_dma_tag_destroy(ring->data_dmat);
800 ring->data_dmat = NULL;
804 static struct ieee80211_node *
805 rt2661_node_alloc(struct ieee80211_node_table *nt)
807 struct rt2661_node *rn;
809 rn = kmalloc(sizeof (struct rt2661_node), M_80211_NODE,
812 return (rn != NULL) ? &rn->ni : NULL;
816 rt2661_media_change(struct ifnet *ifp)
818 struct rt2661_softc *sc = ifp->if_softc;
821 error = ieee80211_media_change(ifp);
822 if (error != ENETRESET)
825 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
831 * This function is called periodically (every 200ms) during scanning to
832 * switch from one channel to another.
835 rt2661_next_scan(void *arg)
837 struct rt2661_softc *sc = arg;
838 struct ieee80211com *ic = &sc->sc_ic;
839 struct ifnet *ifp = &ic->ic_if;
841 lwkt_serialize_enter(ifp->if_serializer);
842 if (ic->ic_state == IEEE80211_S_SCAN)
843 ieee80211_next_scan(ic);
844 lwkt_serialize_exit(ifp->if_serializer);
848 * This function is called for each node present in the node station table.
851 rt2661_iter_func(void *arg, struct ieee80211_node *ni)
853 struct rt2661_node *rn = (struct rt2661_node *)ni;
855 ral_rssadapt_updatestats(&rn->rssadapt);
859 * This function is called periodically (every 100ms) in RUN state to update
860 * the rate adaptation statistics.
863 rt2661_update_rssadapt(void *arg)
865 struct rt2661_softc *sc = arg;
866 struct ieee80211com *ic = &sc->sc_ic;
867 struct ifnet *ifp = &ic->ic_if;
869 lwkt_serialize_enter(ifp->if_serializer);
871 ieee80211_iterate_nodes(&ic->ic_sta, rt2661_iter_func, arg);
872 callout_reset(&sc->rssadapt_ch, hz / 10, rt2661_update_rssadapt, sc);
874 lwkt_serialize_exit(ifp->if_serializer);
878 rt2661_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
880 struct rt2661_softc *sc = ic->ic_ifp->if_softc;
881 enum ieee80211_state ostate;
882 struct ieee80211_node *ni;
886 ostate = ic->ic_state;
887 callout_stop(&sc->scan_ch);
890 case IEEE80211_S_INIT:
891 callout_stop(&sc->rssadapt_ch);
893 if (ostate == IEEE80211_S_RUN) {
894 /* abort TSF synchronization */
895 tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
896 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);
900 case IEEE80211_S_SCAN:
901 rt2661_set_chan(sc, ic->ic_curchan);
902 callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000,
903 rt2661_next_scan, sc);
906 case IEEE80211_S_AUTH:
907 case IEEE80211_S_ASSOC:
908 rt2661_set_chan(sc, ic->ic_curchan);
911 case IEEE80211_S_RUN:
912 rt2661_set_chan(sc, ic->ic_curchan);
916 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
917 rt2661_enable_mrr(sc);
918 rt2661_set_txpreamble(sc);
919 rt2661_set_basicrates(sc, &ni->ni_rates);
920 rt2661_set_bssid(sc, ni->ni_bssid);
923 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
924 ic->ic_opmode == IEEE80211_M_IBSS) {
925 if ((error = rt2661_prepare_beacon(sc)) != 0)
929 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
930 callout_reset(&sc->rssadapt_ch, hz / 10,
931 rt2661_update_rssadapt, sc);
932 rt2661_enable_tsf_sync(sc);
937 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg);
941 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
945 rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr)
951 /* clock C once before the first command */
952 RT2661_EEPROM_CTL(sc, 0);
954 RT2661_EEPROM_CTL(sc, RT2661_S);
955 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
956 RT2661_EEPROM_CTL(sc, RT2661_S);
958 /* write start bit (1) */
959 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
960 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
962 /* write READ opcode (10) */
963 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
964 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
965 RT2661_EEPROM_CTL(sc, RT2661_S);
966 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
968 /* write address (A5-A0 or A7-A0) */
969 n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7;
970 for (; n >= 0; n--) {
971 RT2661_EEPROM_CTL(sc, RT2661_S |
972 (((addr >> n) & 1) << RT2661_SHIFT_D));
973 RT2661_EEPROM_CTL(sc, RT2661_S |
974 (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C);
977 RT2661_EEPROM_CTL(sc, RT2661_S);
979 /* read data Q15-Q0 */
981 for (n = 15; n >= 0; n--) {
982 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
983 tmp = RAL_READ(sc, RT2661_E2PROM_CSR);
984 val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;
985 RT2661_EEPROM_CTL(sc, RT2661_S);
988 RT2661_EEPROM_CTL(sc, 0);
990 /* clear Chip Select and clock C */
991 RT2661_EEPROM_CTL(sc, RT2661_S);
992 RT2661_EEPROM_CTL(sc, 0);
993 RT2661_EEPROM_CTL(sc, RT2661_C);
999 rt2661_tx_intr(struct rt2661_softc *sc)
1001 struct ieee80211com *ic = &sc->sc_ic;
1002 struct ifnet *ifp = ic->ic_ifp;
1003 struct rt2661_tx_ring *txq;
1004 struct rt2661_tx_data *data;
1005 struct rt2661_node *rn;
1010 val = RAL_READ(sc, RT2661_STA_CSR4);
1011 if (!(val & RT2661_TX_STAT_VALID))
1014 /* retrieve the queue in which this frame was sent */
1015 qid = RT2661_TX_QID(val);
1016 txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq;
1018 /* retrieve rate control algorithm context */
1019 data = &txq->data[txq->stat];
1020 rn = (struct rt2661_node *)data->ni;
1022 switch (RT2661_TX_RESULT(val)) {
1023 case RT2661_TX_SUCCESS:
1024 retrycnt = RT2661_TX_RETRYCNT(val);
1026 DPRINTFN(10, ("data frame sent successfully after "
1027 "%d retries\n", retrycnt));
1028 if (retrycnt == 0 && data->id.id_node != NULL) {
1029 ral_rssadapt_raise_rate(ic, &rn->rssadapt,
1035 case RT2661_TX_RETRY_FAIL:
1036 DPRINTFN(9, ("sending data frame failed (too much "
1038 if (data->id.id_node != NULL) {
1039 ral_rssadapt_lower_rate(ic, data->ni,
1040 &rn->rssadapt, &data->id);
1047 device_printf(sc->sc_dev,
1048 "sending data frame failed 0x%08x\n", val);
1052 ieee80211_free_node(data->ni);
1055 DPRINTFN(15, ("tx done q=%d idx=%u\n", qid, txq->stat));
1058 if (++txq->stat >= txq->count) /* faster than % count */
1062 sc->sc_tx_timer = 0;
1063 ifp->if_flags &= ~IFF_OACTIVE;
1068 rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq)
1070 struct rt2661_tx_desc *desc;
1071 struct rt2661_tx_data *data;
1073 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD);
1076 desc = &txq->desc[txq->next];
1077 data = &txq->data[txq->next];
1079 if ((le32toh(desc->flags) & RT2661_TX_BUSY) ||
1080 !(le32toh(desc->flags) & RT2661_TX_VALID))
1083 bus_dmamap_sync(txq->data_dmat, data->map,
1084 BUS_DMASYNC_POSTWRITE);
1085 bus_dmamap_unload(txq->data_dmat, data->map);
1088 /* node reference is released in rt2661_tx_intr() */
1090 /* descriptor is no longer valid */
1091 desc->flags &= ~htole32(RT2661_TX_VALID);
1093 DPRINTFN(15, ("tx dma done q=%p idx=%u\n", txq, txq->next));
1095 if (++txq->next >= txq->count) /* faster than % count */
1099 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1103 rt2661_rx_intr(struct rt2661_softc *sc)
1105 struct ieee80211com *ic = &sc->sc_ic;
1106 struct ifnet *ifp = ic->ic_ifp;
1107 struct rt2661_rx_desc *desc;
1108 struct rt2661_rx_data *data;
1109 bus_addr_t physaddr;
1110 struct ieee80211_frame *wh;
1111 struct ieee80211_node *ni;
1112 struct rt2661_node *rn;
1113 struct mbuf *mnew, *m;
1116 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1117 BUS_DMASYNC_POSTREAD);
1120 desc = &sc->rxq.desc[sc->rxq.cur];
1121 data = &sc->rxq.data[sc->rxq.cur];
1123 if (le32toh(desc->flags) & RT2661_RX_BUSY)
1126 if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) ||
1127 (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) {
1129 * This should not happen since we did not request
1130 * to receive those frames when we filled TXRX_CSR0.
1132 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n",
1133 le32toh(desc->flags)));
1138 if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) {
1144 * Try to allocate a new mbuf for this ring element and load it
1145 * before processing the current mbuf. If the ring element
1146 * cannot be loaded, drop the received packet and reuse the old
1147 * mbuf. In the unlikely case that the old mbuf can't be
1148 * reloaded either, explicitly panic.
1150 mnew = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
1156 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1157 BUS_DMASYNC_POSTREAD);
1158 bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1160 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1161 mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr,
1166 /* try to reload the old mbuf */
1167 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1168 mtod(data->m, void *), MCLBYTES,
1169 rt2661_dma_map_addr, &physaddr, 0);
1171 /* very unlikely that it will fail... */
1172 panic("%s: could not load old rx mbuf",
1173 device_get_name(sc->sc_dev));
1180 * New mbuf successfully loaded, update Rx ring and continue
1185 desc->physaddr = htole32(physaddr);
1188 m->m_pkthdr.rcvif = ifp;
1189 m->m_pkthdr.len = m->m_len =
1190 (le32toh(desc->flags) >> 16) & 0xfff;
1192 if (sc->sc_drvbpf != NULL) {
1193 struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap;
1194 uint32_t tsf_lo, tsf_hi;
1196 /* get timestamp (low and high 32 bits) */
1197 tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13);
1198 tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12);
1201 htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1203 tap->wr_rate = rt2661_rxrate(desc);
1204 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
1205 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
1206 tap->wr_antsignal = desc->rssi;
1208 bpf_ptap(sc->sc_drvbpf, m, tap, sc->sc_rxtap_len);
1211 wh = mtod(m, struct ieee80211_frame *);
1212 ni = ieee80211_find_rxnode(ic,
1213 (struct ieee80211_frame_min *)wh);
1215 /* send the frame to the 802.11 layer */
1216 ieee80211_input(ic, m, ni, desc->rssi, 0);
1218 /* give rssi to the rate adatation algorithm */
1219 rn = (struct rt2661_node *)ni;
1220 ral_rssadapt_input(ic, ni, &rn->rssadapt,
1221 rt2661_get_rssi(sc, desc->rssi));
1223 /* node is no longer needed */
1224 ieee80211_free_node(ni);
1226 skip: desc->flags |= htole32(RT2661_RX_BUSY);
1228 DPRINTFN(15, ("rx intr idx=%u\n", sc->rxq.cur));
1230 sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT;
1233 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1234 BUS_DMASYNC_PREWRITE);
1239 rt2661_mcu_beacon_expire(struct rt2661_softc *sc)
1245 rt2661_mcu_wakeup(struct rt2661_softc *sc)
1247 RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16);
1249 RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7);
1250 RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18);
1251 RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20);
1253 /* send wakeup command to MCU */
1254 rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0);
1258 rt2661_mcu_cmd_intr(struct rt2661_softc *sc)
1260 RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR);
1261 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
1265 rt2661_intr(void *arg)
1267 struct rt2661_softc *sc = arg;
1268 struct ifnet *ifp = &sc->sc_ic.ic_if;
1271 /* disable MAC and MCU interrupts */
1272 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
1273 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
1275 /* don't re-enable interrupts if we're shutting down */
1276 if (!(ifp->if_flags & IFF_RUNNING))
1279 r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR);
1280 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1);
1282 r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR);
1283 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2);
1285 if (r1 & RT2661_MGT_DONE)
1286 rt2661_tx_dma_intr(sc, &sc->mgtq);
1288 if (r1 & RT2661_RX_DONE)
1291 if (r1 & RT2661_TX0_DMA_DONE)
1292 rt2661_tx_dma_intr(sc, &sc->txq[0]);
1294 if (r1 & RT2661_TX1_DMA_DONE)
1295 rt2661_tx_dma_intr(sc, &sc->txq[1]);
1297 if (r1 & RT2661_TX2_DMA_DONE)
1298 rt2661_tx_dma_intr(sc, &sc->txq[2]);
1300 if (r1 & RT2661_TX3_DMA_DONE)
1301 rt2661_tx_dma_intr(sc, &sc->txq[3]);
1303 if (r1 & RT2661_TX_DONE)
1306 if (r2 & RT2661_MCU_CMD_DONE)
1307 rt2661_mcu_cmd_intr(sc);
1309 if (r2 & RT2661_MCU_BEACON_EXPIRE)
1310 rt2661_mcu_beacon_expire(sc);
1312 if (r2 & RT2661_MCU_WAKEUP)
1313 rt2661_mcu_wakeup(sc);
1315 /* re-enable MAC and MCU interrupts */
1316 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
1317 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
1320 /* quickly determine if a given rate is CCK or OFDM */
1321 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
1323 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */
1324 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */
1326 #define RAL_SIFS 10 /* us */
1329 * This function is only used by the Rx radiotap code. It returns the rate at
1330 * which a given frame was received.
1333 rt2661_rxrate(struct rt2661_rx_desc *desc)
1335 if (le32toh(desc->flags) & RT2661_RX_OFDM) {
1336 /* reverse function of rt2661_plcp_signal */
1337 switch (desc->rate & 0xf) {
1338 case 0xb: return 12;
1339 case 0xf: return 18;
1340 case 0xa: return 24;
1341 case 0xe: return 36;
1342 case 0x9: return 48;
1343 case 0xd: return 72;
1344 case 0x8: return 96;
1345 case 0xc: return 108;
1348 if (desc->rate == 10)
1350 if (desc->rate == 20)
1352 if (desc->rate == 55)
1354 if (desc->rate == 110)
1357 return 2; /* should not get there */
1361 * Return the expected ack rate for a frame transmitted at rate `rate'.
1362 * XXX: this should depend on the destination node basic rate set.
1365 rt2661_ack_rate(struct ieee80211com *ic, int rate)
1374 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
1390 /* default to 1Mbps */
1395 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
1396 * The function automatically determines the operating mode depending on the
1397 * given rate. `flags' indicates whether short preamble is in use or not.
1400 rt2661_txtime(int len, int rate, uint32_t flags)
1404 if (RAL_RATE_IS_OFDM(rate)) {
1405 /* IEEE Std 802.11a-1999, pp. 37 */
1406 txtime = (8 + 4 * len + 3 + rate - 1) / rate;
1407 txtime = 16 + 4 + 4 * txtime + 6;
1409 /* IEEE Std 802.11b-1999, pp. 28 */
1410 txtime = (16 * len + rate - 1) / rate;
1411 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
1421 rt2661_plcp_signal(int rate)
1424 /* CCK rates (returned values are device-dependent) */
1427 case 11: return 0x2;
1428 case 22: return 0x3;
1430 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1431 case 12: return 0xb;
1432 case 18: return 0xf;
1433 case 24: return 0xa;
1434 case 36: return 0xe;
1435 case 48: return 0x9;
1436 case 72: return 0xd;
1437 case 96: return 0x8;
1438 case 108: return 0xc;
1440 /* unsupported rates (should not get there) */
1441 default: return 0xff;
1446 rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc,
1447 uint32_t flags, uint16_t xflags, int len, int rate,
1448 const bus_dma_segment_t *segs, int nsegs, int ac)
1450 struct ieee80211com *ic = &sc->sc_ic;
1451 uint16_t plcp_length;
1454 desc->flags = htole32(flags);
1455 desc->flags |= htole32(len << 16);
1456 desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID);
1458 desc->xflags = htole16(xflags);
1459 desc->xflags |= htole16(nsegs << 13);
1461 desc->wme = htole16(
1464 RT2661_LOGCWMIN(4) |
1465 RT2661_LOGCWMAX(10));
1468 * Remember in which queue this frame was sent. This field is driver
1469 * private data only. It will be made available by the NIC in STA_CSR4
1474 /* setup PLCP fields */
1475 desc->plcp_signal = rt2661_plcp_signal(rate);
1476 desc->plcp_service = 4;
1478 len += IEEE80211_CRC_LEN;
1479 if (RAL_RATE_IS_OFDM(rate)) {
1480 desc->flags |= htole32(RT2661_TX_OFDM);
1482 plcp_length = len & 0xfff;
1483 desc->plcp_length_hi = plcp_length >> 6;
1484 desc->plcp_length_lo = plcp_length & 0x3f;
1486 plcp_length = (16 * len + rate - 1) / rate;
1488 remainder = (16 * len) % 22;
1489 if (remainder != 0 && remainder < 7)
1490 desc->plcp_service |= RT2661_PLCP_LENGEXT;
1492 desc->plcp_length_hi = plcp_length >> 8;
1493 desc->plcp_length_lo = plcp_length & 0xff;
1495 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1496 desc->plcp_signal |= 0x08;
1499 /* RT2x61 supports scatter with up to 5 segments */
1500 for (i = 0; i < nsegs; i++) {
1501 desc->addr[i] = htole32(segs[i].ds_addr);
1502 desc->len [i] = htole16(segs[i].ds_len);
1507 rt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0,
1508 struct ieee80211_node *ni)
1510 struct ieee80211com *ic = &sc->sc_ic;
1511 struct rt2661_tx_desc *desc;
1512 struct rt2661_tx_data *data;
1513 struct ieee80211_frame *wh;
1514 struct rt2661_dmamap map;
1516 uint32_t flags = 0; /* XXX HWSEQ */
1519 desc = &sc->mgtq.desc[sc->mgtq.cur];
1520 data = &sc->mgtq.data[sc->mgtq.cur];
1522 /* send mgt frames at the lowest available rate */
1523 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1525 error = bus_dmamap_load_mbuf(sc->mgtq.data_dmat, data->map, m0,
1526 rt2661_dma_map_mbuf, &map, 0);
1528 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1534 if (sc->sc_drvbpf != NULL) {
1535 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1538 tap->wt_rate = rate;
1539 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1540 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1542 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1548 wh = mtod(m0, struct ieee80211_frame *);
1550 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1551 flags |= RT2661_TX_NEED_ACK;
1553 dur = rt2661_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) +
1555 *(uint16_t *)wh->i_dur = htole16(dur);
1557 /* tell hardware to add timestamp in probe responses */
1559 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1560 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1561 flags |= RT2661_TX_TIMESTAMP;
1564 rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */,
1565 m0->m_pkthdr.len, rate, map.segs, map.nseg, RT2661_QID_MGT);
1567 bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1568 bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map,
1569 BUS_DMASYNC_PREWRITE);
1571 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n",
1572 m0->m_pkthdr.len, sc->mgtq.cur, rate));
1576 sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
1577 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT);
1583 * Build a RTS control frame.
1585 static struct mbuf *
1586 rt2661_get_rts(struct rt2661_softc *sc, struct ieee80211_frame *wh,
1589 struct ieee80211_frame_rts *rts;
1592 MGETHDR(m, MB_DONTWAIT, MT_DATA);
1594 sc->sc_ic.ic_stats.is_tx_nobuf++;
1595 device_printf(sc->sc_dev, "could not allocate RTS frame\n");
1599 rts = mtod(m, struct ieee80211_frame_rts *);
1601 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL |
1602 IEEE80211_FC0_SUBTYPE_RTS;
1603 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS;
1604 *(uint16_t *)rts->i_dur = htole16(dur);
1605 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1);
1606 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2);
1608 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts);
1614 rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
1615 struct ieee80211_node *ni, int ac)
1617 struct ieee80211com *ic = &sc->sc_ic;
1618 struct rt2661_tx_ring *txq = &sc->txq[ac];
1619 struct rt2661_tx_desc *desc;
1620 struct rt2661_tx_data *data;
1621 struct rt2661_node *rn;
1622 struct ieee80211_rateset *rs;
1623 struct ieee80211_frame *wh;
1624 struct ieee80211_key *k;
1625 const struct chanAccParams *cap;
1627 struct rt2661_dmamap map;
1630 int error, rate, noack = 0;
1632 wh = mtod(m0, struct ieee80211_frame *);
1634 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) {
1635 rs = &ic->ic_sup_rates[ic->ic_curmode];
1636 rate = rs->rs_rates[ic->ic_fixed_rate];
1639 rn = (struct rt2661_node *)ni;
1640 ni->ni_txrate = ral_rssadapt_choose(&rn->rssadapt, rs,
1641 wh, m0->m_pkthdr.len, NULL, 0);
1642 rate = rs->rs_rates[ni->ni_txrate];
1644 rate &= IEEE80211_RATE_VAL;
1646 if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
1647 cap = &ic->ic_wme.wme_chanParams;
1648 noack = cap->cap_wmeParams[ac].wmep_noackPolicy;
1651 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1652 k = ieee80211_crypto_encap(ic, ni, m0);
1658 /* packet header may have moved, reset our local pointer */
1659 wh = mtod(m0, struct ieee80211_frame *);
1663 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange
1664 * for directed frames only when the length of the MPDU is greater
1665 * than the length threshold indicated by [...]" ic_rtsthreshold.
1667 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
1668 m0->m_pkthdr.len > ic->ic_rtsthreshold) {
1671 int rtsrate, ackrate;
1673 rtsrate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1674 ackrate = rt2661_ack_rate(ic, rate);
1676 dur = rt2661_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) +
1677 rt2661_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) +
1678 /* XXX: noack (QoS)? */
1679 rt2661_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) +
1682 m = rt2661_get_rts(sc, wh, dur);
1684 desc = &txq->desc[txq->cur];
1685 data = &txq->data[txq->cur];
1687 error = bus_dmamap_load_mbuf(txq->data_dmat, data->map, m,
1688 rt2661_dma_map_mbuf, &map, 0);
1690 device_printf(sc->sc_dev,
1691 "could not map mbuf (error %d)\n", error);
1697 /* avoid multiple free() of the same node for each fragment */
1698 ieee80211_ref_node(ni);
1703 /* RTS frames are not taken into account for rssadapt */
1704 data->id.id_node = NULL;
1706 rt2661_setup_tx_desc(sc, desc, RT2661_TX_NEED_ACK |
1707 RT2661_TX_MORE_FRAG, 0, m->m_pkthdr.len,
1708 rtsrate, map.segs, map.nseg, ac);
1710 bus_dmamap_sync(txq->data_dmat, data->map,
1711 BUS_DMASYNC_PREWRITE);
1714 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1717 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the
1718 * asynchronous data frame shall be transmitted after the CTS
1719 * frame and a SIFS period.
1721 flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS;
1724 data = &txq->data[txq->cur];
1725 desc = &txq->desc[txq->cur];
1727 error = bus_dmamap_load_mbuf(txq->data_dmat, data->map, m0,
1728 rt2661_dma_map_mbuf, &map, 0);
1729 if (error != 0 && error != EFBIG) {
1730 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1736 mnew = m_defrag(m0, MB_DONTWAIT);
1738 device_printf(sc->sc_dev,
1739 "could not defragment mbuf\n");
1745 error = bus_dmamap_load_mbuf(txq->data_dmat, data->map, m0,
1746 rt2661_dma_map_mbuf, &map, 0);
1748 device_printf(sc->sc_dev,
1749 "could not map mbuf (error %d)\n", error);
1754 /* packet header have moved, reset our local pointer */
1755 wh = mtod(m0, struct ieee80211_frame *);
1758 if (sc->sc_drvbpf != NULL) {
1759 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1762 tap->wt_rate = rate;
1763 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1764 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1766 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1772 /* remember link conditions for rate adaptation algorithm */
1773 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) {
1774 data->id.id_len = m0->m_pkthdr.len;
1775 data->id.id_rateidx = ni->ni_txrate;
1776 data->id.id_node = ni;
1777 data->id.id_rssi = ni->ni_rssi;
1779 data->id.id_node = NULL;
1781 if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1782 flags |= RT2661_TX_NEED_ACK;
1784 dur = rt2661_txtime(RAL_ACK_SIZE, rt2661_ack_rate(ic, rate),
1785 ic->ic_flags) + RAL_SIFS;
1786 *(uint16_t *)wh->i_dur = htole16(dur);
1789 rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate,
1790 map.segs, map.nseg, ac);
1792 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1793 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1795 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n",
1796 m0->m_pkthdr.len, txq->cur, rate));
1800 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1801 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac);
1807 rt2661_start(struct ifnet *ifp)
1809 struct rt2661_softc *sc = ifp->if_softc;
1810 struct ieee80211com *ic = &sc->sc_ic;
1812 struct ether_header *eh;
1813 struct ieee80211_node *ni;
1816 /* prevent management frames from being sent if we're not ready */
1817 if (!(ifp->if_flags & IFF_RUNNING))
1821 IF_POLL(&ic->ic_mgtq, m0);
1823 if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
1824 ifp->if_flags |= IFF_OACTIVE;
1827 IF_DEQUEUE(&ic->ic_mgtq, m0);
1829 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1830 m0->m_pkthdr.rcvif = NULL;
1832 if (ic->ic_rawbpf != NULL)
1833 bpf_mtap(ic->ic_rawbpf, m0);
1835 if (rt2661_tx_mgt(sc, m0, ni) != 0)
1839 if (ic->ic_state != IEEE80211_S_RUN)
1842 m0 = ifq_dequeue(&ifp->if_snd, NULL);
1846 if (m0->m_len < sizeof (struct ether_header) &&
1847 !(m0 = m_pullup(m0, sizeof (struct ether_header))))
1850 eh = mtod(m0, struct ether_header *);
1851 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1858 /* classify mbuf so we can find which tx ring to use */
1859 if (ieee80211_classify(ic, m0, ni) != 0) {
1861 ieee80211_free_node(ni);
1866 /* no QoS encapsulation for EAPOL frames */
1867 ac = (eh->ether_type != htons(ETHERTYPE_PAE)) ?
1868 M_WME_GETAC(m0) : WME_AC_BE;
1870 if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) {
1871 /* there is no place left in this ring */
1872 ifp->if_flags |= IFF_OACTIVE;
1874 ieee80211_free_node(ni);
1880 m0 = ieee80211_encap(ic, m0, ni);
1882 ieee80211_free_node(ni);
1887 if (ic->ic_rawbpf != NULL)
1888 bpf_mtap(ic->ic_rawbpf, m0);
1890 if (rt2661_tx_data(sc, m0, ni, ac) != 0) {
1891 ieee80211_free_node(ni);
1897 sc->sc_tx_timer = 5;
1903 rt2661_watchdog(struct ifnet *ifp)
1905 struct rt2661_softc *sc = ifp->if_softc;
1906 struct ieee80211com *ic = &sc->sc_ic;
1910 if (sc->sc_tx_timer > 0) {
1911 if (--sc->sc_tx_timer == 0) {
1912 device_printf(sc->sc_dev, "device timeout\n");
1920 ieee80211_watchdog(ic);
1924 * This function allows for fast channel switching in monitor mode (used by
1925 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
1926 * generate a new beacon frame.
1929 rt2661_reset(struct ifnet *ifp)
1931 struct rt2661_softc *sc = ifp->if_softc;
1932 struct ieee80211com *ic = &sc->sc_ic;
1934 if (ic->ic_opmode != IEEE80211_M_MONITOR)
1937 rt2661_set_chan(sc, ic->ic_curchan);
1943 rt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1945 struct rt2661_softc *sc = ifp->if_softc;
1946 struct ieee80211com *ic = &sc->sc_ic;
1951 if (ifp->if_flags & IFF_UP) {
1952 if (ifp->if_flags & IFF_RUNNING)
1953 rt2661_update_promisc(sc);
1957 if (ifp->if_flags & IFF_RUNNING)
1963 error = ieee80211_ioctl(ic, cmd, data, cr);
1966 if (error == ENETRESET) {
1967 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1968 (IFF_UP | IFF_RUNNING) &&
1969 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL))
1977 rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)
1982 for (ntries = 0; ntries < 100; ntries++) {
1983 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1987 if (ntries == 100) {
1988 device_printf(sc->sc_dev, "could not write to BBP\n");
1992 tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;
1993 RAL_WRITE(sc, RT2661_PHY_CSR3, tmp);
1995 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val));
1999 rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg)
2004 for (ntries = 0; ntries < 100; ntries++) {
2005 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
2009 if (ntries == 100) {
2010 device_printf(sc->sc_dev, "could not read from BBP\n");
2014 val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;
2015 RAL_WRITE(sc, RT2661_PHY_CSR3, val);
2017 for (ntries = 0; ntries < 100; ntries++) {
2018 val = RAL_READ(sc, RT2661_PHY_CSR3);
2019 if (!(val & RT2661_BBP_BUSY))
2024 device_printf(sc->sc_dev, "could not read from BBP\n");
2029 rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)
2034 for (ntries = 0; ntries < 100; ntries++) {
2035 if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY))
2039 if (ntries == 100) {
2040 device_printf(sc->sc_dev, "could not write to RF\n");
2044 tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |
2046 RAL_WRITE(sc, RT2661_PHY_CSR4, tmp);
2048 /* remember last written value in sc */
2049 sc->rf_regs[reg] = val;
2051 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff));
2055 rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg)
2057 if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY)
2058 return EIO; /* there is already a command pending */
2060 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
2061 RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg);
2063 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd);
2069 rt2661_select_antenna(struct rt2661_softc *sc)
2071 uint8_t bbp4, bbp77;
2074 bbp4 = rt2661_bbp_read(sc, 4);
2075 bbp77 = rt2661_bbp_read(sc, 77);
2079 /* make sure Rx is disabled before switching antenna */
2080 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2081 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2083 rt2661_bbp_write(sc, 4, bbp4);
2084 rt2661_bbp_write(sc, 77, bbp77);
2086 /* restore Rx filter */
2087 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2091 * Enable multi-rate retries for frames sent at OFDM rates.
2092 * In 802.11b/g mode, allow fallback to CCK rates.
2095 rt2661_enable_mrr(struct rt2661_softc *sc)
2097 struct ieee80211com *ic = &sc->sc_ic;
2100 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
2102 tmp &= ~RT2661_MRR_CCK_FALLBACK;
2103 if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan))
2104 tmp |= RT2661_MRR_CCK_FALLBACK;
2105 tmp |= RT2661_MRR_ENABLED;
2107 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
2111 rt2661_set_txpreamble(struct rt2661_softc *sc)
2115 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
2117 tmp &= ~RT2661_SHORT_PREAMBLE;
2118 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
2119 tmp |= RT2661_SHORT_PREAMBLE;
2121 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
2125 rt2661_set_basicrates(struct rt2661_softc *sc,
2126 const struct ieee80211_rateset *rs)
2128 #define RV(r) ((r) & IEEE80211_RATE_VAL)
2133 for (i = 0; i < rs->rs_nrates; i++) {
2134 rate = rs->rs_rates[i];
2136 if (!(rate & IEEE80211_RATE_BASIC))
2140 * Find h/w rate index. We know it exists because the rate
2141 * set has already been negotiated.
2143 for (j = 0; rt2661_rateset_11g.rs_rates[j] != RV(rate); j++);
2148 RAL_WRITE(sc, RT2661_TXRX_CSR5, mask);
2150 DPRINTF(("Setting basic rate mask to 0x%x\n", mask));
2155 * Reprogram MAC/BBP to switch to a new band. Values taken from the reference
2159 rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c)
2161 uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104;
2164 /* update all BBP registers that depend on the band */
2165 bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c;
2166 bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48;
2167 if (IEEE80211_IS_CHAN_5GHZ(c)) {
2168 bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c;
2169 bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10;
2171 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
2172 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
2173 bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10;
2176 rt2661_bbp_write(sc, 17, bbp17);
2177 rt2661_bbp_write(sc, 96, bbp96);
2178 rt2661_bbp_write(sc, 104, bbp104);
2180 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
2181 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
2182 rt2661_bbp_write(sc, 75, 0x80);
2183 rt2661_bbp_write(sc, 86, 0x80);
2184 rt2661_bbp_write(sc, 88, 0x80);
2187 rt2661_bbp_write(sc, 35, bbp35);
2188 rt2661_bbp_write(sc, 97, bbp97);
2189 rt2661_bbp_write(sc, 98, bbp98);
2191 tmp = RAL_READ(sc, RT2661_PHY_CSR0);
2192 tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ);
2193 if (IEEE80211_IS_CHAN_2GHZ(c))
2194 tmp |= RT2661_PA_PE_2GHZ;
2196 tmp |= RT2661_PA_PE_5GHZ;
2197 RAL_WRITE(sc, RT2661_PHY_CSR0, tmp);
2201 rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c)
2203 struct ieee80211com *ic = &sc->sc_ic;
2204 const struct rfprog *rfprog;
2205 uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT;
2209 chan = ieee80211_chan2ieee(ic, c);
2210 if (chan == 0 || chan == IEEE80211_CHAN_ANY)
2213 /* select the appropriate RF settings based on what EEPROM says */
2214 rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2;
2216 /* find the settings for this channel (we know it exists) */
2217 for (i = 0; rfprog[i].chan != chan; i++);
2219 power = sc->txpow[i];
2223 } else if (power > 31) {
2224 bbp94 += power - 31;
2229 * If we are switching from the 2GHz band to the 5GHz band or
2230 * vice-versa, BBP registers need to be reprogrammed.
2232 if (c->ic_flags != sc->sc_curchan->ic_flags) {
2233 rt2661_select_band(sc, c);
2234 rt2661_select_antenna(sc);
2238 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2239 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2240 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2241 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2245 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2246 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2247 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1);
2248 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2252 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2253 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2254 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2255 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2257 /* enable smart mode for MIMO-capable RFs */
2258 bbp3 = rt2661_bbp_read(sc, 3);
2260 bbp3 &= ~RT2661_SMART_MODE;
2261 if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529)
2262 bbp3 |= RT2661_SMART_MODE;
2264 rt2661_bbp_write(sc, 3, bbp3);
2266 if (bbp94 != RT2661_BBPR94_DEFAULT)
2267 rt2661_bbp_write(sc, 94, bbp94);
2269 /* 5GHz radio needs a 1ms delay here */
2270 if (IEEE80211_IS_CHAN_5GHZ(c))
2275 rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid)
2279 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2280 RAL_WRITE(sc, RT2661_MAC_CSR4, tmp);
2282 tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16;
2283 RAL_WRITE(sc, RT2661_MAC_CSR5, tmp);
2287 rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr)
2291 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2292 RAL_WRITE(sc, RT2661_MAC_CSR2, tmp);
2294 tmp = addr[4] | addr[5] << 8;
2295 RAL_WRITE(sc, RT2661_MAC_CSR3, tmp);
2299 rt2661_update_promisc(struct rt2661_softc *sc)
2301 struct ifnet *ifp = sc->sc_ic.ic_ifp;
2304 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2306 tmp &= ~RT2661_DROP_NOT_TO_ME;
2307 if (!(ifp->if_flags & IFF_PROMISC))
2308 tmp |= RT2661_DROP_NOT_TO_ME;
2310 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2312 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2313 "entering" : "leaving"));
2317 * Update QoS (802.11e) settings for each h/w Tx ring.
2320 rt2661_wme_update(struct ieee80211com *ic)
2322 struct rt2661_softc *sc = ic->ic_ifp->if_softc;
2323 const struct wmeParams *wmep;
2325 wmep = ic->ic_wme.wme_chanParams.cap_wmeParams;
2327 /* XXX: not sure about shifts. */
2328 /* XXX: the reference driver plays with AC_VI settings too. */
2331 RAL_WRITE(sc, RT2661_AC_TXOP_CSR0,
2332 wmep[WME_AC_BE].wmep_txopLimit << 16 |
2333 wmep[WME_AC_BK].wmep_txopLimit);
2334 RAL_WRITE(sc, RT2661_AC_TXOP_CSR1,
2335 wmep[WME_AC_VI].wmep_txopLimit << 16 |
2336 wmep[WME_AC_VO].wmep_txopLimit);
2339 RAL_WRITE(sc, RT2661_CWMIN_CSR,
2340 wmep[WME_AC_BE].wmep_logcwmin << 12 |
2341 wmep[WME_AC_BK].wmep_logcwmin << 8 |
2342 wmep[WME_AC_VI].wmep_logcwmin << 4 |
2343 wmep[WME_AC_VO].wmep_logcwmin);
2346 RAL_WRITE(sc, RT2661_CWMAX_CSR,
2347 wmep[WME_AC_BE].wmep_logcwmax << 12 |
2348 wmep[WME_AC_BK].wmep_logcwmax << 8 |
2349 wmep[WME_AC_VI].wmep_logcwmax << 4 |
2350 wmep[WME_AC_VO].wmep_logcwmax);
2353 RAL_WRITE(sc, RT2661_AIFSN_CSR,
2354 wmep[WME_AC_BE].wmep_aifsn << 12 |
2355 wmep[WME_AC_BK].wmep_aifsn << 8 |
2356 wmep[WME_AC_VI].wmep_aifsn << 4 |
2357 wmep[WME_AC_VO].wmep_aifsn);
2363 rt2661_update_slot(struct ifnet *ifp)
2365 struct rt2661_softc *sc = ifp->if_softc;
2366 struct ieee80211com *ic = &sc->sc_ic;
2370 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2372 tmp = RAL_READ(sc, RT2661_MAC_CSR9);
2373 tmp = (tmp & ~0xff) | slottime;
2374 RAL_WRITE(sc, RT2661_MAC_CSR9, tmp);
2378 rt2661_get_rf(int rev)
2381 case RT2661_RF_5225: return "RT5225";
2382 case RT2661_RF_5325: return "RT5325 (MIMO XR)";
2383 case RT2661_RF_2527: return "RT2527";
2384 case RT2661_RF_2529: return "RT2529 (MIMO XR)";
2385 default: return "unknown";
2390 rt2661_read_eeprom(struct rt2661_softc *sc)
2392 struct ieee80211com *ic = &sc->sc_ic;
2396 /* read MAC address */
2397 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);
2398 ic->ic_myaddr[0] = val & 0xff;
2399 ic->ic_myaddr[1] = val >> 8;
2401 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);
2402 ic->ic_myaddr[2] = val & 0xff;
2403 ic->ic_myaddr[3] = val >> 8;
2405 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);
2406 ic->ic_myaddr[4] = val & 0xff;
2407 ic->ic_myaddr[5] = val >> 8;
2409 val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);
2410 /* XXX: test if different from 0xffff? */
2411 sc->rf_rev = (val >> 11) & 0x1f;
2412 sc->hw_radio = (val >> 10) & 0x1;
2413 sc->rx_ant = (val >> 4) & 0x3;
2414 sc->tx_ant = (val >> 2) & 0x3;
2415 sc->nb_ant = val & 0x3;
2417 DPRINTF(("RF revision=%d\n", sc->rf_rev));
2419 val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);
2420 sc->ext_5ghz_lna = (val >> 6) & 0x1;
2421 sc->ext_2ghz_lna = (val >> 4) & 0x1;
2423 DPRINTF(("External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n",
2424 sc->ext_2ghz_lna, sc->ext_5ghz_lna));
2426 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);
2427 if ((val & 0xff) != 0xff)
2428 sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */
2430 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);
2431 if ((val & 0xff) != 0xff)
2432 sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */
2434 /* adjust RSSI correction for external low-noise amplifier */
2435 if (sc->ext_2ghz_lna)
2436 sc->rssi_2ghz_corr -= 14;
2437 if (sc->ext_5ghz_lna)
2438 sc->rssi_5ghz_corr -= 14;
2440 DPRINTF(("RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n",
2441 sc->rssi_2ghz_corr, sc->rssi_5ghz_corr));
2443 val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);
2444 if ((val >> 8) != 0xff)
2445 sc->rfprog = (val >> 8) & 0x3;
2446 if ((val & 0xff) != 0xff)
2447 sc->rffreq = val & 0xff;
2449 DPRINTF(("RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq));
2451 /* read Tx power for all a/b/g channels */
2452 for (i = 0; i < 19; i++) {
2453 val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);
2454 sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */
2455 DPRINTF(("Channel=%d Tx power=%d\n",
2456 rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]));
2457 sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */
2458 DPRINTF(("Channel=%d Tx power=%d\n",
2459 rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]));
2462 /* read vendor-specific BBP values */
2463 for (i = 0; i < 16; i++) {
2464 val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);
2465 if (val == 0 || val == 0xffff)
2466 continue; /* skip invalid entries */
2467 sc->bbp_prom[i].reg = val >> 8;
2468 sc->bbp_prom[i].val = val & 0xff;
2469 DPRINTF(("BBP R%d=%02x\n", sc->bbp_prom[i].reg,
2470 sc->bbp_prom[i].val));
2475 rt2661_bbp_init(struct rt2661_softc *sc)
2477 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2481 /* wait for BBP to be ready */
2482 for (ntries = 0; ntries < 100; ntries++) {
2483 val = rt2661_bbp_read(sc, 0);
2484 if (val != 0 && val != 0xff)
2488 if (ntries == 100) {
2489 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2493 /* initialize BBP registers to default values */
2494 for (i = 0; i < N(rt2661_def_bbp); i++) {
2495 rt2661_bbp_write(sc, rt2661_def_bbp[i].reg,
2496 rt2661_def_bbp[i].val);
2499 /* write vendor-specific BBP values (from EEPROM) */
2500 for (i = 0; i < 16; i++) {
2501 if (sc->bbp_prom[i].reg == 0)
2503 rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2511 rt2661_init(void *priv)
2513 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2514 struct rt2661_softc *sc = priv;
2515 struct ieee80211com *ic = &sc->sc_ic;
2516 struct ifnet *ifp = ic->ic_ifp;
2517 uint32_t tmp, sta[3];
2522 /* initialize Tx rings */
2523 RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr);
2524 RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr);
2525 RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr);
2526 RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr);
2528 /* initialize Mgt ring */
2529 RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
2531 /* initialize Rx ring */
2532 RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr);
2534 /* initialize Tx rings sizes */
2535 RAL_WRITE(sc, RT2661_TX_RING_CSR0,
2536 RT2661_TX_RING_COUNT << 24 |
2537 RT2661_TX_RING_COUNT << 16 |
2538 RT2661_TX_RING_COUNT << 8 |
2539 RT2661_TX_RING_COUNT);
2541 RAL_WRITE(sc, RT2661_TX_RING_CSR1,
2542 RT2661_TX_DESC_WSIZE << 16 |
2543 RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */
2544 RT2661_MGT_RING_COUNT);
2546 /* initialize Rx rings */
2547 RAL_WRITE(sc, RT2661_RX_RING_CSR,
2548 RT2661_RX_DESC_BACK << 16 |
2549 RT2661_RX_DESC_WSIZE << 8 |
2550 RT2661_RX_RING_COUNT);
2552 /* XXX: some magic here */
2553 RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa);
2555 /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */
2556 RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f);
2558 /* load base address of Rx ring */
2559 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2);
2561 /* initialize MAC registers to default values */
2562 for (i = 0; i < N(rt2661_def_mac); i++)
2563 RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);
2565 IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp));
2566 rt2661_set_macaddr(sc, ic->ic_myaddr);
2568 /* set host ready */
2569 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2570 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2572 /* wait for BBP/RF to wakeup */
2573 for (ntries = 0; ntries < 1000; ntries++) {
2574 if (RAL_READ(sc, RT2661_MAC_CSR12) & 8)
2578 if (ntries == 1000) {
2579 printf("timeout waiting for BBP/RF to wakeup\n");
2584 if (rt2661_bbp_init(sc) != 0) {
2589 /* select default channel */
2590 sc->sc_curchan = ic->ic_curchan;
2591 rt2661_select_band(sc, sc->sc_curchan);
2592 rt2661_select_antenna(sc);
2593 rt2661_set_chan(sc, sc->sc_curchan);
2595 /* update Rx filter */
2596 tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff;
2598 tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR;
2599 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2600 tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR |
2602 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2603 tmp |= RT2661_DROP_TODS;
2604 if (!(ifp->if_flags & IFF_PROMISC))
2605 tmp |= RT2661_DROP_NOT_TO_ME;
2608 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2610 /* clear STA registers */
2611 RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta));
2613 /* initialize ASIC */
2614 RAL_WRITE(sc, RT2661_MAC_CSR1, 4);
2616 /* clear any pending interrupt */
2617 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2619 /* enable interrupts */
2620 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
2621 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
2624 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1);
2626 ifp->if_flags &= ~IFF_OACTIVE;
2627 ifp->if_flags |= IFF_RUNNING;
2629 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2630 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
2631 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2633 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2638 rt2661_stop(void *priv)
2640 struct rt2661_softc *sc = priv;
2641 struct ieee80211com *ic = &sc->sc_ic;
2642 struct ifnet *ifp = ic->ic_ifp;
2645 sc->sc_tx_timer = 0;
2647 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2649 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2651 /* abort Tx (for all 5 Tx rings) */
2652 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16);
2654 /* disable Rx (value remains after reset!) */
2655 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2656 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2659 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2660 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2662 /* disable interrupts */
2663 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff);
2664 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
2666 /* clear any pending interrupt */
2667 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2668 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff);
2670 /* reset Tx and Rx rings */
2671 rt2661_reset_tx_ring(sc, &sc->txq[0]);
2672 rt2661_reset_tx_ring(sc, &sc->txq[1]);
2673 rt2661_reset_tx_ring(sc, &sc->txq[2]);
2674 rt2661_reset_tx_ring(sc, &sc->txq[3]);
2675 rt2661_reset_tx_ring(sc, &sc->mgtq);
2676 rt2661_reset_rx_ring(sc, &sc->rxq);
2680 rt2661_load_microcode(struct rt2661_softc *sc, const uint8_t *ucode, int size)
2685 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2687 /* cancel any pending Host to MCU command */
2688 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0);
2689 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
2690 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0);
2692 /* write 8051's microcode */
2693 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL);
2694 RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, ucode, size);
2695 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2697 /* kick 8051's ass */
2698 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0);
2700 /* wait for 8051 to initialize */
2701 for (ntries = 0; ntries < 500; ntries++) {
2702 if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY)
2706 if (ntries == 500) {
2707 printf("timeout waiting for MCU to initialize\n");
2715 * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and
2716 * false CCA count. This function is called periodically (every seconds) when
2717 * in the RUN state. Values taken from the reference driver.
2720 rt2661_rx_tune(struct rt2661_softc *sc)
2727 * Tuning range depends on operating band and on the presence of an
2728 * external low-noise amplifier.
2731 if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan))
2733 if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) ||
2734 (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna))
2738 /* retrieve false CCA count since last call (clear on read) */
2739 cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff;
2743 } else if (dbm >= -58) {
2745 } else if (dbm >= -66) {
2747 } else if (dbm >= -74) {
2750 /* RSSI < -74dBm, tune using false CCA count */
2752 bbp17 = sc->bbp17; /* current value */
2754 hi -= 2 * (-74 - dbm);
2761 } else if (cca > 512) {
2764 } else if (cca < 100) {
2770 if (bbp17 != sc->bbp17) {
2771 rt2661_bbp_write(sc, 17, bbp17);
2777 * Enter/Leave radar detection mode.
2778 * This is for 802.11h additional regulatory domains.
2781 rt2661_radar_start(struct rt2661_softc *sc)
2786 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2787 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2789 rt2661_bbp_write(sc, 82, 0x20);
2790 rt2661_bbp_write(sc, 83, 0x00);
2791 rt2661_bbp_write(sc, 84, 0x40);
2793 /* save current BBP registers values */
2794 sc->bbp18 = rt2661_bbp_read(sc, 18);
2795 sc->bbp21 = rt2661_bbp_read(sc, 21);
2796 sc->bbp22 = rt2661_bbp_read(sc, 22);
2797 sc->bbp16 = rt2661_bbp_read(sc, 16);
2798 sc->bbp17 = rt2661_bbp_read(sc, 17);
2799 sc->bbp64 = rt2661_bbp_read(sc, 64);
2801 rt2661_bbp_write(sc, 18, 0xff);
2802 rt2661_bbp_write(sc, 21, 0x3f);
2803 rt2661_bbp_write(sc, 22, 0x3f);
2804 rt2661_bbp_write(sc, 16, 0xbd);
2805 rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34);
2806 rt2661_bbp_write(sc, 64, 0x21);
2808 /* restore Rx filter */
2809 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2813 rt2661_radar_stop(struct rt2661_softc *sc)
2817 /* read radar detection result */
2818 bbp66 = rt2661_bbp_read(sc, 66);
2820 /* restore BBP registers values */
2821 rt2661_bbp_write(sc, 16, sc->bbp16);
2822 rt2661_bbp_write(sc, 17, sc->bbp17);
2823 rt2661_bbp_write(sc, 18, sc->bbp18);
2824 rt2661_bbp_write(sc, 21, sc->bbp21);
2825 rt2661_bbp_write(sc, 22, sc->bbp22);
2826 rt2661_bbp_write(sc, 64, sc->bbp64);
2833 rt2661_prepare_beacon(struct rt2661_softc *sc)
2835 struct ieee80211com *ic = &sc->sc_ic;
2836 struct ieee80211_beacon_offsets bo;
2837 struct rt2661_tx_desc desc;
2841 m0 = ieee80211_beacon_alloc(ic, ic->ic_bss, &bo);
2843 device_printf(sc->sc_dev, "could not allocate beacon frame\n");
2847 /* send beacons at the lowest available rate */
2848 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan) ? 12 : 2;
2850 rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ,
2851 m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT);
2853 /* copy the first 24 bytes of Tx descriptor into NIC memory */
2854 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
2856 /* copy beacon header and payload into NIC memory */
2857 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24,
2858 mtod(m0, uint8_t *), m0->m_pkthdr.len);
2865 * Enable TSF synchronization and tell h/w to start sending beacons for IBSS
2866 * and HostAP operating modes.
2869 rt2661_enable_tsf_sync(struct rt2661_softc *sc)
2871 struct ieee80211com *ic = &sc->sc_ic;
2874 if (ic->ic_opmode != IEEE80211_M_STA) {
2876 * Change default 16ms TBTT adjustment to 8ms.
2877 * Must be done before enabling beacon generation.
2879 RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8);
2882 tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000;
2884 /* set beacon interval (in 1/16ms unit) */
2885 tmp |= ic->ic_bss->ni_intval * 16;
2887 tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT;
2888 if (ic->ic_opmode == IEEE80211_M_STA)
2889 tmp |= RT2661_TSF_MODE(1);
2891 tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON;
2893 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp);
2897 * Retrieve the "Received Signal Strength Indicator" from the raw values
2898 * contained in Rx descriptors. The computation depends on which band the
2899 * frame was received. Correction values taken from the reference driver.
2902 rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw)
2906 lna = (raw >> 5) & 0x3;
2911 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) {
2912 rssi += sc->rssi_2ghz_corr;
2921 rssi += sc->rssi_5ghz_corr;
2934 rt2661_dma_map_mbuf(void *arg, bus_dma_segment_t *seg, int nseg,
2935 bus_size_t map_size __unused, int error)
2937 struct rt2661_dmamap *map = arg;
2942 KASSERT(nseg <= RT2661_MAX_SCATTER, ("too many DMA segments"));
2944 bcopy(seg, map->segs, nseg * sizeof(bus_dma_segment_t));