1 /* $OpenBSD: if_txp.c,v 1.48 2001/06/27 06:34:50 kjc Exp $ */
2 /* $FreeBSD: src/sys/dev/txp/if_txp.c,v 1.4.2.4 2001/12/14 19:50:43 jlemon Exp $ */
3 /* $DragonFly: src/sys/dev/netif/txp/if_txp.c,v 1.35 2005/12/31 14:08:00 sephe Exp $ */
7 * Jason L. Wright <jason@thought.net>, Theo de Raadt, and
8 * Aaron Campbell <aaron@monkey.org>. All rights reserved.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Jason L. Wright,
21 * Theo de Raadt and Aaron Campbell.
22 * 4. Neither the name of the author nor the names of any co-contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
36 * THE POSSIBILITY OF SUCH DAMAGE.
40 * Driver for 3c990 (Typhoon) Ethernet ASIC
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/sockio.h>
47 #include <sys/malloc.h>
48 #include <sys/kernel.h>
49 #include <sys/socket.h>
50 #include <sys/serialize.h>
51 #include <sys/thread2.h>
54 #include <net/ifq_var.h>
55 #include <net/if_arp.h>
56 #include <net/ethernet.h>
57 #include <net/if_dl.h>
58 #include <net/if_types.h>
59 #include <net/vlan/if_vlan_var.h>
61 #include <netinet/in.h>
62 #include <netinet/in_systm.h>
63 #include <netinet/in_var.h>
64 #include <netinet/ip.h>
65 #include <netinet/if_ether.h>
66 #include <sys/in_cksum.h>
68 #include <net/if_media.h>
72 #include <vm/vm.h> /* for vtophys */
73 #include <vm/pmap.h> /* for vtophys */
74 #include <machine/bus_pio.h>
75 #include <machine/bus_memio.h>
76 #include <machine/bus.h>
77 #include <machine/resource.h>
81 #include "../mii_layer/mii.h"
82 #include "../mii_layer/miivar.h"
83 #include <bus/pci/pcireg.h>
84 #include <bus/pci/pcivar.h>
86 #define TXP_USEIOSPACE
87 #define __STRICT_ALIGNMENT
89 #include "if_txpreg.h"
93 * Various supported device vendors/types and their names.
95 static struct txp_type txp_devs[] = {
96 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_TX_95,
97 "3Com 3cR990-TX-95 Etherlink with 3XP Processor" },
98 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_TX_97,
99 "3Com 3cR990-TX-97 Etherlink with 3XP Processor" },
100 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990B_TXM,
101 "3Com 3cR990B-TXM Etherlink with 3XP Processor" },
102 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_SRV_95,
103 "3Com 3cR990-SRV-95 Etherlink Server with 3XP Processor" },
104 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_SRV_97,
105 "3Com 3cR990-SRV-97 Etherlink Server with 3XP Processor" },
106 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990B_SRV,
107 "3Com 3cR990B-SRV Etherlink Server with 3XP Processor" },
111 static int txp_probe (device_t);
112 static int txp_attach (device_t);
113 static int txp_detach (device_t);
114 static void txp_intr (void *);
115 static void txp_tick (void *);
116 static int txp_shutdown (device_t);
117 static int txp_ioctl (struct ifnet *, u_long, caddr_t, struct ucred *);
118 static void txp_start (struct ifnet *);
119 static void txp_stop (struct txp_softc *);
120 static void txp_init (void *);
121 static void txp_watchdog (struct ifnet *);
123 static void txp_release_resources (device_t);
124 static int txp_chip_init (struct txp_softc *);
125 static int txp_reset_adapter (struct txp_softc *);
126 static int txp_download_fw (struct txp_softc *);
127 static int txp_download_fw_wait (struct txp_softc *);
128 static int txp_download_fw_section (struct txp_softc *,
129 struct txp_fw_section_header *, int);
130 static int txp_alloc_rings (struct txp_softc *);
131 static int txp_rxring_fill (struct txp_softc *);
132 static void txp_rxring_empty (struct txp_softc *);
133 static void txp_set_filter (struct txp_softc *);
135 static int txp_cmd_desc_numfree (struct txp_softc *);
136 static int txp_command (struct txp_softc *, u_int16_t, u_int16_t, u_int32_t,
137 u_int32_t, u_int16_t *, u_int32_t *, u_int32_t *, int);
138 static int txp_command2 (struct txp_softc *, u_int16_t, u_int16_t,
139 u_int32_t, u_int32_t, struct txp_ext_desc *, u_int8_t,
140 struct txp_rsp_desc **, int);
141 static int txp_response (struct txp_softc *, u_int32_t, u_int16_t, u_int16_t,
142 struct txp_rsp_desc **);
143 static void txp_rsp_fixup (struct txp_softc *, struct txp_rsp_desc *,
144 struct txp_rsp_desc *);
145 static void txp_capabilities (struct txp_softc *);
147 static void txp_ifmedia_sts (struct ifnet *, struct ifmediareq *);
148 static int txp_ifmedia_upd (struct ifnet *);
150 static void txp_show_descriptor (void *);
152 static void txp_tx_reclaim (struct txp_softc *, struct txp_tx_ring *);
153 static void txp_rxbuf_reclaim (struct txp_softc *);
154 static void txp_rx_reclaim (struct txp_softc *, struct txp_rx_ring *);
156 #ifdef TXP_USEIOSPACE
157 #define TXP_RES SYS_RES_IOPORT
158 #define TXP_RID TXP_PCI_LOIO
160 #define TXP_RES SYS_RES_MEMORY
161 #define TXP_RID TXP_PCI_LOMEM
164 static device_method_t txp_methods[] = {
165 /* Device interface */
166 DEVMETHOD(device_probe, txp_probe),
167 DEVMETHOD(device_attach, txp_attach),
168 DEVMETHOD(device_detach, txp_detach),
169 DEVMETHOD(device_shutdown, txp_shutdown),
173 static driver_t txp_driver = {
176 sizeof(struct txp_softc)
179 static devclass_t txp_devclass;
181 DECLARE_DUMMY_MODULE(if_txp);
182 DRIVER_MODULE(if_txp, pci, txp_driver, txp_devclass, 0, 0);
185 txp_probe(device_t dev)
190 vid = pci_get_vendor(dev);
191 did = pci_get_device(dev);
193 for (t = txp_devs; t->txp_name != NULL; ++t) {
194 if ((vid == t->txp_vid) && (did == t->txp_did)) {
195 device_set_desc(dev, t->txp_name);
204 txp_attach(device_t dev)
206 struct txp_softc *sc;
210 uint8_t enaddr[ETHER_ADDR_LEN];
213 sc = device_get_softc(dev);
214 callout_init(&sc->txp_stat_timer);
216 ifp = &sc->sc_arpcom.ac_if;
217 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
219 pci_enable_busmaster(dev);
222 sc->sc_res = bus_alloc_resource_any(dev, TXP_RES, &rid, RF_ACTIVE);
224 if (sc->sc_res == NULL) {
225 device_printf(dev, "couldn't map ports/memory\n");
229 sc->sc_bt = rman_get_bustag(sc->sc_res);
230 sc->sc_bh = rman_get_bushandle(sc->sc_res);
232 /* Allocate interrupt */
234 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
235 RF_SHAREABLE | RF_ACTIVE);
237 if (sc->sc_irq == NULL) {
238 device_printf(dev, "couldn't map interrupt\n");
243 if (txp_chip_init(sc)) {
248 sc->sc_fwbuf = contigmalloc(32768, M_DEVBUF,
249 M_WAITOK, 0, 0xffffffff, PAGE_SIZE, 0);
250 error = txp_download_fw(sc);
251 contigfree(sc->sc_fwbuf, 32768, M_DEVBUF);
257 sc->sc_ldata = contigmalloc(sizeof(struct txp_ldata), M_DEVBUF,
258 M_WAITOK, 0, 0xffffffff, PAGE_SIZE, 0);
259 bzero(sc->sc_ldata, sizeof(struct txp_ldata));
261 if (txp_alloc_rings(sc)) {
266 if (txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0,
267 NULL, NULL, NULL, 1)) {
272 if (txp_command(sc, TXP_CMD_STATION_ADDRESS_READ, 0, 0, 0,
273 &p1, &p2, NULL, 1)) {
280 enaddr[0] = ((uint8_t *)&p1)[1];
281 enaddr[1] = ((uint8_t *)&p1)[0];
282 enaddr[2] = ((uint8_t *)&p2)[3];
283 enaddr[3] = ((uint8_t *)&p2)[2];
284 enaddr[4] = ((uint8_t *)&p2)[1];
285 enaddr[5] = ((uint8_t *)&p2)[0];
287 ifmedia_init(&sc->sc_ifmedia, 0, txp_ifmedia_upd, txp_ifmedia_sts);
288 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T, 0, NULL);
289 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL);
290 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL);
291 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL);
292 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL);
293 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL);
294 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL);
296 sc->sc_xcvr = TXP_XCVR_AUTO;
297 txp_command(sc, TXP_CMD_XCVR_SELECT, TXP_XCVR_AUTO, 0, 0,
298 NULL, NULL, NULL, 0);
299 ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO);
302 ifp->if_mtu = ETHERMTU;
303 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
304 ifp->if_ioctl = txp_ioctl;
305 ifp->if_start = txp_start;
306 ifp->if_watchdog = txp_watchdog;
307 ifp->if_init = txp_init;
308 ifp->if_baudrate = 100000000;
309 ifq_set_maxlen(&ifp->if_snd, TX_ENTRIES);
310 ifq_set_ready(&ifp->if_snd);
311 ifp->if_hwassist = 0;
312 txp_capabilities(sc);
314 ether_ifattach(ifp, enaddr, NULL);
316 error = bus_setup_intr(dev, sc->sc_irq, INTR_NETSAFE,
317 txp_intr, sc, &sc->sc_intrhand,
320 device_printf(dev, "couldn't set up irq\n");
328 txp_release_resources(dev);
333 txp_detach(device_t dev)
335 struct txp_softc *sc = device_get_softc(dev);
336 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
339 lwkt_serialize_enter(ifp->if_serializer);
343 bus_teardown_intr(dev, sc->sc_irq, sc->sc_intrhand);
345 lwkt_serialize_exit(ifp->if_serializer);
347 ifmedia_removeall(&sc->sc_ifmedia);
350 for (i = 0; i < RXBUF_ENTRIES; i++)
351 free(sc->sc_rxbufs[i].rb_sd, M_DEVBUF);
353 txp_release_resources(dev);
359 txp_release_resources(device_t dev)
361 struct txp_softc *sc;
363 sc = device_get_softc(dev);
365 if (sc->sc_irq != NULL)
366 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq);
368 if (sc->sc_res != NULL)
369 bus_release_resource(dev, TXP_RES, TXP_RID, sc->sc_res);
371 if (sc->sc_ldata != NULL)
372 contigfree(sc->sc_ldata, sizeof(struct txp_ldata), M_DEVBUF);
378 txp_chip_init(struct txp_softc *sc)
380 /* disable interrupts */
381 WRITE_REG(sc, TXP_IER, 0);
382 WRITE_REG(sc, TXP_IMR,
383 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
384 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
387 /* ack all interrupts */
388 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH |
389 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
390 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
391 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
392 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0);
394 if (txp_reset_adapter(sc))
397 /* disable interrupts */
398 WRITE_REG(sc, TXP_IER, 0);
399 WRITE_REG(sc, TXP_IMR,
400 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
401 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
404 /* ack all interrupts */
405 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH |
406 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
407 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
408 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
409 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0);
415 txp_reset_adapter(struct txp_softc *sc)
420 WRITE_REG(sc, TXP_SRR, TXP_SRR_ALL);
422 WRITE_REG(sc, TXP_SRR, 0);
424 /* Should wait max 6 seconds */
425 for (i = 0; i < 6000; i++) {
426 r = READ_REG(sc, TXP_A2H_0);
427 if (r == STAT_WAITING_FOR_HOST_REQUEST)
432 if (r != STAT_WAITING_FOR_HOST_REQUEST) {
433 if_printf(&sc->sc_arpcom.ac_if, "reset hung\n");
441 txp_download_fw(struct txp_softc *sc)
443 struct txp_fw_file_header *fileheader;
444 struct txp_fw_section_header *secthead;
446 u_int32_t r, i, ier, imr;
448 ier = READ_REG(sc, TXP_IER);
449 WRITE_REG(sc, TXP_IER, ier | TXP_INT_A2H_0);
451 imr = READ_REG(sc, TXP_IMR);
452 WRITE_REG(sc, TXP_IMR, imr | TXP_INT_A2H_0);
454 for (i = 0; i < 10000; i++) {
455 r = READ_REG(sc, TXP_A2H_0);
456 if (r == STAT_WAITING_FOR_HOST_REQUEST)
460 if (r != STAT_WAITING_FOR_HOST_REQUEST) {
461 if_printf(&sc->sc_arpcom.ac_if,
462 "not waiting for host request\n");
467 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0);
469 fileheader = (struct txp_fw_file_header *)tc990image;
470 if (bcmp("TYPHOON", fileheader->magicid, sizeof(fileheader->magicid))) {
471 if_printf(&sc->sc_arpcom.ac_if, "fw invalid magic\n");
475 /* Tell boot firmware to get ready for image */
476 WRITE_REG(sc, TXP_H2A_1, fileheader->addr);
477 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_RUNTIME_IMAGE);
479 if (txp_download_fw_wait(sc)) {
480 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed, initial\n");
484 secthead = (struct txp_fw_section_header *)(((u_int8_t *)tc990image) +
485 sizeof(struct txp_fw_file_header));
487 for (sect = 0; sect < fileheader->nsections; sect++) {
488 if (txp_download_fw_section(sc, secthead, sect))
490 secthead = (struct txp_fw_section_header *)
491 (((u_int8_t *)secthead) + secthead->nbytes +
495 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_DOWNLOAD_COMPLETE);
497 for (i = 0; i < 10000; i++) {
498 r = READ_REG(sc, TXP_A2H_0);
499 if (r == STAT_WAITING_FOR_BOOT)
503 if (r != STAT_WAITING_FOR_BOOT) {
504 if_printf(&sc->sc_arpcom.ac_if, "not waiting for boot\n");
508 WRITE_REG(sc, TXP_IER, ier);
509 WRITE_REG(sc, TXP_IMR, imr);
515 txp_download_fw_wait(struct txp_softc *sc)
519 for (i = 0; i < 10000; i++) {
520 r = READ_REG(sc, TXP_ISR);
521 if (r & TXP_INT_A2H_0)
526 if (!(r & TXP_INT_A2H_0)) {
527 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed comm0\n");
531 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0);
533 r = READ_REG(sc, TXP_A2H_0);
534 if (r != STAT_WAITING_FOR_SEGMENT) {
535 if_printf(&sc->sc_arpcom.ac_if, "fw not waiting for segment\n");
542 txp_download_fw_section(struct txp_softc *sc,
543 struct txp_fw_section_header *sect, int sectnum)
550 /* Skip zero length sections */
551 if (sect->nbytes == 0)
554 /* Make sure we aren't past the end of the image */
555 rseg = ((u_int8_t *)sect) - ((u_int8_t *)tc990image);
556 if (rseg >= sizeof(tc990image)) {
557 if_printf(&sc->sc_arpcom.ac_if, "fw invalid section address, "
558 "section %d\n", sectnum);
562 /* Make sure this section doesn't go past the end */
563 rseg += sect->nbytes;
564 if (rseg >= sizeof(tc990image)) {
565 if_printf(&sc->sc_arpcom.ac_if, "fw truncated section %d\n",
570 bcopy(((u_int8_t *)sect) + sizeof(*sect), sc->sc_fwbuf, sect->nbytes);
571 dma = vtophys(sc->sc_fwbuf);
574 * dummy up mbuf and verify section checksum
577 m.m_next = m.m_nextpkt = NULL;
578 m.m_len = sect->nbytes;
579 m.m_data = sc->sc_fwbuf;
581 csum = in_cksum(&m, sect->nbytes);
582 if (csum != sect->cksum) {
583 if_printf(&sc->sc_arpcom.ac_if, "fw section %d, bad "
584 "cksum (expected 0x%x got 0x%x)\n",
585 sectnum, sect->cksum, csum);
590 WRITE_REG(sc, TXP_H2A_1, sect->nbytes);
591 WRITE_REG(sc, TXP_H2A_2, sect->cksum);
592 WRITE_REG(sc, TXP_H2A_3, sect->addr);
593 WRITE_REG(sc, TXP_H2A_4, 0);
594 WRITE_REG(sc, TXP_H2A_5, dma & 0xffffffff);
595 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_SEGMENT_AVAILABLE);
597 if (txp_download_fw_wait(sc)) {
598 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed, "
599 "section %d\n", sectnum);
610 struct txp_softc *sc = vsc;
611 struct txp_hostvar *hv = sc->sc_hostvar;
614 /* mask all interrupts */
615 WRITE_REG(sc, TXP_IMR, TXP_INT_RESERVED | TXP_INT_SELF |
616 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
617 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 |
618 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
619 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH);
621 isr = READ_REG(sc, TXP_ISR);
623 WRITE_REG(sc, TXP_ISR, isr);
625 if ((*sc->sc_rxhir.r_roff) != (*sc->sc_rxhir.r_woff))
626 txp_rx_reclaim(sc, &sc->sc_rxhir);
627 if ((*sc->sc_rxlor.r_roff) != (*sc->sc_rxlor.r_woff))
628 txp_rx_reclaim(sc, &sc->sc_rxlor);
630 if (hv->hv_rx_buf_write_idx == hv->hv_rx_buf_read_idx)
631 txp_rxbuf_reclaim(sc);
633 if (sc->sc_txhir.r_cnt && (sc->sc_txhir.r_cons !=
634 TXP_OFFSET2IDX(*(sc->sc_txhir.r_off))))
635 txp_tx_reclaim(sc, &sc->sc_txhir);
637 if (sc->sc_txlor.r_cnt && (sc->sc_txlor.r_cons !=
638 TXP_OFFSET2IDX(*(sc->sc_txlor.r_off))))
639 txp_tx_reclaim(sc, &sc->sc_txlor);
641 isr = READ_REG(sc, TXP_ISR);
644 /* unmask all interrupts */
645 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3);
647 txp_start(&sc->sc_arpcom.ac_if);
653 txp_rx_reclaim(struct txp_softc *sc, struct txp_rx_ring *r)
655 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
656 struct txp_rx_desc *rxd;
658 struct txp_swdesc *sd = NULL;
659 u_int32_t roff, woff;
663 rxd = r->r_desc + (roff / sizeof(struct txp_rx_desc));
665 while (roff != woff) {
667 if (rxd->rx_flags & RX_FLAGS_ERROR) {
668 if_printf(ifp, "error 0x%x\n", rxd->rx_stat);
673 /* retrieve stashed pointer */
679 m->m_pkthdr.len = m->m_len = rxd->rx_len;
681 #ifdef __STRICT_ALIGNMENT
684 * XXX Nice chip, except it won't accept "off by 2"
685 * buffers, so we're force to copy. Supposedly
686 * this will be fixed in a newer firmware rev
687 * and this will be temporary.
691 MGETHDR(mnew, MB_DONTWAIT, MT_DATA);
696 if (m->m_len > (MHLEN - 2)) {
697 MCLGET(mnew, MB_DONTWAIT);
698 if (!(mnew->m_flags & M_EXT)) {
704 mnew->m_pkthdr.rcvif = ifp;
706 mnew->m_pkthdr.len = mnew->m_len = m->m_len;
707 m_copydata(m, 0, m->m_pkthdr.len, mtod(mnew, caddr_t));
713 if (rxd->rx_stat & RX_STAT_IPCKSUMBAD)
714 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
715 else if (rxd->rx_stat & RX_STAT_IPCKSUMGOOD)
716 m->m_pkthdr.csum_flags |=
717 CSUM_IP_CHECKED|CSUM_IP_VALID;
719 if ((rxd->rx_stat & RX_STAT_TCPCKSUMGOOD) ||
720 (rxd->rx_stat & RX_STAT_UDPCKSUMGOOD)) {
721 m->m_pkthdr.csum_flags |=
722 CSUM_DATA_VALID|CSUM_PSEUDO_HDR;
723 m->m_pkthdr.csum_data = 0xffff;
726 lwkt_serialize_enter(ifp->if_serializer);
727 if (rxd->rx_stat & RX_STAT_VLAN)
728 VLAN_INPUT_TAG(m, htons(rxd->rx_vlan >> 16));
730 ifp->if_input(ifp, m);
731 lwkt_serialize_exit(ifp->if_serializer);
735 roff += sizeof(struct txp_rx_desc);
736 if (roff == (RX_ENTRIES * sizeof(struct txp_rx_desc))) {
750 txp_rxbuf_reclaim(struct txp_softc *sc)
752 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
753 struct txp_hostvar *hv = sc->sc_hostvar;
754 struct txp_rxbuf_desc *rbd;
755 struct txp_swdesc *sd;
758 if (!(ifp->if_flags & IFF_RUNNING))
761 i = sc->sc_rxbufprod;
762 rbd = sc->sc_rxbufs + i;
766 if (sd->sd_mbuf != NULL)
769 MGETHDR(sd->sd_mbuf, MB_DONTWAIT, MT_DATA);
770 if (sd->sd_mbuf == NULL)
773 MCLGET(sd->sd_mbuf, MB_DONTWAIT);
774 if ((sd->sd_mbuf->m_flags & M_EXT) == 0)
776 sd->sd_mbuf->m_pkthdr.rcvif = ifp;
777 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES;
779 rbd->rb_paddrlo = vtophys(mtod(sd->sd_mbuf, vm_offset_t))
783 hv->hv_rx_buf_write_idx = TXP_IDX2OFFSET(i);
785 if (++i == RXBUF_ENTRIES) {
792 sc->sc_rxbufprod = i;
797 m_freem(sd->sd_mbuf);
803 * Reclaim mbufs and entries from a transmit ring.
806 txp_tx_reclaim(struct txp_softc *sc, struct txp_tx_ring *r)
808 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
809 u_int32_t idx = TXP_OFFSET2IDX(*(r->r_off));
810 u_int32_t cons = r->r_cons, cnt = r->r_cnt;
811 struct txp_tx_desc *txd = r->r_desc + cons;
812 struct txp_swdesc *sd = sc->sc_txd + cons;
815 while (cons != idx) {
819 if ((txd->tx_flags & TX_FLAGS_TYPE_M) ==
820 TX_FLAGS_TYPE_DATA) {
829 ifp->if_flags &= ~IFF_OACTIVE;
831 if (++cons == TX_ENTRIES) {
850 txp_shutdown(device_t dev)
852 struct txp_softc *sc;
855 sc = device_get_softc(dev);
856 ifp = &sc->sc_arpcom.ac_if;
857 lwkt_serialize_enter(ifp->if_serializer);
859 /* mask all interrupts */
860 WRITE_REG(sc, TXP_IMR,
861 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
862 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
865 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0);
866 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0);
867 txp_command(sc, TXP_CMD_HALT, 0, 0, 0, NULL, NULL, NULL, 0);
869 lwkt_serialize_exit(ifp->if_serializer);
874 txp_alloc_rings(struct txp_softc *sc)
876 struct txp_boot_record *boot;
877 struct txp_ldata *ld;
882 boot = &ld->txp_boot;
888 bzero(&ld->txp_hostvar, sizeof(struct txp_hostvar));
889 boot->br_hostvar_lo = vtophys(&ld->txp_hostvar);
890 boot->br_hostvar_hi = 0;
891 sc->sc_hostvar = (struct txp_hostvar *)&ld->txp_hostvar;
893 /* hi priority tx ring */
894 boot->br_txhipri_lo = vtophys(&ld->txp_txhiring);;
895 boot->br_txhipri_hi = 0;
896 boot->br_txhipri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc);
897 sc->sc_txhir.r_reg = TXP_H2A_1;
898 sc->sc_txhir.r_desc = (struct txp_tx_desc *)&ld->txp_txhiring;
899 sc->sc_txhir.r_cons = sc->sc_txhir.r_prod = sc->sc_txhir.r_cnt = 0;
900 sc->sc_txhir.r_off = &sc->sc_hostvar->hv_tx_hi_desc_read_idx;
902 /* lo priority tx ring */
903 boot->br_txlopri_lo = vtophys(&ld->txp_txloring);
904 boot->br_txlopri_hi = 0;
905 boot->br_txlopri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc);
906 sc->sc_txlor.r_reg = TXP_H2A_3;
907 sc->sc_txlor.r_desc = (struct txp_tx_desc *)&ld->txp_txloring;
908 sc->sc_txlor.r_cons = sc->sc_txlor.r_prod = sc->sc_txlor.r_cnt = 0;
909 sc->sc_txlor.r_off = &sc->sc_hostvar->hv_tx_lo_desc_read_idx;
911 /* high priority rx ring */
912 boot->br_rxhipri_lo = vtophys(&ld->txp_rxhiring);
913 boot->br_rxhipri_hi = 0;
914 boot->br_rxhipri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc);
915 sc->sc_rxhir.r_desc = (struct txp_rx_desc *)&ld->txp_rxhiring;
916 sc->sc_rxhir.r_roff = &sc->sc_hostvar->hv_rx_hi_read_idx;
917 sc->sc_rxhir.r_woff = &sc->sc_hostvar->hv_rx_hi_write_idx;
919 /* low priority rx ring */
920 boot->br_rxlopri_lo = vtophys(&ld->txp_rxloring);
921 boot->br_rxlopri_hi = 0;
922 boot->br_rxlopri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc);
923 sc->sc_rxlor.r_desc = (struct txp_rx_desc *)&ld->txp_rxloring;
924 sc->sc_rxlor.r_roff = &sc->sc_hostvar->hv_rx_lo_read_idx;
925 sc->sc_rxlor.r_woff = &sc->sc_hostvar->hv_rx_lo_write_idx;
928 bzero(&ld->txp_cmdring, sizeof(struct txp_cmd_desc) * CMD_ENTRIES);
929 boot->br_cmd_lo = vtophys(&ld->txp_cmdring);
931 boot->br_cmd_siz = CMD_ENTRIES * sizeof(struct txp_cmd_desc);
932 sc->sc_cmdring.base = (struct txp_cmd_desc *)&ld->txp_cmdring;
933 sc->sc_cmdring.size = CMD_ENTRIES * sizeof(struct txp_cmd_desc);
934 sc->sc_cmdring.lastwrite = 0;
937 bzero(&ld->txp_rspring, sizeof(struct txp_rsp_desc) * RSP_ENTRIES);
938 boot->br_resp_lo = vtophys(&ld->txp_rspring);
939 boot->br_resp_hi = 0;
940 boot->br_resp_siz = CMD_ENTRIES * sizeof(struct txp_rsp_desc);
941 sc->sc_rspring.base = (struct txp_rsp_desc *)&ld->txp_rspring;
942 sc->sc_rspring.size = RSP_ENTRIES * sizeof(struct txp_rsp_desc);
943 sc->sc_rspring.lastwrite = 0;
945 /* receive buffer ring */
946 boot->br_rxbuf_lo = vtophys(&ld->txp_rxbufs);
947 boot->br_rxbuf_hi = 0;
948 boot->br_rxbuf_siz = RXBUF_ENTRIES * sizeof(struct txp_rxbuf_desc);
949 sc->sc_rxbufs = (struct txp_rxbuf_desc *)&ld->txp_rxbufs;
951 for (i = 0; i < RXBUF_ENTRIES; i++) {
952 struct txp_swdesc *sd;
953 if (sc->sc_rxbufs[i].rb_sd != NULL)
955 sc->sc_rxbufs[i].rb_sd = malloc(sizeof(struct txp_swdesc),
957 if (sc->sc_rxbufs[i].rb_sd == NULL)
959 sd = sc->sc_rxbufs[i].rb_sd;
962 sc->sc_rxbufprod = 0;
965 bzero(&ld->txp_zero, sizeof(u_int32_t));
966 boot->br_zero_lo = vtophys(&ld->txp_zero);
967 boot->br_zero_hi = 0;
969 /* See if it's waiting for boot, and try to boot it */
970 for (i = 0; i < 10000; i++) {
971 r = READ_REG(sc, TXP_A2H_0);
972 if (r == STAT_WAITING_FOR_BOOT)
977 if (r != STAT_WAITING_FOR_BOOT) {
978 if_printf(&sc->sc_arpcom.ac_if, "not waiting for boot\n");
982 WRITE_REG(sc, TXP_H2A_2, 0);
983 WRITE_REG(sc, TXP_H2A_1, vtophys(sc->sc_boot));
984 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_REGISTER_BOOT_RECORD);
986 /* See if it booted */
987 for (i = 0; i < 10000; i++) {
988 r = READ_REG(sc, TXP_A2H_0);
989 if (r == STAT_RUNNING)
993 if (r != STAT_RUNNING) {
994 if_printf(&sc->sc_arpcom.ac_if, "fw not running\n");
998 /* Clear TX and CMD ring write registers */
999 WRITE_REG(sc, TXP_H2A_1, TXP_BOOTCMD_NULL);
1000 WRITE_REG(sc, TXP_H2A_2, TXP_BOOTCMD_NULL);
1001 WRITE_REG(sc, TXP_H2A_3, TXP_BOOTCMD_NULL);
1002 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_NULL);
1008 txp_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1010 struct txp_softc *sc = ifp->if_softc;
1011 struct ifreq *ifr = (struct ifreq *)data;
1016 if (ifp->if_flags & IFF_UP) {
1019 if (ifp->if_flags & IFF_RUNNING)
1026 * Multicast list has changed; set the hardware
1027 * filter accordingly.
1034 error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, command);
1037 error = ether_ioctl(ifp, command, data);
1044 txp_rxring_fill(struct txp_softc *sc)
1048 struct txp_swdesc *sd;
1050 ifp = &sc->sc_arpcom.ac_if;
1052 for (i = 0; i < RXBUF_ENTRIES; i++) {
1053 sd = sc->sc_rxbufs[i].rb_sd;
1054 MGETHDR(sd->sd_mbuf, MB_DONTWAIT, MT_DATA);
1055 if (sd->sd_mbuf == NULL)
1058 MCLGET(sd->sd_mbuf, MB_DONTWAIT);
1059 if ((sd->sd_mbuf->m_flags & M_EXT) == 0) {
1060 m_freem(sd->sd_mbuf);
1063 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES;
1064 sd->sd_mbuf->m_pkthdr.rcvif = ifp;
1066 sc->sc_rxbufs[i].rb_paddrlo =
1067 vtophys(mtod(sd->sd_mbuf, vm_offset_t));
1068 sc->sc_rxbufs[i].rb_paddrhi = 0;
1071 sc->sc_hostvar->hv_rx_buf_write_idx = (RXBUF_ENTRIES - 1) *
1072 sizeof(struct txp_rxbuf_desc);
1078 txp_rxring_empty(struct txp_softc *sc)
1081 struct txp_swdesc *sd;
1083 if (sc->sc_rxbufs == NULL)
1086 for (i = 0; i < RXBUF_ENTRIES; i++) {
1087 if (&sc->sc_rxbufs[i] == NULL)
1089 sd = sc->sc_rxbufs[i].rb_sd;
1092 if (sd->sd_mbuf != NULL) {
1093 m_freem(sd->sd_mbuf);
1104 struct txp_softc *sc;
1110 ifp = &sc->sc_arpcom.ac_if;
1112 if (ifp->if_flags & IFF_RUNNING)
1117 txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0,
1118 NULL, NULL, NULL, 1);
1120 /* Set station address. */
1121 ((u_int8_t *)&p1)[1] = sc->sc_arpcom.ac_enaddr[0];
1122 ((u_int8_t *)&p1)[0] = sc->sc_arpcom.ac_enaddr[1];
1123 ((u_int8_t *)&p2)[3] = sc->sc_arpcom.ac_enaddr[2];
1124 ((u_int8_t *)&p2)[2] = sc->sc_arpcom.ac_enaddr[3];
1125 ((u_int8_t *)&p2)[1] = sc->sc_arpcom.ac_enaddr[4];
1126 ((u_int8_t *)&p2)[0] = sc->sc_arpcom.ac_enaddr[5];
1127 txp_command(sc, TXP_CMD_STATION_ADDRESS_WRITE, p1, p2, 0,
1128 NULL, NULL, NULL, 1);
1132 txp_rxring_fill(sc);
1134 txp_command(sc, TXP_CMD_TX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1135 txp_command(sc, TXP_CMD_RX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1137 WRITE_REG(sc, TXP_IER, TXP_INT_RESERVED | TXP_INT_SELF |
1138 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
1139 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 |
1140 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
1141 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH);
1142 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3);
1144 ifp->if_flags |= IFF_RUNNING;
1145 ifp->if_flags &= ~IFF_OACTIVE;
1148 callout_reset(&sc->txp_stat_timer, hz, txp_tick, sc);
1154 struct txp_softc *sc = vsc;
1155 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1156 struct txp_rsp_desc *rsp = NULL;
1157 struct txp_ext_desc *ext;
1159 lwkt_serialize_enter(ifp->if_serializer);
1160 txp_rxbuf_reclaim(sc);
1162 if (txp_command2(sc, TXP_CMD_READ_STATISTICS, 0, 0, 0, NULL, 0,
1165 if (rsp->rsp_numdesc != 6)
1167 if (txp_command(sc, TXP_CMD_CLEAR_STATISTICS, 0, 0, 0,
1168 NULL, NULL, NULL, 1))
1170 ext = (struct txp_ext_desc *)(rsp + 1);
1172 ifp->if_ierrors += ext[3].ext_2 + ext[3].ext_3 + ext[3].ext_4 +
1173 ext[4].ext_1 + ext[4].ext_4;
1174 ifp->if_oerrors += ext[0].ext_1 + ext[1].ext_1 + ext[1].ext_4 +
1176 ifp->if_collisions += ext[0].ext_2 + ext[0].ext_3 + ext[1].ext_2 +
1178 ifp->if_opackets += rsp->rsp_par2;
1179 ifp->if_ipackets += ext[2].ext_3;
1183 free(rsp, M_DEVBUF);
1185 callout_reset(&sc->txp_stat_timer, hz, txp_tick, sc);
1186 lwkt_serialize_exit(ifp->if_serializer);
1190 txp_start(struct ifnet *ifp)
1192 struct txp_softc *sc = ifp->if_softc;
1193 struct txp_tx_ring *r = &sc->sc_txhir;
1194 struct txp_tx_desc *txd;
1195 struct txp_frag_desc *fxd;
1196 struct mbuf *m, *m0;
1197 struct txp_swdesc *sd;
1198 u_int32_t firstprod, firstcnt, prod, cnt;
1201 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1208 m = ifq_poll(&ifp->if_snd);
1215 sd = sc->sc_txd + prod;
1218 if ((TX_ENTRIES - cnt) < 4)
1221 txd = r->r_desc + prod;
1223 txd->tx_flags = TX_FLAGS_TYPE_DATA;
1224 txd->tx_numdesc = 0;
1230 if (++prod == TX_ENTRIES)
1233 if (++cnt >= (TX_ENTRIES - 4))
1236 if ((m->m_flags & (M_PROTO1|M_PKTHDR)) == (M_PROTO1|M_PKTHDR) &&
1237 m->m_pkthdr.rcvif != NULL) {
1238 ifv = m->m_pkthdr.rcvif->if_softc;
1239 txd->tx_pflags = TX_PFLAGS_VLAN |
1240 (htons(ifv->ifv_tag) << TX_PFLAGS_VLANTAG_S);
1243 if (m->m_pkthdr.csum_flags & CSUM_IP)
1244 txd->tx_pflags |= TX_PFLAGS_IPCKSUM;
1247 if (m->m_pkthdr.csum_flags & CSUM_TCP)
1248 txd->tx_pflags |= TX_PFLAGS_TCPCKSUM;
1249 if (m->m_pkthdr.csum_flags & CSUM_UDP)
1250 txd->tx_pflags |= TX_PFLAGS_UDPCKSUM;
1253 fxd = (struct txp_frag_desc *)(r->r_desc + prod);
1254 for (m0 = m; m0 != NULL; m0 = m0->m_next) {
1257 if (++cnt >= (TX_ENTRIES - 4))
1262 fxd->frag_flags = FRAG_FLAGS_TYPE_FRAG;
1263 fxd->frag_rsvd1 = 0;
1264 fxd->frag_len = m0->m_len;
1265 fxd->frag_addrlo = vtophys(mtod(m0, vm_offset_t));
1266 fxd->frag_addrhi = 0;
1267 fxd->frag_rsvd2 = 0;
1269 if (++prod == TX_ENTRIES) {
1270 fxd = (struct txp_frag_desc *)r->r_desc;
1279 ifq_dequeue(&ifp->if_snd, m);
1281 WRITE_REG(sc, r->r_reg, TXP_IDX2OFFSET(prod));
1289 ifp->if_flags |= IFF_OACTIVE;
1290 r->r_prod = firstprod;
1291 r->r_cnt = firstcnt;
1296 * Handle simple commands sent to the typhoon
1299 txp_command(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2,
1300 u_int32_t in3, u_int16_t *out1, u_int32_t *out2, u_int32_t *out3,
1303 struct txp_rsp_desc *rsp = NULL;
1305 if (txp_command2(sc, id, in1, in2, in3, NULL, 0, &rsp, wait))
1312 *out1 = rsp->rsp_par1;
1314 *out2 = rsp->rsp_par2;
1316 *out3 = rsp->rsp_par3;
1317 free(rsp, M_DEVBUF);
1322 txp_command2(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2,
1323 u_int32_t in3, struct txp_ext_desc *in_extp, u_int8_t in_extn,
1324 struct txp_rsp_desc **rspp, int wait)
1326 struct txp_hostvar *hv = sc->sc_hostvar;
1327 struct txp_cmd_desc *cmd;
1328 struct txp_ext_desc *ext;
1332 if (txp_cmd_desc_numfree(sc) < (in_extn + 1)) {
1333 if_printf(&sc->sc_arpcom.ac_if, "no free cmd descriptors\n");
1337 idx = sc->sc_cmdring.lastwrite;
1338 cmd = (struct txp_cmd_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
1339 bzero(cmd, sizeof(*cmd));
1341 cmd->cmd_numdesc = in_extn;
1342 cmd->cmd_seq = seq = sc->sc_seq++;
1344 cmd->cmd_par1 = in1;
1345 cmd->cmd_par2 = in2;
1346 cmd->cmd_par3 = in3;
1347 cmd->cmd_flags = CMD_FLAGS_TYPE_CMD |
1348 (wait ? CMD_FLAGS_RESP : 0) | CMD_FLAGS_VALID;
1350 idx += sizeof(struct txp_cmd_desc);
1351 if (idx == sc->sc_cmdring.size)
1354 for (i = 0; i < in_extn; i++) {
1355 ext = (struct txp_ext_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
1356 bcopy(in_extp, ext, sizeof(struct txp_ext_desc));
1358 idx += sizeof(struct txp_cmd_desc);
1359 if (idx == sc->sc_cmdring.size)
1363 sc->sc_cmdring.lastwrite = idx;
1365 WRITE_REG(sc, TXP_H2A_2, sc->sc_cmdring.lastwrite);
1370 for (i = 0; i < 10000; i++) {
1371 idx = hv->hv_resp_read_idx;
1372 if (idx != hv->hv_resp_write_idx) {
1374 if (txp_response(sc, idx, id, seq, rspp))
1381 if (i == 1000 || (*rspp) == NULL) {
1382 if_printf(&sc->sc_arpcom.ac_if, "0x%x command failed\n", id);
1390 txp_response(struct txp_softc *sc, u_int32_t ridx, u_int16_t id, u_int16_t seq,
1391 struct txp_rsp_desc **rspp)
1393 struct txp_hostvar *hv = sc->sc_hostvar;
1394 struct txp_rsp_desc *rsp;
1396 while (ridx != hv->hv_resp_write_idx) {
1397 rsp = (struct txp_rsp_desc *)(((u_int8_t *)sc->sc_rspring.base) + ridx);
1399 if (id == rsp->rsp_id && rsp->rsp_seq == seq) {
1400 *rspp = (struct txp_rsp_desc *)malloc(
1401 sizeof(struct txp_rsp_desc) * (rsp->rsp_numdesc + 1),
1402 M_DEVBUF, M_INTWAIT);
1403 if ((*rspp) == NULL)
1405 txp_rsp_fixup(sc, rsp, *rspp);
1409 if (rsp->rsp_flags & RSP_FLAGS_ERROR) {
1410 if_printf(&sc->sc_arpcom.ac_if, "response error!\n");
1411 txp_rsp_fixup(sc, rsp, NULL);
1412 ridx = hv->hv_resp_read_idx;
1416 switch (rsp->rsp_id) {
1417 case TXP_CMD_CYCLE_STATISTICS:
1418 case TXP_CMD_MEDIA_STATUS_READ:
1420 case TXP_CMD_HELLO_RESPONSE:
1421 if_printf(&sc->sc_arpcom.ac_if, "hello\n");
1424 if_printf(&sc->sc_arpcom.ac_if, "unknown id(0x%x)\n",
1428 txp_rsp_fixup(sc, rsp, NULL);
1429 ridx = hv->hv_resp_read_idx;
1430 hv->hv_resp_read_idx = ridx;
1437 txp_rsp_fixup(struct txp_softc *sc, struct txp_rsp_desc *rsp,
1438 struct txp_rsp_desc *dst)
1440 struct txp_rsp_desc *src = rsp;
1441 struct txp_hostvar *hv = sc->sc_hostvar;
1444 ridx = hv->hv_resp_read_idx;
1446 for (i = 0; i < rsp->rsp_numdesc + 1; i++) {
1448 bcopy(src, dst++, sizeof(struct txp_rsp_desc));
1449 ridx += sizeof(struct txp_rsp_desc);
1450 if (ridx == sc->sc_rspring.size) {
1451 src = sc->sc_rspring.base;
1455 sc->sc_rspring.lastwrite = hv->hv_resp_read_idx = ridx;
1458 hv->hv_resp_read_idx = ridx;
1462 txp_cmd_desc_numfree(struct txp_softc *sc)
1464 struct txp_hostvar *hv = sc->sc_hostvar;
1465 struct txp_boot_record *br = sc->sc_boot;
1466 u_int32_t widx, ridx, nfree;
1468 widx = sc->sc_cmdring.lastwrite;
1469 ridx = hv->hv_cmd_read_idx;
1472 /* Ring is completely free */
1473 nfree = br->br_cmd_siz - sizeof(struct txp_cmd_desc);
1476 nfree = br->br_cmd_siz -
1477 (widx - ridx + sizeof(struct txp_cmd_desc));
1479 nfree = ridx - widx - sizeof(struct txp_cmd_desc);
1482 return (nfree / sizeof(struct txp_cmd_desc));
1486 txp_stop(struct txp_softc *sc)
1490 ifp = &sc->sc_arpcom.ac_if;
1492 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1494 callout_stop(&sc->txp_stat_timer);
1496 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1497 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1499 txp_rxring_empty(sc);
1505 txp_watchdog(struct ifnet *ifp)
1511 txp_ifmedia_upd(struct ifnet *ifp)
1513 struct txp_softc *sc = ifp->if_softc;
1514 struct ifmedia *ifm = &sc->sc_ifmedia;
1517 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1520 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_10_T) {
1521 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1522 new_xcvr = TXP_XCVR_10_FDX;
1524 new_xcvr = TXP_XCVR_10_HDX;
1525 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) {
1526 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1527 new_xcvr = TXP_XCVR_100_FDX;
1529 new_xcvr = TXP_XCVR_100_HDX;
1530 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) {
1531 new_xcvr = TXP_XCVR_AUTO;
1536 if (sc->sc_xcvr == new_xcvr)
1539 txp_command(sc, TXP_CMD_XCVR_SELECT, new_xcvr, 0, 0,
1540 NULL, NULL, NULL, 0);
1541 sc->sc_xcvr = new_xcvr;
1547 txp_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1549 struct txp_softc *sc = ifp->if_softc;
1550 struct ifmedia *ifm = &sc->sc_ifmedia;
1551 u_int16_t bmsr, bmcr, anlpar;
1553 ifmr->ifm_status = IFM_AVALID;
1554 ifmr->ifm_active = IFM_ETHER;
1556 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0,
1557 &bmsr, NULL, NULL, 1))
1559 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0,
1560 &bmsr, NULL, NULL, 1))
1563 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMCR, 0,
1564 &bmcr, NULL, NULL, 1))
1567 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_ANLPAR, 0,
1568 &anlpar, NULL, NULL, 1))
1571 if (bmsr & BMSR_LINK)
1572 ifmr->ifm_status |= IFM_ACTIVE;
1574 if (bmcr & BMCR_ISO) {
1575 ifmr->ifm_active |= IFM_NONE;
1576 ifmr->ifm_status = 0;
1580 if (bmcr & BMCR_LOOP)
1581 ifmr->ifm_active |= IFM_LOOP;
1583 if (bmcr & BMCR_AUTOEN) {
1584 if ((bmsr & BMSR_ACOMP) == 0) {
1585 ifmr->ifm_active |= IFM_NONE;
1589 if (anlpar & ANLPAR_T4)
1590 ifmr->ifm_active |= IFM_100_T4;
1591 else if (anlpar & ANLPAR_TX_FD)
1592 ifmr->ifm_active |= IFM_100_TX|IFM_FDX;
1593 else if (anlpar & ANLPAR_TX)
1594 ifmr->ifm_active |= IFM_100_TX;
1595 else if (anlpar & ANLPAR_10_FD)
1596 ifmr->ifm_active |= IFM_10_T|IFM_FDX;
1597 else if (anlpar & ANLPAR_10)
1598 ifmr->ifm_active |= IFM_10_T;
1600 ifmr->ifm_active |= IFM_NONE;
1602 ifmr->ifm_active = ifm->ifm_cur->ifm_media;
1606 ifmr->ifm_active |= IFM_NONE;
1607 ifmr->ifm_status &= ~IFM_AVALID;
1612 txp_show_descriptor(void *d)
1614 struct txp_cmd_desc *cmd = d;
1615 struct txp_rsp_desc *rsp = d;
1616 struct txp_tx_desc *txd = d;
1617 struct txp_frag_desc *frgd = d;
1619 switch (cmd->cmd_flags & CMD_FLAGS_TYPE_M) {
1620 case CMD_FLAGS_TYPE_CMD:
1621 /* command descriptor */
1622 printf("[cmd flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1623 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq,
1624 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3);
1626 case CMD_FLAGS_TYPE_RESP:
1627 /* response descriptor */
1628 printf("[rsp flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1629 rsp->rsp_flags, rsp->rsp_numdesc, rsp->rsp_id, rsp->rsp_seq,
1630 rsp->rsp_par1, rsp->rsp_par2, rsp->rsp_par3);
1632 case CMD_FLAGS_TYPE_DATA:
1633 /* data header (assuming tx for now) */
1634 printf("[data flags 0x%x num %d totlen %d addr 0x%x/0x%x pflags 0x%x]",
1635 txd->tx_flags, txd->tx_numdesc, txd->tx_totlen,
1636 txd->tx_addrlo, txd->tx_addrhi, txd->tx_pflags);
1638 case CMD_FLAGS_TYPE_FRAG:
1639 /* fragment descriptor */
1640 printf("[frag flags 0x%x rsvd1 0x%x len %d addr 0x%x/0x%x rsvd2 0x%x]",
1641 frgd->frag_flags, frgd->frag_rsvd1, frgd->frag_len,
1642 frgd->frag_addrlo, frgd->frag_addrhi, frgd->frag_rsvd2);
1645 printf("[unknown(%x) flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1646 cmd->cmd_flags & CMD_FLAGS_TYPE_M,
1647 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq,
1648 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3);
1655 txp_set_filter(struct txp_softc *sc)
1657 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1659 struct ifmultiaddr *ifma;
1661 if (ifp->if_flags & IFF_PROMISC) {
1662 filter = TXP_RXFILT_PROMISC;
1666 filter = TXP_RXFILT_DIRECT;
1668 if (ifp->if_flags & IFF_BROADCAST)
1669 filter |= TXP_RXFILT_BROADCAST;
1671 if (ifp->if_flags & IFF_ALLMULTI) {
1672 filter |= TXP_RXFILT_ALLMULTI;
1674 uint32_t hashbit, hash[2];
1677 hash[0] = hash[1] = 0;
1679 LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1680 if (ifma->ifma_addr->sa_family != AF_LINK)
1684 hashbit = (uint16_t)(ether_crc32_be(
1685 LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1686 ETHER_ADDR_LEN) & (64 - 1));
1687 hash[hashbit / 32] |= (1 << hashbit % 32);
1691 filter |= TXP_RXFILT_HASHMULTI;
1692 txp_command(sc, TXP_CMD_MCAST_HASH_MASK_WRITE,
1693 2, hash[0], hash[1], NULL, NULL, NULL, 0);
1698 txp_command(sc, TXP_CMD_RX_FILTER_WRITE, filter, 0, 0,
1699 NULL, NULL, NULL, 1);
1703 txp_capabilities(struct txp_softc *sc)
1705 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1706 struct txp_rsp_desc *rsp = NULL;
1707 struct txp_ext_desc *ext;
1709 if (txp_command2(sc, TXP_CMD_OFFLOAD_READ, 0, 0, 0, NULL, 0, &rsp, 1))
1712 if (rsp->rsp_numdesc != 1)
1714 ext = (struct txp_ext_desc *)(rsp + 1);
1716 sc->sc_tx_capability = ext->ext_1 & OFFLOAD_MASK;
1717 sc->sc_rx_capability = ext->ext_2 & OFFLOAD_MASK;
1718 ifp->if_capabilities = 0;
1720 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_VLAN) {
1721 sc->sc_tx_capability |= OFFLOAD_VLAN;
1722 sc->sc_rx_capability |= OFFLOAD_VLAN;
1727 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPSEC) {
1728 sc->sc_tx_capability |= OFFLOAD_IPSEC;
1729 sc->sc_rx_capability |= OFFLOAD_IPSEC;
1730 ifp->if_capabilities |= IFCAP_IPSEC;
1734 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPCKSUM) {
1735 sc->sc_tx_capability |= OFFLOAD_IPCKSUM;
1736 sc->sc_rx_capability |= OFFLOAD_IPCKSUM;
1737 ifp->if_capabilities |= IFCAP_HWCSUM;
1738 ifp->if_hwassist |= CSUM_IP;
1741 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_TCPCKSUM) {
1743 sc->sc_tx_capability |= OFFLOAD_TCPCKSUM;
1745 sc->sc_rx_capability |= OFFLOAD_TCPCKSUM;
1746 ifp->if_capabilities |= IFCAP_HWCSUM;
1749 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_UDPCKSUM) {
1751 sc->sc_tx_capability |= OFFLOAD_UDPCKSUM;
1753 sc->sc_rx_capability |= OFFLOAD_UDPCKSUM;
1754 ifp->if_capabilities |= IFCAP_HWCSUM;
1756 ifp->if_capenable = ifp->if_capabilities;
1758 if (txp_command(sc, TXP_CMD_OFFLOAD_WRITE, 0,
1759 sc->sc_tx_capability, sc->sc_rx_capability, NULL, NULL, NULL, 1))
1764 free(rsp, M_DEVBUF);