sys/dev/netif/ipw/if_ipw.c

   1 /*-
   2  * Copyright (c) 2004, 2005
   3  *      Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice unmodified, this list of conditions, and the following
  10  *    disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  *
  28  * $Id: if_ipw.c,v 1.7.2.1 2005/01/13 20:01:03 damien Exp $
  29  * $DragonFly: src/sys/dev/netif/ipw/Attic/if_ipw.c,v 1.3 2005/03/07 10:11:05 joerg Exp $
  30  */
  31
  32 /*-
  33  * Intel(R) PRO/Wireless 2100 MiniPCI driver
  34  * http://www.intel.com/network/connectivity/products/wireless/prowireless_mobile.htm
  35  */
  36
  37 #include <sys/param.h>
  38 #include <sys/sysctl.h>
  39 #include <sys/sockio.h>
  40 #include <sys/mbuf.h>
  41 #include <sys/kernel.h>
  42 #include <sys/socket.h>
  43 #include <sys/systm.h>
  44 #include <sys/malloc.h>
  45 #include <sys/module.h>
  46 #include <sys/bus.h>
  47 #include <sys/endian.h>
  48 #include <sys/proc.h>
  49 #include <sys/ucred.h>
  50
  51 #include <machine/bus.h>
  52 #include <machine/resource.h>
  53 #include <machine/clock.h>
  54 #include <sys/rman.h>
  55
  56 #include <bus/pci/pcireg.h>
  57 #include <bus/pci/pcivar.h>
  58
  59 #include <net/bpf.h>
  60 #include <net/if.h>
  61 #include <net/if_arp.h>
  62 #include <net/ethernet.h>
  63 #include <net/if_dl.h>
  64 #include <net/if_media.h>
  65 #include <net/if_types.h>
  66 #include <net/ifq_var.h>
  67
  68 #include <netinet/in.h>
  69 #include <netinet/in_systm.h>
  70 #include <netinet/in_var.h>
  71 #include <netinet/ip.h>
  72 #include <netinet/if_ether.h>
  73
  74 #include <netproto/802_11/ieee80211_var.h>
  75 #include <netproto/802_11/ieee80211_ioctl.h>
  76 #include <netproto/802_11/ieee80211_radiotap.h>
  77 #include <netproto/802_11/if_wavelan_ieee.h>
  78
  79 #include "if_ipwreg.h"
  80 #include "if_ipwvar.h"
  81
  82 #ifdef IPW_DEBUG
  83 #define DPRINTF(x)      if (ipw_debug > 0) printf x
  84 #define DPRINTFN(n, x)  if (ipw_debug >= (n)) printf x
  85 int ipw_debug = 0;
  86 SYSCTL_INT(_debug, OID_AUTO, ipw, CTLFLAG_RW, &ipw_debug, 0, "ipw debug level");
  87 #else
  88 #define DPRINTF(x)
  89 #define DPRINTFN(n, x)
  90 #endif
  91
  92 MODULE_DEPEND(ipw, pci,  1, 1, 1);
  93 MODULE_DEPEND(ipw, wlan, 1, 1, 1);
  94
  95 struct ipw_ident {
  96         u_int16_t       vendor;
  97         u_int16_t       device;
  98         const char      *name;
  99 };
 100
 101 static const struct ipw_ident ipw_ident_table[] = {
 102         { 0x8086, 0x1043, "Intel(R) PRO/Wireless 2100 MiniPCI" },
 103
 104         { 0, 0, NULL }
 105 };
 106
 107 static const struct ieee80211_rateset ipw_rateset_11b =
 108         { 4, { 2, 4, 11, 22 } };
 109
 110 static int              ipw_dma_alloc(struct ipw_softc *);
 111 static void             ipw_release(struct ipw_softc *);
 112 static int              ipw_media_change(struct ifnet *);
 113 static void             ipw_media_status(struct ifnet *, struct ifmediareq *);
 114 static int              ipw_newstate(struct ieee80211com *,
 115                             enum ieee80211_state, int);
 116 static u_int16_t        ipw_read_prom_word(struct ipw_softc *, u_int8_t);
 117 static void             ipw_command_intr(struct ipw_softc *,
 118                             struct ipw_soft_buf *);
 119 static void             ipw_newstate_intr(struct ipw_softc *,
 120                             struct ipw_soft_buf *);
 121 static void             ipw_data_intr(struct ipw_softc *, struct ipw_status *,
 122                             struct ipw_soft_bd *, struct ipw_soft_buf *);
 123 static void             ipw_notification_intr(struct ipw_softc *,
 124                             struct ipw_soft_buf *);
 125 static void             ipw_rx_intr(struct ipw_softc *);
 126 static void             ipw_release_sbd(struct ipw_softc *,
 127                             struct ipw_soft_bd *);
 128 static void             ipw_tx_intr(struct ipw_softc *);
 129 static void             ipw_intr(void *);
 130 static void             ipw_dma_map_txbuf(void *, bus_dma_segment_t *, int,
 131                             bus_size_t, int);
 132 static void             ipw_dma_map_addr(void *, bus_dma_segment_t *, int, int);
 133 static int              ipw_cmd(struct ipw_softc *, u_int32_t, void *,
 134                             u_int32_t);
 135 static int              ipw_tx_start(struct ifnet *, struct mbuf *,
 136                             struct ieee80211_node *);
 137 static void             ipw_start(struct ifnet *);
 138 static void             ipw_watchdog(struct ifnet *);
 139 static int              ipw_ioctl(struct ifnet *, u_long, caddr_t,
 140                                 struct ucred *cr);
 141 static void             ipw_stop_master(struct ipw_softc *);
 142 static int              ipw_reset(struct ipw_softc *);
 143 static int              ipw_load_ucode(struct ipw_softc *, u_char *, int);
 144 static int              ipw_load_firmware(struct ipw_softc *, u_char *, int);
 145 static int              ipw_cache_firmware(struct ipw_softc *, void *);
 146 static void             ipw_free_firmware(struct ipw_softc *);
 147 static int              ipw_config(struct ipw_softc *);
 148 static void             ipw_init(void *);
 149 static void             ipw_stop(void *);
 150 static int              ipw_sysctl_stats(SYSCTL_HANDLER_ARGS);
 151 static int              ipw_sysctl_radio(SYSCTL_HANDLER_ARGS);
 152 static u_int32_t        ipw_read_table1(struct ipw_softc *, u_int32_t);
 153 static void             ipw_write_table1(struct ipw_softc *, u_int32_t,
 154                             u_int32_t);
 155 static int              ipw_read_table2(struct ipw_softc *, u_int32_t, void *,
 156                             u_int32_t *);
 157 static void             ipw_read_mem_1(struct ipw_softc *, bus_size_t,
 158                             u_int8_t *, bus_size_t);
 159 static void             ipw_write_mem_1(struct ipw_softc *, bus_size_t,
 160                             u_int8_t *, bus_size_t);
 161
 162 static __inline u_int8_t MEM_READ_1(struct ipw_softc *sc, u_int32_t addr)
 163 {
 164         CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr);
 165         return CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA);
 166 }
 167
 168 static __inline u_int32_t MEM_READ_4(struct ipw_softc *sc, u_int32_t addr)
 169 {
 170         CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr);
 171         return CSR_READ_4(sc, IPW_CSR_INDIRECT_DATA);
 172 }
 173
 174 static int ipw_probe(device_t);
 175 static int ipw_attach(device_t);
 176 static int ipw_detach(device_t);
 177 static int ipw_shutdown(device_t);
 178 static int ipw_suspend(device_t);
 179 static int ipw_resume(device_t);
 180
 181 static device_method_t ipw_methods[] = {
 182         /* Device interface */
 183         DEVMETHOD(device_probe,         ipw_probe),
 184         DEVMETHOD(device_attach,        ipw_attach),
 185         DEVMETHOD(device_detach,        ipw_detach),
 186         DEVMETHOD(device_shutdown,      ipw_shutdown),
 187         DEVMETHOD(device_suspend,       ipw_suspend),
 188         DEVMETHOD(device_resume,        ipw_resume),
 189
 190         { 0, 0 }
 191 };
 192
 193 static driver_t ipw_driver = {
 194         "ipw",
 195         ipw_methods,
 196         sizeof (struct ipw_softc)
 197 };
 198
 199 static devclass_t ipw_devclass;
 200
 201 DRIVER_MODULE(ipw, pci, ipw_driver, ipw_devclass, 0, 0);
 202
 203 static int
 204 ipw_probe(device_t dev)
 205 {
 206         const struct ipw_ident *ident;
 207
 208         for (ident = ipw_ident_table; ident->name != NULL; ident++) {
 209                 if (pci_get_vendor(dev) == ident->vendor &&
 210                     pci_get_device(dev) == ident->device) {
 211                         device_set_desc(dev, ident->name);
 212                         return 0;
 213                 }
 214         }
 215         return ENXIO;
 216 }
 217
 218 /* Base Address Register */
 219 #define IPW_PCI_BAR0    0x10
 220
 221 static int
 222 ipw_attach(device_t dev)
 223 {
 224         struct ipw_softc *sc = device_get_softc(dev);
 225         struct ieee80211com *ic = &sc->sc_ic;
 226         struct ifnet *ifp = &ic->ic_if;
 227         struct sysctl_oid *sysctl_tree;
 228         u_int16_t val;
 229         int error, rid, i;
 230
 231         sc->sc_dev = dev;
 232
 233         if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
 234                 device_printf(dev, "chip is in D%d power mode "
 235                     "-- setting to D0\n", pci_get_powerstate(dev));
 236                 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
 237         }
 238
 239         pci_write_config(dev, 0x41, 0, 1);
 240
 241         /* enable bus-mastering */
 242         pci_enable_busmaster(dev);
 243
 244         /* map the register window */
 245         rid = IPW_PCI_BAR0;
 246         sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
 247         if (sc->mem == NULL) {
 248                 device_printf(dev, "could not allocate memory resource\n");
 249                 goto fail;
 250         }
 251
 252         sc->sc_st = rman_get_bustag(sc->mem);
 253         sc->sc_sh = rman_get_bushandle(sc->mem);
 254
 255         rid = 0;
 256         sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
 257             RF_SHAREABLE);
 258         if (sc->irq == NULL) {
 259                 device_printf(dev, "could not allocate interrupt resource\n");
 260                 goto fail;
 261         }
 262
 263         if (ipw_reset(sc) != 0) {
 264                 device_printf(dev, "could not reset adapter\n");
 265                 goto fail;
 266         }
 267
 268         sysctl_ctx_init(&sc->sysctl_ctx);
 269         sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
 270                 SYSCTL_STATIC_CHILDREN(_hw),
 271                 OID_AUTO,
 272                 device_get_nameunit(dev),
 273                 CTLFLAG_RD,
 274                 0, "");
 275
 276         if (ipw_dma_alloc(sc) != 0) {
 277                 device_printf(dev, "could not allocate DMA resources\n");
 278                 goto fail;
 279         }
 280
 281         ic->ic_phytype = IEEE80211_T_DS;
 282         ic->ic_opmode = IEEE80211_M_STA;
 283         ic->ic_state = IEEE80211_S_INIT;
 284
 285         /* set device capabilities */
 286        ic->ic_caps = IEEE80211_C_SHPREAMBLE | IEEE80211_C_TXPMGT |
 287            IEEE80211_C_PMGT | IEEE80211_C_IBSS | IEEE80211_C_MONITOR |
 288            IEEE80211_C_WEP;
 289
 290         /* read MAC address from EEPROM */
 291         val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 0);
 292         ic->ic_myaddr[0] = val >> 8;
 293         ic->ic_myaddr[1] = val & 0xff;
 294         val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 1);
 295         ic->ic_myaddr[2] = val >> 8;
 296         ic->ic_myaddr[3] = val & 0xff;
 297         val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 2);
 298         ic->ic_myaddr[4] = val >> 8;
 299         ic->ic_myaddr[5] = val & 0xff;
 300
 301         /* set supported .11b rates */
 302         ic->ic_sup_rates[IEEE80211_MODE_11B] = ipw_rateset_11b;
 303
 304         /* set supported .11b channels (read from EEPROM) */
 305         if ((val = ipw_read_prom_word(sc, IPW_EEPROM_CHANNEL_LIST)) == 0)
 306                 val = 0x7ff; /* default to channels 1-11 */
 307         val <<= 1;
 308         for (i = 1; i < 16; i++) {
 309                 if (val & (1 << i)) {
 310                         ic->ic_channels[i].ic_freq =
 311                             ieee80211_ieee2mhz(i, IEEE80211_CHAN_B);
 312                         ic->ic_channels[i].ic_flags = IEEE80211_CHAN_B;
 313                 }
 314         }
 315
 316         /* check support for radio transmitter switch in EEPROM */
 317         if (!(ipw_read_prom_word(sc, IPW_EEPROM_RADIO) & 8))
 318                 sc->flags |= IPW_FLAG_HAS_RADIO_SWITCH;
 319
 320         /* default to authmode OPEN */
 321         sc->authmode = IEEE80211_AUTH_OPEN;
 322
 323         /* IBSS channel undefined for now */
 324         ic->ic_ibss_chan = &ic->ic_channels[0];
 325
 326         ifp->if_softc = sc;
 327         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
 328         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 329         ifp->if_init = ipw_init;
 330         ifp->if_ioctl = ipw_ioctl;
 331         ifp->if_start = ipw_start;
 332         ifp->if_watchdog = ipw_watchdog;
 333         ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
 334         ifq_set_ready(&ifp->if_snd);
 335
 336         ieee80211_ifattach(ifp);
 337         /* override state transition machine */
 338         sc->sc_newstate = ic->ic_newstate;
 339         ic->ic_newstate = ipw_newstate;
 340         ieee80211_media_init(ifp, ipw_media_change, ipw_media_status);
 341
 342 #ifdef WI_RAWBPF
 343         bpfattach2(ifp, DLT_IEEE802_11_RADIO,
 344             sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
 345
 346         sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
 347         sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
 348         sc->sc_rxtap.wr_ihdr.it_present = htole32(IPW_RX_RADIOTAP_PRESENT);
 349
 350         sc->sc_txtap_len = sizeof sc->sc_txtapu;
 351         sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
 352         sc->sc_txtap.wt_ihdr.it_present = htole32(IPW_TX_RADIOTAP_PRESENT);
 353 #endif
 354
 355         SYSCTL_ADD_PROC(&sc->sysctl_ctx,
 356             SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, "radio",
 357             CTLTYPE_INT | CTLFLAG_RD, sc, 0, ipw_sysctl_radio, "I",
 358             "Radio transmitter switch");
 359
 360         SYSCTL_ADD_PROC(&sc->sysctl_ctx,
 361             SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, "stats",
 362             CTLTYPE_OPAQUE | CTLFLAG_RD, sc, 0, ipw_sysctl_stats, "S",
 363             "Statistics");
 364
 365         /*
 366          * Hook our interrupt after all initialization is complete
 367          */
 368         error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
 369             ipw_intr, sc, &sc->sc_ih);
 370         if (error != 0) {
 371                 device_printf(dev, "could not set up interrupt\n");
 372                 goto fail;
 373         }
 374
 375         return 0;
 376
 377 fail:   ipw_detach(dev);
 378         return ENXIO;
 379 }
 380
 381 static int
 382 ipw_detach(device_t dev)
 383 {
 384         struct ipw_softc *sc = device_get_softc(dev);
 385         struct ifnet *ifp = &sc->sc_ic.ic_if;
 386
 387         sc->sc_intrmask = splimp();
 388
 389         ipw_stop(sc);
 390         ipw_free_firmware(sc);
 391
 392         splx(sc->sc_intrmask);
 393
 394 #ifdef WI_RAWBPF
 395         bpfdetach(ifp);
 396 #endif
 397         ieee80211_ifdetach(ifp);
 398
 399         ipw_release(sc);
 400
 401         if (sc->irq != NULL) {
 402                 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
 403                 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
 404         }
 405
 406         if (sc->mem != NULL)
 407                 bus_release_resource(dev, SYS_RES_MEMORY, IPW_PCI_BAR0,
 408                     sc->mem);
 409
 410         sysctl_ctx_free(&sc->sysctl_ctx);
 411
 412         return 0;
 413 }
 414
 415 static int
 416 ipw_dma_alloc(struct ipw_softc *sc)
 417 {
 418         struct ipw_soft_bd *sbd;
 419         struct ipw_soft_hdr *shdr;
 420         struct ipw_soft_buf *sbuf;
 421         bus_addr_t physaddr;
 422         int error, i;
 423
 424         /*
 425          * Allocate and map tx ring
 426          */
 427         error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
 428             BUS_SPACE_MAXADDR, NULL, NULL, IPW_TBD_SZ, 1, IPW_TBD_SZ, 0,
 429             &sc->tbd_dmat);
 430         if (error != 0) {
 431                 device_printf(sc->sc_dev, "could not create tx ring DMA tag\n");
 432                 goto fail;
 433         }
 434
 435         error = bus_dmamem_alloc(sc->tbd_dmat, (void **)&sc->tbd_list,
 436             BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->tbd_map);
 437         if (error != 0) {
 438                 device_printf(sc->sc_dev,
 439                     "could not allocate tx ring DMA memory\n");
 440                 goto fail;
 441         }
 442
 443         error = bus_dmamap_load(sc->tbd_dmat, sc->tbd_map, sc->tbd_list,
 444             IPW_TBD_SZ, ipw_dma_map_addr, &sc->tbd_phys, 0);
 445         if (error != 0) {
 446                 device_printf(sc->sc_dev, "could not map tx ring DMA memory\n");
 447                 goto fail;
 448         }
 449
 450         /*
 451          * Allocate and map rx ring
 452          */
 453         error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
 454             BUS_SPACE_MAXADDR, NULL, NULL, IPW_RBD_SZ, 1, IPW_RBD_SZ, 0,
 455             &sc->rbd_dmat);
 456         if (error != 0) {
 457                 device_printf(sc->sc_dev, "could not create rx ring DMA tag\n");
 458                 goto fail;
 459         }
 460
 461         error = bus_dmamem_alloc(sc->rbd_dmat, (void **)&sc->rbd_list,
 462             BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->rbd_map);
 463         if (error != 0) {
 464                 device_printf(sc->sc_dev,
 465                     "could not allocate rx ring DMA memory\n");
 466                 goto fail;
 467         }
 468
 469         error = bus_dmamap_load(sc->rbd_dmat, sc->rbd_map, sc->rbd_list,
 470             IPW_RBD_SZ, ipw_dma_map_addr, &sc->rbd_phys, 0);
 471         if (error != 0) {
 472                 device_printf(sc->sc_dev, "could not map rx ring DMA memory\n");
 473                 goto fail;
 474         }
 475
 476         /*
 477          * Allocate and map status ring
 478          */
 479         error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
 480             BUS_SPACE_MAXADDR, NULL, NULL, IPW_STATUS_SZ, 1, IPW_STATUS_SZ, 0,
 481             &sc->status_dmat);
 482         if (error != 0) {
 483                 device_printf(sc->sc_dev,
 484                     "could not create status ring DMA tag\n");
 485                 goto fail;
 486         }
 487
 488         error = bus_dmamem_alloc(sc->status_dmat, (void **)&sc->status_list,
 489             BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->status_map);
 490         if (error != 0) {
 491                 device_printf(sc->sc_dev,
 492                     "could not allocate status ring DMA memory\n");
 493                 goto fail;
 494         }
 495
 496         error = bus_dmamap_load(sc->status_dmat, sc->status_map,
 497             sc->status_list, IPW_STATUS_SZ, ipw_dma_map_addr, &sc->status_phys,
 498             0);
 499         if (error != 0) {
 500                 device_printf(sc->sc_dev,
 501                     "could not map status ring DMA memory\n");
 502                 goto fail;
 503         }
 504
 505         /*
 506          * Allocate command DMA map
 507          */
 508         error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
 509             BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_cmd), 1,
 510             sizeof (struct ipw_cmd), 0, &sc->cmd_dmat);
 511         if (error != 0) {
 512                 device_printf(sc->sc_dev, "could not create command DMA tag\n");
 513                 goto fail;
 514         }
 515
 516         error = bus_dmamap_create(sc->cmd_dmat, 0, &sc->cmd_map);
 517         if (error != 0) {
 518                 device_printf(sc->sc_dev,
 519                     "could not create command DMA map\n");
 520                 goto fail;
 521         }
 522
 523         /*
 524          * Allocate headers DMA maps
 525          */
 526         error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
 527             BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_hdr), 1,
 528             sizeof (struct ipw_hdr), 0, &sc->hdr_dmat);
 529         if (error != 0) {
 530                 device_printf(sc->sc_dev, "could not create header DMA tag\n");
 531                 goto fail;
 532         }
 533
 534         SLIST_INIT(&sc->free_shdr);
 535         for (i = 0; i < IPW_NDATA; i++) {
 536                 shdr = &sc->shdr_list[i];
 537                 error = bus_dmamap_create(sc->hdr_dmat, 0, &shdr->map);
 538                 if (error != 0) {
 539                         device_printf(sc->sc_dev,
 540                             "could not create header DMA map\n");
 541                         goto fail;
 542                 }
 543                 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next);
 544         }
 545
 546         /*
 547          * Allocate tx buffers DMA maps
 548          */
 549         error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
 550             BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, IPW_MAX_NSEG, MCLBYTES, 0,
 551             &sc->txbuf_dmat);
 552         if (error != 0) {
 553                 device_printf(sc->sc_dev, "could not create tx DMA tag\n");
 554                 goto fail;
 555         }
 556
 557         SLIST_INIT(&sc->free_sbuf);
 558         for (i = 0; i < IPW_NDATA; i++) {
 559                 sbuf = &sc->tx_sbuf_list[i];
 560                 error = bus_dmamap_create(sc->txbuf_dmat, 0, &sbuf->map);
 561                 if (error != 0) {
 562                         device_printf(sc->sc_dev,
 563                             "could not create tx DMA map\n");
 564                         goto fail;
 565                 }
 566                 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next);
 567         }
 568
 569         /*
 570          * Initialize tx ring
 571          */
 572         for (i = 0; i < IPW_NTBD; i++) {
 573                 sbd = &sc->stbd_list[i];
 574                 sbd->bd = &sc->tbd_list[i];
 575                 sbd->type = IPW_SBD_TYPE_NOASSOC;
 576         }
 577
 578         /*
 579          * Pre-allocate rx buffers and DMA maps
 580          */
 581         error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
 582             BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, IPW_NRBD, MCLBYTES, 0,
 583             &sc->rxbuf_dmat);
 584         if (error != 0) {
 585                 device_printf(sc->sc_dev, "could not create rx DMA tag\n");
 586                 goto fail;
 587         }
 588
 589         for (i = 0; i < IPW_NRBD; i++) {
 590                 sbd = &sc->srbd_list[i];
 591                 sbuf = &sc->rx_sbuf_list[i];
 592                 sbd->bd = &sc->rbd_list[i];
 593
 594                 sbuf->m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
 595                 if (sbuf->m == NULL) {
 596                         device_printf(sc->sc_dev,
 597                             "could not allocate rx mbuf\n");
 598                         error = ENOMEM;
 599                         goto fail;
 600                 }
 601
 602                 error = bus_dmamap_create(sc->rxbuf_dmat, 0, &sbuf->map);
 603                 if (error != 0) {
 604                         device_printf(sc->sc_dev,
 605                             "could not create rx DMA map\n");
 606                         goto fail;
 607                 }
 608
 609                 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map,
 610                     mtod(sbuf->m, void *), MCLBYTES, ipw_dma_map_addr,
 611                     &physaddr, 0);
 612                 if (error != 0) {
 613                         device_printf(sc->sc_dev,
 614                             "could not map rx DMA memory\n");
 615                         goto fail;
 616                 }
 617
 618                 sbd->type = IPW_SBD_TYPE_DATA;
 619                 sbd->priv = sbuf;
 620                 sbd->bd->physaddr = htole32(physaddr);
 621                 sbd->bd->len = htole32(MCLBYTES);
 622         }
 623
 624         bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE);
 625
 626         return 0;
 627
 628 fail:   ipw_release(sc);
 629         return error;
 630 }
 631
 632 static void
 633 ipw_release(struct ipw_softc *sc)
 634 {
 635         struct ipw_soft_buf *sbuf;
 636         int i;
 637
 638         if (sc->tbd_dmat != NULL) {
 639                 if (sc->stbd_list != NULL) {
 640                         bus_dmamap_unload(sc->tbd_dmat, sc->tbd_map);
 641                         bus_dmamem_free(sc->tbd_dmat, sc->tbd_list,
 642                             sc->tbd_map);
 643                 }
 644                 bus_dma_tag_destroy(sc->tbd_dmat);
 645         }
 646
 647         if (sc->rbd_dmat != NULL) {
 648                 if (sc->rbd_list != NULL) {
 649                         bus_dmamap_unload(sc->rbd_dmat, sc->rbd_map);
 650                         bus_dmamem_free(sc->rbd_dmat, sc->rbd_list,
 651                             sc->rbd_map);
 652                 }
 653                 bus_dma_tag_destroy(sc->rbd_dmat);
 654         }
 655
 656         if (sc->status_dmat != NULL) {
 657                 if (sc->status_list != NULL) {
 658                         bus_dmamap_unload(sc->status_dmat, sc->status_map);
 659                         bus_dmamem_free(sc->status_dmat, sc->status_list,
 660                             sc->status_map);
 661                 }
 662                 bus_dma_tag_destroy(sc->status_dmat);
 663         }
 664
 665         for (i = 0; i < IPW_NTBD; i++)
 666                 ipw_release_sbd(sc, &sc->stbd_list[i]);
 667
 668         if (sc->cmd_dmat != NULL) {
 669                 bus_dmamap_destroy(sc->cmd_dmat, sc->cmd_map);
 670                 bus_dma_tag_destroy(sc->cmd_dmat);
 671         }
 672
 673         if (sc->hdr_dmat != NULL) {
 674                 for (i = 0; i < IPW_NDATA; i++)
 675                         bus_dmamap_destroy(sc->hdr_dmat, sc->shdr_list[i].map);
 676                 bus_dma_tag_destroy(sc->hdr_dmat);
 677         }
 678
 679         if (sc->txbuf_dmat != NULL) {
 680                 for (i = 0; i < IPW_NDATA; i++) {
 681                         bus_dmamap_destroy(sc->txbuf_dmat,
 682                             sc->tx_sbuf_list[i].map);
 683                 }
 684                 bus_dma_tag_destroy(sc->txbuf_dmat);
 685         }
 686
 687         if (sc->rxbuf_dmat != NULL) {
 688                 for (i = 0; i < IPW_NRBD; i++) {
 689                         sbuf = &sc->rx_sbuf_list[i];
 690                         if (sbuf->m != NULL) {
 691                                 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map,
 692                                     BUS_DMASYNC_POSTREAD);
 693                                 bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map);
 694                                 m_freem(sbuf->m);
 695                         }
 696                         bus_dmamap_destroy(sc->rxbuf_dmat, sbuf->map);
 697                 }
 698                 bus_dma_tag_destroy(sc->rxbuf_dmat);
 699         }
 700 }
 701
 702 static int
 703 ipw_shutdown(device_t dev)
 704 {
 705         struct ipw_softc *sc = device_get_softc(dev);
 706
 707         sc->sc_intrmask = splimp();
 708
 709         ipw_stop(sc);
 710
 711         sc->sc_intrmask = splimp();
 712
 713         return 0;
 714 }
 715
 716 static int
 717 ipw_suspend(device_t dev)
 718 {
 719         struct ipw_softc *sc = device_get_softc(dev);
 720
 721         sc->sc_intrmask = splimp();
 722
 723         ipw_stop(sc);
 724
 725         splx(sc->sc_intrmask);
 726
 727         return 0;
 728 }
 729
 730 static int
 731 ipw_resume(device_t dev)
 732 {
 733         struct ipw_softc *sc = device_get_softc(dev);
 734         struct ifnet *ifp = &sc->sc_ic.ic_if;
 735
 736         sc->sc_intrmask = splimp();
 737
 738         pci_write_config(dev, 0x41, 0, 1);
 739
 740         if (ifp->if_flags & IFF_UP) {
 741                 ifp->if_init(ifp->if_softc);
 742                 if (ifp->if_flags & IFF_RUNNING)
 743                         ifp->if_start(ifp);
 744         }
 745
 746         splx(sc->sc_intrmask);
 747
 748         return 0;
 749 }
 750
 751 static int
 752 ipw_media_change(struct ifnet *ifp)
 753 {
 754         struct ipw_softc *sc = ifp->if_softc;
 755         int error;
 756
 757         sc->sc_intrmask = splimp();
 758
 759         error = ieee80211_media_change(ifp);
 760         if (error != ENETRESET) {
 761                 splx(sc->sc_intrmask);
 762                 return error;
 763         }
 764
 765         if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
 766                 ipw_init(sc);
 767
 768         splx(sc->sc_intrmask);
 769
 770         return 0;
 771 }
 772
 773 static void
 774 ipw_media_status(struct ifnet *ifp, struct ifmediareq *imr)
 775 {
 776         struct ipw_softc *sc = ifp->if_softc;
 777         struct ieee80211com *ic = &sc->sc_ic;
 778 #define N(a)    (sizeof (a) / sizeof (a[0]))
 779         static const struct {
 780                 u_int32_t       val;
 781                 int             rate;
 782         } rates[] = {
 783                 { IPW_RATE_DS1,   2 },
 784                 { IPW_RATE_DS2,   4 },
 785                 { IPW_RATE_DS5,  11 },
 786                 { IPW_RATE_DS11, 22 },
 787         };
 788         u_int32_t val;
 789         int rate, i;
 790
 791         imr->ifm_status = IFM_AVALID;
 792         imr->ifm_active = IFM_IEEE80211;
 793         if (ic->ic_state == IEEE80211_S_RUN)
 794                 imr->ifm_status |= IFM_ACTIVE;
 795
 796         /* read current transmission rate from adapter */
 797         val = ipw_read_table1(sc, IPW_INFO_CURRENT_TX_RATE) & 0xf;
 798
 799         /* convert rate to 802.11 rate */
 800         for (i = 0; i < N(rates) && rates[i].val != val; i++);
 801         rate = (i < N(rates)) ? rates[i].rate : 0;
 802
 803         imr->ifm_active |= IFM_IEEE80211_11B;
 804         imr->ifm_active |= ieee80211_rate2media(ic, rate, IEEE80211_MODE_11B);
 805         switch (ic->ic_opmode) {
 806         case IEEE80211_M_STA:
 807                 break;
 808
 809         case IEEE80211_M_IBSS:
 810                 imr->ifm_active |= IFM_IEEE80211_IBSS;
 811                 break;
 812
 813         case IEEE80211_M_MONITOR:
 814                 imr->ifm_active |= IFM_IEEE80211_MONITOR;
 815                 break;
 816
 817         case IEEE80211_M_AHDEMO:
 818         case IEEE80211_M_HOSTAP:
 819                 /* should not get there */
 820                 break;
 821         }
 822 #undef N
 823 }
 824
 825 static int
 826 ipw_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
 827 {
 828         struct ipw_softc *sc = ic->ic_softc;
 829         struct ieee80211_node *ni = ic->ic_bss;
 830         u_int32_t len;
 831         u_int8_t val;
 832
 833         switch (nstate) {
 834         case IEEE80211_S_RUN:
 835                 len = IEEE80211_NWID_LEN;
 836                 ipw_read_table2(sc, IPW_INFO_CURRENT_SSID, ni->ni_essid, &len);
 837                 ni->ni_esslen = len;
 838
 839                 val = ipw_read_table1(sc, IPW_INFO_CURRENT_CHANNEL);
 840                 ni->ni_chan = &ic->ic_channels[val];
 841
 842                 DELAY(100); /* firmware needs a short delay here */
 843
 844                 len = IEEE80211_ADDR_LEN;
 845                 ipw_read_table2(sc, IPW_INFO_CURRENT_BSSID, ni->ni_bssid, &len);
 846                 IEEE80211_ADDR_COPY(ni->ni_macaddr, ni->ni_bssid);
 847                 break;
 848
 849         case IEEE80211_S_INIT:
 850         case IEEE80211_S_SCAN:
 851         case IEEE80211_S_AUTH:
 852         case IEEE80211_S_ASSOC:
 853                 break;
 854         }
 855
 856         ic->ic_state = nstate;
 857         return 0;
 858 }
 859
 860 /*
 861  * Read 16 bits at address 'addr' from the Microwire EEPROM.
 862  * DON'T PLAY WITH THIS CODE UNLESS YOU KNOW *EXACTLY* WHAT YOU'RE DOING!
 863  */
 864 static u_int16_t
 865 ipw_read_prom_word(struct ipw_softc *sc, u_int8_t addr)
 866 {
 867         u_int32_t tmp;
 868         u_int16_t val;
 869         int n;
 870
 871         /* Clock C once before the first command */
 872         IPW_EEPROM_CTL(sc, 0);
 873         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 874         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
 875         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 876
 877         /* Write start bit (1) */
 878         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D);
 879         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C);
 880
 881         /* Write READ opcode (10) */
 882         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D);
 883         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C);
 884         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 885         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
 886
 887         /* Write address A7-A0 */
 888         for (n = 7; n >= 0; n--) {
 889                 IPW_EEPROM_CTL(sc, IPW_EEPROM_S |
 890                     (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D));
 891                 IPW_EEPROM_CTL(sc, IPW_EEPROM_S |
 892                     (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D) | IPW_EEPROM_C);
 893         }
 894
 895         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 896
 897         /* Read data Q15-Q0 */
 898         val = 0;
 899         for (n = 15; n >= 0; n--) {
 900                 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
 901                 IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 902                 tmp = MEM_READ_4(sc, IPW_MEM_EEPROM_CTL);
 903                 val |= ((tmp & IPW_EEPROM_Q) >> IPW_EEPROM_SHIFT_Q) << n;
 904         }
 905
 906         IPW_EEPROM_CTL(sc, 0);
 907
 908         /* Clear Chip Select and clock C */
 909         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 910         IPW_EEPROM_CTL(sc, 0);
 911         IPW_EEPROM_CTL(sc, IPW_EEPROM_C);
 912
 913         return le16toh(val);
 914 }
 915
 916 static void
 917 ipw_scan_result(struct ipw_softc *sc)
 918 {
 919         struct ieee80211com *ic = &sc->sc_ic;
 920         struct ieee80211_node *ni;
 921         u_int32_t i, cnt, off;
 922         struct ipw_node ap;
 923
 924         /* flush previously seen access points */
 925         ieee80211_free_allnodes(ic);
 926
 927         cnt = ipw_read_table1(sc, IPW_INFO_APS_CNT);
 928         off = ipw_read_table1(sc, IPW_INFO_APS_BASE);
 929
 930         DPRINTF(("Found %u APs\n", cnt));
 931
 932         for (i = 0; i < cnt; i++) {
 933                 ipw_read_mem_1(sc, off, (u_int8_t *)&ap, sizeof ap);
 934                 off += sizeof ap;
 935
 936 #ifdef IPW_DEBUG
 937                 if (ipw_debug >= 2) {
 938                         u_char *p = (u_char *)&ap;
 939                         int j;
 940
 941                         printf("AP%u\n", i);
 942                         for (j = 0; j < sizeof ap; j++)
 943                                 printf("%02x", *p++);
 944                         printf("\n");
 945                 }
 946 #endif
 947
 948                 ni = ieee80211_lookup_node(ic, ap.bssid,
 949                     &ic->ic_channels[ap.chan]);
 950                 if (ni != NULL)
 951                         continue;
 952
 953                 ni = ieee80211_alloc_node(ic, ap.bssid);
 954                 if (ni == NULL)
 955                         return;
 956
 957                 IEEE80211_ADDR_COPY(ni->ni_bssid, ap.bssid);
 958                 ni->ni_rssi = ap.rssi;
 959                 ni->ni_intval = le16toh(ap.intval);
 960                 ni->ni_capinfo = le16toh(ap.capinfo);
 961                 ni->ni_chan = &ic->ic_channels[ap.chan];
 962                 ni->ni_esslen = ap.esslen;
 963                 bcopy(ap.essid, ni->ni_essid, IEEE80211_NWID_LEN);
 964         }
 965 }
 966
 967 static void
 968 ipw_command_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
 969 {
 970         struct ipw_cmd *cmd;
 971
 972         cmd = mtod(sbuf->m, struct ipw_cmd *);
 973
 974         DPRINTFN(2, ("RX!CMD!%u!%u!%u!%u!%u\n",
 975             le32toh(cmd->type), le32toh(cmd->subtype), le32toh(cmd->seq),
 976             le32toh(cmd->len), le32toh(cmd->status)));
 977
 978         wakeup(sc);
 979 }
 980
 981 static void
 982 ipw_newstate_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
 983 {
 984         struct ieee80211com *ic = &sc->sc_ic;
 985         u_int32_t state;
 986
 987         state = le32toh(*mtod(sbuf->m, u_int32_t *));
 988
 989         DPRINTFN(2, ("RX!NEWSTATE!%u\n", state));
 990
 991         switch (state) {
 992         case IPW_STATE_ASSOCIATED:
 993                 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
 994                 break;
 995
 996         case IPW_STATE_SCANNING:
 997                 /* don't leave run state on background scan */
 998                 if (ic->ic_state != IEEE80211_S_RUN)
 999                         ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
1000                 break;
1001
1002         case IPW_STATE_SCAN_COMPLETE:
1003                 ipw_scan_result(sc);
1004                 break;
1005
1006         case IPW_STATE_ASSOCIATION_LOST:
1007                 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
1008                 break;
1009
1010         case IPW_STATE_RADIO_DISABLED:
1011                 sc->sc_ic.ic_if.if_flags &= ~IFF_UP;
1012                 ipw_stop(sc);
1013                 break;
1014         }
1015 }
1016
1017 static void
1018 ipw_data_intr(struct ipw_softc *sc, struct ipw_status *status,
1019     struct ipw_soft_bd *sbd, struct ipw_soft_buf *sbuf)
1020 {
1021         struct ieee80211com *ic = &sc->sc_ic;
1022         struct ifnet *ifp = &ic->ic_if;
1023         struct mbuf *m;
1024         struct ieee80211_frame *wh;
1025         struct ieee80211_node *ni;
1026         bus_addr_t physaddr;
1027         int error;
1028
1029         DPRINTFN(5, ("RX!DATA!%u!%u\n", le32toh(status->len), status->rssi));
1030
1031         if (le32toh(status->len) < sizeof (struct ieee80211_frame_min) ||
1032             le32toh(status->len) > MCLBYTES) {
1033                 device_printf(sc->sc_dev, "bad frame length\n");
1034                 return;
1035         }
1036
1037         bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map);
1038
1039         /* Finalize mbuf */
1040         m = sbuf->m;
1041         m->m_pkthdr.rcvif = ifp;
1042         m->m_pkthdr.len = m->m_len = le32toh(status->len);
1043
1044 #ifdef WI_RAWBPF
1045         if (sc->sc_drvbpf != NULL) {
1046                 struct ipw_rx_radiotap_header *tap = &sc->sc_rxtap;
1047
1048                 tap->wr_flags = 0;
1049                 tap->wr_antsignal = status->rssi;
1050                 tap->wr_chan_freq = htole16(ic->ic_bss->ni_chan->ic_freq);
1051                 tap->wr_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags);
1052
1053                 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m);
1054         }
1055 #endif
1056
1057         wh = mtod(m, struct ieee80211_frame *);
1058
1059         if (ic->ic_opmode != IEEE80211_M_STA) {
1060                 ni = ieee80211_find_node(ic, wh->i_addr2);
1061                 if (ni == NULL)
1062                         ni = ieee80211_ref_node(ic->ic_bss);
1063         } else
1064                 ni = ieee80211_ref_node(ic->ic_bss);
1065
1066         /* Send the frame to the upper layer */
1067         ieee80211_input(ifp, m, ni, status->rssi, 0);
1068
1069         if (ni == ic->ic_bss)
1070                 ieee80211_unref_node(&ni);
1071         else
1072                 ieee80211_free_node(ic, ni);
1073
1074         m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
1075         if (m == NULL) {
1076                 device_printf(sc->sc_dev, "could not allocate rx mbuf\n");
1077                 sbuf->m = NULL;
1078                 return;
1079         }
1080
1081         error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map, mtod(m, void *),
1082             MCLBYTES, ipw_dma_map_addr, &physaddr, 0);
1083         if (error != 0) {
1084                 device_printf(sc->sc_dev, "could not map rx DMA memory\n");
1085                 m_freem(m);
1086                 sbuf->m = NULL;
1087                 return;
1088         }
1089
1090         sbuf->m = m;
1091         sbd->bd->physaddr = htole32(physaddr);
1092 }
1093
1094 static void
1095 ipw_notification_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
1096 {
1097         DPRINTFN(2, ("RX!NOTIFICATION\n"));
1098 }
1099
1100 static void
1101 ipw_rx_intr(struct ipw_softc *sc)
1102 {
1103         struct ipw_status *status;
1104         struct ipw_soft_bd *sbd;
1105         struct ipw_soft_buf *sbuf;
1106         u_int32_t r, i;
1107
1108         if (!(sc->flags & IPW_FLAG_FW_INITED))
1109                 return;
1110
1111         r = CSR_READ_4(sc, IPW_CSR_RX_READ_INDEX);
1112
1113         bus_dmamap_sync(sc->status_dmat, sc->status_map, BUS_DMASYNC_POSTREAD);
1114
1115         for (i = (sc->rxcur + 1) % IPW_NRBD; i != r; i = (i + 1) % IPW_NRBD) {
1116
1117                 status = &sc->status_list[i];
1118                 sbd = &sc->srbd_list[i];
1119                 sbuf = sbd->priv;
1120
1121                 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map,
1122                     BUS_DMASYNC_POSTREAD);
1123
1124                 switch (le16toh(status->code) & 0xf) {
1125                 case IPW_STATUS_CODE_COMMAND:
1126                         ipw_command_intr(sc, sbuf);
1127                         break;
1128
1129                 case IPW_STATUS_CODE_NEWSTATE:
1130                         ipw_newstate_intr(sc, sbuf);
1131                         break;
1132
1133                 case IPW_STATUS_CODE_DATA_802_3:
1134                 case IPW_STATUS_CODE_DATA_802_11:
1135                         ipw_data_intr(sc, status, sbd, sbuf);
1136                         break;
1137
1138                 case IPW_STATUS_CODE_NOTIFICATION:
1139                         ipw_notification_intr(sc, sbuf);
1140                         break;
1141
1142                 default:
1143                         device_printf(sc->sc_dev, "unknown status code %u\n",
1144                             le16toh(status->code));
1145                 }
1146
1147                 /* firmware was killed, stop processing received frames */
1148                 if (!(sc->flags & IPW_FLAG_FW_INITED))
1149                         return;
1150
1151                 sbd->bd->flags = 0;
1152         }
1153         /* Some buffer descriptors may have changed */
1154         bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE);
1155
1156         /* Tell the firmware what we have processed */
1157         sc->rxcur = (r == 0) ? IPW_NRBD - 1 : r - 1;
1158         CSR_WRITE_4(sc, IPW_CSR_RX_WRITE_INDEX, sc->rxcur);
1159 }
1160
1161 static void
1162 ipw_release_sbd(struct ipw_softc *sc, struct ipw_soft_bd *sbd)
1163 {
1164         struct ieee80211com *ic = &sc->sc_ic;
1165         struct ipw_soft_hdr *shdr;
1166         struct ipw_soft_buf *sbuf;
1167
1168         switch (sbd->type) {
1169         case IPW_SBD_TYPE_COMMAND:
1170                 bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map,
1171                     BUS_DMASYNC_POSTWRITE);
1172                 bus_dmamap_unload(sc->cmd_dmat, sc->cmd_map);
1173                 break;
1174
1175         case IPW_SBD_TYPE_HEADER:
1176                 shdr = sbd->priv;
1177                 bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_POSTWRITE);
1178                 bus_dmamap_unload(sc->hdr_dmat, shdr->map);
1179                 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next);
1180                 break;
1181
1182         case IPW_SBD_TYPE_DATA:
1183                 sbuf = sbd->priv;
1184                 bus_dmamap_sync(sc->txbuf_dmat, sbuf->map,
1185                     BUS_DMASYNC_POSTWRITE);
1186                 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map);
1187                 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next);
1188
1189                 m_freem(sbuf->m);
1190
1191                 if (sbuf->ni != NULL && sbuf->ni != ic->ic_bss)
1192                         ieee80211_free_node(ic, sbuf->ni);
1193
1194                 /* kill watchdog timer */
1195                 sc->sc_tx_timer = 0;
1196                 break;
1197         }
1198         sbd->type = IPW_SBD_TYPE_NOASSOC;
1199 }
1200
1201 static void
1202 ipw_tx_intr(struct ipw_softc *sc)
1203 {
1204         struct ifnet *ifp = &sc->sc_ic.ic_if;
1205         u_int32_t r, i;
1206
1207         if (!(sc->flags & IPW_FLAG_FW_INITED))
1208                 return;
1209
1210         r = CSR_READ_4(sc, IPW_CSR_TX_READ_INDEX);
1211
1212         for (i = (sc->txold + 1) % IPW_NTBD; i != r; i = (i + 1) % IPW_NTBD) {
1213                 ipw_release_sbd(sc, &sc->stbd_list[i]);
1214                 sc->txfree++;
1215         }
1216
1217         /* Remember what the firmware has processed */
1218         sc->txold = (r == 0) ? IPW_NTBD - 1 : r - 1;
1219
1220         /* Call start() since some buffer descriptors have been released */
1221         ifp->if_flags &= ~IFF_OACTIVE;
1222         (*ifp->if_start)(ifp);
1223 }
1224
1225 static void
1226 ipw_intr(void *arg)
1227 {
1228         struct ipw_softc *sc = arg;
1229         u_int32_t r;
1230
1231         sc->sc_intrmask = splimp();
1232
1233         if ((r = CSR_READ_4(sc, IPW_CSR_INTR)) == 0 || r == 0xffffffff) {
1234                 splx(sc->sc_intrmask);
1235                 return;
1236         }
1237
1238         /* Disable interrupts */
1239         CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
1240
1241         DPRINTFN(8, ("INTR!0x%08x\n", r));
1242
1243         if (r & (IPW_INTR_FATAL_ERROR | IPW_INTR_PARITY_ERROR)) {
1244                 device_printf(sc->sc_dev, "fatal error\n");
1245                 sc->sc_ic.ic_if.if_flags &= ~IFF_UP;
1246                 ipw_stop(sc);
1247         }
1248
1249         if (r & IPW_INTR_FW_INIT_DONE) {
1250                 if (!(r & (IPW_INTR_FATAL_ERROR | IPW_INTR_PARITY_ERROR)))
1251                         wakeup(sc);
1252         }
1253
1254         if (r & IPW_INTR_RX_TRANSFER)
1255                 ipw_rx_intr(sc);
1256
1257         if (r & IPW_INTR_TX_TRANSFER)
1258                 ipw_tx_intr(sc);
1259
1260         /* Acknowledge interrupts */
1261         CSR_WRITE_4(sc, IPW_CSR_INTR, r);
1262
1263         /* Re-enable interrupts */
1264         CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
1265
1266         splx(sc->sc_intrmask);
1267 }
1268
1269 static void
1270 ipw_dma_map_txbuf(void *arg, bus_dma_segment_t *segs, int nseg,
1271     bus_size_t mapsize, int error)
1272 {
1273         struct ipw_dma_mapping *map = arg;
1274
1275         if (error != 0)
1276                 return;
1277
1278         KASSERT(nseg <= IPW_MAX_NSEG, ("too many DMA segments %d", nseg));
1279
1280         bcopy(segs, map->segs, nseg * sizeof (bus_dma_segment_t));
1281         map->nseg = nseg;
1282         map->mapsize = mapsize;
1283 }
1284
1285 static void
1286 ipw_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1287 {
1288         if (error != 0)
1289                 return;
1290
1291         KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
1292
1293         *(bus_addr_t *)arg = segs[0].ds_addr;
1294 }
1295
1296 static int
1297 ipw_cmd(struct ipw_softc *sc, u_int32_t type, void *data, u_int32_t len)
1298 {
1299         struct ipw_soft_bd *sbd;
1300         bus_addr_t physaddr;
1301         int error;
1302
1303         sbd = &sc->stbd_list[sc->txcur];
1304
1305         error = bus_dmamap_load(sc->cmd_dmat, sc->cmd_map, &sc->cmd,
1306             sizeof (struct ipw_cmd), ipw_dma_map_addr, &physaddr, 0);
1307         if (error != 0) {
1308                 device_printf(sc->sc_dev, "could not map command DMA memory\n");
1309                 return error;
1310         }
1311
1312         sc->cmd.type = htole32(type);
1313         sc->cmd.subtype = htole32(0);
1314         sc->cmd.len = htole32(len);
1315         sc->cmd.seq = htole32(0);
1316         if (data != NULL)
1317                 bcopy(data, sc->cmd.data, len);
1318
1319         sbd->type = IPW_SBD_TYPE_COMMAND;
1320         sbd->bd->physaddr = htole32(physaddr);
1321         sbd->bd->len = htole32(sizeof (struct ipw_cmd));
1322         sbd->bd->nfrag = 1;
1323         sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_COMMAND |
1324                          IPW_BD_FLAG_TX_LAST_FRAGMENT;
1325
1326         bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map, BUS_DMASYNC_PREWRITE);
1327         bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE);
1328
1329         sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1330         sc->txfree--;
1331         CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, sc->txcur);
1332
1333         DPRINTFN(2, ("TX!CMD!%u!%u!%u!%u\n", type, 0, 0, len));
1334
1335         /* wait at most one second for command to complete */
1336         return tsleep(sc, 0, "ipwcmd", hz);
1337 }
1338
1339 static int
1340 ipw_tx_start(struct ifnet *ifp, struct mbuf *m0, struct ieee80211_node *ni)
1341 {
1342         struct ipw_softc *sc = ifp->if_softc;
1343         struct ieee80211com *ic = &sc->sc_ic;
1344         struct ieee80211_frame *wh;
1345         struct ipw_dma_mapping map;
1346         struct ipw_soft_bd *sbd;
1347         struct ipw_soft_hdr *shdr;
1348         struct ipw_soft_buf *sbuf;
1349         struct mbuf *mnew;
1350         bus_addr_t physaddr;
1351         int error, i;
1352
1353         if (ic->ic_flags & IEEE80211_F_WEPON) {
1354                 m0 = ieee80211_wep_crypt(ifp, m0, 1);
1355                 if (m0 == NULL)
1356                         return ENOBUFS;
1357         }
1358
1359 #ifdef WI_RAWBPF
1360         if (sc->sc_drvbpf != NULL) {
1361                 struct ipw_tx_radiotap_header *tap = &sc->sc_txtap;
1362
1363                 tap->wt_flags = 0;
1364                 tap->wt_chan_freq = htole16(ic->ic_bss->ni_chan->ic_freq);
1365                 tap->wt_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags);
1366
1367                 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
1368         }
1369 #endif
1370
1371         wh = mtod(m0, struct ieee80211_frame *);
1372
1373         shdr = SLIST_FIRST(&sc->free_shdr);
1374         sbuf = SLIST_FIRST(&sc->free_sbuf);
1375         KASSERT(shdr != NULL && sbuf != NULL, ("empty sw hdr/buf pool"));
1376
1377         shdr->hdr.type = htole32(IPW_HDR_TYPE_SEND);
1378         shdr->hdr.subtype = htole32(0);
1379         shdr->hdr.encrypted = (wh->i_fc[1] & IEEE80211_FC1_WEP) ? 1 : 0;
1380         shdr->hdr.encrypt = 0;
1381         shdr->hdr.keyidx = 0;
1382         shdr->hdr.keysz = 0;
1383         shdr->hdr.fragmentsz = htole16(0);
1384         IEEE80211_ADDR_COPY(shdr->hdr.src_addr, wh->i_addr2);
1385         if (ic->ic_opmode == IEEE80211_M_STA)
1386                 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr3);
1387         else
1388                 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr1);
1389
1390         /* trim IEEE802.11 header */
1391         m_adj(m0, sizeof (struct ieee80211_frame));
1392
1393         error = bus_dmamap_load_mbuf(sc->txbuf_dmat, sbuf->map, m0,
1394             ipw_dma_map_txbuf, &map, 0);
1395         if (error != 0 && error != EFBIG) {
1396                 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1397                     error);
1398                 m_freem(m0);
1399                 return error;
1400         }
1401         if (error != 0) {
1402                 mnew = m_defrag(m0, MB_DONTWAIT);
1403                 if (mnew == NULL) {
1404                         device_printf(sc->sc_dev,
1405                             "could not defragment mbuf\n");
1406                         m_freem(m0);
1407                         return ENOBUFS;
1408                 }
1409                 m0 = mnew;
1410
1411                 error = bus_dmamap_load_mbuf(sc->txbuf_dmat, sbuf->map, m0,
1412                     ipw_dma_map_txbuf, &map, 0);
1413                 if (error != 0) {
1414                         device_printf(sc->sc_dev,
1415                             "could not map mbuf (error %d)\n", error);
1416                         m_freem(m0);
1417                         return error;
1418                 }
1419         }
1420
1421         error = bus_dmamap_load(sc->hdr_dmat, shdr->map, &shdr->hdr,
1422             sizeof (struct ipw_hdr), ipw_dma_map_addr, &physaddr, 0);
1423         if (error != 0) {
1424                 device_printf(sc->sc_dev, "could not map header DMA memory\n");
1425                 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map);
1426                 m_freem(m0);
1427                 return error;
1428         }
1429
1430         SLIST_REMOVE_HEAD(&sc->free_sbuf, next);
1431         SLIST_REMOVE_HEAD(&sc->free_shdr, next);
1432
1433         sbd = &sc->stbd_list[sc->txcur];
1434         sbd->type = IPW_SBD_TYPE_HEADER;
1435         sbd->priv = shdr;
1436         sbd->bd->physaddr = htole32(physaddr);
1437         sbd->bd->len = htole32(sizeof (struct ipw_hdr));
1438         sbd->bd->nfrag = 1 + map.nseg;
1439         sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3 |
1440                          IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT;
1441
1442         DPRINTFN(5, ("TX!HDR!%u!%u!%u!%u!%6D!%6D\n", shdr->hdr.type,
1443             shdr->hdr.subtype, shdr->hdr.encrypted, shdr->hdr.encrypt,
1444             shdr->hdr.src_addr, ":", shdr->hdr.dst_addr, ":"));
1445         sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1446         sc->txfree--;
1447
1448         sbuf->m = m0;
1449         sbuf->ni = ni;
1450
1451         for (i = 0; i < map.nseg; i++) {
1452                 sbd = &sc->stbd_list[sc->txcur];
1453
1454                 sbd->bd->physaddr = htole32(map.segs[i].ds_addr);
1455                 sbd->bd->len = htole32(map.segs[i].ds_len);
1456                 sbd->bd->nfrag = 0; /* used only in first bd */
1457                 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3;
1458                 if (i == map.nseg - 1) {
1459                         sbd->type = IPW_SBD_TYPE_DATA;
1460                         sbd->priv = sbuf;
1461                         sbd->bd->flags |= IPW_BD_FLAG_TX_LAST_FRAGMENT;
1462                 } else {
1463                         sbd->type = IPW_SBD_TYPE_NOASSOC;
1464                         sbd->bd->flags |= IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT;
1465                 }
1466
1467                 DPRINTFN(5, ("TX!FRAG!%d!%d\n", i, map.segs[i].ds_len));
1468                 sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1469                 sc->txfree--;
1470         }
1471
1472         bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_PREWRITE);
1473         bus_dmamap_sync(sc->txbuf_dmat, sbuf->map, BUS_DMASYNC_PREWRITE);
1474         bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE);
1475
1476         /* Inform firmware about this new packet */
1477         CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, sc->txcur);
1478
1479         return 0;
1480 }
1481
1482 static void
1483 ipw_start(struct ifnet *ifp)
1484 {
1485         struct ipw_softc *sc = ifp->if_softc;
1486         struct ieee80211com *ic = &sc->sc_ic;
1487         struct mbuf *m0;
1488         struct ieee80211_node *ni;
1489
1490 #if 0
1491         sc->sc_intrmask = splimp();
1492 #endif
1493         if (ic->ic_state != IEEE80211_S_RUN) {
1494 #if 0
1495            splx(sc->sc_intrmask);
1496 #endif
1497                 return;
1498         }
1499
1500         for (;;) {
1501                 m0 = ifq_poll(&ifp->if_snd);
1502                 if (m0 == NULL)
1503                         break;
1504                 if (sc->txfree < 1 + IPW_MAX_NSEG) {
1505                         ifp->if_flags |= IFF_OACTIVE;
1506                         break;
1507                 }
1508                 m0 = ifq_dequeue(&ifp->if_snd);
1509
1510 #ifdef WI_RAWBPF
1511                 BPF_MTAP(ifp, m0);
1512 #endif
1513
1514                 m0 = ieee80211_encap(ifp, m0, &ni);
1515                 if (m0 == NULL)
1516                         continue;
1517
1518 #ifdef WI_RAWBPF
1519                 if (ic->ic_rawbpf != NULL)
1520                         bpf_mtap(ic->ic_rawbpf, m0);
1521 #endif
1522
1523                 if (ipw_tx_start(ifp, m0, ni) != 0) {
1524                         if (ni != NULL && ni != ic->ic_bss)
1525                                 ieee80211_free_node(ic, ni);
1526                         break;
1527                 }
1528
1529                 /* start watchdog timer */
1530                 sc->sc_tx_timer = 5;
1531                 ifp->if_timer = 1;
1532         }
1533 #if 0
1534         splx(sc->sc_intrmask);
1535 #endif
1536 }
1537
1538 static void
1539 ipw_watchdog(struct ifnet *ifp)
1540 {
1541         struct ipw_softc *sc = ifp->if_softc;
1542
1543         ifp->if_timer = 0;
1544
1545         if (sc->sc_tx_timer > 0) {
1546                 if (--sc->sc_tx_timer == 0) {
1547                         if_printf(ifp, "device timeout\n");
1548                         ifp->if_flags &= ~IFF_UP;
1549                         ipw_stop(sc);
1550                         return;
1551                 }
1552                 ifp->if_timer = 1;
1553         }
1554
1555         ieee80211_watchdog(ifp);
1556 }
1557
1558 static int
1559 ipw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1560 {
1561         struct ipw_softc *sc = ifp->if_softc;
1562         struct ieee80211com *ic = &sc->sc_ic;
1563         struct ifreq *ifr;
1564         struct ieee80211req *ireq;
1565         int error = 0;
1566
1567         sc->sc_intrmask = splimp();
1568
1569         switch (cmd) {
1570         case SIOCSIFFLAGS:
1571                 if (ifp->if_flags & IFF_UP) {
1572                         if (!(ifp->if_flags & IFF_RUNNING))
1573                                 ipw_init(sc);
1574                 } else {
1575                         if (ifp->if_flags & IFF_RUNNING)
1576                                 ipw_stop(sc);
1577                 }
1578                 break;
1579
1580         case SIOCSLOADFW:
1581                 /* only super-user can do that! */
1582                 if ((error = suser(curthread)) != 0)
1583                         break;
1584
1585                 ifr = (struct ifreq *)data;
1586                 error = ipw_cache_firmware(sc, ifr->ifr_data);
1587                 break;
1588
1589         case SIOCSKILLFW:
1590                 /* only super-user can do that! */
1591                 if ((error = suser(curthread)) != 0)
1592                         break;
1593
1594                 ifp->if_flags &= ~IFF_UP;
1595                 ipw_stop(sc);
1596                 ipw_free_firmware(sc);
1597                 break;
1598
1599         case SIOCG80211:
1600                 ireq = (struct ieee80211req *)data;
1601                 switch (ireq->i_type) {
1602                 case IEEE80211_IOC_AUTHMODE:
1603                         ireq->i_val = sc->authmode;
1604                         break;
1605
1606                 case IEEE80211_IOC_TXPOWER:
1607                         ireq->i_val = (CSR_READ_4(sc, IPW_CSR_IO) &
1608                             IPW_IO_RADIO_DISABLED) ? 0 : ic->ic_txpower;
1609                         break;
1610
1611                 default:
1612                         error = ieee80211_ioctl(ifp, cmd, data, cr);
1613                 }
1614                 break;
1615
1616         case SIOCS80211:
1617                 /* only super-user can do that! */
1618                 if ((error = suser(curthread)) != 0)
1619                         break;
1620
1621                 ireq = (struct ieee80211req *)data;
1622                 switch (ireq->i_type) {
1623                 case IEEE80211_IOC_AUTHMODE:
1624                         sc->authmode = ireq->i_val;
1625                         break;
1626
1627                 default:
1628                         error = ieee80211_ioctl(ifp, cmd, data, cr);
1629                 }
1630                 break;
1631
1632         default:
1633                 error = ieee80211_ioctl(ifp, cmd, data, cr);
1634         }
1635
1636         if (error == ENETRESET) {
1637                 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1638                     (IFF_UP | IFF_RUNNING))
1639                         ipw_init(sc);
1640                 error = 0;
1641         }
1642
1643         splx(sc->sc_intrmask);
1644
1645         return error;
1646 }
1647
1648 static void
1649 ipw_stop_master(struct ipw_softc *sc)
1650 {
1651         int ntries;
1652
1653         /* Disable interrupts */
1654         CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
1655
1656         CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_STOP_MASTER);
1657         for (ntries = 0; ntries < 5; ntries++) {
1658                 if (CSR_READ_4(sc, IPW_CSR_RST) & IPW_RST_MASTER_DISABLED)
1659                         break;
1660                 DELAY(10);
1661         }
1662         if (ntries == 5)
1663                 device_printf(sc->sc_dev, "timeout waiting for master\n");
1664
1665         CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) |
1666             IPW_RST_PRINCETON_RESET);
1667
1668         sc->flags &= ~IPW_FLAG_FW_INITED;
1669 }
1670
1671 static int
1672 ipw_reset(struct ipw_softc *sc)
1673 {
1674         int ntries;
1675
1676         ipw_stop_master(sc);
1677
1678         /* Move adapter to D0 state */
1679         CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
1680             IPW_CTL_INIT);
1681
1682         /* Wait for clock stabilization */
1683         for (ntries = 0; ntries < 1000; ntries++) {
1684                 if (CSR_READ_4(sc, IPW_CSR_CTL) & IPW_CTL_CLOCK_READY)
1685                         break;
1686                 DELAY(200);
1687         }
1688         if (ntries == 1000)
1689                 return EIO;
1690
1691         CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) |
1692             IPW_RST_SW_RESET);
1693
1694         DELAY(10);
1695
1696         CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
1697             IPW_CTL_INIT);
1698
1699         return 0;
1700 }
1701
1702 static int
1703 ipw_load_ucode(struct ipw_softc *sc, u_char *uc, int size)
1704 {
1705         int ntries;
1706
1707         MEM_WRITE_4(sc, 0x3000e0, 0x80000000);
1708         CSR_WRITE_4(sc, IPW_CSR_RST, 0);
1709
1710         MEM_WRITE_2(sc, 0x220000, 0x0703);
1711         MEM_WRITE_2(sc, 0x220000, 0x0707);
1712
1713         MEM_WRITE_1(sc, 0x210014, 0x72);
1714         MEM_WRITE_1(sc, 0x210014, 0x72);
1715
1716         MEM_WRITE_1(sc, 0x210000, 0x40);
1717         MEM_WRITE_1(sc, 0x210000, 0x00);
1718         MEM_WRITE_1(sc, 0x210000, 0x40);
1719
1720         MEM_WRITE_MULTI_1(sc, 0x210010, uc, size);
1721
1722         MEM_WRITE_1(sc, 0x210000, 0x00);
1723         MEM_WRITE_1(sc, 0x210000, 0x00);
1724         MEM_WRITE_1(sc, 0x210000, 0x80);
1725
1726         MEM_WRITE_2(sc, 0x220000, 0x0703);
1727         MEM_WRITE_2(sc, 0x220000, 0x0707);
1728
1729         MEM_WRITE_1(sc, 0x210014, 0x72);
1730         MEM_WRITE_1(sc, 0x210014, 0x72);
1731
1732         MEM_WRITE_1(sc, 0x210000, 0x00);
1733         MEM_WRITE_1(sc, 0x210000, 0x80);
1734
1735         for (ntries = 0; ntries < 100; ntries++) {
1736                 if (MEM_READ_1(sc, 0x210000) & 1)
1737                         break;
1738                 DELAY(1000);
1739         }
1740         if (ntries == 100) {
1741                 device_printf(sc->sc_dev,
1742                     "timeout waiting for ucode to initialize\n");
1743                 return EIO;
1744         }
1745
1746         MEM_WRITE_4(sc, 0x3000e0, 0);
1747
1748         return 0;
1749 }
1750
1751 /* set of macros to handle unaligned little endian data in firmware image */
1752 #define GETLE32(p) ((p)[0] | (p)[1] << 8 | (p)[2] << 16 | (p)[3] << 24)
1753 #define GETLE16(p) ((p)[0] | (p)[1] << 8)
1754 static int
1755 ipw_load_firmware(struct ipw_softc *sc, u_char *fw, int size)
1756 {
1757         u_char *p, *end;
1758         u_int32_t dst;
1759         u_int16_t len;
1760         int error;
1761
1762         p = fw;
1763         end = fw + size;
1764         while (p < end) {
1765                 if (p + 6 > end)
1766                         return EINVAL;
1767
1768                 dst = GETLE32(p); p += 4;
1769                 len = GETLE16(p); p += 2;
1770
1771                 if (p + len > end)
1772                         return EINVAL;
1773
1774                 ipw_write_mem_1(sc, dst, p, len);
1775                 p += len;
1776         }
1777
1778         CSR_WRITE_4(sc, IPW_CSR_IO, IPW_IO_GPIO1_ENABLE | IPW_IO_GPIO3_MASK |
1779             IPW_IO_LED_OFF);
1780
1781         /* Allow interrupts so we know when the firmware is inited */
1782         CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
1783
1784         /* Tell the adapter to initialize the firmware */
1785         CSR_WRITE_4(sc, IPW_CSR_RST, 0);
1786         CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
1787             IPW_CTL_ALLOW_STANDBY);
1788
1789         /* Wait at most one second for firmware initialization to complete */
1790         if ((error = tsleep(sc, 0, "ipwinit", hz)) != 0) {
1791                 device_printf(sc->sc_dev, "timeout waiting for firmware "
1792                     "initialization to complete\n");
1793                 return error;
1794         }
1795
1796         CSR_WRITE_4(sc, IPW_CSR_IO, CSR_READ_4(sc, IPW_CSR_IO) |
1797             IPW_IO_GPIO1_MASK | IPW_IO_GPIO3_MASK);
1798
1799         return 0;
1800 }
1801
1802 /*
1803  * Store firmware into kernel memory so we can download it when we need to,
1804  * e.g when the adapter wakes up from suspend mode.
1805  */
1806 static int
1807 ipw_cache_firmware(struct ipw_softc *sc, void *data)
1808 {
1809         struct ipw_firmware *fw = &sc->fw;
1810         struct ipw_firmware_hdr hdr;
1811         u_char *p = data;
1812         int error;
1813
1814         ipw_free_firmware(sc);
1815
1816         /*
1817          * mutex(9): no mutexes should be held across functions which access
1818          * memory in userspace, such as copyin(9) [...]
1819          */
1820         splx(sc->sc_intrmask);
1821
1822         if ((error = copyin(data, &hdr, sizeof hdr)) != 0)
1823                 goto fail1;
1824
1825         fw->main_size  = le32toh(hdr.main_size);
1826         fw->ucode_size = le32toh(hdr.ucode_size);
1827         p += sizeof hdr;
1828
1829         fw->main = malloc(fw->main_size, M_DEVBUF, M_WAITOK);
1830         if (fw->main == NULL) {
1831                 error = ENOMEM;
1832                 goto fail1;
1833         }
1834
1835         fw->ucode = malloc(fw->ucode_size, M_DEVBUF, M_WAITOK);
1836         if (fw->ucode == NULL) {
1837                 error = ENOMEM;
1838                 goto fail2;
1839         }
1840
1841         if ((error = copyin(p, fw->main, fw->main_size)) != 0)
1842                 goto fail3;
1843
1844         p += fw->main_size;
1845         if ((error = copyin(p, fw->ucode, fw->ucode_size)) != 0)
1846                 goto fail3;
1847
1848         DPRINTF(("Firmware cached: main %u, ucode %u\n", fw->main_size,
1849             fw->ucode_size));
1850
1851         sc->sc_intrmask = splimp();
1852
1853         sc->flags |= IPW_FLAG_FW_CACHED;
1854
1855         return 0;
1856
1857 fail3:  free(fw->ucode, M_DEVBUF);
1858 fail2:  free(fw->main, M_DEVBUF);
1859 fail1:  sc->sc_intrmask = splimp();
1860
1861         return error;
1862 }
1863
1864 static void
1865 ipw_free_firmware(struct ipw_softc *sc)
1866 {
1867         if (!(sc->flags & IPW_FLAG_FW_CACHED))
1868                 return;
1869
1870         free(sc->fw.main, M_DEVBUF);
1871         free(sc->fw.ucode, M_DEVBUF);
1872
1873         sc->flags &= ~IPW_FLAG_FW_CACHED;
1874 }
1875
1876 static int
1877 ipw_config(struct ipw_softc *sc)
1878 {
1879         struct ieee80211com *ic = &sc->sc_ic;
1880         struct ifnet *ifp = &ic->ic_if;
1881         struct ipw_security security;
1882         struct ieee80211_wepkey *k;
1883         struct ipw_wep_key wepkey;
1884         struct ipw_scan_options options;
1885         struct ipw_configuration config;
1886         u_int32_t data;
1887         int error, i;
1888
1889         switch (ic->ic_opmode) {
1890         case IEEE80211_M_STA:
1891         case IEEE80211_M_HOSTAP:
1892                 data = htole32(IPW_MODE_BSS);
1893                 break;
1894
1895         case IEEE80211_M_IBSS:
1896         case IEEE80211_M_AHDEMO:
1897                 data = htole32(IPW_MODE_IBSS);
1898                 break;
1899
1900         case IEEE80211_M_MONITOR:
1901                 data = htole32(IPW_MODE_MONITOR);
1902                 break;
1903         }
1904         DPRINTF(("Setting mode to %u\n", le32toh(data)));
1905         error = ipw_cmd(sc, IPW_CMD_SET_MODE, &data, sizeof data);
1906         if (error != 0)
1907                 return error;
1908
1909         if (ic->ic_opmode == IEEE80211_M_IBSS ||
1910             ic->ic_opmode == IEEE80211_M_MONITOR) {
1911                 data = htole32(ieee80211_chan2ieee(ic, ic->ic_ibss_chan));
1912                 DPRINTF(("Setting channel to %u\n", le32toh(data)));
1913                 error = ipw_cmd(sc, IPW_CMD_SET_CHANNEL, &data, sizeof data);
1914                 if (error != 0)
1915                         return error;
1916         }
1917
1918         if (ic->ic_opmode == IEEE80211_M_MONITOR) {
1919                 DPRINTF(("Enabling adapter\n"));
1920                 return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0);
1921         }
1922
1923         IEEE80211_ADDR_COPY(((struct arpcom *)ifp)->ac_enaddr, ic->ic_myaddr);
1924         IEEE80211_ADDR_COPY(IF_LLADDR(ifp), ic->ic_myaddr);
1925         DPRINTF(("Setting MAC address to %6D\n", ic->ic_myaddr, ":"));
1926         error = ipw_cmd(sc, IPW_CMD_SET_MAC_ADDRESS, ic->ic_myaddr,
1927             IEEE80211_ADDR_LEN);
1928         if (error != 0)
1929                 return error;
1930
1931         config.flags = htole32(IPW_CFG_BSS_MASK | IPW_CFG_IBSS_MASK |
1932             IPW_CFG_PREAMBLE_AUTO | IPW_CFG_802_1x_ENABLE);
1933         if (ic->ic_opmode == IEEE80211_M_IBSS)
1934                 config.flags |= htole32(IPW_CFG_IBSS_AUTO_START);
1935         if (ifp->if_flags & IFF_PROMISC)
1936                 config.flags |= htole32(IPW_CFG_PROMISCUOUS);
1937         config.bss_chan = htole32(0x3fff); /* channels 1-14 */
1938         config.ibss_chan = htole32(0x7ff); /* channels 1-11 */
1939         DPRINTF(("Setting configuration to 0x%x\n", le32toh(config.flags)));
1940         error = ipw_cmd(sc, IPW_CMD_SET_CONFIGURATION, &config, sizeof config);
1941         if (error != 0)
1942                 return error;
1943
1944         data = htole32(0x3); /* 1, 2 */
1945         DPRINTF(("Setting basic tx rates to 0x%x\n", le32toh(data)));
1946         error = ipw_cmd(sc, IPW_CMD_SET_BASIC_TX_RATES, &data, sizeof data);
1947         if (error != 0)
1948                 return error;
1949
1950         data = htole32(0xf); /* 1, 2, 5.5, 11 */
1951         DPRINTF(("Setting tx rates to 0x%x\n", le32toh(data)));
1952         error = ipw_cmd(sc, IPW_CMD_SET_TX_RATES, &data, sizeof data);
1953         if (error != 0)
1954                 return error;
1955
1956         data = htole32(IPW_POWER_MODE_CAM);
1957         DPRINTF(("Setting power mode to %u\n", le32toh(data)));
1958         error = ipw_cmd(sc, IPW_CMD_SET_POWER_MODE, &data, sizeof data);
1959         if (error != 0)
1960                 return error;
1961
1962         if (ic->ic_opmode == IEEE80211_M_IBSS) {
1963                 data = htole32(32); /* default value */
1964                 DPRINTF(("Setting tx power index to %u\n", le32toh(data)));
1965                 error = ipw_cmd(sc, IPW_CMD_SET_TX_POWER_INDEX, &data,
1966                     sizeof data);
1967                 if (error != 0)
1968                         return error;
1969         }
1970
1971         data = htole32(ic->ic_rtsthreshold);
1972         DPRINTF(("Setting RTS threshold to %u\n", le32toh(data)));
1973         error = ipw_cmd(sc, IPW_CMD_SET_RTS_THRESHOLD, &data, sizeof data);
1974         if (error != 0)
1975                 return error;
1976
1977         data = htole32(ic->ic_fragthreshold);
1978         DPRINTF(("Setting frag threshold to %u\n", le32toh(data)));
1979         error = ipw_cmd(sc, IPW_CMD_SET_FRAG_THRESHOLD, &data, sizeof data);
1980         if (error != 0)
1981                 return error;
1982
1983 #ifdef IPW_DEBUG
1984         if (ipw_debug > 0) {
1985                 printf("Setting ESSID to ");
1986                 ieee80211_print_essid(ic->ic_des_essid, ic->ic_des_esslen);
1987                 printf("\n");
1988         }
1989 #endif
1990         error = ipw_cmd(sc, IPW_CMD_SET_ESSID, ic->ic_des_essid,
1991             ic->ic_des_esslen);
1992         if (error != 0)
1993                 return error;
1994
1995         /* no mandatory BSSID */
1996         DPRINTF(("Setting mandatory BSSID to null\n"));
1997         error = ipw_cmd(sc, IPW_CMD_SET_MANDATORY_BSSID, NULL, 0);
1998         if (error != 0)
1999                 return error;
2000
2001         if (ic->ic_flags & IEEE80211_F_DESBSSID) {
2002                 DPRINTF(("Setting desired BSSID to %6D\n", ic->ic_des_bssid,
2003                     ":"));
2004                 error = ipw_cmd(sc, IPW_CMD_SET_DESIRED_BSSID,
2005                     ic->ic_des_bssid, IEEE80211_ADDR_LEN);
2006                 if (error != 0)
2007                         return error;
2008         }
2009
2010         bzero(&security, sizeof security);
2011         security.authmode = (sc->authmode == IEEE80211_AUTH_SHARED) ?
2012             IPW_AUTH_SHARED : IPW_AUTH_OPEN;
2013         security.ciphers = htole32(IPW_CIPHER_NONE);
2014         DPRINTF(("Setting authmode to %u\n", security.authmode));
2015         error = ipw_cmd(sc, IPW_CMD_SET_SECURITY_INFORMATION, &security,
2016             sizeof security);
2017         if (error != 0)
2018                 return error;
2019
2020         if (ic->ic_flags & IEEE80211_F_WEPON) {
2021                 k = ic->ic_nw_keys;
2022                 for (i = 0; i < IEEE80211_WEP_NKID; i++, k++) {
2023                         if (k->wk_len == 0)
2024                                 continue;
2025
2026                         wepkey.idx = i;
2027                         wepkey.len = k->wk_len;
2028                         bzero(wepkey.key, sizeof wepkey.key);
2029                         bcopy(k->wk_key, wepkey.key, k->wk_len);
2030                         DPRINTF(("Setting wep key index %u len %u\n",
2031                             wepkey.idx, wepkey.len));
2032                         error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY, &wepkey,
2033                             sizeof wepkey);
2034                         if (error != 0)
2035                                 return error;
2036                 }
2037
2038                 data = htole32(ic->ic_wep_txkey);
2039                 DPRINTF(("Setting wep tx key index to %u\n", le32toh(data)));
2040                 error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY_INDEX, &data,
2041                     sizeof data);
2042                 if (error != 0)
2043                         return error;
2044         }
2045
2046         data = htole32((ic->ic_flags & IEEE80211_F_WEPON) ? IPW_WEPON : 0);
2047         DPRINTF(("Setting wep flags to 0x%x\n", le32toh(data)));
2048         error = ipw_cmd(sc, IPW_CMD_SET_WEP_FLAGS, &data, sizeof data);
2049         if (error != 0)
2050                 return error;
2051
2052         if (ic->ic_opmode == IEEE80211_M_IBSS ||
2053             ic->ic_opmode == IEEE80211_M_HOSTAP) {
2054                 data = htole32(ic->ic_lintval);
2055                 DPRINTF(("Setting beacon interval to %u\n", le32toh(data)));
2056                 error = ipw_cmd(sc, IPW_CMD_SET_BEACON_INTERVAL, &data,
2057                     sizeof data);
2058                 if (error != 0)
2059                         return error;
2060         }
2061
2062         options.flags = htole32(0);
2063         options.channels = htole32(0x3fff); /* scan channels 1-14 */
2064         DPRINTF(("Setting scan options to 0x%x\n", le32toh(options.flags)));
2065         error = ipw_cmd(sc, IPW_CMD_SET_SCAN_OPTIONS, &options, sizeof options);
2066         if (error != 0)
2067                 return error;
2068
2069         /* finally, enable adapter (start scanning for an access point) */
2070         DPRINTF(("Enabling adapter\n"));
2071         return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0);
2072 }
2073
2074 static void
2075 ipw_init(void *priv)
2076 {
2077         struct ipw_softc *sc = priv;
2078         struct ieee80211com *ic = &sc->sc_ic;
2079         struct ifnet *ifp = &ic->ic_if;
2080         struct ipw_firmware *fw = &sc->fw;
2081
2082         /* exit immediately if firmware has not been ioctl'd */
2083         if (!(sc->flags & IPW_FLAG_FW_CACHED)) {
2084                 ifp->if_flags &= ~IFF_UP;
2085                 return;
2086         }
2087
2088         ipw_stop(sc);
2089
2090         if (ipw_reset(sc) != 0) {
2091                 device_printf(sc->sc_dev, "could not reset adapter\n");
2092                 goto fail;
2093         }
2094
2095         if (ipw_load_ucode(sc, fw->ucode, fw->ucode_size) != 0) {
2096                 device_printf(sc->sc_dev, "could not load microcode\n");
2097                 goto fail;
2098         }
2099
2100         ipw_stop_master(sc);
2101
2102         /*
2103          * Setup tx, rx and status rings
2104          */
2105         CSR_WRITE_4(sc, IPW_CSR_TX_BD_BASE, sc->tbd_phys);
2106         CSR_WRITE_4(sc, IPW_CSR_TX_BD_SIZE, IPW_NTBD);
2107         CSR_WRITE_4(sc, IPW_CSR_TX_READ_INDEX, 0);
2108         CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, 0);
2109         sc->txold = IPW_NTBD - 1; /* latest bd index ack'ed by firmware */
2110         sc->txcur = 0; /* bd index to write to */
2111         sc->txfree = IPW_NTBD - 2;
2112
2113         CSR_WRITE_4(sc, IPW_CSR_RX_BD_BASE, sc->rbd_phys);
2114         CSR_WRITE_4(sc, IPW_CSR_RX_BD_SIZE, IPW_NRBD);
2115         CSR_WRITE_4(sc, IPW_CSR_RX_READ_INDEX, 0);
2116         CSR_WRITE_4(sc, IPW_CSR_RX_WRITE_INDEX, IPW_NRBD - 1);
2117         sc->rxcur = IPW_NRBD - 1; /* latest bd index I've read */
2118
2119         CSR_WRITE_4(sc, IPW_CSR_RX_STATUS_BASE, sc->status_phys);
2120
2121         if (ipw_load_firmware(sc, fw->main, fw->main_size) != 0) {
2122                 device_printf(sc->sc_dev, "could not load firmware\n");
2123                 goto fail;
2124         }
2125
2126         sc->flags |= IPW_FLAG_FW_INITED;
2127
2128         /* Retrieve information tables base addresses */
2129         sc->table1_base = CSR_READ_4(sc, IPW_CSR_TABLE1_BASE);
2130         sc->table2_base = CSR_READ_4(sc, IPW_CSR_TABLE2_BASE);
2131
2132         ipw_write_table1(sc, IPW_INFO_LOCK, 0);
2133
2134         if (ipw_config(sc) != 0) {
2135                 device_printf(sc->sc_dev, "device configuration failed\n");
2136                 goto fail;
2137         }
2138
2139         ifp->if_flags &= ~IFF_OACTIVE;
2140         ifp->if_flags |= IFF_RUNNING;
2141
2142         return;
2143
2144 fail:   ifp->if_flags &= ~IFF_UP;
2145         ipw_stop(sc);
2146 }
2147
2148 static void
2149 ipw_stop(void *priv)
2150 {
2151         struct ipw_softc *sc = priv;
2152         struct ieee80211com *ic = &sc->sc_ic;
2153         struct ifnet *ifp = &ic->ic_if;
2154         int i;
2155
2156         ipw_stop_master(sc);
2157         CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_SW_RESET);
2158
2159         /*
2160          * Release tx buffers
2161          */
2162         for (i = 0; i < IPW_NTBD; i++)
2163                 ipw_release_sbd(sc, &sc->stbd_list[i]);
2164
2165         ifp->if_timer = 0;
2166         ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2167
2168         ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2169 }
2170
2171 static int
2172 ipw_sysctl_stats(SYSCTL_HANDLER_ARGS)
2173 {
2174         struct ipw_softc *sc = arg1;
2175         u_int32_t i, size, buf[256];
2176
2177         if (!(sc->flags & IPW_FLAG_FW_INITED)) {
2178                 bzero(buf, sizeof buf);
2179                 return SYSCTL_OUT(req, buf, sizeof buf);
2180         }
2181
2182         CSR_WRITE_4(sc, IPW_CSR_AUTOINC_ADDR, sc->table1_base);
2183
2184         size = min(CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA), 256);
2185         for (i = 1; i < size; i++)
2186                 buf[i] = MEM_READ_4(sc, CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA));
2187
2188         return SYSCTL_OUT(req, buf, sizeof buf);
2189 }
2190
2191 static int
2192 ipw_sysctl_radio(SYSCTL_HANDLER_ARGS)
2193 {
2194         struct ipw_softc *sc = arg1;
2195         int val;
2196
2197         val = !((sc->flags & IPW_FLAG_HAS_RADIO_SWITCH) &&
2198                 (CSR_READ_4(sc, IPW_CSR_IO) & IPW_IO_RADIO_DISABLED));
2199
2200         return SYSCTL_OUT(req, &val, sizeof val);
2201 }
2202
2203 static u_int32_t
2204 ipw_read_table1(struct ipw_softc *sc, u_int32_t off)
2205 {
2206         return MEM_READ_4(sc, MEM_READ_4(sc, sc->table1_base + off));
2207 }
2208
2209 static void
2210 ipw_write_table1(struct ipw_softc *sc, u_int32_t off, u_int32_t info)
2211 {
2212         MEM_WRITE_4(sc, MEM_READ_4(sc, sc->table1_base + off), info);
2213 }
2214
2215 static int
2216 ipw_read_table2(struct ipw_softc *sc, u_int32_t off, void *buf, u_int32_t *len)
2217 {
2218         u_int32_t addr, info;
2219         u_int16_t count, size;
2220         u_int32_t total;
2221
2222         /* addr[4] + count[2] + size[2] */
2223         addr = MEM_READ_4(sc, sc->table2_base + off);
2224         info = MEM_READ_4(sc, sc->table2_base + off + 4);
2225
2226         count = info >> 16;
2227         size = info & 0xffff;
2228         total = count * size;
2229
2230         if (total > *len) {
2231                 *len = total;
2232                 return EINVAL;
2233         }
2234
2235         *len = total;
2236         ipw_read_mem_1(sc, addr, buf, total);
2237
2238         return 0;
2239 }
2240
2241 static void
2242 ipw_read_mem_1(struct ipw_softc *sc, bus_size_t offset, u_int8_t *datap,
2243     bus_size_t count)
2244 {
2245         for (; count > 0; offset++, datap++, count--) {
2246                 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
2247                 *datap = CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3));
2248         }
2249 }
2250
2251 static void
2252 ipw_write_mem_1(struct ipw_softc *sc, bus_size_t offset, u_int8_t *datap,
2253     bus_size_t count)
2254 {
2255         for (; count > 0; offset++, datap++, count--) {
2256                 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
2257                 CSR_WRITE_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3), *datap);
2258         }
2259 }