2 * Copyright (c) 2009 Yahoo! Inc.
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26 * $FreeBSD: src/sys/dev/mps/mps_pci.c,v 1.4 2012/01/26 18:17:21 ken Exp $
29 /* PCI/PCI-X/PCIe bus interface for the LSI MPT2 controllers */
31 /* TODO Move headers to mpsvar */
32 #include <sys/types.h>
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
39 #include <sys/eventhandler.h>
40 #include <sys/malloc.h>
41 #include <sys/sysctl.h>
46 #include <bus/pci/pcireg.h>
47 #include <bus/pci/pcivar.h>
48 #include <bus/pci/pci_private.h>
50 #include <dev/raid/mps/mpi/mpi2_type.h>
51 #include <dev/raid/mps/mpi/mpi2.h>
52 #include <dev/raid/mps/mpi/mpi2_ioc.h>
53 #include <dev/raid/mps/mpi/mpi2_cnfg.h>
54 #include <dev/raid/mps/mpi/mpi2_tool.h>
56 #include <sys/queue.h>
57 #include <sys/kthread.h>
58 #include <dev/raid/mps/mps_ioctl.h>
59 #include <dev/raid/mps/mpsvar.h>
61 static int mps_pci_probe(device_t);
62 static int mps_pci_attach(device_t);
63 static int mps_pci_detach(device_t);
64 static int mps_pci_suspend(device_t);
65 static int mps_pci_resume(device_t);
66 static void mps_pci_free(struct mps_softc *);
67 #if 0 /* XXX swildner */
68 static int mps_alloc_msix(struct mps_softc *sc, int msgs);
71 static device_method_t mps_methods[] = {
72 DEVMETHOD(device_probe, mps_pci_probe),
73 DEVMETHOD(device_attach, mps_pci_attach),
74 DEVMETHOD(device_detach, mps_pci_detach),
75 DEVMETHOD(device_suspend, mps_pci_suspend),
76 DEVMETHOD(device_resume, mps_pci_resume),
81 static driver_t mps_pci_driver = {
84 sizeof(struct mps_softc)
87 static devclass_t mps_devclass;
88 DRIVER_MODULE(mps, pci, mps_pci_driver, mps_devclass, 0, 0);
89 MODULE_VERSION(mps, 1);
98 } mps_identifiers[] = {
99 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2004,
100 0xffff, 0xffff, 0, "LSI SAS2004" },
101 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2008,
102 0xffff, 0xffff, 0, "LSI SAS2008" },
103 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_1,
104 0xffff, 0xffff, 0, "LSI SAS2108" },
105 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_2,
106 0xffff, 0xffff, 0, "LSI SAS2108" },
107 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3,
108 0xffff, 0xffff, 0, "LSI SAS2108" },
109 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1,
110 0xffff, 0xffff, 0, "LSI SAS2116" },
111 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2,
112 0xffff, 0xffff, 0, "LSI SAS2116" },
113 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_1,
114 0xffff, 0xffff, 0, "LSI SAS2208" },
115 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_2,
116 0xffff, 0xffff, 0, "LSI SAS2208" },
117 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_3,
118 0xffff, 0xffff, 0, "LSI SAS2208" },
119 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_4,
120 0xffff, 0xffff, 0, "LSI SAS2208" },
121 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_5,
122 0xffff, 0xffff, 0, "LSI SAS2208" },
123 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_6,
124 0xffff, 0xffff, 0, "LSI SAS2208" },
125 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_1,
126 0xffff, 0xffff, 0, "LSI SAS2308" },
127 // Add Customer specific vender/subdevice id before generic
128 // (0xffff) vender/subdevice id.
129 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
130 0x8086, 0x3516, 0, "Intel(R) Integrated RAID Module RMS25JB080" },
131 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
132 0x8086, 0x3517, 0, "Intel(R) Integrated RAID Module RMS25JB040" },
133 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
134 0x8086, 0x3518, 0, "Intel(R) Integrated RAID Module RMS25KB080" },
135 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
136 0x8086, 0x3519, 0, "Intel(R) Integrated RAID Module RMS25KB040" },
137 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
138 0xffff, 0xffff, 0, "LSI SAS2308" },
139 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_3,
140 0xffff, 0xffff, 0, "LSI SAS2308" },
141 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SSS6200,
142 0xffff, 0xffff, MPS_FLAGS_WD_AVAILABLE, "LSI SSS6200" },
143 { 0, 0, 0, 0, 0, NULL }
146 static struct mps_ident *
147 mps_find_ident(device_t dev)
151 for (m = mps_identifiers; m->vendor != 0; m++) {
152 if (m->vendor != pci_get_vendor(dev))
154 if (m->device != pci_get_device(dev))
156 if ((m->subvendor != 0xffff) &&
157 (m->subvendor != pci_get_subvendor(dev)))
159 if ((m->subdevice != 0xffff) &&
160 (m->subdevice != pci_get_subdevice(dev)))
169 mps_pci_probe(device_t dev)
171 struct mps_ident *id;
173 if ((id = mps_find_ident(dev)) != NULL) {
174 device_set_desc(dev, id->desc);
175 return (BUS_PROBE_VENDOR);
181 mps_pci_attach(device_t dev)
183 struct mps_softc *sc;
188 sc = device_get_softc(dev);
189 bzero(sc, sizeof(*sc));
191 m = mps_find_ident(dev);
192 sc->mps_flags = m->flags;
194 /* Twiddle basic PCI config bits for a sanity check */
195 command = pci_read_config(dev, PCIR_COMMAND, 2);
196 command |= PCIM_CMD_BUSMASTEREN;
197 pci_write_config(dev, PCIR_COMMAND, command, 2);
198 command = pci_read_config(dev, PCIR_COMMAND, 2);
199 if ((command & PCIM_CMD_BUSMASTEREN) == 0) {
200 device_printf(dev, "Cannot enable PCI busmaster\n");
203 if ((command & PCIM_CMD_MEMEN) == 0) {
204 device_printf(dev, "PCI memory window not available\n");
208 /* Allocate the System Interface Register Set */
209 sc->mps_regs_rid = PCIR_BAR(1);
210 if ((sc->mps_regs_resource = bus_alloc_resource_any(dev,
211 SYS_RES_MEMORY, &sc->mps_regs_rid, RF_ACTIVE)) == NULL) {
212 device_printf(dev, "Cannot allocate PCI registers\n");
215 sc->mps_btag = rman_get_bustag(sc->mps_regs_resource);
216 sc->mps_bhandle = rman_get_bushandle(sc->mps_regs_resource);
218 /* Allocate the parent DMA tag */
219 if (bus_dma_tag_create(NULL, /* parent */
220 1, 0, /* algnmnt, boundary */
221 BUS_SPACE_MAXADDR, /* lowaddr */
222 BUS_SPACE_MAXADDR, /* highaddr */
223 NULL, NULL, /* filter, filterarg */
224 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
225 BUS_SPACE_UNRESTRICTED, /* nsegments */
226 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
228 &sc->mps_parent_dmat)) {
229 device_printf(dev, "Cannot allocate parent DMA tag\n");
234 if ((error = mps_attach(sc)) != 0)
241 mps_pci_setup_interrupts(struct mps_softc *sc)
248 #if 0 /* XXX swildner */
249 if ((sc->disable_msix == 0) &&
250 ((msgs = pci_msix_count(dev)) >= MPS_MSI_COUNT))
251 error = mps_alloc_msix(sc, MPS_MSI_COUNT);
254 sc->mps_irq_rid[0] = 0;
255 sc->mps_irq_type[0] = pci_alloc_1intr(dev, sc->enable_msi,
256 &sc->mps_irq_rid[0], &irq_flags);
257 sc->mps_irq[0] = bus_alloc_resource_any(dev, SYS_RES_IRQ,
258 &sc->mps_irq_rid[0], irq_flags);
259 if (sc->mps_irq[0] == NULL) {
260 device_printf(dev, "Cannot allocate interrupt\n");
263 error = bus_setup_intr(dev, sc->mps_irq[0], INTR_MPSAFE, mps_intr, sc,
264 &sc->mps_intrhand[0], NULL);
266 device_printf(dev, "Cannot setup interrupt\n");
272 mps_pci_detach(device_t dev)
274 struct mps_softc *sc;
277 sc = device_get_softc(dev);
279 if ((error = mps_free(sc)) != 0)
287 mps_pci_free(struct mps_softc *sc)
289 if (sc->mps_parent_dmat != NULL) {
290 bus_dma_tag_destroy(sc->mps_parent_dmat);
293 bus_teardown_intr(sc->mps_dev, sc->mps_irq[0], sc->mps_intrhand[0]);
294 bus_release_resource(sc->mps_dev, SYS_RES_IRQ, sc->mps_irq_rid[0],
296 if (sc->mps_irq_type[0] == PCI_INTR_TYPE_MSI)
297 pci_release_msi(sc->mps_dev);
299 if (sc->mps_regs_resource != NULL) {
300 bus_release_resource(sc->mps_dev, SYS_RES_MEMORY,
301 sc->mps_regs_rid, sc->mps_regs_resource);
308 mps_pci_suspend(device_t dev)
314 mps_pci_resume(device_t dev)
319 #if 0 /* XXX swildner */
321 mps_alloc_msix(struct mps_softc *sc, int msgs)
325 error = pci_alloc_msix(sc->mps_dev, &msgs);
331 mps_pci_restore(struct mps_softc *sc)
333 struct pci_devinfo *dinfo;
335 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
337 dinfo = device_get_ivars(sc->mps_dev);
339 mps_dprint(sc, MPS_FAULT, "%s: NULL dinfo\n", __func__);
343 pci_cfg_restore(sc->mps_dev, dinfo);