2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.84 2005/11/22 08:41:00 dillon Exp $
43 #include "use_ether.h"
46 #include "opt_atalk.h"
47 #include "opt_compat.h"
50 #include "opt_directio.h"
53 #include "opt_maxmem.h"
54 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
57 #include "opt_userconfig.h"
59 #include <sys/param.h>
60 #include <sys/systm.h>
61 #include <sys/sysproto.h>
62 #include <sys/signalvar.h>
63 #include <sys/kernel.h>
64 #include <sys/linker.h>
65 #include <sys/malloc.h>
68 #include <sys/reboot.h>
70 #include <sys/msgbuf.h>
71 #include <sys/sysent.h>
72 #include <sys/sysctl.h>
73 #include <sys/vmmeter.h>
75 #include <sys/upcall.h>
76 #include <sys/usched.h>
79 #include <vm/vm_param.h>
81 #include <vm/vm_kern.h>
82 #include <vm/vm_object.h>
83 #include <vm/vm_page.h>
84 #include <vm/vm_map.h>
85 #include <vm/vm_pager.h>
86 #include <vm/vm_extern.h>
88 #include <sys/thread2.h>
96 #include <machine/cpu.h>
97 #include <machine/reg.h>
98 #include <machine/clock.h>
99 #include <machine/specialreg.h>
100 #include <machine/bootinfo.h>
101 #include <machine/ipl.h>
102 #include <machine/md_var.h>
103 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
104 #include <machine/globaldata.h> /* CPU_prvspace */
105 #include <machine/smp.h>
107 #include <machine/perfmon.h>
109 #include <machine/cputypes.h>
112 #include <bus/isa/i386/isa_device.h>
114 #include <i386/isa/intr_machdep.h>
115 #include <bus/isa/rtc.h>
116 #include <machine/vm86.h>
117 #include <sys/random.h>
118 #include <sys/ptrace.h>
119 #include <machine/sigframe.h>
121 #define PHYSMAP_ENTRIES 10
123 extern void init386 (int first);
124 extern void dblfault_handler (void);
126 extern void printcpuinfo(void); /* XXX header file */
127 extern void finishidentcpu(void);
128 extern void panicifcpuunsupported(void);
129 extern void initializecpu(void);
131 static void cpu_startup (void *);
132 #ifndef CPU_DISABLE_SSE
133 static void set_fpregs_xmm (struct save87 *, struct savexmm *);
134 static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
135 #endif /* CPU_DISABLE_SSE */
137 extern void ffs_rawread_setup(void);
138 #endif /* DIRECTIO */
139 static void init_locks(void);
141 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
143 int _udatasel, _ucodesel;
146 #if defined(SWTCH_OPTIM_STATS)
147 extern int swtch_optim_stats;
148 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
149 CTLFLAG_RD, &swtch_optim_stats, 0, "");
150 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
151 CTLFLAG_RD, &tlb_flush_count, 0, "");
158 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
160 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
164 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
165 0, 0, sysctl_hw_physmem, "IU", "");
168 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
170 int error = sysctl_handle_int(oidp, 0,
171 ctob(physmem - vmstats.v_wire_count), req);
175 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
176 0, 0, sysctl_hw_usermem, "IU", "");
179 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
181 int error = sysctl_handle_int(oidp, 0,
182 i386_btop(avail_end - avail_start), req);
186 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
187 0, 0, sysctl_hw_availpages, "I", "");
190 sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
194 /* Unwind the buffer, so that it's linear (possibly starting with
195 * some initial nulls).
197 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
198 msgbufp->msg_size-msgbufp->msg_bufr,req);
199 if(error) return(error);
200 if(msgbufp->msg_bufr>0) {
201 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
202 msgbufp->msg_bufr,req);
207 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
208 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
210 static int msgbuf_clear;
213 sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
216 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
218 if (!error && req->newptr) {
219 /* Clear the buffer and reset write pointer */
220 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
221 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
227 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
228 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
229 "Clear kernel message buffer");
232 vm_paddr_t Maxmem = 0;
235 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
237 static vm_offset_t buffer_sva, buffer_eva;
238 vm_offset_t clean_sva, clean_eva;
239 static vm_offset_t pager_sva, pager_eva;
240 static struct trapframe proc0_tf;
252 if (boothowto & RB_VERBOSE)
256 * Good {morning,afternoon,evening,night}.
258 printf("%s", version);
261 panicifcpuunsupported();
265 printf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
267 * Display any holes after the first chunk of extended memory.
272 printf("Physical memory chunk(s):\n");
273 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
274 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
276 printf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
277 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
283 * Allocate space for system data structures.
284 * The first available kernel virtual address is in "v".
285 * As pages of kernel virtual memory are allocated, "v" is incremented.
286 * As pages of memory are allocated and cleared,
287 * "firstaddr" is incremented.
288 * An index into the kernel page table corresponding to the
289 * virtual memory address maintained in "v" is kept in "mapaddr".
293 * Make two passes. The first pass calculates how much memory is
294 * needed and allocates it. The second pass assigns virtual
295 * addresses to the various data structures.
299 v = (caddr_t)firstaddr;
301 #define valloc(name, type, num) \
302 (name) = (type *)v; v = (caddr_t)((name)+(num))
303 #define valloclim(name, type, num, lim) \
304 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
307 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
308 * For the first 64MB of ram nominally allocate sufficient buffers to
309 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
310 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
311 * the buffer cache we limit the eventual kva reservation to
314 * factor represents the 1/4 x ram conversion.
317 int factor = 4 * BKVASIZE / 1024;
318 int kbytes = physmem * (PAGE_SIZE / 1024);
322 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
324 nbuf += (kbytes - 65536) * 2 / (factor * 5);
325 if (maxbcache && nbuf > maxbcache / BKVASIZE)
326 nbuf = maxbcache / BKVASIZE;
330 * Do not allow the buffer_map to be more then 1/2 the size of the
333 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
335 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
337 printf("Warning: nbufs capped at %d\n", nbuf);
340 nswbuf = max(min(nbuf/4, 256), 16);
342 if (nswbuf < NSWBUF_MIN)
349 valloc(swbuf, struct buf, nswbuf);
350 valloc(buf, struct buf, nbuf);
354 * End of first pass, size has been calculated so allocate memory
356 if (firstaddr == 0) {
357 size = (vm_size_t)(v - firstaddr);
358 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
360 panic("startup: no room for tables");
365 * End of second pass, addresses have been assigned
367 if ((vm_size_t)(v - firstaddr) != size)
368 panic("startup: table size inconsistency");
370 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
371 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
372 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
374 buffer_map->system_map = 1;
375 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
376 (nswbuf*MAXPHYS) + pager_map_size);
377 pager_map->system_map = 1;
378 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
379 (16*(ARG_MAX+(PAGE_SIZE*3))));
381 #if defined(USERCONFIG)
383 cninit(); /* the preferred console may have changed */
386 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
387 ptoa(vmstats.v_free_count) / 1024);
390 * Set up buffers, so they can be used to read disk labels.
393 vm_pager_bufferinit();
397 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
399 mp_start(); /* fire up the APs and APICs */
406 * Send an interrupt to process.
408 * Stack is set up to allow sigcode stored
409 * at top to call routine, followed by kcall
410 * to sigreturn routine below. After sigreturn
411 * resets the signal mask, the stack, and the
412 * frame pointer, it returns to the user
416 sendsig(catcher, sig, mask, code)
422 struct lwp *lp = curthread->td_lwp;
423 struct proc *p = lp->lwp_proc;
424 struct trapframe *regs;
425 struct sigacts *psp = p->p_sigacts;
426 struct sigframe sf, *sfp;
429 regs = lp->lwp_md.md_regs;
430 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
432 /* save user context */
433 bzero(&sf, sizeof(struct sigframe));
434 sf.sf_uc.uc_sigmask = *mask;
435 sf.sf_uc.uc_stack = lp->lwp_sigstk;
436 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
437 sf.sf_uc.uc_mcontext.mc_gs = rgs();
438 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
440 /* Allocate and validate space for the signal handler context. */
442 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
443 SIGISMEMBER(psp->ps_sigonstack, sig)) {
444 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
445 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
446 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
449 sfp = (struct sigframe *)regs->tf_esp - 1;
451 /* Translate the signal is appropriate */
452 if (p->p_sysent->sv_sigtbl) {
453 if (sig <= p->p_sysent->sv_sigsize)
454 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
457 /* Build the argument list for the signal handler. */
459 sf.sf_ucontext = (register_t)&sfp->sf_uc;
460 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
461 /* Signal handler installed with SA_SIGINFO. */
462 sf.sf_siginfo = (register_t)&sfp->sf_si;
463 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
465 /* fill siginfo structure */
466 sf.sf_si.si_signo = sig;
467 sf.sf_si.si_code = code;
468 sf.sf_si.si_addr = (void*)regs->tf_err;
471 /* Old FreeBSD-style arguments. */
472 sf.sf_siginfo = code;
473 sf.sf_addr = regs->tf_err;
474 sf.sf_ahu.sf_handler = catcher;
478 * If we're a vm86 process, we want to save the segment registers.
479 * We also change eflags to be our emulated eflags, not the actual
482 if (regs->tf_eflags & PSL_VM) {
483 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
484 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
486 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
487 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
488 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
489 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
491 if (vm86->vm86_has_vme == 0)
492 sf.sf_uc.uc_mcontext.mc_eflags =
493 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
494 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
497 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
498 * syscalls made by the signal handler. This just avoids
499 * wasting time for our lazy fixup of such faults. PSL_NT
500 * does nothing in vm86 mode, but vm86 programs can set it
501 * almost legitimately in probes for old cpu types.
503 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
507 * Copy the sigframe out to the user's stack.
509 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
511 * Something is wrong with the stack pointer.
512 * ...Kill the process.
517 regs->tf_esp = (int)sfp;
518 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
519 regs->tf_eflags &= ~PSL_T;
520 regs->tf_cs = _ucodesel;
521 regs->tf_ds = _udatasel;
522 regs->tf_es = _udatasel;
523 regs->tf_fs = _udatasel;
524 regs->tf_ss = _udatasel;
528 * sigreturn(ucontext_t *sigcntxp)
530 * System call to cleanup state after a signal
531 * has been taken. Reset signal mask and
532 * stack state from context left by sendsig (above).
533 * Return to previous pc and psl as specified by
534 * context left by sendsig. Check carefully to
535 * make sure that the user has not modified the
536 * state to gain improper privileges.
538 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
539 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
542 sigreturn(struct sigreturn_args *uap)
544 struct lwp *lp = curthread->td_lwp;
545 struct trapframe *regs;
551 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
554 regs = lp->lwp_md.md_regs;
555 eflags = ucp->uc_mcontext.mc_eflags;
557 if (eflags & PSL_VM) {
558 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
559 struct vm86_kernel *vm86;
562 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
563 * set up the vm86 area, and we can't enter vm86 mode.
565 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
567 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
568 if (vm86->vm86_inited == 0)
571 /* go back to user mode if both flags are set */
572 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
573 trapsignal(lp->lwp_proc, SIGBUS, 0);
575 if (vm86->vm86_has_vme) {
576 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
577 (eflags & VME_USERCHANGE) | PSL_VM;
579 vm86->vm86_eflags = eflags; /* save VIF, VIP */
580 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
582 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
583 tf->tf_eflags = eflags;
584 tf->tf_vm86_ds = tf->tf_ds;
585 tf->tf_vm86_es = tf->tf_es;
586 tf->tf_vm86_fs = tf->tf_fs;
587 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
588 tf->tf_ds = _udatasel;
589 tf->tf_es = _udatasel;
590 tf->tf_fs = _udatasel;
593 * Don't allow users to change privileged or reserved flags.
596 * XXX do allow users to change the privileged flag PSL_RF.
597 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
598 * should sometimes set it there too. tf_eflags is kept in
599 * the signal context during signal handling and there is no
600 * other place to remember it, so the PSL_RF bit may be
601 * corrupted by the signal handler without us knowing.
602 * Corruption of the PSL_RF bit at worst causes one more or
603 * one less debugger trap, so allowing it is fairly harmless.
605 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
606 printf("sigreturn: eflags = 0x%x\n", eflags);
611 * Don't allow users to load a valid privileged %cs. Let the
612 * hardware check for invalid selectors, excess privilege in
613 * other selectors, invalid %eip's and invalid %esp's.
615 cs = ucp->uc_mcontext.mc_cs;
616 if (!CS_SECURE(cs)) {
617 printf("sigreturn: cs = 0x%x\n", cs);
618 trapsignal(lp->lwp_proc, SIGBUS, T_PROTFLT);
621 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
624 if (ucp->uc_mcontext.mc_onstack & 1)
625 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
627 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
629 lp->lwp_sigmask = ucp->uc_sigmask;
630 SIG_CANTMASK(lp->lwp_sigmask);
635 * Stack frame on entry to function. %eax will contain the function vector,
636 * %ecx will contain the function data. flags, ecx, and eax will have
637 * already been pushed on the stack.
648 sendupcall(struct vmupcall *vu, int morepending)
650 struct lwp *lp = curthread->td_lwp;
651 struct trapframe *regs;
652 struct upcall upcall;
653 struct upc_frame upc_frame;
657 * Get the upcall data structure
659 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
660 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
663 printf("bad upcall address\n");
668 * If the data structure is already marked pending or has a critical
669 * section count, mark the data structure as pending and return
670 * without doing an upcall. vu_pending is left set.
672 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
673 if (upcall.upc_pending < vu->vu_pending) {
674 upcall.upc_pending = vu->vu_pending;
675 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
676 sizeof(upcall.upc_pending));
682 * We can run this upcall now, clear vu_pending.
684 * Bump our critical section count and set or clear the
685 * user pending flag depending on whether more upcalls are
686 * pending. The user will be responsible for calling
687 * upc_dispatch(-1) to process remaining upcalls.
690 upcall.upc_pending = morepending;
691 crit_count += TDPRI_CRIT;
692 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
693 sizeof(upcall.upc_pending));
694 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
698 * Construct a stack frame and issue the upcall
700 regs = lp->lwp_md.md_regs;
701 upc_frame.eax = regs->tf_eax;
702 upc_frame.ecx = regs->tf_ecx;
703 upc_frame.edx = regs->tf_edx;
704 upc_frame.flags = regs->tf_eflags;
705 upc_frame.oldip = regs->tf_eip;
706 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
707 sizeof(upc_frame)) != 0) {
708 printf("bad stack on upcall\n");
710 regs->tf_eax = (register_t)vu->vu_func;
711 regs->tf_ecx = (register_t)vu->vu_data;
712 regs->tf_edx = (register_t)lp->lwp_upcall;
713 regs->tf_eip = (register_t)vu->vu_ctx;
714 regs->tf_esp -= sizeof(upc_frame);
719 * fetchupcall occurs in the context of a system call, which means that
720 * we have to return EJUSTRETURN in order to prevent eax and edx from
721 * being overwritten by the syscall return value.
723 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
724 * and the function pointer in %eax.
727 fetchupcall (struct vmupcall *vu, int morepending, void *rsp)
729 struct upc_frame upc_frame;
730 struct lwp *lp = curthread->td_lwp;
731 struct trapframe *regs;
733 struct upcall upcall;
736 regs = lp->lwp_md.md_regs;
738 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
742 * This jumps us to the next ready context.
745 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
748 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
749 crit_count += TDPRI_CRIT;
751 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
752 regs->tf_eax = (register_t)vu->vu_func;
753 regs->tf_ecx = (register_t)vu->vu_data;
754 regs->tf_edx = (register_t)lp->lwp_upcall;
755 regs->tf_eip = (register_t)vu->vu_ctx;
756 regs->tf_esp = (register_t)rsp;
759 * This returns us to the originally interrupted code.
761 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
762 regs->tf_eax = upc_frame.eax;
763 regs->tf_ecx = upc_frame.ecx;
764 regs->tf_edx = upc_frame.edx;
765 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
766 (upc_frame.flags & PSL_USERCHANGE);
767 regs->tf_eip = upc_frame.oldip;
768 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
777 * Machine dependent boot() routine
779 * I haven't seen anything to put here yet
780 * Possibly some stuff might be grafted back here from boot()
788 * Shutdown the CPU as much as possible
798 * cpu_idle() represents the idle LWKT. You cannot return from this function
799 * (unless you want to blow things up!). Instead we look for runnable threads
800 * and loop or halt as appropriate. Giant is not held on entry to the thread.
802 * The main loop is entered with a critical section held, we must release
803 * the critical section before doing anything else. lwkt_switch() will
804 * check for pending interrupts due to entering and exiting its own
807 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
808 * to wake a HLTed cpu up. However, there are cases where the idlethread
809 * will be entered with the possibility that no IPI will occur and in such
810 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
812 static int cpu_idle_hlt = 1;
813 static int cpu_idle_hltcnt;
814 static int cpu_idle_spincnt;
815 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
816 &cpu_idle_hlt, 0, "Idle loop HLT enable");
817 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
818 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
819 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
820 &cpu_idle_spincnt, 0, "Idle loop entry spins");
823 cpu_idle_default_hook(void)
826 * We must guarentee that hlt is exactly the instruction
829 __asm __volatile("sti; hlt");
832 /* Other subsystems (e.g., ACPI) can hook this later. */
833 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
838 struct thread *td = curthread;
841 KKASSERT(td->td_pri < TDPRI_CRIT);
844 * See if there are any LWKTs ready to go.
849 * If we are going to halt call splz unconditionally after
850 * CLIing to catch any interrupt races. Note that we are
851 * at SPL0 and interrupts are enabled.
853 if (cpu_idle_hlt && !lwkt_runnable() &&
854 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
855 __asm __volatile("cli");
857 if (!lwkt_runnable())
861 __asm __volatile("pause");
865 td->td_flags &= ~TDF_IDLE_NOHLT;
868 __asm __volatile("sti; pause");
870 __asm __volatile("sti");
878 * Clear registers on exec
881 setregs(p, entry, stack, ps_strings)
887 struct trapframe *regs = p->p_md.md_regs;
888 struct pcb *pcb = p->p_thread->td_pcb;
890 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
891 pcb->pcb_gs = _udatasel;
894 /* was i386_user_cleanup() in NetBSD */
897 bzero((char *)regs, sizeof(struct trapframe));
898 regs->tf_eip = entry;
899 regs->tf_esp = stack;
900 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
901 regs->tf_ss = _udatasel;
902 regs->tf_ds = _udatasel;
903 regs->tf_es = _udatasel;
904 regs->tf_fs = _udatasel;
905 regs->tf_cs = _ucodesel;
907 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
908 regs->tf_ebx = ps_strings;
911 * Reset the hardware debug registers if they were in use.
912 * They won't have any meaning for the newly exec'd process.
914 if (pcb->pcb_flags & PCB_DBREGS) {
921 if (pcb == curthread->td_pcb) {
923 * Clear the debug registers on the running
924 * CPU, otherwise they will end up affecting
925 * the next process we switch to.
929 pcb->pcb_flags &= ~PCB_DBREGS;
933 * Initialize the math emulator (if any) for the current process.
934 * Actually, just clear the bit that says that the emulator has
935 * been initialized. Initialization is delayed until the process
936 * traps to the emulator (if it is done at all) mainly because
937 * emulators don't provide an entry point for initialization.
939 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
942 * note: do not set CR0_TS here. npxinit() must do it after clearing
943 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
947 load_cr0(rcr0() | CR0_MP);
950 /* Initialize the npx (if any) for the current process. */
951 npxinit(__INITIAL_NPXCW__);
956 * note: linux emulator needs edx to be 0x0 on entry, which is
957 * handled in execve simply by setting the 64 bit syscall
968 cr0 |= CR0_NE; /* Done by npxinit() */
969 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
971 if (cpu_class != CPUCLASS_386)
973 cr0 |= CR0_WP | CR0_AM;
979 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
982 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
984 if (!error && req->newptr)
989 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
990 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
992 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
993 CTLFLAG_RW, &disable_rtc_set, 0, "");
995 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
996 CTLFLAG_RD, &bootinfo, bootinfo, "");
998 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
999 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1001 extern u_long bootdev; /* not a dev_t - encoding is different */
1002 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1003 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1006 * Initialize 386 and configure to run kernel
1010 * Initialize segments & interrupt table
1014 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1015 static struct gate_descriptor idt0[NIDT];
1016 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1017 union descriptor ldt[NLDT]; /* local descriptor table */
1019 /* table descriptors - used to load tables by cpu */
1020 struct region_descriptor r_gdt, r_idt;
1022 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1023 extern int has_f00f_bug;
1026 static struct i386tss dblfault_tss;
1027 static char dblfault_stack[PAGE_SIZE];
1029 extern struct user *proc0paddr;
1032 /* software prototypes -- in more palatable form */
1033 struct soft_segment_descriptor gdt_segs[] = {
1034 /* GNULL_SEL 0 Null Descriptor */
1035 { 0x0, /* segment base address */
1037 0, /* segment type */
1038 0, /* segment descriptor priority level */
1039 0, /* segment descriptor present */
1041 0, /* default 32 vs 16 bit size */
1042 0 /* limit granularity (byte/page units)*/ },
1043 /* GCODE_SEL 1 Code Descriptor for kernel */
1044 { 0x0, /* segment base address */
1045 0xfffff, /* length - all address space */
1046 SDT_MEMERA, /* segment type */
1047 0, /* segment descriptor priority level */
1048 1, /* segment descriptor present */
1050 1, /* default 32 vs 16 bit size */
1051 1 /* limit granularity (byte/page units)*/ },
1052 /* GDATA_SEL 2 Data Descriptor for kernel */
1053 { 0x0, /* segment base address */
1054 0xfffff, /* length - all address space */
1055 SDT_MEMRWA, /* segment type */
1056 0, /* segment descriptor priority level */
1057 1, /* segment descriptor present */
1059 1, /* default 32 vs 16 bit size */
1060 1 /* limit granularity (byte/page units)*/ },
1061 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1062 { 0x0, /* segment base address */
1063 0xfffff, /* length - all address space */
1064 SDT_MEMRWA, /* segment type */
1065 0, /* segment descriptor priority level */
1066 1, /* segment descriptor present */
1068 1, /* default 32 vs 16 bit size */
1069 1 /* limit granularity (byte/page units)*/ },
1070 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1072 0x0, /* segment base address */
1073 sizeof(struct i386tss)-1,/* length - all address space */
1074 SDT_SYS386TSS, /* segment type */
1075 0, /* segment descriptor priority level */
1076 1, /* segment descriptor present */
1078 0, /* unused - default 32 vs 16 bit size */
1079 0 /* limit granularity (byte/page units)*/ },
1080 /* GLDT_SEL 5 LDT Descriptor */
1081 { (int) ldt, /* segment base address */
1082 sizeof(ldt)-1, /* length - all address space */
1083 SDT_SYSLDT, /* segment type */
1084 SEL_UPL, /* segment descriptor priority level */
1085 1, /* segment descriptor present */
1087 0, /* unused - default 32 vs 16 bit size */
1088 0 /* limit granularity (byte/page units)*/ },
1089 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1090 { (int) ldt, /* segment base address */
1091 (512 * sizeof(union descriptor)-1), /* length */
1092 SDT_SYSLDT, /* segment type */
1093 0, /* segment descriptor priority level */
1094 1, /* segment descriptor present */
1096 0, /* unused - default 32 vs 16 bit size */
1097 0 /* limit granularity (byte/page units)*/ },
1098 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1099 { 0x0, /* segment base address */
1100 0x0, /* length - all address space */
1101 0, /* segment type */
1102 0, /* segment descriptor priority level */
1103 0, /* segment descriptor present */
1105 0, /* default 32 vs 16 bit size */
1106 0 /* limit granularity (byte/page units)*/ },
1107 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1108 { 0x400, /* segment base address */
1109 0xfffff, /* length */
1110 SDT_MEMRWA, /* segment type */
1111 0, /* segment descriptor priority level */
1112 1, /* segment descriptor present */
1114 1, /* default 32 vs 16 bit size */
1115 1 /* limit granularity (byte/page units)*/ },
1116 /* GPANIC_SEL 9 Panic Tss Descriptor */
1117 { (int) &dblfault_tss, /* segment base address */
1118 sizeof(struct i386tss)-1,/* length - all address space */
1119 SDT_SYS386TSS, /* segment type */
1120 0, /* segment descriptor priority level */
1121 1, /* segment descriptor present */
1123 0, /* unused - default 32 vs 16 bit size */
1124 0 /* limit granularity (byte/page units)*/ },
1125 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1126 { 0, /* segment base address (overwritten) */
1127 0xfffff, /* length */
1128 SDT_MEMERA, /* segment type */
1129 0, /* segment descriptor priority level */
1130 1, /* segment descriptor present */
1132 0, /* default 32 vs 16 bit size */
1133 1 /* limit granularity (byte/page units)*/ },
1134 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1135 { 0, /* segment base address (overwritten) */
1136 0xfffff, /* length */
1137 SDT_MEMERA, /* segment type */
1138 0, /* segment descriptor priority level */
1139 1, /* segment descriptor present */
1141 0, /* default 32 vs 16 bit size */
1142 1 /* limit granularity (byte/page units)*/ },
1143 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1144 { 0, /* segment base address (overwritten) */
1145 0xfffff, /* length */
1146 SDT_MEMRWA, /* segment type */
1147 0, /* segment descriptor priority level */
1148 1, /* segment descriptor present */
1150 1, /* default 32 vs 16 bit size */
1151 1 /* limit granularity (byte/page units)*/ },
1152 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1153 { 0, /* segment base address (overwritten) */
1154 0xfffff, /* length */
1155 SDT_MEMRWA, /* segment type */
1156 0, /* segment descriptor priority level */
1157 1, /* segment descriptor present */
1159 0, /* default 32 vs 16 bit size */
1160 1 /* limit granularity (byte/page units)*/ },
1161 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1162 { 0, /* segment base address (overwritten) */
1163 0xfffff, /* length */
1164 SDT_MEMRWA, /* segment type */
1165 0, /* segment descriptor priority level */
1166 1, /* segment descriptor present */
1168 0, /* default 32 vs 16 bit size */
1169 1 /* limit granularity (byte/page units)*/ },
1170 /* GTLS_START 15 TLS */
1171 { 0x0, /* segment base address */
1173 0, /* segment type */
1174 0, /* segment descriptor priority level */
1175 0, /* segment descriptor present */
1177 0, /* default 32 vs 16 bit size */
1178 0 /* limit granularity (byte/page units)*/ },
1179 /* GTLS_START+1 16 TLS */
1180 { 0x0, /* segment base address */
1182 0, /* segment type */
1183 0, /* segment descriptor priority level */
1184 0, /* segment descriptor present */
1186 0, /* default 32 vs 16 bit size */
1187 0 /* limit granularity (byte/page units)*/ },
1188 /* GTLS_END 17 TLS */
1189 { 0x0, /* segment base address */
1191 0, /* segment type */
1192 0, /* segment descriptor priority level */
1193 0, /* segment descriptor present */
1195 0, /* default 32 vs 16 bit size */
1196 0 /* limit granularity (byte/page units)*/ },
1199 static struct soft_segment_descriptor ldt_segs[] = {
1200 /* Null Descriptor - overwritten by call gate */
1201 { 0x0, /* segment base address */
1202 0x0, /* length - all address space */
1203 0, /* segment type */
1204 0, /* segment descriptor priority level */
1205 0, /* segment descriptor present */
1207 0, /* default 32 vs 16 bit size */
1208 0 /* limit granularity (byte/page units)*/ },
1209 /* Null Descriptor - overwritten by call gate */
1210 { 0x0, /* segment base address */
1211 0x0, /* length - all address space */
1212 0, /* segment type */
1213 0, /* segment descriptor priority level */
1214 0, /* segment descriptor present */
1216 0, /* default 32 vs 16 bit size */
1217 0 /* limit granularity (byte/page units)*/ },
1218 /* Null Descriptor - overwritten by call gate */
1219 { 0x0, /* segment base address */
1220 0x0, /* length - all address space */
1221 0, /* segment type */
1222 0, /* segment descriptor priority level */
1223 0, /* segment descriptor present */
1225 0, /* default 32 vs 16 bit size */
1226 0 /* limit granularity (byte/page units)*/ },
1227 /* Code Descriptor for user */
1228 { 0x0, /* segment base address */
1229 0xfffff, /* length - all address space */
1230 SDT_MEMERA, /* segment type */
1231 SEL_UPL, /* segment descriptor priority level */
1232 1, /* segment descriptor present */
1234 1, /* default 32 vs 16 bit size */
1235 1 /* limit granularity (byte/page units)*/ },
1236 /* Null Descriptor - overwritten by call gate */
1237 { 0x0, /* segment base address */
1238 0x0, /* length - all address space */
1239 0, /* segment type */
1240 0, /* segment descriptor priority level */
1241 0, /* segment descriptor present */
1243 0, /* default 32 vs 16 bit size */
1244 0 /* limit granularity (byte/page units)*/ },
1245 /* Data Descriptor for user */
1246 { 0x0, /* segment base address */
1247 0xfffff, /* length - all address space */
1248 SDT_MEMRWA, /* segment type */
1249 SEL_UPL, /* segment descriptor priority level */
1250 1, /* segment descriptor present */
1252 1, /* default 32 vs 16 bit size */
1253 1 /* limit granularity (byte/page units)*/ },
1257 setidt(idx, func, typ, dpl, selec)
1264 struct gate_descriptor *ip;
1267 ip->gd_looffset = (int)func;
1268 ip->gd_selector = selec;
1274 ip->gd_hioffset = ((int)func)>>16 ;
1277 #define IDTVEC(name) __CONCAT(X,name)
1280 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1281 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1282 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1283 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1284 IDTVEC(xmm), IDTVEC(syscall),
1287 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall),
1288 IDTVEC(int0x82_syscall);
1290 #ifdef DEBUG_INTERRUPTS
1291 extern inthand_t *Xrsvdary[256];
1296 struct segment_descriptor *sd;
1297 struct soft_segment_descriptor *ssd;
1299 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1300 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1301 ssd->ssd_type = sd->sd_type;
1302 ssd->ssd_dpl = sd->sd_dpl;
1303 ssd->ssd_p = sd->sd_p;
1304 ssd->ssd_def32 = sd->sd_def32;
1305 ssd->ssd_gran = sd->sd_gran;
1309 * Populate the (physmap) array with base/bound pairs describing the
1310 * available physical memory in the system, then test this memory and
1311 * build the phys_avail array describing the actually-available memory.
1313 * If we cannot accurately determine the physical memory map, then use
1314 * value from the 0xE801 call, and failing that, the RTC.
1316 * Total memory size may be set by the kernel environment variable
1317 * hw.physmem or the compile-time define MAXMEM.
1320 getmemsize(int first)
1322 int i, physmap_idx, pa_indx;
1324 u_int basemem, extmem;
1325 struct vm86frame vmf;
1326 struct vm86context vmc;
1328 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1336 quad_t dcons_addr, dcons_size;
1339 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1340 bzero(&vmf, sizeof(struct vm86frame));
1341 bzero(physmap, sizeof(physmap));
1345 * Some newer BIOSes has broken INT 12H implementation which cause
1346 * kernel panic immediately. In this case, we need to scan SMAP
1347 * with INT 15:E820 first, then determine base memory size.
1349 if (hasbrokenint12) {
1354 * Perform "base memory" related probes & setup. If we get a crazy
1355 * value give the bios some scribble space just in case.
1357 vm86_intcall(0x12, &vmf);
1358 basemem = vmf.vmf_ax;
1359 if (basemem > 640) {
1360 printf("Preposterous BIOS basemem of %uK, "
1361 "truncating to < 640K\n", basemem);
1366 * XXX if biosbasemem is now < 640, there is a `hole'
1367 * between the end of base memory and the start of
1368 * ISA memory. The hole may be empty or it may
1369 * contain BIOS code or data. Map it read/write so
1370 * that the BIOS can write to it. (Memory from 0 to
1371 * the physical end of the kernel is mapped read-only
1372 * to begin with and then parts of it are remapped.
1373 * The parts that aren't remapped form holes that
1374 * remain read-only and are unused by the kernel.
1375 * The base memory area is below the physical end of
1376 * the kernel and right now forms a read-only hole.
1377 * The part of it from PAGE_SIZE to
1378 * (trunc_page(biosbasemem * 1024) - 1) will be
1379 * remapped and used by the kernel later.)
1381 * This code is similar to the code used in
1382 * pmap_mapdev, but since no memory needs to be
1383 * allocated we simply change the mapping.
1385 for (pa = trunc_page(basemem * 1024);
1386 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1387 pte = vtopte(pa + KERNBASE);
1388 *pte = pa | PG_RW | PG_V;
1392 * if basemem != 640, map pages r/w into vm86 page table so
1393 * that the bios can scribble on it.
1396 for (i = basemem / 4; i < 160; i++)
1397 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1401 * map page 1 R/W into the kernel page table so we can use it
1402 * as a buffer. The kernel will unmap this page later.
1404 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1405 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1408 * get memory map with INT 15:E820
1410 #define SMAPSIZ sizeof(*smap)
1411 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1414 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1415 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1420 vmf.vmf_eax = 0xE820;
1421 vmf.vmf_edx = SMAP_SIG;
1422 vmf.vmf_ecx = SMAPSIZ;
1423 i = vm86_datacall(0x15, &vmf, &vmc);
1424 if (i || vmf.vmf_eax != SMAP_SIG)
1426 if (boothowto & RB_VERBOSE)
1427 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1429 *(u_int32_t *)((char *)&smap->base + 4),
1430 (u_int32_t)smap->base,
1431 *(u_int32_t *)((char *)&smap->length + 4),
1432 (u_int32_t)smap->length);
1434 if (smap->type != 0x01)
1437 if (smap->length == 0)
1440 if (smap->base >= 0xffffffff) {
1441 printf("%uK of memory above 4GB ignored\n",
1442 (u_int)(smap->length / 1024));
1446 for (i = 0; i <= physmap_idx; i += 2) {
1447 if (smap->base < physmap[i + 1]) {
1448 if (boothowto & RB_VERBOSE)
1450 "Overlapping or non-montonic memory region, ignoring second region\n");
1455 if (smap->base == physmap[physmap_idx + 1]) {
1456 physmap[physmap_idx + 1] += smap->length;
1461 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1463 "Too many segments in the physical address map, giving up\n");
1466 physmap[physmap_idx] = smap->base;
1467 physmap[physmap_idx + 1] = smap->base + smap->length;
1469 ; /* fix GCC3.x warning */
1470 } while (vmf.vmf_ebx != 0);
1473 * Perform "base memory" related probes & setup based on SMAP
1476 for (i = 0; i <= physmap_idx; i += 2) {
1477 if (physmap[i] == 0x00000000) {
1478 basemem = physmap[i + 1] / 1024;
1487 if (basemem > 640) {
1488 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1493 for (pa = trunc_page(basemem * 1024);
1494 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1495 pte = vtopte(pa + KERNBASE);
1496 *pte = pa | PG_RW | PG_V;
1500 for (i = basemem / 4; i < 160; i++)
1501 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1504 if (physmap[1] != 0)
1508 * If we failed above, try memory map with INT 15:E801
1510 vmf.vmf_ax = 0xE801;
1511 if (vm86_intcall(0x15, &vmf) == 0) {
1512 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1516 vm86_intcall(0x15, &vmf);
1517 extmem = vmf.vmf_ax;
1520 * Prefer the RTC value for extended memory.
1522 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1527 * Special hack for chipsets that still remap the 384k hole when
1528 * there's 16MB of memory - this really confuses people that
1529 * are trying to use bus mastering ISA controllers with the
1530 * "16MB limit"; they only have 16MB, but the remapping puts
1531 * them beyond the limit.
1533 * If extended memory is between 15-16MB (16-17MB phys address range),
1536 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1540 physmap[1] = basemem * 1024;
1542 physmap[physmap_idx] = 0x100000;
1543 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1547 * Now, physmap contains a map of physical memory.
1551 /* make hole for AP bootstrap code YYY */
1552 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1554 /* look for the MP hardware - needed for apic addresses */
1559 * Maxmem isn't the "maximum memory", it's one larger than the
1560 * highest page of the physical address space. It should be
1561 * called something like "Maxphyspage". We may adjust this
1562 * based on ``hw.physmem'' and the results of the memory test.
1564 Maxmem = atop(physmap[physmap_idx + 1]);
1567 Maxmem = MAXMEM / 4;
1571 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
1572 * for the appropriate modifiers. This overrides MAXMEM.
1574 if ((cp = getenv("hw.physmem")) != NULL) {
1575 u_int64_t AllowMem, sanity;
1578 sanity = AllowMem = strtouq(cp, &ep, 0);
1579 if ((ep != cp) && (*ep != 0)) {
1592 AllowMem = sanity = 0;
1594 if (AllowMem < sanity)
1598 printf("Ignoring invalid memory size of '%s'\n", cp);
1600 Maxmem = atop(AllowMem);
1603 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1604 (boothowto & RB_VERBOSE))
1605 printf("Physical memory use set to %lluK\n", Maxmem * 4);
1608 * If Maxmem has been increased beyond what the system has detected,
1609 * extend the last memory segment to the new limit.
1611 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1612 physmap[physmap_idx + 1] = ptoa(Maxmem);
1614 /* call pmap initialization to make new kernel address space */
1615 pmap_bootstrap(first, 0);
1618 * Size up each available chunk of physical memory.
1620 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1622 phys_avail[pa_indx++] = physmap[0];
1623 phys_avail[pa_indx] = physmap[0];
1627 * Get dcons buffer address
1629 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1630 getenv_quad("dcons.size", &dcons_size) == 0)
1634 * physmap is in bytes, so when converting to page boundaries,
1635 * round up the start address and round down the end address.
1637 for (i = 0; i <= physmap_idx; i += 2) {
1641 if (physmap[i + 1] < end)
1642 end = trunc_page(physmap[i + 1]);
1643 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1648 int *ptr = (int *)CADDR1;
1652 * block out kernel memory as not available.
1654 if (pa >= 0x100000 && pa < first)
1658 * block out dcons buffer
1661 && pa >= trunc_page(dcons_addr)
1662 && pa < dcons_addr + dcons_size)
1668 * map page into kernel: valid, read/write,non-cacheable
1670 *pte = pa | PG_V | PG_RW | PG_N;
1675 * Test for alternating 1's and 0's
1677 *(volatile int *)ptr = 0xaaaaaaaa;
1678 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1682 * Test for alternating 0's and 1's
1684 *(volatile int *)ptr = 0x55555555;
1685 if (*(volatile int *)ptr != 0x55555555) {
1691 *(volatile int *)ptr = 0xffffffff;
1692 if (*(volatile int *)ptr != 0xffffffff) {
1698 *(volatile int *)ptr = 0x0;
1699 if (*(volatile int *)ptr != 0x0) {
1703 * Restore original value.
1708 * Adjust array of valid/good pages.
1710 if (page_bad == TRUE) {
1714 * If this good page is a continuation of the
1715 * previous set of good pages, then just increase
1716 * the end pointer. Otherwise start a new chunk.
1717 * Note that "end" points one higher than end,
1718 * making the range >= start and < end.
1719 * If we're also doing a speculative memory
1720 * test and we at or past the end, bump up Maxmem
1721 * so that we keep going. The first bad page
1722 * will terminate the loop.
1724 if (phys_avail[pa_indx] == pa) {
1725 phys_avail[pa_indx] += PAGE_SIZE;
1728 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1729 printf("Too many holes in the physical address space, giving up\n");
1733 phys_avail[pa_indx++] = pa; /* start */
1734 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1744 * The last chunk must contain at least one page plus the message
1745 * buffer to avoid complicating other code (message buffer address
1746 * calculation, etc.).
1748 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1749 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1750 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1751 phys_avail[pa_indx--] = 0;
1752 phys_avail[pa_indx--] = 0;
1755 Maxmem = atop(phys_avail[pa_indx]);
1757 /* Trim off space for the message buffer. */
1758 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1760 avail_end = phys_avail[pa_indx];
1772 * 7 Device Not Available (x87)
1774 * 9 Coprocessor Segment overrun (unsupported, reserved)
1776 * 11 Segment not present
1778 * 13 General Protection
1781 * 16 x87 FP Exception pending
1782 * 17 Alignment Check
1784 * 19 SIMD floating point
1786 * 32-255 INTn/external sources
1791 struct gate_descriptor *gdp;
1792 int gsel_tss, metadata_missing, off, x;
1793 struct mdglobaldata *gd;
1796 * Prevent lowering of the ipl if we call tsleep() early.
1798 gd = &CPU_prvspace[0].mdglobaldata;
1799 bzero(gd, sizeof(*gd));
1801 gd->mi.gd_curthread = &thread0;
1803 atdevbase = ISA_HOLE_START + KERNBASE;
1805 metadata_missing = 0;
1806 if (bootinfo.bi_modulep) {
1807 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1808 preload_bootstrap_relocate(KERNBASE);
1810 metadata_missing = 1;
1812 if (bootinfo.bi_envp)
1813 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1816 * start with one cpu. Note: ncpus2_shift and ncpus2_mask are left
1821 /* Init basic tunables, hz etc */
1825 * make gdt memory segments, the code segment goes up to end of the
1826 * page with etext in it, the data segment goes to the end of
1830 * XXX text protection is temporarily (?) disabled. The limit was
1831 * i386_btop(round_page(etext)) - 1.
1833 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1834 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1836 gdt_segs[GPRIV_SEL].ssd_limit =
1837 atop(sizeof(struct privatespace) - 1);
1838 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1839 gdt_segs[GPROC0_SEL].ssd_base =
1840 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1842 gd->mi.gd_prvspace = &CPU_prvspace[0];
1845 * Note: on both UP and SMP curthread must be set non-NULL
1846 * early in the boot sequence because the system assumes
1847 * that 'curthread' is never NULL.
1850 for (x = 0; x < NGDT; x++) {
1852 /* avoid overwriting db entries with APM ones */
1853 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1856 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1859 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1860 r_gdt.rd_base = (int) gdt;
1863 mi_gdinit(&gd->mi, 0);
1865 lwkt_init_thread(&thread0, proc0paddr, LWKT_THREAD_STACK, 0, &gd->mi);
1866 lwkt_set_comm(&thread0, "thread0");
1867 proc0.p_addr = (void *)thread0.td_kstack;
1868 LIST_INIT(&proc0.p_lwps);
1869 LIST_INSERT_HEAD(&proc0.p_lwps, &proc0.p_lwp, lwp_list);
1870 proc0.p_lwp.lwp_thread = &thread0;
1871 proc0.p_lwp.lwp_proc = &proc0;
1872 proc0.p_usched = usched_init();
1873 varsymset_init(&proc0.p_varsymset, NULL);
1874 thread0.td_flags |= TDF_RUNNING;
1875 thread0.td_proc = &proc0;
1876 thread0.td_lwp = &proc0.p_lwp;
1877 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1878 safepri = TDPRI_MAX;
1880 /* make ldt memory segments */
1882 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1883 * should be spelled ...MAX_USER...
1885 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1886 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1887 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1888 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1890 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1892 gd->gd_currentldt = _default_ldt;
1893 /* spinlocks and the BGL */
1897 for (x = 0; x < NIDT; x++) {
1898 #ifdef DEBUG_INTERRUPTS
1899 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1901 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1904 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1905 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1906 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1907 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1908 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1909 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1910 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1911 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1912 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1913 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1914 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1915 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1916 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1917 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1918 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1919 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1920 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1921 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1922 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1923 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1924 setidt(0x80, &IDTVEC(int0x80_syscall),
1925 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1926 setidt(0x81, &IDTVEC(int0x81_syscall),
1927 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1928 setidt(0x82, &IDTVEC(int0x82_syscall),
1929 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1931 r_idt.rd_limit = sizeof(idt0) - 1;
1932 r_idt.rd_base = (int) idt;
1936 * Initialize the console before we print anything out.
1940 if (metadata_missing)
1941 printf("WARNING: loader(8) metadata is missing!\n");
1950 if (boothowto & RB_KDB)
1951 Debugger("Boot flags requested debugger");
1954 finishidentcpu(); /* Final stage of CPU initialization */
1955 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1956 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1957 initializecpu(); /* Initialize CPU registers */
1960 * make an initial tss so cpu can get interrupt stack on syscall!
1961 * The 16 bytes is to save room for a VM86 context.
1963 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1964 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
1965 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1966 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1967 gd->gd_common_tssd = *gd->gd_tss_gdt;
1968 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
1971 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1972 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1973 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1974 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1975 dblfault_tss.tss_cr3 = (int)IdlePTD;
1976 dblfault_tss.tss_eip = (int) dblfault_handler;
1977 dblfault_tss.tss_eflags = PSL_KERNEL;
1978 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1979 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1980 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1981 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1982 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1986 init_param2(physmem);
1988 /* now running on new page tables, configured,and u/iom is accessible */
1990 /* Map the message buffer. */
1991 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1992 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1994 msgbufinit(msgbufp, MSGBUF_SIZE);
1996 /* make a call gate to reenter kernel with */
1997 gdp = &ldt[LSYS5CALLS_SEL].gd;
1999 x = (int) &IDTVEC(syscall);
2000 gdp->gd_looffset = x++;
2001 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2003 gdp->gd_type = SDT_SYS386CGT;
2004 gdp->gd_dpl = SEL_UPL;
2006 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2008 /* XXX does this work? */
2009 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2010 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2012 /* transfer to user mode */
2014 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2015 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2017 /* setup proc 0's pcb */
2018 thread0.td_pcb->pcb_flags = 0;
2019 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2020 thread0.td_pcb->pcb_ext = 0;
2021 proc0.p_lwp.lwp_md.md_regs = &proc0_tf;
2025 * Initialize machine-dependant portions of the global data structure.
2026 * Note that the global data area and cpu0's idlestack in the private
2027 * data space were allocated in locore.
2029 * Note: the idlethread's cpl is 0
2031 * WARNING! Called from early boot, 'mycpu' may not work yet.
2034 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2037 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2039 lwkt_init_thread(&gd->mi.gd_idlethread,
2040 gd->mi.gd_prvspace->idlestack,
2041 sizeof(gd->mi.gd_prvspace->idlestack),
2042 TDF_MPSAFE, &gd->mi);
2043 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2044 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2045 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2046 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2050 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2052 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2053 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2060 globaldata_find(int cpu)
2062 KKASSERT(cpu >= 0 && cpu < ncpus);
2063 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2066 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2067 static void f00f_hack(void *unused);
2068 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2071 f00f_hack(void *unused)
2073 struct gate_descriptor *new_idt;
2079 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2081 r_idt.rd_limit = sizeof(idt0) - 1;
2083 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2085 panic("kmem_alloc returned 0");
2086 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2087 panic("kmem_alloc returned non-page-aligned memory");
2088 /* Put the first seven entries in the lower page */
2089 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2090 bcopy(idt, new_idt, sizeof(idt0));
2091 r_idt.rd_base = (int)new_idt;
2094 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2095 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2096 panic("vm_map_protect failed");
2099 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2102 ptrace_set_pc(p, addr)
2106 p->p_md.md_regs->tf_eip = addr;
2111 ptrace_single_step(struct lwp *lp)
2113 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2117 int ptrace_read_u_check(p, addr, len)
2124 if ((vm_offset_t) (addr + len) < addr)
2126 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2129 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2131 if ((vm_offset_t) addr < gap)
2133 if ((vm_offset_t) (addr + len) <=
2134 (vm_offset_t) (gap + sizeof(struct trapframe)))
2139 int ptrace_write_u(p, off, data)
2144 struct trapframe frame_copy;
2146 struct trapframe *tp;
2149 * Privileged kernel state is scattered all over the user area.
2150 * Only allow write access to parts of regs and to fpregs.
2152 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2153 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2154 tp = p->p_md.md_regs;
2156 *(int *)((char *)&frame_copy + (off - min)) = data;
2157 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2158 !CS_SECURE(frame_copy.tf_cs))
2160 *(int*)((char *)p->p_addr + off) = data;
2165 * The PCB is at the end of the user area YYY
2167 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2168 min += offsetof(struct pcb, pcb_save);
2169 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2170 *(int*)((char *)p->p_addr + off) = data;
2177 fill_regs(struct lwp *lp, struct reg *regs)
2180 struct trapframe *tp;
2182 tp = lp->lwp_md.md_regs;
2183 regs->r_fs = tp->tf_fs;
2184 regs->r_es = tp->tf_es;
2185 regs->r_ds = tp->tf_ds;
2186 regs->r_edi = tp->tf_edi;
2187 regs->r_esi = tp->tf_esi;
2188 regs->r_ebp = tp->tf_ebp;
2189 regs->r_ebx = tp->tf_ebx;
2190 regs->r_edx = tp->tf_edx;
2191 regs->r_ecx = tp->tf_ecx;
2192 regs->r_eax = tp->tf_eax;
2193 regs->r_eip = tp->tf_eip;
2194 regs->r_cs = tp->tf_cs;
2195 regs->r_eflags = tp->tf_eflags;
2196 regs->r_esp = tp->tf_esp;
2197 regs->r_ss = tp->tf_ss;
2198 pcb = lp->lwp_thread->td_pcb;
2199 regs->r_gs = pcb->pcb_gs;
2204 set_regs(struct lwp *lp, struct reg *regs)
2207 struct trapframe *tp;
2209 tp = lp->lwp_md.md_regs;
2210 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2211 !CS_SECURE(regs->r_cs))
2213 tp->tf_fs = regs->r_fs;
2214 tp->tf_es = regs->r_es;
2215 tp->tf_ds = regs->r_ds;
2216 tp->tf_edi = regs->r_edi;
2217 tp->tf_esi = regs->r_esi;
2218 tp->tf_ebp = regs->r_ebp;
2219 tp->tf_ebx = regs->r_ebx;
2220 tp->tf_edx = regs->r_edx;
2221 tp->tf_ecx = regs->r_ecx;
2222 tp->tf_eax = regs->r_eax;
2223 tp->tf_eip = regs->r_eip;
2224 tp->tf_cs = regs->r_cs;
2225 tp->tf_eflags = regs->r_eflags;
2226 tp->tf_esp = regs->r_esp;
2227 tp->tf_ss = regs->r_ss;
2228 pcb = lp->lwp_thread->td_pcb;
2229 pcb->pcb_gs = regs->r_gs;
2233 #ifndef CPU_DISABLE_SSE
2235 fill_fpregs_xmm(sv_xmm, sv_87)
2236 struct savexmm *sv_xmm;
2237 struct save87 *sv_87;
2239 struct env87 *penv_87 = &sv_87->sv_env;
2240 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2243 /* FPU control/status */
2244 penv_87->en_cw = penv_xmm->en_cw;
2245 penv_87->en_sw = penv_xmm->en_sw;
2246 penv_87->en_tw = penv_xmm->en_tw;
2247 penv_87->en_fip = penv_xmm->en_fip;
2248 penv_87->en_fcs = penv_xmm->en_fcs;
2249 penv_87->en_opcode = penv_xmm->en_opcode;
2250 penv_87->en_foo = penv_xmm->en_foo;
2251 penv_87->en_fos = penv_xmm->en_fos;
2254 for (i = 0; i < 8; ++i)
2255 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2257 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2261 set_fpregs_xmm(sv_87, sv_xmm)
2262 struct save87 *sv_87;
2263 struct savexmm *sv_xmm;
2265 struct env87 *penv_87 = &sv_87->sv_env;
2266 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2269 /* FPU control/status */
2270 penv_xmm->en_cw = penv_87->en_cw;
2271 penv_xmm->en_sw = penv_87->en_sw;
2272 penv_xmm->en_tw = penv_87->en_tw;
2273 penv_xmm->en_fip = penv_87->en_fip;
2274 penv_xmm->en_fcs = penv_87->en_fcs;
2275 penv_xmm->en_opcode = penv_87->en_opcode;
2276 penv_xmm->en_foo = penv_87->en_foo;
2277 penv_xmm->en_fos = penv_87->en_fos;
2280 for (i = 0; i < 8; ++i)
2281 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2283 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2285 #endif /* CPU_DISABLE_SSE */
2288 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2290 #ifndef CPU_DISABLE_SSE
2292 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2293 (struct save87 *)fpregs);
2296 #endif /* CPU_DISABLE_SSE */
2297 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2302 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2304 #ifndef CPU_DISABLE_SSE
2306 set_fpregs_xmm((struct save87 *)fpregs,
2307 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2310 #endif /* CPU_DISABLE_SSE */
2311 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2316 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2319 dbregs->dr0 = rdr0();
2320 dbregs->dr1 = rdr1();
2321 dbregs->dr2 = rdr2();
2322 dbregs->dr3 = rdr3();
2323 dbregs->dr4 = rdr4();
2324 dbregs->dr5 = rdr5();
2325 dbregs->dr6 = rdr6();
2326 dbregs->dr7 = rdr7();
2330 pcb = lp->lwp_thread->td_pcb;
2331 dbregs->dr0 = pcb->pcb_dr0;
2332 dbregs->dr1 = pcb->pcb_dr1;
2333 dbregs->dr2 = pcb->pcb_dr2;
2334 dbregs->dr3 = pcb->pcb_dr3;
2337 dbregs->dr6 = pcb->pcb_dr6;
2338 dbregs->dr7 = pcb->pcb_dr7;
2344 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2347 load_dr0(dbregs->dr0);
2348 load_dr1(dbregs->dr1);
2349 load_dr2(dbregs->dr2);
2350 load_dr3(dbregs->dr3);
2351 load_dr4(dbregs->dr4);
2352 load_dr5(dbregs->dr5);
2353 load_dr6(dbregs->dr6);
2354 load_dr7(dbregs->dr7);
2357 struct ucred *ucred;
2359 uint32_t mask1, mask2;
2362 * Don't let an illegal value for dr7 get set. Specifically,
2363 * check for undefined settings. Setting these bit patterns
2364 * result in undefined behaviour and can lead to an unexpected
2367 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2368 i++, mask1 <<= 2, mask2 <<= 2)
2369 if ((dbregs->dr7 & mask1) == mask2)
2372 pcb = lp->lwp_thread->td_pcb;
2373 ucred = lp->lwp_proc->p_ucred;
2376 * Don't let a process set a breakpoint that is not within the
2377 * process's address space. If a process could do this, it
2378 * could halt the system by setting a breakpoint in the kernel
2379 * (if ddb was enabled). Thus, we need to check to make sure
2380 * that no breakpoints are being enabled for addresses outside
2381 * process's address space, unless, perhaps, we were called by
2384 * XXX - what about when the watched area of the user's
2385 * address space is written into from within the kernel
2386 * ... wouldn't that still cause a breakpoint to be generated
2387 * from within kernel mode?
2390 if (suser_cred(ucred, 0) != 0) {
2391 if (dbregs->dr7 & 0x3) {
2392 /* dr0 is enabled */
2393 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2397 if (dbregs->dr7 & (0x3<<2)) {
2398 /* dr1 is enabled */
2399 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2403 if (dbregs->dr7 & (0x3<<4)) {
2404 /* dr2 is enabled */
2405 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2409 if (dbregs->dr7 & (0x3<<6)) {
2410 /* dr3 is enabled */
2411 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2416 pcb->pcb_dr0 = dbregs->dr0;
2417 pcb->pcb_dr1 = dbregs->dr1;
2418 pcb->pcb_dr2 = dbregs->dr2;
2419 pcb->pcb_dr3 = dbregs->dr3;
2420 pcb->pcb_dr6 = dbregs->dr6;
2421 pcb->pcb_dr7 = dbregs->dr7;
2423 pcb->pcb_flags |= PCB_DBREGS;
2430 * Return > 0 if a hardware breakpoint has been hit, and the
2431 * breakpoint was in user space. Return 0, otherwise.
2434 user_dbreg_trap(void)
2436 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2437 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2438 int nbp; /* number of breakpoints that triggered */
2439 caddr_t addr[4]; /* breakpoint addresses */
2443 if ((dr7 & 0x000000ff) == 0) {
2445 * all GE and LE bits in the dr7 register are zero,
2446 * thus the trap couldn't have been caused by the
2447 * hardware debug registers
2454 bp = dr6 & 0x0000000f;
2458 * None of the breakpoint bits are set meaning this
2459 * trap was not caused by any of the debug registers
2465 * at least one of the breakpoints were hit, check to see
2466 * which ones and if any of them are user space addresses
2470 addr[nbp++] = (caddr_t)rdr0();
2473 addr[nbp++] = (caddr_t)rdr1();
2476 addr[nbp++] = (caddr_t)rdr2();
2479 addr[nbp++] = (caddr_t)rdr3();
2482 for (i=0; i<nbp; i++) {
2484 (caddr_t)VM_MAXUSER_ADDRESS) {
2486 * addr[i] is in user space
2493 * None of the breakpoints are in user space.
2501 Debugger(const char *msg)
2503 printf("Debugger(\"%s\") called.\n", msg);
2507 #include <sys/disklabel.h>
2510 * Determine the size of the transfer, and make sure it is
2511 * within the boundaries of the partition. Adjust transfer
2512 * if needed, and signal errors or early completion.
2515 bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2517 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2518 int labelsect = lp->d_partitions[0].p_offset;
2519 int maxsz = p->p_size,
2520 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2522 /* overwriting disk label ? */
2523 /* XXX should also protect bootstrap in first 8K */
2524 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2525 #if LABELSECTOR != 0
2526 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2528 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2529 bp->b_error = EROFS;
2533 #if defined(DOSBBSECTOR) && defined(notyet)
2534 /* overwriting master boot record? */
2535 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2536 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2537 bp->b_error = EROFS;
2542 /* beyond partition? */
2543 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2544 /* if exactly at end of disk, return an EOF */
2545 if (bp->b_blkno == maxsz) {
2546 bp->b_resid = bp->b_bcount;
2549 /* or truncate if part of it fits */
2550 sz = maxsz - bp->b_blkno;
2552 bp->b_error = EINVAL;
2555 bp->b_bcount = sz << DEV_BSHIFT;
2558 bp->b_pblkno = bp->b_blkno + p->p_offset;
2562 bp->b_flags |= B_ERROR;
2569 * Provide inb() and outb() as functions. They are normally only
2570 * available as macros calling inlined functions, thus cannot be
2571 * called inside DDB.
2573 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2579 /* silence compiler warnings */
2581 void outb(u_int, u_char);
2588 * We use %%dx and not %1 here because i/o is done at %dx and not at
2589 * %edx, while gcc generates inferior code (movw instead of movl)
2590 * if we tell it to load (u_short) port.
2592 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2597 outb(u_int port, u_char data)
2601 * Use an unnecessary assignment to help gcc's register allocator.
2602 * This make a large difference for gcc-1.40 and a tiny difference
2603 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2604 * best results. gcc-2.6.0 can't handle this.
2607 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2614 #include "opt_cpu.h"
2618 * initialize all the SMP locks
2621 /* critical region when masking or unmasking interupts */
2622 struct spinlock_deprecated imen_spinlock;
2624 /* Make FAST_INTR() routines sequential */
2625 struct spinlock_deprecated fast_intr_spinlock;
2627 /* critical region for old style disable_intr/enable_intr */
2628 struct spinlock_deprecated mpintr_spinlock;
2630 /* critical region around INTR() routines */
2631 struct spinlock_deprecated intr_spinlock;
2633 /* lock region used by kernel profiling */
2634 struct spinlock_deprecated mcount_spinlock;
2636 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2637 struct spinlock_deprecated com_spinlock;
2639 /* locks kernel printfs */
2640 struct spinlock_deprecated cons_spinlock;
2642 /* lock regions around the clock hardware */
2643 struct spinlock_deprecated clock_spinlock;
2645 /* lock around the MP rendezvous */
2646 struct spinlock_deprecated smp_rv_spinlock;
2652 * mp_lock = 0; BSP already owns the MP lock
2655 * Get the initial mp_lock with a count of 1 for the BSP.
2656 * This uses a LOGICAL cpu ID, ie BSP == 0.
2659 cpu_get_initial_mplock();
2662 spin_lock_init(&mcount_spinlock);
2663 spin_lock_init(&fast_intr_spinlock);
2664 spin_lock_init(&intr_spinlock);
2665 spin_lock_init(&mpintr_spinlock);
2666 spin_lock_init(&imen_spinlock);
2667 spin_lock_init(&smp_rv_spinlock);
2668 spin_lock_init(&com_spinlock);
2669 spin_lock_init(&clock_spinlock);
2670 spin_lock_init(&cons_spinlock);
2672 /* our token pool needs to work early */
2673 lwkt_token_pool_init();