contrib/gcc-3.4/gcc/longlong.h

   1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
   2    Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000
   3    Free Software Foundation, Inc.
   4
   5    This definition file is free software; you can redistribute it
   6    and/or modify it under the terms of the GNU General Public
   7    License as published by the Free Software Foundation; either
   8    version 2, or (at your option) any later version.
   9
  10    This definition file is distributed in the hope that it will be
  11    useful, but WITHOUT ANY WARRANTY; without even the implied
  12    warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13    See the GNU General Public License for more details.
  14
  15    You should have received a copy of the GNU General Public License
  16    along with this program; if not, write to the Free Software
  17    Foundation, Inc., 59 Temple Place - Suite 330,
  18    Boston, MA 02111-1307, USA.  */
  19
  20 /* You have to define the following before including this file:
  21
  22    UWtype -- An unsigned type, default type for operations (typically a "word")
  23    UHWtype -- An unsigned type, at least half the size of UWtype.
  24    UDWtype -- An unsigned type, at least twice as large a UWtype
  25    W_TYPE_SIZE -- size in bits of UWtype
  26
  27    UQItype -- Unsigned 8 bit type.
  28    SItype, USItype -- Signed and unsigned 32 bit types.
  29    DItype, UDItype -- Signed and unsigned 64 bit types.
  30
  31    On a 32 bit machine UWtype should typically be USItype;
  32    on a 64 bit machine, UWtype should typically be UDItype.
  33 */
  34
  35 #define __BITS4 (W_TYPE_SIZE / 4)
  36 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
  37 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
  38 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
  39
  40 #ifndef W_TYPE_SIZE
  41 #define W_TYPE_SIZE     32
  42 #define UWtype          USItype
  43 #define UHWtype         USItype
  44 #define UDWtype         UDItype
  45 #endif
  46
  47 /* Define auxiliary asm macros.
  48
  49    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
  50    UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
  51    word product in HIGH_PROD and LOW_PROD.
  52
  53    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
  54    UDWtype product.  This is just a variant of umul_ppmm.
  55
  56    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  57    denominator) divides a UDWtype, composed by the UWtype integers
  58    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
  59    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
  60    than DENOMINATOR for correct operation.  If, in addition, the most
  61    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
  62    UDIV_NEEDS_NORMALIZATION is defined to 1.
  63
  64    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  65    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
  66    is rounded towards 0.
  67
  68    5) count_leading_zeros(count, x) counts the number of zero-bits from the
  69    msb to the first nonzero bit in the UWtype X.  This is the number of
  70    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
  71    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
  72
  73    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
  74    from the least significant end.
  75
  76    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
  77    high_addend_2, low_addend_2) adds two UWtype integers, composed by
  78    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
  79    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
  80    (i.e. carry out) is not stored anywhere, and is lost.
  81
  82    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
  83    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
  84    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
  85    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
  86    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
  87    and is lost.
  88
  89    If any of these macros are left undefined for a particular CPU,
  90    C macros are used.  */
  91
  92 /* The CPUs come in alphabetical order below.
  93
  94    Please add support for more CPUs here, or improve the current support
  95    for the CPUs below!
  96    (E.g. WE32100, IBM360.)  */
  97
  98 #if defined (__GNUC__) && !defined (NO_ASM)
  99
 100 /* We sometimes need to clobber "cc" with gcc2, but that would not be
 101    understood by gcc1.  Use cpp to avoid major code duplication.  */
 102 #if __GNUC__ < 2
 103 #define __CLOBBER_CC
 104 #define __AND_CLOBBER_CC
 105 #else /* __GNUC__ >= 2 */
 106 #define __CLOBBER_CC : "cc"
 107 #define __AND_CLOBBER_CC , "cc"
 108 #endif /* __GNUC__ < 2 */
 109
 110 #if defined (__alpha) && W_TYPE_SIZE == 64
 111 #define umul_ppmm(ph, pl, m0, m1) \
 112   do {                                                                  \
 113     UDItype __m0 = (m0), __m1 = (m1);                                   \
 114     (ph) = __builtin_alpha_umulh (__m0, __m1);                          \
 115     (pl) = __m0 * __m1;                                                 \
 116   } while (0)
 117 #define UMUL_TIME 46
 118 #ifndef LONGLONG_STANDALONE
 119 #define udiv_qrnnd(q, r, n1, n0, d) \
 120   do { UDItype __r;                                                     \
 121     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
 122     (r) = __r;                                                          \
 123   } while (0)
 124 extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
 125 #define UDIV_TIME 220
 126 #endif /* LONGLONG_STANDALONE */
 127 #ifdef __alpha_cix__
 128 #define count_leading_zeros(COUNT,X)    ((COUNT) = __builtin_clzl (X))
 129 #define count_trailing_zeros(COUNT,X)   ((COUNT) = __builtin_ctzl (X))
 130 #define COUNT_LEADING_ZEROS_0 64
 131 #else
 132 extern const UQItype __clz_tab[] ATTRIBUTE_HIDDEN;
 133 #define count_leading_zeros(COUNT,X) \
 134   do {                                                                  \
 135     UDItype __xr = (X), __t, __a;                                       \
 136     __t = __builtin_alpha_cmpbge (0, __xr);                             \
 137     __a = __clz_tab[__t ^ 0xff] - 1;                                    \
 138     __t = __builtin_alpha_extbl (__xr, __a);                            \
 139     (COUNT) = 64 - (__clz_tab[__t] + __a*8);                            \
 140   } while (0)
 141 #define count_trailing_zeros(COUNT,X) \
 142   do {                                                                  \
 143     UDItype __xr = (X), __t, __a;                                       \
 144     __t = __builtin_alpha_cmpbge (0, __xr);                             \
 145     __t = ~__t & -~__t;                                                 \
 146     __a = ((__t & 0xCC) != 0) * 2;                                      \
 147     __a += ((__t & 0xF0) != 0) * 4;                                     \
 148     __a += ((__t & 0xAA) != 0);                                         \
 149     __t = __builtin_alpha_extbl (__xr, __a);                            \
 150     __a <<= 3;                                                          \
 151     __t &= -__t;                                                        \
 152     __a += ((__t & 0xCC) != 0) * 2;                                     \
 153     __a += ((__t & 0xF0) != 0) * 4;                                     \
 154     __a += ((__t & 0xAA) != 0);                                         \
 155     (COUNT) = __a;                                                      \
 156   } while (0)
 157 #endif /* __alpha_cix__ */
 158 #endif /* __alpha */
 159
 160 #if defined (__arc__) && W_TYPE_SIZE == 32
 161 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 162   __asm__ ("add.f       %1, %4, %5\n\tadc       %0, %2, %3"             \
 163            : "=r" ((USItype) (sh)),                                     \
 164              "=&r" ((USItype) (sl))                                     \
 165            : "%r" ((USItype) (ah)),                                     \
 166              "rIJ" ((USItype) (bh)),                                    \
 167              "%r" ((USItype) (al)),                                     \
 168              "rIJ" ((USItype) (bl)))
 169 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 170   __asm__ ("sub.f       %1, %4, %5\n\tsbc       %0, %2, %3"             \
 171            : "=r" ((USItype) (sh)),                                     \
 172              "=&r" ((USItype) (sl))                                     \
 173            : "r" ((USItype) (ah)),                                      \
 174              "rIJ" ((USItype) (bh)),                                    \
 175              "r" ((USItype) (al)),                                      \
 176              "rIJ" ((USItype) (bl)))
 177 /* Call libgcc routine.  */
 178 #define umul_ppmm(w1, w0, u, v) \
 179 do {                                                                    \
 180   DWunion __w;                                                          \
 181   __w.ll = __umulsidi3 (u, v);                                          \
 182   w1 = __w.s.high;                                                      \
 183   w0 = __w.s.low;                                                       \
 184 } while (0)
 185 #define __umulsidi3 __umulsidi3
 186 UDItype __umulsidi3 (USItype, USItype);
 187 #endif
 188
 189 #if defined (__arm__) && W_TYPE_SIZE == 32
 190 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 191   __asm__ ("adds        %1, %4, %5\n\tadc       %0, %2, %3"             \
 192            : "=r" ((USItype) (sh)),                                     \
 193              "=&r" ((USItype) (sl))                                     \
 194            : "%r" ((USItype) (ah)),                                     \
 195              "rI" ((USItype) (bh)),                                     \
 196              "%r" ((USItype) (al)),                                     \
 197              "rI" ((USItype) (bl)))
 198 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 199   __asm__ ("subs        %1, %4, %5\n\tsbc       %0, %2, %3"             \
 200            : "=r" ((USItype) (sh)),                                     \
 201              "=&r" ((USItype) (sl))                                     \
 202            : "r" ((USItype) (ah)),                                      \
 203              "rI" ((USItype) (bh)),                                     \
 204              "r" ((USItype) (al)),                                      \
 205              "rI" ((USItype) (bl)))
 206 #define umul_ppmm(xh, xl, a, b) \
 207 {register USItype __t0, __t1, __t2;                                     \
 208   __asm__ ("%@ Inlined umul_ppmm\n"                                     \
 209            "    mov     %2, %5, lsr #16\n"                              \
 210            "    mov     %0, %6, lsr #16\n"                              \
 211            "    bic     %3, %5, %2, lsl #16\n"                          \
 212            "    bic     %4, %6, %0, lsl #16\n"                          \
 213            "    mul     %1, %3, %4\n"                                   \
 214            "    mul     %4, %2, %4\n"                                   \
 215            "    mul     %3, %0, %3\n"                                   \
 216            "    mul     %0, %2, %0\n"                                   \
 217            "    adds    %3, %4, %3\n"                                   \
 218            "    addcs   %0, %0, #65536\n"                               \
 219            "    adds    %1, %1, %3, lsl #16\n"                          \
 220            "    adc     %0, %0, %3, lsr #16"                            \
 221            : "=&r" ((USItype) (xh)),                                    \
 222              "=r" ((USItype) (xl)),                                     \
 223              "=&r" (__t0), "=&r" (__t1), "=r" (__t2)                    \
 224            : "r" ((USItype) (a)),                                       \
 225              "r" ((USItype) (b)));}
 226 #define UMUL_TIME 20
 227 #define UDIV_TIME 100
 228 #endif /* __arm__ */
 229
 230 #if defined (__hppa) && W_TYPE_SIZE == 32
 231 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 232   __asm__ ("add %4,%5,%1\n\taddc %2,%3,%0"                              \
 233            : "=r" ((USItype) (sh)),                                     \
 234              "=&r" ((USItype) (sl))                                     \
 235            : "%rM" ((USItype) (ah)),                                    \
 236              "rM" ((USItype) (bh)),                                     \
 237              "%rM" ((USItype) (al)),                                    \
 238              "rM" ((USItype) (bl)))
 239 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 240   __asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0"                              \
 241            : "=r" ((USItype) (sh)),                                     \
 242              "=&r" ((USItype) (sl))                                     \
 243            : "rM" ((USItype) (ah)),                                     \
 244              "rM" ((USItype) (bh)),                                     \
 245              "rM" ((USItype) (al)),                                     \
 246              "rM" ((USItype) (bl)))
 247 #if defined (_PA_RISC1_1)
 248 #define umul_ppmm(w1, w0, u, v) \
 249   do {                                                                  \
 250     union                                                               \
 251       {                                                                 \
 252         UDItype __f;                                                    \
 253         struct {USItype __w1, __w0;} __w1w0;                            \
 254       } __t;                                                            \
 255     __asm__ ("xmpyu %1,%2,%0"                                           \
 256              : "=x" (__t.__f)                                           \
 257              : "x" ((USItype) (u)),                                     \
 258                "x" ((USItype) (v)));                                    \
 259     (w1) = __t.__w1w0.__w1;                                             \
 260     (w0) = __t.__w1w0.__w0;                                             \
 261      } while (0)
 262 #define UMUL_TIME 8
 263 #else
 264 #define UMUL_TIME 30
 265 #endif
 266 #define UDIV_TIME 40
 267 #define count_leading_zeros(count, x) \
 268   do {                                                                  \
 269     USItype __tmp;                                                      \
 270     __asm__ (                                                           \
 271        "ldi             1,%0\n"                                         \
 272 "       extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?\n"  \
 273 "       extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.\n"\
 274 "       ldo             16(%0),%0               ; Yes.  Perform add.\n" \
 275 "       extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?\n"   \
 276 "       extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.\n"\
 277 "       ldo             8(%0),%0                ; Yes.  Perform add.\n" \
 278 "       extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?\n"    \
 279 "       extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.\n"\
 280 "       ldo             4(%0),%0                ; Yes.  Perform add.\n" \
 281 "       extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?\n"    \
 282 "       extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.\n"\
 283 "       ldo             2(%0),%0                ; Yes.  Perform add.\n" \
 284 "       extru           %1,30,1,%1              ; Extract bit 1.\n"     \
 285 "       sub             %0,%1,%0                ; Subtract it.\n"       \
 286         : "=r" (count), "=r" (__tmp) : "1" (x));                        \
 287   } while (0)
 288 #endif
 289
 290 #if (defined (__i370__) || defined (__s390__) || defined (__mvs__)) && W_TYPE_SIZE == 32
 291 #define smul_ppmm(xh, xl, m0, m1) \
 292   do {                                                                  \
 293     union {DItype __ll;                                                 \
 294            struct {USItype __h, __l;} __i;                              \
 295           } __x;                                                        \
 296     __asm__ ("lr %N0,%1\n\tmr %0,%2"                                    \
 297              : "=&r" (__x.__ll)                                         \
 298              : "r" (m0), "r" (m1));                                     \
 299     (xh) = __x.__i.__h; (xl) = __x.__i.__l;                             \
 300   } while (0)
 301 #define sdiv_qrnnd(q, r, n1, n0, d) \
 302   do {                                                                  \
 303     union {DItype __ll;                                                 \
 304            struct {USItype __h, __l;} __i;                              \
 305           } __x;                                                        \
 306     __x.__i.__h = n1; __x.__i.__l = n0;                                 \
 307     __asm__ ("dr %0,%2"                                                 \
 308              : "=r" (__x.__ll)                                          \
 309              : "0" (__x.__ll), "r" (d));                                \
 310     (q) = __x.__i.__l; (r) = __x.__i.__h;                               \
 311   } while (0)
 312 #endif
 313
 314 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
 315 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 316   __asm__ ("addl %5,%1\n\tadcl %3,%0"                                   \
 317            : "=r" ((USItype) (sh)),                                     \
 318              "=&r" ((USItype) (sl))                                     \
 319            : "%0" ((USItype) (ah)),                                     \
 320              "g" ((USItype) (bh)),                                      \
 321              "%1" ((USItype) (al)),                                     \
 322              "g" ((USItype) (bl)))
 323 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 324   __asm__ ("subl %5,%1\n\tsbbl %3,%0"                                   \
 325            : "=r" ((USItype) (sh)),                                     \
 326              "=&r" ((USItype) (sl))                                     \
 327            : "0" ((USItype) (ah)),                                      \
 328              "g" ((USItype) (bh)),                                      \
 329              "1" ((USItype) (al)),                                      \
 330              "g" ((USItype) (bl)))
 331 #define umul_ppmm(w1, w0, u, v) \
 332   __asm__ ("mull %3"                                                    \
 333            : "=a" ((USItype) (w0)),                                     \
 334              "=d" ((USItype) (w1))                                      \
 335            : "%0" ((USItype) (u)),                                      \
 336              "rm" ((USItype) (v)))
 337 #define udiv_qrnnd(q, r, n1, n0, dv) \
 338   __asm__ ("divl %4"                                                    \
 339            : "=a" ((USItype) (q)),                                      \
 340              "=d" ((USItype) (r))                                       \
 341            : "0" ((USItype) (n0)),                                      \
 342              "1" ((USItype) (n1)),                                      \
 343              "rm" ((USItype) (dv)))
 344 #define count_leading_zeros(count, x) \
 345   do {                                                                  \
 346     USItype __cbtmp;                                                    \
 347     __asm__ ("bsrl %1,%0"                                               \
 348              : "=r" (__cbtmp) : "rm" ((USItype) (x)));                  \
 349     (count) = __cbtmp ^ 31;                                             \
 350   } while (0)
 351 #define count_trailing_zeros(count, x) \
 352   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
 353 #define UMUL_TIME 40
 354 #define UDIV_TIME 40
 355 #endif /* 80x86 */
 356
 357 #if defined (__i960__) && W_TYPE_SIZE == 32
 358 #define umul_ppmm(w1, w0, u, v) \
 359   ({union {UDItype __ll;                                                \
 360            struct {USItype __l, __h;} __i;                              \
 361           } __xx;                                                       \
 362   __asm__ ("emul        %2,%1,%0"                                       \
 363            : "=d" (__xx.__ll)                                           \
 364            : "%dI" ((USItype) (u)),                                     \
 365              "dI" ((USItype) (v)));                                     \
 366   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 367 #define __umulsidi3(u, v) \
 368   ({UDItype __w;                                                        \
 369     __asm__ ("emul      %2,%1,%0"                                       \
 370              : "=d" (__w)                                               \
 371              : "%dI" ((USItype) (u)),                                   \
 372                "dI" ((USItype) (v)));                                   \
 373     __w; })
 374 #endif /* __i960__ */
 375
 376 #if defined (__M32R__) && W_TYPE_SIZE == 32
 377 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 378   /* The cmp clears the condition bit.  */ \
 379   __asm__ ("cmp %0,%0\n\taddx %1,%5\n\taddx %0,%3"                      \
 380            : "=r" ((USItype) (sh)),                                     \
 381              "=&r" ((USItype) (sl))                                     \
 382            : "0" ((USItype) (ah)),                                      \
 383              "r" ((USItype) (bh)),                                      \
 384              "1" ((USItype) (al)),                                      \
 385              "r" ((USItype) (bl))                                       \
 386            : "cbit")
 387 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 388   /* The cmp clears the condition bit.  */ \
 389   __asm__ ("cmp %0,%0\n\tsubx %1,%5\n\tsubx %0,%3"                      \
 390            : "=r" ((USItype) (sh)),                                     \
 391              "=&r" ((USItype) (sl))                                     \
 392            : "0" ((USItype) (ah)),                                      \
 393              "r" ((USItype) (bh)),                                      \
 394              "1" ((USItype) (al)),                                      \
 395              "r" ((USItype) (bl))                                       \
 396            : "cbit")
 397 #endif /* __M32R__ */
 398
 399 #if defined (__mc68000__) && W_TYPE_SIZE == 32
 400 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 401   __asm__ ("add%.l %5,%1\n\taddx%.l %3,%0"                              \
 402            : "=d" ((USItype) (sh)),                                     \
 403              "=&d" ((USItype) (sl))                                     \
 404            : "%0" ((USItype) (ah)),                                     \
 405              "d" ((USItype) (bh)),                                      \
 406              "%1" ((USItype) (al)),                                     \
 407              "g" ((USItype) (bl)))
 408 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 409   __asm__ ("sub%.l %5,%1\n\tsubx%.l %3,%0"                              \
 410            : "=d" ((USItype) (sh)),                                     \
 411              "=&d" ((USItype) (sl))                                     \
 412            : "0" ((USItype) (ah)),                                      \
 413              "d" ((USItype) (bh)),                                      \
 414              "1" ((USItype) (al)),                                      \
 415              "g" ((USItype) (bl)))
 416
 417 /* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r.  */
 418 #if defined (__mc68020__) || defined(mc68020) \
 419         || defined(__mc68030__) || defined(mc68030) \
 420         || defined(__mc68040__) || defined(mc68040) \
 421         || defined(__mcpu32__) || defined(mcpu32)
 422 #define umul_ppmm(w1, w0, u, v) \
 423   __asm__ ("mulu%.l %3,%1:%0"                                           \
 424            : "=d" ((USItype) (w0)),                                     \
 425              "=d" ((USItype) (w1))                                      \
 426            : "%0" ((USItype) (u)),                                      \
 427              "dmi" ((USItype) (v)))
 428 #define UMUL_TIME 45
 429 #define udiv_qrnnd(q, r, n1, n0, d) \
 430   __asm__ ("divu%.l %4,%1:%0"                                           \
 431            : "=d" ((USItype) (q)),                                      \
 432              "=d" ((USItype) (r))                                       \
 433            : "0" ((USItype) (n0)),                                      \
 434              "1" ((USItype) (n1)),                                      \
 435              "dmi" ((USItype) (d)))
 436 #define UDIV_TIME 90
 437 #define sdiv_qrnnd(q, r, n1, n0, d) \
 438   __asm__ ("divs%.l %4,%1:%0"                                           \
 439            : "=d" ((USItype) (q)),                                      \
 440              "=d" ((USItype) (r))                                       \
 441            : "0" ((USItype) (n0)),                                      \
 442              "1" ((USItype) (n1)),                                      \
 443              "dmi" ((USItype) (d)))
 444
 445 #else /* not mc68020 */
 446 #if defined(__mcoldfire__)
 447 #define umul_ppmm(xh, xl, a, b) \
 448   __asm__ ("| Inlined umul_ppmm\n"                                      \
 449            "    move%.l %2,%/d0\n"                                      \
 450            "    move%.l %3,%/d1\n"                                      \
 451            "    move%.l %/d0,%/d2\n"                                    \
 452            "    swap    %/d0\n"                                         \
 453            "    move%.l %/d1,%/d3\n"                                    \
 454            "    swap    %/d1\n"                                         \
 455            "    move%.w %/d2,%/d4\n"                                    \
 456            "    mulu    %/d3,%/d4\n"                                    \
 457            "    mulu    %/d1,%/d2\n"                                    \
 458            "    mulu    %/d0,%/d3\n"                                    \
 459            "    mulu    %/d0,%/d1\n"                                    \
 460            "    move%.l %/d4,%/d0\n"                                    \
 461            "    clr%.w  %/d0\n"                                         \
 462            "    swap    %/d0\n"                                         \
 463            "    add%.l  %/d0,%/d2\n"                                    \
 464            "    add%.l  %/d3,%/d2\n"                                    \
 465            "    jcc     1f\n"                                           \
 466            "    add%.l  %#65536,%/d1\n"                                 \
 467            "1:  swap    %/d2\n"                                         \
 468            "    moveq   %#0,%/d0\n"                                     \
 469            "    move%.w %/d2,%/d0\n"                                    \
 470            "    move%.w %/d4,%/d2\n"                                    \
 471            "    move%.l %/d2,%1\n"                                      \
 472            "    add%.l  %/d1,%/d0\n"                                    \
 473            "    move%.l %/d0,%0"                                        \
 474            : "=g" ((USItype) (xh)),                                     \
 475              "=g" ((USItype) (xl))                                      \
 476            : "g" ((USItype) (a)),                                       \
 477              "g" ((USItype) (b))                                        \
 478            : "d0", "d1", "d2", "d3", "d4")
 479 #define UMUL_TIME 100
 480 #define UDIV_TIME 400
 481 #else /* not ColdFire */
 482 /* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX.  */
 483 #define umul_ppmm(xh, xl, a, b) \
 484   __asm__ ("| Inlined umul_ppmm\n"                                      \
 485            "    move%.l %2,%/d0\n"                                      \
 486            "    move%.l %3,%/d1\n"                                      \
 487            "    move%.l %/d0,%/d2\n"                                    \
 488            "    swap    %/d0\n"                                         \
 489            "    move%.l %/d1,%/d3\n"                                    \
 490            "    swap    %/d1\n"                                         \
 491            "    move%.w %/d2,%/d4\n"                                    \
 492            "    mulu    %/d3,%/d4\n"                                    \
 493            "    mulu    %/d1,%/d2\n"                                    \
 494            "    mulu    %/d0,%/d3\n"                                    \
 495            "    mulu    %/d0,%/d1\n"                                    \
 496            "    move%.l %/d4,%/d0\n"                                    \
 497            "    eor%.w  %/d0,%/d0\n"                                    \
 498            "    swap    %/d0\n"                                         \
 499            "    add%.l  %/d0,%/d2\n"                                    \
 500            "    add%.l  %/d3,%/d2\n"                                    \
 501            "    jcc     1f\n"                                           \
 502            "    add%.l  %#65536,%/d1\n"                                 \
 503            "1:  swap    %/d2\n"                                         \
 504            "    moveq   %#0,%/d0\n"                                     \
 505            "    move%.w %/d2,%/d0\n"                                    \
 506            "    move%.w %/d4,%/d2\n"                                    \
 507            "    move%.l %/d2,%1\n"                                      \
 508            "    add%.l  %/d1,%/d0\n"                                    \
 509            "    move%.l %/d0,%0"                                        \
 510            : "=g" ((USItype) (xh)),                                     \
 511              "=g" ((USItype) (xl))                                      \
 512            : "g" ((USItype) (a)),                                       \
 513              "g" ((USItype) (b))                                        \
 514            : "d0", "d1", "d2", "d3", "d4")
 515 #define UMUL_TIME 100
 516 #define UDIV_TIME 400
 517 #endif /* not ColdFire */
 518 #endif /* not mc68020 */
 519
 520 /* The '020, '030, '040 and '060 have bitfield insns.
 521    cpu32 disguises as a 68020, but lacks them.  */
 522 #if ( defined (__mc68020__) || defined(mc68020) \
 523                 || defined(__mc68030__) || defined(mc68030) \
 524                 || defined(__mc68040__) || defined(mc68040) \
 525                 || defined(__mc68060__) || defined(mc68060) ) \
 526         && !defined(__mcpu32__)
 527 #define count_leading_zeros(count, x) \
 528   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
 529            : "=d" ((USItype) (count))                                   \
 530            : "od" ((USItype) (x)), "n" (0))
 531 #endif
 532 #endif /* mc68000 */
 533
 534 #if defined (__m88000__) && W_TYPE_SIZE == 32
 535 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 536   __asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3"                   \
 537            : "=r" ((USItype) (sh)),                                     \
 538              "=&r" ((USItype) (sl))                                     \
 539            : "%rJ" ((USItype) (ah)),                                    \
 540              "rJ" ((USItype) (bh)),                                     \
 541              "%rJ" ((USItype) (al)),                                    \
 542              "rJ" ((USItype) (bl)))
 543 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 544   __asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3"                   \
 545            : "=r" ((USItype) (sh)),                                     \
 546              "=&r" ((USItype) (sl))                                     \
 547            : "rJ" ((USItype) (ah)),                                     \
 548              "rJ" ((USItype) (bh)),                                     \
 549              "rJ" ((USItype) (al)),                                     \
 550              "rJ" ((USItype) (bl)))
 551 #define count_leading_zeros(count, x) \
 552   do {                                                                  \
 553     USItype __cbtmp;                                                    \
 554     __asm__ ("ff1 %0,%1"                                                \
 555              : "=r" (__cbtmp)                                           \
 556              : "r" ((USItype) (x)));                                    \
 557     (count) = __cbtmp ^ 31;                                             \
 558   } while (0)
 559 #define COUNT_LEADING_ZEROS_0 63 /* sic */
 560 #if defined (__mc88110__)
 561 #define umul_ppmm(wh, wl, u, v) \
 562   do {                                                                  \
 563     union {UDItype __ll;                                                \
 564            struct {USItype __h, __l;} __i;                              \
 565           } __xx;                                                       \
 566     __asm__ ("mulu.d    %0,%1,%2"                                       \
 567              : "=r" (__xx.__ll)                                         \
 568              : "r" ((USItype) (u)),                                     \
 569                "r" ((USItype) (v)));                                    \
 570     (wh) = __xx.__i.__h;                                                \
 571     (wl) = __xx.__i.__l;                                                \
 572   } while (0)
 573 #define udiv_qrnnd(q, r, n1, n0, d) \
 574   ({union {UDItype __ll;                                                \
 575            struct {USItype __h, __l;} __i;                              \
 576           } __xx;                                                       \
 577   USItype __q;                                                          \
 578   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 579   __asm__ ("divu.d %0,%1,%2"                                            \
 580            : "=r" (__q)                                                 \
 581            : "r" (__xx.__ll),                                           \
 582              "r" ((USItype) (d)));                                      \
 583   (r) = (n0) - __q * (d); (q) = __q; })
 584 #define UMUL_TIME 5
 585 #define UDIV_TIME 25
 586 #else
 587 #define UMUL_TIME 17
 588 #define UDIV_TIME 150
 589 #endif /* __mc88110__ */
 590 #endif /* __m88000__ */
 591
 592 #if defined (__mips__) && W_TYPE_SIZE == 32
 593 #define umul_ppmm(w1, w0, u, v) \
 594   __asm__ ("multu %2,%3"                                                \
 595            : "=l" ((USItype) (w0)),                                     \
 596              "=h" ((USItype) (w1))                                      \
 597            : "d" ((USItype) (u)),                                       \
 598              "d" ((USItype) (v)))
 599 #define UMUL_TIME 10
 600 #define UDIV_TIME 100
 601 #endif /* __mips__ */
 602
 603 #if defined (__ns32000__) && W_TYPE_SIZE == 32
 604 #define umul_ppmm(w1, w0, u, v) \
 605   ({union {UDItype __ll;                                                \
 606            struct {USItype __l, __h;} __i;                              \
 607           } __xx;                                                       \
 608   __asm__ ("meid %2,%0"                                                 \
 609            : "=g" (__xx.__ll)                                           \
 610            : "%0" ((USItype) (u)),                                      \
 611              "g" ((USItype) (v)));                                      \
 612   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 613 #define __umulsidi3(u, v) \
 614   ({UDItype __w;                                                        \
 615     __asm__ ("meid %2,%0"                                               \
 616              : "=g" (__w)                                               \
 617              : "%0" ((USItype) (u)),                                    \
 618                "g" ((USItype) (v)));                                    \
 619     __w; })
 620 #define udiv_qrnnd(q, r, n1, n0, d) \
 621   ({union {UDItype __ll;                                                \
 622            struct {USItype __l, __h;} __i;                              \
 623           } __xx;                                                       \
 624   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 625   __asm__ ("deid %2,%0"                                                 \
 626            : "=g" (__xx.__ll)                                           \
 627            : "0" (__xx.__ll),                                           \
 628              "g" ((USItype) (d)));                                      \
 629   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
 630 #define count_trailing_zeros(count,x) \
 631   do {                                                                  \
 632     __asm__ ("ffsd     %2,%0"                                           \
 633             : "=r" ((USItype) (count))                                  \
 634             : "0" ((USItype) 0),                                        \
 635               "r" ((USItype) (x)));                                     \
 636   } while (0)
 637 #endif /* __ns32000__ */
 638
 639 /* FIXME: We should test _IBMR2 here when we add assembly support for the
 640    system vendor compilers.
 641    FIXME: What's needed for gcc PowerPC VxWorks?  __vxworks__ is not good
 642    enough, since that hits ARM and m68k too.  */
 643 #if (defined (_ARCH_PPC)        /* AIX */                               \
 644      || defined (_ARCH_PWR)     /* AIX */                               \
 645      || defined (_ARCH_COM)     /* AIX */                               \
 646      || defined (__powerpc__)   /* gcc */                               \
 647      || defined (__POWERPC__)   /* BEOS */                              \
 648      || defined (__ppc__)       /* Darwin */                            \
 649      || defined (PPC)           /* GNU/Linux, SysV */                   \
 650      ) && W_TYPE_SIZE == 32
 651 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 652   do {                                                                  \
 653     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 654       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 655              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 656     else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)         \
 657       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 658              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 659     else                                                                \
 660       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 661              : "=r" (sh), "=&r" (sl)                                    \
 662              : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));              \
 663   } while (0)
 664 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 665   do {                                                                  \
 666     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 667       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 668                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 669     else if (__builtin_constant_p (ah) && (ah) == ~(USItype) 0)         \
 670       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 671                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 672     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 673       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 674                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 675     else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)         \
 676       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 677                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 678     else                                                                \
 679       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 680                : "=r" (sh), "=&r" (sl)                                  \
 681                : "r" (ah), "r" (bh), "rI" (al), "r" (bl));              \
 682   } while (0)
 683 #define count_leading_zeros(count, x) \
 684   __asm__ ("{cntlz|cntlzw} %0,%1" : "=r" (count) : "r" (x))
 685 #define COUNT_LEADING_ZEROS_0 32
 686 #if defined (_ARCH_PPC) || defined (__powerpc__) || defined (__POWERPC__) \
 687   || defined (__ppc__) || defined (PPC)
 688 #define umul_ppmm(ph, pl, m0, m1) \
 689   do {                                                                  \
 690     USItype __m0 = (m0), __m1 = (m1);                                   \
 691     __asm__ ("mulhwu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));      \
 692     (pl) = __m0 * __m1;                                                 \
 693   } while (0)
 694 #define UMUL_TIME 15
 695 #define smul_ppmm(ph, pl, m0, m1) \
 696   do {                                                                  \
 697     SItype __m0 = (m0), __m1 = (m1);                                    \
 698     __asm__ ("mulhw %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));       \
 699     (pl) = __m0 * __m1;                                                 \
 700   } while (0)
 701 #define SMUL_TIME 14
 702 #define UDIV_TIME 120
 703 #elif defined (_ARCH_PWR)
 704 #define UMUL_TIME 8
 705 #define smul_ppmm(xh, xl, m0, m1) \
 706   __asm__ ("mul %0,%2,%3" : "=r" (xh), "=q" (xl) : "r" (m0), "r" (m1))
 707 #define SMUL_TIME 4
 708 #define sdiv_qrnnd(q, r, nh, nl, d) \
 709   __asm__ ("div %0,%2,%4" : "=r" (q), "=q" (r) : "r" (nh), "1" (nl), "r" (d))
 710 #define UDIV_TIME 100
 711 #endif
 712 #endif /* 32-bit POWER architecture variants.  */
 713
 714 /* We should test _IBMR2 here when we add assembly support for the system
 715    vendor compilers.  */
 716 #if (defined (_ARCH_PPC64) || defined (__powerpc64__)) && W_TYPE_SIZE == 64
 717 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 718   do {                                                                  \
 719     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 720       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 721              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 722     else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0)         \
 723       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 724              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 725     else                                                                \
 726       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 727              : "=r" (sh), "=&r" (sl)                                    \
 728              : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));              \
 729   } while (0)
 730 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 731   do {                                                                  \
 732     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 733       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 734                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 735     else if (__builtin_constant_p (ah) && (ah) == ~(UDItype) 0)         \
 736       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 737                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 738     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 739       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 740                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 741     else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0)         \
 742       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 743                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 744     else                                                                \
 745       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 746                : "=r" (sh), "=&r" (sl)                                  \
 747                : "r" (ah), "r" (bh), "rI" (al), "r" (bl));              \
 748   } while (0)
 749 #define count_leading_zeros(count, x) \
 750   __asm__ ("cntlzd %0,%1" : "=r" (count) : "r" (x))
 751 #define COUNT_LEADING_ZEROS_0 64
 752 #define umul_ppmm(ph, pl, m0, m1) \
 753   do {                                                                  \
 754     UDItype __m0 = (m0), __m1 = (m1);                                   \
 755     __asm__ ("mulhdu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));      \
 756     (pl) = __m0 * __m1;                                                 \
 757   } while (0)
 758 #define UMUL_TIME 15
 759 #define smul_ppmm(ph, pl, m0, m1) \
 760   do {                                                                  \
 761     DItype __m0 = (m0), __m1 = (m1);                                    \
 762     __asm__ ("mulhd %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));       \
 763     (pl) = __m0 * __m1;                                                 \
 764   } while (0)
 765 #define SMUL_TIME 14  /* ??? */
 766 #define UDIV_TIME 120 /* ??? */
 767 #endif /* 64-bit PowerPC.  */
 768
 769 #if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
 770 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 771   __asm__ ("a %1,%5\n\tae %0,%3"                                        \
 772            : "=r" ((USItype) (sh)),                                     \
 773              "=&r" ((USItype) (sl))                                     \
 774            : "%0" ((USItype) (ah)),                                     \
 775              "r" ((USItype) (bh)),                                      \
 776              "%1" ((USItype) (al)),                                     \
 777              "r" ((USItype) (bl)))
 778 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 779   __asm__ ("s %1,%5\n\tse %0,%3"                                        \
 780            : "=r" ((USItype) (sh)),                                     \
 781              "=&r" ((USItype) (sl))                                     \
 782            : "0" ((USItype) (ah)),                                      \
 783              "r" ((USItype) (bh)),                                      \
 784              "1" ((USItype) (al)),                                      \
 785              "r" ((USItype) (bl)))
 786 #define umul_ppmm(ph, pl, m0, m1) \
 787   do {                                                                  \
 788     USItype __m0 = (m0), __m1 = (m1);                                   \
 789     __asm__ (                                                           \
 790        "s       r2,r2\n"                                                \
 791 "       mts     r10,%2\n"                                               \
 792 "       m       r2,%3\n"                                                \
 793 "       m       r2,%3\n"                                                \
 794 "       m       r2,%3\n"                                                \
 795 "       m       r2,%3\n"                                                \
 796 "       m       r2,%3\n"                                                \
 797 "       m       r2,%3\n"                                                \
 798 "       m       r2,%3\n"                                                \
 799 "       m       r2,%3\n"                                                \
 800 "       m       r2,%3\n"                                                \
 801 "       m       r2,%3\n"                                                \
 802 "       m       r2,%3\n"                                                \
 803 "       m       r2,%3\n"                                                \
 804 "       m       r2,%3\n"                                                \
 805 "       m       r2,%3\n"                                                \
 806 "       m       r2,%3\n"                                                \
 807 "       m       r2,%3\n"                                                \
 808 "       cas     %0,r2,r0\n"                                             \
 809 "       mfs     r10,%1"                                                 \
 810              : "=r" ((USItype) (ph)),                                   \
 811                "=r" ((USItype) (pl))                                    \
 812              : "%r" (__m0),                                             \
 813                 "r" (__m1)                                              \
 814              : "r2");                                                   \
 815     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
 816              + (((SItype) __m1 >> 31) & __m0));                         \
 817   } while (0)
 818 #define UMUL_TIME 20
 819 #define UDIV_TIME 200
 820 #define count_leading_zeros(count, x) \
 821   do {                                                                  \
 822     if ((x) >= 0x10000)                                                 \
 823       __asm__ ("clz     %0,%1"                                          \
 824                : "=r" ((USItype) (count))                               \
 825                : "r" ((USItype) (x) >> 16));                            \
 826     else                                                                \
 827       {                                                                 \
 828         __asm__ ("clz   %0,%1"                                          \
 829                  : "=r" ((USItype) (count))                             \
 830                  : "r" ((USItype) (x)));                                        \
 831         (count) += 16;                                                  \
 832       }                                                                 \
 833   } while (0)
 834 #endif
 835
 836 #if defined (__sh2__) && W_TYPE_SIZE == 32
 837 #define umul_ppmm(w1, w0, u, v) \
 838   __asm__ (                                                             \
 839        "dmulu.l %2,%3\n\tsts    macl,%1\n\tsts  mach,%0"                \
 840            : "=r" ((USItype)(w1)),                                      \
 841              "=r" ((USItype)(w0))                                       \
 842            : "r" ((USItype)(u)),                                        \
 843              "r" ((USItype)(v))                                         \
 844            : "macl", "mach")
 845 #define UMUL_TIME 5
 846 #endif
 847
 848 #if defined (__SH5__) && __SHMEDIA__ && W_TYPE_SIZE == 32
 849 #define __umulsidi3(u,v) ((UDItype)(USItype)u*(USItype)v)
 850 #define count_leading_zeros(count, x) \
 851   do                                                                    \
 852     {                                                                   \
 853       UDItype x_ = (USItype)(x);                                        \
 854       SItype c_;                                                        \
 855                                                                         \
 856       __asm__ ("nsb %1, %0" : "=r" (c_) : "r" (x_));                    \
 857       (count) = c_ - 31;                                                \
 858     }                                                                   \
 859   while (0)
 860 #define COUNT_LEADING_ZEROS_0 32
 861 #endif
 862
 863 #if defined (__sparc__) && !defined (__arch64__) && !defined (__sparcv9) \
 864     && W_TYPE_SIZE == 32
 865 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 866   __asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0"                          \
 867            : "=r" ((USItype) (sh)),                                     \
 868              "=&r" ((USItype) (sl))                                     \
 869            : "%rJ" ((USItype) (ah)),                                    \
 870              "rI" ((USItype) (bh)),                                     \
 871              "%rJ" ((USItype) (al)),                                    \
 872              "rI" ((USItype) (bl))                                      \
 873            __CLOBBER_CC)
 874 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 875   __asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0"                          \
 876            : "=r" ((USItype) (sh)),                                     \
 877              "=&r" ((USItype) (sl))                                     \
 878            : "rJ" ((USItype) (ah)),                                     \
 879              "rI" ((USItype) (bh)),                                     \
 880              "rJ" ((USItype) (al)),                                     \
 881              "rI" ((USItype) (bl))                                      \
 882            __CLOBBER_CC)
 883 #if defined (__sparc_v8__)
 884 #define umul_ppmm(w1, w0, u, v) \
 885   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
 886            : "=r" ((USItype) (w1)),                                     \
 887              "=r" ((USItype) (w0))                                      \
 888            : "r" ((USItype) (u)),                                       \
 889              "r" ((USItype) (v)))
 890 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
 891   __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
 892            : "=&r" ((USItype) (__q)),                                   \
 893              "=&r" ((USItype) (__r))                                    \
 894            : "r" ((USItype) (__n1)),                                    \
 895              "r" ((USItype) (__n0)),                                    \
 896              "r" ((USItype) (__d)))
 897 #else
 898 #if defined (__sparclite__)
 899 /* This has hardware multiply but not divide.  It also has two additional
 900    instructions scan (ffs from high bit) and divscc.  */
 901 #define umul_ppmm(w1, w0, u, v) \
 902   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
 903            : "=r" ((USItype) (w1)),                                     \
 904              "=r" ((USItype) (w0))                                      \
 905            : "r" ((USItype) (u)),                                       \
 906              "r" ((USItype) (v)))
 907 #define udiv_qrnnd(q, r, n1, n0, d) \
 908   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
 909 "       wr      %%g0,%2,%%y     ! Not a delayed write for sparclite\n"  \
 910 "       tst     %%g0\n"                                                 \
 911 "       divscc  %3,%4,%%g1\n"                                           \
 912 "       divscc  %%g1,%4,%%g1\n"                                         \
 913 "       divscc  %%g1,%4,%%g1\n"                                         \
 914 "       divscc  %%g1,%4,%%g1\n"                                         \
 915 "       divscc  %%g1,%4,%%g1\n"                                         \
 916 "       divscc  %%g1,%4,%%g1\n"                                         \
 917 "       divscc  %%g1,%4,%%g1\n"                                         \
 918 "       divscc  %%g1,%4,%%g1\n"                                         \
 919 "       divscc  %%g1,%4,%%g1\n"                                         \
 920 "       divscc  %%g1,%4,%%g1\n"                                         \
 921 "       divscc  %%g1,%4,%%g1\n"                                         \
 922 "       divscc  %%g1,%4,%%g1\n"                                         \
 923 "       divscc  %%g1,%4,%%g1\n"                                         \
 924 "       divscc  %%g1,%4,%%g1\n"                                         \
 925 "       divscc  %%g1,%4,%%g1\n"                                         \
 926 "       divscc  %%g1,%4,%%g1\n"                                         \
 927 "       divscc  %%g1,%4,%%g1\n"                                         \
 928 "       divscc  %%g1,%4,%%g1\n"                                         \
 929 "       divscc  %%g1,%4,%%g1\n"                                         \
 930 "       divscc  %%g1,%4,%%g1\n"                                         \
 931 "       divscc  %%g1,%4,%%g1\n"                                         \
 932 "       divscc  %%g1,%4,%%g1\n"                                         \
 933 "       divscc  %%g1,%4,%%g1\n"                                         \
 934 "       divscc  %%g1,%4,%%g1\n"                                         \
 935 "       divscc  %%g1,%4,%%g1\n"                                         \
 936 "       divscc  %%g1,%4,%%g1\n"                                         \
 937 "       divscc  %%g1,%4,%%g1\n"                                         \
 938 "       divscc  %%g1,%4,%%g1\n"                                         \
 939 "       divscc  %%g1,%4,%%g1\n"                                         \
 940 "       divscc  %%g1,%4,%%g1\n"                                         \
 941 "       divscc  %%g1,%4,%%g1\n"                                         \
 942 "       divscc  %%g1,%4,%0\n"                                           \
 943 "       rd      %%y,%1\n"                                               \
 944 "       bl,a 1f\n"                                                      \
 945 "       add     %1,%4,%1\n"                                             \
 946 "1:     ! End of inline udiv_qrnnd"                                     \
 947            : "=r" ((USItype) (q)),                                      \
 948              "=r" ((USItype) (r))                                       \
 949            : "r" ((USItype) (n1)),                                      \
 950              "r" ((USItype) (n0)),                                      \
 951              "rI" ((USItype) (d))                                       \
 952            : "g1" __AND_CLOBBER_CC)
 953 #define UDIV_TIME 37
 954 #define count_leading_zeros(count, x) \
 955   do {                                                                  \
 956   __asm__ ("scan %1,1,%0"                                               \
 957            : "=r" ((USItype) (count))                                   \
 958            : "r" ((USItype) (x)));                                      \
 959   } while (0)
 960 /* Early sparclites return 63 for an argument of 0, but they warn that future
 961    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
 962    undefined.  */
 963 #else
 964 /* SPARC without integer multiplication and divide instructions.
 965    (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */
 966 #define umul_ppmm(w1, w0, u, v) \
 967   __asm__ ("! Inlined umul_ppmm\n"                                      \
 968 "       wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr\n"\
 969 "       sra     %3,31,%%o5      ! Don't move this insn\n"               \
 970 "       and     %2,%%o5,%%o5    ! Don't move this insn\n"               \
 971 "       andcc   %%g0,0,%%g1     ! Don't move this insn\n"               \
 972 "       mulscc  %%g1,%3,%%g1\n"                                         \
 973 "       mulscc  %%g1,%3,%%g1\n"                                         \
 974 "       mulscc  %%g1,%3,%%g1\n"                                         \
 975 "       mulscc  %%g1,%3,%%g1\n"                                         \
 976 "       mulscc  %%g1,%3,%%g1\n"                                         \
 977 "       mulscc  %%g1,%3,%%g1\n"                                         \
 978 "       mulscc  %%g1,%3,%%g1\n"                                         \
 979 "       mulscc  %%g1,%3,%%g1\n"                                         \
 980 "       mulscc  %%g1,%3,%%g1\n"                                         \
 981 "       mulscc  %%g1,%3,%%g1\n"                                         \
 982 "       mulscc  %%g1,%3,%%g1\n"                                         \
 983 "       mulscc  %%g1,%3,%%g1\n"                                         \
 984 "       mulscc  %%g1,%3,%%g1\n"                                         \
 985 "       mulscc  %%g1,%3,%%g1\n"                                         \
 986 "       mulscc  %%g1,%3,%%g1\n"                                         \
 987 "       mulscc  %%g1,%3,%%g1\n"                                         \
 988 "       mulscc  %%g1,%3,%%g1\n"                                         \
 989 "       mulscc  %%g1,%3,%%g1\n"                                         \
 990 "       mulscc  %%g1,%3,%%g1\n"                                         \
 991 "       mulscc  %%g1,%3,%%g1\n"                                         \
 992 "       mulscc  %%g1,%3,%%g1\n"                                         \
 993 "       mulscc  %%g1,%3,%%g1\n"                                         \
 994 "       mulscc  %%g1,%3,%%g1\n"                                         \
 995 "       mulscc  %%g1,%3,%%g1\n"                                         \
 996 "       mulscc  %%g1,%3,%%g1\n"                                         \
 997 "       mulscc  %%g1,%3,%%g1\n"                                         \
 998 "       mulscc  %%g1,%3,%%g1\n"                                         \
 999 "       mulscc  %%g1,%3,%%g1\n"                                         \
1000 "       mulscc  %%g1,%3,%%g1\n"                                         \
1001 "       mulscc  %%g1,%3,%%g1\n"                                         \
1002 "       mulscc  %%g1,%3,%%g1\n"                                         \
1003 "       mulscc  %%g1,%3,%%g1\n"                                         \
1004 "       mulscc  %%g1,0,%%g1\n"                                          \
1005 "       add     %%g1,%%o5,%0\n"                                         \
1006 "       rd      %%y,%1"                                                 \
1007            : "=r" ((USItype) (w1)),                                     \
1008              "=r" ((USItype) (w0))                                      \
1009            : "%rI" ((USItype) (u)),                                     \
1010              "r" ((USItype) (v))                                                \
1011            : "g1", "o5" __AND_CLOBBER_CC)
1012 #define UMUL_TIME 39            /* 39 instructions */
1013 /* It's quite necessary to add this much assembler for the sparc.
1014    The default udiv_qrnnd (in C) is more than 10 times slower!  */
1015 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
1016   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
1017 "       mov     32,%%g1\n"                                              \
1018 "       subcc   %1,%2,%%g0\n"                                           \
1019 "1:     bcs     5f\n"                                                   \
1020 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
1021 "       sub     %1,%2,%1        ! this kills msb of n\n"                \
1022 "       addx    %1,%1,%1        ! so this can't give carry\n"           \
1023 "       subcc   %%g1,1,%%g1\n"                                          \
1024 "2:     bne     1b\n"                                                   \
1025 "        subcc  %1,%2,%%g0\n"                                           \
1026 "       bcs     3f\n"                                                   \
1027 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
1028 "       b       3f\n"                                                   \
1029 "        sub    %1,%2,%1        ! this kills msb of n\n"                \
1030 "4:     sub     %1,%2,%1\n"                                             \
1031 "5:     addxcc  %1,%1,%1\n"                                             \
1032 "       bcc     2b\n"                                                   \
1033 "        subcc  %%g1,1,%%g1\n"                                          \
1034 "! Got carry from n.  Subtract next step to cancel this carry.\n"       \
1035 "       bne     4b\n"                                                   \
1036 "        addcc  %0,%0,%0        ! shift n1n0 and a 0-bit in lsb\n"      \
1037 "       sub     %1,%2,%1\n"                                             \
1038 "3:     xnor    %0,0,%0\n"                                              \
1039 "       ! End of inline udiv_qrnnd"                                     \
1040            : "=&r" ((USItype) (__q)),                                   \
1041              "=&r" ((USItype) (__r))                                    \
1042            : "r" ((USItype) (__d)),                                     \
1043              "1" ((USItype) (__n1)),                                    \
1044              "0" ((USItype) (__n0)) : "g1" __AND_CLOBBER_CC)
1045 #define UDIV_TIME (3+7*32)      /* 7 instructions/iteration. 32 iterations.  */
1046 #endif /* __sparclite__ */
1047 #endif /* __sparc_v8__ */
1048 #endif /* sparc32 */
1049
1050 #if ((defined (__sparc__) && defined (__arch64__)) || defined (__sparcv9)) \
1051     && W_TYPE_SIZE == 64
1052 #define add_ssaaaa(sh, sl, ah, al, bh, bl)                              \
1053   __asm__ ("addcc %r4,%5,%1\n\t"                                        \
1054            "add %r2,%3,%0\n\t"                                          \
1055            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1056            "add %0, 1, %0\n"                                            \
1057            "1:"                                                         \
1058            : "=r" ((UDItype)(sh)),                                      \
1059              "=&r" ((UDItype)(sl))                                      \
1060            : "%rJ" ((UDItype)(ah)),                                     \
1061              "rI" ((UDItype)(bh)),                                      \
1062              "%rJ" ((UDItype)(al)),                                     \
1063              "rI" ((UDItype)(bl))                                       \
1064            __CLOBBER_CC)
1065
1066 #define sub_ddmmss(sh, sl, ah, al, bh, bl)                              \
1067   __asm__ ("subcc %r4,%5,%1\n\t"                                        \
1068            "sub %r2,%3,%0\n\t"                                          \
1069            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1070            "sub %0, 1, %0\n\t"                                          \
1071            "1:"                                                         \
1072            : "=r" ((UDItype)(sh)),                                      \
1073              "=&r" ((UDItype)(sl))                                      \
1074            : "rJ" ((UDItype)(ah)),                                      \
1075              "rI" ((UDItype)(bh)),                                      \
1076              "rJ" ((UDItype)(al)),                                      \
1077              "rI" ((UDItype)(bl))                                       \
1078            __CLOBBER_CC)
1079
1080 #define umul_ppmm(wh, wl, u, v)                                         \
1081   do {                                                                  \
1082           UDItype tmp1, tmp2, tmp3, tmp4;                               \
1083           __asm__ __volatile__ (                                        \
1084                    "srl %7,0,%3\n\t"                                    \
1085                    "mulx %3,%6,%1\n\t"                                  \
1086                    "srlx %6,32,%2\n\t"                                  \
1087                    "mulx %2,%3,%4\n\t"                                  \
1088                    "sllx %4,32,%5\n\t"                                  \
1089                    "srl %6,0,%3\n\t"                                    \
1090                    "sub %1,%5,%5\n\t"                                   \
1091                    "srlx %5,32,%5\n\t"                                  \
1092                    "addcc %4,%5,%4\n\t"                                 \
1093                    "srlx %7,32,%5\n\t"                                  \
1094                    "mulx %3,%5,%3\n\t"                                  \
1095                    "mulx %2,%5,%5\n\t"                                  \
1096                    "sethi %%hi(0x80000000),%2\n\t"                      \
1097                    "addcc %4,%3,%4\n\t"                                 \
1098                    "srlx %4,32,%4\n\t"                                  \
1099                    "add %2,%2,%2\n\t"                                   \
1100                    "movcc %%xcc,%%g0,%2\n\t"                            \
1101                    "addcc %5,%4,%5\n\t"                                 \
1102                    "sllx %3,32,%3\n\t"                                  \
1103                    "add %1,%3,%1\n\t"                                   \
1104                    "add %5,%2,%0"                                       \
1105            : "=r" ((UDItype)(wh)),                                      \
1106              "=&r" ((UDItype)(wl)),                                     \
1107              "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4)     \
1108            : "r" ((UDItype)(u)),                                        \
1109              "r" ((UDItype)(v))                                         \
1110            __CLOBBER_CC);                                               \
1111   } while (0)
1112 #define UMUL_TIME 96
1113 #define UDIV_TIME 230
1114 #endif /* sparc64 */
1115
1116 #if defined (__vax__) && W_TYPE_SIZE == 32
1117 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1118   __asm__ ("addl2 %5,%1\n\tadwc %3,%0"                                  \
1119            : "=g" ((USItype) (sh)),                                     \
1120              "=&g" ((USItype) (sl))                                     \
1121            : "%0" ((USItype) (ah)),                                     \
1122              "g" ((USItype) (bh)),                                      \
1123              "%1" ((USItype) (al)),                                     \
1124              "g" ((USItype) (bl)))
1125 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1126   __asm__ ("subl2 %5,%1\n\tsbwc %3,%0"                                  \
1127            : "=g" ((USItype) (sh)),                                     \
1128              "=&g" ((USItype) (sl))                                     \
1129            : "0" ((USItype) (ah)),                                      \
1130              "g" ((USItype) (bh)),                                      \
1131              "1" ((USItype) (al)),                                      \
1132              "g" ((USItype) (bl)))
1133 #define umul_ppmm(xh, xl, m0, m1) \
1134   do {                                                                  \
1135     union {                                                             \
1136         UDItype __ll;                                                   \
1137         struct {USItype __l, __h;} __i;                                 \
1138       } __xx;                                                           \
1139     USItype __m0 = (m0), __m1 = (m1);                                   \
1140     __asm__ ("emul %1,%2,$0,%0"                                         \
1141              : "=r" (__xx.__ll)                                         \
1142              : "g" (__m0),                                              \
1143                "g" (__m1));                                             \
1144     (xh) = __xx.__i.__h;                                                \
1145     (xl) = __xx.__i.__l;                                                \
1146     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1147              + (((SItype) __m1 >> 31) & __m0));                         \
1148   } while (0)
1149 #define sdiv_qrnnd(q, r, n1, n0, d) \
1150   do {                                                                  \
1151     union {DItype __ll;                                                 \
1152            struct {SItype __l, __h;} __i;                               \
1153           } __xx;                                                       \
1154     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1155     __asm__ ("ediv %3,%2,%0,%1"                                         \
1156              : "=g" (q), "=g" (r)                                       \
1157              : "g" (__xx.__ll), "g" (d));                               \
1158   } while (0)
1159 #endif /* __vax__ */
1160
1161 #if defined (__z8000__) && W_TYPE_SIZE == 16
1162 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1163   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1164            : "=r" ((unsigned int)(sh)),                                 \
1165              "=&r" ((unsigned int)(sl))                                 \
1166            : "%0" ((unsigned int)(ah)),                                 \
1167              "r" ((unsigned int)(bh)),                                  \
1168              "%1" ((unsigned int)(al)),                                 \
1169              "rQR" ((unsigned int)(bl)))
1170 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1171   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1172            : "=r" ((unsigned int)(sh)),                                 \
1173              "=&r" ((unsigned int)(sl))                                 \
1174            : "0" ((unsigned int)(ah)),                                  \
1175              "r" ((unsigned int)(bh)),                                  \
1176              "1" ((unsigned int)(al)),                                  \
1177              "rQR" ((unsigned int)(bl)))
1178 #define umul_ppmm(xh, xl, m0, m1) \
1179   do {                                                                  \
1180     union {long int __ll;                                               \
1181            struct {unsigned int __h, __l;} __i;                         \
1182           } __xx;                                                       \
1183     unsigned int __m0 = (m0), __m1 = (m1);                              \
1184     __asm__ ("mult      %S0,%H3"                                        \
1185              : "=r" (__xx.__i.__h),                                     \
1186                "=r" (__xx.__i.__l)                                      \
1187              : "%1" (__m0),                                             \
1188                "rQR" (__m1));                                           \
1189     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1190     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1191              + (((signed int) __m1 >> 15) & __m0));                     \
1192   } while (0)
1193 #endif /* __z8000__ */
1194
1195 #endif /* __GNUC__ */
1196
1197 /* If this machine has no inline assembler, use C macros.  */
1198
1199 #if !defined (add_ssaaaa)
1200 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1201   do {                                                                  \
1202     UWtype __x;                                                         \
1203     __x = (al) + (bl);                                                  \
1204     (sh) = (ah) + (bh) + (__x < (al));                                  \
1205     (sl) = __x;                                                         \
1206   } while (0)
1207 #endif
1208
1209 #if !defined (sub_ddmmss)
1210 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1211   do {                                                                  \
1212     UWtype __x;                                                         \
1213     __x = (al) - (bl);                                                  \
1214     (sh) = (ah) - (bh) - (__x > (al));                                  \
1215     (sl) = __x;                                                         \
1216   } while (0)
1217 #endif
1218
1219 /* If we lack umul_ppmm but have smul_ppmm, define umul_ppmm in terms of
1220    smul_ppmm.  */
1221 #if !defined (umul_ppmm) && defined (smul_ppmm)
1222 #define umul_ppmm(w1, w0, u, v)                                         \
1223   do {                                                                  \
1224     UWtype __w1;                                                        \
1225     UWtype __xm0 = (u), __xm1 = (v);                                    \
1226     smul_ppmm (__w1, w0, __xm0, __xm1);                                 \
1227     (w1) = __w1 + (-(__xm0 >> (W_TYPE_SIZE - 1)) & __xm1)               \
1228                 + (-(__xm1 >> (W_TYPE_SIZE - 1)) & __xm0);              \
1229   } while (0)
1230 #endif
1231
1232 /* If we still don't have umul_ppmm, define it using plain C.  */
1233 #if !defined (umul_ppmm)
1234 #define umul_ppmm(w1, w0, u, v)                                         \
1235   do {                                                                  \
1236     UWtype __x0, __x1, __x2, __x3;                                      \
1237     UHWtype __ul, __vl, __uh, __vh;                                     \
1238                                                                         \
1239     __ul = __ll_lowpart (u);                                            \
1240     __uh = __ll_highpart (u);                                           \
1241     __vl = __ll_lowpart (v);                                            \
1242     __vh = __ll_highpart (v);                                           \
1243                                                                         \
1244     __x0 = (UWtype) __ul * __vl;                                        \
1245     __x1 = (UWtype) __ul * __vh;                                        \
1246     __x2 = (UWtype) __uh * __vl;                                        \
1247     __x3 = (UWtype) __uh * __vh;                                        \
1248                                                                         \
1249     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1250     __x1 += __x2;               /* but this indeed can */               \
1251     if (__x1 < __x2)            /* did we get it? */                    \
1252       __x3 += __ll_B;           /* yes, add it in the proper pos.  */   \
1253                                                                         \
1254     (w1) = __x3 + __ll_highpart (__x1);                                 \
1255     (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0);          \
1256   } while (0)
1257 #endif
1258
1259 #if !defined (__umulsidi3)
1260 #define __umulsidi3(u, v) \
1261   ({DWunion __w;                                                        \
1262     umul_ppmm (__w.s.high, __w.s.low, u, v);                            \
1263     __w.ll; })
1264 #endif
1265
1266 /* Define this unconditionally, so it can be used for debugging.  */
1267 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1268   do {                                                                  \
1269     UWtype __d1, __d0, __q1, __q0;                                      \
1270     UWtype __r1, __r0, __m;                                             \
1271     __d1 = __ll_highpart (d);                                           \
1272     __d0 = __ll_lowpart (d);                                            \
1273                                                                         \
1274     __r1 = (n1) % __d1;                                                 \
1275     __q1 = (n1) / __d1;                                                 \
1276     __m = (UWtype) __q1 * __d0;                                         \
1277     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1278     if (__r1 < __m)                                                     \
1279       {                                                                 \
1280         __q1--, __r1 += (d);                                            \
1281         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1282           if (__r1 < __m)                                               \
1283             __q1--, __r1 += (d);                                        \
1284       }                                                                 \
1285     __r1 -= __m;                                                        \
1286                                                                         \
1287     __r0 = __r1 % __d1;                                                 \
1288     __q0 = __r1 / __d1;                                                 \
1289     __m = (UWtype) __q0 * __d0;                                         \
1290     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1291     if (__r0 < __m)                                                     \
1292       {                                                                 \
1293         __q0--, __r0 += (d);                                            \
1294         if (__r0 >= (d))                                                \
1295           if (__r0 < __m)                                               \
1296             __q0--, __r0 += (d);                                        \
1297       }                                                                 \
1298     __r0 -= __m;                                                        \
1299                                                                         \
1300     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1301     (r) = __r0;                                                         \
1302   } while (0)
1303
1304 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1305    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1306 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1307 #define udiv_qrnnd(q, r, nh, nl, d) \
1308   do {                                                                  \
1309     USItype __r;                                                        \
1310     (q) = __udiv_w_sdiv (&__r, nh, nl, d);                              \
1311     (r) = __r;                                                          \
1312   } while (0)
1313 #endif
1314
1315 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1316 #if !defined (udiv_qrnnd)
1317 #define UDIV_NEEDS_NORMALIZATION 1
1318 #define udiv_qrnnd __udiv_qrnnd_c
1319 #endif
1320
1321 #if !defined (count_leading_zeros)
1322 extern const UQItype __clz_tab[] ATTRIBUTE_HIDDEN;
1323 #define count_leading_zeros(count, x) \
1324   do {                                                                  \
1325     UWtype __xr = (x);                                                  \
1326     UWtype __a;                                                         \
1327                                                                         \
1328     if (W_TYPE_SIZE <= 32)                                              \
1329       {                                                                 \
1330         __a = __xr < ((UWtype)1<<2*__BITS4)                             \
1331           ? (__xr < ((UWtype)1<<__BITS4) ? 0 : __BITS4)                 \
1332           : (__xr < ((UWtype)1<<3*__BITS4) ?  2*__BITS4 : 3*__BITS4);   \
1333       }                                                                 \
1334     else                                                                \
1335       {                                                                 \
1336         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1337           if (((__xr >> __a) & 0xff) != 0)                              \
1338             break;                                                      \
1339       }                                                                 \
1340                                                                         \
1341     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1342   } while (0)
1343 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1344 #endif
1345
1346 #if !defined (count_trailing_zeros)
1347 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1348    defined in asm, but if it is not, the C version above is good enough.  */
1349 #define count_trailing_zeros(count, x) \
1350   do {                                                                  \
1351     UWtype __ctz_x = (x);                                               \
1352     UWtype __ctz_c;                                                     \
1353     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1354     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1355   } while (0)
1356 #endif
1357
1358 #ifndef UDIV_NEEDS_NORMALIZATION
1359 #define UDIV_NEEDS_NORMALIZATION 0
1360 #endif