2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.111 2007/01/07 00:39:15 dillon Exp $
43 #include "use_ether.h"
46 #include "opt_atalk.h"
47 #include "opt_compat.h"
50 #include "opt_directio.h"
53 #include "opt_maxmem.h"
54 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
57 #include "opt_userconfig.h"
59 #include <sys/param.h>
60 #include <sys/systm.h>
61 #include <sys/sysproto.h>
62 #include <sys/signalvar.h>
63 #include <sys/kernel.h>
64 #include <sys/linker.h>
65 #include <sys/malloc.h>
68 #include <sys/reboot.h>
70 #include <sys/msgbuf.h>
71 #include <sys/sysent.h>
72 #include <sys/sysctl.h>
73 #include <sys/vmmeter.h>
75 #include <sys/upcall.h>
76 #include <sys/usched.h>
80 #include <vm/vm_param.h>
82 #include <vm/vm_kern.h>
83 #include <vm/vm_object.h>
84 #include <vm/vm_page.h>
85 #include <vm/vm_map.h>
86 #include <vm/vm_pager.h>
87 #include <vm/vm_extern.h>
89 #include <sys/thread2.h>
97 #include <machine/cpu.h>
98 #include <machine/clock.h>
99 #include <machine/specialreg.h>
100 #include <machine/bootinfo.h>
101 #include <machine/md_var.h>
102 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
103 #include <machine/globaldata.h> /* CPU_prvspace */
104 #include <machine/smp.h>
106 #include <machine/perfmon.h>
108 #include <machine/cputypes.h>
111 #include <bus/isa/i386/isa_device.h>
113 #include <machine_base/isa/intr_machdep.h>
114 #include <bus/isa/rtc.h>
115 #include <machine/vm86.h>
116 #include <sys/random.h>
117 #include <sys/ptrace.h>
118 #include <machine/sigframe.h>
120 #define PHYSMAP_ENTRIES 10
122 extern void init386 (int first);
123 extern void dblfault_handler (void);
125 extern void printcpuinfo(void); /* XXX header file */
126 extern void finishidentcpu(void);
127 extern void panicifcpuunsupported(void);
128 extern void initializecpu(void);
130 static void cpu_startup (void *);
131 #ifndef CPU_DISABLE_SSE
132 static void set_fpregs_xmm (struct save87 *, struct savexmm *);
133 static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
134 #endif /* CPU_DISABLE_SSE */
136 extern void ffs_rawread_setup(void);
137 #endif /* DIRECTIO */
138 static void init_locks(void);
140 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
142 int _udatasel, _ucodesel;
145 int64_t tsc_offsets[MAXCPU];
147 int64_t tsc_offsets[1];
150 #if defined(SWTCH_OPTIM_STATS)
151 extern int swtch_optim_stats;
152 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
153 CTLFLAG_RD, &swtch_optim_stats, 0, "");
154 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
155 CTLFLAG_RD, &tlb_flush_count, 0, "");
161 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
163 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
167 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
168 0, 0, sysctl_hw_physmem, "IU", "");
171 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
173 int error = sysctl_handle_int(oidp, 0,
174 ctob(physmem - vmstats.v_wire_count), req);
178 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
179 0, 0, sysctl_hw_usermem, "IU", "");
182 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
184 int error = sysctl_handle_int(oidp, 0,
185 i386_btop(avail_end - avail_start), req);
189 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
190 0, 0, sysctl_hw_availpages, "I", "");
193 sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
197 /* Unwind the buffer, so that it's linear (possibly starting with
198 * some initial nulls).
200 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
201 msgbufp->msg_size-msgbufp->msg_bufr,req);
202 if(error) return(error);
203 if(msgbufp->msg_bufr>0) {
204 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
205 msgbufp->msg_bufr,req);
210 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
211 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
213 static int msgbuf_clear;
216 sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
219 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
221 if (!error && req->newptr) {
222 /* Clear the buffer and reset write pointer */
223 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
224 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
230 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
231 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
232 "Clear kernel message buffer");
234 vm_paddr_t Maxmem = 0;
236 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
238 static vm_offset_t buffer_sva, buffer_eva;
239 vm_offset_t clean_sva, clean_eva;
240 static vm_offset_t pager_sva, pager_eva;
241 static struct trapframe proc0_tf;
244 cpu_startup(void *dummy)
250 vm_offset_t firstaddr;
252 if (boothowto & RB_VERBOSE)
256 * Good {morning,afternoon,evening,night}.
258 kprintf("%s", version);
261 panicifcpuunsupported();
265 kprintf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
267 * Display any holes after the first chunk of extended memory.
272 kprintf("Physical memory chunk(s):\n");
273 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
274 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
276 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
277 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
283 * Allocate space for system data structures.
284 * The first available kernel virtual address is in "v".
285 * As pages of kernel virtual memory are allocated, "v" is incremented.
286 * As pages of memory are allocated and cleared,
287 * "firstaddr" is incremented.
288 * An index into the kernel page table corresponding to the
289 * virtual memory address maintained in "v" is kept in "mapaddr".
293 * Make two passes. The first pass calculates how much memory is
294 * needed and allocates it. The second pass assigns virtual
295 * addresses to the various data structures.
299 v = (caddr_t)firstaddr;
301 #define valloc(name, type, num) \
302 (name) = (type *)v; v = (caddr_t)((name)+(num))
303 #define valloclim(name, type, num, lim) \
304 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
307 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
308 * For the first 64MB of ram nominally allocate sufficient buffers to
309 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
310 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
311 * the buffer cache we limit the eventual kva reservation to
314 * factor represents the 1/4 x ram conversion.
317 int factor = 4 * BKVASIZE / 1024;
318 int kbytes = physmem * (PAGE_SIZE / 1024);
322 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
324 nbuf += (kbytes - 65536) * 2 / (factor * 5);
325 if (maxbcache && nbuf > maxbcache / BKVASIZE)
326 nbuf = maxbcache / BKVASIZE;
330 * Do not allow the buffer_map to be more then 1/2 the size of the
333 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
334 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
335 kprintf("Warning: nbufs capped at %d\n", nbuf);
338 nswbuf = max(min(nbuf/4, 256), 16);
340 if (nswbuf < NSWBUF_MIN)
347 valloc(swbuf, struct buf, nswbuf);
348 valloc(buf, struct buf, nbuf);
351 * End of first pass, size has been calculated so allocate memory
353 if (firstaddr == 0) {
354 size = (vm_size_t)(v - firstaddr);
355 firstaddr = kmem_alloc(&kernel_map, round_page(size));
357 panic("startup: no room for tables");
362 * End of second pass, addresses have been assigned
364 if ((vm_size_t)(v - firstaddr) != size)
365 panic("startup: table size inconsistency");
367 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
368 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
369 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
371 buffer_map.system_map = 1;
372 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
373 (nswbuf*MAXPHYS) + pager_map_size);
374 pager_map.system_map = 1;
375 kmem_suballoc(&kernel_map, &exec_map, &minaddr, &maxaddr,
376 (16*(ARG_MAX+(PAGE_SIZE*3))));
378 #if defined(USERCONFIG)
380 cninit(); /* the preferred console may have changed */
383 kprintf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
384 ptoa(vmstats.v_free_count) / 1024);
387 * Set up buffers, so they can be used to read disk labels.
390 vm_pager_bufferinit();
394 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
396 mp_start(); /* fire up the APs and APICs */
403 * Send an interrupt to process.
405 * Stack is set up to allow sigcode stored
406 * at top to call routine, followed by kcall
407 * to sigreturn routine below. After sigreturn
408 * resets the signal mask, the stack, and the
409 * frame pointer, it returns to the user
413 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
415 struct lwp *lp = curthread->td_lwp;
416 struct proc *p = lp->lwp_proc;
417 struct trapframe *regs;
418 struct sigacts *psp = p->p_sigacts;
419 struct sigframe sf, *sfp;
422 regs = lp->lwp_md.md_regs;
423 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
425 /* save user context */
426 bzero(&sf, sizeof(struct sigframe));
427 sf.sf_uc.uc_sigmask = *mask;
428 sf.sf_uc.uc_stack = lp->lwp_sigstk;
429 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
430 sf.sf_uc.uc_mcontext.mc_gs = rgs();
431 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
433 /* Allocate and validate space for the signal handler context. */
435 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
436 SIGISMEMBER(psp->ps_sigonstack, sig)) {
437 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
438 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
439 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
442 sfp = (struct sigframe *)regs->tf_esp - 1;
444 /* Translate the signal is appropriate */
445 if (p->p_sysent->sv_sigtbl) {
446 if (sig <= p->p_sysent->sv_sigsize)
447 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
450 /* Build the argument list for the signal handler. */
452 sf.sf_ucontext = (register_t)&sfp->sf_uc;
453 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
454 /* Signal handler installed with SA_SIGINFO. */
455 sf.sf_siginfo = (register_t)&sfp->sf_si;
456 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
458 /* fill siginfo structure */
459 sf.sf_si.si_signo = sig;
460 sf.sf_si.si_code = code;
461 sf.sf_si.si_addr = (void*)regs->tf_err;
464 /* Old FreeBSD-style arguments. */
465 sf.sf_siginfo = code;
466 sf.sf_addr = regs->tf_err;
467 sf.sf_ahu.sf_handler = catcher;
471 * If we're a vm86 process, we want to save the segment registers.
472 * We also change eflags to be our emulated eflags, not the actual
475 if (regs->tf_eflags & PSL_VM) {
476 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
477 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
479 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
480 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
481 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
482 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
484 if (vm86->vm86_has_vme == 0)
485 sf.sf_uc.uc_mcontext.mc_eflags =
486 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
487 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
490 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
491 * syscalls made by the signal handler. This just avoids
492 * wasting time for our lazy fixup of such faults. PSL_NT
493 * does nothing in vm86 mode, but vm86 programs can set it
494 * almost legitimately in probes for old cpu types.
496 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
500 * Copy the sigframe out to the user's stack.
502 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
504 * Something is wrong with the stack pointer.
505 * ...Kill the process.
510 regs->tf_esp = (int)sfp;
511 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
512 regs->tf_eflags &= ~PSL_T;
513 regs->tf_cs = _ucodesel;
514 regs->tf_ds = _udatasel;
515 regs->tf_es = _udatasel;
518 * Allow the signal handler to inherit %fs in addition to %gs as
519 * the userland program might be using both
521 /*regs->tf_fs = _udatasel;*/
522 regs->tf_ss = _udatasel;
526 * Sanitize the trapframe for a virtual kernel passing control to a custom
529 * Allow userland to set or maintain PSL_RF, the resume flag. This flag
530 * basically controls whether the return PC should skip the first instruction
531 * (as in an explicit system call) or re-execute it (as in an exception).
534 cpu_sanitize_frame(struct trapframe *frame)
536 frame->tf_cs = _ucodesel;
537 frame->tf_ds = _udatasel;
538 frame->tf_es = _udatasel;
539 frame->tf_fs = _udatasel;
540 frame->tf_ss = _udatasel;
541 frame->tf_eflags &= (PSL_USER | PSL_RF);
542 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
547 * sigreturn(ucontext_t *sigcntxp)
549 * System call to cleanup state after a signal
550 * has been taken. Reset signal mask and
551 * stack state from context left by sendsig (above).
552 * Return to previous pc and psl as specified by
553 * context left by sendsig. Check carefully to
554 * make sure that the user has not modified the
555 * state to gain improper privileges.
557 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
558 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
561 sys_sigreturn(struct sigreturn_args *uap)
563 struct lwp *lp = curthread->td_lwp;
564 struct trapframe *regs;
570 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
573 regs = lp->lwp_md.md_regs;
574 eflags = ucp->uc_mcontext.mc_eflags;
576 if (eflags & PSL_VM) {
577 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
578 struct vm86_kernel *vm86;
581 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
582 * set up the vm86 area, and we can't enter vm86 mode.
584 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
586 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
587 if (vm86->vm86_inited == 0)
590 /* go back to user mode if both flags are set */
591 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
592 trapsignal(lp->lwp_proc, SIGBUS, 0);
594 if (vm86->vm86_has_vme) {
595 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
596 (eflags & VME_USERCHANGE) | PSL_VM;
598 vm86->vm86_eflags = eflags; /* save VIF, VIP */
599 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
601 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
602 tf->tf_eflags = eflags;
603 tf->tf_vm86_ds = tf->tf_ds;
604 tf->tf_vm86_es = tf->tf_es;
605 tf->tf_vm86_fs = tf->tf_fs;
606 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
607 tf->tf_ds = _udatasel;
608 tf->tf_es = _udatasel;
609 tf->tf_fs = _udatasel;
612 * Don't allow users to change privileged or reserved flags.
615 * XXX do allow users to change the privileged flag PSL_RF.
616 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
617 * should sometimes set it there too. tf_eflags is kept in
618 * the signal context during signal handling and there is no
619 * other place to remember it, so the PSL_RF bit may be
620 * corrupted by the signal handler without us knowing.
621 * Corruption of the PSL_RF bit at worst causes one more or
622 * one less debugger trap, so allowing it is fairly harmless.
624 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
625 kprintf("sigreturn: eflags = 0x%x\n", eflags);
630 * Don't allow users to load a valid privileged %cs. Let the
631 * hardware check for invalid selectors, excess privilege in
632 * other selectors, invalid %eip's and invalid %esp's.
634 cs = ucp->uc_mcontext.mc_cs;
635 if (!CS_SECURE(cs)) {
636 kprintf("sigreturn: cs = 0x%x\n", cs);
637 trapsignal(lp->lwp_proc, SIGBUS, T_PROTFLT);
640 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
643 if (ucp->uc_mcontext.mc_onstack & 1)
644 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
646 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
648 lp->lwp_sigmask = ucp->uc_sigmask;
649 SIG_CANTMASK(lp->lwp_sigmask);
654 * Stack frame on entry to function. %eax will contain the function vector,
655 * %ecx will contain the function data. flags, ecx, and eax will have
656 * already been pushed on the stack.
667 sendupcall(struct vmupcall *vu, int morepending)
669 struct lwp *lp = curthread->td_lwp;
670 struct trapframe *regs;
671 struct upcall upcall;
672 struct upc_frame upc_frame;
676 * Get the upcall data structure
678 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
679 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
682 kprintf("bad upcall address\n");
687 * If the data structure is already marked pending or has a critical
688 * section count, mark the data structure as pending and return
689 * without doing an upcall. vu_pending is left set.
691 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
692 if (upcall.upc_pending < vu->vu_pending) {
693 upcall.upc_pending = vu->vu_pending;
694 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
695 sizeof(upcall.upc_pending));
701 * We can run this upcall now, clear vu_pending.
703 * Bump our critical section count and set or clear the
704 * user pending flag depending on whether more upcalls are
705 * pending. The user will be responsible for calling
706 * upc_dispatch(-1) to process remaining upcalls.
709 upcall.upc_pending = morepending;
710 crit_count += TDPRI_CRIT;
711 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
712 sizeof(upcall.upc_pending));
713 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
717 * Construct a stack frame and issue the upcall
719 regs = lp->lwp_md.md_regs;
720 upc_frame.eax = regs->tf_eax;
721 upc_frame.ecx = regs->tf_ecx;
722 upc_frame.edx = regs->tf_edx;
723 upc_frame.flags = regs->tf_eflags;
724 upc_frame.oldip = regs->tf_eip;
725 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
726 sizeof(upc_frame)) != 0) {
727 kprintf("bad stack on upcall\n");
729 regs->tf_eax = (register_t)vu->vu_func;
730 regs->tf_ecx = (register_t)vu->vu_data;
731 regs->tf_edx = (register_t)lp->lwp_upcall;
732 regs->tf_eip = (register_t)vu->vu_ctx;
733 regs->tf_esp -= sizeof(upc_frame);
738 * fetchupcall occurs in the context of a system call, which means that
739 * we have to return EJUSTRETURN in order to prevent eax and edx from
740 * being overwritten by the syscall return value.
742 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
743 * and the function pointer in %eax.
746 fetchupcall (struct vmupcall *vu, int morepending, void *rsp)
748 struct upc_frame upc_frame;
749 struct lwp *lp = curthread->td_lwp;
750 struct trapframe *regs;
752 struct upcall upcall;
755 regs = lp->lwp_md.md_regs;
757 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
761 * This jumps us to the next ready context.
764 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
767 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
768 crit_count += TDPRI_CRIT;
770 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
771 regs->tf_eax = (register_t)vu->vu_func;
772 regs->tf_ecx = (register_t)vu->vu_data;
773 regs->tf_edx = (register_t)lp->lwp_upcall;
774 regs->tf_eip = (register_t)vu->vu_ctx;
775 regs->tf_esp = (register_t)rsp;
778 * This returns us to the originally interrupted code.
780 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
781 regs->tf_eax = upc_frame.eax;
782 regs->tf_ecx = upc_frame.ecx;
783 regs->tf_edx = upc_frame.edx;
784 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
785 (upc_frame.flags & PSL_USERCHANGE);
786 regs->tf_eip = upc_frame.oldip;
787 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
796 * Machine dependent boot() routine
798 * I haven't seen anything to put here yet
799 * Possibly some stuff might be grafted back here from boot()
807 * Shutdown the CPU as much as possible
813 __asm__ __volatile("hlt");
817 * cpu_idle() represents the idle LWKT. You cannot return from this function
818 * (unless you want to blow things up!). Instead we look for runnable threads
819 * and loop or halt as appropriate. Giant is not held on entry to the thread.
821 * The main loop is entered with a critical section held, we must release
822 * the critical section before doing anything else. lwkt_switch() will
823 * check for pending interrupts due to entering and exiting its own
826 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
827 * to wake a HLTed cpu up. However, there are cases where the idlethread
828 * will be entered with the possibility that no IPI will occur and in such
829 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
831 static int cpu_idle_hlt = 1;
832 static int cpu_idle_hltcnt;
833 static int cpu_idle_spincnt;
834 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
835 &cpu_idle_hlt, 0, "Idle loop HLT enable");
836 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
837 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
838 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
839 &cpu_idle_spincnt, 0, "Idle loop entry spins");
842 cpu_idle_default_hook(void)
845 * We must guarentee that hlt is exactly the instruction
848 __asm __volatile("sti; hlt");
851 /* Other subsystems (e.g., ACPI) can hook this later. */
852 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
857 struct thread *td = curthread;
860 KKASSERT(td->td_pri < TDPRI_CRIT);
863 * See if there are any LWKTs ready to go.
868 * If we are going to halt call splz unconditionally after
869 * CLIing to catch any interrupt races. Note that we are
870 * at SPL0 and interrupts are enabled.
872 if (cpu_idle_hlt && !lwkt_runnable() &&
873 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
874 __asm __volatile("cli");
876 if (!lwkt_runnable())
880 __asm __volatile("pause");
884 td->td_flags &= ~TDF_IDLE_NOHLT;
887 __asm __volatile("sti; pause");
889 __asm __volatile("sti");
897 * Clear registers on exec
900 setregs(struct lwp *lp, u_long entry, u_long stack, u_long ps_strings)
902 struct trapframe *regs = lp->lwp_md.md_regs;
903 struct pcb *pcb = lp->lwp_thread->td_pcb;
905 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
906 pcb->pcb_gs = _udatasel;
909 /* was i386_user_cleanup() in NetBSD */
912 bzero((char *)regs, sizeof(struct trapframe));
913 regs->tf_eip = entry;
914 regs->tf_esp = stack;
915 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
916 regs->tf_ss = _udatasel;
917 regs->tf_ds = _udatasel;
918 regs->tf_es = _udatasel;
919 regs->tf_fs = _udatasel;
920 regs->tf_cs = _ucodesel;
922 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
923 regs->tf_ebx = ps_strings;
926 * Reset the hardware debug registers if they were in use.
927 * They won't have any meaning for the newly exec'd process.
929 if (pcb->pcb_flags & PCB_DBREGS) {
936 if (pcb == curthread->td_pcb) {
938 * Clear the debug registers on the running
939 * CPU, otherwise they will end up affecting
940 * the next process we switch to.
944 pcb->pcb_flags &= ~PCB_DBREGS;
948 * Initialize the math emulator (if any) for the current process.
949 * Actually, just clear the bit that says that the emulator has
950 * been initialized. Initialization is delayed until the process
951 * traps to the emulator (if it is done at all) mainly because
952 * emulators don't provide an entry point for initialization.
954 lp->lwp_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
957 * note: do not set CR0_TS here. npxinit() must do it after clearing
958 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
962 load_cr0(rcr0() | CR0_MP);
965 /* Initialize the npx (if any) for the current process. */
966 npxinit(__INITIAL_NPXCW__);
971 * note: linux emulator needs edx to be 0x0 on entry, which is
972 * handled in execve simply by setting the 64 bit syscall
983 cr0 |= CR0_NE; /* Done by npxinit() */
984 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
986 if (cpu_class != CPUCLASS_386)
988 cr0 |= CR0_WP | CR0_AM;
994 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
997 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
999 if (!error && req->newptr)
1004 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1005 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1007 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1008 CTLFLAG_RW, &disable_rtc_set, 0, "");
1010 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1011 CTLFLAG_RD, &bootinfo, bootinfo, "");
1013 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1014 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1016 extern u_long bootdev; /* not a cdev_t - encoding is different */
1017 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1018 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1021 * Initialize 386 and configure to run kernel
1025 * Initialize segments & interrupt table
1029 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1030 static struct gate_descriptor idt0[NIDT];
1031 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1032 union descriptor ldt[NLDT]; /* local descriptor table */
1034 /* table descriptors - used to load tables by cpu */
1035 struct region_descriptor r_gdt, r_idt;
1037 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1038 extern int has_f00f_bug;
1041 static struct i386tss dblfault_tss;
1042 static char dblfault_stack[PAGE_SIZE];
1044 extern struct user *proc0paddr;
1047 /* software prototypes -- in more palatable form */
1048 struct soft_segment_descriptor gdt_segs[] = {
1049 /* GNULL_SEL 0 Null Descriptor */
1050 { 0x0, /* segment base address */
1052 0, /* segment type */
1053 0, /* segment descriptor priority level */
1054 0, /* segment descriptor present */
1056 0, /* default 32 vs 16 bit size */
1057 0 /* limit granularity (byte/page units)*/ },
1058 /* GCODE_SEL 1 Code Descriptor for kernel */
1059 { 0x0, /* segment base address */
1060 0xfffff, /* length - all address space */
1061 SDT_MEMERA, /* segment type */
1062 0, /* segment descriptor priority level */
1063 1, /* segment descriptor present */
1065 1, /* default 32 vs 16 bit size */
1066 1 /* limit granularity (byte/page units)*/ },
1067 /* GDATA_SEL 2 Data Descriptor for kernel */
1068 { 0x0, /* segment base address */
1069 0xfffff, /* length - all address space */
1070 SDT_MEMRWA, /* segment type */
1071 0, /* segment descriptor priority level */
1072 1, /* segment descriptor present */
1074 1, /* default 32 vs 16 bit size */
1075 1 /* limit granularity (byte/page units)*/ },
1076 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1077 { 0x0, /* segment base address */
1078 0xfffff, /* length - all address space */
1079 SDT_MEMRWA, /* segment type */
1080 0, /* segment descriptor priority level */
1081 1, /* segment descriptor present */
1083 1, /* default 32 vs 16 bit size */
1084 1 /* limit granularity (byte/page units)*/ },
1085 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1087 0x0, /* segment base address */
1088 sizeof(struct i386tss)-1,/* length - all address space */
1089 SDT_SYS386TSS, /* segment type */
1090 0, /* segment descriptor priority level */
1091 1, /* segment descriptor present */
1093 0, /* unused - default 32 vs 16 bit size */
1094 0 /* limit granularity (byte/page units)*/ },
1095 /* GLDT_SEL 5 LDT Descriptor */
1096 { (int) ldt, /* segment base address */
1097 sizeof(ldt)-1, /* length - all address space */
1098 SDT_SYSLDT, /* segment type */
1099 SEL_UPL, /* segment descriptor priority level */
1100 1, /* segment descriptor present */
1102 0, /* unused - default 32 vs 16 bit size */
1103 0 /* limit granularity (byte/page units)*/ },
1104 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1105 { (int) ldt, /* segment base address */
1106 (512 * sizeof(union descriptor)-1), /* length */
1107 SDT_SYSLDT, /* segment type */
1108 0, /* segment descriptor priority level */
1109 1, /* segment descriptor present */
1111 0, /* unused - default 32 vs 16 bit size */
1112 0 /* limit granularity (byte/page units)*/ },
1113 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1114 { 0x0, /* segment base address */
1115 0x0, /* length - all address space */
1116 0, /* segment type */
1117 0, /* segment descriptor priority level */
1118 0, /* segment descriptor present */
1120 0, /* default 32 vs 16 bit size */
1121 0 /* limit granularity (byte/page units)*/ },
1122 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1123 { 0x400, /* segment base address */
1124 0xfffff, /* length */
1125 SDT_MEMRWA, /* segment type */
1126 0, /* segment descriptor priority level */
1127 1, /* segment descriptor present */
1129 1, /* default 32 vs 16 bit size */
1130 1 /* limit granularity (byte/page units)*/ },
1131 /* GPANIC_SEL 9 Panic Tss Descriptor */
1132 { (int) &dblfault_tss, /* segment base address */
1133 sizeof(struct i386tss)-1,/* length - all address space */
1134 SDT_SYS386TSS, /* segment type */
1135 0, /* segment descriptor priority level */
1136 1, /* segment descriptor present */
1138 0, /* unused - default 32 vs 16 bit size */
1139 0 /* limit granularity (byte/page units)*/ },
1140 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1141 { 0, /* segment base address (overwritten) */
1142 0xfffff, /* length */
1143 SDT_MEMERA, /* segment type */
1144 0, /* segment descriptor priority level */
1145 1, /* segment descriptor present */
1147 0, /* default 32 vs 16 bit size */
1148 1 /* limit granularity (byte/page units)*/ },
1149 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1150 { 0, /* segment base address (overwritten) */
1151 0xfffff, /* length */
1152 SDT_MEMERA, /* segment type */
1153 0, /* segment descriptor priority level */
1154 1, /* segment descriptor present */
1156 0, /* default 32 vs 16 bit size */
1157 1 /* limit granularity (byte/page units)*/ },
1158 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1159 { 0, /* segment base address (overwritten) */
1160 0xfffff, /* length */
1161 SDT_MEMRWA, /* segment type */
1162 0, /* segment descriptor priority level */
1163 1, /* segment descriptor present */
1165 1, /* default 32 vs 16 bit size */
1166 1 /* limit granularity (byte/page units)*/ },
1167 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1168 { 0, /* segment base address (overwritten) */
1169 0xfffff, /* length */
1170 SDT_MEMRWA, /* segment type */
1171 0, /* segment descriptor priority level */
1172 1, /* segment descriptor present */
1174 0, /* default 32 vs 16 bit size */
1175 1 /* limit granularity (byte/page units)*/ },
1176 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1177 { 0, /* segment base address (overwritten) */
1178 0xfffff, /* length */
1179 SDT_MEMRWA, /* segment type */
1180 0, /* segment descriptor priority level */
1181 1, /* segment descriptor present */
1183 0, /* default 32 vs 16 bit size */
1184 1 /* limit granularity (byte/page units)*/ },
1185 /* GTLS_START 15 TLS */
1186 { 0x0, /* segment base address */
1188 0, /* segment type */
1189 0, /* segment descriptor priority level */
1190 0, /* segment descriptor present */
1192 0, /* default 32 vs 16 bit size */
1193 0 /* limit granularity (byte/page units)*/ },
1194 /* GTLS_START+1 16 TLS */
1195 { 0x0, /* segment base address */
1197 0, /* segment type */
1198 0, /* segment descriptor priority level */
1199 0, /* segment descriptor present */
1201 0, /* default 32 vs 16 bit size */
1202 0 /* limit granularity (byte/page units)*/ },
1203 /* GTLS_END 17 TLS */
1204 { 0x0, /* segment base address */
1206 0, /* segment type */
1207 0, /* segment descriptor priority level */
1208 0, /* segment descriptor present */
1210 0, /* default 32 vs 16 bit size */
1211 0 /* limit granularity (byte/page units)*/ },
1214 static struct soft_segment_descriptor ldt_segs[] = {
1215 /* Null Descriptor - overwritten by call gate */
1216 { 0x0, /* segment base address */
1217 0x0, /* length - all address space */
1218 0, /* segment type */
1219 0, /* segment descriptor priority level */
1220 0, /* segment descriptor present */
1222 0, /* default 32 vs 16 bit size */
1223 0 /* limit granularity (byte/page units)*/ },
1224 /* Null Descriptor - overwritten by call gate */
1225 { 0x0, /* segment base address */
1226 0x0, /* length - all address space */
1227 0, /* segment type */
1228 0, /* segment descriptor priority level */
1229 0, /* segment descriptor present */
1231 0, /* default 32 vs 16 bit size */
1232 0 /* limit granularity (byte/page units)*/ },
1233 /* Null Descriptor - overwritten by call gate */
1234 { 0x0, /* segment base address */
1235 0x0, /* length - all address space */
1236 0, /* segment type */
1237 0, /* segment descriptor priority level */
1238 0, /* segment descriptor present */
1240 0, /* default 32 vs 16 bit size */
1241 0 /* limit granularity (byte/page units)*/ },
1242 /* Code Descriptor for user */
1243 { 0x0, /* segment base address */
1244 0xfffff, /* length - all address space */
1245 SDT_MEMERA, /* segment type */
1246 SEL_UPL, /* segment descriptor priority level */
1247 1, /* segment descriptor present */
1249 1, /* default 32 vs 16 bit size */
1250 1 /* limit granularity (byte/page units)*/ },
1251 /* Null Descriptor - overwritten by call gate */
1252 { 0x0, /* segment base address */
1253 0x0, /* length - all address space */
1254 0, /* segment type */
1255 0, /* segment descriptor priority level */
1256 0, /* segment descriptor present */
1258 0, /* default 32 vs 16 bit size */
1259 0 /* limit granularity (byte/page units)*/ },
1260 /* Data Descriptor for user */
1261 { 0x0, /* segment base address */
1262 0xfffff, /* length - all address space */
1263 SDT_MEMRWA, /* segment type */
1264 SEL_UPL, /* segment descriptor priority level */
1265 1, /* segment descriptor present */
1267 1, /* default 32 vs 16 bit size */
1268 1 /* limit granularity (byte/page units)*/ },
1272 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1274 struct gate_descriptor *ip;
1277 ip->gd_looffset = (int)func;
1278 ip->gd_selector = selec;
1284 ip->gd_hioffset = ((int)func)>>16 ;
1287 #define IDTVEC(name) __CONCAT(X,name)
1290 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1291 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1292 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1293 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1294 IDTVEC(xmm), IDTVEC(syscall),
1297 IDTVEC(int0x80_syscall);
1299 #ifdef DEBUG_INTERRUPTS
1300 extern inthand_t *Xrsvdary[256];
1304 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1306 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1307 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1308 ssd->ssd_type = sd->sd_type;
1309 ssd->ssd_dpl = sd->sd_dpl;
1310 ssd->ssd_p = sd->sd_p;
1311 ssd->ssd_def32 = sd->sd_def32;
1312 ssd->ssd_gran = sd->sd_gran;
1316 * Populate the (physmap) array with base/bound pairs describing the
1317 * available physical memory in the system, then test this memory and
1318 * build the phys_avail array describing the actually-available memory.
1320 * If we cannot accurately determine the physical memory map, then use
1321 * value from the 0xE801 call, and failing that, the RTC.
1323 * Total memory size may be set by the kernel environment variable
1324 * hw.physmem or the compile-time define MAXMEM.
1327 getmemsize(int first)
1329 int i, physmap_idx, pa_indx;
1331 u_int basemem, extmem;
1332 struct vm86frame vmf;
1333 struct vm86context vmc;
1335 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1343 quad_t dcons_addr, dcons_size;
1346 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1347 bzero(&vmf, sizeof(struct vm86frame));
1348 bzero(physmap, sizeof(physmap));
1352 * Some newer BIOSes has broken INT 12H implementation which cause
1353 * kernel panic immediately. In this case, we need to scan SMAP
1354 * with INT 15:E820 first, then determine base memory size.
1356 if (hasbrokenint12) {
1361 * Perform "base memory" related probes & setup. If we get a crazy
1362 * value give the bios some scribble space just in case.
1364 vm86_intcall(0x12, &vmf);
1365 basemem = vmf.vmf_ax;
1366 if (basemem > 640) {
1367 kprintf("Preposterous BIOS basemem of %uK, "
1368 "truncating to < 640K\n", basemem);
1373 * XXX if biosbasemem is now < 640, there is a `hole'
1374 * between the end of base memory and the start of
1375 * ISA memory. The hole may be empty or it may
1376 * contain BIOS code or data. Map it read/write so
1377 * that the BIOS can write to it. (Memory from 0 to
1378 * the physical end of the kernel is mapped read-only
1379 * to begin with and then parts of it are remapped.
1380 * The parts that aren't remapped form holes that
1381 * remain read-only and are unused by the kernel.
1382 * The base memory area is below the physical end of
1383 * the kernel and right now forms a read-only hole.
1384 * The part of it from PAGE_SIZE to
1385 * (trunc_page(biosbasemem * 1024) - 1) will be
1386 * remapped and used by the kernel later.)
1388 * This code is similar to the code used in
1389 * pmap_mapdev, but since no memory needs to be
1390 * allocated we simply change the mapping.
1392 for (pa = trunc_page(basemem * 1024);
1393 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1394 pte = vtopte(pa + KERNBASE);
1395 *pte = pa | PG_RW | PG_V;
1399 * if basemem != 640, map pages r/w into vm86 page table so
1400 * that the bios can scribble on it.
1403 for (i = basemem / 4; i < 160; i++)
1404 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1408 * map page 1 R/W into the kernel page table so we can use it
1409 * as a buffer. The kernel will unmap this page later.
1411 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1412 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1415 * get memory map with INT 15:E820
1417 #define SMAPSIZ sizeof(*smap)
1418 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1421 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1422 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1427 vmf.vmf_eax = 0xE820;
1428 vmf.vmf_edx = SMAP_SIG;
1429 vmf.vmf_ecx = SMAPSIZ;
1430 i = vm86_datacall(0x15, &vmf, &vmc);
1431 if (i || vmf.vmf_eax != SMAP_SIG)
1433 if (boothowto & RB_VERBOSE)
1434 kprintf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1436 *(u_int32_t *)((char *)&smap->base + 4),
1437 (u_int32_t)smap->base,
1438 *(u_int32_t *)((char *)&smap->length + 4),
1439 (u_int32_t)smap->length);
1441 if (smap->type != 0x01)
1444 if (smap->length == 0)
1447 if (smap->base >= 0xffffffff) {
1448 kprintf("%uK of memory above 4GB ignored\n",
1449 (u_int)(smap->length / 1024));
1453 for (i = 0; i <= physmap_idx; i += 2) {
1454 if (smap->base < physmap[i + 1]) {
1455 if (boothowto & RB_VERBOSE)
1457 "Overlapping or non-montonic memory region, ignoring second region\n");
1462 if (smap->base == physmap[physmap_idx + 1]) {
1463 physmap[physmap_idx + 1] += smap->length;
1468 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1470 "Too many segments in the physical address map, giving up\n");
1473 physmap[physmap_idx] = smap->base;
1474 physmap[physmap_idx + 1] = smap->base + smap->length;
1476 ; /* fix GCC3.x warning */
1477 } while (vmf.vmf_ebx != 0);
1480 * Perform "base memory" related probes & setup based on SMAP
1483 for (i = 0; i <= physmap_idx; i += 2) {
1484 if (physmap[i] == 0x00000000) {
1485 basemem = physmap[i + 1] / 1024;
1494 if (basemem > 640) {
1495 kprintf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1500 for (pa = trunc_page(basemem * 1024);
1501 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1502 pte = vtopte(pa + KERNBASE);
1503 *pte = pa | PG_RW | PG_V;
1507 for (i = basemem / 4; i < 160; i++)
1508 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1511 if (physmap[1] != 0)
1515 * If we failed above, try memory map with INT 15:E801
1517 vmf.vmf_ax = 0xE801;
1518 if (vm86_intcall(0x15, &vmf) == 0) {
1519 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1523 vm86_intcall(0x15, &vmf);
1524 extmem = vmf.vmf_ax;
1527 * Prefer the RTC value for extended memory.
1529 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1534 * Special hack for chipsets that still remap the 384k hole when
1535 * there's 16MB of memory - this really confuses people that
1536 * are trying to use bus mastering ISA controllers with the
1537 * "16MB limit"; they only have 16MB, but the remapping puts
1538 * them beyond the limit.
1540 * If extended memory is between 15-16MB (16-17MB phys address range),
1543 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1547 physmap[1] = basemem * 1024;
1549 physmap[physmap_idx] = 0x100000;
1550 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1554 * Now, physmap contains a map of physical memory.
1558 /* make hole for AP bootstrap code YYY */
1559 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1561 /* look for the MP hardware - needed for apic addresses */
1566 * Maxmem isn't the "maximum memory", it's one larger than the
1567 * highest page of the physical address space. It should be
1568 * called something like "Maxphyspage". We may adjust this
1569 * based on ``hw.physmem'' and the results of the memory test.
1571 Maxmem = atop(physmap[physmap_idx + 1]);
1574 Maxmem = MAXMEM / 4;
1578 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
1579 * for the appropriate modifiers. This overrides MAXMEM.
1581 if ((cp = kgetenv("hw.physmem")) != NULL) {
1582 u_int64_t AllowMem, sanity;
1585 sanity = AllowMem = strtouq(cp, &ep, 0);
1586 if ((ep != cp) && (*ep != 0)) {
1599 AllowMem = sanity = 0;
1601 if (AllowMem < sanity)
1605 kprintf("Ignoring invalid memory size of '%s'\n", cp);
1607 Maxmem = atop(AllowMem);
1610 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1611 (boothowto & RB_VERBOSE))
1612 kprintf("Physical memory use set to %lluK\n", Maxmem * 4);
1615 * If Maxmem has been increased beyond what the system has detected,
1616 * extend the last memory segment to the new limit.
1618 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1619 physmap[physmap_idx + 1] = ptoa(Maxmem);
1621 /* call pmap initialization to make new kernel address space */
1622 pmap_bootstrap(first, 0);
1625 * Size up each available chunk of physical memory.
1627 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1629 phys_avail[pa_indx++] = physmap[0];
1630 phys_avail[pa_indx] = physmap[0];
1634 * Get dcons buffer address
1636 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1637 kgetenv_quad("dcons.size", &dcons_size) == 0)
1641 * physmap is in bytes, so when converting to page boundaries,
1642 * round up the start address and round down the end address.
1644 for (i = 0; i <= physmap_idx; i += 2) {
1648 if (physmap[i + 1] < end)
1649 end = trunc_page(physmap[i + 1]);
1650 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1655 int *ptr = (int *)CADDR1;
1659 * block out kernel memory as not available.
1661 if (pa >= 0x100000 && pa < first)
1665 * block out dcons buffer
1668 && pa >= trunc_page(dcons_addr)
1669 && pa < dcons_addr + dcons_size)
1675 * map page into kernel: valid, read/write,non-cacheable
1677 *pte = pa | PG_V | PG_RW | PG_N;
1682 * Test for alternating 1's and 0's
1684 *(volatile int *)ptr = 0xaaaaaaaa;
1685 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1689 * Test for alternating 0's and 1's
1691 *(volatile int *)ptr = 0x55555555;
1692 if (*(volatile int *)ptr != 0x55555555) {
1698 *(volatile int *)ptr = 0xffffffff;
1699 if (*(volatile int *)ptr != 0xffffffff) {
1705 *(volatile int *)ptr = 0x0;
1706 if (*(volatile int *)ptr != 0x0) {
1710 * Restore original value.
1715 * Adjust array of valid/good pages.
1717 if (page_bad == TRUE) {
1721 * If this good page is a continuation of the
1722 * previous set of good pages, then just increase
1723 * the end pointer. Otherwise start a new chunk.
1724 * Note that "end" points one higher than end,
1725 * making the range >= start and < end.
1726 * If we're also doing a speculative memory
1727 * test and we at or past the end, bump up Maxmem
1728 * so that we keep going. The first bad page
1729 * will terminate the loop.
1731 if (phys_avail[pa_indx] == pa) {
1732 phys_avail[pa_indx] += PAGE_SIZE;
1735 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1736 kprintf("Too many holes in the physical address space, giving up\n");
1740 phys_avail[pa_indx++] = pa; /* start */
1741 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1751 * The last chunk must contain at least one page plus the message
1752 * buffer to avoid complicating other code (message buffer address
1753 * calculation, etc.).
1755 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1756 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1757 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1758 phys_avail[pa_indx--] = 0;
1759 phys_avail[pa_indx--] = 0;
1762 Maxmem = atop(phys_avail[pa_indx]);
1764 /* Trim off space for the message buffer. */
1765 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1767 avail_end = phys_avail[pa_indx];
1779 * 7 Device Not Available (x87)
1781 * 9 Coprocessor Segment overrun (unsupported, reserved)
1783 * 11 Segment not present
1785 * 13 General Protection
1788 * 16 x87 FP Exception pending
1789 * 17 Alignment Check
1791 * 19 SIMD floating point
1793 * 32-255 INTn/external sources
1798 struct gate_descriptor *gdp;
1799 int gsel_tss, metadata_missing, off, x;
1800 struct mdglobaldata *gd;
1803 * Prevent lowering of the ipl if we call tsleep() early.
1805 gd = &CPU_prvspace[0].mdglobaldata;
1806 bzero(gd, sizeof(*gd));
1808 gd->mi.gd_curthread = &thread0;
1811 atdevbase = ISA_HOLE_START + KERNBASE;
1813 metadata_missing = 0;
1814 if (bootinfo.bi_modulep) {
1815 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1816 preload_bootstrap_relocate(KERNBASE);
1818 metadata_missing = 1;
1820 if (bootinfo.bi_envp)
1821 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1824 * start with one cpu. Note: ncpus2_shift and ncpus2_mask are left
1829 /* Init basic tunables, hz etc */
1833 * make gdt memory segments, the code segment goes up to end of the
1834 * page with etext in it, the data segment goes to the end of
1838 * XXX text protection is temporarily (?) disabled. The limit was
1839 * i386_btop(round_page(etext)) - 1.
1841 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1842 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1844 gdt_segs[GPRIV_SEL].ssd_limit =
1845 atop(sizeof(struct privatespace) - 1);
1846 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1847 gdt_segs[GPROC0_SEL].ssd_base =
1848 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1850 gd->mi.gd_prvspace = &CPU_prvspace[0];
1853 * Note: on both UP and SMP curthread must be set non-NULL
1854 * early in the boot sequence because the system assumes
1855 * that 'curthread' is never NULL.
1858 for (x = 0; x < NGDT; x++) {
1860 /* avoid overwriting db entries with APM ones */
1861 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1864 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1867 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1868 r_gdt.rd_base = (int) gdt;
1871 mi_gdinit(&gd->mi, 0);
1873 mi_proc0init(&gd->mi, proc0paddr);
1874 safepri = TDPRI_MAX;
1876 /* make ldt memory segments */
1878 * XXX - VM_MAX_USER_ADDRESS is an end address, not a max. And it
1879 * should be spelled ...MAX_USER...
1881 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
1882 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
1883 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1884 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1886 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1888 gd->gd_currentldt = _default_ldt;
1889 /* spinlocks and the BGL */
1893 * Setup the hardware exception table. Most exceptions use
1894 * SDT_SYS386TGT, known as a 'trap gate'. Trap gates leave
1895 * interrupts enabled. VM page faults use SDT_SYS386IGT, known as
1896 * an 'interrupt trap gate', which disables interrupts on entry,
1897 * in order to be able to poll the appropriate CRn register to
1898 * determine the fault address.
1900 for (x = 0; x < NIDT; x++) {
1901 #ifdef DEBUG_INTERRUPTS
1902 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1904 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1907 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1908 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1909 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1910 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1911 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1912 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1913 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1914 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1915 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1916 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1917 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1918 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1919 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1920 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1921 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1922 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1923 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1924 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1925 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1926 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1927 setidt(0x80, &IDTVEC(int0x80_syscall),
1928 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1930 r_idt.rd_limit = sizeof(idt0) - 1;
1931 r_idt.rd_base = (int) idt;
1935 * Initialize the console before we print anything out.
1939 if (metadata_missing)
1940 kprintf("WARNING: loader(8) metadata is missing!\n");
1949 if (boothowto & RB_KDB)
1950 Debugger("Boot flags requested debugger");
1953 finishidentcpu(); /* Final stage of CPU initialization */
1954 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1955 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1956 initializecpu(); /* Initialize CPU registers */
1959 * make an initial tss so cpu can get interrupt stack on syscall!
1960 * The 16 bytes is to save room for a VM86 context.
1962 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1963 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
1964 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1965 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1966 gd->gd_common_tssd = *gd->gd_tss_gdt;
1967 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
1970 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1971 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1972 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1973 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1974 dblfault_tss.tss_cr3 = (int)IdlePTD;
1975 dblfault_tss.tss_eip = (int) dblfault_handler;
1976 dblfault_tss.tss_eflags = PSL_KERNEL;
1977 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1978 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1979 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1980 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1981 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1985 init_param2(physmem);
1987 /* now running on new page tables, configured,and u/iom is accessible */
1989 /* Map the message buffer. */
1990 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1991 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1993 msgbufinit(msgbufp, MSGBUF_SIZE);
1995 /* make a call gate to reenter kernel with */
1996 gdp = &ldt[LSYS5CALLS_SEL].gd;
1998 x = (int) &IDTVEC(syscall);
1999 gdp->gd_looffset = x++;
2000 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2002 gdp->gd_type = SDT_SYS386CGT;
2003 gdp->gd_dpl = SEL_UPL;
2005 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2007 /* XXX does this work? */
2008 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2009 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2011 /* transfer to user mode */
2013 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2014 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2016 /* setup proc 0's pcb */
2017 thread0.td_pcb->pcb_flags = 0;
2018 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2019 thread0.td_pcb->pcb_ext = 0;
2020 proc0.p_lwp.lwp_md.md_regs = &proc0_tf;
2024 * Initialize machine-dependant portions of the global data structure.
2025 * Note that the global data area and cpu0's idlestack in the private
2026 * data space were allocated in locore.
2028 * Note: the idlethread's cpl is 0
2030 * WARNING! Called from early boot, 'mycpu' may not work yet.
2033 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2036 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2038 lwkt_init_thread(&gd->mi.gd_idlethread,
2039 gd->mi.gd_prvspace->idlestack,
2040 sizeof(gd->mi.gd_prvspace->idlestack),
2041 TDF_MPSAFE, &gd->mi);
2042 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2043 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2044 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2045 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2049 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2051 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2052 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2059 globaldata_find(int cpu)
2061 KKASSERT(cpu >= 0 && cpu < ncpus);
2062 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2065 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2066 static void f00f_hack(void *unused);
2067 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2070 f00f_hack(void *unused)
2072 struct gate_descriptor *new_idt;
2078 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
2080 r_idt.rd_limit = sizeof(idt0) - 1;
2082 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
2084 panic("kmem_alloc returned 0");
2085 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2086 panic("kmem_alloc returned non-page-aligned memory");
2087 /* Put the first seven entries in the lower page */
2088 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2089 bcopy(idt, new_idt, sizeof(idt0));
2090 r_idt.rd_base = (int)new_idt;
2093 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
2094 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2095 panic("vm_map_protect failed");
2098 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2101 ptrace_set_pc(struct proc *p, unsigned long addr)
2103 p->p_md.md_regs->tf_eip = addr;
2108 ptrace_single_step(struct lwp *lp)
2110 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2115 fill_regs(struct lwp *lp, struct reg *regs)
2118 struct trapframe *tp;
2120 tp = lp->lwp_md.md_regs;
2121 regs->r_fs = tp->tf_fs;
2122 regs->r_es = tp->tf_es;
2123 regs->r_ds = tp->tf_ds;
2124 regs->r_edi = tp->tf_edi;
2125 regs->r_esi = tp->tf_esi;
2126 regs->r_ebp = tp->tf_ebp;
2127 regs->r_ebx = tp->tf_ebx;
2128 regs->r_edx = tp->tf_edx;
2129 regs->r_ecx = tp->tf_ecx;
2130 regs->r_eax = tp->tf_eax;
2131 regs->r_eip = tp->tf_eip;
2132 regs->r_cs = tp->tf_cs;
2133 regs->r_eflags = tp->tf_eflags;
2134 regs->r_esp = tp->tf_esp;
2135 regs->r_ss = tp->tf_ss;
2136 pcb = lp->lwp_thread->td_pcb;
2137 regs->r_gs = pcb->pcb_gs;
2142 set_regs(struct lwp *lp, struct reg *regs)
2145 struct trapframe *tp;
2147 tp = lp->lwp_md.md_regs;
2148 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2149 !CS_SECURE(regs->r_cs))
2151 tp->tf_fs = regs->r_fs;
2152 tp->tf_es = regs->r_es;
2153 tp->tf_ds = regs->r_ds;
2154 tp->tf_edi = regs->r_edi;
2155 tp->tf_esi = regs->r_esi;
2156 tp->tf_ebp = regs->r_ebp;
2157 tp->tf_ebx = regs->r_ebx;
2158 tp->tf_edx = regs->r_edx;
2159 tp->tf_ecx = regs->r_ecx;
2160 tp->tf_eax = regs->r_eax;
2161 tp->tf_eip = regs->r_eip;
2162 tp->tf_cs = regs->r_cs;
2163 tp->tf_eflags = regs->r_eflags;
2164 tp->tf_esp = regs->r_esp;
2165 tp->tf_ss = regs->r_ss;
2166 pcb = lp->lwp_thread->td_pcb;
2167 pcb->pcb_gs = regs->r_gs;
2171 #ifndef CPU_DISABLE_SSE
2173 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2175 struct env87 *penv_87 = &sv_87->sv_env;
2176 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2179 /* FPU control/status */
2180 penv_87->en_cw = penv_xmm->en_cw;
2181 penv_87->en_sw = penv_xmm->en_sw;
2182 penv_87->en_tw = penv_xmm->en_tw;
2183 penv_87->en_fip = penv_xmm->en_fip;
2184 penv_87->en_fcs = penv_xmm->en_fcs;
2185 penv_87->en_opcode = penv_xmm->en_opcode;
2186 penv_87->en_foo = penv_xmm->en_foo;
2187 penv_87->en_fos = penv_xmm->en_fos;
2190 for (i = 0; i < 8; ++i)
2191 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2193 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2197 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2199 struct env87 *penv_87 = &sv_87->sv_env;
2200 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2203 /* FPU control/status */
2204 penv_xmm->en_cw = penv_87->en_cw;
2205 penv_xmm->en_sw = penv_87->en_sw;
2206 penv_xmm->en_tw = penv_87->en_tw;
2207 penv_xmm->en_fip = penv_87->en_fip;
2208 penv_xmm->en_fcs = penv_87->en_fcs;
2209 penv_xmm->en_opcode = penv_87->en_opcode;
2210 penv_xmm->en_foo = penv_87->en_foo;
2211 penv_xmm->en_fos = penv_87->en_fos;
2214 for (i = 0; i < 8; ++i)
2215 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2217 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2219 #endif /* CPU_DISABLE_SSE */
2222 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2224 #ifndef CPU_DISABLE_SSE
2226 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2227 (struct save87 *)fpregs);
2230 #endif /* CPU_DISABLE_SSE */
2231 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2236 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2238 #ifndef CPU_DISABLE_SSE
2240 set_fpregs_xmm((struct save87 *)fpregs,
2241 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2244 #endif /* CPU_DISABLE_SSE */
2245 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2250 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2253 dbregs->dr0 = rdr0();
2254 dbregs->dr1 = rdr1();
2255 dbregs->dr2 = rdr2();
2256 dbregs->dr3 = rdr3();
2257 dbregs->dr4 = rdr4();
2258 dbregs->dr5 = rdr5();
2259 dbregs->dr6 = rdr6();
2260 dbregs->dr7 = rdr7();
2264 pcb = lp->lwp_thread->td_pcb;
2265 dbregs->dr0 = pcb->pcb_dr0;
2266 dbregs->dr1 = pcb->pcb_dr1;
2267 dbregs->dr2 = pcb->pcb_dr2;
2268 dbregs->dr3 = pcb->pcb_dr3;
2271 dbregs->dr6 = pcb->pcb_dr6;
2272 dbregs->dr7 = pcb->pcb_dr7;
2278 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2281 load_dr0(dbregs->dr0);
2282 load_dr1(dbregs->dr1);
2283 load_dr2(dbregs->dr2);
2284 load_dr3(dbregs->dr3);
2285 load_dr4(dbregs->dr4);
2286 load_dr5(dbregs->dr5);
2287 load_dr6(dbregs->dr6);
2288 load_dr7(dbregs->dr7);
2291 struct ucred *ucred;
2293 uint32_t mask1, mask2;
2296 * Don't let an illegal value for dr7 get set. Specifically,
2297 * check for undefined settings. Setting these bit patterns
2298 * result in undefined behaviour and can lead to an unexpected
2301 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2302 i++, mask1 <<= 2, mask2 <<= 2)
2303 if ((dbregs->dr7 & mask1) == mask2)
2306 pcb = lp->lwp_thread->td_pcb;
2307 ucred = lp->lwp_proc->p_ucred;
2310 * Don't let a process set a breakpoint that is not within the
2311 * process's address space. If a process could do this, it
2312 * could halt the system by setting a breakpoint in the kernel
2313 * (if ddb was enabled). Thus, we need to check to make sure
2314 * that no breakpoints are being enabled for addresses outside
2315 * process's address space, unless, perhaps, we were called by
2318 * XXX - what about when the watched area of the user's
2319 * address space is written into from within the kernel
2320 * ... wouldn't that still cause a breakpoint to be generated
2321 * from within kernel mode?
2324 if (suser_cred(ucred, 0) != 0) {
2325 if (dbregs->dr7 & 0x3) {
2326 /* dr0 is enabled */
2327 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
2331 if (dbregs->dr7 & (0x3<<2)) {
2332 /* dr1 is enabled */
2333 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
2337 if (dbregs->dr7 & (0x3<<4)) {
2338 /* dr2 is enabled */
2339 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
2343 if (dbregs->dr7 & (0x3<<6)) {
2344 /* dr3 is enabled */
2345 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
2350 pcb->pcb_dr0 = dbregs->dr0;
2351 pcb->pcb_dr1 = dbregs->dr1;
2352 pcb->pcb_dr2 = dbregs->dr2;
2353 pcb->pcb_dr3 = dbregs->dr3;
2354 pcb->pcb_dr6 = dbregs->dr6;
2355 pcb->pcb_dr7 = dbregs->dr7;
2357 pcb->pcb_flags |= PCB_DBREGS;
2364 * Return > 0 if a hardware breakpoint has been hit, and the
2365 * breakpoint was in user space. Return 0, otherwise.
2368 user_dbreg_trap(void)
2370 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2371 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2372 int nbp; /* number of breakpoints that triggered */
2373 caddr_t addr[4]; /* breakpoint addresses */
2377 if ((dr7 & 0x000000ff) == 0) {
2379 * all GE and LE bits in the dr7 register are zero,
2380 * thus the trap couldn't have been caused by the
2381 * hardware debug registers
2388 bp = dr6 & 0x0000000f;
2392 * None of the breakpoint bits are set meaning this
2393 * trap was not caused by any of the debug registers
2399 * at least one of the breakpoints were hit, check to see
2400 * which ones and if any of them are user space addresses
2404 addr[nbp++] = (caddr_t)rdr0();
2407 addr[nbp++] = (caddr_t)rdr1();
2410 addr[nbp++] = (caddr_t)rdr2();
2413 addr[nbp++] = (caddr_t)rdr3();
2416 for (i=0; i<nbp; i++) {
2418 (caddr_t)VM_MAX_USER_ADDRESS) {
2420 * addr[i] is in user space
2427 * None of the breakpoints are in user space.
2435 Debugger(const char *msg)
2437 kprintf("Debugger(\"%s\") called.\n", msg);
2441 #include <sys/disklabel.h>
2444 * Determine the size of the transfer, and make sure it is
2445 * within the boundaries of the partition. Adjust transfer
2446 * if needed, and signal errors or early completion.
2448 * On success a new bio layer is pushed with the translated
2449 * block number, and returned.
2452 bounds_check_with_label(cdev_t dev, struct bio *bio,
2453 struct disklabel *lp, int wlabel)
2456 struct buf *bp = bio->bio_buf;
2457 struct partition *p = lp->d_partitions + dkpart(dev);
2458 int labelsect = lp->d_partitions[0].p_offset;
2459 int maxsz = p->p_size,
2460 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2461 daddr_t blkno = (daddr_t)(bio->bio_offset >> DEV_BSHIFT);
2463 /* overwriting disk label ? */
2464 /* XXX should also protect bootstrap in first 8K */
2465 if (blkno + p->p_offset <= LABELSECTOR + labelsect &&
2466 #if LABELSECTOR != 0
2467 blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2469 bp->b_cmd != BUF_CMD_READ && wlabel == 0) {
2470 bp->b_error = EROFS;
2474 #if defined(DOSBBSECTOR) && defined(notyet)
2475 /* overwriting master boot record? */
2476 if (blkno + p->p_offset <= DOSBBSECTOR &&
2477 bp->b_cmd != BUF_CMD_READ && wlabel == 0) {
2478 bp->b_error = EROFS;
2484 * Check for out of bounds, EOF, and EOF clipping.
2486 if (bio->bio_offset < 0)
2488 if (blkno + sz > maxsz) {
2490 * Past EOF or B_BNOCLIP flag was set, the request is bad.
2492 if (blkno > maxsz || (bp->b_flags & B_BNOCLIP))
2496 * If exactly on EOF just complete the I/O with no bytes
2497 * transfered. B_INVAL must be set to throw away the
2498 * contents of the buffer. Otherwise clip b_bcount.
2500 if (blkno == maxsz) {
2501 bp->b_resid = bp->b_bcount;
2502 bp->b_flags |= B_INVAL;
2505 bp->b_bcount = (maxsz - blkno) << DEV_BSHIFT;
2507 nbio = push_bio(bio);
2508 nbio->bio_offset = bio->bio_offset + ((off_t)p->p_offset << DEV_BSHIFT);
2512 * The caller is responsible for calling biodone() on the passed bio
2513 * when we return NULL.
2516 bp->b_error = EINVAL;
2518 bp->b_resid = bp->b_bcount;
2519 bp->b_flags |= B_ERROR | B_INVAL;
2527 * Provide inb() and outb() as functions. They are normally only
2528 * available as macros calling inlined functions, thus cannot be
2529 * called inside DDB.
2531 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2537 /* silence compiler warnings */
2539 void outb(u_int, u_char);
2546 * We use %%dx and not %1 here because i/o is done at %dx and not at
2547 * %edx, while gcc generates inferior code (movw instead of movl)
2548 * if we tell it to load (u_short) port.
2550 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2555 outb(u_int port, u_char data)
2559 * Use an unnecessary assignment to help gcc's register allocator.
2560 * This make a large difference for gcc-1.40 and a tiny difference
2561 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2562 * best results. gcc-2.6.0 can't handle this.
2565 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2572 #include "opt_cpu.h"
2576 * initialize all the SMP locks
2579 /* critical region when masking or unmasking interupts */
2580 struct spinlock_deprecated imen_spinlock;
2582 /* Make FAST_INTR() routines sequential */
2583 struct spinlock_deprecated fast_intr_spinlock;
2585 /* critical region for old style disable_intr/enable_intr */
2586 struct spinlock_deprecated mpintr_spinlock;
2588 /* critical region around INTR() routines */
2589 struct spinlock_deprecated intr_spinlock;
2591 /* lock region used by kernel profiling */
2592 struct spinlock_deprecated mcount_spinlock;
2594 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2595 struct spinlock_deprecated com_spinlock;
2597 /* locks kernel kprintfs */
2598 struct spinlock_deprecated cons_spinlock;
2600 /* lock regions around the clock hardware */
2601 struct spinlock_deprecated clock_spinlock;
2603 /* lock around the MP rendezvous */
2604 struct spinlock_deprecated smp_rv_spinlock;
2610 * mp_lock = 0; BSP already owns the MP lock
2613 * Get the initial mp_lock with a count of 1 for the BSP.
2614 * This uses a LOGICAL cpu ID, ie BSP == 0.
2617 cpu_get_initial_mplock();
2620 spin_lock_init(&mcount_spinlock);
2621 spin_lock_init(&fast_intr_spinlock);
2622 spin_lock_init(&intr_spinlock);
2623 spin_lock_init(&mpintr_spinlock);
2624 spin_lock_init(&imen_spinlock);
2625 spin_lock_init(&smp_rv_spinlock);
2626 spin_lock_init(&com_spinlock);
2627 spin_lock_init(&clock_spinlock);
2628 spin_lock_init(&cons_spinlock);
2630 /* our token pool needs to work early */
2631 lwkt_token_pool_init();