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5 <TITLE>TrueTime GPS/GOES/OMEGA Receivers
11 TrueTime GPS/GOES/OMEGA Receivers</H3>
16 Address: 127.127.5.<I>u</I>
17 <BR>Reference ID: <TT>GPS, OMEGA, GOES</TT>
18 <BR>Driver ID: <TT>TRUETIME</TT>
19 <BR>Serial Port: <TT>/dev/true<I>u</I></TT>; 9600 baud, 8-bits, no parity
20 <BR>Features: <TT>tty_clk</TT>
23 This driver supports several models models of Kinemetrics/TrueTime timing
24 receivers, including 468-DC MK III GOES Synchronized Clock, GPS- DC MK
25 III and GPS/TM-TMD GPS Synchronized Clock, XL-DC (a 151-602-210, reported
26 by the driver as a GPS/TM-TMD), GPS-800 TCU (an 805-957 with the RS232
27 Talker/Listener module), OM-DC OMEGA Synchronized Clock, and very likely
28 others in the same model family that use the same timecode formats.
30 <P>Most of this code is originally from refclock_wwvb.c with thanks. It
31 has been so mangled that wwvb is not a recognizable ancestor.
32 <PRE>Timcode format: ADDD:HH:MM:SSQCL
34 A - control A (this is stripped before we see it)
35 Q - Quality indication (see below)
39 Quality codes indicate possible error of
41 468-DC GOES Receiver:
42 GPS-TM/TMD Receiver:
43 ? +/- 500 milliseconds # +/- 50 milliseconds
44 * +/- 5 milliseconds . +/- 1 millisecond
45 space less than 1 millisecond
47 OM-DC OMEGA Receiver:
49 > +/- 5 seconds
51 ? +/- 500 milliseconds # +/- 50 milliseconds
52 * +/- 5 milliseconds . +/- 1 millisecond
54 A-H less than 1 millisecond. Character indicates which
56 is being received as follows: A = Norway, B = Liberia,
57 C = Hawaii, D = North Dakota, E = La Reunion, F =
59 G = Australia, H = Japan.</PRE>
60 The carriage return start bit begins on 0 seconds and extends to 1 bit
63 <P>Notes on 468-DC and OMEGA receiver:
65 <P>Send the clock a <TT>R</TT> or <TT>C</TT> and once per second a timestamp
66 will appear. Send a <TT>R</TT> to get the satellite position once (GOES
69 <P>Notes on the 468-DC receiver:
71 <P>Since the old east/west satellite locations are only historical, you
72 can't set your clock propagation delay settings correctly and still use
73 automatic mode. The manual says to use a compromise when setting the switches.
74 This results in significant errors. The solution; use fudge time1 and time2
75 to incorporate corrections. If your clock is set for 50 and it should be
76 58 for using the west and 46 for using the east, use the line
78 <P><TT>fudge 127.127.5.0 time1 +0.008 time2 -0.004</TT>
80 <P>This corrects the 4 milliseconds advance and 8 milliseconds retard needed.
81 The software will ask the clock which satellite it sees.
83 <P>The PCL720 from PC Labs has an Intel 8253 look-alike, as well as a bunch
84 of TTL input and output pins, all brought out to the back panel. If you
85 wire a PPS signal (such as the TTL PPS coming out of a GOES or other Kinemetrics/Truetime
86 clock) to the 8253's GATE0, and then also wire the 8253's OUT0 to the PCL720's
87 INPUT3.BIT0, then we can read CTR0 to get the number of microseconds since
88 the last PPS upward edge, mediated by reading OUT0 to find out if the counter
89 has wrapped around (this happens if more than 65535us (65ms) elapses between
90 the PPS event and our being called.)
93 When enabled by the <TT>flag4</TT> fudge flag, every received timecode
94 is written as-is to the <TT>clockstats</TT> file.
100 <TT>time1 <I>time</I></TT></DT>
103 Specifies the time offset calibration factor, in seconds and fraction,
104 to be used for the West satellite, with default 0.0.</DD>
107 <TT>time2 <I>time</I></TT></DT>
110 . Specifies the time offset calibration factor, in seconds and fraction,
111 to be used for the East satellite, with default 0.0.</DD>
114 <TT>stratum <I>number</I></TT></DT>
117 Specifies the driver stratum, in decimal from 0 to 15, with default 0.</DD>
120 <TT>refid <I>string</I></TT></DT>
123 Specifies the driver reference identifier, an ASCII string from one to
124 four characters, with default <TT>TRUE</TT>.</DD>
127 <TT>flag1 0 | 1</TT></DT>
130 Silence the clock side of ntpd, just reading the clock without trying to
134 <TT>flag2 0 | 1</TT></DT>
137 Generate a debug file /tmp/true%d.</DD>
140 <TT>flag3 0 | 1</TT></DT>
143 Not used by this driver.</DD>
146 <TT>flag4 0 | 1</TT></DT>
149 Not used by this driver.</DD>
151 Additional Information
153 <P><A HREF="refclock.htm">Reference Clock Drivers</A>
156 David L. Mills (mills@udel.edu)</ADDRESS>