sys/dev/netif/bwi/if_bwi.c

   1 /*
   2  * Copyright (c) 2007 The DragonFly Project.  All rights reserved.
   3  *
   4  * This code is derived from software contributed to The DragonFly Project
   5  * by Sepherosa Ziehau <sepherosa@gmail.com>
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in
  15  *    the documentation and/or other materials provided with the
  16  *    distribution.
  17  * 3. Neither the name of The DragonFly Project nor the names of its
  18  *    contributors may be used to endorse or promote products derived
  19  *    from this software without specific, prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  24  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  25  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  27  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  28  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  29  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32  * SUCH DAMAGE.
  33  */
  34
  35 #include <sys/param.h>
  36 #include <sys/bitops.h>
  37 #include <sys/endian.h>
  38 #include <sys/kernel.h>
  39 #include <sys/bus.h>
  40 #include <sys/interrupt.h>
  41 #include <sys/malloc.h>
  42 #include <sys/proc.h>
  43 #include <sys/rman.h>
  44 #include <sys/serialize.h>
  45 #include <sys/socket.h>
  46 #include <sys/sockio.h>
  47 #include <sys/sysctl.h>
  48
  49 #include <net/ethernet.h>
  50 #include <net/if.h>
  51 #include <net/bpf.h>
  52 #include <net/if_arp.h>
  53 #include <net/if_dl.h>
  54 #include <net/if_media.h>
  55 #include <net/ifq_var.h>
  56
  57 #include <netproto/802_11/ieee80211_radiotap.h>
  58 #include <netproto/802_11/ieee80211_var.h>
  59 #include <netproto/802_11/wlan_ratectl/onoe/ieee80211_onoe_param.h>
  60
  61 #include <bus/pci/pcireg.h>
  62 #include <bus/pci/pcivar.h>
  63 #include <bus/pci/pcidevs.h>
  64
  65 #include <dev/netif/bwi/if_bwireg.h>
  66 #include <dev/netif/bwi/if_bwivar.h>
  67 #include <dev/netif/bwi/bwimac.h>
  68 #include <dev/netif/bwi/bwirf.h>
  69
  70 struct bwi_clock_freq {
  71         u_int           clkfreq_min;
  72         u_int           clkfreq_max;
  73 };
  74
  75 struct bwi_myaddr_bssid {
  76         uint8_t         myaddr[IEEE80211_ADDR_LEN];
  77         uint8_t         bssid[IEEE80211_ADDR_LEN];
  78 } __packed;
  79
  80 static int      bwi_probe(device_t);
  81 static int      bwi_attach(device_t);
  82 static int      bwi_detach(device_t);
  83 static int      bwi_shutdown(device_t);
  84
  85 static void     bwi_init(void *);
  86 static int      bwi_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
  87 static void     bwi_start(struct ifnet *);
  88 static void     bwi_watchdog(struct ifnet *);
  89 static int      bwi_newstate(struct ieee80211com *, enum ieee80211_state, int);
  90 static void     bwi_updateslot(struct ifnet *);
  91 static int      bwi_media_change(struct ifnet *);
  92 static void     *bwi_ratectl_attach(struct ieee80211com *, u_int);
  93
  94 static void     bwi_next_scan(void *);
  95 static void     bwi_calibrate(void *);
  96
  97 static void     bwi_newstate_begin(struct bwi_softc *, enum ieee80211_state);
  98 static void     bwi_init_statechg(struct bwi_softc *, int);
  99 static int      bwi_stop(struct bwi_softc *, int);
 100 static int      bwi_newbuf(struct bwi_softc *, int, int);
 101 static int      bwi_encap(struct bwi_softc *, int, struct mbuf *,
 102                           struct ieee80211_node **, int);
 103
 104 static void     bwi_init_rxdesc_ring32(struct bwi_softc *, uint32_t,
 105                                        bus_addr_t, int, int);
 106 static void     bwi_reset_rx_ring32(struct bwi_softc *, uint32_t);
 107
 108 static int      bwi_init_tx_ring32(struct bwi_softc *, int);
 109 static int      bwi_init_rx_ring32(struct bwi_softc *);
 110 static int      bwi_init_txstats32(struct bwi_softc *);
 111 static void     bwi_free_tx_ring32(struct bwi_softc *, int);
 112 static void     bwi_free_rx_ring32(struct bwi_softc *);
 113 static void     bwi_free_txstats32(struct bwi_softc *);
 114 static void     bwi_setup_rx_desc32(struct bwi_softc *, int, bus_addr_t, int);
 115 static void     bwi_setup_tx_desc32(struct bwi_softc *, struct bwi_ring_data *,
 116                                     int, bus_addr_t, int);
 117 static int      bwi_rxeof32(struct bwi_softc *);
 118 static void     bwi_start_tx32(struct bwi_softc *, uint32_t, int);
 119 static void     bwi_txeof_status32(struct bwi_softc *);
 120
 121 static int      bwi_init_tx_ring64(struct bwi_softc *, int);
 122 static int      bwi_init_rx_ring64(struct bwi_softc *);
 123 static int      bwi_init_txstats64(struct bwi_softc *);
 124 static void     bwi_free_tx_ring64(struct bwi_softc *, int);
 125 static void     bwi_free_rx_ring64(struct bwi_softc *);
 126 static void     bwi_free_txstats64(struct bwi_softc *);
 127 static void     bwi_setup_rx_desc64(struct bwi_softc *, int, bus_addr_t, int);
 128 static void     bwi_setup_tx_desc64(struct bwi_softc *, struct bwi_ring_data *,
 129                                     int, bus_addr_t, int);
 130 static int      bwi_rxeof64(struct bwi_softc *);
 131 static void     bwi_start_tx64(struct bwi_softc *, uint32_t, int);
 132 static void     bwi_txeof_status64(struct bwi_softc *);
 133
 134 static void     bwi_intr(void *);
 135 static int      bwi_rxeof(struct bwi_softc *, int);
 136 static void     _bwi_txeof(struct bwi_softc *, uint16_t, int, int);
 137 static void     bwi_txeof(struct bwi_softc *);
 138 static void     bwi_txeof_status(struct bwi_softc *, int);
 139 static void     bwi_enable_intrs(struct bwi_softc *, uint32_t);
 140 static void     bwi_disable_intrs(struct bwi_softc *, uint32_t);
 141 static int      bwi_calc_rssi(struct bwi_softc *, const struct bwi_rxbuf_hdr *);
 142 static void     bwi_rx_radiotap(struct bwi_softc *, struct mbuf *,
 143                                 struct bwi_rxbuf_hdr *, const void *, int, int);
 144
 145 static int      bwi_dma_alloc(struct bwi_softc *);
 146 static void     bwi_dma_free(struct bwi_softc *);
 147 static int      bwi_dma_ring_alloc(struct bwi_softc *, bus_dma_tag_t,
 148                                    struct bwi_ring_data *, bus_size_t,
 149                                    uint32_t);
 150 static int      bwi_dma_mbuf_create(struct bwi_softc *);
 151 static void     bwi_dma_mbuf_destroy(struct bwi_softc *, int, int);
 152 static int      bwi_dma_txstats_alloc(struct bwi_softc *, uint32_t, bus_size_t);
 153 static void     bwi_dma_txstats_free(struct bwi_softc *);
 154 static void     bwi_dma_ring_addr(void *, bus_dma_segment_t *, int, int);
 155 static void     bwi_dma_buf_addr(void *, bus_dma_segment_t *, int,
 156                                  bus_size_t, int);
 157
 158 static void     bwi_power_on(struct bwi_softc *, int);
 159 static int      bwi_power_off(struct bwi_softc *, int);
 160 static int      bwi_set_clock_mode(struct bwi_softc *, enum bwi_clock_mode);
 161 static int      bwi_set_clock_delay(struct bwi_softc *);
 162 static void     bwi_get_clock_freq(struct bwi_softc *, struct bwi_clock_freq *);
 163 static int      bwi_get_pwron_delay(struct bwi_softc *sc);
 164 static void     bwi_set_addr_filter(struct bwi_softc *, uint16_t,
 165                                     const uint8_t *);
 166 static void     bwi_set_bssid(struct bwi_softc *, const uint8_t *);
 167 static int      bwi_set_chan(struct bwi_softc *, struct ieee80211_channel *);
 168
 169 static void     bwi_get_card_flags(struct bwi_softc *);
 170 static void     bwi_get_eaddr(struct bwi_softc *, uint16_t, uint8_t *);
 171
 172 static int      bwi_bus_attach(struct bwi_softc *);
 173 static int      bwi_bbp_attach(struct bwi_softc *);
 174 static int      bwi_bbp_power_on(struct bwi_softc *, enum bwi_clock_mode);
 175 static void     bwi_bbp_power_off(struct bwi_softc *);
 176
 177 static const char *bwi_regwin_name(const struct bwi_regwin *);
 178 static uint32_t bwi_regwin_disable_bits(struct bwi_softc *);
 179 static void     bwi_regwin_info(struct bwi_softc *, uint16_t *, uint8_t *);
 180 static int      bwi_regwin_select(struct bwi_softc *, int);
 181
 182 static void     bwi_led_attach(struct bwi_softc *);
 183 static void     bwi_led_newstate(struct bwi_softc *, enum ieee80211_state);
 184 static void     bwi_led_event(struct bwi_softc *, int);
 185 static void     bwi_led_blink_start(struct bwi_softc *, int, int);
 186 static void     bwi_led_blink_next(void *);
 187 static void     bwi_led_blink_end(void *);
 188
 189 static const struct bwi_dev {
 190         uint16_t        vid;
 191         uint16_t        did;
 192         const char      *desc;
 193 } bwi_devices[] = {
 194         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4301,
 195           "Broadcom BCM4301 802.11 Wireless Lan" },
 196
 197         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4307,
 198           "Broadcom BCM4307 802.11 Wireless Lan" },
 199
 200         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4311,
 201           "Broadcom BCM4311 802.11 Wireless Lan" },
 202
 203         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4312,
 204           "Broadcom BCM4312 802.11 Wireless Lan" },
 205
 206         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4306_1,
 207           "Broadcom BCM4306 802.11 Wireless Lan" },
 208
 209         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4306_2,
 210           "Broadcom BCM4306 802.11 Wireless Lan" },
 211
 212         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4306_3,
 213           "Broadcom BCM4306 802.11 Wireless Lan" },
 214
 215         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4309,
 216           "Broadcom BCM4309 802.11 Wireless Lan" },
 217
 218         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4318,
 219           "Broadcom BCM4318 802.11 Wireless Lan" },
 220
 221         { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4319,
 222           "Broadcom BCM4319 802.11 Wireless Lan" }
 223 };
 224
 225 static device_method_t bwi_methods[] = {
 226         DEVMETHOD(device_probe,         bwi_probe),
 227         DEVMETHOD(device_attach,        bwi_attach),
 228         DEVMETHOD(device_detach,        bwi_detach),
 229         DEVMETHOD(device_shutdown,      bwi_shutdown),
 230 #if 0
 231         DEVMETHOD(device_suspend,       bwi_suspend),
 232         DEVMETHOD(device_resume,        bwi_resume),
 233 #endif
 234         { 0, 0 }
 235 };
 236
 237 static driver_t bwi_driver = {
 238         "bwi",
 239         bwi_methods,
 240         sizeof(struct bwi_softc)
 241 };
 242
 243 static devclass_t bwi_devclass;
 244
 245 DRIVER_MODULE(bwi, pci, bwi_driver, bwi_devclass, NULL, NULL);
 246 DRIVER_MODULE(bwi, cardbus, bwi_driver, bwi_devclass, NULL, NULL);
 247
 248 MODULE_DEPEND(bwi, wlan, 1, 1, 1);
 249 MODULE_DEPEND(bwi, wlan_ratectl_onoe, 1, 1, 1);
 250 #if 0
 251 MODULE_DEPEND(bwi, wlan_ratectl_amrr, 1, 1, 1);
 252 #endif
 253 MODULE_DEPEND(bwi, pci, 1, 1, 1);
 254 MODULE_DEPEND(bwi, cardbus, 1, 1, 1);
 255
 256 static const struct {
 257         uint16_t        did_min;
 258         uint16_t        did_max;
 259         uint16_t        bbp_id;
 260 } bwi_bbpid_map[] = {
 261         { 0x4301, 0x4301, 0x4301 },
 262         { 0x4305, 0x4307, 0x4307 },
 263         { 0x4403, 0x4403, 0x4402 },
 264         { 0x4610, 0x4615, 0x4610 },
 265         { 0x4710, 0x4715, 0x4710 },
 266         { 0x4720, 0x4725, 0x4309 }
 267 };
 268
 269 static const struct {
 270         uint16_t        bbp_id;
 271         int             nregwin;
 272 } bwi_regwin_count[] = {
 273         { 0x4301, 5 },
 274         { 0x4306, 6 },
 275         { 0x4307, 5 },
 276         { 0x4310, 8 },
 277         { 0x4401, 3 },
 278         { 0x4402, 3 },
 279         { 0x4610, 9 },
 280         { 0x4704, 9 },
 281         { 0x4710, 9 },
 282         { 0x5365, 7 }
 283 };
 284
 285 #define CLKSRC(src)                             \
 286 [BWI_CLKSRC_ ## src] = {                        \
 287         .freq_min = BWI_CLKSRC_ ##src## _FMIN,  \
 288         .freq_max = BWI_CLKSRC_ ##src## _FMAX   \
 289 }
 290
 291 static const struct {
 292         u_int   freq_min;
 293         u_int   freq_max;
 294 } bwi_clkfreq[BWI_CLKSRC_MAX] = {
 295         CLKSRC(LP_OSC),
 296         CLKSRC(CS_OSC),
 297         CLKSRC(PCI)
 298 };
 299
 300 #undef CLKSRC
 301
 302 #define VENDOR_LED_ACT(vendor)                          \
 303 {                                                       \
 304         .vid = PCI_VENDOR_##vendor,                     \
 305         .led_act = { BWI_VENDOR_LED_ACT_##vendor }      \
 306 }
 307
 308 static const struct {
 309         uint16_t        vid;
 310         uint8_t         led_act[BWI_LED_MAX];
 311 } bwi_vendor_led_act[] = {
 312         VENDOR_LED_ACT(COMPAQ),
 313         VENDOR_LED_ACT(LINKSYS)
 314 };
 315
 316 static const uint8_t bwi_default_led_act[BWI_LED_MAX] =
 317         { BWI_VENDOR_LED_ACT_DEFAULT };
 318
 319 #undef VENDOR_LED_ACT
 320
 321 static const struct {
 322         int     on_dur;
 323         int     off_dur;
 324 } bwi_led_duration[109] = {
 325         [0]     = { 400, 100 },
 326         [2]     = { 150, 75 },
 327         [4]     = { 90, 45 },
 328         [11]    = { 66, 34 },
 329         [12]    = { 53, 26 },
 330         [18]    = { 42, 21 },
 331         [22]    = { 35, 17 },
 332         [24]    = { 32, 16 },
 333         [36]    = { 21, 10 },
 334         [48]    = { 16, 8 },
 335         [72]    = { 11, 5 },
 336         [96]    = { 9, 4 },
 337         [108]   = { 7, 3 }
 338 };
 339
 340 #ifdef BWI_DEBUG
 341 #ifdef BWI_DEBUG_VERBOSE
 342 static uint32_t bwi_debug = BWI_DBG_ATTACH | BWI_DBG_INIT | BWI_DBG_TXPOWER;
 343 #else
 344 static uint32_t bwi_debug;
 345 #endif
 346 TUNABLE_INT("hw.bwi.debug", (int *)&bwi_debug);
 347 #endif  /* BWI_DEBUG */
 348
 349 static const uint8_t bwi_zero_addr[IEEE80211_ADDR_LEN];
 350
 351 static const struct ieee80211_rateset bwi_rateset_11b =
 352         { 4, { 2, 4, 11, 22 } };
 353 static const struct ieee80211_rateset bwi_rateset_11g =
 354         { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
 355
 356 uint16_t
 357 bwi_read_sprom(struct bwi_softc *sc, uint16_t ofs)
 358 {
 359         return CSR_READ_2(sc, ofs + BWI_SPROM_START);
 360 }
 361
 362 static __inline void
 363 bwi_setup_desc32(struct bwi_softc *sc, struct bwi_desc32 *desc_array,
 364                  int ndesc, int desc_idx, bus_addr_t paddr, int buf_len,
 365                  int tx)
 366 {
 367         struct bwi_desc32 *desc = &desc_array[desc_idx];
 368         uint32_t ctrl, addr, addr_hi, addr_lo;
 369
 370         addr_lo = __SHIFTOUT(paddr, BWI_DESC32_A_ADDR_MASK);
 371         addr_hi = __SHIFTOUT(paddr, BWI_DESC32_A_FUNC_MASK);
 372
 373         addr = __SHIFTIN(addr_lo, BWI_DESC32_A_ADDR_MASK) |
 374                __SHIFTIN(BWI_DESC32_A_FUNC_TXRX, BWI_DESC32_A_FUNC_MASK);
 375
 376         ctrl = __SHIFTIN(buf_len, BWI_DESC32_C_BUFLEN_MASK) |
 377                __SHIFTIN(addr_hi, BWI_DESC32_C_ADDRHI_MASK);
 378         if (desc_idx == ndesc - 1)
 379                 ctrl |= BWI_DESC32_C_EOR;
 380         if (tx) {
 381                 /* XXX */
 382                 ctrl |= BWI_DESC32_C_FRAME_START |
 383                         BWI_DESC32_C_FRAME_END |
 384                         BWI_DESC32_C_INTR;
 385         }
 386
 387         desc->addr = htole32(addr);
 388         desc->ctrl = htole32(ctrl);
 389 }
 390
 391 /* XXX does not belong here */
 392 uint8_t
 393 bwi_rate2plcp(uint8_t rate)
 394 {
 395         rate &= IEEE80211_RATE_VAL;
 396
 397         switch (rate) {
 398         case 2:         return 0xa;
 399         case 4:         return 0x14;
 400         case 11:        return 0x37;
 401         case 22:        return 0x6e;
 402         case 44:        return 0xdc;
 403
 404         case 12:        return 0xb;
 405         case 18:        return 0xf;
 406         case 24:        return 0xa;
 407         case 36:        return 0xe;
 408         case 48:        return 0x9;
 409         case 72:        return 0xd;
 410         case 96:        return 0x8;
 411         case 108:       return 0xc;
 412
 413         default:
 414                 panic("unsupported rate %u", rate);
 415         }
 416 }
 417
 418 /* XXX does not belong here */
 419 #define IEEE80211_OFDM_PLCP_RATE_MASK   __BITS(3, 0)
 420 #define IEEE80211_OFDM_PLCP_LEN_MASK    __BITS(16, 5)
 421
 422 static __inline void
 423 bwi_ofdm_plcp_header(uint32_t *plcp0, int pkt_len, uint8_t rate)
 424 {
 425         uint32_t plcp;
 426
 427         plcp = __SHIFTIN(bwi_rate2plcp(rate), IEEE80211_OFDM_PLCP_RATE_MASK) |
 428                __SHIFTIN(pkt_len, IEEE80211_OFDM_PLCP_LEN_MASK);
 429         *plcp0 = htole32(plcp);
 430 }
 431
 432 /* XXX does not belong here */
 433 struct ieee80211_ds_plcp_hdr {
 434         uint8_t         i_signal;
 435         uint8_t         i_service;
 436         uint16_t        i_length;
 437         uint16_t        i_crc;
 438 } __packed;
 439
 440 #define IEEE80211_DS_PLCP_SERVICE_LOCKED        0x04
 441 #define IEEE80211_DS_PLCL_SERVICE_PBCC          0x08
 442 #define IEEE80211_DS_PLCP_SERVICE_LENEXT5       0x20
 443 #define IEEE80211_DS_PLCP_SERVICE_LENEXT6       0x40
 444 #define IEEE80211_DS_PLCP_SERVICE_LENEXT7       0x80
 445
 446 static __inline void
 447 bwi_ds_plcp_header(struct ieee80211_ds_plcp_hdr *plcp, int pkt_len,
 448                    uint8_t rate)
 449 {
 450         int len, service, pkt_bitlen;
 451
 452         pkt_bitlen = pkt_len * NBBY;
 453         len = howmany(pkt_bitlen * 2, rate);
 454
 455         service = IEEE80211_DS_PLCP_SERVICE_LOCKED;
 456         if (rate == (11 * 2)) {
 457                 int pkt_bitlen1;
 458
 459                 /*
 460                  * PLCP service field needs to be adjusted,
 461                  * if TX rate is 11Mbytes/s
 462                  */
 463                 pkt_bitlen1 = len * 11;
 464                 if (pkt_bitlen1 - pkt_bitlen >= NBBY)
 465                         service |= IEEE80211_DS_PLCP_SERVICE_LENEXT7;
 466         }
 467
 468         plcp->i_signal = bwi_rate2plcp(rate);
 469         plcp->i_service = service;
 470         plcp->i_length = htole16(len);
 471         /* NOTE: do NOT touch i_crc */
 472 }
 473
 474 static __inline void
 475 bwi_plcp_header(void *plcp, int pkt_len, uint8_t rate)
 476 {
 477         enum ieee80211_modtype modtype;
 478
 479         /*
 480          * Assume caller has zeroed 'plcp'
 481          */
 482
 483         modtype = ieee80211_rate2modtype(rate);
 484         if (modtype == IEEE80211_MODTYPE_OFDM)
 485                 bwi_ofdm_plcp_header(plcp, pkt_len, rate);
 486         else if (modtype == IEEE80211_MODTYPE_DS)
 487                 bwi_ds_plcp_header(plcp, pkt_len, rate);
 488         else
 489                 panic("unsupport modulation type %u", modtype);
 490 }
 491
 492 static __inline uint8_t
 493 bwi_ofdm_plcp2rate(const uint32_t *plcp0)
 494 {
 495         uint32_t plcp;
 496         uint8_t plcp_rate;
 497
 498         plcp = le32toh(*plcp0);
 499         plcp_rate = __SHIFTOUT(plcp, IEEE80211_OFDM_PLCP_RATE_MASK);
 500         return ieee80211_plcp2rate(plcp_rate, 1);
 501 }
 502
 503 static __inline uint8_t
 504 bwi_ds_plcp2rate(const struct ieee80211_ds_plcp_hdr *hdr)
 505 {
 506         return ieee80211_plcp2rate(hdr->i_signal, 0);
 507 }
 508
 509 static int
 510 bwi_probe(device_t dev)
 511 {
 512         const struct bwi_dev *b;
 513         uint16_t did, vid;
 514
 515         did = pci_get_device(dev);
 516         vid = pci_get_vendor(dev);
 517
 518         for (b = bwi_devices; b->desc != NULL; ++b) {
 519                 if (b->did == did && b->vid == vid) {
 520                         device_set_desc(dev, b->desc);
 521                         return 0;
 522                 }
 523         }
 524         return ENXIO;
 525 }
 526
 527 static int
 528 bwi_attach(device_t dev)
 529 {
 530         struct bwi_softc *sc = device_get_softc(dev);
 531         struct ieee80211com *ic = &sc->sc_ic;
 532         struct ifnet *ifp = &ic->ic_if;
 533         struct bwi_mac *mac;
 534         struct bwi_phy *phy;
 535         int i, error;
 536
 537         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
 538         sc->sc_dev = dev;
 539
 540         /*
 541          * Initialize sysctl variables
 542          */
 543         sc->sc_fw_version = BWI_FW_VERSION3;
 544         sc->sc_dwell_time = 200;
 545         sc->sc_led_idle = (2350 * hz) / 1000;
 546         sc->sc_led_blink = 1;
 547         sc->sc_txpwr_calib = 1;
 548 #ifdef BWI_DEBUG
 549         sc->sc_debug = bwi_debug;
 550 #endif
 551
 552         callout_init(&sc->sc_scan_ch);
 553         callout_init(&sc->sc_calib_ch);
 554
 555 #ifndef BURN_BRIDGES
 556         if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
 557                 uint32_t irq, mem;
 558
 559                 /* XXX Save more PCIR */
 560                 irq = pci_read_config(dev, PCIR_INTLINE, 4);
 561                 mem = pci_read_config(dev, BWI_PCIR_BAR, 4);
 562
 563                 device_printf(dev, "chip is in D%d power mode "
 564                     "-- setting to D0\n", pci_get_powerstate(dev));
 565
 566                 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
 567
 568                 pci_write_config(dev, PCIR_INTLINE, irq, 4);
 569                 pci_write_config(dev, BWI_PCIR_BAR, mem, 4);
 570         }
 571 #endif  /* !BURN_BRIDGE */
 572
 573         pci_enable_busmaster(dev);
 574
 575         /* Get more PCI information */
 576         sc->sc_pci_revid = pci_get_revid(dev);
 577         sc->sc_pci_subvid = pci_get_subvendor(dev);
 578         sc->sc_pci_subdid = pci_get_subdevice(dev);
 579
 580         /*
 581          * Allocate IO memory
 582          */
 583         sc->sc_mem_rid = BWI_PCIR_BAR;
 584         sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 585                                                 &sc->sc_mem_rid, RF_ACTIVE);
 586         if (sc->sc_mem_res == NULL) {
 587                 device_printf(dev, "can't allocate IO memory\n");
 588                 return ENXIO;
 589         }
 590         sc->sc_mem_bt = rman_get_bustag(sc->sc_mem_res);
 591         sc->sc_mem_bh = rman_get_bushandle(sc->sc_mem_res);
 592
 593         /*
 594          * Allocate IRQ
 595          */
 596         sc->sc_irq_rid = 0;
 597         sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
 598                                                 &sc->sc_irq_rid,
 599                                                 RF_SHAREABLE | RF_ACTIVE);
 600         if (sc->sc_irq_res == NULL) {
 601                 device_printf(dev, "can't allocate irq\n");
 602                 error = ENXIO;
 603                 goto fail;
 604         }
 605
 606         /*
 607          * Create sysctl tree
 608          */
 609         sysctl_ctx_init(&sc->sc_sysctl_ctx);
 610         sc->sc_sysctl_tree = SYSCTL_ADD_NODE(&sc->sc_sysctl_ctx,
 611                                              SYSCTL_STATIC_CHILDREN(_hw),
 612                                              OID_AUTO,
 613                                              device_get_nameunit(dev),
 614                                              CTLFLAG_RD, 0, "");
 615         if (sc->sc_sysctl_tree == NULL) {
 616                 device_printf(dev, "can't add sysctl node\n");
 617                 error = ENXIO;
 618                 goto fail;
 619         }
 620
 621         SYSCTL_ADD_UINT(&sc->sc_sysctl_ctx,
 622                         SYSCTL_CHILDREN(sc->sc_sysctl_tree), OID_AUTO,
 623                         "dwell_time", CTLFLAG_RW, &sc->sc_dwell_time, 0,
 624                         "Channel dwell time during scan (msec)");
 625         SYSCTL_ADD_UINT(&sc->sc_sysctl_ctx,
 626                         SYSCTL_CHILDREN(sc->sc_sysctl_tree), OID_AUTO,
 627                         "fw_version", CTLFLAG_RD, &sc->sc_fw_version, 0,
 628                         "Firmware version");
 629         SYSCTL_ADD_UINT(&sc->sc_sysctl_ctx,
 630                         SYSCTL_CHILDREN(sc->sc_sysctl_tree), OID_AUTO,
 631                         "led_idle", CTLFLAG_RW, &sc->sc_led_idle, 0,
 632                         "# ticks before LED enters idle state");
 633         SYSCTL_ADD_INT(&sc->sc_sysctl_ctx,
 634                        SYSCTL_CHILDREN(sc->sc_sysctl_tree), OID_AUTO,
 635                        "led_blink", CTLFLAG_RW, &sc->sc_led_blink, 0,
 636                        "Allow LED to blink");
 637         SYSCTL_ADD_INT(&sc->sc_sysctl_ctx,
 638                        SYSCTL_CHILDREN(sc->sc_sysctl_tree), OID_AUTO,
 639                        "txpwr_calib", CTLFLAG_RW, &sc->sc_txpwr_calib, 0,
 640                        "Enable software TX power calibration");
 641 #ifdef BWI_DEBUG
 642         SYSCTL_ADD_UINT(&sc->sc_sysctl_ctx,
 643                         SYSCTL_CHILDREN(sc->sc_sysctl_tree), OID_AUTO,
 644                         "debug", CTLFLAG_RW, &sc->sc_debug, 0, "Debug flags");
 645 #endif
 646
 647         bwi_power_on(sc, 1);
 648
 649         error = bwi_bbp_attach(sc);
 650         if (error)
 651                 goto fail;
 652
 653         error = bwi_bbp_power_on(sc, BWI_CLOCK_MODE_FAST);
 654         if (error)
 655                 goto fail;
 656
 657         if (BWI_REGWIN_EXIST(&sc->sc_com_regwin)) {
 658                 error = bwi_set_clock_delay(sc);
 659                 if (error)
 660                         goto fail;
 661
 662                 error = bwi_set_clock_mode(sc, BWI_CLOCK_MODE_FAST);
 663                 if (error)
 664                         goto fail;
 665
 666                 error = bwi_get_pwron_delay(sc);
 667                 if (error)
 668                         goto fail;
 669         }
 670
 671         error = bwi_bus_attach(sc);
 672         if (error)
 673                 goto fail;
 674
 675         bwi_get_card_flags(sc);
 676
 677         bwi_led_attach(sc);
 678
 679         for (i = 0; i < sc->sc_nmac; ++i) {
 680                 struct bwi_regwin *old;
 681
 682                 mac = &sc->sc_mac[i];
 683                 error = bwi_regwin_switch(sc, &mac->mac_regwin, &old);
 684                 if (error)
 685                         goto fail;
 686
 687                 error = bwi_mac_lateattach(mac);
 688                 if (error)
 689                         goto fail;
 690
 691                 error = bwi_regwin_switch(sc, old, NULL);
 692                 if (error)
 693                         goto fail;
 694         }
 695
 696         /*
 697          * XXX First MAC is known to exist
 698          * TODO2
 699          */
 700         mac = &sc->sc_mac[0];
 701         phy = &mac->mac_phy;
 702
 703         bwi_bbp_power_off(sc);
 704
 705         error = bwi_dma_alloc(sc);
 706         if (error)
 707                 goto fail;
 708
 709         ifp->if_softc = sc;
 710         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 711         ifp->if_init = bwi_init;
 712         ifp->if_ioctl = bwi_ioctl;
 713         ifp->if_start = bwi_start;
 714         ifp->if_watchdog = bwi_watchdog;
 715         ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
 716         ifq_set_ready(&ifp->if_snd);
 717
 718         /* Get locale */
 719         sc->sc_locale = __SHIFTOUT(bwi_read_sprom(sc, BWI_SPROM_CARD_INFO),
 720                                    BWI_SPROM_CARD_INFO_LOCALE);
 721         DPRINTF(sc, BWI_DBG_ATTACH, "locale: %d\n", sc->sc_locale);
 722
 723         /*
 724          * Setup ratesets, phytype, channels and get MAC address
 725          */
 726         if (phy->phy_mode == IEEE80211_MODE_11B ||
 727             phy->phy_mode == IEEE80211_MODE_11G) {
 728                 uint16_t chan_flags;
 729
 730                 ic->ic_sup_rates[IEEE80211_MODE_11B] = bwi_rateset_11b;
 731
 732                 if (phy->phy_mode == IEEE80211_MODE_11B) {
 733                         chan_flags = IEEE80211_CHAN_B;
 734                         ic->ic_phytype = IEEE80211_T_DS;
 735                 } else {
 736                         chan_flags = IEEE80211_CHAN_CCK |
 737                                      IEEE80211_CHAN_OFDM |
 738                                      IEEE80211_CHAN_DYN |
 739                                      IEEE80211_CHAN_2GHZ;
 740                         ic->ic_phytype = IEEE80211_T_OFDM;
 741                         ic->ic_sup_rates[IEEE80211_MODE_11G] =
 742                                 bwi_rateset_11g;
 743                 }
 744
 745                 /* XXX depend on locale */
 746                 for (i = 1; i <= 14; ++i) {
 747                         ic->ic_channels[i].ic_freq =
 748                                 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
 749                         ic->ic_channels[i].ic_flags = chan_flags;
 750                 }
 751
 752                 bwi_get_eaddr(sc, BWI_SPROM_11BG_EADDR, ic->ic_myaddr);
 753                 if (IEEE80211_IS_MULTICAST(ic->ic_myaddr)) {
 754                         bwi_get_eaddr(sc, BWI_SPROM_11A_EADDR, ic->ic_myaddr);
 755                         if (IEEE80211_IS_MULTICAST(ic->ic_myaddr)) {
 756                                 device_printf(dev, "invalid MAC address: "
 757                                         "%6D\n", ic->ic_myaddr, ":");
 758                         }
 759                 }
 760         } else if (phy->phy_mode == IEEE80211_MODE_11A) {
 761                 /* TODO:11A */
 762                 error = ENXIO;
 763                 goto fail;
 764         } else {
 765                 panic("unknown phymode %d", phy->phy_mode);
 766         }
 767
 768         ic->ic_caps = IEEE80211_C_SHSLOT |
 769                       IEEE80211_C_SHPREAMBLE |
 770                       IEEE80211_C_WPA |
 771                       IEEE80211_C_MONITOR;
 772         ic->ic_state = IEEE80211_S_INIT;
 773         ic->ic_opmode = IEEE80211_M_STA;
 774
 775         IEEE80211_ONOE_PARAM_SETUP(&sc->sc_onoe_param);
 776         ic->ic_ratectl.rc_st_ratectl_cap = IEEE80211_RATECTL_CAP_ONOE;
 777         ic->ic_ratectl.rc_st_ratectl = IEEE80211_RATECTL_ONOE;
 778         ic->ic_ratectl.rc_st_attach = bwi_ratectl_attach;
 779
 780         ic->ic_updateslot = bwi_updateslot;
 781
 782         ieee80211_ifattach(ic);
 783
 784         ic->ic_headroom = sizeof(struct bwi_txbuf_hdr);
 785         ic->ic_flags_ext |= IEEE80211_FEXT_SWBMISS;
 786
 787         sc->sc_newstate = ic->ic_newstate;
 788         ic->ic_newstate = bwi_newstate;
 789
 790         ieee80211_media_init(ic, bwi_media_change, ieee80211_media_status);
 791
 792         /*
 793          * Attach radio tap
 794          */
 795         bpfattach_dlt(ifp, DLT_IEEE802_11_RADIO,
 796                       sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th),
 797                       &sc->sc_drvbpf);
 798
 799         sc->sc_tx_th_len = roundup(sizeof(sc->sc_tx_th), sizeof(uint32_t));
 800         sc->sc_tx_th.wt_ihdr.it_len = htole16(sc->sc_tx_th_len);
 801         sc->sc_tx_th.wt_ihdr.it_present = htole32(BWI_TX_RADIOTAP_PRESENT);
 802
 803         sc->sc_rx_th_len = roundup(sizeof(sc->sc_rx_th), sizeof(uint32_t));
 804         sc->sc_rx_th.wr_ihdr.it_len = htole16(sc->sc_rx_th_len);
 805         sc->sc_rx_th.wr_ihdr.it_present = htole32(BWI_RX_RADIOTAP_PRESENT);
 806
 807         error = bus_setup_intr(dev, sc->sc_irq_res, INTR_MPSAFE, bwi_intr, sc,
 808                                &sc->sc_irq_handle, ifp->if_serializer);
 809         if (error) {
 810                 device_printf(dev, "can't setup intr\n");
 811                 bpfdetach(ifp);
 812                 ieee80211_ifdetach(ic);
 813                 goto fail;
 814         }
 815
 816         ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(sc->sc_irq_res));
 817
 818         if (bootverbose)
 819                 ieee80211_announce(ic);
 820
 821         return 0;
 822 fail:
 823         bwi_detach(dev);
 824         return error;
 825 }
 826
 827 static int
 828 bwi_detach(device_t dev)
 829 {
 830         struct bwi_softc *sc = device_get_softc(dev);
 831
 832         if (device_is_attached(dev)) {
 833                 struct ifnet *ifp = &sc->sc_ic.ic_if;
 834                 int i;
 835
 836                 lwkt_serialize_enter(ifp->if_serializer);
 837                 bwi_stop(sc, 1);
 838                 bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_irq_handle);
 839                 lwkt_serialize_exit(ifp->if_serializer);
 840
 841                 bpfdetach(ifp);
 842                 ieee80211_ifdetach(&sc->sc_ic);
 843
 844                 for (i = 0; i < sc->sc_nmac; ++i)
 845                         bwi_mac_detach(&sc->sc_mac[i]);
 846         }
 847
 848         if (sc->sc_sysctl_tree != NULL)
 849                 sysctl_ctx_free(&sc->sc_sysctl_ctx);
 850
 851         if (sc->sc_irq_res != NULL) {
 852                 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid,
 853                                      sc->sc_irq_res);
 854         }
 855
 856         if (sc->sc_mem_res != NULL) {
 857                 bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mem_rid,
 858                                      sc->sc_mem_res);
 859         }
 860
 861         bwi_dma_free(sc);
 862
 863         return 0;
 864 }
 865
 866 static int
 867 bwi_shutdown(device_t dev)
 868 {
 869         struct bwi_softc *sc = device_get_softc(dev);
 870         struct ifnet *ifp = &sc->sc_ic.ic_if;
 871
 872         lwkt_serialize_enter(ifp->if_serializer);
 873         bwi_stop(sc, 1);
 874         lwkt_serialize_exit(ifp->if_serializer);
 875         return 0;
 876 }
 877
 878 static void
 879 bwi_power_on(struct bwi_softc *sc, int with_pll)
 880 {
 881         uint32_t gpio_in, gpio_out, gpio_en;
 882         uint16_t status;
 883
 884         gpio_in = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_IN, 4);
 885         if (gpio_in & BWI_PCIM_GPIO_PWR_ON)
 886                 goto back;
 887
 888         gpio_out = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, 4);
 889         gpio_en = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_ENABLE, 4);
 890
 891         gpio_out |= BWI_PCIM_GPIO_PWR_ON;
 892         gpio_en |= BWI_PCIM_GPIO_PWR_ON;
 893         if (with_pll) {
 894                 /* Turn off PLL first */
 895                 gpio_out |= BWI_PCIM_GPIO_PLL_PWR_OFF;
 896                 gpio_en |= BWI_PCIM_GPIO_PLL_PWR_OFF;
 897         }
 898
 899         pci_write_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, gpio_out, 4);
 900         pci_write_config(sc->sc_dev, BWI_PCIR_GPIO_ENABLE, gpio_en, 4);
 901         DELAY(1000);
 902
 903         if (with_pll) {
 904                 /* Turn on PLL */
 905                 gpio_out &= ~BWI_PCIM_GPIO_PLL_PWR_OFF;
 906                 pci_write_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, gpio_out, 4);
 907                 DELAY(5000);
 908         }
 909
 910 back:
 911         /* Clear "Signaled Target Abort" */
 912         status = pci_read_config(sc->sc_dev, PCIR_STATUS, 2);
 913         status &= ~PCIM_STATUS_STABORT;
 914         pci_write_config(sc->sc_dev, PCIR_STATUS, status, 2);
 915 }
 916
 917 static int
 918 bwi_power_off(struct bwi_softc *sc, int with_pll)
 919 {
 920         uint32_t gpio_out, gpio_en;
 921
 922         pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_IN, 4); /* dummy read */
 923         gpio_out = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, 4);
 924         gpio_en = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_ENABLE, 4);
 925
 926         gpio_out &= ~BWI_PCIM_GPIO_PWR_ON;
 927         gpio_en |= BWI_PCIM_GPIO_PWR_ON;
 928         if (with_pll) {
 929                 gpio_out |= BWI_PCIM_GPIO_PLL_PWR_OFF;
 930                 gpio_en |= BWI_PCIM_GPIO_PLL_PWR_OFF;
 931         }
 932
 933         pci_write_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, gpio_out, 4);
 934         pci_write_config(sc->sc_dev, BWI_PCIR_GPIO_ENABLE, gpio_en, 4);
 935         return 0;
 936 }
 937
 938 int
 939 bwi_regwin_switch(struct bwi_softc *sc, struct bwi_regwin *rw,
 940                   struct bwi_regwin **old_rw)
 941 {
 942         int error;
 943
 944         if (old_rw != NULL)
 945                 *old_rw = NULL;
 946
 947         if (!BWI_REGWIN_EXIST(rw))
 948                 return EINVAL;
 949
 950         if (sc->sc_cur_regwin != rw) {
 951                 error = bwi_regwin_select(sc, rw->rw_id);
 952                 if (error) {
 953                         if_printf(&sc->sc_ic.ic_if, "can't select regwin %d\n",
 954                                   rw->rw_id);
 955                         return error;
 956                 }
 957         }
 958
 959         if (old_rw != NULL)
 960                 *old_rw = sc->sc_cur_regwin;
 961         sc->sc_cur_regwin = rw;
 962         return 0;
 963 }
 964
 965 static int
 966 bwi_regwin_select(struct bwi_softc *sc, int id)
 967 {
 968         uint32_t win = BWI_PCIM_REGWIN(id);
 969         int i;
 970
 971 #define RETRY_MAX       50
 972         for (i = 0; i < RETRY_MAX; ++i) {
 973                 pci_write_config(sc->sc_dev, BWI_PCIR_SEL_REGWIN, win, 4);
 974                 if (pci_read_config(sc->sc_dev, BWI_PCIR_SEL_REGWIN, 4) == win)
 975                         return 0;
 976                 DELAY(10);
 977         }
 978 #undef RETRY_MAX
 979
 980         return ENXIO;
 981 }
 982
 983 static void
 984 bwi_regwin_info(struct bwi_softc *sc, uint16_t *type, uint8_t *rev)
 985 {
 986         uint32_t val;
 987
 988         val = CSR_READ_4(sc, BWI_ID_HI);
 989         *type = BWI_ID_HI_REGWIN_TYPE(val);
 990         *rev = BWI_ID_HI_REGWIN_REV(val);
 991
 992         DPRINTF(sc, BWI_DBG_ATTACH, "regwin: type 0x%03x, rev %d, "
 993                 "vendor 0x%04x\n", *type, *rev,
 994                 __SHIFTOUT(val, BWI_ID_HI_REGWIN_VENDOR_MASK));
 995 }
 996
 997 static int
 998 bwi_bbp_attach(struct bwi_softc *sc)
 999 {
1000         uint16_t bbp_id, rw_type;
1001         uint8_t rw_rev;
1002         uint32_t info;
1003         int error, nregwin, i;
1004
1005         /*
1006          * Get 0th regwin information
1007          * NOTE: 0th regwin should exist
1008          */
1009         error = bwi_regwin_select(sc, 0);
1010         if (error) {
1011                 device_printf(sc->sc_dev, "can't select regwin 0\n");
1012                 return error;
1013         }
1014         bwi_regwin_info(sc, &rw_type, &rw_rev);
1015
1016         /*
1017          * Find out BBP id
1018          */
1019         bbp_id = 0;
1020         info = 0;
1021         if (rw_type == BWI_REGWIN_T_COM) {
1022                 info = CSR_READ_4(sc, BWI_INFO);
1023                 bbp_id = __SHIFTOUT(info, BWI_INFO_BBPID_MASK);
1024
1025                 BWI_CREATE_REGWIN(&sc->sc_com_regwin, 0, rw_type, rw_rev);
1026
1027                 sc->sc_cap = CSR_READ_4(sc, BWI_CAPABILITY);
1028         } else {
1029                 uint16_t did = pci_get_device(sc->sc_dev);
1030                 uint8_t revid = pci_get_revid(sc->sc_dev);
1031
1032                 for (i = 0; i < NELEM(bwi_bbpid_map); ++i) {
1033                         if (did >= bwi_bbpid_map[i].did_min &&
1034                             did <= bwi_bbpid_map[i].did_max) {
1035                                 bbp_id = bwi_bbpid_map[i].bbp_id;
1036                                 break;
1037                         }
1038                 }
1039                 if (bbp_id == 0) {
1040                         device_printf(sc->sc_dev, "no BBP id for device id "
1041                                       "0x%04x\n", did);
1042                         return ENXIO;
1043                 }
1044
1045                 info = __SHIFTIN(revid, BWI_INFO_BBPREV_MASK) |
1046                        __SHIFTIN(0, BWI_INFO_BBPPKG_MASK);
1047         }
1048
1049         /*
1050          * Find out number of regwins
1051          */
1052         nregwin = 0;
1053         if (rw_type == BWI_REGWIN_T_COM && rw_rev >= 4) {
1054                 nregwin = __SHIFTOUT(info, BWI_INFO_NREGWIN_MASK);
1055         } else {
1056                 for (i = 0; i < NELEM(bwi_regwin_count); ++i) {
1057                         if (bwi_regwin_count[i].bbp_id == bbp_id) {
1058                                 nregwin = bwi_regwin_count[i].nregwin;
1059                                 break;
1060                         }
1061                 }
1062                 if (nregwin == 0) {
1063                         device_printf(sc->sc_dev, "no number of win for "
1064                                       "BBP id 0x%04x\n", bbp_id);
1065                         return ENXIO;
1066                 }
1067         }
1068
1069         /* Record BBP id/rev for later using */
1070         sc->sc_bbp_id = bbp_id;
1071         sc->sc_bbp_rev = __SHIFTOUT(info, BWI_INFO_BBPREV_MASK);
1072         sc->sc_bbp_pkg = __SHIFTOUT(info, BWI_INFO_BBPPKG_MASK);
1073         device_printf(sc->sc_dev, "BBP: id 0x%04x, rev 0x%x, pkg %d\n",
1074                       sc->sc_bbp_id, sc->sc_bbp_rev, sc->sc_bbp_pkg);
1075
1076         DPRINTF(sc, BWI_DBG_ATTACH, "nregwin %d, cap 0x%08x\n",
1077                 nregwin, sc->sc_cap);
1078
1079         /*
1080          * Create rest of the regwins
1081          */
1082
1083         /* Don't re-create common regwin, if it is already created */
1084         i = BWI_REGWIN_EXIST(&sc->sc_com_regwin) ? 1 : 0;
1085
1086         for (; i < nregwin; ++i) {
1087                 /*
1088                  * Get regwin information
1089                  */
1090                 error = bwi_regwin_select(sc, i);
1091                 if (error) {
1092                         device_printf(sc->sc_dev,
1093                                       "can't select regwin %d\n", i);
1094                         return error;
1095                 }
1096                 bwi_regwin_info(sc, &rw_type, &rw_rev);
1097
1098                 /*
1099                  * Try attach:
1100                  * 1) Bus (PCI/PCIE) regwin
1101                  * 2) MAC regwin
1102                  * Ignore rest types of regwin
1103                  */
1104                 if (rw_type == BWI_REGWIN_T_BUSPCI ||
1105                     rw_type == BWI_REGWIN_T_BUSPCIE) {
1106                         if (BWI_REGWIN_EXIST(&sc->sc_bus_regwin)) {
1107                                 device_printf(sc->sc_dev,
1108                                               "bus regwin already exists\n");
1109                         } else {
1110                                 BWI_CREATE_REGWIN(&sc->sc_bus_regwin, i,
1111                                                   rw_type, rw_rev);
1112                         }
1113                 } else if (rw_type == BWI_REGWIN_T_MAC) {
1114                         /* XXX ignore return value */
1115                         bwi_mac_attach(sc, i, rw_rev);
1116                 }
1117         }
1118
1119         /* At least one MAC shold exist */
1120         if (!BWI_REGWIN_EXIST(&sc->sc_mac[0].mac_regwin)) {
1121                 device_printf(sc->sc_dev, "no MAC was found\n");
1122                 return ENXIO;
1123         }
1124         KKASSERT(sc->sc_nmac > 0);
1125
1126         /* Bus regwin must exist */
1127         if (!BWI_REGWIN_EXIST(&sc->sc_bus_regwin)) {
1128                 device_printf(sc->sc_dev, "no bus regwin was found\n");
1129                 return ENXIO;
1130         }
1131
1132         /* Start with first MAC */
1133         error = bwi_regwin_switch(sc, &sc->sc_mac[0].mac_regwin, NULL);
1134         if (error)
1135                 return error;
1136
1137         return 0;
1138 }
1139
1140 int
1141 bwi_bus_init(struct bwi_softc *sc, struct bwi_mac *mac)
1142 {
1143         struct bwi_regwin *old, *bus;
1144         uint32_t val;
1145         int error;
1146
1147         bus = &sc->sc_bus_regwin;
1148         KKASSERT(sc->sc_cur_regwin == &mac->mac_regwin);
1149
1150         /*
1151          * Tell bus to generate requested interrupts
1152          */
1153         if (bus->rw_rev < 6 && bus->rw_type == BWI_REGWIN_T_BUSPCI) {
1154                 /*
1155                  * NOTE: Read BWI_FLAGS from MAC regwin
1156                  */
1157                 val = CSR_READ_4(sc, BWI_FLAGS);
1158
1159                 error = bwi_regwin_switch(sc, bus, &old);
1160                 if (error)
1161                         return error;
1162
1163                 CSR_SETBITS_4(sc, BWI_INTRVEC, (val & BWI_FLAGS_INTR_MASK));
1164         } else {
1165                 uint32_t mac_mask;
1166
1167                 mac_mask = 1 << mac->mac_id;
1168
1169                 error = bwi_regwin_switch(sc, bus, &old);
1170                 if (error)
1171                         return error;
1172
1173                 val = pci_read_config(sc->sc_dev, BWI_PCIR_INTCTL, 4);
1174                 val |= mac_mask << 8;
1175                 pci_write_config(sc->sc_dev, BWI_PCIR_INTCTL, val, 4);
1176         }
1177
1178         if (sc->sc_flags & BWI_F_BUS_INITED)
1179                 goto back;
1180
1181         if (bus->rw_type == BWI_REGWIN_T_BUSPCI) {
1182                 /*
1183                  * Enable prefetch and burst
1184                  */
1185                 CSR_SETBITS_4(sc, BWI_BUS_CONFIG,
1186                               BWI_BUS_CONFIG_PREFETCH | BWI_BUS_CONFIG_BURST);
1187
1188                 if (bus->rw_rev < 5) {
1189                         struct bwi_regwin *com = &sc->sc_com_regwin;
1190
1191                         /*
1192                          * Configure timeouts for bus operation
1193                          */
1194
1195                         /*
1196                          * Set service timeout and request timeout
1197                          */
1198                         CSR_SETBITS_4(sc, BWI_CONF_LO,
1199                         __SHIFTIN(BWI_CONF_LO_SERVTO, BWI_CONF_LO_SERVTO_MASK) |
1200                         __SHIFTIN(BWI_CONF_LO_REQTO, BWI_CONF_LO_REQTO_MASK));
1201
1202                         /*
1203                          * If there is common regwin, we switch to that regwin
1204                          * and switch back to bus regwin once we have done.
1205                          */
1206                         if (BWI_REGWIN_EXIST(com)) {
1207                                 error = bwi_regwin_switch(sc, com, NULL);
1208                                 if (error)
1209                                         return error;
1210                         }
1211
1212                         /* Let bus know what we have changed */
1213                         CSR_WRITE_4(sc, BWI_BUS_ADDR, BWI_BUS_ADDR_MAGIC);
1214                         CSR_READ_4(sc, BWI_BUS_ADDR); /* Flush */
1215                         CSR_WRITE_4(sc, BWI_BUS_DATA, 0);
1216                         CSR_READ_4(sc, BWI_BUS_DATA); /* Flush */
1217
1218                         if (BWI_REGWIN_EXIST(com)) {
1219                                 error = bwi_regwin_switch(sc, bus, NULL);
1220                                 if (error)
1221                                         return error;
1222                         }
1223                 } else if (bus->rw_rev >= 11) {
1224                         /*
1225                          * Enable memory read multiple
1226                          */
1227                         CSR_SETBITS_4(sc, BWI_BUS_CONFIG, BWI_BUS_CONFIG_MRM);
1228                 }
1229         } else {
1230                 /* TODO:PCIE */
1231         }
1232
1233         sc->sc_flags |= BWI_F_BUS_INITED;
1234 back:
1235         return bwi_regwin_switch(sc, old, NULL);
1236 }
1237
1238 static void
1239 bwi_get_card_flags(struct bwi_softc *sc)
1240 {
1241         sc->sc_card_flags = bwi_read_sprom(sc, BWI_SPROM_CARD_FLAGS);
1242         if (sc->sc_card_flags == 0xffff)
1243                 sc->sc_card_flags = 0;
1244
1245         if (sc->sc_pci_subvid == PCI_VENDOR_APPLE &&
1246             sc->sc_pci_subdid == 0x4e && /* XXX */
1247             sc->sc_pci_revid > 0x40)
1248                 sc->sc_card_flags |= BWI_CARD_F_PA_GPIO9;
1249
1250         DPRINTF(sc, BWI_DBG_ATTACH, "card flags 0x%04x\n", sc->sc_card_flags);
1251 }
1252
1253 static void
1254 bwi_get_eaddr(struct bwi_softc *sc, uint16_t eaddr_ofs, uint8_t *eaddr)
1255 {
1256         int i;
1257
1258         for (i = 0; i < 3; ++i) {
1259                 *((uint16_t *)eaddr + i) =
1260                         htobe16(bwi_read_sprom(sc, eaddr_ofs + 2 * i));
1261         }
1262 }
1263
1264 static void
1265 bwi_get_clock_freq(struct bwi_softc *sc, struct bwi_clock_freq *freq)
1266 {
1267         struct bwi_regwin *com;
1268         uint32_t val;
1269         u_int div;
1270         int src;
1271
1272         bzero(freq, sizeof(*freq));
1273         com = &sc->sc_com_regwin;
1274
1275         KKASSERT(BWI_REGWIN_EXIST(com));
1276         KKASSERT(sc->sc_cur_regwin == com);
1277         KKASSERT(sc->sc_cap & BWI_CAP_CLKMODE);
1278
1279         /*
1280          * Calculate clock frequency
1281          */
1282         src = -1;
1283         div = 0;
1284         if (com->rw_rev < 6) {
1285                 val = pci_read_config(sc->sc_dev, BWI_PCIR_GPIO_OUT, 4);
1286                 if (val & BWI_PCIM_GPIO_OUT_CLKSRC) {
1287                         src = BWI_CLKSRC_PCI;
1288                         div = 64;
1289                 } else {
1290                         src = BWI_CLKSRC_CS_OSC;
1291                         div = 32;
1292                 }
1293         } else if (com->rw_rev < 10) {
1294                 val = CSR_READ_4(sc, BWI_CLOCK_CTRL);
1295
1296                 src = __SHIFTOUT(val, BWI_CLOCK_CTRL_CLKSRC);
1297                 if (src == BWI_CLKSRC_LP_OSC) {
1298                         div = 1;
1299                 } else {
1300                         div = (__SHIFTOUT(val, BWI_CLOCK_CTRL_FDIV) + 1) << 2;
1301
1302                         /* Unknown source */
1303                         if (src >= BWI_CLKSRC_MAX)
1304                                 src = BWI_CLKSRC_CS_OSC;
1305                 }
1306         } else {
1307                 val = CSR_READ_4(sc, BWI_CLOCK_INFO);
1308
1309                 src = BWI_CLKSRC_CS_OSC;
1310                 div = (__SHIFTOUT(val, BWI_CLOCK_INFO_FDIV) + 1) << 2;
1311         }
1312
1313         KKASSERT(src >= 0 && src < BWI_CLKSRC_MAX);
1314         KKASSERT(div != 0);
1315
1316         DPRINTF(sc, BWI_DBG_ATTACH, "clksrc %s\n",
1317                 src == BWI_CLKSRC_PCI ? "PCI" :
1318                 (src == BWI_CLKSRC_LP_OSC ? "LP_OSC" : "CS_OSC"));
1319
1320         freq->clkfreq_min = bwi_clkfreq[src].freq_min / div;
1321         freq->clkfreq_max = bwi_clkfreq[src].freq_max / div;
1322
1323         DPRINTF(sc, BWI_DBG_ATTACH, "clkfreq min %u, max %u\n",
1324                 freq->clkfreq_min, freq->clkfreq_max);
1325 }
1326
1327 static int
1328 bwi_set_clock_mode(struct bwi_softc *sc, enum bwi_clock_mode clk_mode)
1329 {
1330         struct bwi_regwin *old, *com;
1331         uint32_t clk_ctrl, clk_src;
1332         int error, pwr_off = 0;
1333
1334         com = &sc->sc_com_regwin;
1335         if (!BWI_REGWIN_EXIST(com))
1336                 return 0;
1337
1338         if (com->rw_rev >= 10 || com->rw_rev < 6)
1339                 return 0;
1340
1341         /*
1342          * For common regwin whose rev is [6, 10), the chip
1343          * must be capable to change clock mode.
1344          */
1345         if ((sc->sc_cap & BWI_CAP_CLKMODE) == 0)
1346                 return 0;
1347
1348         error = bwi_regwin_switch(sc, com, &old);
1349         if (error)
1350                 return error;
1351
1352         if (clk_mode == BWI_CLOCK_MODE_FAST)
1353                 bwi_power_on(sc, 0);    /* Don't turn on PLL */
1354
1355         clk_ctrl = CSR_READ_4(sc, BWI_CLOCK_CTRL);
1356         clk_src = __SHIFTOUT(clk_ctrl, BWI_CLOCK_CTRL_CLKSRC);
1357
1358         switch (clk_mode) {
1359         case BWI_CLOCK_MODE_FAST:
1360                 clk_ctrl &= ~BWI_CLOCK_CTRL_SLOW;
1361                 clk_ctrl |= BWI_CLOCK_CTRL_IGNPLL;
1362                 break;
1363         case BWI_CLOCK_MODE_SLOW:
1364                 clk_ctrl |= BWI_CLOCK_CTRL_SLOW;
1365                 break;
1366         case BWI_CLOCK_MODE_DYN:
1367                 clk_ctrl &= ~(BWI_CLOCK_CTRL_SLOW |
1368                               BWI_CLOCK_CTRL_IGNPLL |
1369                               BWI_CLOCK_CTRL_NODYN);
1370                 if (clk_src != BWI_CLKSRC_CS_OSC) {
1371                         clk_ctrl |= BWI_CLOCK_CTRL_NODYN;
1372                         pwr_off = 1;
1373                 }
1374                 break;
1375         }
1376         CSR_WRITE_4(sc, BWI_CLOCK_CTRL, clk_ctrl);
1377
1378         if (pwr_off)
1379                 bwi_power_off(sc, 0);   /* Leave PLL as it is */
1380
1381         return bwi_regwin_switch(sc, old, NULL);
1382 }
1383
1384 static int
1385 bwi_set_clock_delay(struct bwi_softc *sc)
1386 {
1387         struct bwi_regwin *old, *com;
1388         int error;
1389
1390         com = &sc->sc_com_regwin;
1391         if (!BWI_REGWIN_EXIST(com))
1392                 return 0;
1393
1394         error = bwi_regwin_switch(sc, com, &old);
1395         if (error)
1396                 return error;
1397
1398         if (sc->sc_bbp_id == BWI_BBPID_BCM4321) {
1399                 if (sc->sc_bbp_rev == 0)
1400                         CSR_WRITE_4(sc, BWI_CONTROL, BWI_CONTROL_MAGIC0);
1401                 else if (sc->sc_bbp_rev == 1)
1402                         CSR_WRITE_4(sc, BWI_CONTROL, BWI_CONTROL_MAGIC1);
1403         }
1404
1405         if (sc->sc_cap & BWI_CAP_CLKMODE) {
1406                 if (com->rw_rev >= 10) {
1407                         CSR_FILT_SETBITS_4(sc, BWI_CLOCK_INFO, 0xffff, 0x40000);
1408                 } else {
1409                         struct bwi_clock_freq freq;
1410
1411                         bwi_get_clock_freq(sc, &freq);
1412                         CSR_WRITE_4(sc, BWI_PLL_ON_DELAY,
1413                                 howmany(freq.clkfreq_max * 150, 1000000));
1414                         CSR_WRITE_4(sc, BWI_FREQ_SEL_DELAY,
1415                                 howmany(freq.clkfreq_max * 15, 1000000));
1416                 }
1417         }
1418
1419         return bwi_regwin_switch(sc, old, NULL);
1420 }
1421
1422 static void
1423 bwi_init(void *xsc)
1424 {
1425         bwi_init_statechg(xsc, 1);
1426 }
1427
1428 static void
1429 bwi_init_statechg(struct bwi_softc *sc, int statechg)
1430 {
1431         struct ieee80211com *ic = &sc->sc_ic;
1432         struct ifnet *ifp = &ic->ic_if;
1433         struct bwi_mac *mac;
1434         int error;
1435
1436         ASSERT_SERIALIZED(ifp->if_serializer);
1437
1438         error = bwi_stop(sc, statechg);
1439         if (error) {
1440                 if_printf(ifp, "can't stop\n");
1441                 return;
1442         }
1443
1444         bwi_bbp_power_on(sc, BWI_CLOCK_MODE_FAST);
1445
1446         /* TODO: 2 MAC */
1447
1448         mac = &sc->sc_mac[0];
1449         error = bwi_regwin_switch(sc, &mac->mac_regwin, NULL);
1450         if (error)
1451                 goto back;
1452
1453         error = bwi_mac_init(mac);
1454         if (error)
1455                 goto back;
1456
1457         bwi_bbp_power_on(sc, BWI_CLOCK_MODE_DYN);
1458
1459         bcopy(IF_LLADDR(ifp), ic->ic_myaddr, sizeof(ic->ic_myaddr));
1460
1461         bwi_set_bssid(sc, bwi_zero_addr);       /* Clear BSSID */
1462         bwi_set_addr_filter(sc, BWI_ADDR_FILTER_MYADDR, ic->ic_myaddr);
1463
1464         bwi_mac_reset_hwkeys(mac);
1465
1466         if ((mac->mac_flags & BWI_MAC_F_HAS_TXSTATS) == 0) {
1467                 int i;
1468
1469 #define NRETRY  1000
1470                 /*
1471                  * Drain any possible pending TX status
1472                  */
1473                 for (i = 0; i < NRETRY; ++i) {
1474                         if ((CSR_READ_4(sc, BWI_TXSTATUS0) &
1475                              BWI_TXSTATUS0_VALID) == 0)
1476                                 break;
1477                         CSR_READ_4(sc, BWI_TXSTATUS1);
1478                 }
1479                 if (i == NRETRY)
1480                         if_printf(ifp, "can't drain TX status\n");
1481 #undef NRETRY
1482         }
1483
1484         if (mac->mac_phy.phy_mode == IEEE80211_MODE_11G)
1485                 bwi_mac_updateslot(mac, 1);
1486
1487         /* Start MAC */
1488         error = bwi_mac_start(mac);
1489         if (error)
1490                 goto back;
1491
1492         /* Enable intrs */
1493         bwi_enable_intrs(sc, BWI_INIT_INTRS);
1494
1495         ifp->if_flags |= IFF_RUNNING;
1496         ifq_clr_oactive(&ifp->if_snd);
1497
1498         if (statechg) {
1499                 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
1500                         if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
1501                                 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
1502                 } else {
1503                         ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
1504                 }
1505         } else {
1506                 ieee80211_new_state(ic, ic->ic_state, -1);
1507         }
1508 back:
1509         if (error)
1510                 bwi_stop(sc, 1);
1511         else
1512                 ifp->if_start(ifp);
1513 }
1514
1515 static int
1516 bwi_ioctl(struct ifnet *ifp, u_long cmd, caddr_t req, struct ucred *cr)
1517 {
1518         struct bwi_softc *sc = ifp->if_softc;
1519         int error = 0;
1520
1521         ASSERT_SERIALIZED(ifp->if_serializer);
1522
1523         switch (cmd) {
1524         case SIOCSIFFLAGS:
1525                 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1526                     (IFF_UP | IFF_RUNNING)) {
1527                         struct bwi_mac *mac;
1528                         int promisc = -1;
1529
1530                         KKASSERT(sc->sc_cur_regwin->rw_type ==
1531                                  BWI_REGWIN_T_MAC);
1532                         mac = (struct bwi_mac *)sc->sc_cur_regwin;
1533
1534                         if ((ifp->if_flags & IFF_PROMISC) &&
1535                             (sc->sc_flags & BWI_F_PROMISC) == 0) {
1536                                 promisc = 1;
1537                                 sc->sc_flags |= BWI_F_PROMISC;
1538                         } else if ((ifp->if_flags & IFF_PROMISC) == 0 &&
1539                                    (sc->sc_flags & BWI_F_PROMISC)) {
1540                                 promisc = 0;
1541                                 sc->sc_flags &= ~BWI_F_PROMISC;
1542                         }
1543
1544                         if (promisc >= 0)
1545                                 bwi_mac_set_promisc(mac, promisc);
1546                 }
1547
1548                 if (ifp->if_flags & IFF_UP) {
1549                         if ((ifp->if_flags & IFF_RUNNING) == 0)
1550                                 bwi_init(sc);
1551                 } else {
1552                         if (ifp->if_flags & IFF_RUNNING)
1553                                 bwi_stop(sc, 1);
1554                 }
1555                 break;
1556         default:
1557                 error = ieee80211_ioctl(&sc->sc_ic, cmd, req, cr);
1558                 break;
1559         }
1560
1561         if (error == ENETRESET) {
1562                 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1563                     (IFF_UP | IFF_RUNNING))
1564                         bwi_init(sc);
1565                 error = 0;
1566         }
1567         return error;
1568 }
1569
1570 static void
1571 bwi_start(struct ifnet *ifp)
1572 {
1573         struct bwi_softc *sc = ifp->if_softc;
1574         struct ieee80211com *ic = &sc->sc_ic;
1575         struct bwi_txbuf_data *tbd = &sc->sc_tx_bdata[BWI_TX_DATA_RING];
1576         int trans, idx;
1577
1578         ASSERT_SERIALIZED(ifp->if_serializer);
1579
1580         if (ifq_is_oactive(&ifp->if_snd) || (ifp->if_flags & IFF_RUNNING) == 0)
1581                 return;
1582
1583         trans = 0;
1584         idx = tbd->tbd_idx;
1585
1586         while (tbd->tbd_buf[idx].tb_mbuf == NULL) {
1587                 struct ieee80211_frame *wh;
1588                 struct ieee80211_node *ni;
1589                 struct mbuf *m;
1590                 int mgt_pkt = 0;
1591
1592                 if (!IF_QEMPTY(&ic->ic_mgtq)) {
1593                         IF_DEQUEUE(&ic->ic_mgtq, m);
1594
1595                         ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1596                         m->m_pkthdr.rcvif = NULL;
1597
1598                         mgt_pkt = 1;
1599                 } else if (!ifq_is_empty(&ifp->if_snd)) {
1600                         struct ether_header *eh;
1601
1602                         if (ic->ic_state != IEEE80211_S_RUN) {
1603                                 ifq_purge(&ifp->if_snd);
1604                                 break;
1605                         }
1606
1607                         m = ifq_dequeue(&ifp->if_snd, NULL);
1608                         if (m == NULL)
1609                                 break;
1610
1611                         if (m->m_len < sizeof(*eh)) {
1612                                 m = m_pullup(m, sizeof(*eh));
1613                                 if (m == NULL) {
1614                                         ifp->if_oerrors++;
1615                                         continue;
1616                                 }
1617                         }
1618                         eh = mtod(m, struct ether_header *);
1619
1620                         ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1621                         if (ni == NULL) {
1622                                 m_freem(m);
1623                                 ifp->if_oerrors++;
1624                                 continue;
1625                         }
1626
1627                         /* TODO: PS */
1628
1629                         BPF_MTAP(ifp, m);
1630
1631                         m = ieee80211_encap(ic, m, ni);
1632                         if (m == NULL) {
1633                                 ieee80211_free_node(ni);
1634                                 ifp->if_oerrors++;
1635                                 continue;
1636                         }
1637                 } else {
1638                         break;
1639                 }
1640
1641                 if (ic->ic_rawbpf != NULL)
1642                         bpf_mtap(ic->ic_rawbpf, m);
1643
1644                 wh = mtod(m, struct ieee80211_frame *);
1645                 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1646                         if (ieee80211_crypto_encap(ic, ni, m) == NULL) {
1647                                 ieee80211_free_node(ni);
1648                                 m_freem(m);
1649                                 ifp->if_oerrors++;
1650                                 continue;
1651                         }
1652                 }
1653                 wh = NULL;      /* Catch any invalid use */
1654
1655                 if (bwi_encap(sc, idx, m, &ni, mgt_pkt) != 0) {
1656                         /* 'm' is freed in bwi_encap() if we reach here */
1657                         if (ni != NULL)
1658                                 ieee80211_free_node(ni);
1659                         ifp->if_oerrors++;
1660                         continue;
1661                 }
1662
1663                 trans = 1;
1664                 tbd->tbd_used++;
1665                 idx = (idx + 1) % BWI_TX_NDESC;
1666
1667                 if (tbd->tbd_used + BWI_TX_NSPRDESC >= BWI_TX_NDESC) {
1668                         ifq_set_oactive(&ifp->if_snd);
1669                         break;
1670                 }
1671         }
1672         tbd->tbd_idx = idx;
1673
1674         if (trans)
1675                 sc->sc_tx_timer = 5;
1676         ifp->if_timer = 1;
1677 }
1678
1679 static void
1680 bwi_watchdog(struct ifnet *ifp)
1681 {
1682         struct bwi_softc *sc = ifp->if_softc;
1683
1684         ASSERT_SERIALIZED(ifp->if_serializer);
1685
1686         ifp->if_timer = 0;
1687
1688         if ((ifp->if_flags & IFF_RUNNING) == 0)
1689                 return;
1690
1691         if (sc->sc_tx_timer) {
1692                 if (--sc->sc_tx_timer == 0) {
1693                         if_printf(ifp, "watchdog timeout\n");
1694                         ifp->if_oerrors++;
1695                         /* TODO */
1696                 } else {
1697                         ifp->if_timer = 1;
1698                 }
1699         }
1700         ieee80211_watchdog(&sc->sc_ic);
1701 }
1702
1703 static int
1704 bwi_stop(struct bwi_softc *sc, int state_chg)
1705 {
1706         struct ieee80211com *ic = &sc->sc_ic;
1707         struct ifnet *ifp = &ic->ic_if;
1708         struct bwi_mac *mac;
1709         int i, error, pwr_off = 0;
1710
1711         ASSERT_SERIALIZED(ifp->if_serializer);
1712
1713         if (state_chg)
1714                 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
1715         else
1716                 bwi_newstate_begin(sc, IEEE80211_S_INIT);
1717
1718         if (ifp->if_flags & IFF_RUNNING) {
1719                 KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
1720                 mac = (struct bwi_mac *)sc->sc_cur_regwin;
1721
1722                 bwi_disable_intrs(sc, BWI_ALL_INTRS);
1723                 CSR_READ_4(sc, BWI_MAC_INTR_MASK);
1724                 bwi_mac_stop(mac);
1725         }
1726
1727         for (i = 0; i < sc->sc_nmac; ++i) {
1728                 struct bwi_regwin *old_rw;
1729
1730                 mac = &sc->sc_mac[i];
1731                 if ((mac->mac_flags & BWI_MAC_F_INITED) == 0)
1732                         continue;
1733
1734                 error = bwi_regwin_switch(sc, &mac->mac_regwin, &old_rw);
1735                 if (error)
1736                         continue;
1737
1738                 bwi_mac_shutdown(mac);
1739                 pwr_off = 1;
1740
1741                 bwi_regwin_switch(sc, old_rw, NULL);
1742         }
1743
1744         if (pwr_off)
1745                 bwi_bbp_power_off(sc);
1746
1747         sc->sc_tx_timer = 0;
1748         ifp->if_timer = 0;
1749         ifp->if_flags &= ~IFF_RUNNING;
1750         ifq_clr_oactive(&ifp->if_snd);
1751         return 0;
1752 }
1753
1754 static void
1755 bwi_intr(void *xsc)
1756 {
1757         struct bwi_softc *sc = xsc;
1758         struct bwi_mac *mac;
1759         struct ifnet *ifp = &sc->sc_ic.ic_if;
1760         uint32_t intr_status;
1761         uint32_t txrx_intr_status[BWI_TXRX_NRING];
1762         int i, txrx_error, tx = 0, rx_data = -1;
1763
1764         ASSERT_SERIALIZED(ifp->if_serializer);
1765
1766         if ((ifp->if_flags & IFF_RUNNING) == 0)
1767                 return;
1768
1769         /*
1770          * Get interrupt status
1771          */
1772         intr_status = CSR_READ_4(sc, BWI_MAC_INTR_STATUS);
1773         if (intr_status == 0xffffffff)  /* Not for us */
1774                 return;
1775
1776         DPRINTF(sc, BWI_DBG_INTR, "intr status 0x%08x\n", intr_status);
1777
1778         intr_status &= CSR_READ_4(sc, BWI_MAC_INTR_MASK);
1779         if (intr_status == 0)           /* Nothing is interesting */
1780                 return;
1781
1782         KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
1783         mac = (struct bwi_mac *)sc->sc_cur_regwin;
1784
1785         txrx_error = 0;
1786         DPRINTF(sc, BWI_DBG_INTR, "%s\n", "TX/RX intr");
1787         for (i = 0; i < BWI_TXRX_NRING; ++i) {
1788                 uint32_t mask;
1789
1790                 if (BWI_TXRX_IS_RX(i))
1791                         mask = BWI_TXRX_RX_INTRS;
1792                 else
1793                         mask = BWI_TXRX_TX_INTRS;
1794
1795                 txrx_intr_status[i] =
1796                 CSR_READ_4(sc, BWI_TXRX_INTR_STATUS(i)) & mask;
1797
1798                 _DPRINTF(sc, BWI_DBG_INTR, ", %d 0x%08x",
1799                          i, txrx_intr_status[i]);
1800
1801                 if (txrx_intr_status[i] & BWI_TXRX_INTR_ERROR) {
1802                         if_printf(ifp, "intr fatal TX/RX (%d) error 0x%08x\n",
1803                                   i, txrx_intr_status[i]);
1804                         txrx_error = 1;
1805                 }
1806         }
1807         _DPRINTF(sc, BWI_DBG_INTR, "%s\n", "");
1808
1809         /*
1810          * Acknowledge interrupt
1811          */
1812         CSR_WRITE_4(sc, BWI_MAC_INTR_STATUS, intr_status);
1813
1814         for (i = 0; i < BWI_TXRX_NRING; ++i)
1815                 CSR_WRITE_4(sc, BWI_TXRX_INTR_STATUS(i), txrx_intr_status[i]);
1816
1817         /* Disable all interrupts */
1818         bwi_disable_intrs(sc, BWI_ALL_INTRS);
1819
1820         if (intr_status & BWI_INTR_PHY_TXERR) {
1821                 if (mac->mac_flags & BWI_MAC_F_PHYE_RESET) {
1822                         if_printf(ifp, "intr PHY TX error\n");
1823                         /* XXX to netisr0? */
1824                         bwi_init_statechg(sc, 0);
1825                         return;
1826                 }
1827         }
1828
1829         if (txrx_error) {
1830                 /* TODO: reset device */
1831         }
1832
1833         if (intr_status & BWI_INTR_TBTT)
1834                 bwi_mac_config_ps(mac);
1835
1836         if (intr_status & BWI_INTR_EO_ATIM)
1837                 if_printf(ifp, "EO_ATIM\n");
1838
1839         if (intr_status & BWI_INTR_PMQ) {
1840                 for (;;) {
1841                         if ((CSR_READ_4(sc, BWI_MAC_PS_STATUS) & 0x8) == 0)
1842                                 break;
1843                 }
1844                 CSR_WRITE_2(sc, BWI_MAC_PS_STATUS, 0x2);
1845         }
1846
1847         if (intr_status & BWI_INTR_NOISE)
1848                 if_printf(ifp, "intr noise\n");
1849
1850         if (txrx_intr_status[0] & BWI_TXRX_INTR_RX)
1851                 rx_data = sc->sc_rxeof(sc);
1852
1853         if (txrx_intr_status[3] & BWI_TXRX_INTR_RX) {
1854                 sc->sc_txeof_status(sc);
1855                 tx = 1;
1856         }
1857
1858         if (intr_status & BWI_INTR_TX_DONE) {
1859                 bwi_txeof(sc);
1860                 tx = 1;
1861         }
1862
1863         /* Re-enable interrupts */
1864         bwi_enable_intrs(sc, BWI_INIT_INTRS);
1865
1866         if (sc->sc_blink_led != NULL && sc->sc_led_blink) {
1867                 int evt = BWI_LED_EVENT_NONE;
1868
1869                 if (tx && rx_data > 0) {
1870                         if (sc->sc_rx_rate > sc->sc_tx_rate)
1871                                 evt = BWI_LED_EVENT_RX;
1872                         else
1873                                 evt = BWI_LED_EVENT_TX;
1874                 } else if (tx) {
1875                         evt = BWI_LED_EVENT_TX;
1876                 } else if (rx_data > 0) {
1877                         evt = BWI_LED_EVENT_RX;
1878                 } else if (rx_data == 0) {
1879                         evt = BWI_LED_EVENT_POLL;
1880                 }
1881
1882                 if (evt != BWI_LED_EVENT_NONE)
1883                         bwi_led_event(sc, evt);
1884         }
1885 }
1886
1887 static void
1888 bwi_newstate_begin(struct bwi_softc *sc, enum ieee80211_state nstate)
1889 {
1890         callout_stop(&sc->sc_scan_ch);
1891         callout_stop(&sc->sc_calib_ch);
1892
1893         ieee80211_ratectl_newstate(&sc->sc_ic, nstate);
1894         bwi_led_newstate(sc, nstate);
1895
1896         if (nstate == IEEE80211_S_INIT)
1897                 sc->sc_txpwrcb_type = BWI_TXPWR_INIT;
1898 }
1899
1900 static int
1901 bwi_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
1902 {
1903         struct bwi_softc *sc = ic->ic_if.if_softc;
1904         struct ifnet *ifp = &ic->ic_if;
1905         int error;
1906
1907         ASSERT_SERIALIZED(ifp->if_serializer);
1908
1909         bwi_newstate_begin(sc, nstate);
1910
1911         if (nstate == IEEE80211_S_INIT)
1912                 goto back;
1913
1914         error = bwi_set_chan(sc, ic->ic_curchan);
1915         if (error) {
1916                 if_printf(ifp, "can't set channel to %u\n",
1917                           ieee80211_chan2ieee(ic, ic->ic_curchan));
1918                 return error;
1919         }
1920
1921         if (ic->ic_opmode == IEEE80211_M_MONITOR) {
1922                 /* Nothing to do */
1923         } else if (nstate == IEEE80211_S_RUN) {
1924                 struct bwi_mac *mac;
1925
1926                 bwi_set_bssid(sc, ic->ic_bss->ni_bssid);
1927
1928                 KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
1929                 mac = (struct bwi_mac *)sc->sc_cur_regwin;
1930
1931                 /* Initial TX power calibration */
1932                 bwi_mac_calibrate_txpower(mac, BWI_TXPWR_INIT);
1933 #ifdef notyet
1934                 sc->sc_txpwrcb_type = BWI_TXPWR_FORCE;
1935 #else
1936                 sc->sc_txpwrcb_type = BWI_TXPWR_CALIB;
1937 #endif
1938         } else {
1939                 bwi_set_bssid(sc, bwi_zero_addr);
1940         }
1941
1942 back:
1943         error = sc->sc_newstate(ic, nstate, arg);
1944
1945         if (nstate == IEEE80211_S_SCAN) {
1946                 callout_reset(&sc->sc_scan_ch,
1947                               (sc->sc_dwell_time * hz) / 1000,
1948                               bwi_next_scan, sc);
1949         } else if (nstate == IEEE80211_S_RUN) {
1950                 callout_reset(&sc->sc_calib_ch, hz, bwi_calibrate, sc);
1951         }
1952         return error;
1953 }
1954
1955 static int
1956 bwi_media_change(struct ifnet *ifp)
1957 {
1958         int error;
1959
1960         ASSERT_SERIALIZED(ifp->if_serializer);
1961
1962         error = ieee80211_media_change(ifp);
1963         if (error != ENETRESET)
1964                 return error;
1965
1966         if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
1967                 bwi_init(ifp->if_softc);
1968         return 0;
1969 }
1970
1971 static int
1972 bwi_dma_alloc(struct bwi_softc *sc)
1973 {
1974         int error, i, has_txstats;
1975         bus_addr_t lowaddr = 0;
1976         bus_size_t tx_ring_sz, rx_ring_sz, desc_sz = 0;
1977         uint32_t txrx_ctrl_step = 0;
1978
1979         has_txstats = 0;
1980         for (i = 0; i < sc->sc_nmac; ++i) {
1981                 if (sc->sc_mac[i].mac_flags & BWI_MAC_F_HAS_TXSTATS) {
1982                         has_txstats = 1;
1983                         break;
1984                 }
1985         }
1986
1987         switch (sc->sc_bus_space) {
1988         case BWI_BUS_SPACE_30BIT:
1989         case BWI_BUS_SPACE_32BIT:
1990                 if (sc->sc_bus_space == BWI_BUS_SPACE_30BIT)
1991                         lowaddr = BWI_BUS_SPACE_MAXADDR;
1992                 else
1993                         lowaddr = BUS_SPACE_MAXADDR_32BIT;
1994                 desc_sz = sizeof(struct bwi_desc32);
1995                 txrx_ctrl_step = 0x20;
1996
1997                 sc->sc_init_tx_ring = bwi_init_tx_ring32;
1998                 sc->sc_free_tx_ring = bwi_free_tx_ring32;
1999                 sc->sc_init_rx_ring = bwi_init_rx_ring32;
2000                 sc->sc_free_rx_ring = bwi_free_rx_ring32;
2001                 sc->sc_setup_rxdesc = bwi_setup_rx_desc32;
2002                 sc->sc_setup_txdesc = bwi_setup_tx_desc32;
2003                 sc->sc_rxeof = bwi_rxeof32;
2004                 sc->sc_start_tx = bwi_start_tx32;
2005                 if (has_txstats) {
2006                         sc->sc_init_txstats = bwi_init_txstats32;
2007                         sc->sc_free_txstats = bwi_free_txstats32;
2008                         sc->sc_txeof_status = bwi_txeof_status32;
2009                 }
2010                 break;
2011
2012         case BWI_BUS_SPACE_64BIT:
2013                 lowaddr = BUS_SPACE_MAXADDR;    /* XXX */
2014                 desc_sz = sizeof(struct bwi_desc64);
2015                 txrx_ctrl_step = 0x40;
2016
2017                 sc->sc_init_tx_ring = bwi_init_tx_ring64;
2018                 sc->sc_free_tx_ring = bwi_free_tx_ring64;
2019                 sc->sc_init_rx_ring = bwi_init_rx_ring64;
2020                 sc->sc_free_rx_ring = bwi_free_rx_ring64;
2021                 sc->sc_setup_rxdesc = bwi_setup_rx_desc64;
2022                 sc->sc_setup_txdesc = bwi_setup_tx_desc64;
2023                 sc->sc_rxeof = bwi_rxeof64;
2024                 sc->sc_start_tx = bwi_start_tx64;
2025                 if (has_txstats) {
2026                         sc->sc_init_txstats = bwi_init_txstats64;
2027                         sc->sc_free_txstats = bwi_free_txstats64;
2028                         sc->sc_txeof_status = bwi_txeof_status64;
2029                 }
2030                 break;
2031         }
2032
2033         KKASSERT(lowaddr != 0);
2034         KKASSERT(desc_sz != 0);
2035         KKASSERT(txrx_ctrl_step != 0);
2036
2037         tx_ring_sz = roundup(desc_sz * BWI_TX_NDESC, BWI_RING_ALIGN);
2038         rx_ring_sz = roundup(desc_sz * BWI_RX_NDESC, BWI_RING_ALIGN);
2039
2040         /*
2041          * Create top level DMA tag
2042          */
2043         error = bus_dma_tag_create(NULL, BWI_ALIGN, 0,
2044                                    lowaddr, BUS_SPACE_MAXADDR,
2045                                    NULL, NULL,
2046                                    MAXBSIZE,
2047                                    BUS_SPACE_UNRESTRICTED,
2048                                    BUS_SPACE_MAXSIZE_32BIT,
2049                                    0, &sc->sc_parent_dtag);
2050         if (error) {
2051                 device_printf(sc->sc_dev, "can't create parent DMA tag\n");
2052                 return error;
2053         }
2054
2055 #define TXRX_CTRL(idx)  (BWI_TXRX_CTRL_BASE + (idx) * txrx_ctrl_step)
2056
2057         /*
2058          * Create TX ring DMA stuffs
2059          */
2060         error = bus_dma_tag_create(sc->sc_parent_dtag, BWI_RING_ALIGN, 0,
2061                                    BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
2062                                    NULL, NULL,
2063                                    tx_ring_sz, 1, BUS_SPACE_MAXSIZE_32BIT,
2064                                    0, &sc->sc_txring_dtag);
2065         if (error) {
2066                 device_printf(sc->sc_dev, "can't create TX ring DMA tag\n");
2067                 return error;
2068         }
2069
2070         for (i = 0; i < BWI_TX_NRING; ++i) {
2071                 error = bwi_dma_ring_alloc(sc, sc->sc_txring_dtag,
2072                                            &sc->sc_tx_rdata[i], tx_ring_sz,
2073                                            TXRX_CTRL(i));
2074                 if (error) {
2075                         device_printf(sc->sc_dev, "%dth TX ring "
2076                                       "DMA alloc failed\n", i);
2077                         return error;
2078                 }
2079         }
2080
2081         /*
2082          * Create RX ring DMA stuffs
2083          */
2084         error = bus_dma_tag_create(sc->sc_parent_dtag, BWI_RING_ALIGN, 0,
2085                                    BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
2086                                    NULL, NULL,
2087                                    rx_ring_sz, 1, BUS_SPACE_MAXSIZE_32BIT,
2088                                    0, &sc->sc_rxring_dtag);
2089         if (error) {
2090                 device_printf(sc->sc_dev, "can't create RX ring DMA tag\n");
2091                 return error;
2092         }
2093
2094         error = bwi_dma_ring_alloc(sc, sc->sc_rxring_dtag, &sc->sc_rx_rdata,
2095                                    rx_ring_sz, TXRX_CTRL(0));
2096         if (error) {
2097                 device_printf(sc->sc_dev, "RX ring DMA alloc failed\n");
2098                 return error;
2099         }
2100
2101         if (has_txstats) {
2102                 error = bwi_dma_txstats_alloc(sc, TXRX_CTRL(3), desc_sz);
2103                 if (error) {
2104                         device_printf(sc->sc_dev,
2105                                       "TX stats DMA alloc failed\n");
2106                         return error;
2107                 }
2108         }
2109
2110 #undef TXRX_CTRL
2111
2112         return bwi_dma_mbuf_create(sc);
2113 }
2114
2115 static void
2116 bwi_dma_free(struct bwi_softc *sc)
2117 {
2118         if (sc->sc_txring_dtag != NULL) {
2119                 int i;
2120
2121                 for (i = 0; i < BWI_TX_NRING; ++i) {
2122                         struct bwi_ring_data *rd = &sc->sc_tx_rdata[i];
2123
2124                         if (rd->rdata_desc != NULL) {
2125                                 bus_dmamap_unload(sc->sc_txring_dtag,
2126                                                   rd->rdata_dmap);
2127                                 bus_dmamem_free(sc->sc_txring_dtag,
2128                                                 rd->rdata_desc,
2129                                                 rd->rdata_dmap);
2130                         }
2131                 }
2132                 bus_dma_tag_destroy(sc->sc_txring_dtag);
2133         }
2134
2135         if (sc->sc_rxring_dtag != NULL) {
2136                 struct bwi_ring_data *rd = &sc->sc_rx_rdata;
2137
2138                 if (rd->rdata_desc != NULL) {
2139                         bus_dmamap_unload(sc->sc_rxring_dtag, rd->rdata_dmap);
2140                         bus_dmamem_free(sc->sc_rxring_dtag, rd->rdata_desc,
2141                                         rd->rdata_dmap);
2142                 }
2143                 bus_dma_tag_destroy(sc->sc_rxring_dtag);
2144         }
2145
2146         bwi_dma_txstats_free(sc);
2147         bwi_dma_mbuf_destroy(sc, BWI_TX_NRING, 1);
2148
2149         if (sc->sc_parent_dtag != NULL)
2150                 bus_dma_tag_destroy(sc->sc_parent_dtag);
2151 }
2152
2153 static int
2154 bwi_dma_ring_alloc(struct bwi_softc *sc, bus_dma_tag_t dtag,
2155                    struct bwi_ring_data *rd, bus_size_t size,
2156                    uint32_t txrx_ctrl)
2157 {
2158         int error;
2159
2160         error = bus_dmamem_alloc(dtag, &rd->rdata_desc,
2161                                  BUS_DMA_WAITOK | BUS_DMA_ZERO,
2162                                  &rd->rdata_dmap);
2163         if (error) {
2164                 device_printf(sc->sc_dev, "can't allocate DMA mem\n");
2165                 return error;
2166         }
2167
2168         error = bus_dmamap_load(dtag, rd->rdata_dmap, rd->rdata_desc, size,
2169                                 bwi_dma_ring_addr, &rd->rdata_paddr,
2170                                 BUS_DMA_WAITOK);
2171         if (error) {
2172                 device_printf(sc->sc_dev, "can't load DMA mem\n");
2173                 bus_dmamem_free(dtag, rd->rdata_desc, rd->rdata_dmap);
2174                 rd->rdata_desc = NULL;
2175                 return error;
2176         }
2177
2178         rd->rdata_txrx_ctrl = txrx_ctrl;
2179         return 0;
2180 }
2181
2182 static int
2183 bwi_dma_txstats_alloc(struct bwi_softc *sc, uint32_t ctrl_base,
2184                       bus_size_t desc_sz)
2185 {
2186         struct bwi_txstats_data *st;
2187         bus_size_t dma_size;
2188         int error;
2189
2190         st = kmalloc(sizeof(*st), M_DEVBUF, M_WAITOK | M_ZERO);
2191         sc->sc_txstats = st;
2192
2193         /*
2194          * Create TX stats descriptor DMA stuffs
2195          */
2196         dma_size = roundup(desc_sz * BWI_TXSTATS_NDESC, BWI_RING_ALIGN);
2197
2198         error = bus_dma_tag_create(sc->sc_parent_dtag, BWI_RING_ALIGN, 0,
2199                                    BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
2200                                    NULL, NULL,
2201                                    dma_size, 1, BUS_SPACE_MAXSIZE_32BIT,
2202                                    0, &st->stats_ring_dtag);
2203         if (error) {
2204                 device_printf(sc->sc_dev, "can't create txstats ring "
2205                               "DMA tag\n");
2206                 return error;
2207         }
2208
2209         error = bus_dmamem_alloc(st->stats_ring_dtag, &st->stats_ring,
2210                                  BUS_DMA_WAITOK | BUS_DMA_ZERO,
2211                                  &st->stats_ring_dmap);
2212         if (error) {
2213                 device_printf(sc->sc_dev, "can't allocate txstats ring "
2214                               "DMA mem\n");
2215                 bus_dma_tag_destroy(st->stats_ring_dtag);
2216                 st->stats_ring_dtag = NULL;
2217                 return error;
2218         }
2219
2220         error = bus_dmamap_load(st->stats_ring_dtag, st->stats_ring_dmap,
2221                                 st->stats_ring, dma_size,
2222                                 bwi_dma_ring_addr, &st->stats_ring_paddr,
2223                                 BUS_DMA_WAITOK);
2224         if (error) {
2225                 device_printf(sc->sc_dev, "can't load txstats ring DMA mem\n");
2226                 bus_dmamem_free(st->stats_ring_dtag, st->stats_ring,
2227                                 st->stats_ring_dmap);
2228                 bus_dma_tag_destroy(st->stats_ring_dtag);
2229                 st->stats_ring_dtag = NULL;
2230                 return error;
2231         }
2232
2233         /*
2234          * Create TX stats DMA stuffs
2235          */
2236         dma_size = roundup(sizeof(struct bwi_txstats) * BWI_TXSTATS_NDESC,
2237                            BWI_ALIGN);
2238
2239         error = bus_dma_tag_create(sc->sc_parent_dtag, BWI_ALIGN, 0,
2240                                    BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
2241                                    NULL, NULL,
2242                                    dma_size, 1, BUS_SPACE_MAXSIZE_32BIT,
2243                                    0, &st->stats_dtag);
2244         if (error) {
2245                 device_printf(sc->sc_dev, "can't create txstats DMA tag\n");
2246                 return error;
2247         }
2248
2249         error = bus_dmamem_alloc(st->stats_dtag, (void **)&st->stats,
2250                                  BUS_DMA_WAITOK | BUS_DMA_ZERO,
2251                                  &st->stats_dmap);
2252         if (error) {
2253                 device_printf(sc->sc_dev, "can't allocate txstats DMA mem\n");
2254                 bus_dma_tag_destroy(st->stats_dtag);
2255                 st->stats_dtag = NULL;
2256                 return error;
2257         }
2258
2259         error = bus_dmamap_load(st->stats_dtag, st->stats_dmap, st->stats,
2260                                 dma_size, bwi_dma_ring_addr, &st->stats_paddr,
2261                                 BUS_DMA_WAITOK);
2262         if (error) {
2263                 device_printf(sc->sc_dev, "can't load txstats DMA mem\n");
2264                 bus_dmamem_free(st->stats_dtag, st->stats, st->stats_dmap);
2265                 bus_dma_tag_destroy(st->stats_dtag);
2266                 st->stats_dtag = NULL;
2267                 return error;
2268         }
2269
2270         st->stats_ctrl_base = ctrl_base;
2271         return 0;
2272 }
2273
2274 static void
2275 bwi_dma_txstats_free(struct bwi_softc *sc)
2276 {
2277         struct bwi_txstats_data *st;
2278
2279         if (sc->sc_txstats == NULL)
2280                 return;
2281         st = sc->sc_txstats;
2282
2283         if (st->stats_ring_dtag != NULL) {
2284                 bus_dmamap_unload(st->stats_ring_dtag, st->stats_ring_dmap);
2285                 bus_dmamem_free(st->stats_ring_dtag, st->stats_ring,
2286                                 st->stats_ring_dmap);
2287                 bus_dma_tag_destroy(st->stats_ring_dtag);
2288         }
2289
2290         if (st->stats_dtag != NULL) {
2291                 bus_dmamap_unload(st->stats_dtag, st->stats_dmap);
2292                 bus_dmamem_free(st->stats_dtag, st->stats, st->stats_dmap);
2293                 bus_dma_tag_destroy(st->stats_dtag);
2294         }
2295
2296         kfree(st, M_DEVBUF);
2297 }
2298
2299 static void
2300 bwi_dma_ring_addr(void *arg, bus_dma_segment_t *seg, int nseg, int error)
2301 {
2302         KASSERT(nseg == 1, ("too many segments"));
2303         *((bus_addr_t *)arg) = seg->ds_addr;
2304 }
2305
2306 static int
2307 bwi_dma_mbuf_create(struct bwi_softc *sc)
2308 {
2309         struct bwi_rxbuf_data *rbd = &sc->sc_rx_bdata;
2310         int i, j, k, ntx, error;
2311
2312         /*
2313          * Create TX/RX mbuf DMA tag
2314          */
2315         error = bus_dma_tag_create(sc->sc_parent_dtag, 1, 0,
2316                                    BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
2317                                    NULL, NULL, MCLBYTES, 1,
2318                                    BUS_SPACE_MAXSIZE_32BIT,
2319                                    0, &sc->sc_buf_dtag);
2320         if (error) {
2321                 device_printf(sc->sc_dev, "can't create mbuf DMA tag\n");
2322                 return error;
2323         }
2324
2325         ntx = 0;
2326
2327         /*
2328          * Create TX mbuf DMA map
2329          */
2330         for (i = 0; i < BWI_TX_NRING; ++i) {
2331                 struct bwi_txbuf_data *tbd = &sc->sc_tx_bdata[i];
2332
2333                 for (j = 0; j < BWI_TX_NDESC; ++j) {
2334                         error = bus_dmamap_create(sc->sc_buf_dtag, 0,
2335                                                   &tbd->tbd_buf[j].tb_dmap);
2336                         if (error) {
2337                                 device_printf(sc->sc_dev, "can't create "
2338                                               "%dth tbd, %dth DMA map\n", i, j);
2339
2340                                 ntx = i;
2341                                 for (k = 0; k < j; ++k) {
2342                                         bus_dmamap_destroy(sc->sc_buf_dtag,
2343                                                 tbd->tbd_buf[k].tb_dmap);
2344                                 }
2345                                 goto fail;
2346                         }
2347                 }
2348         }
2349         ntx = BWI_TX_NRING;
2350
2351         /*
2352          * Create RX mbuf DMA map and a spare DMA map
2353          */
2354         error = bus_dmamap_create(sc->sc_buf_dtag, 0,
2355                                   &rbd->rbd_tmp_dmap);
2356         if (error) {
2357                 device_printf(sc->sc_dev,
2358                               "can't create spare RX buf DMA map\n");
2359                 goto fail;
2360         }
2361
2362         for (j = 0; j < BWI_RX_NDESC; ++j) {
2363                 error = bus_dmamap_create(sc->sc_buf_dtag, 0,
2364                                           &rbd->rbd_buf[j].rb_dmap);
2365                 if (error) {
2366                         device_printf(sc->sc_dev, "can't create %dth "
2367                                       "RX buf DMA map\n", j);
2368
2369                         for (k = 0; k < j; ++k) {
2370                                 bus_dmamap_destroy(sc->sc_buf_dtag,
2371                                         rbd->rbd_buf[j].rb_dmap);
2372                         }
2373                         bus_dmamap_destroy(sc->sc_buf_dtag,
2374                                            rbd->rbd_tmp_dmap);
2375                         goto fail;
2376                 }
2377         }
2378
2379         return 0;
2380 fail:
2381         bwi_dma_mbuf_destroy(sc, ntx, 0);
2382         return error;
2383 }
2384
2385 static void
2386 bwi_dma_mbuf_destroy(struct bwi_softc *sc, int ntx, int nrx)
2387 {
2388         int i, j;
2389
2390         if (sc->sc_buf_dtag == NULL)
2391                 return;
2392
2393         for (i = 0; i < ntx; ++i) {
2394                 struct bwi_txbuf_data *tbd = &sc->sc_tx_bdata[i];
2395
2396                 for (j = 0; j < BWI_TX_NDESC; ++j) {
2397                         struct bwi_txbuf *tb = &tbd->tbd_buf[j];
2398
2399                         if (tb->tb_mbuf != NULL) {
2400                                 bus_dmamap_unload(sc->sc_buf_dtag,
2401                                                   tb->tb_dmap);
2402                                 m_freem(tb->tb_mbuf);
2403                         }
2404                         if (tb->tb_ni != NULL)
2405                                 ieee80211_free_node(tb->tb_ni);
2406                         bus_dmamap_destroy(sc->sc_buf_dtag, tb->tb_dmap);
2407                 }
2408         }
2409
2410         if (nrx) {
2411                 struct bwi_rxbuf_data *rbd = &sc->sc_rx_bdata;
2412
2413                 bus_dmamap_destroy(sc->sc_buf_dtag, rbd->rbd_tmp_dmap);
2414                 for (j = 0; j < BWI_RX_NDESC; ++j) {
2415                         struct bwi_rxbuf *rb = &rbd->rbd_buf[j];
2416
2417                         if (rb->rb_mbuf != NULL) {
2418                                 bus_dmamap_unload(sc->sc_buf_dtag,
2419                                                   rb->rb_dmap);
2420                                 m_freem(rb->rb_mbuf);
2421                         }
2422                         bus_dmamap_destroy(sc->sc_buf_dtag, rb->rb_dmap);
2423                 }
2424         }
2425
2426         bus_dma_tag_destroy(sc->sc_buf_dtag);
2427         sc->sc_buf_dtag = NULL;
2428 }
2429
2430 static void
2431 bwi_enable_intrs(struct bwi_softc *sc, uint32_t enable_intrs)
2432 {
2433         CSR_SETBITS_4(sc, BWI_MAC_INTR_MASK, enable_intrs);
2434 }
2435
2436 static void
2437 bwi_disable_intrs(struct bwi_softc *sc, uint32_t disable_intrs)
2438 {
2439         CSR_CLRBITS_4(sc, BWI_MAC_INTR_MASK, disable_intrs);
2440 }
2441
2442 static int
2443 bwi_init_tx_ring32(struct bwi_softc *sc, int ring_idx)
2444 {
2445         struct bwi_ring_data *rd;
2446         struct bwi_txbuf_data *tbd;
2447         uint32_t val, addr_hi, addr_lo;
2448
2449         KKASSERT(ring_idx < BWI_TX_NRING);
2450         rd = &sc->sc_tx_rdata[ring_idx];
2451         tbd = &sc->sc_tx_bdata[ring_idx];
2452
2453         tbd->tbd_idx = 0;
2454         tbd->tbd_used = 0;
2455
2456         bzero(rd->rdata_desc, sizeof(struct bwi_desc32) * BWI_TX_NDESC);
2457         bus_dmamap_sync(sc->sc_txring_dtag, rd->rdata_dmap,
2458                         BUS_DMASYNC_PREWRITE);
2459
2460         addr_lo = __SHIFTOUT(rd->rdata_paddr, BWI_TXRX32_RINGINFO_ADDR_MASK);
2461         addr_hi = __SHIFTOUT(rd->rdata_paddr, BWI_TXRX32_RINGINFO_FUNC_MASK);
2462
2463         val = __SHIFTIN(addr_lo, BWI_TXRX32_RINGINFO_ADDR_MASK) |
2464               __SHIFTIN(BWI_TXRX32_RINGINFO_FUNC_TXRX,
2465                         BWI_TXRX32_RINGINFO_FUNC_MASK);
2466         CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_RINGINFO, val);
2467
2468         val = __SHIFTIN(addr_hi, BWI_TXRX32_CTRL_ADDRHI_MASK) |
2469               BWI_TXRX32_CTRL_ENABLE;
2470         CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_CTRL, val);
2471
2472         return 0;
2473 }
2474
2475 static void
2476 bwi_init_rxdesc_ring32(struct bwi_softc *sc, uint32_t ctrl_base,
2477                        bus_addr_t paddr, int hdr_size, int ndesc)
2478 {
2479         uint32_t val, addr_hi, addr_lo;
2480
2481         addr_lo = __SHIFTOUT(paddr, BWI_TXRX32_RINGINFO_ADDR_MASK);
2482         addr_hi = __SHIFTOUT(paddr, BWI_TXRX32_RINGINFO_FUNC_MASK);
2483
2484         val = __SHIFTIN(addr_lo, BWI_TXRX32_RINGINFO_ADDR_MASK) |
2485               __SHIFTIN(BWI_TXRX32_RINGINFO_FUNC_TXRX,
2486                         BWI_TXRX32_RINGINFO_FUNC_MASK);
2487         CSR_WRITE_4(sc, ctrl_base + BWI_RX32_RINGINFO, val);
2488
2489         val = __SHIFTIN(hdr_size, BWI_RX32_CTRL_HDRSZ_MASK) |
2490               __SHIFTIN(addr_hi, BWI_TXRX32_CTRL_ADDRHI_MASK) |
2491               BWI_TXRX32_CTRL_ENABLE;
2492         CSR_WRITE_4(sc, ctrl_base + BWI_RX32_CTRL, val);
2493
2494         CSR_WRITE_4(sc, ctrl_base + BWI_RX32_INDEX,
2495                     (ndesc - 1) * sizeof(struct bwi_desc32));
2496 }
2497
2498 static int
2499 bwi_init_rx_ring32(struct bwi_softc *sc)
2500 {
2501         struct bwi_ring_data *rd = &sc->sc_rx_rdata;
2502         int i, error;
2503
2504         sc->sc_rx_bdata.rbd_idx = 0;
2505
2506         for (i = 0; i < BWI_RX_NDESC; ++i) {
2507                 error = bwi_newbuf(sc, i, 1);
2508                 if (error) {
2509                         if_printf(&sc->sc_ic.ic_if,
2510                                   "can't allocate %dth RX buffer\n", i);
2511                         return error;
2512                 }
2513         }
2514         bus_dmamap_sync(sc->sc_rxring_dtag, rd->rdata_dmap,
2515                         BUS_DMASYNC_PREWRITE);
2516
2517         bwi_init_rxdesc_ring32(sc, rd->rdata_txrx_ctrl, rd->rdata_paddr,
2518                                sizeof(struct bwi_rxbuf_hdr), BWI_RX_NDESC);
2519         return 0;
2520 }
2521
2522 static int
2523 bwi_init_txstats32(struct bwi_softc *sc)
2524 {
2525         struct bwi_txstats_data *st = sc->sc_txstats;
2526         bus_addr_t stats_paddr;
2527         int i;
2528
2529         bzero(st->stats, BWI_TXSTATS_NDESC * sizeof(struct bwi_txstats));
2530         bus_dmamap_sync(st->stats_dtag, st->stats_dmap, BUS_DMASYNC_PREWRITE);
2531
2532         st->stats_idx = 0;
2533
2534         stats_paddr = st->stats_paddr;
2535         for (i = 0; i < BWI_TXSTATS_NDESC; ++i) {
2536                 bwi_setup_desc32(sc, st->stats_ring, BWI_TXSTATS_NDESC, i,
2537                                  stats_paddr, sizeof(struct bwi_txstats), 0);
2538                 stats_paddr += sizeof(struct bwi_txstats);
2539         }
2540         bus_dmamap_sync(st->stats_ring_dtag, st->stats_ring_dmap,
2541                         BUS_DMASYNC_PREWRITE);
2542
2543         bwi_init_rxdesc_ring32(sc, st->stats_ctrl_base,
2544                                st->stats_ring_paddr, 0, BWI_TXSTATS_NDESC);
2545         return 0;
2546 }
2547
2548 static void
2549 bwi_setup_rx_desc32(struct bwi_softc *sc, int buf_idx, bus_addr_t paddr,
2550                     int buf_len)
2551 {
2552         struct bwi_ring_data *rd = &sc->sc_rx_rdata;
2553
2554         KKASSERT(buf_idx < BWI_RX_NDESC);
2555         bwi_setup_desc32(sc, rd->rdata_desc, BWI_RX_NDESC, buf_idx,
2556                          paddr, buf_len, 0);
2557 }
2558
2559 static void
2560 bwi_setup_tx_desc32(struct bwi_softc *sc, struct bwi_ring_data *rd,
2561                     int buf_idx, bus_addr_t paddr, int buf_len)
2562 {
2563         KKASSERT(buf_idx < BWI_TX_NDESC);
2564         bwi_setup_desc32(sc, rd->rdata_desc, BWI_TX_NDESC, buf_idx,
2565                          paddr, buf_len, 1);
2566 }
2567
2568 static int
2569 bwi_init_tx_ring64(struct bwi_softc *sc, int ring_idx)
2570 {
2571         /* TODO:64 */
2572         return EOPNOTSUPP;
2573 }
2574
2575 static int
2576 bwi_init_rx_ring64(struct bwi_softc *sc)
2577 {
2578         /* TODO:64 */
2579         return EOPNOTSUPP;
2580 }
2581
2582 static int
2583 bwi_init_txstats64(struct bwi_softc *sc)
2584 {
2585         /* TODO:64 */
2586         return EOPNOTSUPP;
2587 }
2588
2589 static void
2590 bwi_setup_rx_desc64(struct bwi_softc *sc, int buf_idx, bus_addr_t paddr,
2591                     int buf_len)
2592 {
2593         /* TODO:64 */
2594 }
2595
2596 static void
2597 bwi_setup_tx_desc64(struct bwi_softc *sc, struct bwi_ring_data *rd,
2598                     int buf_idx, bus_addr_t paddr, int buf_len)
2599 {
2600         /* TODO:64 */
2601 }
2602
2603 static void
2604 bwi_dma_buf_addr(void *arg, bus_dma_segment_t *seg, int nseg,
2605                  bus_size_t mapsz __unused, int error)
2606 {
2607         if (!error) {
2608                 KASSERT(nseg == 1, ("too many segments(%d)", nseg));
2609                 *((bus_addr_t *)arg) = seg->ds_addr;
2610         }
2611 }
2612
2613 static int
2614 bwi_newbuf(struct bwi_softc *sc, int buf_idx, int init)
2615 {
2616         struct bwi_rxbuf_data *rbd = &sc->sc_rx_bdata;
2617         struct bwi_rxbuf *rxbuf = &rbd->rbd_buf[buf_idx];
2618         struct bwi_rxbuf_hdr *hdr;
2619         bus_dmamap_t map;
2620         bus_addr_t paddr;
2621         struct mbuf *m;
2622         int error;
2623
2624         KKASSERT(buf_idx < BWI_RX_NDESC);
2625
2626         m = m_getcl(init ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
2627         if (m == NULL) {
2628                 error = ENOBUFS;
2629
2630                 /*
2631                  * If the NIC is up and running, we need to:
2632                  * - Clear RX buffer's header.
2633                  * - Restore RX descriptor settings.
2634                  */
2635                 if (init)
2636                         return error;
2637                 else
2638                         goto back;
2639         }
2640         m->m_len = m->m_pkthdr.len = MCLBYTES;
2641
2642         /*
2643          * Try to load RX buf into temporary DMA map
2644          */
2645         error = bus_dmamap_load_mbuf(sc->sc_buf_dtag, rbd->rbd_tmp_dmap, m,
2646                                      bwi_dma_buf_addr, &paddr,
2647                                      init ? BUS_DMA_WAITOK : BUS_DMA_NOWAIT);
2648         if (error) {
2649                 m_freem(m);
2650
2651                 /*
2652                  * See the comment above
2653                  */
2654                 if (init)
2655                         return error;
2656                 else
2657                         goto back;
2658         }
2659
2660         if (!init)
2661                 bus_dmamap_unload(sc->sc_buf_dtag, rxbuf->rb_dmap);
2662         rxbuf->rb_mbuf = m;
2663         rxbuf->rb_paddr = paddr;
2664
2665         /*
2666          * Swap RX buf's DMA map with the loaded temporary one
2667          */
2668         map = rxbuf->rb_dmap;
2669         rxbuf->rb_dmap = rbd->rbd_tmp_dmap;
2670         rbd->rbd_tmp_dmap = map;
2671
2672 back:
2673         /*
2674          * Clear RX buf header
2675          */
2676         hdr = mtod(rxbuf->rb_mbuf, struct bwi_rxbuf_hdr *);
2677         bzero(hdr, sizeof(*hdr));
2678         bus_dmamap_sync(sc->sc_buf_dtag, rxbuf->rb_dmap, BUS_DMASYNC_PREWRITE);
2679
2680         /*
2681          * Setup RX buf descriptor
2682          */
2683         sc->sc_setup_rxdesc(sc, buf_idx, rxbuf->rb_paddr,
2684                             rxbuf->rb_mbuf->m_len - sizeof(*hdr));
2685         return error;
2686 }
2687
2688 static void
2689 bwi_set_addr_filter(struct bwi_softc *sc, uint16_t addr_ofs,
2690                     const uint8_t *addr)
2691 {
2692         int i;
2693
2694         CSR_WRITE_2(sc, BWI_ADDR_FILTER_CTRL,
2695                     BWI_ADDR_FILTER_CTRL_SET | addr_ofs);
2696
2697         for (i = 0; i < (IEEE80211_ADDR_LEN / 2); ++i) {
2698                 uint16_t addr_val;
2699
2700                 addr_val = (uint16_t)addr[i * 2] |
2701                            (((uint16_t)addr[(i * 2) + 1]) << 8);
2702                 CSR_WRITE_2(sc, BWI_ADDR_FILTER_DATA, addr_val);
2703         }
2704 }
2705
2706 static int
2707 bwi_set_chan(struct bwi_softc *sc, struct ieee80211_channel *c)
2708 {
2709         struct ieee80211com *ic = &sc->sc_ic;
2710 #ifdef INVARIANTS
2711         struct ifnet *ifp = &ic->ic_if;
2712 #endif
2713         struct bwi_mac *mac;
2714         uint16_t flags;
2715         u_int chan;
2716
2717         ASSERT_SERIALIZED(ifp->if_serializer);
2718
2719         KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
2720         mac = (struct bwi_mac *)sc->sc_cur_regwin;
2721
2722         chan = ieee80211_chan2ieee(ic, c);
2723
2724         bwi_rf_set_chan(mac, chan, 0);
2725
2726         /*
2727          * Setup radio tap channel freq and flags
2728          */
2729         if (IEEE80211_IS_CHAN_G(c))
2730                 flags = IEEE80211_CHAN_G;
2731         else
2732                 flags = IEEE80211_CHAN_B;
2733
2734         sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq =
2735                 htole16(c->ic_freq);
2736         sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags =
2737                 htole16(flags);
2738
2739         return 0;
2740 }
2741
2742 static void
2743 bwi_next_scan(void *xsc)
2744 {
2745         struct bwi_softc *sc = xsc;
2746         struct ieee80211com *ic = &sc->sc_ic;
2747         struct ifnet *ifp = &ic->ic_if;
2748
2749         lwkt_serialize_enter(ifp->if_serializer);
2750
2751         if (ic->ic_state == IEEE80211_S_SCAN)
2752                 ieee80211_next_scan(ic);
2753
2754         lwkt_serialize_exit(ifp->if_serializer);
2755 }
2756
2757 static int
2758 bwi_rxeof(struct bwi_softc *sc, int end_idx)
2759 {
2760         struct bwi_ring_data *rd = &sc->sc_rx_rdata;
2761         struct bwi_rxbuf_data *rbd = &sc->sc_rx_bdata;
2762         struct ieee80211com *ic = &sc->sc_ic;
2763         struct ifnet *ifp = &ic->ic_if;
2764         int idx, rx_data = 0;
2765
2766         idx = rbd->rbd_idx;
2767         while (idx != end_idx) {
2768                 struct bwi_rxbuf *rb = &rbd->rbd_buf[idx];
2769                 struct bwi_rxbuf_hdr *hdr;
2770                 struct ieee80211_frame_min *wh;
2771                 struct ieee80211_node *ni;
2772                 struct mbuf *m;
2773                 const void *plcp;
2774                 uint16_t flags2;
2775                 int buflen, wh_ofs, hdr_extra, rssi, type, rate;
2776
2777                 m = rb->rb_mbuf;
2778                 bus_dmamap_sync(sc->sc_buf_dtag, rb->rb_dmap,
2779                                 BUS_DMASYNC_POSTREAD);
2780
2781                 if (bwi_newbuf(sc, idx, 0)) {
2782                         ifp->if_ierrors++;
2783                         goto next;
2784                 }
2785
2786                 hdr = mtod(m, struct bwi_rxbuf_hdr *);
2787                 flags2 = le16toh(hdr->rxh_flags2);
2788
2789                 hdr_extra = 0;
2790                 if (flags2 & BWI_RXH_F2_TYPE2FRAME)
2791                         hdr_extra = 2;
2792                 wh_ofs = hdr_extra + 6; /* XXX magic number */
2793
2794                 buflen = le16toh(hdr->rxh_buflen);
2795                 if (buflen < BWI_FRAME_MIN_LEN(wh_ofs)) {
2796                         if_printf(ifp, "short frame %d, hdr_extra %d\n",
2797                                   buflen, hdr_extra);
2798                         ifp->if_ierrors++;
2799                         m_freem(m);
2800                         goto next;
2801                 }
2802
2803                 plcp = ((const uint8_t *)(hdr + 1) + hdr_extra);
2804                 rssi = bwi_calc_rssi(sc, hdr);
2805
2806                 m->m_pkthdr.rcvif = ifp;
2807                 m->m_len = m->m_pkthdr.len = buflen + sizeof(*hdr);
2808                 m_adj(m, sizeof(*hdr) + wh_ofs);
2809
2810                 if (htole16(hdr->rxh_flags1) & BWI_RXH_F1_OFDM)
2811                         rate = bwi_ofdm_plcp2rate(plcp);
2812                 else
2813                         rate = bwi_ds_plcp2rate(plcp);
2814
2815                 /* RX radio tap */
2816                 if (sc->sc_drvbpf != NULL)
2817                         bwi_rx_radiotap(sc, m, hdr, plcp, rate, rssi);
2818
2819                 m_adj(m, -IEEE80211_CRC_LEN);
2820
2821                 wh = mtod(m, struct ieee80211_frame_min *);
2822                 ni = ieee80211_find_rxnode(ic, wh);
2823
2824                 type = ieee80211_input(ic, m, ni, rssi - BWI_NOISE_FLOOR,
2825                                        le16toh(hdr->rxh_tsf));
2826                 ieee80211_free_node(ni);
2827
2828                 if (type == IEEE80211_FC0_TYPE_DATA) {
2829                         rx_data = 1;
2830                         sc->sc_rx_rate = rate;
2831                 }
2832 next:
2833                 idx = (idx + 1) % BWI_RX_NDESC;
2834         }
2835
2836         rbd->rbd_idx = idx;
2837         bus_dmamap_sync(sc->sc_rxring_dtag, rd->rdata_dmap,
2838                         BUS_DMASYNC_PREWRITE);
2839         return rx_data;
2840 }
2841
2842 static int
2843 bwi_rxeof32(struct bwi_softc *sc)
2844 {
2845         uint32_t val, rx_ctrl;
2846         int end_idx, rx_data;
2847
2848         rx_ctrl = sc->sc_rx_rdata.rdata_txrx_ctrl;
2849
2850         val = CSR_READ_4(sc, rx_ctrl + BWI_RX32_STATUS);
2851         end_idx = __SHIFTOUT(val, BWI_RX32_STATUS_INDEX_MASK) /
2852                   sizeof(struct bwi_desc32);
2853
2854         rx_data = bwi_rxeof(sc, end_idx);
2855
2856         CSR_WRITE_4(sc, rx_ctrl + BWI_RX32_INDEX,
2857                     end_idx * sizeof(struct bwi_desc32));
2858
2859         return rx_data;
2860 }
2861
2862 static int
2863 bwi_rxeof64(struct bwi_softc *sc)
2864 {
2865         /* TODO:64 */
2866         return 0;
2867 }
2868
2869 static void
2870 bwi_reset_rx_ring32(struct bwi_softc *sc, uint32_t rx_ctrl)
2871 {
2872         int i;
2873
2874         CSR_WRITE_4(sc, rx_ctrl + BWI_RX32_CTRL, 0);
2875
2876 #define NRETRY 10
2877
2878         for (i = 0; i < NRETRY; ++i) {
2879                 uint32_t status;
2880
2881                 status = CSR_READ_4(sc, rx_ctrl + BWI_RX32_STATUS);
2882                 if (__SHIFTOUT(status, BWI_RX32_STATUS_STATE_MASK) ==
2883                     BWI_RX32_STATUS_STATE_DISABLED)
2884                         break;
2885
2886                 DELAY(1000);
2887         }
2888         if (i == NRETRY)
2889                 if_printf(&sc->sc_ic.ic_if, "reset rx ring timedout\n");
2890
2891 #undef NRETRY
2892
2893         CSR_WRITE_4(sc, rx_ctrl + BWI_RX32_RINGINFO, 0);
2894 }
2895
2896 static void
2897 bwi_free_txstats32(struct bwi_softc *sc)
2898 {
2899         bwi_reset_rx_ring32(sc, sc->sc_txstats->stats_ctrl_base);
2900 }
2901
2902 static void
2903 bwi_free_rx_ring32(struct bwi_softc *sc)
2904 {
2905         struct bwi_ring_data *rd = &sc->sc_rx_rdata;
2906         struct bwi_rxbuf_data *rbd = &sc->sc_rx_bdata;
2907         int i;
2908
2909         bwi_reset_rx_ring32(sc, rd->rdata_txrx_ctrl);
2910
2911         for (i = 0; i < BWI_RX_NDESC; ++i) {
2912                 struct bwi_rxbuf *rb = &rbd->rbd_buf[i];
2913
2914                 if (rb->rb_mbuf != NULL) {
2915                         bus_dmamap_unload(sc->sc_buf_dtag, rb->rb_dmap);
2916                         m_freem(rb->rb_mbuf);
2917                         rb->rb_mbuf = NULL;
2918                 }
2919         }
2920 }
2921
2922 static void
2923 bwi_free_tx_ring32(struct bwi_softc *sc, int ring_idx)
2924 {
2925         struct bwi_ring_data *rd;
2926         struct bwi_txbuf_data *tbd;
2927         struct ifnet *ifp = &sc->sc_ic.ic_if;
2928         uint32_t state, val;
2929         int i;
2930
2931         KKASSERT(ring_idx < BWI_TX_NRING);
2932         rd = &sc->sc_tx_rdata[ring_idx];
2933         tbd = &sc->sc_tx_bdata[ring_idx];
2934
2935 #define NRETRY 10
2936
2937         for (i = 0; i < NRETRY; ++i) {
2938                 val = CSR_READ_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_STATUS);
2939                 state = __SHIFTOUT(val, BWI_TX32_STATUS_STATE_MASK);
2940                 if (state == BWI_TX32_STATUS_STATE_DISABLED ||
2941                     state == BWI_TX32_STATUS_STATE_IDLE ||
2942                     state == BWI_TX32_STATUS_STATE_STOPPED)
2943                         break;
2944
2945                 DELAY(1000);
2946         }
2947         if (i == NRETRY) {
2948                 if_printf(ifp, "wait for TX ring(%d) stable timed out\n",
2949                           ring_idx);
2950         }
2951
2952         CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_CTRL, 0);
2953         for (i = 0; i < NRETRY; ++i) {
2954                 val = CSR_READ_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_STATUS);
2955                 state = __SHIFTOUT(val, BWI_TX32_STATUS_STATE_MASK);
2956                 if (state == BWI_TX32_STATUS_STATE_DISABLED)
2957                         break;
2958
2959                 DELAY(1000);
2960         }
2961         if (i == NRETRY)
2962                 if_printf(ifp, "reset TX ring (%d) timed out\n", ring_idx);
2963
2964 #undef NRETRY
2965
2966         DELAY(1000);
2967
2968         CSR_WRITE_4(sc, rd->rdata_txrx_ctrl + BWI_TX32_RINGINFO, 0);
2969
2970         for (i = 0; i < BWI_TX_NDESC; ++i) {
2971                 struct bwi_txbuf *tb = &tbd->tbd_buf[i];
2972
2973                 if (tb->tb_mbuf != NULL) {
2974                         bus_dmamap_unload(sc->sc_buf_dtag, tb->tb_dmap);
2975                         m_freem(tb->tb_mbuf);
2976                         tb->tb_mbuf = NULL;
2977                 }
2978                 if (tb->tb_ni != NULL) {
2979                         ieee80211_free_node(tb->tb_ni);
2980                         tb->tb_ni = NULL;
2981                 }
2982         }
2983 }
2984
2985 static void
2986 bwi_free_txstats64(struct bwi_softc *sc)
2987 {
2988         /* TODO:64 */
2989 }
2990
2991 static void
2992 bwi_free_rx_ring64(struct bwi_softc *sc)
2993 {
2994         /* TODO:64 */
2995 }
2996
2997 static void
2998 bwi_free_tx_ring64(struct bwi_softc *sc, int ring_idx)
2999 {
3000         /* TODO:64 */
3001 }
3002
3003 static int
3004 bwi_encap(struct bwi_softc *sc, int idx, struct mbuf *m,
3005           struct ieee80211_node **ni0, int mgt_pkt)
3006 {
3007         struct ieee80211com *ic = &sc->sc_ic;
3008         struct ieee80211_node *ni = *ni0;
3009         struct bwi_ring_data *rd = &sc->sc_tx_rdata[BWI_TX_DATA_RING];
3010         struct bwi_txbuf_data *tbd = &sc->sc_tx_bdata[BWI_TX_DATA_RING];
3011         struct bwi_txbuf *tb = &tbd->tbd_buf[idx];
3012         struct bwi_mac *mac;
3013         struct bwi_txbuf_hdr *hdr;
3014         struct ieee80211_frame *wh;
3015         uint8_t rate, rate_fb;
3016         uint32_t mac_ctrl;
3017         uint16_t phy_ctrl;
3018         bus_addr_t paddr;
3019         int pkt_len, error, mcast_pkt = 0;
3020 #if 0
3021         const uint8_t *p;
3022         int i;
3023 #endif
3024
3025         KKASSERT(ni != NULL);
3026         KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
3027         mac = (struct bwi_mac *)sc->sc_cur_regwin;
3028
3029         wh = mtod(m, struct ieee80211_frame *);
3030
3031         /* Get 802.11 frame len before prepending TX header */
3032         pkt_len = m->m_pkthdr.len + IEEE80211_CRC_LEN;
3033
3034         /*
3035          * Find TX rate
3036          */
3037         bzero(tb->tb_rateidx, sizeof(tb->tb_rateidx));
3038         if (!mgt_pkt) {
3039                 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) {
3040                         int idx;
3041
3042                         rate = IEEE80211_RS_RATE(&ni->ni_rates,
3043                                         ic->ic_fixed_rate);
3044
3045                         if (ic->ic_fixed_rate >= 1)
3046                                 idx = ic->ic_fixed_rate - 1;
3047                         else
3048                                 idx = 0;
3049                         rate_fb = IEEE80211_RS_RATE(&ni->ni_rates, idx);
3050                 } else {
3051                         tb->tb_rateidx_cnt = ieee80211_ratectl_findrate(ni,
3052                                 m->m_pkthdr.len, tb->tb_rateidx, BWI_NTXRATE);
3053
3054                         rate = IEEE80211_RS_RATE(&ni->ni_rates,
3055                                                  tb->tb_rateidx[0]);
3056                         if (tb->tb_rateidx_cnt == BWI_NTXRATE) {
3057                                 rate_fb = IEEE80211_RS_RATE(&ni->ni_rates,
3058                                                             tb->tb_rateidx[1]);
3059                         } else {
3060                                 rate_fb = rate;
3061                         }
3062                         tb->tb_buflen = m->m_pkthdr.len;
3063                 }
3064         } else {
3065                 /* Fixed at 1Mbits/s for mgt frames */
3066                 rate = rate_fb = (1 * 2);
3067         }
3068
3069         if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
3070                 rate = rate_fb = ic->ic_mcast_rate;
3071                 mcast_pkt = 1;
3072         }
3073
3074         if (rate == 0 || rate_fb == 0) {
3075                 /* XXX this should not happen */
3076                 if_printf(&ic->ic_if, "invalid rate %u or fallback rate %u",
3077                           rate, rate_fb);
3078                 rate = rate_fb = (1 * 2); /* Force 1Mbits/s */
3079         }
3080         sc->sc_tx_rate = rate;
3081
3082         /*
3083          * TX radio tap
3084          */
3085         if (sc->sc_drvbpf != NULL) {
3086                 sc->sc_tx_th.wt_flags = 0;
3087                 if (wh->i_fc[1] & IEEE80211_FC1_WEP)
3088                         sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
3089                 if (ieee80211_rate2modtype(rate) == IEEE80211_MODTYPE_DS &&
3090                     (ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
3091                     rate != (1 * 2)) {
3092                         sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3093                 }
3094                 sc->sc_tx_th.wt_rate = rate;
3095
3096                 bpf_ptap(sc->sc_drvbpf, m, &sc->sc_tx_th, sc->sc_tx_th_len);
3097         }
3098
3099         /*
3100          * Setup the embedded TX header
3101          */
3102         M_PREPEND(m, sizeof(*hdr), MB_DONTWAIT);
3103         if (m == NULL) {
3104                 if_printf(&ic->ic_if, "prepend TX header failed\n");
3105                 return ENOBUFS;
3106         }
3107         hdr = mtod(m, struct bwi_txbuf_hdr *);
3108
3109         bzero(hdr, sizeof(*hdr));
3110
3111         bcopy(wh->i_fc, hdr->txh_fc, sizeof(hdr->txh_fc));
3112         bcopy(wh->i_addr1, hdr->txh_addr1, sizeof(hdr->txh_addr1));
3113
3114         if (!mcast_pkt) {
3115                 uint16_t dur;
3116                 uint8_t ack_rate;
3117
3118                 ack_rate = ieee80211_ack_rate(ni, rate_fb);
3119                 dur = ieee80211_txtime(ni,
3120                 sizeof(struct ieee80211_frame_ack) + IEEE80211_CRC_LEN,
3121                 ack_rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
3122
3123                 hdr->txh_fb_duration = htole16(dur);
3124         }
3125
3126         hdr->txh_id = __SHIFTIN(BWI_TX_DATA_RING, BWI_TXH_ID_RING_MASK) |
3127                       __SHIFTIN(idx, BWI_TXH_ID_IDX_MASK);
3128
3129         bwi_plcp_header(hdr->txh_plcp, pkt_len, rate);
3130         bwi_plcp_header(hdr->txh_fb_plcp, pkt_len, rate_fb);
3131
3132         phy_ctrl = __SHIFTIN(mac->mac_rf.rf_ant_mode,
3133                              BWI_TXH_PHY_C_ANTMODE_MASK);
3134         if (ieee80211_rate2modtype(rate) == IEEE80211_MODTYPE_OFDM)
3135                 phy_ctrl |= BWI_TXH_PHY_C_OFDM;
3136         else if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && rate != (2 * 1))
3137                 phy_ctrl |= BWI_TXH_PHY_C_SHPREAMBLE;
3138
3139         mac_ctrl = BWI_TXH_MAC_C_HWSEQ | BWI_TXH_MAC_C_FIRST_FRAG;
3140         if (!IEEE80211_IS_MULTICAST(wh->i_addr1))
3141                 mac_ctrl |= BWI_TXH_MAC_C_ACK;
3142         if (ieee80211_rate2modtype(rate_fb) == IEEE80211_MODTYPE_OFDM)
3143                 mac_ctrl |= BWI_TXH_MAC_C_FB_OFDM;
3144
3145         hdr->txh_mac_ctrl = htole32(mac_ctrl);
3146         hdr->txh_phy_ctrl = htole16(phy_ctrl);
3147
3148         /* Catch any further usage */
3149         hdr = NULL;
3150         wh = NULL;
3151
3152         /* DMA load */
3153         error = bus_dmamap_load_mbuf(sc->sc_buf_dtag, tb->tb_dmap, m,
3154                                      bwi_dma_buf_addr, &paddr, BUS_DMA_NOWAIT);
3155         if (error && error != EFBIG) {
3156                 if_printf(&ic->ic_if, "can't load TX buffer (1) %d\n", error);
3157                 goto back;
3158         }
3159
3160         if (error) {    /* error == EFBIG */
3161                 struct mbuf *m_new;
3162
3163                 m_new = m_defrag(m, MB_DONTWAIT);
3164                 if (m_new == NULL) {
3165                         if_printf(&ic->ic_if, "can't defrag TX buffer\n");
3166                         error = ENOBUFS;
3167                         goto back;
3168                 } else {
3169                         m = m_new;
3170                 }
3171
3172                 error = bus_dmamap_load_mbuf(sc->sc_buf_dtag, tb->tb_dmap, m,
3173                                              bwi_dma_buf_addr, &paddr,
3174                                              BUS_DMA_NOWAIT);
3175                 if (error) {
3176                         if_printf(&ic->ic_if, "can't load TX buffer (2) %d\n",
3177                                   error);
3178                         goto back;
3179                 }
3180         }
3181         error = 0;
3182
3183         bus_dmamap_sync(sc->sc_buf_dtag, tb->tb_dmap, BUS_DMASYNC_PREWRITE);
3184
3185         if (mgt_pkt || mcast_pkt) {
3186                 /* Don't involve mcast/mgt packets into TX rate control */
3187                 ieee80211_free_node(ni);
3188                 *ni0 = ni = NULL;
3189         }
3190         tb->tb_mbuf = m;
3191         tb->tb_ni = ni;
3192
3193 #if 0
3194         p = mtod(m, const uint8_t *);
3195         for (i = 0; i < m->m_pkthdr.len; ++i) {
3196                 if (i != 0 && i % 8 == 0)
3197                         kprintf("\n");
3198                 kprintf("%02x ", p[i]);
3199         }
3200         kprintf("\n");
3201 #endif
3202
3203         DPRINTF(sc, BWI_DBG_TX, "idx %d, pkt_len %d, buflen %d\n",
3204                 idx, pkt_len, m->m_pkthdr.len);
3205
3206         /* Setup TX descriptor */
3207         sc->sc_setup_txdesc(sc, rd, idx, paddr, m->m_pkthdr.len);
3208         bus_dmamap_sync(sc->sc_txring_dtag, rd->rdata_dmap,
3209                         BUS_DMASYNC_PREWRITE);
3210
3211         /* Kick start */
3212         sc->sc_start_tx(sc, rd->rdata_txrx_ctrl, idx);
3213
3214 back:
3215         if (error)
3216                 m_freem(m);
3217         return error;
3218 }
3219
3220 static void
3221 bwi_start_tx32(struct bwi_softc *sc, uint32_t tx_ctrl, int idx)
3222 {
3223         idx = (idx + 1) % BWI_TX_NDESC;
3224         CSR_WRITE_4(sc, tx_ctrl + BWI_TX32_INDEX,
3225                     idx * sizeof(struct bwi_desc32));
3226 }
3227
3228 static void
3229 bwi_start_tx64(struct bwi_softc *sc, uint32_t tx_ctrl, int idx)
3230 {
3231         /* TODO:64 */
3232 }
3233
3234 static void
3235 bwi_txeof_status32(struct bwi_softc *sc)
3236 {
3237         struct ifnet *ifp = &sc->sc_ic.ic_if;
3238         uint32_t val, ctrl_base;
3239         int end_idx;
3240
3241         ctrl_base = sc->sc_txstats->stats_ctrl_base;
3242
3243         val = CSR_READ_4(sc, ctrl_base + BWI_RX32_STATUS);
3244         end_idx = __SHIFTOUT(val, BWI_RX32_STATUS_INDEX_MASK) /
3245                   sizeof(struct bwi_desc32);
3246
3247         bwi_txeof_status(sc, end_idx);
3248
3249         CSR_WRITE_4(sc, ctrl_base + BWI_RX32_INDEX,
3250                     end_idx * sizeof(struct bwi_desc32));
3251
3252         if (!ifq_is_oactive(&ifp->if_snd))
3253                 ifp->if_start(ifp);
3254 }
3255
3256 static void
3257 bwi_txeof_status64(struct bwi_softc *sc)
3258 {
3259         /* TODO:64 */
3260 }
3261
3262 static void
3263 _bwi_txeof(struct bwi_softc *sc, uint16_t tx_id, int acked, int data_txcnt)
3264 {
3265         struct ifnet *ifp = &sc->sc_ic.ic_if;
3266         struct bwi_txbuf_data *tbd;
3267         struct bwi_txbuf *tb;
3268         int ring_idx, buf_idx;
3269
3270         if (tx_id == 0) {
3271                 if_printf(ifp, "zero tx id\n");
3272                 return;
3273         }
3274
3275         ring_idx = __SHIFTOUT(tx_id, BWI_TXH_ID_RING_MASK);
3276         buf_idx = __SHIFTOUT(tx_id, BWI_TXH_ID_IDX_MASK);
3277
3278         KKASSERT(ring_idx == BWI_TX_DATA_RING);
3279         KKASSERT(buf_idx < BWI_TX_NDESC);
3280
3281         tbd = &sc->sc_tx_bdata[ring_idx];
3282         KKASSERT(tbd->tbd_used > 0);
3283         tbd->tbd_used--;
3284
3285         tb = &tbd->tbd_buf[buf_idx];
3286
3287         DPRINTF(sc, BWI_DBG_TXEOF, "txeof idx %d, "
3288                 "acked %d, data_txcnt %d, ni %p\n",
3289                 buf_idx, acked, data_txcnt, tb->tb_ni);
3290
3291         bus_dmamap_unload(sc->sc_buf_dtag, tb->tb_dmap);
3292         m_freem(tb->tb_mbuf);
3293         tb->tb_mbuf = NULL;
3294
3295         if (tb->tb_ni != NULL) {
3296                 struct ieee80211_ratectl_res res[BWI_NTXRATE];
3297                 int res_len, retry;
3298
3299                 if (data_txcnt <= BWI_SHRETRY_FB || tb->tb_rateidx_cnt == 1) {
3300                         res_len = 1;
3301                         res[0].rc_res_rateidx = tb->tb_rateidx[0];
3302                         res[0].rc_res_tries = data_txcnt;
3303                 } else {
3304                         res_len = BWI_NTXRATE;
3305                         res[0].rc_res_rateidx = tb->tb_rateidx[0];
3306                         res[0].rc_res_tries = BWI_SHRETRY_FB;
3307                         res[1].rc_res_rateidx = tb->tb_rateidx[1];
3308                         res[1].rc_res_tries = data_txcnt - BWI_SHRETRY_FB;
3309                 }
3310
3311                 if (acked) {
3312                         ifp->if_opackets++;
3313                         retry = data_txcnt > 0 ? data_txcnt - 1 : 0;
3314                 } else {
3315                         ifp->if_oerrors++;
3316                         retry = data_txcnt;
3317                 }
3318
3319                 ieee80211_ratectl_tx_complete(tb->tb_ni, tb->tb_buflen,
3320                         res, res_len, retry, 0, !acked);
3321
3322                 ieee80211_free_node(tb->tb_ni);
3323                 tb->tb_ni = NULL;
3324         } else {
3325                 /* XXX mgt packet error */
3326                 ifp->if_opackets++;
3327         }
3328
3329         if (tbd->tbd_used == 0)
3330                 sc->sc_tx_timer = 0;
3331
3332         ifq_clr_oactive(&ifp->if_snd);
3333 }
3334
3335 static void
3336 bwi_txeof_status(struct bwi_softc *sc, int end_idx)
3337 {
3338         struct bwi_txstats_data *st = sc->sc_txstats;
3339         int idx;
3340
3341         bus_dmamap_sync(st->stats_dtag, st->stats_dmap, BUS_DMASYNC_POSTREAD);
3342
3343         idx = st->stats_idx;
3344         while (idx != end_idx) {
3345                 const struct bwi_txstats *stats = &st->stats[idx];
3346
3347                 if ((stats->txs_flags & BWI_TXS_F_PENDING) == 0) {
3348                         int data_txcnt;
3349
3350                         data_txcnt = __SHIFTOUT(stats->txs_txcnt,
3351                                                 BWI_TXS_TXCNT_DATA);
3352                         _bwi_txeof(sc, le16toh(stats->txs_id),
3353                                    stats->txs_flags & BWI_TXS_F_ACKED,
3354                                    data_txcnt);
3355                 }
3356                 idx = (idx + 1) % BWI_TXSTATS_NDESC;
3357         }
3358         st->stats_idx = idx;
3359 }
3360
3361 static void
3362 bwi_txeof(struct bwi_softc *sc)
3363 {
3364         struct ifnet *ifp = &sc->sc_ic.ic_if;
3365
3366         for (;;) {
3367                 uint32_t tx_status0, tx_status1;
3368                 uint16_t tx_id;
3369                 int data_txcnt;
3370
3371                 tx_status0 = CSR_READ_4(sc, BWI_TXSTATUS0);
3372                 if ((tx_status0 & BWI_TXSTATUS0_VALID) == 0)
3373                         break;
3374                 tx_status1 = CSR_READ_4(sc, BWI_TXSTATUS1);
3375
3376                 tx_id = __SHIFTOUT(tx_status0, BWI_TXSTATUS0_TXID_MASK);
3377                 data_txcnt = __SHIFTOUT(tx_status0,
3378                                 BWI_TXSTATUS0_DATA_TXCNT_MASK);
3379
3380                 if (tx_status0 & (BWI_TXSTATUS0_AMPDU | BWI_TXSTATUS0_PENDING))
3381                         continue;
3382
3383                 _bwi_txeof(sc, tx_id, tx_status0 & BWI_TXSTATUS0_ACKED,
3384                            data_txcnt);
3385         }
3386
3387         if (!ifq_is_oactive(&ifp->if_snd))
3388                 ifp->if_start(ifp);
3389 }
3390
3391 static int
3392 bwi_bbp_power_on(struct bwi_softc *sc, enum bwi_clock_mode clk_mode)
3393 {
3394         bwi_power_on(sc, 1);
3395         return bwi_set_clock_mode(sc, clk_mode);
3396 }
3397
3398 static void
3399 bwi_bbp_power_off(struct bwi_softc *sc)
3400 {
3401         bwi_set_clock_mode(sc, BWI_CLOCK_MODE_SLOW);
3402         bwi_power_off(sc, 1);
3403 }
3404
3405 static int
3406 bwi_get_pwron_delay(struct bwi_softc *sc)
3407 {
3408         struct bwi_regwin *com, *old;
3409         struct bwi_clock_freq freq;
3410         uint32_t val;
3411         int error;
3412
3413         com = &sc->sc_com_regwin;
3414         KKASSERT(BWI_REGWIN_EXIST(com));
3415
3416         if ((sc->sc_cap & BWI_CAP_CLKMODE) == 0)
3417                 return 0;
3418
3419         error = bwi_regwin_switch(sc, com, &old);
3420         if (error)
3421                 return error;
3422
3423         bwi_get_clock_freq(sc, &freq);
3424
3425         val = CSR_READ_4(sc, BWI_PLL_ON_DELAY);
3426         sc->sc_pwron_delay = howmany((val + 2) * 1000000, freq.clkfreq_min);
3427         DPRINTF(sc, BWI_DBG_ATTACH, "power on delay %u\n", sc->sc_pwron_delay);
3428
3429         return bwi_regwin_switch(sc, old, NULL);
3430 }
3431
3432 static int
3433 bwi_bus_attach(struct bwi_softc *sc)
3434 {
3435         struct bwi_regwin *bus, *old;
3436         int error;
3437
3438         bus = &sc->sc_bus_regwin;
3439
3440         error = bwi_regwin_switch(sc, bus, &old);
3441         if (error)
3442                 return error;
3443
3444         if (!bwi_regwin_is_enabled(sc, bus))
3445                 bwi_regwin_enable(sc, bus, 0);
3446
3447         /* Disable interripts */
3448         CSR_WRITE_4(sc, BWI_INTRVEC, 0);
3449
3450         return bwi_regwin_switch(sc, old, NULL);
3451 }
3452
3453 static const char *
3454 bwi_regwin_name(const struct bwi_regwin *rw)
3455 {
3456         switch (rw->rw_type) {
3457         case BWI_REGWIN_T_COM:
3458                 return "COM";
3459         case BWI_REGWIN_T_BUSPCI:
3460                 return "PCI";
3461         case BWI_REGWIN_T_MAC:
3462                 return "MAC";
3463         case BWI_REGWIN_T_BUSPCIE:
3464                 return "PCIE";
3465         }
3466         panic("unknown regwin type 0x%04x", rw->rw_type);
3467         return NULL;
3468 }
3469
3470 static uint32_t
3471 bwi_regwin_disable_bits(struct bwi_softc *sc)
3472 {
3473         uint32_t busrev;
3474
3475         /* XXX cache this */
3476         busrev = __SHIFTOUT(CSR_READ_4(sc, BWI_ID_LO), BWI_ID_LO_BUSREV_MASK);
3477         DPRINTF(sc, BWI_DBG_ATTACH | BWI_DBG_INIT | BWI_DBG_MISC,
3478                 "bus rev %u\n", busrev);
3479
3480         if (busrev == BWI_BUSREV_0)
3481                 return BWI_STATE_LO_DISABLE1;
3482         else if (busrev == BWI_BUSREV_1)
3483                 return BWI_STATE_LO_DISABLE2;
3484         else
3485                 return (BWI_STATE_LO_DISABLE1 | BWI_STATE_LO_DISABLE2);
3486 }
3487
3488 int
3489 bwi_regwin_is_enabled(struct bwi_softc *sc, struct bwi_regwin *rw)
3490 {
3491         uint32_t val, disable_bits;
3492
3493         disable_bits = bwi_regwin_disable_bits(sc);
3494         val = CSR_READ_4(sc, BWI_STATE_LO);
3495
3496         if ((val & (BWI_STATE_LO_CLOCK |
3497                     BWI_STATE_LO_RESET |
3498                     disable_bits)) == BWI_STATE_LO_CLOCK) {
3499                 DPRINTF(sc, BWI_DBG_ATTACH | BWI_DBG_INIT, "%s is enabled\n",
3500                         bwi_regwin_name(rw));
3501                 return 1;
3502         } else {
3503                 DPRINTF(sc, BWI_DBG_ATTACH | BWI_DBG_INIT, "%s is disabled\n",
3504                         bwi_regwin_name(rw));
3505                 return 0;
3506         }
3507 }
3508
3509 void
3510 bwi_regwin_disable(struct bwi_softc *sc, struct bwi_regwin *rw, uint32_t flags)
3511 {
3512         uint32_t state_lo, disable_bits;
3513         int i;
3514
3515         state_lo = CSR_READ_4(sc, BWI_STATE_LO);
3516
3517         /*
3518          * If current regwin is in 'reset' state, it was already disabled.
3519          */
3520         if (state_lo & BWI_STATE_LO_RESET) {
3521                 DPRINTF(sc, BWI_DBG_ATTACH | BWI_DBG_INIT,
3522                         "%s was already disabled\n", bwi_regwin_name(rw));
3523                 return;
3524         }
3525
3526         disable_bits = bwi_regwin_disable_bits(sc);
3527
3528         /*
3529          * Disable normal clock
3530          */
3531         state_lo = BWI_STATE_LO_CLOCK | disable_bits;
3532         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3533
3534         /*
3535          * Wait until normal clock is disabled
3536          */
3537 #define NRETRY  1000
3538         for (i = 0; i < NRETRY; ++i) {
3539                 state_lo = CSR_READ_4(sc, BWI_STATE_LO);
3540                 if (state_lo & disable_bits)
3541                         break;
3542                 DELAY(10);
3543         }
3544         if (i == NRETRY) {
3545                 device_printf(sc->sc_dev, "%s disable clock timeout\n",
3546                               bwi_regwin_name(rw));
3547         }
3548
3549         for (i = 0; i < NRETRY; ++i) {
3550                 uint32_t state_hi;
3551
3552                 state_hi = CSR_READ_4(sc, BWI_STATE_HI);
3553                 if ((state_hi & BWI_STATE_HI_BUSY) == 0)
3554                         break;
3555                 DELAY(10);
3556         }
3557         if (i == NRETRY) {
3558                 device_printf(sc->sc_dev, "%s wait BUSY unset timeout\n",
3559                               bwi_regwin_name(rw));
3560         }
3561 #undef NRETRY
3562
3563         /*
3564          * Reset and disable regwin with gated clock
3565          */
3566         state_lo = BWI_STATE_LO_RESET | disable_bits |
3567                    BWI_STATE_LO_CLOCK | BWI_STATE_LO_GATED_CLOCK |
3568                    __SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);
3569         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3570
3571         /* Flush pending bus write */
3572         CSR_READ_4(sc, BWI_STATE_LO);
3573         DELAY(1);
3574
3575         /* Reset and disable regwin */
3576         state_lo = BWI_STATE_LO_RESET | disable_bits |
3577                    __SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);
3578         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3579
3580         /* Flush pending bus write */
3581         CSR_READ_4(sc, BWI_STATE_LO);
3582         DELAY(1);
3583 }
3584
3585 void
3586 bwi_regwin_enable(struct bwi_softc *sc, struct bwi_regwin *rw, uint32_t flags)
3587 {
3588         uint32_t state_lo, state_hi, imstate;
3589
3590         bwi_regwin_disable(sc, rw, flags);
3591
3592         /* Reset regwin with gated clock */
3593         state_lo = BWI_STATE_LO_RESET |
3594                    BWI_STATE_LO_CLOCK |
3595                    BWI_STATE_LO_GATED_CLOCK |
3596                    __SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);
3597         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3598
3599         /* Flush pending bus write */
3600         CSR_READ_4(sc, BWI_STATE_LO);
3601         DELAY(1);
3602
3603         state_hi = CSR_READ_4(sc, BWI_STATE_HI);
3604         if (state_hi & BWI_STATE_HI_SERROR)
3605                 CSR_WRITE_4(sc, BWI_STATE_HI, 0);
3606
3607         imstate = CSR_READ_4(sc, BWI_IMSTATE);
3608         if (imstate & (BWI_IMSTATE_INBAND_ERR | BWI_IMSTATE_TIMEOUT)) {
3609                 imstate &= ~(BWI_IMSTATE_INBAND_ERR | BWI_IMSTATE_TIMEOUT);
3610                 CSR_WRITE_4(sc, BWI_IMSTATE, imstate);
3611         }
3612
3613         /* Enable regwin with gated clock */
3614         state_lo = BWI_STATE_LO_CLOCK |
3615                    BWI_STATE_LO_GATED_CLOCK |
3616                    __SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);
3617         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3618
3619         /* Flush pending bus write */
3620         CSR_READ_4(sc, BWI_STATE_LO);
3621         DELAY(1);
3622
3623         /* Enable regwin with normal clock */
3624         state_lo = BWI_STATE_LO_CLOCK |
3625                    __SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);
3626         CSR_WRITE_4(sc, BWI_STATE_LO, state_lo);
3627
3628         /* Flush pending bus write */
3629         CSR_READ_4(sc, BWI_STATE_LO);
3630         DELAY(1);
3631 }
3632
3633 static void
3634 bwi_set_bssid(struct bwi_softc *sc, const uint8_t *bssid)
3635 {
3636         struct ieee80211com *ic = &sc->sc_ic;
3637         struct bwi_mac *mac;
3638         struct bwi_myaddr_bssid buf;
3639         const uint8_t *p;
3640         uint32_t val;
3641         int n, i;
3642
3643         KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
3644         mac = (struct bwi_mac *)sc->sc_cur_regwin;
3645
3646         bwi_set_addr_filter(sc, BWI_ADDR_FILTER_BSSID, bssid);
3647
3648         bcopy(ic->ic_myaddr, buf.myaddr, sizeof(buf.myaddr));
3649         bcopy(bssid, buf.bssid, sizeof(buf.bssid));
3650
3651         n = sizeof(buf) / sizeof(val);
3652         p = (const uint8_t *)&buf;
3653         for (i = 0; i < n; ++i) {
3654                 int j;
3655
3656                 val = 0;
3657                 for (j = 0; j < sizeof(val); ++j)
3658                         val |= ((uint32_t)(*p++)) << (j * 8);
3659
3660                 TMPLT_WRITE_4(mac, 0x20 + (i * sizeof(val)), val);
3661         }
3662 }
3663
3664 static void
3665 bwi_updateslot(struct ifnet *ifp)
3666 {
3667         struct bwi_softc *sc = ifp->if_softc;
3668         struct ieee80211com *ic = &sc->sc_ic;
3669         struct bwi_mac *mac;
3670
3671         if ((ifp->if_flags & IFF_RUNNING) == 0)
3672                 return;
3673
3674         ASSERT_SERIALIZED(ifp->if_serializer);
3675
3676         DPRINTF(sc, BWI_DBG_80211, "%s\n", __func__);
3677
3678         KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
3679         mac = (struct bwi_mac *)sc->sc_cur_regwin;
3680
3681         bwi_mac_updateslot(mac, (ic->ic_flags & IEEE80211_F_SHSLOT));
3682 }
3683
3684 static void
3685 bwi_calibrate(void *xsc)
3686 {
3687         struct bwi_softc *sc = xsc;
3688         struct ieee80211com *ic = &sc->sc_ic;
3689         struct ifnet *ifp = &ic->ic_if;
3690
3691         lwkt_serialize_enter(ifp->if_serializer);
3692
3693         if (ic->ic_state == IEEE80211_S_RUN) {
3694                 struct bwi_mac *mac;
3695
3696                 KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
3697                 mac = (struct bwi_mac *)sc->sc_cur_regwin;
3698
3699                 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
3700                         bwi_mac_calibrate_txpower(mac, sc->sc_txpwrcb_type);
3701                         sc->sc_txpwrcb_type = BWI_TXPWR_CALIB;
3702                 }
3703
3704                 /* XXX 15 seconds */
3705                 callout_reset(&sc->sc_calib_ch, hz * 15, bwi_calibrate, sc);
3706         }
3707
3708         lwkt_serialize_exit(ifp->if_serializer);
3709 }
3710
3711 static int
3712 bwi_calc_rssi(struct bwi_softc *sc, const struct bwi_rxbuf_hdr *hdr)
3713 {
3714         struct bwi_mac *mac;
3715
3716         KKASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC);
3717         mac = (struct bwi_mac *)sc->sc_cur_regwin;
3718
3719         return bwi_rf_calc_rssi(mac, hdr);
3720 }
3721
3722 static void
3723 bwi_rx_radiotap(struct bwi_softc *sc, struct mbuf *m,
3724                 struct bwi_rxbuf_hdr *hdr, const void *plcp,
3725                 int rate, int rssi)
3726 {
3727         const struct ieee80211_frame_min *wh;
3728
3729         KKASSERT(sc->sc_drvbpf != NULL);
3730
3731         sc->sc_rx_th.wr_flags = IEEE80211_RADIOTAP_F_FCS;
3732         if (htole16(hdr->rxh_flags1) & BWI_RXH_F1_SHPREAMBLE)
3733                 sc->sc_rx_th.wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3734
3735         wh = mtod(m, const struct ieee80211_frame_min *);
3736         if (wh->i_fc[1] & IEEE80211_FC1_WEP)
3737                 sc->sc_rx_th.wr_flags |= IEEE80211_RADIOTAP_F_WEP;
3738
3739         sc->sc_rx_th.wr_tsf = hdr->rxh_tsf; /* No endian convertion */
3740         sc->sc_rx_th.wr_rate = rate;
3741         sc->sc_rx_th.wr_antsignal = rssi;
3742         sc->sc_rx_th.wr_antnoise = BWI_NOISE_FLOOR;
3743
3744         bpf_ptap(sc->sc_drvbpf, m, &sc->sc_rx_th, sc->sc_rx_th_len);
3745 }
3746
3747 static void
3748 bwi_led_attach(struct bwi_softc *sc)
3749 {
3750         const uint8_t *led_act = NULL;
3751         uint16_t gpio, val[BWI_LED_MAX];
3752         int i;
3753
3754         for (i = 0; i < NELEM(bwi_vendor_led_act); ++i) {
3755                 if (sc->sc_pci_subvid == bwi_vendor_led_act[i].vid) {
3756                         led_act = bwi_vendor_led_act[i].led_act;
3757                         break;
3758                 }
3759         }
3760         if (led_act == NULL)
3761                 led_act = bwi_default_led_act;
3762
3763         gpio = bwi_read_sprom(sc, BWI_SPROM_GPIO01);
3764         val[0] = __SHIFTOUT(gpio, BWI_SPROM_GPIO_0);
3765         val[1] = __SHIFTOUT(gpio, BWI_SPROM_GPIO_1);
3766
3767         gpio = bwi_read_sprom(sc, BWI_SPROM_GPIO23);
3768         val[2] = __SHIFTOUT(gpio, BWI_SPROM_GPIO_2);
3769         val[3] = __SHIFTOUT(gpio, BWI_SPROM_GPIO_3);
3770
3771         for (i = 0; i < BWI_LED_MAX; ++i) {
3772                 struct bwi_led *led = &sc->sc_leds[i];
3773
3774                 if (val[i] == 0xff) {
3775                         led->l_act = led_act[i];
3776                 } else {
3777                         if (val[i] & BWI_LED_ACT_LOW)
3778                                 led->l_flags |= BWI_LED_F_ACTLOW;
3779                         led->l_act = __SHIFTOUT(val[i], BWI_LED_ACT_MASK);
3780                 }
3781                 led->l_mask = (1 << i);
3782
3783                 if (led->l_act == BWI_LED_ACT_BLINK_SLOW ||
3784                     led->l_act == BWI_LED_ACT_BLINK_POLL ||
3785                     led->l_act == BWI_LED_ACT_BLINK) {
3786                         led->l_flags |= BWI_LED_F_BLINK;
3787                         if (led->l_act == BWI_LED_ACT_BLINK_POLL)
3788                                 led->l_flags |= BWI_LED_F_POLLABLE;
3789                         else if (led->l_act == BWI_LED_ACT_BLINK_SLOW)
3790                                 led->l_flags |= BWI_LED_F_SLOW;
3791
3792                         if (sc->sc_blink_led == NULL) {
3793                                 sc->sc_blink_led = led;
3794                                 if (led->l_flags & BWI_LED_F_SLOW)
3795                                         BWI_LED_SLOWDOWN(sc->sc_led_idle);
3796                         }
3797                 }
3798
3799                 DPRINTF(sc, BWI_DBG_LED | BWI_DBG_ATTACH,
3800                         "%dth led, act %d, lowact %d\n", i,
3801                         led->l_act, led->l_flags & BWI_LED_F_ACTLOW);
3802         }
3803         callout_init(&sc->sc_led_blink_ch);
3804 }
3805
3806 static __inline uint16_t
3807 bwi_led_onoff(const struct bwi_led *led, uint16_t val, int on)
3808 {
3809         if (led->l_flags & BWI_LED_F_ACTLOW)
3810                 on = !on;
3811         if (on)
3812                 val |= led->l_mask;
3813         else
3814                 val &= ~led->l_mask;
3815         return val;
3816 }
3817
3818 static void
3819 bwi_led_newstate(struct bwi_softc *sc, enum ieee80211_state nstate)
3820 {
3821         struct ieee80211com *ic = &sc->sc_ic;
3822         uint16_t val;
3823         int i;
3824
3825         if (nstate == IEEE80211_S_INIT) {
3826                 callout_stop(&sc->sc_led_blink_ch);
3827                 sc->sc_led_blinking = 0;
3828         }
3829
3830         if ((ic->ic_if.if_flags & IFF_RUNNING) == 0)
3831                 return;
3832
3833         val = CSR_READ_2(sc, BWI_MAC_GPIO_CTRL);
3834         for (i = 0; i < BWI_LED_MAX; ++i) {
3835                 struct bwi_led *led = &sc->sc_leds[i];
3836                 int on;
3837
3838                 if (led->l_act == BWI_LED_ACT_UNKN ||
3839                     led->l_act == BWI_LED_ACT_NULL)
3840                         continue;
3841
3842                 if ((led->l_flags & BWI_LED_F_BLINK) &&
3843                     nstate != IEEE80211_S_INIT)
3844                         continue;
3845
3846                 switch (led->l_act) {
3847                 case BWI_LED_ACT_ON:            /* Always on */
3848                         on = 1;
3849                         break;
3850                 case BWI_LED_ACT_OFF:           /* Always off */
3851                 case BWI_LED_ACT_5GHZ:          /* TODO: 11A */
3852                         on = 0;
3853                         break;
3854                 default:
3855                         on = 1;
3856                         switch (nstate) {
3857                         case IEEE80211_S_INIT:
3858                                 on = 0;
3859                                 break;
3860                         case IEEE80211_S_RUN:
3861                                 if (led->l_act == BWI_LED_ACT_11G &&
3862                                     ic->ic_curmode != IEEE80211_MODE_11G)
3863                                         on = 0;
3864                                 break;
3865                         default:
3866                                 if (led->l_act == BWI_LED_ACT_ASSOC)
3867                                         on = 0;
3868                                 break;
3869                         }
3870                         break;
3871                 }
3872
3873                 val = bwi_led_onoff(led, val, on);
3874         }
3875         CSR_WRITE_2(sc, BWI_MAC_GPIO_CTRL, val);
3876 }
3877
3878 static void
3879 bwi_led_event(struct bwi_softc *sc, int event)
3880 {
3881         struct bwi_led *led = sc->sc_blink_led;
3882         int rate;
3883
3884         if (event == BWI_LED_EVENT_POLL) {
3885                 if ((led->l_flags & BWI_LED_F_POLLABLE) == 0)
3886                         return;
3887                 if (ticks - sc->sc_led_ticks < sc->sc_led_idle)
3888                         return;
3889         }
3890
3891         sc->sc_led_ticks = ticks;
3892         if (sc->sc_led_blinking)
3893                 return;
3894
3895         switch (event) {
3896         case BWI_LED_EVENT_RX:
3897                 rate = sc->sc_rx_rate;
3898                 break;
3899         case BWI_LED_EVENT_TX:
3900                 rate = sc->sc_tx_rate;
3901                 break;
3902         case BWI_LED_EVENT_POLL:
3903                 rate = 0;
3904                 break;
3905         default:
3906                 panic("unknown LED event %d", event);
3907                 break;
3908         }
3909         bwi_led_blink_start(sc, bwi_led_duration[rate].on_dur,
3910                             bwi_led_duration[rate].off_dur);
3911 }
3912
3913 static void
3914 bwi_led_blink_start(struct bwi_softc *sc, int on_dur, int off_dur)
3915 {
3916         struct bwi_led *led = sc->sc_blink_led;
3917         uint16_t val;
3918
3919         val = CSR_READ_2(sc, BWI_MAC_GPIO_CTRL);
3920         val = bwi_led_onoff(led, val, 1);
3921         CSR_WRITE_2(sc, BWI_MAC_GPIO_CTRL, val);
3922
3923         if (led->l_flags & BWI_LED_F_SLOW) {
3924                 BWI_LED_SLOWDOWN(on_dur);
3925                 BWI_LED_SLOWDOWN(off_dur);
3926         }
3927
3928         sc->sc_led_blinking = 1;
3929         sc->sc_led_blink_offdur = off_dur;
3930
3931         callout_reset(&sc->sc_led_blink_ch, on_dur, bwi_led_blink_next, sc);
3932 }
3933
3934 static void
3935 bwi_led_blink_next(void *xsc)
3936 {
3937         struct bwi_softc *sc = xsc;
3938         uint16_t val;
3939
3940         val = CSR_READ_2(sc, BWI_MAC_GPIO_CTRL);
3941         val = bwi_led_onoff(sc->sc_blink_led, val, 0);
3942         CSR_WRITE_2(sc, BWI_MAC_GPIO_CTRL, val);
3943
3944         callout_reset(&sc->sc_led_blink_ch, sc->sc_led_blink_offdur,
3945                       bwi_led_blink_end, sc);
3946 }
3947
3948 static void
3949 bwi_led_blink_end(void *xsc)
3950 {
3951         struct bwi_softc *sc = xsc;
3952
3953         sc->sc_led_blinking = 0;
3954 }
3955
3956 static void *
3957 bwi_ratectl_attach(struct ieee80211com *ic, u_int rc)
3958 {
3959         struct bwi_softc *sc = ic->ic_if.if_softc;
3960
3961         switch (rc) {
3962         case IEEE80211_RATECTL_ONOE:
3963                 return &sc->sc_onoe_param;
3964         case IEEE80211_RATECTL_NONE:
3965                 /* This could only happen during detaching */
3966                 return NULL;
3967         default:
3968                 panic("unknown rate control algo %u", rc);
3969                 return NULL;
3970         }
3971 }