1 /* $NetBSD: i82365var.h,v 1.8 1999/10/15 06:07:27 haya Exp $ */
2 /* $FreeBSD: src/sys/dev/pcic/i82365var.h,v 1.26 2001/01/07 16:31:07 imp Exp $ */
3 /* $DragonFly: src/sys/dev/pccard/pcic/Attic/i82365var.h,v 1.1 2004/02/10 07:55:47 joerg Exp $ */
7 * Copyright (c) 1997 Marc Horowitz. All rights reserved.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by Marc Horowitz.
20 * 4. The name of the author may not be used to endorse or promote products
21 * derived from this software without specific prior written permission.
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 #include <bus/pccard/pccardreg.h>
37 #include <dev/pccard/pcic/i82365reg.h>
42 STAILQ_ENTRY(pcic_event) pe_q;
47 #define PCIC_EVENT_INSERTION 0
48 #define PCIC_EVENT_REMOVAL 1
55 bus_space_tag_t ph_bus_t; /* I/O or MEM? I don't mind */
56 bus_space_handle_t ph_bus_h;
57 u_int8_t (*ph_read)(struct pcic_handle*, int);
58 void (*ph_write)(struct pcic_handle *, int, u_int8_t);
65 struct pccard_mem_handle mem[PCIC_MEM_WINS]; /* XXX BAD XXX */
67 struct pccard_io_handle io[PCIC_IO_WINS]; /* XXX BAD XXX */
71 struct thread *event_thread;
72 STAILQ_HEAD(, pcic_event) events;
75 #define PCIC_FLAG_SOCKETP 0x0001
76 #define PCIC_FLAG_CARDP 0x0002
78 #define PCIC_LASTSTATE_PRESENT 0x0002
79 #define PCIC_LASTSTATE_HALF 0x0001
80 #define PCIC_LASTSTATE_EMPTY 0x0000
82 #define C0SA PCIC_CHIP0_BASE+PCIC_SOCKETA_INDEX
83 #define C0SB PCIC_CHIP0_BASE+PCIC_SOCKETB_INDEX
84 #define C1SA PCIC_CHIP1_BASE+PCIC_SOCKETA_INDEX
85 #define C1SB PCIC_CHIP1_BASE+PCIC_SOCKETB_INDEX
88 * This is sort of arbitrary. It merely needs to be "enough". It can be
89 * overridden in the conf file, anyway.
92 #define PCIC_MEM_PAGES 4
93 #define PCIC_MEMSIZE PCIC_MEM_PAGES*PCIC_MEM_PAGESIZE
100 bus_space_tag_t memt;
101 bus_space_handle_t memh;
103 bus_space_handle_t ioh;
106 struct resource *irq_res;
108 struct resource *mem_res;
110 struct resource *port_res;
113 #define PCIC_MAX_MEM_PAGES (8 * sizeof(int))
115 /* used by memory window mapping functions */
119 * used by io window mapping functions. These can actually overlap
120 * with another pcic, since the underlying extent mapper will deal
121 * with individual allocations. This is here to deal with the fact
122 * that different busses have different real widths (different pc
123 * hardware seems to use 10 or 12 bits for the I/O bus).
131 struct pcic_handle handle[PCIC_NSLOTS];
135 int pcic_ident_ok(int);
136 int pcic_vendor(struct pcic_handle *);
137 char *pcic_vendor_to_string(int);
139 int pcic_attach(device_t dev);
141 #define pcic_read(h, idx) (*(h)->ph_read)((h), (idx))
142 #define pcic_write(h, idx, data) (*(h)->ph_write)((h), (idx), (data))
145 * bus/device/etc routines
147 int pcic_activate_resource(device_t dev, device_t child, int type, int rid,
149 struct resource *pcic_alloc_resource(device_t dev, device_t child, int type,
150 int *rid, u_long start, u_long end, u_long count, u_int flags);
151 void pcic_deactivate(device_t dev);
152 int pcic_deactivate_resource(device_t dev, device_t child, int type, int rid,
154 int pcic_detach(device_t dev);
155 int pcic_release_resource(device_t dev, device_t child, int type, int rid,
157 int pcic_setup_intr(device_t dev, device_t child, struct resource *irq,
158 int flags, driver_intr_t intr, void *arg, void **cookiep);
159 int pcic_teardown_intr(device_t dev, device_t child, struct resource *irq,
161 int pcic_suspend(device_t dev);
162 int pcic_resume(device_t dev);
163 int pcic_enable_socket(device_t dev, device_t child);
164 int pcic_disable_socket(device_t dev, device_t child);
165 int pcic_set_res_flags(device_t dev, device_t child, int type, int rid,
167 int pcic_set_memory_offset(device_t dev, device_t child, int rid,
168 u_int32_t offset, u_int32_t *deltap);
170 #define PCIC_SOFTC(d) (struct pcic_softc *) device_get_softc(d)