2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
27 #include <linux/i2c.h>
29 #include <drm/drm_atomic_helper.h>
30 #include <drm/drm_crtc.h>
31 #include "intel_drv.h"
32 #include <drm/i915_drm.h>
36 #define SIL164_ADDR 0x38
37 #define CH7xxx_ADDR 0x76
38 #define TFP410_ADDR 0x38
39 #define NS2501_ADDR 0x38
41 static const struct intel_dvo_device intel_dvo_devices[] = {
43 .type = INTEL_DVO_CHIP_TMDS,
46 .slave_addr = SIL164_ADDR,
47 .dev_ops = &sil164_ops,
50 .type = INTEL_DVO_CHIP_TMDS,
53 .slave_addr = CH7xxx_ADDR,
54 .dev_ops = &ch7xxx_ops,
57 .type = INTEL_DVO_CHIP_TMDS,
60 .slave_addr = 0x75, /* For some ch7010 */
61 .dev_ops = &ch7xxx_ops,
64 .type = INTEL_DVO_CHIP_LVDS,
67 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
71 .type = INTEL_DVO_CHIP_TMDS,
74 .slave_addr = TFP410_ADDR,
75 .dev_ops = &tfp410_ops,
78 .type = INTEL_DVO_CHIP_LVDS,
82 .gpio = GMBUS_PIN_DPB,
83 .dev_ops = &ch7017_ops,
86 .type = INTEL_DVO_CHIP_TMDS,
89 .slave_addr = NS2501_ADDR,
90 .dev_ops = &ns2501_ops,
95 struct intel_encoder base;
97 struct intel_dvo_device dev;
99 struct intel_connector *attached_connector;
101 bool panel_wants_dither;
104 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
106 return container_of(encoder, struct intel_dvo, base);
109 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
111 return enc_to_dvo(intel_attached_encoder(connector));
114 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
116 struct drm_device *dev = connector->base.dev;
117 struct drm_i915_private *dev_priv = dev->dev_private;
118 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
121 tmp = I915_READ(intel_dvo->dev.dvo_reg);
123 if (!(tmp & DVO_ENABLE))
126 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
129 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
130 enum i915_pipe *pipe)
132 struct drm_device *dev = encoder->base.dev;
133 struct drm_i915_private *dev_priv = dev->dev_private;
134 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
137 tmp = I915_READ(intel_dvo->dev.dvo_reg);
139 if (!(tmp & DVO_ENABLE))
142 *pipe = PORT_TO_PIPE(tmp);
147 static void intel_dvo_get_config(struct intel_encoder *encoder,
148 struct intel_crtc_state *pipe_config)
150 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
151 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
154 tmp = I915_READ(intel_dvo->dev.dvo_reg);
155 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
156 flags |= DRM_MODE_FLAG_PHSYNC;
158 flags |= DRM_MODE_FLAG_NHSYNC;
159 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
160 flags |= DRM_MODE_FLAG_PVSYNC;
162 flags |= DRM_MODE_FLAG_NVSYNC;
164 pipe_config->base.adjusted_mode.flags |= flags;
166 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
169 static void intel_disable_dvo(struct intel_encoder *encoder)
171 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
172 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
173 u32 dvo_reg = intel_dvo->dev.dvo_reg;
174 u32 temp = I915_READ(dvo_reg);
176 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
177 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
181 static void intel_enable_dvo(struct intel_encoder *encoder)
183 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
184 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
185 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
186 u32 dvo_reg = intel_dvo->dev.dvo_reg;
187 u32 temp = I915_READ(dvo_reg);
189 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
190 &crtc->config->base.mode,
191 &crtc->config->base.adjusted_mode);
193 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
196 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
199 static enum drm_mode_status
200 intel_dvo_mode_valid(struct drm_connector *connector,
201 struct drm_display_mode *mode)
203 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
204 const struct drm_display_mode *fixed_mode =
205 to_intel_connector(connector)->panel.fixed_mode;
206 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
207 int target_clock = mode->clock;
209 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
210 return MODE_NO_DBLESCAN;
212 /* XXX: Validate clock range */
215 if (mode->hdisplay > fixed_mode->hdisplay)
217 if (mode->vdisplay > fixed_mode->vdisplay)
220 target_clock = fixed_mode->clock;
223 if (target_clock > max_dotclk)
224 return MODE_CLOCK_HIGH;
226 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
229 static bool intel_dvo_compute_config(struct intel_encoder *encoder,
230 struct intel_crtc_state *pipe_config)
232 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
233 const struct drm_display_mode *fixed_mode =
234 intel_dvo->attached_connector->panel.fixed_mode;
235 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
237 /* If we have timings from the BIOS for the panel, put them in
238 * to the adjusted mode. The CRTC will be set up for this mode,
239 * with the panel scaling set up to source from the H/VDisplay
240 * of the original mode.
243 intel_fixed_panel_mode(fixed_mode, adjusted_mode);
248 static void intel_dvo_pre_enable(struct intel_encoder *encoder)
250 struct drm_device *dev = encoder->base.dev;
251 struct drm_i915_private *dev_priv = dev->dev_private;
252 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
253 const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
254 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
255 int pipe = crtc->pipe;
257 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
262 dvo_srcdim_reg = DVOA_SRCDIM;
265 dvo_srcdim_reg = DVOB_SRCDIM;
268 dvo_srcdim_reg = DVOC_SRCDIM;
272 /* Save the data order, since I don't know what it should be set to. */
273 dvo_val = I915_READ(dvo_reg) &
274 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
275 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
276 DVO_BLANK_ACTIVE_HIGH;
279 dvo_val |= DVO_PIPE_B_SELECT;
280 dvo_val |= DVO_PIPE_STALL;
281 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
282 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
283 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
284 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
286 /*I915_WRITE(DVOB_SRCDIM,
287 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
288 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
289 I915_WRITE(dvo_srcdim_reg,
290 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
291 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
292 /*I915_WRITE(DVOB, dvo_val);*/
293 I915_WRITE(dvo_reg, dvo_val);
297 * Detect the output connection on our DVO device.
301 static enum drm_connector_status
302 intel_dvo_detect(struct drm_connector *connector, bool force)
304 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
305 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
306 connector->base.id, connector->name);
307 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
310 static int intel_dvo_get_modes(struct drm_connector *connector)
312 struct drm_i915_private *dev_priv = connector->dev->dev_private;
313 const struct drm_display_mode *fixed_mode =
314 to_intel_connector(connector)->panel.fixed_mode;
316 /* We should probably have an i2c driver get_modes function for those
317 * devices which will have a fixed set of modes determined by the chip
318 * (TV-out, for example), but for now with just TMDS and LVDS,
319 * that's not the case.
321 intel_ddc_get_modes(connector,
322 intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
323 if (!list_empty(&connector->probed_modes))
327 struct drm_display_mode *mode;
328 mode = drm_mode_duplicate(connector->dev, fixed_mode);
330 drm_mode_probed_add(connector, mode);
338 static void intel_dvo_destroy(struct drm_connector *connector)
340 drm_connector_cleanup(connector);
341 intel_panel_fini(&to_intel_connector(connector)->panel);
345 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
346 .dpms = drm_atomic_helper_connector_dpms,
347 .detect = intel_dvo_detect,
348 .destroy = intel_dvo_destroy,
349 .fill_modes = drm_helper_probe_single_connector_modes,
350 .atomic_get_property = intel_connector_atomic_get_property,
351 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
352 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
355 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
356 .mode_valid = intel_dvo_mode_valid,
357 .get_modes = intel_dvo_get_modes,
358 .best_encoder = intel_best_encoder,
361 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
363 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
365 if (intel_dvo->dev.dev_ops->destroy)
366 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
368 intel_encoder_destroy(encoder);
371 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
372 .destroy = intel_dvo_enc_destroy,
376 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
378 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
379 * chip being on DVOB/C and having multiple pipes.
381 static struct drm_display_mode *
382 intel_dvo_get_current_mode(struct drm_connector *connector)
384 struct drm_device *dev = connector->dev;
385 struct drm_i915_private *dev_priv = dev->dev_private;
386 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
387 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
388 struct drm_display_mode *mode = NULL;
390 /* If the DVO port is active, that'll be the LVDS, so we can pull out
391 * its timings to get how the BIOS set up the panel.
393 if (dvo_val & DVO_ENABLE) {
394 struct drm_crtc *crtc;
395 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
397 crtc = intel_get_crtc_for_pipe(dev, pipe);
399 mode = intel_crtc_mode_get(dev, crtc);
401 mode->type |= DRM_MODE_TYPE_PREFERRED;
402 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
403 mode->flags |= DRM_MODE_FLAG_PHSYNC;
404 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
405 mode->flags |= DRM_MODE_FLAG_PVSYNC;
413 void intel_dvo_init(struct drm_device *dev)
415 struct drm_i915_private *dev_priv = dev->dev_private;
416 struct intel_encoder *intel_encoder;
417 struct intel_dvo *intel_dvo;
418 struct intel_connector *intel_connector;
420 int encoder_type = DRM_MODE_ENCODER_NONE;
422 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
426 intel_connector = intel_connector_alloc();
427 if (!intel_connector) {
432 intel_dvo->attached_connector = intel_connector;
434 intel_encoder = &intel_dvo->base;
435 drm_encoder_init(dev, &intel_encoder->base,
436 &intel_dvo_enc_funcs, encoder_type);
438 intel_encoder->disable = intel_disable_dvo;
439 intel_encoder->enable = intel_enable_dvo;
440 intel_encoder->get_hw_state = intel_dvo_get_hw_state;
441 intel_encoder->get_config = intel_dvo_get_config;
442 intel_encoder->compute_config = intel_dvo_compute_config;
443 intel_encoder->pre_enable = intel_dvo_pre_enable;
444 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
445 intel_connector->unregister = intel_connector_unregister;
447 /* Now, try to find a controller */
448 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
449 struct drm_connector *connector = &intel_connector->base;
450 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
451 struct i2c_adapter *i2c;
455 uint32_t dpll[I915_MAX_PIPES];
457 /* Allow the I2C driver info to specify the GPIO to be used in
458 * special cases, but otherwise default to what's defined
461 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
463 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
464 gpio = GMBUS_PIN_SSC;
466 gpio = GMBUS_PIN_DPB;
468 /* Set up the I2C bus necessary for the chip we're probing.
469 * It appears that everything is on GPIOE except for panels
470 * on i830 laptops, which are on GPIOB (DVOA).
472 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
474 intel_dvo->dev = *dvo;
476 /* GMBUS NAK handling seems to be unstable, hence let the
477 * transmitter detection run in bit banging mode for now.
479 intel_gmbus_force_bit(i2c, true);
481 /* ns2501 requires the DVO 2x clock before it will
482 * respond to i2c accesses, so make sure we have
483 * have the clock enabled before we attempt to
484 * initialize the device.
486 for_each_pipe(dev_priv, pipe) {
487 dpll[pipe] = I915_READ(DPLL(pipe));
488 I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);
491 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
493 /* restore the DVO 2x clock state to original */
494 for_each_pipe(dev_priv, pipe) {
495 I915_WRITE(DPLL(pipe), dpll[pipe]);
498 intel_gmbus_force_bit(i2c, false);
503 intel_encoder->type = INTEL_OUTPUT_DVO;
504 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
506 case INTEL_DVO_CHIP_TMDS:
507 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
508 (1 << INTEL_OUTPUT_DVO);
509 drm_connector_init(dev, connector,
510 &intel_dvo_connector_funcs,
511 DRM_MODE_CONNECTOR_DVII);
512 encoder_type = DRM_MODE_ENCODER_TMDS;
514 case INTEL_DVO_CHIP_LVDS:
515 intel_encoder->cloneable = 0;
516 drm_connector_init(dev, connector,
517 &intel_dvo_connector_funcs,
518 DRM_MODE_CONNECTOR_LVDS);
519 encoder_type = DRM_MODE_ENCODER_LVDS;
523 drm_connector_helper_add(connector,
524 &intel_dvo_connector_helper_funcs);
525 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
526 connector->interlace_allowed = false;
527 connector->doublescan_allowed = false;
529 intel_connector_attach_encoder(intel_connector, intel_encoder);
530 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
531 /* For our LVDS chipsets, we should hopefully be able
532 * to dig the fixed panel mode out of the BIOS data.
533 * However, it's in a different format from the BIOS
534 * data on chipsets with integrated LVDS (stored in AIM
535 * headers, likely), so for now, just get the current
536 * mode being output through DVO.
538 intel_panel_init(&intel_connector->panel,
539 intel_dvo_get_current_mode(connector),
541 intel_dvo->panel_wants_dither = true;
544 drm_connector_register(connector);
548 drm_encoder_cleanup(&intel_encoder->base);
550 kfree(intel_connector);