2 * Copyright (c) 1998 Doug Rabson
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * $FreeBSD: src/sys/i386/include/atomic.h,v 1.9.2.1 2000/07/07 00:38:47 obrien Exp $
27 * $DragonFly: src/sys/i386/include/Attic/atomic.h,v 1.21 2006/08/26 17:43:54 joerg Exp $
29 #ifndef _MACHINE_ATOMIC_H_
30 #define _MACHINE_ATOMIC_H_
33 #include <sys/types.h>
37 * Various simple arithmetic on memory which is atomic in the presence
38 * of interrupts and multiple processors.
40 * atomic_set_char(P, V) (*(u_char*)(P) |= (V))
41 * atomic_clear_char(P, V) (*(u_char*)(P) &= ~(V))
42 * atomic_add_char(P, V) (*(u_char*)(P) += (V))
43 * atomic_subtract_char(P, V) (*(u_char*)(P) -= (V))
45 * atomic_set_short(P, V) (*(u_short*)(P) |= (V))
46 * atomic_clear_short(P, V) (*(u_short*)(P) &= ~(V))
47 * atomic_add_short(P, V) (*(u_short*)(P) += (V))
48 * atomic_subtract_short(P, V) (*(u_short*)(P) -= (V))
50 * atomic_set_int(P, V) (*(u_int*)(P) |= (V))
51 * atomic_clear_int(P, V) (*(u_int*)(P) &= ~(V))
52 * atomic_add_int(P, V) (*(u_int*)(P) += (V))
53 * atomic_subtract_int(P, V) (*(u_int*)(P) -= (V))
55 * atomic_set_long(P, V) (*(u_long*)(P) |= (V))
56 * atomic_clear_long(P, V) (*(u_long*)(P) &= ~(V))
57 * atomic_add_long(P, V) (*(u_long*)(P) += (V))
58 * atomic_subtract_long(P, V) (*(u_long*)(P) -= (V))
62 * The above functions are expanded inline in the statically-linked
63 * kernel. Lock prefixes are generated if an SMP kernel is being
64 * built, or if user code is using these functions.
66 * Kernel modules call real functions which are built into the kernel.
67 * This allows kernel modules to be portable between UP and SMP systems.
69 #if defined(KLD_MODULE)
70 #define ATOMIC_ASM(NAME, TYPE, OP, V) \
71 extern void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v); \
72 extern void atomic_##NAME##_##TYPE##_nonlocked(volatile u_##TYPE *p, u_##TYPE v);
73 #else /* !KLD_MODULE */
74 #if defined(SMP) || !defined(_KERNEL)
75 #define MPLOCKED "lock ; "
81 * The assembly is volatilized to demark potential before-and-after side
82 * effects if an interrupt or SMP collision were to occur. The primary
83 * atomic instructions are MP safe, the nonlocked instructions are
84 * local-interrupt-safe (so we don't depend on C 'X |= Y' generating an
85 * atomic instruction).
87 * +m - memory is read and written (=m - memory is only written)
88 * iq - integer constant or %ax/%bx/%cx/%dx (ir = int constant or any reg)
89 * (Note: byte instructions only work on %ax,%bx,%cx, or %dx). iq
90 * is good enough for our needs so don't get fancy.
93 /* egcs 1.1.2+ version */
94 #define ATOMIC_ASM(NAME, TYPE, OP, V) \
95 static __inline void \
96 atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
98 __asm __volatile(MPLOCKED OP \
102 static __inline void \
103 atomic_##NAME##_##TYPE##_nonlocked(volatile u_##TYPE *p, u_##TYPE v)\
105 __asm __volatile(OP \
110 #endif /* KLD_MODULE */
112 /* egcs 1.1.2+ version */
113 ATOMIC_ASM(set, char, "orb %b1,%0", v)
114 ATOMIC_ASM(clear, char, "andb %b1,%0", ~v)
115 ATOMIC_ASM(add, char, "addb %b1,%0", v)
116 ATOMIC_ASM(subtract, char, "subb %b1,%0", v)
118 ATOMIC_ASM(set, short, "orw %w1,%0", v)
119 ATOMIC_ASM(clear, short, "andw %w1,%0", ~v)
120 ATOMIC_ASM(add, short, "addw %w1,%0", v)
121 ATOMIC_ASM(subtract, short, "subw %w1,%0", v)
123 ATOMIC_ASM(set, int, "orl %1,%0", v)
124 ATOMIC_ASM(clear, int, "andl %1,%0", ~v)
125 ATOMIC_ASM(add, int, "addl %1,%0", v)
126 ATOMIC_ASM(subtract, int, "subl %1,%0", v)
128 ATOMIC_ASM(set, long, "orl %1,%0", v)
129 ATOMIC_ASM(clear, long, "andl %1,%0", ~v)
130 ATOMIC_ASM(add, long, "addl %1,%0", v)
131 ATOMIC_ASM(subtract, long, "subl %1,%0", v)
134 * atomic_poll_acquire_int(P) Returns non-zero on success, 0 if the lock
135 * has already been acquired.
136 * atomic_poll_release_int(P)
138 * These support the NDIS driver and are also used for IPIQ interlocks
139 * between cpus. Both the acquisition and release must be
140 * cache-synchronizing instructions.
143 #if defined(KLD_MODULE)
145 extern int atomic_swap_int(volatile int *addr, int value);
146 extern int atomic_poll_acquire_int(volatile u_int *p);
147 extern void atomic_poll_release_int(volatile u_int *p);
152 atomic_swap_int(volatile int *addr, int value)
154 __asm __volatile("xchgl %0, %1" :
155 "=r" (value), "=m" (*addr) : "0" (value) : "memory");
161 atomic_poll_acquire_int(volatile u_int *p)
165 __asm __volatile(MPLOCKED "btsl $0,%0; setnc %%al; andl $255,%%eax" : "+m" (*p), "=a" (data));
171 atomic_poll_release_int(volatile u_int *p)
173 __asm __volatile(MPLOCKED "btrl $0,%0" : "+m" (*p));
179 * These functions operate on a 32 bit interrupt interlock which is defined
182 * bit 0-30 interrupt handler disabled bits (counter)
183 * bit 31 interrupt handler currently running bit (1 = run)
185 * atomic_intr_cond_test(P) Determine if the interlock is in an
186 * acquired state. Returns 0 if it not
187 * acquired, non-zero if it is.
189 * atomic_intr_cond_try(P)
190 * Increment the request counter and attempt to
191 * set bit 31 to acquire the interlock. If
192 * we are unable to set bit 31 the request
193 * counter is decremented and we return -1,
194 * otherwise we return 0.
196 * atomic_intr_cond_enter(P, func, arg)
197 * Increment the request counter and attempt to
198 * set bit 31 to acquire the interlock. If
199 * we are unable to set bit 31 func(arg) is
200 * called in a loop until we are able to set
203 * atomic_intr_cond_exit(P, func, arg)
204 * Decrement the request counter and clear bit
205 * 31. If the request counter is still non-zero
206 * call func(arg) once.
208 * atomic_intr_handler_disable(P)
209 * Set bit 30, indicating that the interrupt
210 * handler has been disabled. Must be called
211 * after the hardware is disabled.
213 * Returns bit 31 indicating whether a serialized
214 * accessor is active (typically the interrupt
215 * handler is running). 0 == not active,
216 * non-zero == active.
218 * atomic_intr_handler_enable(P)
219 * Clear bit 30, indicating that the interrupt
220 * handler has been enabled. Must be called
221 * before the hardware is actually enabled.
223 * atomic_intr_handler_is_enabled(P)
224 * Returns bit 30, 0 indicates that the handler
225 * is enabled, non-zero indicates that it is
226 * disabled. The request counter portion of
227 * the field is ignored.
230 #if defined(KLD_MODULE)
232 void atomic_intr_init(__atomic_intr_t *p);
233 int atomic_intr_handler_disable(__atomic_intr_t *p);
234 void atomic_intr_handler_enable(__atomic_intr_t *p);
235 int atomic_intr_handler_is_enabled(__atomic_intr_t *p);
236 int atomic_intr_cond_test(__atomic_intr_t *p);
237 int atomic_intr_cond_try(__atomic_intr_t *p);
238 void atomic_intr_cond_enter(__atomic_intr_t *p, void (*func)(void *), void *arg);
239 void atomic_intr_cond_exit(__atomic_intr_t *p, void (*func)(void *), void *arg);
245 atomic_intr_init(__atomic_intr_t *p)
252 atomic_intr_handler_disable(__atomic_intr_t *p)
256 __asm __volatile(MPLOCKED "orl $0x40000000,%1; movl %1,%%eax; " \
257 "andl $0x80000000,%%eax" \
258 : "=a"(data) , "+m"(*p));
264 atomic_intr_handler_enable(__atomic_intr_t *p)
266 __asm __volatile(MPLOCKED "andl $0xBFFFFFFF,%0" : "+m" (*p));
271 atomic_intr_handler_is_enabled(__atomic_intr_t *p)
275 __asm __volatile("movl %1,%%eax; andl $0x40000000,%%eax" \
276 : "=a"(data) : "m"(*p));
282 atomic_intr_cond_enter(__atomic_intr_t *p, void (*func)(void *), void *arg)
284 __asm __volatile(MPLOCKED "incl %0; " \
286 MPLOCKED "btsl $31,%0; jnc 2f; " \
287 "pushl %2; call *%1; addl $4,%%esp; " \
291 : "r"(func), "m"(arg) \
296 * Attempt to enter the interrupt condition variable. Returns zero on
297 * success, 1 on failure.
301 atomic_intr_cond_try(__atomic_intr_t *p)
305 __asm __volatile(MPLOCKED "incl %0; " \
307 "subl %%eax,%%eax; " \
308 MPLOCKED "btsl $31,%0; jnc 2f; " \
309 MPLOCKED "decl %0; " \
312 : "+m" (*p), "=a"(ret) \
320 atomic_intr_cond_test(__atomic_intr_t *p)
322 return((int)(*p & 0x80000000));
327 atomic_intr_cond_exit(__atomic_intr_t *p, void (*func)(void *), void *arg)
329 __asm __volatile(MPLOCKED "decl %0; " \
330 MPLOCKED "btrl $31,%0; " \
331 "testl $0x3FFFFFFF,%0; jz 1f; " \
332 "pushl %2; call *%1; addl $4,%%esp; " \
335 : "r"(func), "m"(arg) \
342 * Atomic compare and set
344 * if (*dst == old) *dst = new (all 32 bit words)
346 * Returns 0 on failure, non-zero on success
349 * This is a !I386_CPU function. For I386_CPU, a _slower and horrible_
350 * version may be used by the dynamic linker
352 #if defined(KLD_MODULE)
353 extern int atomic_cmpset_int(volatile u_int *dst, u_int old, u_int new);
356 atomic_cmpset_int(volatile u_int *dst, u_int old, u_int new)
360 __asm __volatile(MPLOCKED "cmpxchgl %2,%1; " \
363 : "+a" (res), "=m" (*dst) \
364 : "r" (new), "m" (*dst) \
368 #endif /* KLD_MODULE */
370 #endif /* ! _MACHINE_ATOMIC_H_ */