2 * Copyright (c) 1995, Jack F. Vogel
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Jack F. Vogel
16 * 4. The name of the developer may be used to endorse or promote products
17 * derived from this software without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * mpboot.s: FreeBSD machine support for the Intel MP Spec
32 * multiprocessor systems.
34 * $FreeBSD: src/sys/i386/i386/mpboot.s,v 1.13.2.3 2000/09/07 01:18:26 tegge Exp $
35 * $DragonFly: src/sys/platform/pc32/i386/mpboot.s,v 1.7 2004/02/21 06:37:07 dillon Exp $
38 #include <machine/asmacros.h> /* miscellaneous asm macros */
39 #include <machine/apicreg.h>
40 #include <machine/specialreg.h>
45 * this code MUST be enabled here and in mp_machdep.c for debugging.
46 * it follows the very early stages of AP boot by placing values in CMOS ram.
47 * it NORMALLY will never be needed and thus the primitive method for enabling.
49 * WARNING! DEFINING THIS OPTION MAY CAUSE THE CMOS CHECKSUM TO FAIL AND THE
50 * BIOS MIGHT COMPLAIN. ENABLE THIS OPTION FOR DEBUGGING THE BOOT PATH ONLY.
55 #if defined(CHECK_POINTS) && !defined(PC98)
57 #define CMOS_REG (0x70)
58 #define CMOS_DATA (0x71)
60 #define CHECKPOINT(A,D) \
62 outb %al,$CMOS_REG ; \
68 #define CHECKPOINT(A,D)
70 #endif /* CHECK_POINTS */
74 * The APs enter here from their trampoline code (bootMP, below)
75 * NOTE: %fs is not setup until the call to init_secondary()!
79 NON_GPROF_ENTRY(MPentry)
81 /* Now enable paging mode */
82 movl IdlePTD-KERNBASE, %eax
85 orl $CR0_PE|CR0_PG,%eax /* enable paging */
86 movl %eax,%cr0 /* let the games begin! */
88 movl bootSTK,%esp /* boot stack end loc. */
89 pushl $mp_begin /* jump to high mem */
93 * Wait for the booting CPU to signal startup
95 mp_begin: /* now running relocated at KERNBASE */
97 call init_secondary /* load i386 tables */
101 * If the [BSP] CPU has support for VME, turn it on.
103 testl $CPUID_VME, cpu_feature /* XXX WRONG! BSP! */
110 /* disable the APIC, just to be SURE */
111 movl lapic_svr, %eax /* get spurious vector reg. */
112 andl $~APIC_SVR_SWEN, %eax /* clear software enable bit */
115 /* data returned to BSP */
116 movl lapic_ver, %eax /* our version reg contents */
117 movl %eax, cpu_apic_versions /* into [ 0 ] */
122 * Execute the context restore function for the idlethread which
123 * has conveniently been set as curthread. Remember, %eax must
124 * contain the target thread and %ebx must contain the originating
125 * thread (which we just set the same since we have no originating
126 * thread). BSP/AP synchronization occurs in ap_init(). We do
127 * not need to mess with the BGL for this because LWKT threads are
128 * self-contained on each cpu (or, at least, the idlethread is!).
130 movl PCPU(curthread),%eax
132 movl TD_SP(%eax),%esp
136 * This is the embedded trampoline or bootstrap that is
137 * copied into 'real-mode' low memory, it is where the
138 * secondary processor "wakes up". When it is executed
139 * the processor will eventually jump into the routine
140 * MPentry, which resides in normal kernel text above
145 ALIGN_DATA /* just to be sure */
149 NON_GPROF_ENTRY(bootMP)
153 /* First guarantee a 'clean slate' */
161 /* set up data segments */
168 mov $(boot_stk - bootMP), %esp
170 /* Now load the global descriptor table */
171 lgdt MP_GDTptr - bootMP
173 /* Enable protected mode */
179 * make intrasegment jump to flush the processor pipeline and
183 pushl $(protmode - bootMP)
191 * we are NOW running for the first time with %eip
192 * having the full physical address, BUT we still
193 * are using a segment descriptor with the origin
194 * not matching the booting kernel.
196 * SO NOW... for the BIG Jump into kernel's segment
197 * and physical text above 1 Meg.
208 /* this will be modified by mpInstallTramp() */
209 ljmp $0x08, $0 /* far jmp to MPentry() */
211 dead: hlt /* We should never get here */
215 * MP boot strap Global Descriptor Table
223 nulldesc: /* offset = 0x0 */
232 kernelcode: /* offset = 0x08 */
234 .word 0xffff /* segment limit 0..15 */
235 .word 0x0000 /* segment base 0..15 */
236 .byte 0x0 /* segment base 16..23; set for 0K */
237 .byte 0x9f /* flags; Type */
238 .byte 0xcf /* flags; Limit */
239 .byte 0x0 /* segment base 24..32 */
241 kerneldata: /* offset = 0x10 */
243 .word 0xffff /* segment limit 0..15 */
244 .word 0x0000 /* segment base 0..15 */
245 .byte 0x0 /* segment base 16..23; set for 0k */
246 .byte 0x93 /* flags; Type */
247 .byte 0xcf /* flags; Limit */
248 .byte 0x0 /* segment base 24..32 */
250 bootcode: /* offset = 0x18 */
252 .word 0xffff /* segment limit 0..15 */
253 bootCodeSeg: /* this will be modified by mpInstallTramp() */
254 .word 0x0000 /* segment base 0..15 */
255 .byte 0x00 /* segment base 16...23; set for 0x000xx000 */
256 .byte 0x9e /* flags; Type */
257 .byte 0xcf /* flags; Limit */
258 .byte 0x0 /*segment base 24..32 */
260 bootdata: /* offset = 0x20 */
263 bootDataSeg: /* this will be modified by mpInstallTramp() */
264 .word 0x0000 /* segment base 0..15 */
265 .byte 0x00 /* segment base 16...23; set for 0x000xx000 */
271 * GDT pointer for the lgdt call
278 mp_gdtbase: /* this will be modified by mpInstallTramp() */
281 .space 0x100 /* space for boot_stk - 1st temporary stack */
287 .long BOOTMP2 - BOOTMP1