2 * $FreeBSD: src/sys/dev/bktr/bktr_reg.h,v 1.46 2003/12/01 19:03:50 truckman Exp $
3 * $DragonFly: src/sys/dev/video/bktr/bktr_reg.h,v 1.6 2004/05/19 22:52:52 dillon Exp $
5 * Copyright (c) 1999 Roger Hardiman
6 * Copyright (c) 1998 Amancio Hasty
7 * Copyright (c) 1995 Mark Tinguely and Jim Lowe
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Mark Tinguely and Jim Lowe
21 * 4. The name of the author may not be used to endorse or promote products
22 * derived from this software without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
32 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
33 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
39 * The kernel options for the driver now all begin with BKTR.
40 * Support the older kernel options on FreeBSD and OpenBSD.
43 #if defined(BROOKTREE_ALLOC_PAGES)
44 #define BKTR_ALLOC_PAGES BROOKTREE_ALLOC_PAGES
47 #if defined(BROOKTREE_SYSTEM_DEFAULT)
48 #define BKTR_SYSTEM_DEFAULT BROOKTREE_SYSTEM_DEFAULT
51 #if defined(OVERRIDE_CARD)
52 #define BKTR_OVERRIDE_CARD OVERRIDE_CARD
55 #if defined(OVERRIDE_TUNER)
56 #define BKTR_OVERRIDE_TUNER OVERRIDE_TUNER
59 #if defined(OVERRIDE_DBX)
60 #define BKTR_OVERRIDE_DBX OVERRIDE_DBX
63 #if defined(OVERRIDE_MSP)
64 #define BKTR_OVERRIDE_MSP OVERRIDE_MSP
67 #ifndef PCI_LATENCY_TIMER
68 #define PCI_LATENCY_TIMER 0x0c /* pci timer register */
72 * Definitions for the Brooktree 848/878 video capture to pci interface.
74 #define PCI_VENDOR_SHIFT 0
75 #define PCI_VENDOR_MASK 0xffff
76 #define PCI_VENDOR(id) \
77 (((id) >> PCI_VENDOR_SHIFT) & PCI_VENDOR_MASK)
79 #define PCI_PRODUCT_SHIFT 16
80 #define PCI_PRODUCT_MASK 0xffff
81 #define PCI_PRODUCT(id) \
82 (((id) >> PCI_PRODUCT_SHIFT) & PCI_PRODUCT_MASK)
84 #define BROOKTREE_848 1
85 #define BROOKTREE_848A 2
86 #define BROOKTREE_849A 3
87 #define BROOKTREE_878 4
88 #define BROOKTREE_879 5
90 typedef volatile u_int bregister_t;
92 * if other persuasion endian, then compiler will probably require that
96 #define BTBYTE(what) bregister_t what:8; int :24
97 #define BTWORD(what) bregister_t what:16; int: 16
98 #define BTLONG(what) bregister_t what:32
100 struct bt848_registers {
101 BTBYTE (dstatus); /* 0, 1,2,3 */
102 #define BT848_DSTATUS_PRES (1<<7)
103 #define BT848_DSTATUS_HLOC (1<<6)
104 #define BT848_DSTATUS_FIELD (1<<5)
105 #define BT848_DSTATUS_NUML (1<<4)
106 #define BT848_DSTATUS_CSEL (1<<3)
107 #define BT848_DSTATUS_PLOCK (1<<2)
108 #define BT848_DSTATUS_LOF (1<<1)
109 #define BT848_DSTATUS_COF (1<<0)
110 BTBYTE (iform); /* 4, 5,6,7 */
111 #define BT848_IFORM_MUXSEL (0x3<<5)
112 # define BT848_IFORM_M_MUX1 (0x03<<5)
113 # define BT848_IFORM_M_MUX0 (0x02<<5)
114 # define BT848_IFORM_M_MUX2 (0x01<<5)
115 # define BT848_IFORM_M_MUX3 (0x0)
116 # define BT848_IFORM_M_RSVD (0x00<<5)
117 #define BT848_IFORM_XTSEL (0x3<<3)
118 # define BT848_IFORM_X_AUTO (0x03<<3)
119 # define BT848_IFORM_X_XT1 (0x02<<3)
120 # define BT848_IFORM_X_XT0 (0x01<<3)
121 # define BT848_IFORM_X_RSVD (0x00<<3)
122 BTBYTE (tdec); /* 8, 9,a,b */
123 BTBYTE (e_crop); /* c, d,e,f */
124 BTBYTE (e_vdelay_lo); /* 10, 11,12,13 */
125 BTBYTE (e_vactive_lo); /* 14, 15,16,17 */
126 BTBYTE (e_delay_lo); /* 18, 19,1a,1b */
127 BTBYTE (e_hactive_lo); /* 1c, 1d,1e,1f */
128 BTBYTE (e_hscale_hi); /* 20, 21,22,23 */
129 BTBYTE (e_hscale_lo); /* 24, 25,26,27 */
130 BTBYTE (bright); /* 28, 29,2a,2b */
131 BTBYTE (e_control); /* 2c, 2d,2e,2f */
132 #define BT848_E_CONTROL_LNOTCH (1<<7)
133 #define BT848_E_CONTROL_COMP (1<<6)
134 #define BT848_E_CONTROL_LDEC (1<<5)
135 #define BT848_E_CONTROL_CBSENSE (1<<4)
136 #define BT848_E_CONTROL_RSVD (1<<3)
137 #define BT848_E_CONTROL_CON_MSB (1<<2)
138 #define BT848_E_CONTROL_SAT_U_MSB (1<<1)
139 #define BT848_E_CONTROL_SAT_V_MSB (1<<0)
140 BTBYTE (contrast_lo); /* 30, 31,32,33 */
141 BTBYTE (sat_u_lo); /* 34, 35,36,37 */
142 BTBYTE (sat_v_lo); /* 38, 39,3a,3b */
143 BTBYTE (hue); /* 3c, 3d,3e,3f */
144 BTBYTE (e_scloop); /* 40, 41,42,43 */
145 #define BT848_E_SCLOOP_RSVD1 (1<<7)
146 #define BT848_E_SCLOOP_CAGC (1<<6)
147 #define BT848_E_SCLOOP_CKILL (1<<5)
148 #define BT848_E_SCLOOP_HFILT (0x3<<3)
149 # define BT848_E_SCLOOP_HFILT_ICON (0x3<<3)
150 # define BT848_E_SCLOOP_HFILT_QCIF (0x2<<3)
151 # define BT848_E_SCLOOP_HFILT_CIF (0x1<<3)
152 # define BT848_E_SCLOOP_HFILT_AUTO (0x0<<3)
153 #define BT848_E_SCLOOP_RSVD0 (0x7<<0)
154 int :32; /* 44, 45,46,47 */
155 BTBYTE (oform); /* 48, 49,4a,4b */
156 BTBYTE (e_vscale_hi); /* 4c, 4d,4e,4f */
157 BTBYTE (e_vscale_lo); /* 50, 51,52,53 */
158 BTBYTE (test); /* 54, 55,56,57 */
159 int :32; /* 58, 59,5a,5b */
160 int :32; /* 5c, 5d,5e,5f */
161 BTLONG (adelay); /* 60, 61,62,63 */
162 BTBYTE (bdelay); /* 64, 65,66,67 */
163 BTBYTE (adc); /* 68, 69,6a,6b */
164 #define BT848_ADC_RESERVED (0x80) /* required pattern */
165 #define BT848_ADC_SYNC_T (1<<5)
166 #define BT848_ADC_AGC_EN (1<<4)
167 #define BT848_ADC_CLK_SLEEP (1<<3)
168 #define BT848_ADC_Y_SLEEP (1<<2)
169 #define BT848_ADC_C_SLEEP (1<<1)
170 #define BT848_ADC_CRUSH (1<<0)
171 BTBYTE (e_vtc); /* 6c, 6d,6e,6f */
172 int :32; /* 70, 71,72,73 */
173 int :32; /* 74, 75,76,77 */
174 int :32; /* 78, 79,7a,7b */
175 BTLONG (sreset); /* 7c, 7d,7e,7f */
176 u_char filler1[0x84-0x80];
177 BTBYTE (tgctrl); /* 84, 85,86,87 */
178 #define BT848_TGCTRL_TGCKI (3<<3)
179 #define BT848_TGCTRL_TGCKI_XTAL (0<<3)
180 #define BT848_TGCTRL_TGCKI_PLL (1<<3)
181 #define BT848_TGCTRL_TGCKI_GPCLK (2<<3)
182 #define BT848_TGCTRL_TGCKI_GPCLK_I (3<<3)
183 u_char filler[0x8c-0x88];
184 BTBYTE (o_crop); /* 8c, 8d,8e,8f */
185 BTBYTE (o_vdelay_lo); /* 90, 91,92,93 */
186 BTBYTE (o_vactive_lo); /* 94, 95,96,97 */
187 BTBYTE (o_delay_lo); /* 98, 99,9a,9b */
188 BTBYTE (o_hactive_lo); /* 9c, 9d,9e,9f */
189 BTBYTE (o_hscale_hi); /* a0, a1,a2,a3 */
190 BTBYTE (o_hscale_lo); /* a4, a5,a6,a7 */
191 int :32; /* a8, a9,aa,ab */
192 BTBYTE (o_control); /* ac, ad,ae,af */
193 #define BT848_O_CONTROL_LNOTCH (1<<7)
194 #define BT848_O_CONTROL_COMP (1<<6)
195 #define BT848_O_CONTROL_LDEC (1<<5)
196 #define BT848_O_CONTROL_CBSENSE (1<<4)
197 #define BT848_O_CONTROL_RSVD (1<<3)
198 #define BT848_O_CONTROL_CON_MSB (1<<2)
199 #define BT848_O_CONTROL_SAT_U_MSB (1<<1)
200 #define BT848_O_CONTROL_SAT_V_MSB (1<<0)
202 BTBYTE (o_scloop); /* c0, c1,c2,c3 */
203 #define BT848_O_SCLOOP_RSVD1 (1<<7)
204 #define BT848_O_SCLOOP_CAGC (1<<6)
205 #define BT848_O_SCLOOP_CKILL (1<<5)
206 #define BT848_O_SCLOOP_HFILT (0x3<<3)
207 #define BT848_O_SCLOOP_HFILT_ICON (0x3<<3)
208 #define BT848_O_SCLOOP_HFILT_QCIF (0x2<<3)
209 #define BT848_O_SCLOOP_HFILT_CIF (0x1<<3)
210 #define BT848_O_SCLOOP_HFILT_AUTO (0x0<<3)
211 #define BT848_O_SCLOOP_RSVD0 (0x7<<0)
212 int :32; /* c4, c5,c6,c7 */
213 int :32; /* c8, c9,ca,cb */
214 BTBYTE (o_vscale_hi); /* cc, cd,ce,cf */
215 BTBYTE (o_vscale_lo); /* d0, d1,d2,d3 */
216 BTBYTE (color_fmt); /* d4, d5,d6,d7 */
217 bregister_t color_ctl_swap :4; /* d8 */
218 #define BT848_COLOR_CTL_WSWAP_ODD (1<<3)
219 #define BT848_COLOR_CTL_WSWAP_EVEN (1<<2)
220 #define BT848_COLOR_CTL_BSWAP_ODD (1<<1)
221 #define BT848_COLOR_CTL_BSWAP_EVEN (1<<0)
222 bregister_t color_ctl_gamma :1;
223 bregister_t color_ctl_rgb_ded :1;
224 bregister_t color_ctl_color_bars :1;
225 bregister_t color_ctl_ext_frmrate :1;
226 #define BT848_COLOR_CTL_GAMMA (1<<4)
227 #define BT848_COLOR_CTL_RGB_DED (1<<5)
228 #define BT848_COLOR_CTL_COLOR_BARS (1<<6)
229 #define BT848_COLOR_CTL_EXT_FRMRATE (1<<7)
230 int :24; /* d9,da,db */
231 BTBYTE (cap_ctl); /* dc, dd,de,df */
232 #define BT848_CAP_CTL_DITH_FRAME (1<<4)
233 #define BT848_CAP_CTL_VBI_ODD (1<<3)
234 #define BT848_CAP_CTL_VBI_EVEN (1<<2)
235 #define BT848_CAP_CTL_ODD (1<<1)
236 #define BT848_CAP_CTL_EVEN (1<<0)
237 BTBYTE (vbi_pack_size); /* e0, e1,e2,e3 */
238 BTBYTE (vbi_pack_del); /* e4, e5,e6,e7 */
239 int :32; /* e8, e9,ea,eb */
240 BTBYTE (o_vtc); /* ec, ed,ee,ef */
241 BTBYTE (pll_f_lo); /* f0, f1,f2,f3 */
242 BTBYTE (pll_f_hi); /* f4, f5,f6,f7 */
243 BTBYTE (pll_f_xci); /* f8, f9,fa,fb */
244 #define BT848_PLL_F_C (1<<6)
245 #define BT848_PLL_F_X (1<<7)
246 u_char filler2[0x100-0xfc];
247 BTLONG (int_stat); /* 100, 101,102,103 */
248 BTLONG (int_mask); /* 104, 105,106,107 */
249 #define BT848_INT_RISCS (0xf<<28)
250 #define BT848_INT_RISC_EN (1<<27)
251 #define BT848_INT_RACK (1<<25)
252 #define BT848_INT_FIELD (1<<24)
253 #define BT848_INT_MYSTERYBIT (1<<23)
254 #define BT848_INT_SCERR (1<<19)
255 #define BT848_INT_OCERR (1<<18)
256 #define BT848_INT_PABORT (1<<17)
257 #define BT848_INT_RIPERR (1<<16)
258 #define BT848_INT_PPERR (1<<15)
259 #define BT848_INT_FDSR (1<<14)
260 #define BT848_INT_FTRGT (1<<13)
261 #define BT848_INT_FBUS (1<<12)
262 #define BT848_INT_RISCI (1<<11)
263 #define BT848_INT_GPINT (1<<9)
264 #define BT848_INT_I2CDONE (1<<8)
265 #define BT848_INT_RSV1 (1<<7)
266 #define BT848_INT_RSV0 (1<<6)
267 #define BT848_INT_VPRES (1<<5)
268 #define BT848_INT_HLOCK (1<<4)
269 #define BT848_INT_OFLOW (1<<3)
270 #define BT848_INT_HSYNC (1<<2)
271 #define BT848_INT_VSYNC (1<<1)
272 #define BT848_INT_FMTCHG (1<<0)
273 int :32; /* 108, 109,10a,10b */
274 BTWORD (gpio_dma_ctl); /* 10c, 10d,10e,10f */
275 #define BT848_DMA_CTL_PL23TP4 (0<<6) /* planar1 trigger 4 */
276 #define BT848_DMA_CTL_PL23TP8 (1<<6) /* planar1 trigger 8 */
277 #define BT848_DMA_CTL_PL23TP16 (2<<6) /* planar1 trigger 16 */
278 #define BT848_DMA_CTL_PL23TP32 (3<<6) /* planar1 trigger 32 */
279 #define BT848_DMA_CTL_PL1TP4 (0<<4) /* planar1 trigger 4 */
280 #define BT848_DMA_CTL_PL1TP8 (1<<4) /* planar1 trigger 8 */
281 #define BT848_DMA_CTL_PL1TP16 (2<<4) /* planar1 trigger 16 */
282 #define BT848_DMA_CTL_PL1TP32 (3<<4) /* planar1 trigger 32 */
283 #define BT848_DMA_CTL_PKTP4 (0<<2) /* packed trigger 4 */
284 #define BT848_DMA_CTL_PKTP8 (1<<2) /* packed trigger 8 */
285 #define BT848_DMA_CTL_PKTP16 (2<<2) /* packed trigger 16 */
286 #define BT848_DMA_CTL_PKTP32 (3<<2) /* packed trigger 32 */
287 #define BT848_DMA_CTL_RISC_EN (1<<1)
288 #define BT848_DMA_CTL_FIFO_EN (1<<0)
289 BTLONG (i2c_data_ctl); /* 110, 111,112,113 */
290 #define BT848_DATA_CTL_I2CDIV (0xf<<4)
291 #define BT848_DATA_CTL_I2CSYNC (1<<3)
292 #define BT848_DATA_CTL_I2CW3B (1<<2)
293 #define BT848_DATA_CTL_I2CSCL (1<<1)
294 #define BT848_DATA_CTL_I2CSDA (1<<0)
295 BTLONG (risc_strt_add); /* 114, 115,116,117 */
296 BTLONG (gpio_out_en); /* 118, 119,11a,11b */ /* really 24 bits */
297 BTLONG (gpio_reg_inp); /* 11c, 11d,11e,11f */ /* really 24 bits */
298 BTLONG (risc_count); /* 120, 121,122,123 */
299 u_char filler3[0x200-0x124];
300 BTLONG (gpio_data); /* 200, 201,202,203 */ /* really 24 bits */
304 #define BKTR_DSTATUS 0x000
305 #define BKTR_IFORM 0x004
306 #define BKTR_TDEC 0x008
307 #define BKTR_E_CROP 0x00C
308 #define BKTR_O_CROP 0x08C
309 #define BKTR_E_VDELAY_LO 0x010
310 #define BKTR_O_VDELAY_LO 0x090
311 #define BKTR_E_VACTIVE_LO 0x014
312 #define BKTR_O_VACTIVE_LO 0x094
313 #define BKTR_E_DELAY_LO 0x018
314 #define BKTR_O_DELAY_LO 0x098
315 #define BKTR_E_HACTIVE_LO 0x01C
316 #define BKTR_O_HACTIVE_LO 0x09C
317 #define BKTR_E_HSCALE_HI 0x020
318 #define BKTR_O_HSCALE_HI 0x0A0
319 #define BKTR_E_HSCALE_LO 0x024
320 #define BKTR_O_HSCALE_LO 0x0A4
321 #define BKTR_BRIGHT 0x028
322 #define BKTR_E_CONTROL 0x02C
323 #define BKTR_O_CONTROL 0x0AC
324 #define BKTR_CONTRAST_LO 0x030
325 #define BKTR_SAT_U_LO 0x034
326 #define BKTR_SAT_V_LO 0x038
327 #define BKTR_HUE 0x03C
328 #define BKTR_E_SCLOOP 0x040
329 #define BKTR_O_SCLOOP 0x0C0
330 #define BKTR_OFORM 0x048
331 #define BKTR_E_VSCALE_HI 0x04C
332 #define BKTR_O_VSCALE_HI 0x0CC
333 #define BKTR_E_VSCALE_LO 0x050
334 #define BKTR_O_VSCALE_LO 0x0D0
335 #define BKTR_TEST 0x054
336 #define BKTR_ADELAY 0x060
337 #define BKTR_BDELAY 0x064
338 #define BKTR_ADC 0x068
339 #define BKTR_E_VTC 0x06C
340 #define BKTR_O_VTC 0x0EC
341 #define BKTR_SRESET 0x07C
342 #define BKTR_COLOR_FMT 0x0D4
343 #define BKTR_COLOR_CTL 0x0D8
344 #define BKTR_CAP_CTL 0x0DC
345 #define BKTR_VBI_PACK_SIZE 0x0E0
346 #define BKTR_VBI_PACK_DEL 0x0E4
347 #define BKTR_INT_STAT 0x100
348 #define BKTR_INT_MASK 0x104
349 #define BKTR_RISC_COUNT 0x120
350 #define BKTR_RISC_STRT_ADD 0x114
351 #define BKTR_GPIO_DMA_CTL 0x10C
352 #define BKTR_GPIO_OUT_EN 0x118
353 #define BKTR_GPIO_REG_INP 0x11C
354 #define BKTR_GPIO_DATA 0x200
355 #define BKTR_I2C_DATA_CTL 0x110
356 #define BKTR_TGCTRL 0x084
357 #define BKTR_PLL_F_LO 0x0F0
358 #define BKTR_PLL_F_HI 0x0F4
359 #define BKTR_PLL_F_XCI 0x0F8
362 * device support for onboard tv tuners
365 /* description of the LOGICAL tuner */
372 u_char radio_mode; /* current mode of the radio mode */
375 /* description of the PHYSICAL tuner */
379 u_char pllControl[4];
380 u_char bandLimits[ 2 ];
381 u_char bandAddrs[ 4 ]; /* 3 first for the 3 TV
382 ** bands. Last for radio
383 ** band (0x00=NoRadio).
388 /* description of the card */
389 #define EEPROMBLOCKSIZE 32
391 unsigned int card_id; /* card id (from #define's) */
393 const struct TUNER* tuner; /* Tuner details */
394 u_char tuner_pllAddr; /* Tuner i2c address */
395 u_char dbx; /* Has DBX chip? */
396 u_char msp3400c; /* Has msp3400c chip? */
397 u_char dpl3518a; /* Has dpl3518a chip? */
399 u_char eepromSize; /* bytes / EEPROMBLOCKSIZE */
400 u_int audiomuxs[ 5 ]; /* tuner, ext (line-in) */
401 /* int/unused (radio) */
403 u_int gpio_mux_bits; /* GPIO mask for audio mux */
406 struct format_params {
407 /* Total lines, lines before image, image lines */
408 int vtotal, vdelay, vactive;
409 /* Total unscaled horizontal pixels, pixels before image, image pixels */
410 int htotal, hdelay, hactive;
411 /* Scaled horizontal image pixels, Total Scaled horizontal pixels */
412 int scaled_hactive, scaled_htotal;
413 /* frame rate . for ntsc is 30 frames per second */
415 /* A-delay and B-delay */
416 u_char adelay, bdelay;
417 /* Iform XTSEL value */
419 /* VBI number of lines per field, and number of samples per line */
420 int vbi_num_lines, vbi_num_samples;
423 #if defined(BKTR_USE_FREEBSD_SMBUS)
424 struct bktr_i2c_softc {
433 /* Bt848/878 register access
434 * The registers can either be access via a memory mapped structure
435 * or accessed via bus_space.
436 * bus_0pace access allows cross platform support, where as the
437 * memory mapped structure method only works on 32 bit processors
438 * with the right type of endianness.
440 #define INB(bktr,offset) bus_space_read_1((bktr)->memt,(bktr)->memh,(offset))
441 #define INW(bktr,offset) bus_space_read_2((bktr)->memt,(bktr)->memh,(offset))
442 #define INL(bktr,offset) bus_space_read_4((bktr)->memt,(bktr)->memh,(offset))
443 #define OUTB(bktr,offset,value) bus_space_write_1((bktr)->memt,(bktr)->memh,(offset),(value))
444 #define OUTW(bktr,offset,value) bus_space_write_2((bktr)->memt,(bktr)->memh,(offset),(value))
445 #define OUTL(bktr,offset,value) bus_space_write_4((bktr)->memt,(bktr)->memh,(offset),(value))
447 typedef struct bktr_clip bktr_clip_t;
450 * BrookTree 848 info structure, one per bt848 card installed.
453 int mem_rid; /* 4.x resource id */
454 struct resource *res_mem; /* 4.x resource descriptor for registers */
455 int irq_rid; /* 4.x resource id */
456 struct resource *res_irq; /* 4.x resource descriptor for interrupt */
457 void *res_ih; /* 4.x newbus interrupt handler cookie */
458 bus_space_tag_t memt; /* Bus space register access functions */
459 bus_space_handle_t memh; /* Bus space register access functions */
460 bus_size_t obmemsz;/* Size of card (bytes) */
461 #if defined(BKTR_USE_FREEBSD_SMBUS)
462 struct bktr_i2c_softc i2c_sc; /* bt848_i2c device */
464 char bktr_xname[7]; /* device name and unit number */
466 vm_offset_t bigbuf; /* buffer that holds the captured image */
467 vm_offset_t vbidata; /* RISC program puts VBI data from the current frame here */
468 vm_offset_t vbibuffer; /* Circular buffer holding VBI data for the user */
469 vm_offset_t dma_prog; /* RISC prog for single and/or even field capture*/
470 vm_offset_t odd_dma_prog;/* RISC program for Odd field capture */
472 /* the following definitions are common over all platforms */
473 int alloc_pages; /* number of pages in bigbuf */
474 int vbiinsert; /* Position for next write into circular buffer */
475 int vbistart; /* Position of last read from circular buffer */
476 int vbisize; /* Number of bytes in the circular buffer */
477 u_long vbi_sequence_number; /* sequence number for VBI */
478 int vbi_read_blocked; /* user process blocked on read() from /dev/vbi */
479 struct selinfo vbi_select; /* Data used by select() on /dev/vbi */
482 struct proc *proc; /* process to receive raised signal */
483 int signal; /* signal to send to process */
484 int clr_on_start; /* clear cap buf on capture start? */
485 #define METEOR_SIG_MODE_MASK 0xffff0000
486 #define METEOR_SIG_FIELD_MODE 0x00010000
487 #define METEOR_SIG_FRAME_MODE 0x00000000
488 char dma_prog_loaded;
489 struct meteor_mem *mem; /* used to control sync. multi-frame output */
490 u_long synch_wait; /* wait for free buffer before continuing */
491 short current; /* frame number in buffer (1-frames) */
492 short rows; /* number of rows in a frame */
493 short cols; /* number of columns in a frame */
494 int capture_area_x_offset; /* Usually the full 640x480(NTSC) image is */
495 int capture_area_y_offset; /* captured. The capture area allows for */
496 int capture_area_x_size; /* example 320x200 pixels from the centre */
497 int capture_area_y_size; /* of the video image to be captured. */
498 char capture_area_enabled; /* When TRUE use user's capture area. */
499 int pixfmt; /* active pixel format (idx into fmt tbl) */
500 int pixfmt_compat; /* Y/N - in meteor pix fmt compat mode */
501 u_long format; /* frame format rgb, yuv, etc.. */
502 short frames; /* number of frames allocated */
503 int frame_size; /* number of bytes in a frame */
504 u_long fifo_errors; /* number of fifo capture errors since open */
505 u_long dma_errors; /* number of DMA capture errors since open */
506 u_long frames_captured;/* number of frames captured since open */
507 u_long even_fields_captured; /* number of even fields captured */
508 u_long odd_fields_captured; /* number of odd fields captured */
509 u_long range_enable; /* enable range checking ?? */
510 u_short capcontrol; /* reg 0xdc capture control */
511 u_short bktr_cap_ctl;
512 volatile u_int flags;
513 #define METEOR_INITALIZED 0x00000001
514 #define METEOR_OPEN 0x00000002
515 #define METEOR_MMAP 0x00000004
516 #define METEOR_INTR 0x00000008
517 #define METEOR_READ 0x00000010 /* XXX never gets referenced */
518 #define METEOR_SINGLE 0x00000020 /* get single frame */
519 #define METEOR_CONTIN 0x00000040 /* continuously get frames */
520 #define METEOR_SYNCAP 0x00000080 /* synchronously get frames */
521 #define METEOR_CAP_MASK 0x000000f0
522 #define METEOR_NTSC 0x00000100
523 #define METEOR_PAL 0x00000200
524 #define METEOR_SECAM 0x00000400
525 #define BROOKTREE_NTSC 0x00000100 /* used in video open() and */
526 #define BROOKTREE_PAL 0x00000200 /* in the kernel config */
527 #define BROOKTREE_SECAM 0x00000400 /* file */
528 #define METEOR_AUTOMODE 0x00000800
529 #define METEOR_FORM_MASK 0x00000f00
530 #define METEOR_DEV0 0x00001000
531 #define METEOR_DEV1 0x00002000
532 #define METEOR_DEV2 0x00004000
533 #define METEOR_DEV3 0x00008000
534 #define METEOR_DEV_SVIDEO 0x00006000
535 #define METEOR_DEV_RGB 0x0000a000
536 #define METEOR_DEV_MASK 0x0000f000
537 #define METEOR_RGB16 0x00010000
538 #define METEOR_RGB24 0x00020000
539 #define METEOR_YUV_PACKED 0x00040000
540 #define METEOR_YUV_PLANAR 0x00080000
541 #define METEOR_WANT_EVEN 0x00100000 /* want even frame */
542 #define METEOR_WANT_ODD 0x00200000 /* want odd frame */
543 #define METEOR_WANT_MASK 0x00300000
544 #define METEOR_ONLY_EVEN_FIELDS 0x01000000
545 #define METEOR_ONLY_ODD_FIELDS 0x02000000
546 #define METEOR_ONLY_FIELDS_MASK 0x03000000
547 #define METEOR_YUV_422 0x04000000
548 #define METEOR_OUTPUT_FMT_MASK 0x040f0000
549 #define METEOR_WANT_TS 0x08000000 /* time-stamp a frame */
550 #define METEOR_RGB 0x20000000 /* meteor rgb unit */
551 #define METEOR_FIELD_MODE 0x80000000
552 u_char tflags; /* Tuner flags (/dev/tuner) */
553 #define TUNER_INITALIZED 0x00000001
554 #define TUNER_OPEN 0x00000002
555 u_char vbiflags; /* VBI flags (/dev/vbi) */
556 #define VBI_INITALIZED 0x00000001
557 #define VBI_OPEN 0x00000002
558 #define VBI_CAPTURE 0x00000004
559 u_short fps; /* frames per second */
560 struct meteor_video video;
561 struct TVTUNER tuner;
562 struct CARDTYPE card;
563 u_char audio_mux_select; /* current mode of the audio */
564 u_char audio_mute_state; /* mute state of the audio */
565 u_char format_params;
576 bktr_clip_t clip_list[100];
577 int reverse_mute; /* Swap the GPIO values for Mute and TV Audio */
581 #define BT848_USE_XTALS 0
582 #define BT848_USE_PLL 1
583 int xtal_pll_mode; /* Use XTAL or PLL mode for PAL/SECAM */
584 int remote_control; /* remote control detected */
585 int remote_control_addr; /* remote control i2c address */
586 char msp_version_string[9]; /* MSP version string 34xxx-xx */
587 int msp_addr; /* MSP i2c address */
588 char dpl_version_string[9]; /* DPL version string 35xxx-xx */
589 int dpl_addr; /* DPL i2c address */
590 int slow_msp_audio; /* 0 = use fast MSP3410/3415 programming sequence */
591 /* 1 = use slow MSP3410/3415 programming sequence */
592 /* 2 = use Tuner's Mono audio output via the MSP chip */
593 int msp_use_mono_source; /* use Tuner's Mono audio output via the MSP chip */
594 int audio_mux_present; /* 1 = has audio mux on GPIO lines, 0 = no audio mux */
595 int msp_source_selected; /* 0 = TV source, 1 = Line In source, 2 = FM Radio Source */
597 #ifdef BKTR_NEW_MSP34XX_DRIVER
598 /* msp3400c related data */
599 void * msp3400c_info;
608 typedef struct bktr_softc bktr_reg_t;
609 typedef struct bktr_softc* bktr_ptr_t;
611 #define Bt848_MAX_SIGN 16
613 struct bt848_card_sig {
616 u_char signature[Bt848_MAX_SIGN];
620 /***********************************************************/
621 /* ioctl_cmd_t int on old versions, u_long on new versions */
622 /***********************************************************/
624 typedef u_long ioctl_cmd_t;