2 * Copyright (c) 1998 Doug Rabson
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * $FreeBSD: src/sys/i386/include/atomic.h,v 1.9.2.1 2000/07/07 00:38:47 obrien Exp $
28 #ifndef _CPU_ATOMIC_H_
29 #define _CPU_ATOMIC_H_
32 #include <sys/types.h>
36 * Various simple arithmetic on memory which is atomic in the presence
37 * of interrupts and multiple processors.
39 * atomic_set_char(P, V) (*(u_char*)(P) |= (V))
40 * atomic_clear_char(P, V) (*(u_char*)(P) &= ~(V))
41 * atomic_add_char(P, V) (*(u_char*)(P) += (V))
42 * atomic_subtract_char(P, V) (*(u_char*)(P) -= (V))
44 * atomic_set_short(P, V) (*(u_short*)(P) |= (V))
45 * atomic_clear_short(P, V) (*(u_short*)(P) &= ~(V))
46 * atomic_add_short(P, V) (*(u_short*)(P) += (V))
47 * atomic_subtract_short(P, V) (*(u_short*)(P) -= (V))
49 * atomic_set_int(P, V) (*(u_int*)(P) |= (V))
50 * atomic_clear_int(P, V) (*(u_int*)(P) &= ~(V))
51 * atomic_add_int(P, V) (*(u_int*)(P) += (V))
52 * atomic_subtract_int(P, V) (*(u_int*)(P) -= (V))
54 * atomic_set_long(P, V) (*(u_long*)(P) |= (V))
55 * atomic_clear_long(P, V) (*(u_long*)(P) &= ~(V))
56 * atomic_add_long(P, V) (*(u_long*)(P) += (V))
57 * atomic_subtract_long(P, V) (*(u_long*)(P) -= (V))
61 * The above functions are expanded inline in the statically-linked
62 * kernel and lock prefixes are generated.
64 * Kernel modules call real functions which are built into the kernel.
66 #if defined(KLD_MODULE)
67 #define ATOMIC_ASM(NAME, TYPE, OP, V) \
68 extern void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v); \
69 extern void atomic_##NAME##_##TYPE##_nonlocked(volatile u_##TYPE *p, u_##TYPE v);
71 int atomic_testandset_int(volatile u_int *p, u_int v);
73 #else /* !KLD_MODULE */
74 #define MPLOCKED "lock ; "
77 * The assembly is volatilized to demark potential before-and-after side
78 * effects if an interrupt or SMP collision were to occur. The primary
79 * atomic instructions are MP safe, the nonlocked instructions are
80 * local-interrupt-safe (so we don't depend on C 'X |= Y' generating an
81 * atomic instruction).
83 * +m - memory is read and written (=m - memory is only written)
84 * iq - integer constant or %ax/%bx/%cx/%dx (ir = int constant or any reg)
85 * (Note: byte instructions only work on %ax,%bx,%cx, or %dx). iq
86 * is good enough for our needs so don't get fancy.
89 /* egcs 1.1.2+ version */
90 #define ATOMIC_ASM(NAME, TYPE, OP, V) \
91 static __inline void \
92 atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
94 __asm __volatile(MPLOCKED OP \
98 static __inline void \
99 atomic_##NAME##_##TYPE##_nonlocked(volatile u_##TYPE *p, u_##TYPE v)\
101 __asm __volatile(OP \
106 #endif /* KLD_MODULE */
108 /* egcs 1.1.2+ version */
109 ATOMIC_ASM(set, char, "orb %b1,%0", v)
110 ATOMIC_ASM(clear, char, "andb %b1,%0", ~v)
111 ATOMIC_ASM(add, char, "addb %b1,%0", v)
112 ATOMIC_ASM(subtract, char, "subb %b1,%0", v)
114 ATOMIC_ASM(set, short, "orw %w1,%0", v)
115 ATOMIC_ASM(clear, short, "andw %w1,%0", ~v)
116 ATOMIC_ASM(add, short, "addw %w1,%0", v)
117 ATOMIC_ASM(subtract, short, "subw %w1,%0", v)
119 ATOMIC_ASM(set, int, "orl %1,%0", v)
120 ATOMIC_ASM(clear, int, "andl %1,%0", ~v)
121 ATOMIC_ASM(add, int, "addl %1,%0", v)
122 ATOMIC_ASM(subtract, int, "subl %1,%0", v)
124 ATOMIC_ASM(set, long, "orl %1,%0", v)
125 ATOMIC_ASM(clear, long, "andl %1,%0", ~v)
126 ATOMIC_ASM(add, long, "addl %1,%0", v)
127 ATOMIC_ASM(subtract, long, "subl %1,%0", v)
129 #if defined(KLD_MODULE)
131 u_int atomic_readandclear_int(volatile u_int *addr);
133 #else /* !KLD_MODULE */
135 static __inline u_int
136 atomic_readandclear_int(volatile u_int *addr)
143 "# atomic_readandclear_int"
144 : "+r" (res), /* 0 */
151 #endif /* KLD_MODULE */
155 * atomic_poll_acquire_int(P) Returns non-zero on success, 0 if the lock
156 * has already been acquired.
157 * atomic_poll_release_int(P)
159 * These support the NDIS driver and are also used for IPIQ interlocks
160 * between cpus. Both the acquisition and release must be
161 * cache-synchronizing instructions.
164 #if defined(KLD_MODULE)
166 extern int atomic_swap_int(volatile int *addr, int value);
167 extern long atomic_swap_long(volatile long *addr, long value);
168 extern void *atomic_swap_ptr(volatile void **addr, void *value);
169 extern int atomic_poll_acquire_int(volatile u_int *p);
170 extern void atomic_poll_release_int(volatile u_int *p);
175 atomic_swap_int(volatile int *addr, int value)
177 __asm __volatile("xchgl %0, %1" :
178 "=r" (value), "=m" (*addr) : "0" (value) : "memory");
183 atomic_swap_long(volatile long *addr, long value)
185 return (atomic_swap_int((volatile int *)addr, (int)value));
188 static __inline void *
189 atomic_swap_ptr(volatile void **addr, void *value)
191 __asm __volatile("xchgl %0, %1" :
192 "=r" (value), "=m" (*addr) : "0" (value) : "memory");
198 atomic_poll_acquire_int(volatile u_int *p)
202 __asm __volatile(MPLOCKED "btsl $0,%0; setnc %%al; andl $255,%%eax" : "+m" (*p), "=a" (data));
208 atomic_poll_release_int(volatile u_int *p)
210 __asm __volatile(MPLOCKED "btrl $0,%0" : "+m" (*p));
216 * These functions operate on a 32 bit interrupt interlock which is defined
219 * bit 0-30 interrupt handler disabled bits (counter)
220 * bit 31 interrupt handler currently running bit (1 = run)
222 * atomic_intr_cond_test(P) Determine if the interlock is in an
223 * acquired state. Returns 0 if it not
224 * acquired, non-zero if it is.
226 * atomic_intr_cond_try(P)
227 * Increment the request counter and attempt to
228 * set bit 31 to acquire the interlock. If
229 * we are unable to set bit 31 the request
230 * counter is decremented and we return -1,
231 * otherwise we return 0.
233 * atomic_intr_cond_enter(P, func, arg)
234 * Increment the request counter and attempt to
235 * set bit 31 to acquire the interlock. If
236 * we are unable to set bit 31 func(arg) is
237 * called in a loop until we are able to set
240 * atomic_intr_cond_exit(P, func, arg)
241 * Decrement the request counter and clear bit
242 * 31. If the request counter is still non-zero
243 * call func(arg) once.
245 * atomic_intr_handler_disable(P)
246 * Set bit 30, indicating that the interrupt
247 * handler has been disabled. Must be called
248 * after the hardware is disabled.
250 * Returns bit 31 indicating whether a serialized
251 * accessor is active (typically the interrupt
252 * handler is running). 0 == not active,
253 * non-zero == active.
255 * atomic_intr_handler_enable(P)
256 * Clear bit 30, indicating that the interrupt
257 * handler has been enabled. Must be called
258 * before the hardware is actually enabled.
260 * atomic_intr_handler_is_enabled(P)
261 * Returns bit 30, 0 indicates that the handler
262 * is enabled, non-zero indicates that it is
263 * disabled. The request counter portion of
264 * the field is ignored.
267 #if defined(KLD_MODULE)
269 void atomic_intr_init(__atomic_intr_t *p);
270 int atomic_intr_handler_disable(__atomic_intr_t *p);
271 void atomic_intr_handler_enable(__atomic_intr_t *p);
272 int atomic_intr_handler_is_enabled(__atomic_intr_t *p);
273 int atomic_intr_cond_test(__atomic_intr_t *p);
274 int atomic_intr_cond_try(__atomic_intr_t *p);
275 void atomic_intr_cond_enter(__atomic_intr_t *p, void (*func)(void *), void *arg);
276 void atomic_intr_cond_exit(__atomic_intr_t *p, void (*func)(void *), void *arg);
277 uint64_t atomic_load_acq_64_i586(volatile uint64_t *p);
283 atomic_intr_init(__atomic_intr_t *p)
290 atomic_intr_handler_disable(__atomic_intr_t *p)
294 __asm __volatile(MPLOCKED "orl $0x40000000,%1; movl %1,%%eax; " \
295 "andl $0x80000000,%%eax" \
296 : "=a"(data) , "+m"(*p));
302 atomic_intr_handler_enable(__atomic_intr_t *p)
304 __asm __volatile(MPLOCKED "andl $0xBFFFFFFF,%0" : "+m" (*p));
309 atomic_intr_handler_is_enabled(__atomic_intr_t *p)
313 __asm __volatile("movl %1,%%eax; andl $0x40000000,%%eax" \
314 : "=a"(data) : "m"(*p));
320 atomic_intr_cond_enter(__atomic_intr_t *p, void (*func)(void *), void *arg)
322 __asm __volatile(MPLOCKED "incl %0; " \
324 MPLOCKED "btsl $31,%0; jnc 2f; " \
325 "pushl %2; call *%1; addl $4,%%esp; " \
329 : "r"(func), "m"(arg) \
334 * Attempt to enter the interrupt condition variable. Returns zero on
335 * success, 1 on failure.
339 atomic_intr_cond_try(__atomic_intr_t *p)
343 __asm __volatile(MPLOCKED "incl %0; " \
345 "subl %%eax,%%eax; " \
346 MPLOCKED "btsl $31,%0; jnc 2f; " \
347 MPLOCKED "decl %0; " \
350 : "+m" (*p), "=&a"(ret)
358 atomic_intr_cond_test(__atomic_intr_t *p)
360 return((int)(*p & 0x80000000));
365 atomic_intr_cond_exit(__atomic_intr_t *p, void (*func)(void *), void *arg)
367 __asm __volatile(MPLOCKED "decl %0; " \
368 MPLOCKED "btrl $31,%0; " \
369 "testl $0x3FFFFFFF,%0; jz 1f; " \
370 "pushl %2; call *%1; addl $4,%%esp; " \
373 : "r"(func), "m"(arg) \
377 static __inline uint64_t
378 atomic_load_acq_64_i586(volatile uint64_t *p)
383 " movl %%ebx,%%eax ; "
384 " movl %%ecx,%%edx ; "
387 : "=&A" (res), /* 0 */
398 * Atomic compare and set
400 * if (*_dst == _old) *_dst = _new (all 32 bit words)
402 * Returns 0 on failure, non-zero on success
404 #if defined(KLD_MODULE)
406 extern int atomic_cmpset_int(volatile u_int *_dst, u_int _old, u_int _new);
407 extern long atomic_cmpset_long(volatile u_long *_dst, u_long _exp, u_long _src);
408 extern u_int atomic_fetchadd_int(volatile u_int *_p, u_int _v);
409 extern u_long atomic_fetchadd_long(volatile u_long *_p, u_long _v);
414 atomic_cmpset_int(volatile u_int *_dst, u_int _old, u_int _new)
418 __asm __volatile(MPLOCKED "cmpxchgl %2,%1; " \
419 : "+a" (res), "=m" (*_dst) \
420 : "r" (_new), "m" (*_dst) \
422 return (res == _old);
426 atomic_cmpset_long(volatile u_long *_dst, u_long _exp, u_long _src)
428 return (atomic_cmpset_int((volatile u_int *)_dst, (u_int)_exp,
433 * Atomically add the value of v to the integer pointed to by p and return
434 * the previous value of *p.
436 static __inline u_int
437 atomic_fetchadd_int(volatile u_int *_p, u_int _v)
439 __asm __volatile(MPLOCKED "xaddl %0,%1; " \
440 : "+r" (_v), "=m" (*_p) \
447 atomic_testandset_int(volatile u_int *p, u_int v)
455 "# atomic_testandset_int"
456 : "=q" (res), /* 0 */
458 : "Ir" (v & 0x1f) /* 2 */
463 static __inline u_long
464 atomic_fetchadd_long(volatile u_long *_p, u_long _v)
466 __asm __volatile(MPLOCKED "xaddl %0,%1; " \
467 : "+r" (_v), "=m" (*_p) \
473 #endif /* KLD_MODULE */
475 #if defined(KLD_MODULE)
477 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
478 extern u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p); \
479 extern void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v);
481 #else /* !KLD_MODULE */
483 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
484 static __inline u_##TYPE \
485 atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
489 __asm __volatile(MPLOCKED LOP \
490 : "=a" (res), /* 0 */ \
499 * The XCHG instruction asserts LOCK automagically. \
501 static __inline void \
502 atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
504 __asm __volatile(SOP \
505 : "=m" (*p), /* 0 */ \
507 : "m" (*p)); /* 2 */ \
511 #endif /* !KLD_MODULE */
513 ATOMIC_STORE_LOAD(char, "cmpxchgb %b0,%1", "xchgb %b1,%0");
514 ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0");
515 ATOMIC_STORE_LOAD(int, "cmpxchgl %0,%1", "xchgl %1,%0");
516 ATOMIC_STORE_LOAD(long, "cmpxchgl %0,%1", "xchgl %1,%0");
519 #undef ATOMIC_STORE_LOAD
521 /* Acquire and release variants are identical to the normal ones. */
522 #define atomic_set_acq_char atomic_set_char
523 #define atomic_set_rel_char atomic_set_char
524 #define atomic_clear_acq_char atomic_clear_char
525 #define atomic_clear_rel_char atomic_clear_char
526 #define atomic_add_acq_char atomic_add_char
527 #define atomic_add_rel_char atomic_add_char
528 #define atomic_subtract_acq_char atomic_subtract_char
529 #define atomic_subtract_rel_char atomic_subtract_char
531 #define atomic_set_acq_short atomic_set_short
532 #define atomic_set_rel_short atomic_set_short
533 #define atomic_clear_acq_short atomic_clear_short
534 #define atomic_clear_rel_short atomic_clear_short
535 #define atomic_add_acq_short atomic_add_short
536 #define atomic_add_rel_short atomic_add_short
537 #define atomic_subtract_acq_short atomic_subtract_short
538 #define atomic_subtract_rel_short atomic_subtract_short
540 #define atomic_set_acq_int atomic_set_int
541 #define atomic_set_rel_int atomic_set_int
542 #define atomic_clear_acq_int atomic_clear_int
543 #define atomic_clear_rel_int atomic_clear_int
544 #define atomic_add_acq_int atomic_add_int
545 #define atomic_add_rel_int atomic_add_int
546 #define atomic_subtract_acq_int atomic_subtract_int
547 #define atomic_subtract_rel_int atomic_subtract_int
548 #define atomic_cmpset_acq_int atomic_cmpset_int
549 #define atomic_cmpset_rel_int atomic_cmpset_int
551 #define atomic_set_acq_long atomic_set_long
552 #define atomic_set_rel_long atomic_set_long
553 #define atomic_clear_acq_long atomic_clear_long
554 #define atomic_clear_rel_long atomic_clear_long
555 #define atomic_add_acq_long atomic_add_long
556 #define atomic_add_rel_long atomic_add_long
557 #define atomic_subtract_acq_long atomic_subtract_long
558 #define atomic_subtract_rel_long atomic_subtract_long
559 #define atomic_cmpset_acq_long atomic_cmpset_long
560 #define atomic_cmpset_rel_long atomic_cmpset_long
562 /* cpumask_t is 32-bits on i386 */
563 #define atomic_set_cpumask atomic_set_int
564 #define atomic_clear_cpumask atomic_clear_int
565 #define atomic_cmpset_cpumask atomic_cmpset_int
567 /* Operations on 8-bit bytes. */
568 #define atomic_set_8 atomic_set_char
569 #define atomic_set_acq_8 atomic_set_acq_char
570 #define atomic_set_rel_8 atomic_set_rel_char
571 #define atomic_clear_8 atomic_clear_char
572 #define atomic_clear_acq_8 atomic_clear_acq_char
573 #define atomic_clear_rel_8 atomic_clear_rel_char
574 #define atomic_add_8 atomic_add_char
575 #define atomic_add_acq_8 atomic_add_acq_char
576 #define atomic_add_rel_8 atomic_add_rel_char
577 #define atomic_subtract_8 atomic_subtract_char
578 #define atomic_subtract_acq_8 atomic_subtract_acq_char
579 #define atomic_subtract_rel_8 atomic_subtract_rel_char
580 #define atomic_load_acq_8 atomic_load_acq_char
581 #define atomic_store_rel_8 atomic_store_rel_char
583 /* Operations on 16-bit words. */
584 #define atomic_set_16 atomic_set_short
585 #define atomic_set_acq_16 atomic_set_acq_short
586 #define atomic_set_rel_16 atomic_set_rel_short
587 #define atomic_clear_16 atomic_clear_short
588 #define atomic_clear_acq_16 atomic_clear_acq_short
589 #define atomic_clear_rel_16 atomic_clear_rel_short
590 #define atomic_add_16 atomic_add_short
591 #define atomic_add_acq_16 atomic_add_acq_short
592 #define atomic_add_rel_16 atomic_add_rel_short
593 #define atomic_subtract_16 atomic_subtract_short
594 #define atomic_subtract_acq_16 atomic_subtract_acq_short
595 #define atomic_subtract_rel_16 atomic_subtract_rel_short
596 #define atomic_load_acq_16 atomic_load_acq_short
597 #define atomic_store_rel_16 atomic_store_rel_short
599 /* Operations on 32-bit double words. */
600 #define atomic_set_32 atomic_set_int
601 #define atomic_set_acq_32 atomic_set_acq_int
602 #define atomic_set_rel_32 atomic_set_rel_int
603 #define atomic_clear_32 atomic_clear_int
604 #define atomic_clear_acq_32 atomic_clear_acq_int
605 #define atomic_clear_rel_32 atomic_clear_rel_int
606 #define atomic_add_32 atomic_add_int
607 #define atomic_add_acq_32 atomic_add_acq_int
608 #define atomic_add_rel_32 atomic_add_rel_int
609 #define atomic_subtract_32 atomic_subtract_int
610 #define atomic_subtract_acq_32 atomic_subtract_acq_int
611 #define atomic_subtract_rel_32 atomic_subtract_rel_int
612 #define atomic_load_acq_32 atomic_load_acq_int
613 #define atomic_store_rel_32 atomic_store_rel_int
614 #define atomic_cmpset_32 atomic_cmpset_int
615 #define atomic_cmpset_acq_32 atomic_cmpset_acq_int
616 #define atomic_cmpset_rel_32 atomic_cmpset_rel_int
617 #define atomic_readandclear_32 atomic_readandclear_int
618 #define atomic_fetchadd_32 atomic_fetchadd_int
620 /* Operations on 64-bit quad words. */
621 #define atomic_load_acq_64 atomic_load_acq_64_i586
623 /* Operations on pointers. */
624 #define atomic_set_ptr(p, v) \
625 atomic_set_int((volatile u_int *)(p), (u_int)(v))
626 #define atomic_set_acq_ptr(p, v) \
627 atomic_set_acq_int((volatile u_int *)(p), (u_int)(v))
628 #define atomic_set_rel_ptr(p, v) \
629 atomic_set_rel_int((volatile u_int *)(p), (u_int)(v))
630 #define atomic_clear_ptr(p, v) \
631 atomic_clear_int((volatile u_int *)(p), (u_int)(v))
632 #define atomic_clear_acq_ptr(p, v) \
633 atomic_clear_acq_int((volatile u_int *)(p), (u_int)(v))
634 #define atomic_clear_rel_ptr(p, v) \
635 atomic_clear_rel_int((volatile u_int *)(p), (u_int)(v))
636 #define atomic_add_ptr(p, v) \
637 atomic_add_int((volatile u_int *)(p), (u_int)(v))
638 #define atomic_add_acq_ptr(p, v) \
639 atomic_add_acq_int((volatile u_int *)(p), (u_int)(v))
640 #define atomic_add_rel_ptr(p, v) \
641 atomic_add_rel_int((volatile u_int *)(p), (u_int)(v))
642 #define atomic_subtract_ptr(p, v) \
643 atomic_subtract_int((volatile u_int *)(p), (u_int)(v))
644 #define atomic_subtract_acq_ptr(p, v) \
645 atomic_subtract_acq_int((volatile u_int *)(p), (u_int)(v))
646 #define atomic_subtract_rel_ptr(p, v) \
647 atomic_subtract_rel_int((volatile u_int *)(p), (u_int)(v))
648 #define atomic_load_acq_ptr(p) \
649 atomic_load_acq_int((volatile u_int *)(p))
650 #define atomic_store_rel_ptr(p, v) \
651 atomic_store_rel_int((volatile u_int *)(p), (v))
652 #define atomic_cmpset_ptr(dst, old, new) \
653 atomic_cmpset_int((volatile u_int *)(dst), (u_int)(old), (u_int)(new))
654 #define atomic_cmpset_acq_ptr(dst, old, new) \
655 atomic_cmpset_acq_int((volatile u_int *)(dst), (u_int)(old), \
657 #define atomic_cmpset_rel_ptr(dst, old, new) \
658 atomic_cmpset_rel_int((volatile u_int *)(dst), (u_int)(old), \
660 #define atomic_readandclear_ptr(p) \
661 atomic_readandclear_int((volatile u_int *)(p))
663 #endif /* ! _CPU_ATOMIC_H_ */