2 * $NetBSD: ehci.c,v 1.46 2003/03/09 19:51:13 augustss Exp $
3 * $FreeBSD: src/sys/dev/usb/ehci.c,v 1.5 2003/11/10 00:20:52 joe Exp $
4 * $DragonFly: src/sys/bus/usb/ehci.c,v 1.5 2004/03/12 03:43:06 dillon Exp $
7 /* Also ported from NetBSD:
8 * $NetBSD: ehci.c,v 1.50 2003/10/18 04:50:35 simonb Exp $
13 * hold off explorations by companion controllers until ehci has started.
17 * Copyright (c) 2001 The NetBSD Foundation, Inc.
18 * All rights reserved.
20 * This code is derived from software contributed to The NetBSD Foundation
21 * by Lennart Augustsson (lennart@augustsson.net).
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
26 * 1. Redistributions of source code must retain the above copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in the
30 * documentation and/or other materials provided with the distribution.
31 * 3. All advertising materials mentioning features or use of this software
32 * must display the following acknowledgement:
33 * This product includes software developed by the NetBSD
34 * Foundation, Inc. and its contributors.
35 * 4. Neither the name of The NetBSD Foundation nor the names of its
36 * contributors may be used to endorse or promote products derived
37 * from this software without specific prior written permission.
39 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
40 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
41 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
42 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
43 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
44 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
45 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
46 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
48 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
49 * POSSIBILITY OF SUCH DAMAGE.
53 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
55 * The EHCI 1.0 spec can be found at
56 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
57 * and the USB 2.0 spec at
58 * http://www.usb.org/developers/docs/usb_20.zip
62 #include <sys/param.h>
63 #include <sys/systm.h>
64 #include <sys/malloc.h>
65 #include <sys/kernel.h>
66 #if defined(__NetBSD__) || defined(__OpenBSD__)
67 #include <sys/device.h>
68 #include <sys/select.h>
69 #elif defined(__FreeBSD__) || defined(__DragonFly__)
70 #include <sys/endian.h>
71 #include <sys/module.h>
73 #include <machine/bus_pio.h>
74 #include <machine/bus_memio.h>
76 #if defined(DIAGNOSTIC) && defined(__i386__)
77 #include <machine/cpu.h>
81 #include <sys/queue.h>
82 #include <sys/sysctl.h>
84 #include <machine/bus.h>
85 #include <machine/endian.h>
87 #include <bus/usb/usb.h>
88 #include <bus/usb/usbdi.h>
89 #include <bus/usb/usbdivar.h>
90 #include <bus/usb/usb_mem.h>
91 #include <bus/usb/usb_quirks.h>
93 #include <bus/usb/ehcireg.h>
94 #include <bus/usb/ehcivar.h>
96 #if defined(__FreeBSD__) || defined(__DragonFly__)
97 #include <machine/clock.h>
99 #define delay(d) DELAY(d)
103 #define DPRINTF(x) if (ehcidebug) logprintf x
104 #define DPRINTFN(n,x) if (ehcidebug>(n)) logprintf x
106 SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW, 0, "USB ehci");
107 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RW,
108 &ehcidebug, 0, "ehci debug level");
110 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
114 #define DPRINTFN(n,x)
118 struct usbd_pipe pipe;
121 ehci_soft_qtd_t *qtd;
122 /* ehci_soft_itd_t *itd; */
129 /*ehci_soft_qtd_t *setup, *data, *stat;*/
142 #if defined(__NetBSD__) || defined(__OpenBSD__)
143 Static void ehci_shutdown(void *);
144 Static void ehci_power(int, void *);
147 Static usbd_status ehci_open(usbd_pipe_handle);
148 Static void ehci_poll(struct usbd_bus *);
149 Static void ehci_softintr(void *);
150 Static int ehci_intr1(ehci_softc_t *);
151 Static void ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
152 Static void ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
153 Static void ehci_idone(struct ehci_xfer *);
154 Static void ehci_timeout(void *);
155 Static void ehci_timeout_task(void *);
157 Static usbd_status ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
158 Static void ehci_freem(struct usbd_bus *, usb_dma_t *);
160 Static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
161 Static void ehci_freex(struct usbd_bus *, usbd_xfer_handle);
163 Static usbd_status ehci_root_ctrl_transfer(usbd_xfer_handle);
164 Static usbd_status ehci_root_ctrl_start(usbd_xfer_handle);
165 Static void ehci_root_ctrl_abort(usbd_xfer_handle);
166 Static void ehci_root_ctrl_close(usbd_pipe_handle);
167 Static void ehci_root_ctrl_done(usbd_xfer_handle);
169 Static usbd_status ehci_root_intr_transfer(usbd_xfer_handle);
170 Static usbd_status ehci_root_intr_start(usbd_xfer_handle);
171 Static void ehci_root_intr_abort(usbd_xfer_handle);
172 Static void ehci_root_intr_close(usbd_pipe_handle);
173 Static void ehci_root_intr_done(usbd_xfer_handle);
175 Static usbd_status ehci_device_ctrl_transfer(usbd_xfer_handle);
176 Static usbd_status ehci_device_ctrl_start(usbd_xfer_handle);
177 Static void ehci_device_ctrl_abort(usbd_xfer_handle);
178 Static void ehci_device_ctrl_close(usbd_pipe_handle);
179 Static void ehci_device_ctrl_done(usbd_xfer_handle);
181 Static usbd_status ehci_device_bulk_transfer(usbd_xfer_handle);
182 Static usbd_status ehci_device_bulk_start(usbd_xfer_handle);
183 Static void ehci_device_bulk_abort(usbd_xfer_handle);
184 Static void ehci_device_bulk_close(usbd_pipe_handle);
185 Static void ehci_device_bulk_done(usbd_xfer_handle);
187 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle);
188 Static usbd_status ehci_device_intr_start(usbd_xfer_handle);
189 Static void ehci_device_intr_abort(usbd_xfer_handle);
190 Static void ehci_device_intr_close(usbd_pipe_handle);
191 Static void ehci_device_intr_done(usbd_xfer_handle);
193 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle);
194 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle);
195 Static void ehci_device_isoc_abort(usbd_xfer_handle);
196 Static void ehci_device_isoc_close(usbd_pipe_handle);
197 Static void ehci_device_isoc_done(usbd_xfer_handle);
199 Static void ehci_device_clear_toggle(usbd_pipe_handle pipe);
200 Static void ehci_noop(usbd_pipe_handle pipe);
202 Static int ehci_str(usb_string_descriptor_t *, int, char *);
203 Static void ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
204 Static void ehci_pcd_able(ehci_softc_t *, int);
205 Static void ehci_pcd_enable(void *);
206 Static void ehci_disown(ehci_softc_t *, int, int);
208 Static ehci_soft_qh_t *ehci_alloc_sqh(ehci_softc_t *);
209 Static void ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
211 Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
212 Static void ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
213 Static usbd_status ehci_alloc_sqtd_chain(struct ehci_pipe *,
214 ehci_softc_t *, int, int, usbd_xfer_handle,
215 ehci_soft_qtd_t **, ehci_soft_qtd_t **);
216 Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
219 Static usbd_status ehci_device_request(usbd_xfer_handle xfer);
221 Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
222 Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
224 Static void ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
225 Static void ehci_sync_hc(ehci_softc_t *);
227 Static void ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
228 Static void ehci_abort_xfer(usbd_xfer_handle, usbd_status);
231 Static void ehci_dump_regs(ehci_softc_t *);
232 void ehci_dump(void);
233 Static ehci_softc_t *theehci;
234 Static void ehci_dump_link(ehci_link_t, int);
235 Static void ehci_dump_sqtds(ehci_soft_qtd_t *);
236 Static void ehci_dump_sqtd(ehci_soft_qtd_t *);
237 Static void ehci_dump_qtd(ehci_qtd_t *);
238 Static void ehci_dump_sqh(ehci_soft_qh_t *);
240 Static void ehci_dump_exfer(struct ehci_xfer *);
244 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
246 #define EHCI_INTR_ENDPT 1
248 #define ehci_add_intr_list(sc, ex) \
249 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
250 #define ehci_del_intr_list(ex) \
252 LIST_REMOVE((ex), inext); \
253 (ex)->inext.le_prev = NULL; \
255 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
257 Static struct usbd_bus_methods ehci_bus_methods = {
267 Static struct usbd_pipe_methods ehci_root_ctrl_methods = {
268 ehci_root_ctrl_transfer,
269 ehci_root_ctrl_start,
270 ehci_root_ctrl_abort,
271 ehci_root_ctrl_close,
276 Static struct usbd_pipe_methods ehci_root_intr_methods = {
277 ehci_root_intr_transfer,
278 ehci_root_intr_start,
279 ehci_root_intr_abort,
280 ehci_root_intr_close,
285 Static struct usbd_pipe_methods ehci_device_ctrl_methods = {
286 ehci_device_ctrl_transfer,
287 ehci_device_ctrl_start,
288 ehci_device_ctrl_abort,
289 ehci_device_ctrl_close,
291 ehci_device_ctrl_done,
294 Static struct usbd_pipe_methods ehci_device_intr_methods = {
295 ehci_device_intr_transfer,
296 ehci_device_intr_start,
297 ehci_device_intr_abort,
298 ehci_device_intr_close,
299 ehci_device_clear_toggle,
300 ehci_device_intr_done,
303 Static struct usbd_pipe_methods ehci_device_bulk_methods = {
304 ehci_device_bulk_transfer,
305 ehci_device_bulk_start,
306 ehci_device_bulk_abort,
307 ehci_device_bulk_close,
308 ehci_device_clear_toggle,
309 ehci_device_bulk_done,
312 Static struct usbd_pipe_methods ehci_device_isoc_methods = {
313 ehci_device_isoc_transfer,
314 ehci_device_isoc_start,
315 ehci_device_isoc_abort,
316 ehci_device_isoc_close,
318 ehci_device_isoc_done,
322 ehci_init(ehci_softc_t *sc)
324 u_int32_t version, sparams, cparams, hcr;
329 DPRINTF(("ehci_init: start\n"));
334 sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
336 version = EREAD2(sc, EHCI_HCIVERSION);
337 printf("%s: EHCI version %x.%x\n", USBDEVNAME(sc->sc_bus.bdev),
338 version >> 8, version & 0xff);
340 sparams = EREAD4(sc, EHCI_HCSPARAMS);
341 DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
342 sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
343 if (EHCI_HCS_N_CC(sparams) != sc->sc_ncomp) {
344 printf("%s: wrong number of companions (%d != %d)\n",
345 USBDEVNAME(sc->sc_bus.bdev),
346 EHCI_HCS_N_CC(sparams), sc->sc_ncomp);
347 return (USBD_IOERROR);
349 if (sc->sc_ncomp > 0) {
350 printf("%s: companion controller%s, %d port%s each:",
351 USBDEVNAME(sc->sc_bus.bdev), sc->sc_ncomp!=1 ? "s" : "",
352 EHCI_HCS_N_PCC(sparams),
353 EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
354 for (i = 0; i < sc->sc_ncomp; i++)
355 printf(" %s", USBDEVNAME(sc->sc_comps[i]->bdev));
358 sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
359 cparams = EREAD4(sc, EHCI_HCCPARAMS);
360 DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
362 if (EHCI_HCC_64BIT(cparams)) {
363 /* MUST clear segment register if 64 bit capable. */
364 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
367 sc->sc_bus.usbrev = USBREV_2_0;
369 /* Reset the controller */
370 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
371 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
372 usb_delay_ms(&sc->sc_bus, 1);
373 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
374 for (i = 0; i < 100; i++) {
375 usb_delay_ms(&sc->sc_bus, 1);
376 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
381 printf("%s: reset timeout\n",
382 USBDEVNAME(sc->sc_bus.bdev));
383 return (USBD_IOERROR);
386 /* frame list size at default, read back what we got and use that */
387 switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
388 case 0: sc->sc_flsize = 1024*4; break;
389 case 1: sc->sc_flsize = 512*4; break;
390 case 2: sc->sc_flsize = 256*4; break;
391 case 3: return (USBD_IOERROR);
393 err = usb_allocmem(&sc->sc_bus, sc->sc_flsize,
394 EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
397 DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
399 /* Set up the bus struct. */
400 sc->sc_bus.methods = &ehci_bus_methods;
401 sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
403 #if defined(__NetBSD__) || defined(__OpenBSD__)
404 sc->sc_powerhook = powerhook_establish(ehci_power, sc);
405 sc->sc_shutdownhook = shutdownhook_establish(ehci_shutdown, sc);
408 sc->sc_eintrs = EHCI_NORMAL_INTRS;
410 /* Allocate dummy QH that starts the async list. */
411 sqh = ehci_alloc_sqh(sc);
418 htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
420 htole32(sqh->physaddr | EHCI_LINK_QH);
421 sqh->qh.qh_curqtd = EHCI_NULL;
423 /* Fill the overlay qTD */
424 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
425 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
426 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
434 /* Point to async list */
435 sc->sc_async_head = sqh;
436 EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
438 usb_callout_init(sc->sc_tmo_pcd);
440 lockinit(&sc->sc_doorbell_lock, 0, "ehcidb", 0, 0);
442 /* Enable interrupts */
443 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
445 /* Turn on controller */
446 EOWRITE4(sc, EHCI_USBCMD,
447 EHCI_CMD_ITC_8 | /* 8 microframes */
448 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
453 /* Take over port ownership */
454 EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
456 for (i = 0; i < 100; i++) {
457 usb_delay_ms(&sc->sc_bus, 1);
458 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
463 printf("%s: run timeout\n", USBDEVNAME(sc->sc_bus.bdev));
464 return (USBD_IOERROR);
467 return (USBD_NORMAL_COMPLETION);
471 ehci_free_sqh(sc, sc->sc_async_head);
474 usb_freemem(&sc->sc_bus, &sc->sc_fldma);
481 ehci_softc_t *sc = v;
483 if (sc == NULL || sc->sc_dying)
486 /* If we get an interrupt while polling, then just ignore it. */
487 if (sc->sc_bus.use_polling) {
489 printf("ehci_intr: ignored interrupt while polling\n");
494 return (ehci_intr1(sc));
498 ehci_intr1(ehci_softc_t *sc)
500 u_int32_t intrs, eintrs;
502 DPRINTFN(20,("ehci_intr1: enter\n"));
504 /* In case the interrupt occurs before initialization has completed. */
507 printf("ehci_intr: sc == NULL\n");
512 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
517 EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
518 eintrs = intrs & sc->sc_eintrs;
519 DPRINTFN(7, ("ehci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
520 sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
525 sc->sc_bus.intr_context++;
526 sc->sc_bus.no_intrs++;
527 if (eintrs & EHCI_STS_IAA) {
528 DPRINTF(("ehci_intr1: door bell\n"));
529 wakeup(&sc->sc_async_head);
530 eintrs &= ~EHCI_STS_IAA;
532 if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
533 DPRINTFN(5,("ehci_intr1: %s %s\n",
534 eintrs & EHCI_STS_INT ? "INT" : "",
535 eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
536 usb_schedsoftintr(&sc->sc_bus);
537 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
539 if (eintrs & EHCI_STS_HSE) {
540 printf("%s: unrecoverable error, controller halted\n",
541 USBDEVNAME(sc->sc_bus.bdev));
544 if (eintrs & EHCI_STS_PCD) {
545 ehci_pcd(sc, sc->sc_intrxfer);
547 * Disable PCD interrupt for now, because it will be
548 * on until the port has been reset.
550 ehci_pcd_able(sc, 0);
551 /* Do not allow RHSC interrupts > 1 per second */
552 usb_callout(sc->sc_tmo_pcd, hz, ehci_pcd_enable, sc);
553 eintrs &= ~EHCI_STS_PCD;
556 sc->sc_bus.intr_context--;
559 /* Block unprocessed interrupts. */
560 sc->sc_eintrs &= ~eintrs;
561 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
562 printf("%s: blocking intrs 0x%x\n",
563 USBDEVNAME(sc->sc_bus.bdev), eintrs);
570 ehci_pcd_able(ehci_softc_t *sc, int on)
572 DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
574 sc->sc_eintrs |= EHCI_STS_PCD;
576 sc->sc_eintrs &= ~EHCI_STS_PCD;
577 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
581 ehci_pcd_enable(void *v_sc)
583 ehci_softc_t *sc = v_sc;
585 ehci_pcd_able(sc, 1);
589 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
591 usbd_pipe_handle pipe;
596 /* Just ignore the change. */
602 p = KERNADDR(&xfer->dmabuf, 0);
603 m = min(sc->sc_noport, xfer->length * 8 - 1);
604 memset(p, 0, xfer->length);
605 for (i = 1; i <= m; i++) {
606 /* Pick out CHANGE bits from the status reg. */
607 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
608 p[i/8] |= 1 << (i%8);
610 DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
611 xfer->actlen = xfer->length;
612 xfer->status = USBD_NORMAL_COMPLETION;
614 usb_transfer_complete(xfer);
618 ehci_softintr(void *v)
620 ehci_softc_t *sc = v;
621 struct ehci_xfer *ex;
623 DPRINTFN(10,("%s: ehci_softintr (%d)\n", USBDEVNAME(sc->sc_bus.bdev),
624 sc->sc_bus.intr_context));
626 sc->sc_bus.intr_context++;
629 * The only explanation I can think of for why EHCI is as brain dead
630 * as UHCI interrupt-wise is that Intel was involved in both.
631 * An interrupt just tells us that something is done, we have no
632 * clue what, so we need to scan through all active transfers. :-(
634 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext))
635 ehci_check_intr(sc, ex);
637 #ifdef USB_USE_SOFTINTR
638 if (sc->sc_softwake) {
640 wakeup(&sc->sc_softwake);
642 #endif /* USB_USE_SOFTINTR */
644 sc->sc_bus.intr_context--;
647 /* Check for an interrupt. */
649 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
651 ehci_soft_qtd_t *sqtd, *lsqtd;
654 DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
656 if (ex->sqtdstart == NULL) {
657 printf("ehci_check_intr: sqtdstart=NULL\n");
663 printf("ehci_check_intr: sqtd==0\n");
668 * If the last TD is still active we need to check whether there
669 * is a an error somewhere in the middle, or whether there was a
670 * short packet (SPD and not ACTIVE).
672 if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
673 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
674 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
675 status = le32toh(sqtd->qtd.qtd_status);
676 /* If there's an active QTD the xfer isn't done. */
677 if (status & EHCI_QTD_ACTIVE)
679 /* Any kind of error makes the xfer done. */
680 if (status & EHCI_QTD_HALTED)
682 /* We want short packets, and it is short: it's done */
683 if (EHCI_QTD_SET_BYTES(status) != 0)
686 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
691 DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
692 usb_uncallout(ex->xfer.timeout_handle, ehci_timeout, ex);
697 ehci_idone(struct ehci_xfer *ex)
699 usbd_xfer_handle xfer = &ex->xfer;
701 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
703 ehci_soft_qtd_t *sqtd;
704 u_int32_t status = 0, nstatus;
707 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
714 printf("ehci_idone: ex is done!\n ");
717 printf("ehci_idone: ex=%p is done!\n", ex);
726 if (xfer->status == USBD_CANCELLED ||
727 xfer->status == USBD_TIMEOUT) {
728 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
733 DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
735 ehci_dump_sqtds(ex->sqtdstart);
738 /* The transfer is done, compute actual length and status. */
740 for (sqtd = ex->sqtdstart; sqtd != NULL; sqtd = sqtd->nextqtd) {
741 nstatus = le32toh(sqtd->qtd.qtd_status);
742 if (nstatus & EHCI_QTD_ACTIVE)
746 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
747 actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
750 /* If there are left over TDs we need to update the toggle. */
752 if (!(xfer->rqflags & URQ_REQUEST))
753 printf("ehci_idone: need toggle update\n");
755 epipe->nexttoggle = EHCI_TD_GET_DT(le32toh(std->td.td_token));
759 status &= EHCI_QTD_STATERRS;
760 DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, status=0x%x\n",
761 xfer->length, actlen, status));
762 xfer->actlen = actlen;
767 bitmask_snprintf((u_int32_t)status,
768 "\20\3MISSEDMICRO\4XACT\5BABBLE\6BABBLE"
772 DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2,
773 ("ehci_idone: error, addr=%d, endpt=0x%02x, "
775 xfer->pipe->device->address,
776 xfer->pipe->endpoint->edesc->bEndpointAddress,
779 ehci_dump_sqh(epipe->sqh);
780 ehci_dump_sqtds(ex->sqtdstart);
783 if (status == EHCI_QTD_HALTED)
784 xfer->status = USBD_STALLED;
786 xfer->status = USBD_IOERROR; /* more info XXX */
788 xfer->status = USBD_NORMAL_COMPLETION;
791 usb_transfer_complete(xfer);
792 DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
796 * Wait here until controller claims to have an interrupt.
797 * Then call ehci_intr and return. Use timeout to avoid waiting
801 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
803 int timo = xfer->timeout;
807 xfer->status = USBD_IN_PROGRESS;
808 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
809 usb_delay_ms(&sc->sc_bus, 1);
812 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
814 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
821 if (xfer->status != USBD_IN_PROGRESS)
827 DPRINTF(("ehci_waitintr: timeout\n"));
828 xfer->status = USBD_TIMEOUT;
829 usb_transfer_complete(xfer);
830 /* XXX should free TD */
834 ehci_poll(struct usbd_bus *bus)
836 ehci_softc_t *sc = (ehci_softc_t *)bus;
840 new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
842 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
847 if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
851 #if defined(__NetBSD__) || defined(__OpenBSD__)
853 ehci_detach(struct ehci_softc *sc, int flags)
857 if (sc->sc_child != NULL)
858 rv = config_detach(sc->sc_child, flags);
863 usb_uncallout(sc->sc_tmo_pcd, ehci_pcd_enable, sc);
865 if (sc->sc_powerhook != NULL)
866 powerhook_disestablish(sc->sc_powerhook);
867 if (sc->sc_shutdownhook != NULL)
868 shutdownhook_disestablish(sc->sc_shutdownhook);
870 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
872 /* XXX free other data structures XXX */
878 #if defined(__NetBSD__) || defined(__OpenBSD__)
880 ehci_activate(device_ptr_t self, enum devact act)
882 struct ehci_softc *sc = (struct ehci_softc *)self;
889 case DVACT_DEACTIVATE:
890 if (sc->sc_child != NULL)
891 rv = config_deactivate(sc->sc_child);
900 * Handle suspend/resume.
902 * We need to switch to polling mode here, because this routine is
903 * called from an intterupt context. This is all right since we
904 * are almost suspended anyway.
906 #if defined(__NetBSD__) || defined(__OpenBSD__)
908 ehci_power(int why, void *v)
910 ehci_softc_t *sc = v;
915 DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
923 sc->sc_bus.use_polling++;
926 ctl = OREAD4(sc, EHCI_CONTROL) & ~EHCI_HCFS_MASK;
927 if (sc->sc_control == 0) {
929 * Preserve register values, in case that APM BIOS
930 * does not recover them.
932 sc->sc_control = ctl;
933 sc->sc_intre = OREAD4(sc, EHCI_INTERRUPT_ENABLE);
935 ctl |= EHCI_HCFS_SUSPEND;
936 OWRITE4(sc, EHCI_CONTROL, ctl);
938 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
939 sc->sc_bus.use_polling--;
942 sc->sc_bus.use_polling++;
945 /* Some broken BIOSes do not recover these values */
946 OWRITE4(sc, EHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
947 OWRITE4(sc, EHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
948 OWRITE4(sc, EHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
950 OWRITE4(sc, EHCI_INTERRUPT_ENABLE,
951 sc->sc_intre & (EHCI_ALL_INTRS | EHCI_MIE));
953 ctl = sc->sc_control;
955 ctl = OREAD4(sc, EHCI_CONTROL);
956 ctl |= EHCI_HCFS_RESUME;
957 OWRITE4(sc, EHCI_CONTROL, ctl);
958 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
959 ctl = (ctl & ~EHCI_HCFS_MASK) | EHCI_HCFS_OPERATIONAL;
960 OWRITE4(sc, EHCI_CONTROL, ctl);
961 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
962 sc->sc_control = sc->sc_intre = 0;
964 sc->sc_bus.use_polling--;
966 case PWR_SOFTSUSPEND:
967 case PWR_SOFTSTANDBY:
976 * Shut down the controller when the system is going down.
978 #if defined(__NetBSD__) || defined(__OpenBSD__)
980 ehci_shutdown(void *v)
982 ehci_softc_t *sc = v;
984 DPRINTF(("ehci_shutdown: stopping the HC\n"));
985 EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
986 EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
991 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
995 err = usb_allocmem(bus, size, 0, dma);
998 printf("ehci_allocm: usb_allocmem()=%d\n", err);
1004 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
1006 usb_freemem(bus, dma);
1010 ehci_allocx(struct usbd_bus *bus)
1012 struct ehci_softc *sc = (struct ehci_softc *)bus;
1013 usbd_xfer_handle xfer;
1015 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
1017 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
1019 if (xfer->busy_free != XFER_FREE) {
1020 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
1025 xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_INTWAIT);
1028 memset(xfer, 0, sizeof (struct ehci_xfer));
1030 EXFER(xfer)->isdone = 1;
1031 xfer->busy_free = XFER_BUSY;
1038 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1040 struct ehci_softc *sc = (struct ehci_softc *)bus;
1043 if (xfer->busy_free != XFER_BUSY) {
1044 printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1048 xfer->busy_free = XFER_FREE;
1049 if (!EXFER(xfer)->isdone) {
1050 printf("ehci_freex: !isdone\n");
1054 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1058 ehci_device_clear_toggle(usbd_pipe_handle pipe)
1060 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1062 DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
1063 epipe, epipe->sqh->qh.qh_qtd.qtd_status));
1066 usbd_dump_pipe(pipe);
1068 epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE);
1072 ehci_noop(usbd_pipe_handle pipe)
1078 ehci_dump_regs(ehci_softc_t *sc)
1081 printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1082 EOREAD4(sc, EHCI_USBCMD),
1083 EOREAD4(sc, EHCI_USBSTS),
1084 EOREAD4(sc, EHCI_USBINTR));
1085 printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1086 EOREAD4(sc, EHCI_FRINDEX),
1087 EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1088 EOREAD4(sc, EHCI_PERIODICLISTBASE),
1089 EOREAD4(sc, EHCI_ASYNCLISTADDR));
1090 for (i = 1; i <= sc->sc_noport; i++)
1091 printf("port %d status=0x%08x\n", i,
1092 EOREAD4(sc, EHCI_PORTSC(i)));
1096 * Unused function - this is meant to be called from a kernel
1102 ehci_dump_regs(theehci);
1106 ehci_dump_link(ehci_link_t link, int type)
1108 link = le32toh(link);
1109 printf("0x%08x", link);
1110 if (link & EHCI_LINK_TERMINATE)
1115 switch (EHCI_LINK_TYPE(link)) {
1116 case EHCI_LINK_ITD: printf("ITD"); break;
1117 case EHCI_LINK_QH: printf("QH"); break;
1118 case EHCI_LINK_SITD: printf("SITD"); break;
1119 case EHCI_LINK_FSTN: printf("FSTN"); break;
1127 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1133 for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
1134 ehci_dump_sqtd(sqtd);
1135 stop = sqtd->qtd.qtd_next & EHCI_LINK_TERMINATE;
1138 printf("dump aborted, too many TDs\n");
1142 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1144 printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1145 ehci_dump_qtd(&sqtd->qtd);
1149 ehci_dump_qtd(ehci_qtd_t *qtd)
1154 printf(" next="); ehci_dump_link(qtd->qtd_next, 0);
1155 printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1157 s = le32toh(qtd->qtd_status);
1158 bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1159 "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1160 "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1161 printf(" status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1162 s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1163 EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1164 printf(" cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1165 EHCI_QTD_GET_PID(s), sbuf);
1166 for (s = 0; s < 5; s++)
1167 printf(" buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1171 ehci_dump_sqh(ehci_soft_qh_t *sqh)
1173 ehci_qh_t *qh = &sqh->qh;
1174 u_int32_t endp, endphub;
1176 printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1177 printf(" link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
1178 endp = le32toh(qh->qh_endp);
1179 printf(" endp=0x%08x\n", endp);
1180 printf(" addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1181 EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1182 EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
1183 EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1184 printf(" mpl=0x%x ctl=%d nrl=%d\n",
1185 EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1186 EHCI_QH_GET_NRL(endp));
1187 endphub = le32toh(qh->qh_endphub);
1188 printf(" endphub=0x%08x\n", endphub);
1189 printf(" smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1190 EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1191 EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1192 EHCI_QH_GET_MULT(endphub));
1193 printf(" curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
1194 printf("Overlay qTD:\n");
1195 ehci_dump_qtd(&qh->qh_qtd);
1200 ehci_dump_exfer(struct ehci_xfer *ex)
1202 printf("ehci_dump_exfer: ex=%p\n", ex);
1208 ehci_open(usbd_pipe_handle pipe)
1210 usbd_device_handle dev = pipe->device;
1211 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1212 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1213 u_int8_t addr = dev->address;
1214 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1215 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1216 ehci_soft_qh_t *sqh;
1221 DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1222 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1225 return (USBD_IOERROR);
1227 if (addr == sc->sc_addr) {
1228 switch (ed->bEndpointAddress) {
1229 case USB_CONTROL_ENDPOINT:
1230 pipe->methods = &ehci_root_ctrl_methods;
1232 case UE_DIR_IN | EHCI_INTR_ENDPT:
1233 pipe->methods = &ehci_root_intr_methods;
1236 return (USBD_INVAL);
1238 return (USBD_NORMAL_COMPLETION);
1241 /* XXX All this stuff is only valid for async. */
1242 switch (dev->speed) {
1243 case USB_SPEED_LOW: speed = EHCI_QH_SPEED_LOW; break;
1244 case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1245 case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1246 default: panic("ehci_open: bad device speed %d", dev->speed);
1249 sqh = ehci_alloc_sqh(sc);
1252 /* qh_link filled when the QH is added */
1253 sqh->qh.qh_endp = htole32(
1254 EHCI_QH_SET_ADDR(addr) |
1255 EHCI_QH_SET_ENDPT(ed->bEndpointAddress) |
1256 EHCI_QH_SET_EPS(speed) | /* XXX */
1257 /* XXX EHCI_QH_DTC ? */
1258 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1259 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1261 EHCI_QH_SET_NRL(naks)
1263 sqh->qh.qh_endphub = htole32(
1266 /* XXX interrupt mask */
1268 sqh->qh.qh_curqtd = EHCI_NULL;
1269 /* Fill the overlay qTD */
1270 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
1271 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1272 sqh->qh.qh_qtd.qtd_status = htole32(0);
1278 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1279 0, &epipe->u.ctl.reqdma);
1282 printf("ehci_open: usb_allocmem()=%d\n", err);
1286 pipe->methods = &ehci_device_ctrl_methods;
1288 ehci_add_qh(sqh, sc->sc_async_head);
1292 pipe->methods = &ehci_device_bulk_methods;
1294 ehci_add_qh(sqh, sc->sc_async_head);
1298 pipe->methods = &ehci_device_intr_methods;
1299 return (USBD_INVAL);
1300 case UE_ISOCHRONOUS:
1301 pipe->methods = &ehci_device_isoc_methods;
1302 return (USBD_INVAL);
1304 return (USBD_INVAL);
1306 return (USBD_NORMAL_COMPLETION);
1309 ehci_free_sqh(sc, sqh);
1311 return (USBD_NOMEM);
1315 * Add an ED to the schedule. Called at splusb().
1318 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1322 sqh->next = head->next;
1323 sqh->qh.qh_link = head->qh.qh_link;
1325 head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1328 if (ehcidebug > 5) {
1329 printf("ehci_add_qh:\n");
1336 * Remove an ED from the schedule. Called at splusb().
1339 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1345 for (p = head; p != NULL && p->next != sqh; p = p->next)
1348 panic("ehci_rem_qh: ED not found");
1349 p->next = sqh->next;
1350 p->qh.qh_link = sqh->qh.qh_link;
1356 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
1358 /* Halt while we are messing. */
1359 sqh->qh.qh_qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
1360 sqh->qh.qh_curqtd = 0;
1361 sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
1363 /* Keep toggle, clear the rest, including length. */
1364 sqh->qh.qh_qtd.qtd_status &= htole32(EHCI_QTD_TOGGLE);
1368 * Ensure that the HC has released all references to the QH. We do this
1369 * by asking for a Async Advance Doorbell interrupt and then we wait for
1371 * To make this easier we first obtain exclusive use of the doorbell.
1374 ehci_sync_hc(ehci_softc_t *sc)
1379 DPRINTFN(2,("ehci_sync_hc: dying\n"));
1382 DPRINTFN(2,("ehci_sync_hc: enter\n"));
1384 lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE, NULL, NULL);
1386 /* ask for doorbell */
1387 EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1388 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1389 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1390 error = tsleep(&sc->sc_async_head, 0, "ehcidi", hz); /* bell wait */
1391 DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1392 EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1394 /* release doorbell */
1395 lockmgr(&sc->sc_doorbell_lock, LK_RELEASE, NULL, NULL);
1398 printf("ehci_sync_hc: tsleep() = %d\n", error);
1400 DPRINTFN(2,("ehci_sync_hc: exit\n"));
1406 * Data structures and routines to emulate the root hub.
1408 Static usb_device_descriptor_t ehci_devd = {
1409 USB_DEVICE_DESCRIPTOR_SIZE,
1410 UDESC_DEVICE, /* type */
1411 {0x00, 0x02}, /* USB version */
1412 UDCLASS_HUB, /* class */
1413 UDSUBCLASS_HUB, /* subclass */
1414 UDPROTO_HSHUBSTT, /* protocol */
1415 64, /* max packet */
1416 {0},{0},{0x00,0x01}, /* device id */
1417 1,2,0, /* string indicies */
1418 1 /* # of configurations */
1421 Static usb_device_qualifier_t ehci_odevd = {
1422 USB_DEVICE_DESCRIPTOR_SIZE,
1423 UDESC_DEVICE_QUALIFIER, /* type */
1424 {0x00, 0x02}, /* USB version */
1425 UDCLASS_HUB, /* class */
1426 UDSUBCLASS_HUB, /* subclass */
1427 UDPROTO_FSHUB, /* protocol */
1428 64, /* max packet */
1429 1, /* # of configurations */
1433 Static usb_config_descriptor_t ehci_confd = {
1434 USB_CONFIG_DESCRIPTOR_SIZE,
1436 {USB_CONFIG_DESCRIPTOR_SIZE +
1437 USB_INTERFACE_DESCRIPTOR_SIZE +
1438 USB_ENDPOINT_DESCRIPTOR_SIZE},
1446 Static usb_interface_descriptor_t ehci_ifcd = {
1447 USB_INTERFACE_DESCRIPTOR_SIZE,
1458 Static usb_endpoint_descriptor_t ehci_endpd = {
1459 USB_ENDPOINT_DESCRIPTOR_SIZE,
1461 UE_DIR_IN | EHCI_INTR_ENDPT,
1463 {8, 0}, /* max packet */
1467 Static usb_hub_descriptor_t ehci_hubd = {
1468 USB_HUB_DESCRIPTOR_SIZE,
1479 usb_string_descriptor_t *p;
1487 p->bLength = 2 * strlen(s) + 2;
1490 p->bDescriptorType = UDESC_STRING;
1492 for (i = 0; s[i] && l > 1; i++, l -= 2)
1493 USETW2(p->bString[i], 0, s[i]);
1498 * Simulate a hardware hub by handling all the necessary requests.
1501 ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1505 /* Insert last in queue. */
1506 err = usb_insert_transfer(xfer);
1510 /* Pipe isn't running, start first */
1511 return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1515 ehci_root_ctrl_start(usbd_xfer_handle xfer)
1517 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1518 usb_device_request_t *req;
1521 int s, len, value, index, l, totlen = 0;
1522 usb_port_status_t ps;
1523 usb_hub_descriptor_t hubd;
1528 return (USBD_IOERROR);
1531 if (!(xfer->rqflags & URQ_REQUEST))
1533 return (USBD_INVAL);
1535 req = &xfer->request;
1537 DPRINTFN(4,("ehci_root_ctrl_control type=0x%02x request=%02x\n",
1538 req->bmRequestType, req->bRequest));
1540 len = UGETW(req->wLength);
1541 value = UGETW(req->wValue);
1542 index = UGETW(req->wIndex);
1545 buf = KERNADDR(&xfer->dmabuf, 0);
1547 #define C(x,y) ((x) | ((y) << 8))
1548 switch(C(req->bRequest, req->bmRequestType)) {
1549 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1550 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1551 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1553 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1554 * for the integrated root hub.
1557 case C(UR_GET_CONFIG, UT_READ_DEVICE):
1559 *(u_int8_t *)buf = sc->sc_conf;
1563 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1564 DPRINTFN(8,("ehci_root_ctrl_control wValue=0x%04x\n", value));
1565 switch(value >> 8) {
1567 if ((value & 0xff) != 0) {
1571 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1572 USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1573 memcpy(buf, &ehci_devd, l);
1576 * We can't really operate at another speed, but the spec says
1577 * we need this descriptor.
1579 case UDESC_DEVICE_QUALIFIER:
1580 if ((value & 0xff) != 0) {
1584 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1585 memcpy(buf, &ehci_odevd, l);
1588 * We can't really operate at another speed, but the spec says
1589 * we need this descriptor.
1591 case UDESC_OTHER_SPEED_CONFIGURATION:
1593 if ((value & 0xff) != 0) {
1597 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1598 memcpy(buf, &ehci_confd, l);
1599 ((usb_config_descriptor_t *)buf)->bDescriptorType =
1601 buf = (char *)buf + l;
1603 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1605 memcpy(buf, &ehci_ifcd, l);
1606 buf = (char *)buf + l;
1608 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1610 memcpy(buf, &ehci_endpd, l);
1615 *(u_int8_t *)buf = 0;
1617 switch (value & 0xff) {
1618 case 1: /* Vendor */
1619 totlen = ehci_str(buf, len, sc->sc_vendor);
1621 case 2: /* Product */
1622 totlen = ehci_str(buf, len, "EHCI root hub");
1631 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1633 *(u_int8_t *)buf = 0;
1637 case C(UR_GET_STATUS, UT_READ_DEVICE):
1639 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1643 case C(UR_GET_STATUS, UT_READ_INTERFACE):
1644 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1646 USETW(((usb_status_t *)buf)->wStatus, 0);
1650 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1651 if (value >= USB_MAX_DEVICES) {
1655 sc->sc_addr = value;
1657 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1658 if (value != 0 && value != 1) {
1662 sc->sc_conf = value;
1664 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1666 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1667 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1668 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1671 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1673 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1676 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1678 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1679 DPRINTFN(8, ("ehci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1680 "port=%d feature=%d\n",
1682 if (index < 1 || index > sc->sc_noport) {
1686 port = EHCI_PORTSC(index);
1687 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1689 case UHF_PORT_ENABLE:
1690 EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1692 case UHF_PORT_SUSPEND:
1693 EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1695 case UHF_PORT_POWER:
1696 EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1699 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port test "
1702 case UHF_PORT_INDICATOR:
1703 DPRINTFN(2,("ehci_root_ctrl_transfer: clear port ind "
1705 EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1707 case UHF_C_PORT_CONNECTION:
1708 EOWRITE4(sc, port, v | EHCI_PS_CSC);
1710 case UHF_C_PORT_ENABLE:
1711 EOWRITE4(sc, port, v | EHCI_PS_PEC);
1713 case UHF_C_PORT_SUSPEND:
1716 case UHF_C_PORT_OVER_CURRENT:
1717 EOWRITE4(sc, port, v | EHCI_PS_OCC);
1719 case UHF_C_PORT_RESET:
1728 case UHF_C_PORT_CONNECTION:
1729 case UHF_C_PORT_ENABLE:
1730 case UHF_C_PORT_SUSPEND:
1731 case UHF_C_PORT_OVER_CURRENT:
1732 case UHF_C_PORT_RESET:
1733 /* Enable RHSC interrupt if condition is cleared. */
1734 if ((OREAD4(sc, port) >> 16) == 0)
1735 ehci_pcd_able(sc, 1);
1742 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1748 hubd.bNbrPorts = sc->sc_noport;
1749 v = EOREAD4(sc, EHCI_HCSPARAMS);
1750 USETW(hubd.wHubCharacteristics,
1751 EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1752 EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1753 ? UHD_PORT_IND : 0);
1754 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1755 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1756 hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1757 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1758 l = min(len, hubd.bDescLength);
1760 memcpy(buf, &hubd, l);
1762 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1767 memset(buf, 0, len); /* ? XXX */
1770 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1771 DPRINTFN(8,("ehci_root_ctrl_transfer: get port status i=%d\n",
1773 if (index < 1 || index > sc->sc_noport) {
1781 v = EOREAD4(sc, EHCI_PORTSC(index));
1782 DPRINTFN(8,("ehci_root_ctrl_transfer: port status=0x%04x\n",
1785 if (v & EHCI_PS_CS) i |= UPS_CURRENT_CONNECT_STATUS;
1786 if (v & EHCI_PS_PE) i |= UPS_PORT_ENABLED;
1787 if (v & EHCI_PS_SUSP) i |= UPS_SUSPEND;
1788 if (v & EHCI_PS_OCA) i |= UPS_OVERCURRENT_INDICATOR;
1789 if (v & EHCI_PS_PR) i |= UPS_RESET;
1790 if (v & EHCI_PS_PP) i |= UPS_PORT_POWER;
1791 USETW(ps.wPortStatus, i);
1793 if (v & EHCI_PS_CSC) i |= UPS_C_CONNECT_STATUS;
1794 if (v & EHCI_PS_PEC) i |= UPS_C_PORT_ENABLED;
1795 if (v & EHCI_PS_OCC) i |= UPS_C_OVERCURRENT_INDICATOR;
1796 if (sc->sc_isreset) i |= UPS_C_PORT_RESET;
1797 USETW(ps.wPortChange, i);
1798 l = min(len, sizeof ps);
1799 memcpy(buf, &ps, l);
1802 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1805 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1807 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1808 if (index < 1 || index > sc->sc_noport) {
1812 port = EHCI_PORTSC(index);
1813 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1815 case UHF_PORT_ENABLE:
1816 EOWRITE4(sc, port, v | EHCI_PS_PE);
1818 case UHF_PORT_SUSPEND:
1819 EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1821 case UHF_PORT_RESET:
1822 DPRINTFN(5,("ehci_root_ctrl_transfer: reset port %d\n",
1824 if (EHCI_PS_IS_LOWSPEED(v)) {
1825 /* Low speed device, give up ownership. */
1826 ehci_disown(sc, index, 1);
1829 /* Start reset sequence. */
1830 v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1831 EOWRITE4(sc, port, v | EHCI_PS_PR);
1832 /* Wait for reset to complete. */
1833 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
1838 /* Terminate reset sequence. */
1839 EOWRITE4(sc, port, v);
1840 /* Wait for HC to complete reset. */
1841 usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
1846 v = EOREAD4(sc, port);
1847 DPRINTF(("ehci after reset, status=0x%08x\n", v));
1848 if (v & EHCI_PS_PR) {
1849 printf("%s: port reset timeout\n",
1850 USBDEVNAME(sc->sc_bus.bdev));
1851 return (USBD_TIMEOUT);
1853 if (!(v & EHCI_PS_PE)) {
1854 /* Not a high speed device, give up ownership.*/
1855 ehci_disown(sc, index, 0);
1859 DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1862 case UHF_PORT_POWER:
1863 DPRINTFN(2,("ehci_root_ctrl_transfer: set port power "
1865 EOWRITE4(sc, port, v | EHCI_PS_PP);
1868 DPRINTFN(2,("ehci_root_ctrl_transfer: set port test "
1871 case UHF_PORT_INDICATOR:
1872 DPRINTFN(2,("ehci_root_ctrl_transfer: set port ind "
1874 EOWRITE4(sc, port, v | EHCI_PS_PIC);
1881 case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
1882 case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
1883 case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
1884 case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
1890 xfer->actlen = totlen;
1891 err = USBD_NORMAL_COMPLETION;
1895 usb_transfer_complete(xfer);
1897 return (USBD_IN_PROGRESS);
1901 ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1906 DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1908 if (sc->sc_npcomp != 0) {
1909 int i = (index-1) / sc->sc_npcomp;
1910 if (i >= sc->sc_ncomp)
1911 printf("%s: strange port\n",
1912 USBDEVNAME(sc->sc_bus.bdev));
1914 printf("%s: handing over %s speed device on "
1916 USBDEVNAME(sc->sc_bus.bdev),
1917 lowspeed ? "low" : "full",
1918 index, USBDEVNAME(sc->sc_comps[i]->bdev));
1920 printf("%s: npcomp == 0\n", USBDEVNAME(sc->sc_bus.bdev));
1923 port = EHCI_PORTSC(index);
1924 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1925 EOWRITE4(sc, port, v | EHCI_PS_PO);
1928 /* Abort a root control request. */
1930 ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1932 /* Nothing to do, all transfers are synchronous. */
1935 /* Close the root pipe. */
1937 ehci_root_ctrl_close(usbd_pipe_handle pipe)
1939 DPRINTF(("ehci_root_ctrl_close\n"));
1940 /* Nothing to do. */
1944 ehci_root_intr_done(usbd_xfer_handle xfer)
1946 xfer->hcpriv = NULL;
1950 ehci_root_intr_transfer(usbd_xfer_handle xfer)
1954 /* Insert last in queue. */
1955 err = usb_insert_transfer(xfer);
1959 /* Pipe isn't running, start first */
1960 return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1964 ehci_root_intr_start(usbd_xfer_handle xfer)
1966 usbd_pipe_handle pipe = xfer->pipe;
1967 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1970 return (USBD_IOERROR);
1972 sc->sc_intrxfer = xfer;
1974 return (USBD_IN_PROGRESS);
1977 /* Abort a root interrupt request. */
1979 ehci_root_intr_abort(usbd_xfer_handle xfer)
1983 if (xfer->pipe->intrxfer == xfer) {
1984 DPRINTF(("ehci_root_intr_abort: remove\n"));
1985 xfer->pipe->intrxfer = NULL;
1987 xfer->status = USBD_CANCELLED;
1989 usb_transfer_complete(xfer);
1993 /* Close the root pipe. */
1995 ehci_root_intr_close(usbd_pipe_handle pipe)
1997 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
1999 DPRINTF(("ehci_root_intr_close\n"));
2001 sc->sc_intrxfer = NULL;
2005 ehci_root_ctrl_done(usbd_xfer_handle xfer)
2007 xfer->hcpriv = NULL;
2010 /************************/
2013 ehci_alloc_sqh(ehci_softc_t *sc)
2015 ehci_soft_qh_t *sqh;
2020 if (sc->sc_freeqhs == NULL) {
2021 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
2022 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
2023 EHCI_PAGE_SIZE, &dma);
2026 printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
2030 for(i = 0; i < EHCI_SQH_CHUNK; i++) {
2031 offs = i * EHCI_SQH_SIZE;
2032 sqh = KERNADDR(&dma, offs);
2033 sqh->physaddr = DMAADDR(&dma, offs);
2034 sqh->next = sc->sc_freeqhs;
2035 sc->sc_freeqhs = sqh;
2038 sqh = sc->sc_freeqhs;
2039 sc->sc_freeqhs = sqh->next;
2040 memset(&sqh->qh, 0, sizeof(ehci_qh_t));
2046 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
2048 sqh->next = sc->sc_freeqhs;
2049 sc->sc_freeqhs = sqh;
2053 ehci_alloc_sqtd(ehci_softc_t *sc)
2055 ehci_soft_qtd_t *sqtd;
2061 if (sc->sc_freeqtds == NULL) {
2062 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
2063 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
2064 EHCI_PAGE_SIZE, &dma);
2067 printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
2072 for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
2073 offs = i * EHCI_SQTD_SIZE;
2074 sqtd = KERNADDR(&dma, offs);
2075 sqtd->physaddr = DMAADDR(&dma, offs);
2076 sqtd->nextqtd = sc->sc_freeqtds;
2077 sc->sc_freeqtds = sqtd;
2083 sqtd = sc->sc_freeqtds;
2084 sc->sc_freeqtds = sqtd->nextqtd;
2085 memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
2086 sqtd->nextqtd = NULL;
2094 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
2099 sqtd->nextqtd = sc->sc_freeqtds;
2100 sc->sc_freeqtds = sqtd;
2105 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
2106 int alen, int rd, usbd_xfer_handle xfer,
2107 ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
2109 ehci_soft_qtd_t *next, *cur;
2110 ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
2111 u_int32_t qtdstatus;
2112 int len, curlen, offset;
2114 usb_dma_t *dma = &xfer->dmabuf;
2116 DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
2120 dataphys = DMAADDR(dma, 0);
2121 dataphyslastpage = EHCI_PAGE(DMAADDR(dma, len - 1));
2122 qtdstatus = htole32(
2124 EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2125 EHCI_QTD_SET_CERR(3)
2127 /* BYTES set below */
2128 /* XXX Data toggle */
2131 cur = ehci_alloc_sqtd(sc);
2136 dataphyspage = EHCI_PAGE(dataphys);
2137 /* The EHCI hardware can handle at most 5 pages. */
2138 #if defined(__NetBSD__) || defined(__OpenBSD__)
2139 if (dataphyslastpage - dataphyspage <
2140 EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) {
2141 /* we can handle it in this QTD */
2143 #elif defined(__FreeBSD__) || defined(__DragonFly__)
2144 /* XXX This is pretty broken: Because we do not allocate
2145 * a contiguous buffer (contiguous in physical pages) we
2146 * can only transfer one page in one go.
2147 * So check whether the start and end of the buffer are on
2150 if (dataphyspage == dataphyslastpage) {
2154 #if defined(__NetBSD__) || defined(__OpenBSD__)
2155 /* must use multiple TDs, fill as much as possible. */
2156 curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE -
2157 EHCI_PAGE_OFFSET(dataphys);
2160 printf("ehci_alloc_sqtd_chain: curlen=0x%x "
2161 "len=0x%x offs=0x%x\n", curlen, len,
2162 EHCI_PAGE_OFFSET(dataphys));
2163 printf("lastpage=0x%x page=0x%x phys=0x%x\n",
2164 dataphyslastpage, dataphyspage,
2169 #elif defined(__FreeBSD__) || defined(__DragonFly__)
2170 /* See comment above (XXX) */
2171 curlen = EHCI_PAGE_SIZE -
2172 EHCI_PAGE_MASK(dataphys);
2175 /* XXX true for EHCI? */
2176 /* the length must be a multiple of the max size */
2177 curlen -= curlen % UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2178 DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
2179 "curlen=%d\n", curlen));
2182 panic("ehci_alloc_std: curlen == 0");
2185 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
2186 "dataphyslastpage=0x%08x len=%d curlen=%d\n",
2187 dataphys, dataphyslastpage,
2192 next = ehci_alloc_sqtd(sc);
2195 nextphys = next->physaddr;
2198 nextphys = EHCI_NULL;
2201 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
2202 ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
2203 if (i != 0) /* use offset only in first buffer */
2205 cur->qtd.qtd_buffer[i] = htole32(a);
2207 if (i >= EHCI_QTD_NBUFFERS) {
2208 printf("ehci_alloc_sqtd_chain: i=%d\n", i);
2213 cur->nextqtd = next;
2214 cur->qtd.qtd_next = cur->qtd.qtd_altnext = htole32(nextphys);
2215 cur->qtd.qtd_status =
2216 qtdstatus | htole32(EHCI_QTD_SET_BYTES(curlen));
2219 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
2220 dataphys, dataphys + curlen));
2223 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
2225 dataphys = DMAADDR(dma, offset);
2228 cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2231 DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
2234 return (USBD_NORMAL_COMPLETION);
2237 /* XXX free chain */
2238 DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
2239 return (USBD_NOMEM);
2243 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
2244 ehci_soft_qtd_t *sqtdend)
2249 DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
2252 for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
2254 ehci_free_sqtd(sc, sqtd);
2261 * Close a reqular pipe.
2262 * Assumes that there are no pending transactions.
2265 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2267 struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2268 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2269 ehci_soft_qh_t *sqh = epipe->sqh;
2273 ehci_rem_qh(sc, sqh, head);
2275 ehci_free_sqh(sc, epipe->sqh);
2279 * Abort a device request.
2280 * If this routine is called at splusb() it guarantees that the request
2281 * will be removed from the hardware scheduling and that the callback
2282 * for it will be called with USBD_CANCELLED status.
2283 * It's impossible to guarantee that the requested transfer will not
2284 * have happened since the hardware runs concurrently.
2285 * If the transaction has already happened we rely on the ordinary
2286 * interrupt processing to process it.
2287 * XXX This is most probably wrong.
2290 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2292 #define exfer EXFER(xfer)
2293 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2294 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2295 ehci_soft_qh_t *sqh = epipe->sqh;
2296 ehci_soft_qtd_t *sqtd;
2297 ehci_physaddr_t cur;
2302 DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
2305 /* If we're dying, just do the software part. */
2307 xfer->status = status; /* make software ignore it */
2308 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2309 usb_transfer_complete(xfer);
2314 if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
2315 panic("ehci_abort_xfer: not in process context");
2318 * Step 1: Make interrupt routine and hardware ignore xfer.
2321 xfer->status = status; /* make software ignore it */
2322 usb_uncallout(xfer->timeout_handle, ehci_timeout, xfer);
2323 qhstatus = sqh->qh.qh_qtd.qtd_status;
2324 sqh->qh.qh_qtd.qtd_status = qhstatus | htole32(EHCI_QTD_HALTED);
2325 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2326 sqtd->qtd.qtd_status |= htole32(EHCI_QTD_HALTED);
2327 if (sqtd == exfer->sqtdend)
2333 * Step 2: Wait until we know hardware has finished any possible
2334 * use of the xfer. Also make sure the soft interrupt routine
2339 #ifdef USB_USE_SOFTINTR
2340 sc->sc_softwake = 1;
2341 #endif /* USB_USE_SOFTINTR */
2342 usb_schedsoftintr(&sc->sc_bus);
2343 #ifdef USB_USE_SOFTINTR
2344 tsleep(&sc->sc_softwake, 0, "ehciab", 0);
2345 #endif /* USB_USE_SOFTINTR */
2349 * Step 3: Remove any vestiges of the xfer from the hardware.
2350 * The complication here is that the hardware may have executed
2351 * beyond the xfer we're trying to abort. So as we're scanning
2352 * the TDs of this xfer we check if the hardware points to
2355 s = splusb(); /* XXX why? */
2356 cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
2358 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2359 hit |= cur == sqtd->physaddr;
2360 if (sqtd == exfer->sqtdend)
2363 sqtd = sqtd->nextqtd;
2364 /* Zap curqtd register if hardware pointed inside the xfer. */
2365 if (hit && sqtd != NULL) {
2366 DPRINTFN(1,("ehci_abort_xfer: cur=0x%08x\n", sqtd->physaddr));
2367 sqh->qh.qh_curqtd = htole32(sqtd->physaddr); /* unlink qTDs */
2368 sqh->qh.qh_qtd.qtd_status = qhstatus;
2370 DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
2374 * Step 4: Execute callback.
2379 usb_transfer_complete(xfer);
2386 ehci_timeout(void *addr)
2388 struct ehci_xfer *exfer = addr;
2389 struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
2390 ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2392 DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
2395 usbd_dump_pipe(exfer->xfer.pipe);
2399 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
2403 /* Execute the abort in a process context. */
2404 usb_init_task(&exfer->abort_task, ehci_timeout_task, addr);
2405 usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task);
2409 ehci_timeout_task(void *addr)
2411 usbd_xfer_handle xfer = addr;
2414 DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2417 ehci_abort_xfer(xfer, USBD_TIMEOUT);
2421 /************************/
2424 ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2428 /* Insert last in queue. */
2429 err = usb_insert_transfer(xfer);
2433 /* Pipe isn't running, start first */
2434 return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2438 ehci_device_ctrl_start(usbd_xfer_handle xfer)
2440 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2444 return (USBD_IOERROR);
2447 if (!(xfer->rqflags & URQ_REQUEST)) {
2449 printf("ehci_device_ctrl_transfer: not a request\n");
2450 return (USBD_INVAL);
2454 err = ehci_device_request(xfer);
2458 if (sc->sc_bus.use_polling)
2459 ehci_waitintr(sc, xfer);
2460 return (USBD_IN_PROGRESS);
2464 ehci_device_ctrl_done(usbd_xfer_handle xfer)
2466 struct ehci_xfer *ex = EXFER(xfer);
2467 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2468 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2470 DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2473 if (!(xfer->rqflags & URQ_REQUEST)) {
2474 panic("ehci_ctrl_done: not a request");
2478 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
2479 ehci_del_intr_list(ex); /* remove from active list */
2480 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2483 DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
2486 /* Abort a device control request. */
2488 ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2490 DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2491 ehci_abort_xfer(xfer, USBD_CANCELLED);
2494 /* Close a device control pipe. */
2496 ehci_device_ctrl_close(usbd_pipe_handle pipe)
2498 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2499 /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2501 DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
2502 ehci_close_pipe(pipe, sc->sc_async_head);
2506 ehci_device_request(usbd_xfer_handle xfer)
2508 #define exfer EXFER(xfer)
2509 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2510 usb_device_request_t *req = &xfer->request;
2511 usbd_device_handle dev = epipe->pipe.device;
2512 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2513 int addr = dev->address;
2514 ehci_soft_qtd_t *setup, *stat, *next;
2515 ehci_soft_qh_t *sqh;
2521 isread = req->bmRequestType & UT_READ;
2522 len = UGETW(req->wLength);
2524 DPRINTFN(3,("ehci_device_control type=0x%02x, request=0x%02x, "
2525 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2526 req->bmRequestType, req->bRequest, UGETW(req->wValue),
2527 UGETW(req->wIndex), len, addr,
2528 epipe->pipe.endpoint->edesc->bEndpointAddress));
2530 setup = ehci_alloc_sqtd(sc);
2531 if (setup == NULL) {
2535 stat = ehci_alloc_sqtd(sc);
2542 epipe->u.ctl.length = len;
2545 * Since we're messing with the QH we must know the HC is in sync.
2546 * This needs to go away since it slows down control transfers.
2547 * Removing it entails:
2548 * - fill the QH only once with addr & wMaxPacketSize
2549 * - put the correct data toggles in the qtds and set DTC
2551 /* ehci_sync_hc(sc); */
2552 /* Update device address and length since they may have changed. */
2553 /* XXX This only needs to be done once, but it's too early in open. */
2554 /* XXXX Should not touch ED here! */
2556 (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QG_MPLMASK))) |
2558 EHCI_QH_SET_ADDR(addr) |
2560 EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
2563 sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE);
2565 /* Set up data transaction */
2567 ehci_soft_qtd_t *end;
2569 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
2573 end->nextqtd = stat;
2575 end->qtd.qtd_altnext = htole32(stat->physaddr);
2576 /* Start toggle at 1. */
2577 /*next->qtd.td_flags |= htole32(EHCI_QTD_TOGGLE);*/
2582 memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
2584 setup->qtd.qtd_status = htole32(
2586 EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2587 EHCI_QTD_SET_CERR(3) |
2588 EHCI_QTD_SET_BYTES(sizeof *req)
2590 setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
2591 setup->nextqtd = next;
2592 setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
2594 setup->len = sizeof *req;
2596 stat->qtd.qtd_status = htole32(
2598 EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2599 EHCI_QTD_SET_CERR(3) |
2602 stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
2603 stat->nextqtd = NULL;
2604 stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
2609 if (ehcidebug > 5) {
2610 DPRINTF(("ehci_device_request:\n"));
2612 ehci_dump_sqtds(setup);
2616 exfer->sqtdstart = setup;
2617 exfer->sqtdend = stat;
2619 if (!exfer->isdone) {
2620 printf("ehci_device_request: not done, exfer=%p\n", exfer);
2625 /* Insert qTD in QH list. */
2627 ehci_set_qh_qtd(sqh, setup);
2628 if (xfer->timeout && !sc->sc_bus.use_polling) {
2629 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2630 ehci_timeout, xfer);
2632 ehci_add_intr_list(sc, exfer);
2633 xfer->status = USBD_IN_PROGRESS;
2637 if (ehcidebug > 10) {
2638 DPRINTF(("ehci_device_request: status=%x\n",
2639 EOREAD4(sc, EHCI_USBSTS)));
2642 ehci_dump_sqh(sc->sc_async_head);
2644 ehci_dump_sqtds(setup);
2648 return (USBD_NORMAL_COMPLETION);
2651 ehci_free_sqtd(sc, stat);
2653 ehci_free_sqtd(sc, setup);
2655 DPRINTFN(-1,("ehci_device_request: no memory\n"));
2657 usb_transfer_complete(xfer);
2662 /************************/
2665 ehci_device_bulk_transfer(usbd_xfer_handle xfer)
2669 /* Insert last in queue. */
2670 err = usb_insert_transfer(xfer);
2674 /* Pipe isn't running, start first */
2675 return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2679 ehci_device_bulk_start(usbd_xfer_handle xfer)
2681 #define exfer EXFER(xfer)
2682 struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2683 usbd_device_handle dev = epipe->pipe.device;
2684 ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2685 ehci_soft_qtd_t *data, *dataend;
2686 ehci_soft_qh_t *sqh;
2688 int len, isread, endpt;
2691 DPRINTFN(2, ("ehci_device_bulk_transfer: xfer=%p len=%d flags=%d\n",
2692 xfer, xfer->length, xfer->flags));
2695 return (USBD_IOERROR);
2698 if (xfer->rqflags & URQ_REQUEST)
2699 panic("ehci_device_bulk_transfer: a request");
2703 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2704 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2707 epipe->u.bulk.length = len;
2709 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
2712 DPRINTFN(-1,("ehci_device_bulk_transfer: no memory\n"));
2714 usb_transfer_complete(xfer);
2719 if (ehcidebug > 5) {
2720 DPRINTF(("ehci_device_bulk_transfer: data(1)\n"));
2722 ehci_dump_sqtds(data);
2726 /* Set up interrupt info. */
2727 exfer->sqtdstart = data;
2728 exfer->sqtdend = dataend;
2730 if (!exfer->isdone) {
2731 printf("ehci_device_bulk_transfer: not done, ex=%p\n", exfer);
2737 ehci_set_qh_qtd(sqh, data);
2738 if (xfer->timeout && !sc->sc_bus.use_polling) {
2739 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2740 ehci_timeout, xfer);
2742 ehci_add_intr_list(sc, exfer);
2743 xfer->status = USBD_IN_PROGRESS;
2747 if (ehcidebug > 10) {
2748 DPRINTF(("ehci_device_bulk_transfer: data(2)\n"));
2750 DPRINTF(("ehci_device_bulk_transfer: data(3)\n"));
2753 printf("async_head:\n");
2754 ehci_dump_sqh(sc->sc_async_head);
2758 ehci_dump_sqtds(data);
2762 if (sc->sc_bus.use_polling)
2763 ehci_waitintr(sc, xfer);
2765 return (USBD_IN_PROGRESS);
2770 ehci_device_bulk_abort(usbd_xfer_handle xfer)
2772 DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
2773 ehci_abort_xfer(xfer, USBD_CANCELLED);
2777 * Close a device bulk pipe.
2780 ehci_device_bulk_close(usbd_pipe_handle pipe)
2782 ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2784 DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
2785 ehci_close_pipe(pipe, sc->sc_async_head);
2789 ehci_device_bulk_done(usbd_xfer_handle xfer)
2791 struct ehci_xfer *ex = EXFER(xfer);
2792 ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2793 /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2795 DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
2796 xfer, xfer->actlen));
2798 if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
2799 ehci_del_intr_list(ex); /* remove from active list */
2800 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2803 DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
2806 /************************/
2808 Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2809 Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2810 Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { }
2811 Static void ehci_device_intr_close(usbd_pipe_handle pipe) { }
2812 Static void ehci_device_intr_done(usbd_xfer_handle xfer) { }
2814 /************************/
2816 Static usbd_status ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2817 Static usbd_status ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
2818 Static void ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
2819 Static void ehci_device_isoc_close(usbd_pipe_handle pipe) { }
2820 Static void ehci_device_isoc_done(usbd_xfer_handle xfer) { }