sys/dev/pccard/pccbb/pccbb.c

   1 /*
   2  * Copyright (c) 2002 M. Warner Losh.
   3  * Copyright (c) 2000,2001 Jonathan Chen.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions, and the following disclaimer,
  11  *    without modification, immediately at the beginning of the file.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in
  14  *    the documentation and/or other materials provided with the
  15  *    distribution.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  20  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  21  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  27  * SUCH DAMAGE.
  28  *
  29  * $FreeBSD: src/sys/dev/pccbb/pccbb.c,v 1.64 2002/11/23 23:09:45 imp Exp $
  30  * $DragonFly: src/sys/dev/pccard/pccbb/pccbb.c,v 1.2 2004/03/01 06:33:14 dillon Exp $
  31  */
  32
  33 /*
  34  * Copyright (c) 1998, 1999 and 2000
  35  *      HAYAKAWA Koichi.  All rights reserved.
  36  *
  37  * Redistribution and use in source and binary forms, with or without
  38  * modification, are permitted provided that the following conditions
  39  * are met:
  40  * 1. Redistributions of source code must retain the above copyright
  41  *    notice, this list of conditions and the following disclaimer.
  42  * 2. Redistributions in binary form must reproduce the above copyright
  43  *    notice, this list of conditions and the following disclaimer in the
  44  *    documentation and/or other materials provided with the distribution.
  45  * 3. All advertising materials mentioning features or use of this software
  46  *    must display the following acknowledgement:
  47  *      This product includes software developed by HAYAKAWA Koichi.
  48  * 4. The name of the author may not be used to endorse or promote products
  49  *    derived from this software without specific prior written permission.
  50  *
  51  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  52  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  53  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  54  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  55  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  56  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  60  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61  */
  62
  63 /*
  64  * Driver for PCI to CardBus Bridge chips
  65  *
  66  * References:
  67  *  TI Datasheets:
  68  *   http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS
  69  *
  70  * Written by Jonathan Chen <jon@freebsd.org>
  71  * The author would like to acknowledge:
  72  *  * HAYAKAWA Koichi: Author of the NetBSD code for the same thing
  73  *  * Warner Losh: Newbus/newcard guru and author of the pccard side of things
  74  *  * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver
  75  *  * David Cross: Author of the initial ugly hack for a specific cardbus card
  76  */
  77
  78 #include <sys/param.h>
  79 #include <sys/systm.h>
  80 #include <sys/proc.h>
  81 #include <sys/errno.h>
  82 #include <sys/kernel.h>
  83 #include <sys/lock.h>
  84 #include <sys/malloc.h>
  85 #include <sys/sysctl.h>
  86 #include <sys/kthread.h>
  87 #include <sys/bus.h>
  88 #include <machine/bus.h>
  89 #include <sys/rman.h>
  90 #include <machine/resource.h>
  91
  92 #include <bus/pci/pcireg.h>
  93 #include <bus/pci/pcivar.h>
  94 #include <machine/clock.h>
  95
  96 #include <bus/pccard/pccardreg.h>
  97 #include <bus/pccard/pccardvar.h>
  98
  99 #include <dev/pccard/exca/excareg.h>
 100 #include <dev/pccard/exca/excavar.h>
 101
 102 #include <dev/pccard/pccbb/pccbbreg.h>
 103 #include <dev/pccard/pccbb/pccbbvar.h>
 104
 105 #include "power_if.h"
 106 #include "card_if.h"
 107 #include "pcib_if.h"
 108
 109 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0)
 110 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0)
 111
 112 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE)                              \
 113         pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE)
 114 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE)                      \
 115         pci_write_config(DEV, REG, (                                    \
 116                 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE)
 117
 118 #define CBB_START_MEM   0x88000000
 119 #define CBB_START_32_IO 0x1000
 120 #define CBB_START_16_IO 0x100
 121
 122 struct yenta_chipinfo {
 123         uint32_t yc_id;
 124         const   char *yc_name;
 125         int     yc_chiptype;
 126 } yc_chipsets[] = {
 127         /* Texas Instruments chips */
 128         {PCIC_ID_TI1031, "TI1031 PCI-PC Card Bridge", CB_TI113X},
 129         {PCIC_ID_TI1130, "TI1130 PCI-CardBus Bridge", CB_TI113X},
 130         {PCIC_ID_TI1131, "TI1131 PCI-CardBus Bridge", CB_TI113X},
 131
 132         {PCIC_ID_TI1210, "TI1210 PCI-CardBus Bridge", CB_TI12XX},
 133         {PCIC_ID_TI1211, "TI1211 PCI-CardBus Bridge", CB_TI12XX},
 134         {PCIC_ID_TI1220, "TI1220 PCI-CardBus Bridge", CB_TI12XX},
 135         {PCIC_ID_TI1221, "TI1221 PCI-CardBus Bridge", CB_TI12XX},
 136         {PCIC_ID_TI1225, "TI1225 PCI-CardBus Bridge", CB_TI12XX},
 137         {PCIC_ID_TI1250, "TI1250 PCI-CardBus Bridge", CB_TI125X},
 138         {PCIC_ID_TI1251, "TI1251 PCI-CardBus Bridge", CB_TI125X},
 139         {PCIC_ID_TI1251B,"TI1251B PCI-CardBus Bridge",CB_TI125X},
 140         {PCIC_ID_TI1260, "TI1260 PCI-CardBus Bridge", CB_TI12XX},
 141         {PCIC_ID_TI1260B,"TI1260B PCI-CardBus Bridge",CB_TI12XX},
 142         {PCIC_ID_TI1410, "TI1410 PCI-CardBus Bridge", CB_TI12XX},
 143         {PCIC_ID_TI1420, "TI1420 PCI-CardBus Bridge", CB_TI12XX},
 144         {PCIC_ID_TI1421, "TI1421 PCI-CardBus Bridge", CB_TI12XX},
 145         {PCIC_ID_TI1450, "TI1450 PCI-CardBus Bridge", CB_TI125X}, /*SIC!*/
 146         {PCIC_ID_TI1451, "TI1451 PCI-CardBus Bridge", CB_TI12XX},
 147         {PCIC_ID_TI1510, "TI1510 PCI-CardBus Bridge", CB_TI12XX},
 148         {PCIC_ID_TI1520, "TI1520 PCI-CardBus Bridge", CB_TI12XX},
 149         {PCIC_ID_TI4410, "TI4410 PCI-CardBus Bridge", CB_TI12XX},
 150         {PCIC_ID_TI4450, "TI4450 PCI-CardBus Bridge", CB_TI12XX},
 151         {PCIC_ID_TI4451, "TI4451 PCI-CardBus Bridge", CB_TI12XX},
 152         {PCIC_ID_TI4510, "TI4510 PCI-CardBus Bridge", CB_TI12XX},
 153
 154         /* Ricoh chips */
 155         {PCIC_ID_RICOH_RL5C465, "RF5C465 PCI-CardBus Bridge", CB_RF5C46X},
 156         {PCIC_ID_RICOH_RL5C466, "RF5C466 PCI-CardBus Bridge", CB_RF5C46X},
 157         {PCIC_ID_RICOH_RL5C475, "RF5C475 PCI-CardBus Bridge", CB_RF5C47X},
 158         {PCIC_ID_RICOH_RL5C476, "RF5C476 PCI-CardBus Bridge", CB_RF5C47X},
 159         {PCIC_ID_RICOH_RL5C477, "RF5C477 PCI-CardBus Bridge", CB_RF5C47X},
 160         {PCIC_ID_RICOH_RL5C478, "RF5C478 PCI-CardBus Bridge", CB_RF5C47X},
 161
 162         /* Toshiba products */
 163         {PCIC_ID_TOPIC95, "ToPIC95 PCI-CardBus Bridge", CB_TOPIC95},
 164         {PCIC_ID_TOPIC95B, "ToPIC95B PCI-CardBus Bridge", CB_TOPIC95},
 165         {PCIC_ID_TOPIC97, "ToPIC97 PCI-CardBus Bridge", CB_TOPIC97},
 166         {PCIC_ID_TOPIC100, "ToPIC100 PCI-CardBus Bridge", CB_TOPIC97},
 167
 168         /* Cirrus Logic */
 169         {PCIC_ID_CLPD6832, "CLPD6832 PCI-CardBus Bridge", CB_CIRRUS},
 170         {PCIC_ID_CLPD6833, "CLPD6833 PCI-CardBus Bridge", CB_CIRRUS},
 171         {PCIC_ID_CLPD6834, "CLPD6834 PCI-CardBus Bridge", CB_CIRRUS},
 172
 173         /* 02Micro */
 174         {PCIC_ID_OZ6832, "O2Micro OZ6832/6833 PCI-CardBus Bridge", CB_CIRRUS},
 175         {PCIC_ID_OZ6860, "O2Micro OZ6836/6860 PCI-CardBus Bridge", CB_CIRRUS},
 176         {PCIC_ID_OZ6872, "O2Micro OZ6812/6872 PCI-CardBus Bridge", CB_CIRRUS},
 177         {PCIC_ID_OZ6912, "O2Micro OZ6912/6972 PCI-CardBus Bridge", CB_CIRRUS},
 178         {PCIC_ID_OZ6922, "O2Micro OZ6822 PCI-CardBus Bridge", CB_CIRRUS},
 179         {PCIC_ID_OZ6933, "O2Micro OZ6833 PCI-CardBus Bridge", CB_CIRRUS},
 180
 181         /* sentinel */
 182         {0 /* null id */, "unknown", CB_UNKNOWN},
 183 };
 184
 185 /* sysctl vars */
 186 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters");
 187
 188 /* There's no way to say TUNEABLE_LONG to get the right types */
 189 u_long cbb_start_mem = CBB_START_MEM;
 190 TUNABLE_INT("hw.cbb.start_memory", (int *)&cbb_start_mem);
 191 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW,
 192     &cbb_start_mem, CBB_START_MEM,
 193     "Starting address for memory allocations");
 194
 195 u_long cbb_start_16_io = CBB_START_16_IO;
 196 TUNABLE_INT("hw.cbb.start_16_io", (int *)&cbb_start_16_io);
 197 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW,
 198     &cbb_start_16_io, CBB_START_16_IO,
 199     "Starting ioport for 16-bit cards");
 200
 201 u_long cbb_start_32_io = CBB_START_32_IO;
 202 TUNABLE_INT("hw.cbb.start_32_io", (int *)&cbb_start_32_io);
 203 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW,
 204     &cbb_start_32_io, CBB_START_32_IO,
 205     "Starting ioport for 32-bit cards");
 206
 207 int cbb_debug = 0;
 208 TUNABLE_INT("hw.cbb.debug", &cbb_debug);
 209 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0,
 210     "Verbose cardbus bridge debugging");
 211
 212 static int      cbb_chipset(uint32_t pci_id, const char **namep);
 213 static int      cbb_probe(device_t brdev);
 214 static void     cbb_chipinit(struct cbb_softc *sc);
 215 static int      cbb_attach(device_t brdev);
 216 static int      cbb_detach(device_t brdev);
 217 static int      cbb_shutdown(device_t brdev);
 218 static void     cbb_driver_added(device_t brdev, driver_t *driver);
 219 static void     cbb_child_detached(device_t brdev, device_t child);
 220 static void     cbb_event_thread(void *arg);
 221 static void     cbb_insert(struct cbb_softc *sc);
 222 static void     cbb_removal(struct cbb_softc *sc);
 223 static void     cbb_intr(void *arg);
 224 static int      cbb_detect_voltage(device_t brdev);
 225 static int      cbb_power(device_t brdev, int volts);
 226 static void     cbb_cardbus_reset(device_t brdev);
 227 static int      cbb_cardbus_power_enable_socket(device_t brdev,
 228                     device_t child);
 229 static void     cbb_cardbus_power_disable_socket(device_t brdev,
 230                     device_t child);
 231 static int      cbb_cardbus_io_open(device_t brdev, int win, uint32_t start,
 232                     uint32_t end);
 233 static int      cbb_cardbus_mem_open(device_t brdev, int win,
 234                     uint32_t start, uint32_t end);
 235 static void     cbb_cardbus_auto_open(struct cbb_softc *sc, int type);
 236 static int      cbb_cardbus_activate_resource(device_t brdev, device_t child,
 237                     int type, int rid, struct resource *res);
 238 static int      cbb_cardbus_deactivate_resource(device_t brdev,
 239                     device_t child, int type, int rid, struct resource *res);
 240 static struct resource  *cbb_cardbus_alloc_resource(device_t brdev,
 241                     device_t child, int type, int *rid, u_long start,
 242                     u_long end, u_long count, uint flags);
 243 static int      cbb_cardbus_release_resource(device_t brdev, device_t child,
 244                     int type, int rid, struct resource *res);
 245 static int      cbb_power_enable_socket(device_t brdev, device_t child);
 246 static void     cbb_power_disable_socket(device_t brdev, device_t child);
 247 static int      cbb_activate_resource(device_t brdev, device_t child,
 248                     int type, int rid, struct resource *r);
 249 static int      cbb_deactivate_resource(device_t brdev, device_t child,
 250                     int type, int rid, struct resource *r);
 251 static struct resource  *cbb_alloc_resource(device_t brdev, device_t child,
 252                     int type, int *rid, u_long start, u_long end, u_long count,
 253                     uint flags);
 254 static int      cbb_release_resource(device_t brdev, device_t child,
 255                     int type, int rid, struct resource *r);
 256 static int      cbb_read_ivar(device_t brdev, device_t child, int which,
 257                     uintptr_t *result);
 258 static int      cbb_write_ivar(device_t brdev, device_t child, int which,
 259                     uintptr_t value);
 260 static int      cbb_maxslots(device_t brdev);
 261 static uint32_t cbb_read_config(device_t brdev, int b, int s, int f,
 262                     int reg, int width);
 263 static void     cbb_write_config(device_t brdev, int b, int s, int f,
 264                     int reg, uint32_t val, int width);
 265
 266 /*
 267  */
 268 static __inline void
 269 cbb_set(struct cbb_softc *sc, uint32_t reg, uint32_t val)
 270 {
 271         bus_space_write_4(sc->bst, sc->bsh, reg, val);
 272 }
 273
 274 static __inline uint32_t
 275 cbb_get(struct cbb_softc *sc, uint32_t reg)
 276 {
 277         return (bus_space_read_4(sc->bst, sc->bsh, reg));
 278 }
 279
 280 static __inline void
 281 cbb_setb(struct cbb_softc *sc, uint32_t reg, uint32_t bits)
 282 {
 283         cbb_set(sc, reg, cbb_get(sc, reg) | bits);
 284 }
 285
 286 static __inline void
 287 cbb_clrb(struct cbb_softc *sc, uint32_t reg, uint32_t bits)
 288 {
 289         cbb_set(sc, reg, cbb_get(sc, reg) & ~bits);
 290 }
 291
 292 static void
 293 cbb_remove_res(struct cbb_softc *sc, struct resource *res)
 294 {
 295         struct cbb_reslist *rle;
 296
 297         SLIST_FOREACH(rle, &sc->rl, link) {
 298                 if (rle->res == res) {
 299                         SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link);
 300                         free(rle, M_DEVBUF);
 301                         return;
 302                 }
 303         }
 304 }
 305
 306 static struct resource *
 307 cbb_find_res(struct cbb_softc *sc, int type, int rid)
 308 {
 309         struct cbb_reslist *rle;
 310
 311         SLIST_FOREACH(rle, &sc->rl, link)
 312                 if (SYS_RES_MEMORY == rle->type && rid == rle->rid)
 313                         return (rle->res);
 314         return (NULL);
 315 }
 316
 317 static void
 318 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type,
 319     int rid)
 320 {
 321         struct cbb_reslist *rle;
 322
 323         /*
 324          * Need to record allocated resource so we can iterate through
 325          * it later.
 326          */
 327         rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT);
 328         if (!res)
 329                 panic("cbb_cardbus_alloc_resource: can't record entry!");
 330         rle->res = res;
 331         rle->type = type;
 332         rle->rid = rid;
 333         SLIST_INSERT_HEAD(&sc->rl, rle, link);
 334 }
 335
 336 static void
 337 cbb_destroy_res(struct cbb_softc *sc)
 338 {
 339         struct cbb_reslist *rle;
 340
 341         while ((rle = SLIST_FIRST(&sc->rl)) != NULL) {
 342                 device_printf(sc->dev, "Danger Will Robinson: Resource "
 343                     "left allocated!  This is a bug... "
 344                     "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type,
 345                     rman_get_start(rle->res));
 346                 SLIST_REMOVE_HEAD(&sc->rl, link);
 347                 free(rle, M_DEVBUF);
 348         }
 349 }
 350
 351 /************************************************************************/
 352 /* Probe/Attach                                                         */
 353 /************************************************************************/
 354
 355 static int
 356 cbb_chipset(uint32_t pci_id, const char **namep)
 357 {
 358         struct yenta_chipinfo *ycp;
 359
 360         for (ycp = yc_chipsets; ycp->yc_id != 0 && pci_id != ycp->yc_id; ++ycp)
 361             continue;
 362         if (namep != NULL)
 363                 *namep = ycp->yc_name;
 364         return (ycp->yc_chiptype);
 365 }
 366
 367 static int
 368 cbb_probe(device_t brdev)
 369 {
 370         const char *name;
 371         uint32_t progif;
 372         uint32_t subclass;
 373
 374         /*
 375          * Do we know that we support the chipset?  If so, then we
 376          * accept the device.
 377          */
 378         if (cbb_chipset(pci_get_devid(brdev), &name) != CB_UNKNOWN) {
 379                 device_set_desc(brdev, name);
 380                 return (0);
 381         }
 382
 383         /*
 384          * We do support generic CardBus bridges.  All that we've seen
 385          * to date have progif 0 (the Yenta spec, and successors mandate
 386          * this).  We do not support PCI PCMCIA bridges (with one exception)
 387          * with this driver since they generally are I/O mapped.  Those
 388          * are supported by the pcic driver.  This should help us be more
 389          * future proof.
 390          */
 391         subclass = pci_get_subclass(brdev);
 392         progif = pci_get_progif(brdev);
 393         if (subclass == PCIS_BRIDGE_CARDBUS && progif == 0) {
 394                 device_set_desc(brdev, "PCI-CardBus Bridge");
 395                 return (0);
 396         }
 397         return (ENXIO);
 398 }
 399
 400
 401 static void
 402 cbb_chipinit(struct cbb_softc *sc)
 403 {
 404         uint32_t mux, sysctrl;
 405
 406         /* Set CardBus latency timer */
 407         if (pci_read_config(sc->dev, PCIR_SECLAT_1, 1) < 0x20)
 408                 pci_write_config(sc->dev, PCIR_SECLAT_1, 0x20, 1);
 409
 410         /* Set PCI latency timer */
 411         if (pci_read_config(sc->dev, PCIR_LATTIMER, 1) < 0x20)
 412                 pci_write_config(sc->dev, PCIR_LATTIMER, 0x20, 1);
 413
 414         /* Enable memory access */
 415         PCI_MASK_CONFIG(sc->dev, PCIR_COMMAND,
 416             | PCIM_CMD_MEMEN
 417             | PCIM_CMD_PORTEN
 418             | PCIM_CMD_BUSMASTEREN, 2);
 419
 420         /* disable Legacy IO */
 421         switch (sc->chipset) {
 422         case CB_RF5C46X:
 423                 PCI_MASK_CONFIG(sc->dev, CBBR_BRIDGECTRL,
 424                     & ~(CBBM_BRIDGECTRL_RL_3E0_EN |
 425                     CBBM_BRIDGECTRL_RL_3E2_EN), 2);
 426                 break;
 427         default:
 428                 pci_write_config(sc->dev, CBBR_LEGACY, 0x0, 4);
 429                 break;
 430         }
 431
 432         /* Use PCI interrupt for interrupt routing */
 433         PCI_MASK2_CONFIG(sc->dev, CBBR_BRIDGECTRL,
 434             & ~(CBBM_BRIDGECTRL_MASTER_ABORT |
 435             CBBM_BRIDGECTRL_INTR_IREQ_EN),
 436             | CBBM_BRIDGECTRL_WRITE_POST_EN,
 437             2);
 438
 439         /*
 440          * XXX this should be a function table, ala OLDCARD.  This means
 441          * that we could more easily support ISA interrupts for pccard
 442          * cards if we had to.
 443          */
 444         switch (sc->chipset) {
 445         case CB_TI113X:
 446                 /*
 447                  * The TI 1031, TI 1130 and TI 1131 all require another bit
 448                  * be set to enable PCI routing of interrupts, and then
 449                  * a bit for each of the CSC and Function interrupts we
 450                  * want routed.
 451                  */
 452                 PCI_MASK_CONFIG(sc->dev, CBBR_CBCTRL,
 453                     | CBBM_CBCTRL_113X_PCI_INTR |
 454                     CBBM_CBCTRL_113X_PCI_CSC | CBBM_CBCTRL_113X_PCI_IRQ_EN,
 455                     1);
 456                 PCI_MASK_CONFIG(sc->dev, CBBR_DEVCTRL,
 457                     & ~(CBBM_DEVCTRL_INT_SERIAL |
 458                     CBBM_DEVCTRL_INT_PCI), 1);
 459                 break;
 460         case CB_TI12XX:
 461                 /*
 462                  * Some TI 12xx (and [14][45]xx) based pci cards
 463                  * sometimes have issues with the MFUNC register not
 464                  * being initialized due to a bad EEPROM on board.
 465                  * Laptops that this matters on have this register
 466                  * properly initialized.
 467                  *
 468                  * The TI125X parts have a different register.
 469                  */
 470                 mux = pci_read_config(sc->dev, CBBR_MFUNC, 4);
 471                 sysctrl = pci_read_config(sc->dev, CBBR_SYSCTRL, 4);
 472                 if (mux == 0) {
 473                         mux = (mux & ~CBBM_MFUNC_PIN0) |
 474                             CBBM_MFUNC_PIN0_INTA;
 475                         if ((sysctrl & CBBM_SYSCTRL_INTRTIE) == 0)
 476                                 mux = (mux & ~CBBM_MFUNC_PIN1) |
 477                                     CBBM_MFUNC_PIN1_INTB;
 478                         pci_write_config(sc->dev, CBBR_MFUNC, mux, 4);
 479                 }
 480                 /*FALLTHROUGH*/
 481         case CB_TI125X:
 482                 /*
 483                  * Disable zoom video.  Some machines initialize this
 484                  * improperly and exerpience has shown that this helps
 485                  * on some machines.
 486                  */
 487                 pci_write_config(sc->dev, CBBR_MMCTRL, 0, 4);
 488                 break;
 489         case CB_TOPIC97:
 490                 /*
 491                  * Disable Zoom Video, ToPIC 97, 100.
 492                  */
 493                 pci_write_config(sc->dev, CBBR_TOPIC_ZV_CONTROL, 0, 1);
 494                 /*
 495                  * ToPIC 97, 100
 496                  * At offset 0xa1: INTERRUPT CONTROL register
 497                  * 0x1: Turn on INT interrupts.
 498                  */
 499                 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_INTCTRL,
 500                     | CBBM_TOPIC_INTCTRL_INTIRQSEL, 1);
 501                 goto topic_common;
 502         case CB_TOPIC95:
 503                 /*
 504                  * SOCKETCTRL appears to be TOPIC 95/B specific
 505                  */
 506                 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_SOCKETCTRL,
 507                     | CBBM_TOPIC_SOCKETCTRL_SCR_IRQSEL, 4);
 508
 509         topic_common:;
 510                 /*
 511                  * At offset 0xa0: SLOT CONTROL
 512                  * 0x80 Enable CardBus Functionality
 513                  * 0x40 Enable CardBus and PC Card registers
 514                  * 0x20 Lock ID in exca regs
 515                  * 0x10 Write protect ID in config regs
 516                  * Clear the rest of the bits, which defaults the slot
 517                  * in legacy mode to 0x3e0 and offset 0. (legacy
 518                  * mode is determined elsewhere)
 519                  */
 520                 pci_write_config(sc->dev, CBBR_TOPIC_SLOTCTRL,
 521                     CBBM_TOPIC_SLOTCTRL_SLOTON |
 522                     CBBM_TOPIC_SLOTCTRL_SLOTEN |
 523                     CBBM_TOPIC_SLOTCTRL_ID_LOCK |
 524                     CBBM_TOPIC_SLOTCTRL_ID_WP, 1);
 525
 526                 /*
 527                  * At offset 0xa3 Card Detect Control Register
 528                  * 0x80 CARDBUS enbale
 529                  * 0x01 Cleared for hardware change detect
 530                  */
 531                 PCI_MASK2_CONFIG(sc->dev, CBBR_TOPIC_CDC,
 532                     | CBBM_TOPIC_CDC_CARDBUS,
 533                     & ~CBBM_TOPIC_CDC_SWDETECT, 4);
 534                 break;
 535         }
 536
 537         /*
 538          * Need to tell ExCA registers to route via PCI interrupts.  There
 539          * are two ways to do this.  Once is to set INTR_ENABLE and the
 540          * other is to set CSC to 0.  Since both methods are mutually
 541          * compatible, we do both.
 542          */
 543         exca_write(&sc->exca, EXCA_INTR, EXCA_INTR_ENABLE);
 544         exca_write(&sc->exca, EXCA_CSC_INTR, 0);
 545
 546         /* close all memory and io windows */
 547         pci_write_config(sc->dev, CBBR_MEMBASE0, 0xffffffff, 4);
 548         pci_write_config(sc->dev, CBBR_MEMLIMIT0, 0, 4);
 549         pci_write_config(sc->dev, CBBR_MEMBASE1, 0xffffffff, 4);
 550         pci_write_config(sc->dev, CBBR_MEMLIMIT1, 0, 4);
 551         pci_write_config(sc->dev, CBBR_IOBASE0, 0xffffffff, 4);
 552         pci_write_config(sc->dev, CBBR_IOLIMIT0, 0, 4);
 553         pci_write_config(sc->dev, CBBR_IOBASE1, 0xffffffff, 4);
 554         pci_write_config(sc->dev, CBBR_IOLIMIT1, 0, 4);
 555 }
 556
 557 static int
 558 cbb_attach(device_t brdev)
 559 {
 560         struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(brdev);
 561         int rid;
 562
 563         lockinit(&sc->lock, 0, "cbb", 0, 0);
 564         sc->chipset = cbb_chipset(pci_get_devid(brdev), NULL);
 565         sc->dev = brdev;
 566         sc->cbdev = NULL;
 567         sc->pccarddev = NULL;
 568         sc->secbus = pci_read_config(brdev, PCIR_SECBUS_2, 1);
 569         sc->subbus = pci_read_config(brdev, PCIR_SUBBUS_2, 1);
 570         SLIST_INIT(&sc->rl);
 571         STAILQ_INIT(&sc->intr_handlers);
 572
 573 #ifndef BURN_THE_BOATS
 574         /*
 575          * The PCI bus code should assign us memory in the absense
 576          * of the BIOS doing so.  However, 'should' isn't 'is,' so we kludge
 577          * up something here until the PCI/acpi code properly assigns the
 578          * resource.
 579          */
 580 #endif
 581         rid = CBBR_SOCKBASE;
 582         sc->base_res = bus_alloc_resource(brdev, SYS_RES_MEMORY, &rid,
 583             0, ~0, 1, RF_ACTIVE);
 584         if (!sc->base_res) {
 585 #ifdef  BURN_THE_BOATS
 586                 device_printf(brdev, "Could not map register memory\n");
 587                 return (ENOMEM);
 588 #else
 589                 uint32_t sockbase;
 590                 /*
 591                  * Generally, the BIOS will assign this memory for us.
 592                  * However, newer BIOSes do not because the MS design
 593                  * documents have mandated that this is for the OS
 594                  * to assign rather than the BIOS.  This driver shouldn't
 595                  * be doing this, but until the pci bus code (or acpi)
 596                  * does this, we allow CardBus bridges to work on more
 597                  * machines.
 598                  */
 599                 sockbase = pci_read_config(brdev, rid, 4);
 600                 if (sockbase < 0x100000 || sockbase >= 0xfffffff0) {
 601                         pci_write_config(brdev, rid, 0xffffffff, 4);
 602                         sockbase = pci_read_config(brdev, rid, 4);
 603                         sockbase = (sockbase & 0xfffffff0) &
 604                             -(sockbase & 0xfffffff0);
 605                         sc->base_res = bus_generic_alloc_resource(
 606                             device_get_parent(brdev), brdev, SYS_RES_MEMORY,
 607                             &rid, cbb_start_mem, ~0, sockbase,
 608                             RF_ACTIVE|rman_make_alignment_flags(sockbase));
 609                         if (!sc->base_res) {
 610                                 device_printf(brdev,
 611                                     "Could not grab register memory\n");
 612                                 return (ENOMEM);
 613                         }
 614                         sc->flags |= CBB_KLUDGE_ALLOC;
 615                         pci_write_config(brdev, CBBR_SOCKBASE,
 616                             rman_get_start(sc->base_res), 4);
 617                         DEVPRINTF((brdev, "PCI Memory allocated: %08lx\n",
 618                             rman_get_start(sc->base_res)));
 619                 } else {
 620                         device_printf(brdev, "Could not map register memory\n");
 621                         goto err;
 622                 }
 623 #endif
 624         }
 625
 626         sc->bst = rman_get_bustag(sc->base_res);
 627         sc->bsh = rman_get_bushandle(sc->base_res);
 628         exca_init(&sc->exca, brdev, sc->bst, sc->bsh, CBB_EXCA_OFFSET);
 629         sc->exca.flags |= EXCA_HAS_MEMREG_WIN;
 630         cbb_chipinit(sc);
 631
 632         /* attach children */
 633         sc->cbdev = device_add_child(brdev, "cardbus", -1);
 634         if (sc->cbdev == NULL)
 635                 DEVPRINTF((brdev, "WARNING: cannot add cardbus bus.\n"));
 636         else if (device_probe_and_attach(sc->cbdev) != 0) {
 637                 DEVPRINTF((brdev, "WARNING: cannot attach cardbus bus!\n"));
 638                 sc->cbdev = NULL;
 639         }
 640
 641         sc->pccarddev = device_add_child(brdev, "pccard", -1);
 642         if (sc->pccarddev == NULL)
 643                 DEVPRINTF((brdev, "WARNING: cannot add pccard bus.\n"));
 644         else if (device_probe_and_attach(sc->pccarddev) != 0) {
 645                 DEVPRINTF((brdev, "WARNING: cannot attach pccard bus.\n"));
 646                 sc->pccarddev = NULL;
 647         }
 648
 649         /* Map and establish the interrupt. */
 650         rid = 0;
 651         sc->irq_res = bus_alloc_resource(brdev, SYS_RES_IRQ, &rid, 0, ~0, 1,
 652             RF_SHAREABLE | RF_ACTIVE);
 653         if (sc->irq_res == NULL) {
 654                 printf("cbb: Unable to map IRQ...\n");
 655                 goto err;
 656                 return (ENOMEM);
 657         }
 658
 659         if (bus_setup_intr(brdev, sc->irq_res, INTR_TYPE_AV, cbb_intr, sc,
 660             &sc->intrhand)) {
 661                 device_printf(brdev, "couldn't establish interrupt");
 662                 goto err;
 663         }
 664
 665         /* reset 16-bit pcmcia bus */
 666         exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
 667
 668         /* turn off power */
 669         cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
 670
 671         /* CSC Interrupt: Card detect interrupt on */
 672         cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
 673
 674         /* reset interrupt */
 675         cbb_set(sc, CBB_SOCKET_EVENT, cbb_get(sc, CBB_SOCKET_EVENT));
 676
 677         /* Start the thread */
 678         if (kthread_create(cbb_event_thread, sc, &sc->event_thread,
 679                 "%s%d", device_get_name(sc->dev), device_get_unit(sc->dev))) {
 680                 device_printf (sc->dev, "unable to create event thread.\n");
 681                 panic ("cbb_create_event_thread");
 682         }
 683
 684         return (0);
 685 err:
 686         if (sc->irq_res)
 687                 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
 688         if (sc->base_res) {
 689                 if (sc->flags & CBB_KLUDGE_ALLOC)
 690                         bus_generic_release_resource(device_get_parent(brdev),
 691                             brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
 692                             sc->base_res);
 693                 else
 694                         bus_release_resource(brdev, SYS_RES_MEMORY,
 695                             CBBR_SOCKBASE, sc->base_res);
 696         }
 697         return (ENOMEM);
 698 }
 699
 700 static int
 701 cbb_detach(device_t brdev)
 702 {
 703         struct cbb_softc *sc = device_get_softc(brdev);
 704         int numdevs;
 705         device_t *devlist;
 706         int tmp;
 707         int error;
 708
 709         device_get_children(brdev, &devlist, &numdevs);
 710
 711         error = 0;
 712         for (tmp = 0; tmp < numdevs; tmp++) {
 713                 if (device_detach(devlist[tmp]) == 0)
 714                         device_delete_child(brdev, devlist[tmp]);
 715                 else
 716                         error++;
 717         }
 718         free(devlist, M_TEMP);
 719         if (error > 0)
 720                 return (ENXIO);
 721
 722         lockmgr(&sc->lock, LK_EXCLUSIVE, NULL, curthread);
 723         bus_teardown_intr(brdev, sc->irq_res, sc->intrhand);
 724         sc->flags |= CBB_KTHREAD_DONE;
 725         if (sc->flags & CBB_KTHREAD_RUNNING) {
 726                 wakeup(sc);
 727                 tsleep(sc, 0, "pccbb", 0);
 728         }
 729         lockmgr(&sc->lock, LK_RELEASE, NULL, curthread);
 730
 731         bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
 732         if (sc->flags & CBB_KLUDGE_ALLOC)
 733                 bus_generic_release_resource(device_get_parent(brdev),
 734                     brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
 735                     sc->base_res);
 736         else
 737                 bus_release_resource(brdev, SYS_RES_MEMORY,
 738                     CBBR_SOCKBASE, sc->base_res);
 739         return (0);
 740 }
 741
 742 static int
 743 cbb_shutdown(device_t brdev)
 744 {
 745         struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(brdev);
 746         /* properly reset everything at shutdown */
 747
 748         PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
 749         exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
 750
 751         cbb_set(sc, CBB_SOCKET_MASK, 0);
 752
 753         cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
 754
 755         exca_write(&sc->exca, EXCA_ADDRWIN_ENABLE, 0);
 756         pci_write_config(brdev, CBBR_MEMBASE0, 0, 4);
 757         pci_write_config(brdev, CBBR_MEMLIMIT0, 0, 4);
 758         pci_write_config(brdev, CBBR_MEMBASE1, 0, 4);
 759         pci_write_config(brdev, CBBR_MEMLIMIT1, 0, 4);
 760         pci_write_config(brdev, CBBR_IOBASE0, 0, 4);
 761         pci_write_config(brdev, CBBR_IOLIMIT0, 0, 4);
 762         pci_write_config(brdev, CBBR_IOBASE1, 0, 4);
 763         pci_write_config(brdev, CBBR_IOLIMIT1, 0, 4);
 764         pci_write_config(brdev, PCIR_COMMAND, 0, 2);
 765         return (0);
 766 }
 767
 768 static int
 769 cbb_setup_intr(device_t dev, device_t child, struct resource *irq,
 770   int flags, driver_intr_t *intr, void *arg, void **cookiep)
 771 {
 772         struct cbb_intrhand *ih;
 773         struct cbb_softc *sc = device_get_softc(dev);
 774
 775         /*
 776          * You aren't allowed to have fast interrupts for pccard/cardbus
 777          * things since those interrupts are PCI and shared.  Since we use
 778          * the PCI interrupt for the status change interrupts, it can't be
 779          * free for use by the driver.  Fast interrupts must not be shared.
 780          */
 781         ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT);
 782         if (ih == NULL)
 783                 return (ENOMEM);
 784         *cookiep = ih;
 785         ih->intr = intr;
 786         ih->arg = arg;
 787         STAILQ_INSERT_TAIL(&sc->intr_handlers, ih, entries);
 788         /*
 789          * XXX we should do what old card does to ensure that we don't
 790          * XXX call the function's interrupt routine(s).
 791          */
 792         /*
 793          * XXX need to turn on ISA interrupts, if we ever support them, but
 794          * XXX for now that's all we need to do.
 795          */
 796         return (0);
 797 }
 798
 799 static int
 800 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq,
 801     void *cookie)
 802 {
 803         struct cbb_intrhand *ih;
 804         struct cbb_softc *sc = device_get_softc(dev);
 805
 806         /* XXX Need to do different things for ISA interrupts. */
 807         ih = (struct cbb_intrhand *) cookie;
 808         STAILQ_REMOVE(&sc->intr_handlers, ih, cbb_intrhand, entries);
 809         free(ih, M_DEVBUF);
 810         return (0);
 811 }
 812
 813
 814 static void
 815 cbb_driver_added(device_t brdev, driver_t *driver)
 816 {
 817         struct cbb_softc *sc = device_get_softc(brdev);
 818         device_t *devlist;
 819         int tmp;
 820         int numdevs;
 821         int wake;
 822         uint32_t sockstate;
 823
 824         DEVICE_IDENTIFY(driver, brdev);
 825         device_get_children(brdev, &devlist, &numdevs);
 826         wake = 0;
 827         sockstate = cbb_get(sc, CBB_SOCKET_STATE);
 828         for (tmp = 0; tmp < numdevs; tmp++) {
 829                 if (device_get_state(devlist[tmp]) == DS_NOTPRESENT &&
 830                     device_probe_and_attach(devlist[tmp]) == 0) {
 831                         if (devlist[tmp] == NULL)
 832                                 /* NOTHING */;
 833                         else if (strcmp(driver->name, "cardbus") == 0) {
 834                                 sc->cbdev = devlist[tmp];
 835                                 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) &&
 836                                     (sockstate & CBB_SOCKET_STAT_CB))
 837                                         wake++;
 838                         } else if (strcmp(driver->name, "pccard") == 0) {
 839                                 sc->pccarddev = devlist[tmp];
 840                                 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) &&
 841                                     (sockstate & CBB_SOCKET_STAT_16BIT))
 842                                         wake++;
 843                         } else
 844                                 device_printf(brdev,
 845                                     "Unsupported child bus: %s\n",
 846                                     driver->name);
 847                 }
 848         }
 849         free(devlist, M_TEMP);
 850
 851         if (wake > 0) {
 852                 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD)
 853                     == 0) {
 854                         wakeup(sc);
 855                 }
 856         }
 857 }
 858
 859 static void
 860 cbb_child_detached(device_t brdev, device_t child)
 861 {
 862         struct cbb_softc *sc = device_get_softc(brdev);
 863
 864         if (child == sc->cbdev)
 865                 sc->cbdev = NULL;
 866         else if (child == sc->pccarddev)
 867                 sc->pccarddev = NULL;
 868         else
 869                 device_printf(brdev, "Unknown child detached: %s %p/%p\n",
 870                     device_get_nameunit(child), sc->cbdev, sc->pccarddev);
 871 }
 872
 873 /************************************************************************/
 874 /* Kthreads                                                             */
 875 /************************************************************************/
 876
 877 static void
 878 cbb_event_thread(void *arg)
 879 {
 880         struct cbb_softc *sc = arg;
 881         uint32_t status;
 882         int err;
 883
 884         /*
 885          * We take out Giant here because we need it deep, down in
 886          * the bowels of the vm system for mapping the memory we need
 887          * to read the CIS.  We also need it for kthread_exit, which
 888          * drops it.
 889          */
 890         sc->flags |= CBB_KTHREAD_RUNNING;
 891         while (1) {
 892                 /*
 893                  * Check to see if we have anything first so that
 894                  * if there's a card already inserted, we do the
 895                  * right thing.
 896                  */
 897                 lockmgr(&sc->lock, LK_EXCLUSIVE, NULL, curthread);
 898                 if (sc->flags & CBB_KTHREAD_DONE)
 899                         break;
 900
 901                 status = cbb_get(sc, CBB_SOCKET_STATE);
 902                 /* mtx_lock(&Giant); */
 903                 if ((status & CBB_SOCKET_STAT_CD) == 0)
 904                         cbb_insert(sc);
 905                 else
 906                         cbb_removal(sc);
 907                 lockmgr(&sc->lock, LK_RELEASE, NULL, curthread);
 908                 /* mtx_unlock(&Giant); */
 909
 910                 /*
 911                  * Wait until it has been 1s since the last time we
 912                  * get an interrupt.  We handle the rest of the interrupt
 913                  * at the top of the loop.
 914                  */
 915                 err = tsleep(sc, 0, "pccbb", 0);
 916                 while (err != EWOULDBLOCK &&
 917                     (sc->flags & CBB_KTHREAD_DONE) == 0)
 918                         err = tsleep(sc, 0, "pccbb", 1 * hz);
 919         }
 920         lockmgr(&sc->lock, LK_RELEASE, NULL, curthread);
 921         sc->flags &= ~CBB_KTHREAD_RUNNING;
 922         /* mtx_lock(&Giant); */
 923         kthread_exit();
 924 }
 925
 926 /************************************************************************/
 927 /* Insert/removal                                                       */
 928 /************************************************************************/
 929
 930 static void
 931 cbb_insert(struct cbb_softc *sc)
 932 {
 933         uint32_t sockevent, sockstate;
 934
 935         sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
 936         sockstate = cbb_get(sc, CBB_SOCKET_STATE);
 937
 938         DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n",
 939             sockevent, sockstate));
 940
 941         if (sockstate & CBB_SOCKET_STAT_16BIT) {
 942                 if (sc->pccarddev != NULL) {
 943                         sc->flags |= CBB_16BIT_CARD;
 944                         sc->flags |= CBB_CARD_OK;
 945                         if (CARD_ATTACH_CARD(sc->pccarddev) != 0) {
 946                                 device_printf(sc->dev,
 947                                     "PC Card card activation failed\n");
 948                                 sc->flags &= ~CBB_CARD_OK;
 949                         }
 950                 } else {
 951                         device_printf(sc->dev,
 952                             "PC Card inserted, but no pccard bus.\n");
 953                 }
 954         } else if (sockstate & CBB_SOCKET_STAT_CB) {
 955                 if (sc->cbdev != NULL) {
 956                         sc->flags &= ~CBB_16BIT_CARD;
 957                         sc->flags |= CBB_CARD_OK;
 958                         if (CARD_ATTACH_CARD(sc->cbdev) != 0) {
 959                                 device_printf(sc->dev,
 960                                     "CardBus card activation failed\n");
 961                                 sc->flags &= ~CBB_CARD_OK;
 962                         }
 963                 } else {
 964                         device_printf(sc->dev,
 965                             "CardBus card inserted, but no cardbus bus.\n");
 966                 }
 967         } else {
 968                 /*
 969                  * We should power the card down, and try again a couple of
 970                  * times if this happens. XXX
 971                  */
 972                 device_printf (sc->dev, "Unsupported card type detected\n");
 973         }
 974 }
 975
 976 static void
 977 cbb_removal(struct cbb_softc *sc)
 978 {
 979         if (sc->flags & CBB_16BIT_CARD) {
 980                 if (sc->pccarddev != NULL)
 981                         CARD_DETACH_CARD(sc->pccarddev);
 982         } else {
 983                 if (sc->cbdev != NULL)
 984                         CARD_DETACH_CARD(sc->cbdev);
 985         }
 986         cbb_destroy_res(sc);
 987 }
 988
 989 /************************************************************************/
 990 /* Interrupt Handler                                                    */
 991 /************************************************************************/
 992
 993 static void
 994 cbb_intr(void *arg)
 995 {
 996         struct cbb_softc *sc = arg;
 997         uint32_t sockevent;
 998         struct cbb_intrhand *ih;
 999
1000         /*
1001          * This ISR needs work XXX
1002          */
1003         sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
1004         if (sockevent) {
1005                 /* ack the interrupt */
1006                 cbb_setb(sc, CBB_SOCKET_EVENT, sockevent);
1007
1008                 /*
1009                  * If anything has happened to the socket, we assume that
1010                  * the card is no longer OK, and we shouldn't call its
1011                  * ISR.  We set CARD_OK as soon as we've attached the
1012                  * card.  This helps in a noisy eject, which happens
1013                  * all too often when users are ejecting their PC Cards.
1014                  *
1015                  * We use this method in preference to checking to see if
1016                  * the card is still there because the check suffers from
1017                  * a race condition in the bouncing case.  Prior versions
1018                  * of the pccard software used a similar trick and achieved
1019                  * excellent results.
1020                  */
1021                 if (sockevent & CBB_SOCKET_EVENT_CD) {
1022                         lockmgr(&sc->lock, LK_EXCLUSIVE, NULL, curthread);
1023                         sc->flags &= ~CBB_CARD_OK;
1024                         lockmgr(&sc->lock, LK_RELEASE, NULL, curthread);
1025                         wakeup(sc);
1026                 }
1027                 if (sockevent & CBB_SOCKET_EVENT_CSTS) {
1028                         DPRINTF((" cstsevent occured: 0x%08x\n",
1029                             cbb_get(sc, CBB_SOCKET_STATE)));
1030                 }
1031                 if (sockevent & CBB_SOCKET_EVENT_POWER) {
1032                         DPRINTF((" pwrevent occured: 0x%08x\n",
1033                             cbb_get(sc, CBB_SOCKET_STATE)));
1034                 }
1035                 /* Other bits? */
1036         }
1037         if (sc->flags & CBB_CARD_OK) {
1038                 STAILQ_FOREACH(ih, &sc->intr_handlers, entries) {
1039                         (*ih->intr)(ih->arg);
1040                 }
1041
1042         }
1043 }
1044
1045 /************************************************************************/
1046 /* Generic Power functions                                              */
1047 /************************************************************************/
1048
1049 static int
1050 cbb_detect_voltage(device_t brdev)
1051 {
1052         struct cbb_softc *sc = device_get_softc(brdev);
1053         uint32_t psr;
1054         int vol = CARD_UKN_CARD;
1055
1056         psr = cbb_get(sc, CBB_SOCKET_STATE);
1057
1058         if (psr & CBB_SOCKET_STAT_5VCARD)
1059                 vol |= CARD_5V_CARD;
1060         if (psr & CBB_SOCKET_STAT_3VCARD)
1061                 vol |= CARD_3V_CARD;
1062         if (psr & CBB_SOCKET_STAT_XVCARD)
1063                 vol |= CARD_XV_CARD;
1064         if (psr & CBB_SOCKET_STAT_YVCARD)
1065                 vol |= CARD_YV_CARD;
1066
1067         return (vol);
1068 }
1069
1070 static int
1071 cbb_power(device_t brdev, int volts)
1072 {
1073         uint32_t status, sock_ctrl;
1074         struct cbb_softc *sc = device_get_softc(brdev);
1075         int timeout;
1076         uint32_t sockevent;
1077
1078         DEVPRINTF((sc->dev, "cbb_power: %s and %s [%x]\n",
1079             (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" :
1080             (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" :
1081             (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" :
1082             (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" :
1083             (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" :
1084             (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" :
1085             "VCC-UNKNOWN",
1086             (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" :
1087             (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V" :
1088             (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC" :
1089             (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" :
1090             "VPP-UNKNOWN",
1091             volts));
1092
1093         status = cbb_get(sc, CBB_SOCKET_STATE);
1094         sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL);
1095
1096         switch (volts & CARD_VCCMASK) {
1097         case CARD_VCC_UC:
1098                 break;
1099         case CARD_VCC_5V:
1100                 if (CBB_SOCKET_STAT_5VCARD & status) { /* check 5 V card */
1101                         sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1102                         sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V;
1103                 } else {
1104                         device_printf(sc->dev,
1105                             "BAD voltage request: no 5 V card\n");
1106                 }
1107                 break;
1108         case CARD_VCC_3V:
1109                 if (CBB_SOCKET_STAT_3VCARD & status) {
1110                         sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1111                         sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V;
1112                 } else {
1113                         device_printf(sc->dev,
1114                             "BAD voltage request: no 3.3 V card\n");
1115                 }
1116                 break;
1117         case CARD_VCC_0V:
1118                 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1119                 break;
1120         default:
1121                 return (0);                     /* power NEVER changed */
1122                 break;
1123         }
1124
1125         switch (volts & CARD_VPPMASK) {
1126         case CARD_VPP_UC:
1127                 break;
1128         case CARD_VPP_0V:
1129                 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1130                 break;
1131         case CARD_VPP_VCC:
1132                 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1133                 sock_ctrl |= ((sock_ctrl >> 4) & 0x07);
1134                 break;
1135         case CARD_VPP_12V:
1136                 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1137                 sock_ctrl |= CBB_SOCKET_CTRL_VPP_12V;
1138                 break;
1139         }
1140
1141         if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl)
1142                 return (1); /* no change necessary */
1143
1144         cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl);
1145         status = cbb_get(sc, CBB_SOCKET_STATE);
1146
1147         /*
1148          * XXX This busy wait is bogus.  We should wait for a power
1149          * interrupt and then whine if the status is bad.  If we're
1150          * worried about the card not coming up, then we should also
1151          * schedule a timeout which we can cacel in the power interrupt.
1152          */
1153         timeout = 20;
1154         do {
1155                 DELAY(20*1000);
1156                 sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
1157         } while (!(sockevent & CBB_SOCKET_EVENT_POWER) && --timeout > 0);
1158         /* reset event status */
1159         /* XXX should only reset EVENT_POWER */
1160         cbb_set(sc, CBB_SOCKET_EVENT, sockevent);
1161         if (timeout < 0) {
1162                 printf ("VCC supply failed.\n");
1163                 return (0);
1164         }
1165
1166         /* XXX
1167          * delay 400 ms: thgough the standard defines that the Vcc set-up time
1168          * is 20 ms, some PC-Card bridge requires longer duration.
1169          * XXX Note: We should check the stutus AFTER the delay to give time
1170          * for things to stabilize.
1171          */
1172         DELAY(400*1000);
1173
1174         if (status & CBB_SOCKET_STAT_BADVCC) {
1175                 device_printf(sc->dev,
1176                     "bad Vcc request. ctrl=0x%x, status=0x%x\n",
1177                     sock_ctrl ,status);
1178                 printf("cbb_power: %s and %s [%x]\n",
1179                     (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" :
1180                     (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" :
1181                     (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" :
1182                     (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" :
1183                     (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" :
1184                     (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" :
1185                     "VCC-UNKNOWN",
1186                     (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" :
1187                     (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V":
1188                     (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC":
1189                     (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" :
1190                     "VPP-UNKNOWN",
1191                     volts);
1192                 return (0);
1193         }
1194         return (1);             /* power changed correctly */
1195 }
1196
1197 /*
1198  * detect the voltage for the card, and set it.  Since the power
1199  * used is the square of the voltage, lower voltages is a big win
1200  * and what Windows does (and what Microsoft prefers).  The MS paper
1201  * also talks about preferring the CIS entry as well.
1202  */
1203 static int
1204 cbb_do_power(device_t brdev)
1205 {
1206         int voltage;
1207
1208         /* Prefer lowest voltage supported */
1209         voltage = cbb_detect_voltage(brdev);
1210         cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1211         if (voltage & CARD_YV_CARD)
1212                 cbb_power(brdev, CARD_VCC_YV | CARD_VPP_VCC);
1213         else if (voltage & CARD_XV_CARD)
1214                 cbb_power(brdev, CARD_VCC_XV | CARD_VPP_VCC);
1215         else if (voltage & CARD_3V_CARD)
1216                 cbb_power(brdev, CARD_VCC_3V | CARD_VPP_VCC);
1217         else if (voltage & CARD_5V_CARD)
1218                 cbb_power(brdev, CARD_VCC_5V | CARD_VPP_VCC);
1219         else {
1220                 device_printf(brdev, "Unknown card voltage\n");
1221                 return (ENXIO);
1222         }
1223         return (0);
1224 }
1225
1226 /************************************************************************/
1227 /* CardBus power functions                                              */
1228 /************************************************************************/
1229
1230 static void
1231 cbb_cardbus_reset(device_t brdev)
1232 {
1233         struct cbb_softc *sc = device_get_softc(brdev);
1234         int delay_us;
1235
1236         delay_us = sc->chipset == CB_RF5C47X ? 400*1000 : 20*1000;
1237
1238         PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
1239
1240         DELAY(delay_us);
1241
1242         /* If a card exists, unreset it! */
1243         if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) == 0) {
1244                 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
1245                     &~CBBM_BRIDGECTRL_RESET, 2);
1246                 DELAY(delay_us);
1247         }
1248 }
1249
1250 static int
1251 cbb_cardbus_power_enable_socket(device_t brdev, device_t child)
1252 {
1253         struct cbb_softc *sc = device_get_softc(brdev);
1254         int err;
1255
1256         if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) ==
1257             CBB_SOCKET_STAT_CD)
1258                 return (ENODEV);
1259
1260         err = cbb_do_power(brdev);
1261         if (err)
1262                 return (err);
1263         cbb_cardbus_reset(brdev);
1264         return (0);
1265 }
1266
1267 static void
1268 cbb_cardbus_power_disable_socket(device_t brdev, device_t child)
1269 {
1270         cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1271         cbb_cardbus_reset(brdev);
1272 }
1273
1274 /************************************************************************/
1275 /* CardBus Resource                                                     */
1276 /************************************************************************/
1277
1278 static int
1279 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end)
1280 {
1281         int basereg;
1282         int limitreg;
1283
1284         if ((win < 0) || (win > 1)) {
1285                 DEVPRINTF((brdev,
1286                     "cbb_cardbus_io_open: window out of range %d\n", win));
1287                 return (EINVAL);
1288         }
1289
1290         basereg = win * 8 + CBBR_IOBASE0;
1291         limitreg = win * 8 + CBBR_IOLIMIT0;
1292
1293         pci_write_config(brdev, basereg, start, 4);
1294         pci_write_config(brdev, limitreg, end, 4);
1295         return (0);
1296 }
1297
1298 static int
1299 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end)
1300 {
1301         int basereg;
1302         int limitreg;
1303
1304         if ((win < 0) || (win > 1)) {
1305                 DEVPRINTF((brdev,
1306                     "cbb_cardbus_mem_open: window out of range %d\n", win));
1307                 return (EINVAL);
1308         }
1309
1310         basereg = win*8 + CBBR_MEMBASE0;
1311         limitreg = win*8 + CBBR_MEMLIMIT0;
1312
1313         pci_write_config(brdev, basereg, start, 4);
1314         pci_write_config(brdev, limitreg, end, 4);
1315         return (0);
1316 }
1317
1318 /*
1319  * XXX The following function belongs in the pci bus layer.
1320  */
1321 static void
1322 cbb_cardbus_auto_open(struct cbb_softc *sc, int type)
1323 {
1324         uint32_t starts[2];
1325         uint32_t ends[2];
1326         struct cbb_reslist *rle;
1327         int align;
1328         int prefetchable[2];
1329         uint32_t reg;
1330
1331         starts[0] = starts[1] = 0xffffffff;
1332         ends[0] = ends[1] = 0;
1333
1334         if (type == SYS_RES_MEMORY)
1335                 align = CBB_MEMALIGN;
1336         else if (type == SYS_RES_IOPORT)
1337                 align = CBB_IOALIGN;
1338         else
1339                 align = 1;
1340
1341         SLIST_FOREACH(rle, &sc->rl, link) {
1342                 if (rle->type != type)
1343                         ;
1344                 else if (rle->res == NULL) {
1345                         device_printf(sc->dev, "WARNING: Resource not reserved?  "
1346                             "(type=%d, addr=%lx)\n",
1347                             rle->type, rman_get_start(rle->res));
1348                 } else if (!(rman_get_flags(rle->res) & RF_ACTIVE)) {
1349                         /* XXX */
1350                 } else if (starts[0] == 0xffffffff) {
1351                         starts[0] = rman_get_start(rle->res);
1352                         ends[0] = rman_get_end(rle->res);
1353                         prefetchable[0] =
1354                             rman_get_flags(rle->res) & RF_PREFETCHABLE;
1355                 } else if (rman_get_end(rle->res) > ends[0] &&
1356                     rman_get_start(rle->res) - ends[0] <
1357                     CBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] ==
1358                     (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1359                         ends[0] = rman_get_end(rle->res);
1360                 } else if (rman_get_start(rle->res) < starts[0] &&
1361                     starts[0] - rman_get_end(rle->res) <
1362                     CBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] ==
1363                     (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1364                         starts[0] = rman_get_start(rle->res);
1365                 } else if (starts[1] == 0xffffffff) {
1366                         starts[1] = rman_get_start(rle->res);
1367                         ends[1] = rman_get_end(rle->res);
1368                         prefetchable[1] =
1369                             rman_get_flags(rle->res) & RF_PREFETCHABLE;
1370                 } else if (rman_get_end(rle->res) > ends[1] &&
1371                     rman_get_start(rle->res) - ends[1] <
1372                     CBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] ==
1373                     (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1374                         ends[1] = rman_get_end(rle->res);
1375                 } else if (rman_get_start(rle->res) < starts[1] &&
1376                     starts[1] - rman_get_end(rle->res) <
1377                     CBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] ==
1378                     (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1379                         starts[1] = rman_get_start(rle->res);
1380                 } else {
1381                         uint32_t diffs[2];
1382                         int win;
1383
1384                         diffs[0] = diffs[1] = 0xffffffff;
1385                         if (rman_get_start(rle->res) > ends[0])
1386                                 diffs[0] = rman_get_start(rle->res) - ends[0];
1387                         else if (rman_get_end(rle->res) < starts[0])
1388                                 diffs[0] = starts[0] - rman_get_end(rle->res);
1389                         if (rman_get_start(rle->res) > ends[1])
1390                                 diffs[1] = rman_get_start(rle->res) - ends[1];
1391                         else if (rman_get_end(rle->res) < starts[1])
1392                                 diffs[1] = starts[1] - rman_get_end(rle->res);
1393
1394                         win = (diffs[0] <= diffs[1])?0:1;
1395                         if (rman_get_start(rle->res) > ends[win])
1396                                 ends[win] = rman_get_end(rle->res);
1397                         else if (rman_get_end(rle->res) < starts[win])
1398                                 starts[win] = rman_get_start(rle->res);
1399                         if (!(rman_get_flags(rle->res) & RF_PREFETCHABLE))
1400                                 prefetchable[win] = 0;
1401                 }
1402
1403                 if (starts[0] != 0xffffffff)
1404                         starts[0] -= starts[0] % align;
1405                 if (starts[1] != 0xffffffff)
1406                         starts[1] -= starts[1] % align;
1407                 if (ends[0] % align != 0)
1408                         ends[0] += align - ends[0]%align - 1;
1409                 if (ends[1] % align != 0)
1410                         ends[1] += align - ends[1]%align - 1;
1411         }
1412
1413         if (type == SYS_RES_MEMORY) {
1414                 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]);
1415                 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]);
1416                 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2);
1417                 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0|
1418                     CBBM_BRIDGECTRL_PREFETCH_1);
1419                 reg |= (prefetchable[0]?CBBM_BRIDGECTRL_PREFETCH_0:0)|
1420                     (prefetchable[1]?CBBM_BRIDGECTRL_PREFETCH_1:0);
1421                 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2);
1422         } else if (type == SYS_RES_IOPORT) {
1423                 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]);
1424                 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]);
1425         }
1426 }
1427
1428 static int
1429 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type,
1430     int rid, struct resource *res)
1431 {
1432         int ret;
1433
1434         ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child,
1435             type, rid, res);
1436         if (ret != 0)
1437                 return (ret);
1438         cbb_cardbus_auto_open(device_get_softc(brdev), type);
1439         return (0);
1440 }
1441
1442 static int
1443 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type,
1444     int rid, struct resource *res)
1445 {
1446         int ret;
1447
1448         ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child,
1449             type, rid, res);
1450         if (ret != 0)
1451                 return (ret);
1452         cbb_cardbus_auto_open(device_get_softc(brdev), type);
1453         return (0);
1454 }
1455
1456 static struct resource *
1457 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type,
1458     int *rid, u_long start, u_long end, u_long count, uint flags)
1459 {
1460         struct cbb_softc *sc = device_get_softc(brdev);
1461         int tmp;
1462         struct resource *res;
1463
1464         switch (type) {
1465         case SYS_RES_IRQ:
1466                 tmp = rman_get_start(sc->irq_res);
1467                 if (start > tmp || end < tmp || count != 1) {
1468                         device_printf(child, "requested interrupt %ld-%ld,"
1469                             "count = %ld not supported by cbb\n",
1470                             start, end, count);
1471                         return (NULL);
1472                 }
1473                 start = end = tmp;
1474                 break;
1475         case SYS_RES_IOPORT:
1476                 if (start <= cbb_start_32_io)
1477                         start = cbb_start_32_io;
1478                 if (end < start)
1479                         end = start;
1480                 break;
1481         case SYS_RES_MEMORY:
1482                 if (start <= cbb_start_mem)
1483                         start = cbb_start_mem;
1484                 if (end < start)
1485                         end = start;
1486                 break;
1487         }
1488
1489         res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1490             start, end, count, flags & ~RF_ACTIVE);
1491         if (res == NULL) {
1492                 printf("cbb alloc res fail\n");
1493                 return (NULL);
1494         }
1495         cbb_insert_res(sc, res, type, *rid);
1496         if (flags & RF_ACTIVE)
1497                 if (bus_activate_resource(child, type, *rid, res) != 0) {
1498                         bus_release_resource(child, type, *rid, res);
1499                         return (NULL);
1500                 }
1501
1502         return (res);
1503 }
1504
1505 static int
1506 cbb_cardbus_release_resource(device_t brdev, device_t child, int type,
1507     int rid, struct resource *res)
1508 {
1509         struct cbb_softc *sc = device_get_softc(brdev);
1510         int error;
1511
1512         if (rman_get_flags(res) & RF_ACTIVE) {
1513                 error = bus_deactivate_resource(child, type, rid, res);
1514                 if (error != 0)
1515                         return (error);
1516         }
1517         cbb_remove_res(sc, res);
1518         return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1519             type, rid, res));
1520 }
1521
1522 /************************************************************************/
1523 /* PC Card Power Functions                                              */
1524 /************************************************************************/
1525
1526 static int
1527 cbb_pcic_power_enable_socket(device_t brdev, device_t child)
1528 {
1529         struct cbb_softc *sc = device_get_softc(brdev);
1530         int err;
1531
1532         DPRINTF(("cbb_pcic_socket_enable:\n"));
1533
1534         /* power down/up the socket to reset */
1535         err = cbb_do_power(brdev);
1536         if (err)
1537                 return (err);
1538         exca_reset(&sc->exca, child);
1539
1540         return (0);
1541 }
1542
1543 static void
1544 cbb_pcic_power_disable_socket(device_t brdev, device_t child)
1545 {
1546         struct cbb_softc *sc = device_get_softc(brdev);
1547
1548         DPRINTF(("cbb_pcic_socket_disable\n"));
1549
1550         /* reset signal asserting... */
1551         exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
1552         DELAY(2*1000);
1553
1554         /* power down the socket */
1555         cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1556         exca_clrb(&sc->exca, EXCA_PWRCTL, EXCA_PWRCTL_OE);
1557
1558         /* wait 300ms until power fails (Tpf). */
1559         DELAY(300 * 1000);
1560 }
1561
1562 /************************************************************************/
1563 /* POWER methods                                                        */
1564 /************************************************************************/
1565
1566 static int
1567 cbb_power_enable_socket(device_t brdev, device_t child)
1568 {
1569         struct cbb_softc *sc = device_get_softc(brdev);
1570
1571         if (sc->flags & CBB_16BIT_CARD)
1572                 return (cbb_pcic_power_enable_socket(brdev, child));
1573         else
1574                 return (cbb_cardbus_power_enable_socket(brdev, child));
1575 }
1576
1577 static void
1578 cbb_power_disable_socket(device_t brdev, device_t child)
1579 {
1580         struct cbb_softc *sc = device_get_softc(brdev);
1581         if (sc->flags & CBB_16BIT_CARD)
1582                 cbb_pcic_power_disable_socket(brdev, child);
1583         else
1584                 cbb_cardbus_power_disable_socket(brdev, child);
1585 }
1586 static int
1587 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid,
1588     struct resource *res)
1589 {
1590         int err;
1591         struct cbb_softc *sc = device_get_softc(brdev);
1592         if (!(rman_get_flags(res) & RF_ACTIVE)) { /* not already activated */
1593                 switch (type) {
1594                 case SYS_RES_IOPORT:
1595                         err = exca_io_map(&sc->exca, 0, res);
1596                         break;
1597                 case SYS_RES_MEMORY:
1598                         err = exca_mem_map(&sc->exca, 0, res);
1599                         break;
1600                 default:
1601                         err = 0;
1602                         break;
1603                 }
1604                 if (err)
1605                         return (err);
1606
1607         }
1608         return (BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child,
1609             type, rid, res));
1610 }
1611
1612 static int
1613 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type,
1614     int rid, struct resource *res)
1615 {
1616         struct cbb_softc *sc = device_get_softc(brdev);
1617
1618         if (rman_get_flags(res) & RF_ACTIVE) { /* if activated */
1619                 switch (type) {
1620                 case SYS_RES_IOPORT:
1621                         if (exca_io_unmap_res(&sc->exca, res))
1622                                 return (ENOENT);
1623                         break;
1624                 case SYS_RES_MEMORY:
1625                         if (exca_mem_unmap_res(&sc->exca, res))
1626                                 return (ENOENT);
1627                         break;
1628                 }
1629         }
1630         return (BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child,
1631             type, rid, res));
1632 }
1633
1634 static struct resource *
1635 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1636     u_long start, u_long end, u_long count, uint flags)
1637 {
1638         struct resource *res = NULL;
1639         struct cbb_softc *sc = device_get_softc(brdev);
1640         int tmp;
1641
1642         switch (type) {
1643         case SYS_RES_MEMORY:
1644                 if (start < cbb_start_mem)
1645                         start = cbb_start_mem;
1646                 if (end < start)
1647                         end = start;
1648                 flags = (flags & ~RF_ALIGNMENT_MASK) |
1649                     rman_make_alignment_flags(CBB_MEMALIGN);
1650                 break;
1651         case SYS_RES_IOPORT:
1652                 if (start < cbb_start_16_io)
1653                         start = cbb_start_16_io;
1654                 if (end < start)
1655                         end = start;
1656                 break;
1657         case SYS_RES_IRQ:
1658                 tmp = rman_get_start(sc->irq_res);
1659                 if (start > tmp || end < tmp || count != 1) {
1660                         device_printf(child, "requested interrupt %ld-%ld,"
1661                             "count = %ld not supported by cbb\n",
1662                             start, end, count);
1663                         return (NULL);
1664                 }
1665                 flags |= RF_SHAREABLE;
1666                 start = end = rman_get_start(sc->irq_res);
1667                 break;
1668         }
1669         res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1670             start, end, count, flags & ~RF_ACTIVE);
1671         if (res == NULL)
1672                 return (NULL);
1673         cbb_insert_res(sc, res, type, *rid);
1674         if (flags & RF_ACTIVE) {
1675                 if (bus_activate_resource(child, type, *rid, res) != 0) {
1676                         bus_release_resource(child, type, *rid, res);
1677                         return (NULL);
1678                 }
1679         }
1680
1681         return (res);
1682 }
1683
1684 static int
1685 cbb_pcic_release_resource(device_t brdev, device_t child, int type,
1686     int rid, struct resource *res)
1687 {
1688         struct cbb_softc *sc = device_get_softc(brdev);
1689         int error;
1690
1691         if (rman_get_flags(res) & RF_ACTIVE) {
1692                 error = bus_deactivate_resource(child, type, rid, res);
1693                 if (error != 0)
1694                         return (error);
1695         }
1696         cbb_remove_res(sc, res);
1697         return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1698             type, rid, res));
1699 }
1700
1701 /************************************************************************/
1702 /* PC Card methods                                                      */
1703 /************************************************************************/
1704
1705 static int
1706 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid,
1707     uint32_t flags)
1708 {
1709         struct cbb_softc *sc = device_get_softc(brdev);
1710         struct resource *res;
1711
1712         if (type != SYS_RES_MEMORY)
1713                 return (EINVAL);
1714         res = cbb_find_res(sc, type, rid);
1715         if (res == NULL) {
1716                 device_printf(brdev,
1717                     "set_res_flags: specified rid not found\n");
1718                 return (ENOENT);
1719         }
1720         return (exca_mem_set_flags(&sc->exca, res, flags));
1721 }
1722
1723 static int
1724 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid,
1725     uint32_t cardaddr, uint32_t *deltap)
1726 {
1727         struct cbb_softc *sc = device_get_softc(brdev);
1728         struct resource *res;
1729
1730         res = cbb_find_res(sc, SYS_RES_MEMORY, rid);
1731         if (res == NULL) {
1732                 device_printf(brdev,
1733                     "set_memory_offset: specified rid not found\n");
1734                 return (ENOENT);
1735         }
1736         return (exca_mem_set_offset(&sc->exca, res, cardaddr, deltap));
1737 }
1738
1739 /************************************************************************/
1740 /* BUS Methods                                                          */
1741 /************************************************************************/
1742
1743
1744 static int
1745 cbb_activate_resource(device_t brdev, device_t child, int type, int rid,
1746     struct resource *r)
1747 {
1748         struct cbb_softc *sc = device_get_softc(brdev);
1749
1750         if (sc->flags & CBB_16BIT_CARD)
1751                 return (cbb_pcic_activate_resource(brdev, child, type, rid, r));
1752         else
1753                 return (cbb_cardbus_activate_resource(brdev, child, type, rid,
1754                     r));
1755 }
1756
1757 static int
1758 cbb_deactivate_resource(device_t brdev, device_t child, int type,
1759     int rid, struct resource *r)
1760 {
1761         struct cbb_softc *sc = device_get_softc(brdev);
1762
1763         if (sc->flags & CBB_16BIT_CARD)
1764                 return (cbb_pcic_deactivate_resource(brdev, child, type,
1765                     rid, r));
1766         else
1767                 return (cbb_cardbus_deactivate_resource(brdev, child, type,
1768                     rid, r));
1769 }
1770
1771 static struct resource *
1772 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1773     u_long start, u_long end, u_long count, uint flags)
1774 {
1775         struct cbb_softc *sc = device_get_softc(brdev);
1776
1777         if (sc->flags & CBB_16BIT_CARD)
1778                 return (cbb_pcic_alloc_resource(brdev, child, type, rid,
1779                     start, end, count, flags));
1780         else
1781                 return (cbb_cardbus_alloc_resource(brdev, child, type, rid,
1782                     start, end, count, flags));
1783 }
1784
1785 static int
1786 cbb_release_resource(device_t brdev, device_t child, int type, int rid,
1787     struct resource *r)
1788 {
1789         struct cbb_softc *sc = device_get_softc(brdev);
1790
1791         if (sc->flags & CBB_16BIT_CARD)
1792                 return (cbb_pcic_release_resource(brdev, child, type,
1793                     rid, r));
1794         else
1795                 return (cbb_cardbus_release_resource(brdev, child, type,
1796                     rid, r));
1797 }
1798
1799 static int
1800 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result)
1801 {
1802         struct cbb_softc *sc = device_get_softc(brdev);
1803
1804         switch (which) {
1805         case PCIB_IVAR_BUS:
1806                 *result = sc->secbus;
1807                 return (0);
1808         }
1809         return (ENOENT);
1810 }
1811
1812 static int
1813 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value)
1814 {
1815         struct cbb_softc *sc = device_get_softc(brdev);
1816
1817         switch (which) {
1818         case PCIB_IVAR_BUS:
1819                 sc->secbus = value;
1820                 break;
1821         }
1822         return (ENOENT);
1823 }
1824
1825 /************************************************************************/
1826 /* PCI compat methods                                                   */
1827 /************************************************************************/
1828
1829 static int
1830 cbb_maxslots(device_t brdev)
1831 {
1832         return (0);
1833 }
1834
1835 static uint32_t
1836 cbb_read_config(device_t brdev, int b, int s, int f, int reg, int width)
1837 {
1838         /*
1839          * Pass through to the next ppb up the chain (i.e. our grandparent).
1840          */
1841         return (PCIB_READ_CONFIG(device_get_parent(device_get_parent(brdev)),
1842             b, s, f, reg, width));
1843 }
1844
1845 static void
1846 cbb_write_config(device_t brdev, int b, int s, int f, int reg, uint32_t val,
1847     int width)
1848 {
1849         /*
1850          * Pass through to the next ppb up the chain (i.e. our grandparent).
1851          */
1852         PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(brdev)),
1853             b, s, f, reg, val, width);
1854 }
1855
1856 static int
1857 cbb_suspend(device_t self)
1858 {
1859         int                     error = 0;
1860         struct cbb_softc        *sc = device_get_softc(self);
1861
1862         cbb_setb(sc, CBB_SOCKET_MASK, 0);       /* Quiet hardware */
1863         bus_teardown_intr(self, sc->irq_res, sc->intrhand);
1864         sc->flags &= ~CBB_CARD_OK;              /* Card is bogus now */
1865         error = bus_generic_suspend(self);
1866         return (error);
1867 }
1868
1869 static int
1870 cbb_resume(device_t self)
1871 {
1872         int     error = 0;
1873         struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self);
1874         uint32_t tmp;
1875
1876         /*
1877          * Some BIOSes will not save the BARs for the pci chips, so we
1878          * must do it ourselves.  If the BAR is reset to 0 for an I/O
1879          * device, it will read back as 0x1, so no explicit test for
1880          * memory devices are needed.
1881          *
1882          * Note: The PCI bus code should do this automatically for us on
1883          * suspend/resume, but until it does, we have to cope.
1884          */
1885         pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4);
1886         DEVPRINTF((self, "PCI Memory allocated: %08lx\n",
1887             rman_get_start(sc->base_res)));
1888
1889         cbb_chipinit(sc);
1890
1891         /* reset interrupt -- Do we really need to do this? */
1892         tmp = cbb_get(sc, CBB_SOCKET_EVENT);
1893         cbb_set(sc, CBB_SOCKET_EVENT, tmp);
1894
1895         /* re-establish the interrupt. */
1896         if (bus_setup_intr(self, sc->irq_res, INTR_TYPE_AV, cbb_intr, sc,
1897             &sc->intrhand)) {
1898                 device_printf(self, "couldn't re-establish interrupt");
1899                 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
1900                 bus_release_resource(self, SYS_RES_MEMORY, CBBR_SOCKBASE,
1901                     sc->base_res);
1902                 sc->irq_res = NULL;
1903                 sc->base_res = NULL;
1904                 return (ENOMEM);
1905         }
1906
1907         /* CSC Interrupt: Card detect interrupt on */
1908         cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
1909
1910         /* Signal the thread to wakeup. */
1911         wakeup(sc);
1912
1913         error = bus_generic_resume(self);
1914
1915         return (error);
1916 }
1917
1918 static int
1919 cbb_child_present(device_t self)
1920 {
1921         struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self);
1922         uint32_t sockstate;
1923
1924         sockstate = cbb_get(sc, CBB_SOCKET_STATE);
1925         return ((sockstate & CBB_SOCKET_STAT_CD) != 0 &&
1926           (sc->flags & CBB_CARD_OK) != 0);
1927 }
1928
1929 static device_method_t cbb_methods[] = {
1930         /* Device interface */
1931         DEVMETHOD(device_probe,                 cbb_probe),
1932         DEVMETHOD(device_attach,                cbb_attach),
1933         DEVMETHOD(device_detach,                cbb_detach),
1934         DEVMETHOD(device_shutdown,              cbb_shutdown),
1935         DEVMETHOD(device_suspend,               cbb_suspend),
1936         DEVMETHOD(device_resume,                cbb_resume),
1937
1938         /* bus methods */
1939         DEVMETHOD(bus_print_child,              bus_generic_print_child),
1940         DEVMETHOD(bus_read_ivar,                cbb_read_ivar),
1941         DEVMETHOD(bus_write_ivar,               cbb_write_ivar),
1942         DEVMETHOD(bus_alloc_resource,           cbb_alloc_resource),
1943         DEVMETHOD(bus_release_resource,         cbb_release_resource),
1944         DEVMETHOD(bus_activate_resource,        cbb_activate_resource),
1945         DEVMETHOD(bus_deactivate_resource,      cbb_deactivate_resource),
1946         DEVMETHOD(bus_driver_added,             cbb_driver_added),
1947         DEVMETHOD(bus_child_detached,           cbb_child_detached),
1948         DEVMETHOD(bus_setup_intr,               cbb_setup_intr),
1949         DEVMETHOD(bus_teardown_intr,            cbb_teardown_intr),
1950         DEVMETHOD(bus_child_present,            cbb_child_present),
1951
1952         /* 16-bit card interface */
1953         DEVMETHOD(card_set_res_flags,           cbb_pcic_set_res_flags),
1954         DEVMETHOD(card_set_memory_offset,       cbb_pcic_set_memory_offset),
1955
1956         /* power interface */
1957         DEVMETHOD(power_enable_socket,          cbb_power_enable_socket),
1958         DEVMETHOD(power_disable_socket,         cbb_power_disable_socket),
1959
1960         /* pcib compatibility interface */
1961         DEVMETHOD(pcib_maxslots,                cbb_maxslots),
1962         DEVMETHOD(pcib_read_config,             cbb_read_config),
1963         DEVMETHOD(pcib_write_config,            cbb_write_config),
1964         {0,0}
1965 };
1966
1967 static driver_t cbb_driver = {
1968         "cbb",
1969         cbb_methods,
1970         sizeof(struct cbb_softc)
1971 };
1972
1973 static devclass_t cbb_devclass;
1974
1975 DRIVER_MODULE(cbb, pci, cbb_driver, cbb_devclass, 0, 0);
1976 MODULE_VERSION(cbb, 1);
1977 MODULE_DEPEND(cbb, exca, 1, 1, 1);