sys/dev/sound/pci/hda/hdac.c

   1 /*-
   2  * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>
   3  * Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org>
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  * $FreeBSD: src/sys/dev/sound/pci/hda/hdac.c,v 1.36.2.8 2007/11/30 15:11:42 ariff Exp $
  28  */
  29
  30 /*
  31  * Intel High Definition Audio (Controller) driver for FreeBSD. Be advised
  32  * that this driver still in its early stage, and possible of rewrite are
  33  * pretty much guaranteed. There are supposedly several distinct parent/child
  34  * busses to make this "perfect", but as for now and for the sake of
  35  * simplicity, everything is gobble up within single source.
  36  *
  37  * List of subsys:
  38  *     1) HDA Controller support
  39  *     2) HDA Codecs support, which may include
  40  *        - HDA
  41  *        - Modem
  42  *        - HDMI
  43  *     3) Widget parser - the real magic of why this driver works on so
  44  *        many hardwares with minimal vendor specific quirk. The original
  45  *        parser was written using Ruby and can be found at
  46  *        http://people.freebsd.org/~ariff/HDA/parser.rb . This crude
  47  *        ruby parser take the verbose dmesg dump as its input. Refer to
  48  *        http://www.microsoft.com/whdc/device/audio/default.mspx for various
  49  *        interesting documents, especially UAA (Universal Audio Architecture).
  50  *     4) Possible vendor specific support.
  51  *        (snd_hda_intel, snd_hda_ati, etc..)
  52  *
  53  * Thanks to Ahmad Ubaidah Omar @ Defenxis Sdn. Bhd. for the
  54  * Compaq V3000 with Conexant HDA.
  55  *
  56  *    * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  57  *    *                                                                 *
  58  *    *        This driver is a collaborative effort made by:           *
  59  *    *                                                                 *
  60  *    *          Stephane E. Potvin <sepotvin@videotron.ca>             *
  61  *    *               Andrea Bittau <a.bittau@cs.ucl.ac.uk>             *
  62  *    *               Wesley Morgan <morganw@chemikals.org>             *
  63  *    *              Daniel Eischen <deischen@FreeBSD.org>              *
  64  *    *             Maxime Guillaud <bsd-ports@mguillaud.net>           *
  65  *    *              Ariff Abdullah <ariff@FreeBSD.org>                 *
  66  *    *                                                                 *
  67  *    *   ....and various people from freebsd-multimedia@FreeBSD.org    *
  68  *    *                                                                 *
  69  *    * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  70  */
  71
  72 #include <dev/sound/pcm/sound.h>
  73 #include <bus/pci/pcireg.h>
  74 #include <bus/pci/pcivar.h>
  75
  76 #include <sys/ctype.h>
  77 #include <sys/taskqueue.h>
  78
  79 #include <dev/sound/pci/hda/hdac_private.h>
  80 #include <dev/sound/pci/hda/hdac_reg.h>
  81 #include <dev/sound/pci/hda/hda_reg.h>
  82 #include <dev/sound/pci/hda/hdac.h>
  83
  84 #include "mixer_if.h"
  85
  86 #define HDA_DRV_TEST_REV        "20071129_0050"
  87 #define HDA_WIDGET_PARSER_REV   1
  88
  89 static int hda_debug
  90 #ifdef HDA_DEBUG
  91         = 1
  92 #endif
  93         ;
  94 #define HDA_BOOTVERBOSE(stmt)   do {                    \
  95         if (hda_debug && bootverbose != 0) {            \
  96                 stmt                                    \
  97         }                                               \
  98 } while(0)
  99
 100 #if 1
 101 #undef HDAC_INTR_EXTRA
 102 #define HDAC_INTR_EXTRA         1
 103 #endif
 104
 105 #define hdac_lock(sc)           snd_mtxlock((sc)->lock)
 106 #define hdac_unlock(sc)         snd_mtxunlock((sc)->lock)
 107 #define hdac_lockassert(sc)     snd_mtxassert((sc)->lock)
 108 #define hdac_lockowned(sc)      (1)/* mtx_owned((sc)->lock) */
 109
 110 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
 111 #include <machine/specialreg.h>
 112 #define HDAC_DMA_ATTR(sc, v, s, attr)   do {                            \
 113         vm_offset_t va = (vm_offset_t)(v);                              \
 114         vm_size_t sz = (vm_size_t)(s);                                  \
 115         if ((sc) != NULL && ((sc)->flags & HDAC_F_DMA_NOCACHE) &&       \
 116             va != 0 && sz != 0)                                         \
 117                 (void)pmap_change_attr(va, sz, (attr));                 \
 118 } while(0)
 119 #else
 120 #define HDAC_DMA_ATTR(...)
 121 #endif
 122
 123 #define HDA_FLAG_MATCH(fl, v)   (((fl) & (v)) == (v))
 124 #define HDA_DEV_MATCH(fl, v)    ((fl) == (v) || \
 125                                 (fl) == 0xffffffff || \
 126                                 (((fl) & 0xffff0000) == 0xffff0000 && \
 127                                 ((fl) & 0x0000ffff) == ((v) & 0x0000ffff)) || \
 128                                 (((fl) & 0x0000ffff) == 0x0000ffff && \
 129                                 ((fl) & 0xffff0000) == ((v) & 0xffff0000)))
 130 #define HDA_MATCH_ALL           0xffffffff
 131 #define HDAC_INVALID            0xffffffff
 132
 133 /* Default controller / jack sense poll: 250ms */
 134 #define HDAC_POLL_INTERVAL      max(hz >> 2, 1)
 135
 136 /*
 137  * Make room for possible 4096 playback/record channels, in 100 years to come.
 138  */
 139 #define HDAC_TRIGGER_NONE       0x00000000
 140 #define HDAC_TRIGGER_PLAY       0x00000fff
 141 #define HDAC_TRIGGER_REC        0x00fff000
 142 #define HDAC_TRIGGER_UNSOL      0x80000000
 143
 144 #define HDA_MODEL_CONSTRUCT(vendor, model)      \
 145                 (((uint32_t)(model) << 16) | ((vendor##_VENDORID) & 0xffff))
 146
 147 /* Controller models */
 148
 149 /* Intel */
 150 #define INTEL_VENDORID          0x8086
 151 #define HDA_INTEL_82801F        HDA_MODEL_CONSTRUCT(INTEL, 0x2668)
 152 #define HDA_INTEL_63XXESB       HDA_MODEL_CONSTRUCT(INTEL, 0x269a)
 153 #define HDA_INTEL_82801G        HDA_MODEL_CONSTRUCT(INTEL, 0x27d8)
 154 #define HDA_INTEL_82801H        HDA_MODEL_CONSTRUCT(INTEL, 0x284b)
 155 #define HDA_INTEL_82801I        HDA_MODEL_CONSTRUCT(INTEL, 0x293e)
 156 #define HDA_INTEL_ALL           HDA_MODEL_CONSTRUCT(INTEL, 0xffff)
 157
 158 /* Nvidia */
 159 #define NVIDIA_VENDORID         0x10de
 160 #define HDA_NVIDIA_MCP51        HDA_MODEL_CONSTRUCT(NVIDIA, 0x026c)
 161 #define HDA_NVIDIA_MCP55        HDA_MODEL_CONSTRUCT(NVIDIA, 0x0371)
 162 #define HDA_NVIDIA_MCP61_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x03e4)
 163 #define HDA_NVIDIA_MCP61_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x03f0)
 164 #define HDA_NVIDIA_MCP65_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x044a)
 165 #define HDA_NVIDIA_MCP65_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x044b)
 166 #define HDA_NVIDIA_MCP67_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x055c)
 167 #define HDA_NVIDIA_MCP67_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x055d)
 168 #define HDA_NVIDIA_ALL          HDA_MODEL_CONSTRUCT(NVIDIA, 0xffff)
 169
 170 /* ATI */
 171 #define ATI_VENDORID            0x1002
 172 #define HDA_ATI_SB450           HDA_MODEL_CONSTRUCT(ATI, 0x437b)
 173 #define HDA_ATI_SB600           HDA_MODEL_CONSTRUCT(ATI, 0x4383)
 174 #define HDA_ATI_ALL             HDA_MODEL_CONSTRUCT(ATI, 0xffff)
 175
 176 /* VIA */
 177 #define VIA_VENDORID            0x1106
 178 #define HDA_VIA_VT82XX          HDA_MODEL_CONSTRUCT(VIA, 0x3288)
 179 #define HDA_VIA_ALL             HDA_MODEL_CONSTRUCT(VIA, 0xffff)
 180
 181 /* SiS */
 182 #define SIS_VENDORID            0x1039
 183 #define HDA_SIS_966             HDA_MODEL_CONSTRUCT(SIS, 0x7502)
 184 #define HDA_SIS_ALL             HDA_MODEL_CONSTRUCT(SIS, 0xffff)
 185
 186 /* OEM/subvendors */
 187
 188 /* Intel */
 189 #define INTEL_D101GGC_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xd600)
 190
 191 /* HP/Compaq */
 192 #define HP_VENDORID             0x103c
 193 #define HP_V3000_SUBVENDOR      HDA_MODEL_CONSTRUCT(HP, 0x30b5)
 194 #define HP_NX7400_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30a2)
 195 #define HP_NX6310_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30aa)
 196 #define HP_NX6325_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30b0)
 197 #define HP_XW4300_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x3013)
 198 #define HP_3010_SUBVENDOR       HDA_MODEL_CONSTRUCT(HP, 0x3010)
 199 #define HP_DV5000_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30a5)
 200 #define HP_DC7700_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x2802)
 201 #define HP_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(HP, 0xffff)
 202 /* What is wrong with XN 2563 anyway? (Got the picture ?) */
 203 #define HP_NX6325_SUBVENDORX    0x103c30b0
 204
 205 /* Dell */
 206 #define DELL_VENDORID           0x1028
 207 #define DELL_D820_SUBVENDOR     HDA_MODEL_CONSTRUCT(DELL, 0x01cc)
 208 #define DELL_I1300_SUBVENDOR    HDA_MODEL_CONSTRUCT(DELL, 0x01c9)
 209 #define DELL_XPSM1210_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01d7)
 210 #define DELL_OPLX745_SUBVENDOR  HDA_MODEL_CONSTRUCT(DELL, 0x01da)
 211 #define DELL_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(DELL, 0xffff)
 212
 213 /* Clevo */
 214 #define CLEVO_VENDORID          0x1558
 215 #define CLEVO_D900T_SUBVENDOR   HDA_MODEL_CONSTRUCT(CLEVO, 0x0900)
 216 #define CLEVO_ALL_SUBVENDOR     HDA_MODEL_CONSTRUCT(CLEVO, 0xffff)
 217
 218 /* Acer */
 219 #define ACER_VENDORID           0x1025
 220 #define ACER_A5050_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x010f)
 221 #define ACER_A4520_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x0127)
 222 #define ACER_3681WXM_SUBVENDOR  HDA_MODEL_CONSTRUCT(ACER, 0x0110)
 223 #define ACER_A1H2_SUBVENDOR     HDA_MODEL_CONSTRUCT(ACER, 0x0590)
 224 #define ACER_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(ACER, 0xffff)
 225
 226 /* Asus */
 227 #define ASUS_VENDORID           0x1043
 228 #define ASUS_M5200_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x1993)
 229 #define ASUS_U5F_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1263)
 230 #define ASUS_A8JC_SUBVENDOR     HDA_MODEL_CONSTRUCT(ASUS, 0x1153)
 231 #define ASUS_P1AH2_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x81cb)
 232 #define ASUS_A7M_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1323)
 233 #define ASUS_A7T_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x13c2)
 234 #define ASUS_W6F_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1263)
 235 #define ASUS_W2J_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1971)
 236 #define ASUS_F3JC_SUBVENDOR     HDA_MODEL_CONSTRUCT(ASUS, 0x1338)
 237 #define ASUS_M2V_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x81e7)
 238 #define ASUS_M2N_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x8234)
 239 #define ASUS_M2NPVMX_SUBVENDOR  HDA_MODEL_CONSTRUCT(ASUS, 0x81cb)
 240 #define ASUS_P5BWD_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x81ec)
 241 #define ASUS_A8NVMCSM_SUBVENDOR HDA_MODEL_CONSTRUCT(NVIDIA, 0xcb84)
 242 #define ASUS_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0xffff)
 243
 244 /* IBM / Lenovo */
 245 #define IBM_VENDORID            0x1014
 246 #define IBM_M52_SUBVENDOR       HDA_MODEL_CONSTRUCT(IBM, 0x02f6)
 247 #define IBM_ALL_SUBVENDOR       HDA_MODEL_CONSTRUCT(IBM, 0xffff)
 248
 249 /* Lenovo */
 250 #define LENOVO_VENDORID         0x17aa
 251 #define LENOVO_3KN100_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2066)
 252 #define LENOVO_TCA55_SUBVENDOR  HDA_MODEL_CONSTRUCT(LENOVO, 0x1015)
 253 #define LENOVO_ALL_SUBVENDOR    HDA_MODEL_CONSTRUCT(LENOVO, 0xffff)
 254
 255 /* Samsung */
 256 #define SAMSUNG_VENDORID        0x144d
 257 #define SAMSUNG_Q1_SUBVENDOR    HDA_MODEL_CONSTRUCT(SAMSUNG, 0xc027)
 258 #define SAMSUNG_ALL_SUBVENDOR   HDA_MODEL_CONSTRUCT(SAMSUNG, 0xffff)
 259
 260 /* Medion ? */
 261 #define MEDION_VENDORID                 0x161f
 262 #define MEDION_MD95257_SUBVENDOR        HDA_MODEL_CONSTRUCT(MEDION, 0x203d)
 263 #define MEDION_ALL_SUBVENDOR            HDA_MODEL_CONSTRUCT(MEDION, 0xffff)
 264
 265 /* Apple Computer Inc. */
 266 #define APPLE_VENDORID          0x106b
 267 #define APPLE_MB3_SUBVENDOR     HDA_MODEL_CONSTRUCT(APPLE, 0x00a1)
 268
 269 /*
 270  * Apple Intel MacXXXX seems using Sigmatel codec/vendor id
 271  * instead of their own, which is beyond my comprehension
 272  * (see HDA_CODEC_STAC9221 below).
 273  */
 274 #define APPLE_INTEL_MAC         0x76808384
 275
 276 /* LG Electronics */
 277 #define LG_VENDORID             0x1854
 278 #define LG_LW20_SUBVENDOR       HDA_MODEL_CONSTRUCT(LG, 0x0018)
 279 #define LG_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(LG, 0xffff)
 280
 281 /* Fujitsu Siemens */
 282 #define FS_VENDORID             0x1734
 283 #define FS_PA1510_SUBVENDOR     HDA_MODEL_CONSTRUCT(FS, 0x10b8)
 284 #define FS_SI1848_SUBVENDOR     HDA_MODEL_CONSTRUCT(FS, 0x10cd)
 285 #define FS_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(FS, 0xffff)
 286
 287 /* Fujitsu Limited */
 288 #define FL_VENDORID             0x10cf
 289 #define FL_S7020D_SUBVENDOR     HDA_MODEL_CONSTRUCT(FL, 0x1326)
 290 #define FL_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(FL, 0xffff)
 291
 292 /* Toshiba */
 293 #define TOSHIBA_VENDORID        0x1179
 294 #define TOSHIBA_U200_SUBVENDOR  HDA_MODEL_CONSTRUCT(TOSHIBA, 0x0001)
 295 #define TOSHIBA_A135_SUBVENDOR  HDA_MODEL_CONSTRUCT(TOSHIBA, 0xff01)
 296 #define TOSHIBA_ALL_SUBVENDOR   HDA_MODEL_CONSTRUCT(TOSHIBA, 0xffff)
 297
 298 /* Micro-Star International (MSI) */
 299 #define MSI_VENDORID            0x1462
 300 #define MSI_MS1034_SUBVENDOR    HDA_MODEL_CONSTRUCT(MSI, 0x0349)
 301 #define MSI_MS034A_SUBVENDOR    HDA_MODEL_CONSTRUCT(MSI, 0x034a)
 302 #define MSI_ALL_SUBVENDOR       HDA_MODEL_CONSTRUCT(MSI, 0xffff)
 303
 304 /* Giga-Byte Technology */
 305 #define GB_VENDORID             0x1458
 306 #define GB_G33S2H_SUBVENDOR     HDA_MODEL_CONSTRUCT(GB, 0xa022)
 307 #define GP_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(GB, 0xffff)
 308
 309 /* Uniwill ? */
 310 #define UNIWILL_VENDORID        0x1584
 311 #define UNIWILL_9075_SUBVENDOR  HDA_MODEL_CONSTRUCT(UNIWILL, 0x9075)
 312 #define UNIWILL_9080_SUBVENDOR  HDA_MODEL_CONSTRUCT(UNIWILL, 0x9080)
 313
 314
 315 /* Misc constants.. */
 316 #define HDA_AMP_MUTE_DEFAULT    (0xffffffff)
 317 #define HDA_AMP_MUTE_NONE       (0)
 318 #define HDA_AMP_MUTE_LEFT       (1 << 0)
 319 #define HDA_AMP_MUTE_RIGHT      (1 << 1)
 320 #define HDA_AMP_MUTE_ALL        (HDA_AMP_MUTE_LEFT | HDA_AMP_MUTE_RIGHT)
 321
 322 #define HDA_AMP_LEFT_MUTED(v)   ((v) & (HDA_AMP_MUTE_LEFT))
 323 #define HDA_AMP_RIGHT_MUTED(v)  (((v) & HDA_AMP_MUTE_RIGHT) >> 1)
 324
 325 #define HDA_DAC_PATH    (1 << 0)
 326 #define HDA_ADC_PATH    (1 << 1)
 327 #define HDA_ADC_RECSEL  (1 << 2)
 328
 329 #define HDA_DAC_LOCKED  (1 << 3)
 330 #define HDA_ADC_LOCKED  (1 << 4)
 331
 332 #define HDA_CTL_OUT     (1 << 0)
 333 #define HDA_CTL_IN      (1 << 1)
 334 #define HDA_CTL_BOTH    (HDA_CTL_IN | HDA_CTL_OUT)
 335
 336 #define HDA_GPIO_MAX            8
 337 /* 0 - 7 = GPIO , 8 = Flush */
 338 #define HDA_QUIRK_GPIO0         (1 << 0)
 339 #define HDA_QUIRK_GPIO1         (1 << 1)
 340 #define HDA_QUIRK_GPIO2         (1 << 2)
 341 #define HDA_QUIRK_GPIO3         (1 << 3)
 342 #define HDA_QUIRK_GPIO4         (1 << 4)
 343 #define HDA_QUIRK_GPIO5         (1 << 5)
 344 #define HDA_QUIRK_GPIO6         (1 << 6)
 345 #define HDA_QUIRK_GPIO7         (1 << 7)
 346 #define HDA_QUIRK_GPIOFLUSH     (1 << 8)
 347
 348 /* 9 - 25 = anything else */
 349 #define HDA_QUIRK_SOFTPCMVOL    (1 << 9)
 350 #define HDA_QUIRK_FIXEDRATE     (1 << 10)
 351 #define HDA_QUIRK_FORCESTEREO   (1 << 11)
 352 #define HDA_QUIRK_EAPDINV       (1 << 12)
 353 #define HDA_QUIRK_DMAPOS        (1 << 13)
 354
 355 /* 26 - 31 = vrefs */
 356 #define HDA_QUIRK_IVREF50       (1 << 26)
 357 #define HDA_QUIRK_IVREF80       (1 << 27)
 358 #define HDA_QUIRK_IVREF100      (1 << 28)
 359 #define HDA_QUIRK_OVREF50       (1 << 29)
 360 #define HDA_QUIRK_OVREF80       (1 << 30)
 361 #define HDA_QUIRK_OVREF100      (1 << 31)
 362
 363 #define HDA_QUIRK_IVREF         (HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF80 | \
 364                                                         HDA_QUIRK_IVREF100)
 365 #define HDA_QUIRK_OVREF         (HDA_QUIRK_OVREF50 | HDA_QUIRK_OVREF80 | \
 366                                                         HDA_QUIRK_OVREF100)
 367 #define HDA_QUIRK_VREF          (HDA_QUIRK_IVREF | HDA_QUIRK_OVREF)
 368
 369 #define SOUND_MASK_SKIP         (1 << 30)
 370 #define SOUND_MASK_DISABLE      (1 << 31)
 371
 372 static const struct {
 373         char *key;
 374         uint32_t value;
 375 } hdac_quirks_tab[] = {
 376         { "gpio0", HDA_QUIRK_GPIO0 },
 377         { "gpio1", HDA_QUIRK_GPIO1 },
 378         { "gpio2", HDA_QUIRK_GPIO2 },
 379         { "gpio3", HDA_QUIRK_GPIO3 },
 380         { "gpio4", HDA_QUIRK_GPIO4 },
 381         { "gpio5", HDA_QUIRK_GPIO5 },
 382         { "gpio6", HDA_QUIRK_GPIO6 },
 383         { "gpio7", HDA_QUIRK_GPIO7 },
 384         { "gpioflush", HDA_QUIRK_GPIOFLUSH },
 385         { "softpcmvol", HDA_QUIRK_SOFTPCMVOL },
 386         { "fixedrate", HDA_QUIRK_FIXEDRATE },
 387         { "forcestereo", HDA_QUIRK_FORCESTEREO },
 388         { "eapdinv", HDA_QUIRK_EAPDINV },
 389         { "dmapos", HDA_QUIRK_DMAPOS },
 390         { "ivref50", HDA_QUIRK_IVREF50 },
 391         { "ivref80", HDA_QUIRK_IVREF80 },
 392         { "ivref100", HDA_QUIRK_IVREF100 },
 393         { "ovref50", HDA_QUIRK_OVREF50 },
 394         { "ovref80", HDA_QUIRK_OVREF80 },
 395         { "ovref100", HDA_QUIRK_OVREF100 },
 396         { "ivref", HDA_QUIRK_IVREF },
 397         { "ovref", HDA_QUIRK_OVREF },
 398         { "vref", HDA_QUIRK_VREF },
 399 };
 400 #define HDAC_QUIRKS_TAB_LEN NELEM(hdac_quirks_tab)
 401
 402 #define HDA_BDL_MIN     2
 403 #define HDA_BDL_MAX     256
 404 #define HDA_BDL_DEFAULT HDA_BDL_MIN
 405
 406 #define HDA_BLK_MIN     HDAC_DMA_ALIGNMENT
 407 #define HDA_BLK_ALIGN   (~(HDA_BLK_MIN - 1))
 408
 409 #define HDA_BUFSZ_MIN           4096
 410 #define HDA_BUFSZ_MAX           65536
 411 #define HDA_BUFSZ_DEFAULT       16384
 412
 413 #define HDA_PARSE_MAXDEPTH      10
 414
 415 #define HDAC_UNSOLTAG_EVENT_HP          0x00
 416 #define HDAC_UNSOLTAG_EVENT_TEST        0x01
 417
 418 MALLOC_DEFINE(M_HDAC, "hdac", "High Definition Audio Controller");
 419
 420 static int hdac_msi_enable = 1;
 421 TUNABLE_INT("hw.snd.hdac.msi.enable", &hdac_msi_enable);
 422
 423 enum {
 424         HDA_PARSE_MIXER,
 425         HDA_PARSE_DIRECT
 426 };
 427
 428 /* Default */
 429 static uint32_t hdac_fmt[] = {
 430         AFMT_STEREO | AFMT_S16_LE,
 431         0
 432 };
 433
 434 static struct pcmchan_caps hdac_caps = {48000, 48000, hdac_fmt, 0};
 435
 436 static const struct {
 437         uint32_t        model;
 438         char            *desc;
 439 } hdac_devices[] = {
 440         { HDA_INTEL_82801F,  "Intel 82801F" },
 441         { HDA_INTEL_63XXESB, "Intel 631x/632xESB" },
 442         { HDA_INTEL_82801G,  "Intel 82801G" },
 443         { HDA_INTEL_82801H,  "Intel 82801H" },
 444         { HDA_INTEL_82801I,  "Intel 82801I" },
 445         { HDA_NVIDIA_MCP51,  "NVidia MCP51" },
 446         { HDA_NVIDIA_MCP55,  "NVidia MCP55" },
 447         { HDA_NVIDIA_MCP61_1, "NVidia MCP61" },
 448         { HDA_NVIDIA_MCP61_2, "NVidia MCP61" },
 449         { HDA_NVIDIA_MCP65_1, "NVidia MCP65" },
 450         { HDA_NVIDIA_MCP65_2, "NVidia MCP65" },
 451         { HDA_NVIDIA_MCP67_1, "NVidia MCP67" },
 452         { HDA_NVIDIA_MCP67_2, "NVidia MCP67" },
 453         { HDA_ATI_SB450,     "ATI SB450"    },
 454         { HDA_ATI_SB600,     "ATI SB600"    },
 455         { HDA_VIA_VT82XX,    "VIA VT8251/8237A" },
 456         { HDA_SIS_966,       "SiS 966" },
 457         /* Unknown */
 458         { HDA_INTEL_ALL,  "Intel (Unknown)"  },
 459         { HDA_NVIDIA_ALL, "NVidia (Unknown)" },
 460         { HDA_ATI_ALL,    "ATI (Unknown)"    },
 461         { HDA_VIA_ALL,    "VIA (Unknown)"    },
 462         { HDA_SIS_ALL,    "SiS (Unknown)"    },
 463 };
 464 #define HDAC_DEVICES_LEN NELEM(hdac_devices)
 465
 466 static const struct {
 467         uint16_t vendor;
 468         uint8_t reg;
 469         uint8_t mask;
 470         uint8_t enable;
 471 } hdac_pcie_snoop[] = {
 472         {  INTEL_VENDORID, 0x00, 0x00, 0x00 },
 473         {    ATI_VENDORID, 0x42, 0xf8, 0x02 },
 474         { NVIDIA_VENDORID, 0x4e, 0xf0, 0x0f },
 475 };
 476 #define HDAC_PCIESNOOP_LEN NELEM(hdac_pcie_snoop)
 477
 478 static const struct {
 479         uint32_t        rate;
 480         int             valid;
 481         uint16_t        base;
 482         uint16_t        mul;
 483         uint16_t        div;
 484 } hda_rate_tab[] = {
 485         {   8000, 1, 0x0000, 0x0000, 0x0500 },  /* (48000 * 1) / 6 */
 486         {   9600, 0, 0x0000, 0x0000, 0x0400 },  /* (48000 * 1) / 5 */
 487         {  12000, 0, 0x0000, 0x0000, 0x0300 },  /* (48000 * 1) / 4 */
 488         {  16000, 1, 0x0000, 0x0000, 0x0200 },  /* (48000 * 1) / 3 */
 489         {  18000, 0, 0x0000, 0x1000, 0x0700 },  /* (48000 * 3) / 8 */
 490         {  19200, 0, 0x0000, 0x0800, 0x0400 },  /* (48000 * 2) / 5 */
 491         {  24000, 0, 0x0000, 0x0000, 0x0100 },  /* (48000 * 1) / 2 */
 492         {  28800, 0, 0x0000, 0x1000, 0x0400 },  /* (48000 * 3) / 5 */
 493         {  32000, 1, 0x0000, 0x0800, 0x0200 },  /* (48000 * 2) / 3 */
 494         {  36000, 0, 0x0000, 0x1000, 0x0300 },  /* (48000 * 3) / 4 */
 495         {  38400, 0, 0x0000, 0x1800, 0x0400 },  /* (48000 * 4) / 5 */
 496         {  48000, 1, 0x0000, 0x0000, 0x0000 },  /* (48000 * 1) / 1 */
 497         {  64000, 0, 0x0000, 0x1800, 0x0200 },  /* (48000 * 4) / 3 */
 498         {  72000, 0, 0x0000, 0x1000, 0x0100 },  /* (48000 * 3) / 2 */
 499         {  96000, 1, 0x0000, 0x0800, 0x0000 },  /* (48000 * 2) / 1 */
 500         { 144000, 0, 0x0000, 0x1000, 0x0000 },  /* (48000 * 3) / 1 */
 501         { 192000, 1, 0x0000, 0x1800, 0x0000 },  /* (48000 * 4) / 1 */
 502         {   8820, 0, 0x4000, 0x0000, 0x0400 },  /* (44100 * 1) / 5 */
 503         {  11025, 1, 0x4000, 0x0000, 0x0300 },  /* (44100 * 1) / 4 */
 504         {  12600, 0, 0x4000, 0x0800, 0x0600 },  /* (44100 * 2) / 7 */
 505         {  14700, 0, 0x4000, 0x0000, 0x0200 },  /* (44100 * 1) / 3 */
 506         {  17640, 0, 0x4000, 0x0800, 0x0400 },  /* (44100 * 2) / 5 */
 507         {  18900, 0, 0x4000, 0x1000, 0x0600 },  /* (44100 * 3) / 7 */
 508         {  22050, 1, 0x4000, 0x0000, 0x0100 },  /* (44100 * 1) / 2 */
 509         {  25200, 0, 0x4000, 0x1800, 0x0600 },  /* (44100 * 4) / 7 */
 510         {  26460, 0, 0x4000, 0x1000, 0x0400 },  /* (44100 * 3) / 5 */
 511         {  29400, 0, 0x4000, 0x0800, 0x0200 },  /* (44100 * 2) / 3 */
 512         {  33075, 0, 0x4000, 0x1000, 0x0300 },  /* (44100 * 3) / 4 */
 513         {  35280, 0, 0x4000, 0x1800, 0x0400 },  /* (44100 * 4) / 5 */
 514         {  44100, 1, 0x4000, 0x0000, 0x0000 },  /* (44100 * 1) / 1 */
 515         {  58800, 0, 0x4000, 0x1800, 0x0200 },  /* (44100 * 4) / 3 */
 516         {  66150, 0, 0x4000, 0x1000, 0x0100 },  /* (44100 * 3) / 2 */
 517         {  88200, 1, 0x4000, 0x0800, 0x0000 },  /* (44100 * 2) / 1 */
 518         { 132300, 0, 0x4000, 0x1000, 0x0000 },  /* (44100 * 3) / 1 */
 519         { 176400, 1, 0x4000, 0x1800, 0x0000 },  /* (44100 * 4) / 1 */
 520 };
 521 #define HDA_RATE_TAB_LEN NELEM(hda_rate_tab)
 522
 523 /* All codecs you can eat... */
 524 #define HDA_CODEC_CONSTRUCT(vendor, id) \
 525                 (((uint32_t)(vendor##_VENDORID) << 16) | ((id) & 0xffff))
 526
 527 /* Realtek */
 528 #define REALTEK_VENDORID        0x10ec
 529 #define HDA_CODEC_ALC260        HDA_CODEC_CONSTRUCT(REALTEK, 0x0260)
 530 #define HDA_CODEC_ALC262        HDA_CODEC_CONSTRUCT(REALTEK, 0x0262)
 531 #define HDA_CODEC_ALC268        HDA_CODEC_CONSTRUCT(REALTEK, 0x0268)
 532 #define HDA_CODEC_ALC269        HDA_CODEC_CONSTRUCT(REALTEK, 0x0269)
 533 #define HDA_CODEC_ALC660        HDA_CODEC_CONSTRUCT(REALTEK, 0x0660)
 534 #define HDA_CODEC_ALC861        HDA_CODEC_CONSTRUCT(REALTEK, 0x0861)
 535 #define HDA_CODEC_ALC861VD      HDA_CODEC_CONSTRUCT(REALTEK, 0x0862)
 536 #define HDA_CODEC_ALC880        HDA_CODEC_CONSTRUCT(REALTEK, 0x0880)
 537 #define HDA_CODEC_ALC882        HDA_CODEC_CONSTRUCT(REALTEK, 0x0882)
 538 #define HDA_CODEC_ALC883        HDA_CODEC_CONSTRUCT(REALTEK, 0x0883)
 539 #define HDA_CODEC_ALC885        HDA_CODEC_CONSTRUCT(REALTEK, 0x0885)
 540 #define HDA_CODEC_ALC888        HDA_CODEC_CONSTRUCT(REALTEK, 0x0888)
 541 #define HDA_CODEC_ALCXXXX       HDA_CODEC_CONSTRUCT(REALTEK, 0xffff)
 542
 543 /* Analog Devices */
 544 #define ANALOGDEVICES_VENDORID  0x11d4
 545 #define HDA_CODEC_AD1981HD      HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1981)
 546 #define HDA_CODEC_AD1983        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1983)
 547 #define HDA_CODEC_AD1984        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1984)
 548 #define HDA_CODEC_AD1986A       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1986)
 549 #define HDA_CODEC_AD1988        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1988)
 550 #define HDA_CODEC_AD1988B       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x198b)
 551 #define HDA_CODEC_ADXXXX        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0xffff)
 552
 553 /* CMedia */
 554 #define CMEDIA_VENDORID         0x434d
 555 #define HDA_CODEC_CMI9880       HDA_CODEC_CONSTRUCT(CMEDIA, 0x4980)
 556 #define HDA_CODEC_CMIXXXX       HDA_CODEC_CONSTRUCT(CMEDIA, 0xffff)
 557
 558 /* Sigmatel */
 559 #define SIGMATEL_VENDORID       0x8384
 560 #define HDA_CODEC_STAC9221      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7680)
 561 #define HDA_CODEC_STAC9221D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7683)
 562 #define HDA_CODEC_STAC9220      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7690)
 563 #define HDA_CODEC_STAC922XD     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7681)
 564 #define HDA_CODEC_STAC9227      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7618)
 565 #define HDA_CODEC_STAC9271D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7627)
 566 #define HDA_CODEC_STACXXXX      HDA_CODEC_CONSTRUCT(SIGMATEL, 0xffff)
 567
 568 /*
 569  * Conexant
 570  *
 571  * Ok, the truth is, I don't have any idea at all whether
 572  * it is "Venice" or "Waikiki" or other unnamed CXyadayada. The only
 573  * place that tell me it is "Venice" is from its Windows driver INF.
 574  *
 575  *  Venice - CX?????
 576  * Waikiki - CX20551-22
 577  */
 578 #define CONEXANT_VENDORID       0x14f1
 579 #define HDA_CODEC_CXVENICE      HDA_CODEC_CONSTRUCT(CONEXANT, 0x5045)
 580 #define HDA_CODEC_CXWAIKIKI     HDA_CODEC_CONSTRUCT(CONEXANT, 0x5047)
 581 #define HDA_CODEC_CXXXXX        HDA_CODEC_CONSTRUCT(CONEXANT, 0xffff)
 582
 583 /* VIA */
 584 #define HDA_CODEC_VT1708_8      HDA_CODEC_CONSTRUCT(VIA, 0x1708)
 585 #define HDA_CODEC_VT1708_9      HDA_CODEC_CONSTRUCT(VIA, 0x1709)
 586 #define HDA_CODEC_VT1708_A      HDA_CODEC_CONSTRUCT(VIA, 0x170a)
 587 #define HDA_CODEC_VT1708_B      HDA_CODEC_CONSTRUCT(VIA, 0x170b)
 588 #define HDA_CODEC_VT1709_0      HDA_CODEC_CONSTRUCT(VIA, 0xe710)
 589 #define HDA_CODEC_VT1709_1      HDA_CODEC_CONSTRUCT(VIA, 0xe711)
 590 #define HDA_CODEC_VT1709_2      HDA_CODEC_CONSTRUCT(VIA, 0xe712)
 591 #define HDA_CODEC_VT1709_3      HDA_CODEC_CONSTRUCT(VIA, 0xe713)
 592 #define HDA_CODEC_VT1709_4      HDA_CODEC_CONSTRUCT(VIA, 0xe714)
 593 #define HDA_CODEC_VT1709_5      HDA_CODEC_CONSTRUCT(VIA, 0xe715)
 594 #define HDA_CODEC_VT1709_6      HDA_CODEC_CONSTRUCT(VIA, 0xe716)
 595 #define HDA_CODEC_VT1709_7      HDA_CODEC_CONSTRUCT(VIA, 0xe717)
 596 #define HDA_CODEC_VTXXXX        HDA_CODEC_CONSTRUCT(VIA, 0xffff)
 597
 598
 599 /* Codecs */
 600 static const struct {
 601         uint32_t id;
 602         char *name;
 603 } hdac_codecs[] = {
 604         { HDA_CODEC_ALC260,    "Realtek ALC260" },
 605         { HDA_CODEC_ALC262,    "Realtek ALC262" },
 606         { HDA_CODEC_ALC268,    "Realtek ALC268" },
 607         { HDA_CODEC_ALC269,    "Realtek ALC269" },
 608         { HDA_CODEC_ALC660,    "Realtek ALC660" },
 609         { HDA_CODEC_ALC861,    "Realtek ALC861" },
 610         { HDA_CODEC_ALC861VD,  "Realtek ALC861-VD" },
 611         { HDA_CODEC_ALC880,    "Realtek ALC880" },
 612         { HDA_CODEC_ALC882,    "Realtek ALC882" },
 613         { HDA_CODEC_ALC883,    "Realtek ALC883" },
 614         { HDA_CODEC_ALC885,    "Realtek ALC885" },
 615         { HDA_CODEC_ALC888,    "Realtek ALC888" },
 616         { HDA_CODEC_AD1981HD,  "Analog Devices AD1981HD" },
 617         { HDA_CODEC_AD1983,    "Analog Devices AD1983" },
 618         { HDA_CODEC_AD1984,    "Analog Devices AD1984" },
 619         { HDA_CODEC_AD1986A,   "Analog Devices AD1986A" },
 620         { HDA_CODEC_AD1988,    "Analog Devices AD1988" },
 621         { HDA_CODEC_AD1988B,   "Analog Devices AD1988B" },
 622         { HDA_CODEC_CMI9880,   "CMedia CMI9880" },
 623         { HDA_CODEC_STAC9221,  "Sigmatel STAC9221" },
 624         { HDA_CODEC_STAC9221D, "Sigmatel STAC9221D" },
 625         { HDA_CODEC_STAC9220,  "Sigmatel STAC9220" },
 626         { HDA_CODEC_STAC922XD, "Sigmatel STAC9220D/9223D" },
 627         { HDA_CODEC_STAC9227,  "Sigmatel STAC9227" },
 628         { HDA_CODEC_STAC9271D, "Sigmatel STAC9271D" },
 629         { HDA_CODEC_CXVENICE,  "Conexant Venice" },
 630         { HDA_CODEC_CXWAIKIKI, "Conexant Waikiki" },
 631         { HDA_CODEC_VT1708_8,  "VIA VT1708_8" },
 632         { HDA_CODEC_VT1708_9,  "VIA VT1708_9" },
 633         { HDA_CODEC_VT1708_A,  "VIA VT1708_A" },
 634         { HDA_CODEC_VT1708_B,  "VIA VT1708_B" },
 635         { HDA_CODEC_VT1709_0,  "VIA VT1709_0" },
 636         { HDA_CODEC_VT1709_1,  "VIA VT1709_1" },
 637         { HDA_CODEC_VT1709_2,  "VIA VT1709_2" },
 638         { HDA_CODEC_VT1709_3,  "VIA VT1709_3" },
 639         { HDA_CODEC_VT1709_4,  "VIA VT1709_4" },
 640         { HDA_CODEC_VT1709_5,  "VIA VT1709_5" },
 641         { HDA_CODEC_VT1709_6,  "VIA VT1709_6" },
 642         { HDA_CODEC_VT1709_7,  "VIA VT1709_7" },
 643         /* Unknown codec */
 644         { HDA_CODEC_ALCXXXX,   "Realtek (Unknown)" },
 645         { HDA_CODEC_ADXXXX,    "Analog Devices (Unknown)" },
 646         { HDA_CODEC_CMIXXXX,   "CMedia (Unknown)" },
 647         { HDA_CODEC_STACXXXX,  "Sigmatel (Unknown)" },
 648         { HDA_CODEC_CXXXXX,    "Conexant (Unknown)" },
 649         { HDA_CODEC_VTXXXX,    "VIA (Unknown)" },
 650 };
 651 #define HDAC_CODECS_LEN NELEM(hdac_codecs)
 652
 653 enum {
 654         HDAC_HP_SWITCH_CTL,
 655         HDAC_HP_SWITCH_CTRL,
 656         HDAC_HP_SWITCH_DEBUG
 657 };
 658
 659 static const struct {
 660         uint32_t model;
 661         uint32_t id;
 662         int type;
 663         int inverted;
 664         int polling;
 665         int execsense;
 666         nid_t hpnid;
 667         nid_t spkrnid[8];
 668         nid_t eapdnid;
 669 } hdac_hp_switch[] = {
 670         /* Specific OEM models */
 671         { HP_V3000_SUBVENDOR, HDA_CODEC_CXVENICE, HDAC_HP_SWITCH_CTL,
 672             0, 0, -1, 17, { 16, -1 }, 16 },
 673         /* { HP_XW4300_SUBVENDOR, HDA_CODEC_ALC260, HDAC_HP_SWITCH_CTL,
 674             0, 0, -1, 21, { 16, 17, -1 }, -1 } */
 675         /* { HP_3010_SUBVENDOR,  HDA_CODEC_ALC260, HDAC_HP_SWITCH_DEBUG,
 676             0, 1, 0, 16, { 15, 18, 19, 20, 21, -1 }, -1 }, */
 677         { HP_NX7400_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 678             0, 0, -1, 6, { 5, -1 }, 5 },
 679         { HP_NX6310_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 680             0, 0, -1, 6, { 5, -1 }, 5 },
 681         { HP_NX6325_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 682             0, 0, -1, 6, { 5, -1 }, 5 },
 683         /* { HP_DC7700_SUBVENDOR, HDA_CODEC_ALC262, HDAC_HP_SWITCH_CTL,
 684             0, 0, -1, 21, { 22, 27, -1 }, -1 }, */
 685         { TOSHIBA_U200_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 686             0, 0, -1, 6, { 5, -1 }, -1 },
 687         { TOSHIBA_A135_SUBVENDOR, HDA_CODEC_ALC861VD, HDAC_HP_SWITCH_CTL,
 688             0, 0, -1, 27, { 20, -1 }, -1 },
 689         { DELL_D820_SUBVENDOR, HDA_CODEC_STAC9220, HDAC_HP_SWITCH_CTRL,
 690             0, 0, -1, 13, { 14, -1 }, -1 },
 691         { DELL_I1300_SUBVENDOR, HDA_CODEC_STAC9220, HDAC_HP_SWITCH_CTRL,
 692             0, 0, -1, 13, { 14, -1 }, -1 },
 693         { DELL_OPLX745_SUBVENDOR, HDA_CODEC_AD1983, HDAC_HP_SWITCH_CTL,
 694             0, 0, -1, 6, { 5, 7, -1 }, -1 },
 695         { APPLE_MB3_SUBVENDOR, HDA_CODEC_ALC885, HDAC_HP_SWITCH_CTL,
 696             0, 0, -1, 21, { 20, 22, -1 }, -1 },
 697         { APPLE_INTEL_MAC, HDA_CODEC_STAC9221, HDAC_HP_SWITCH_CTRL,
 698             0, 0, -1, 10, { 13, -1 }, -1 },
 699         { LENOVO_3KN100_SUBVENDOR, HDA_CODEC_AD1986A, HDAC_HP_SWITCH_CTL,
 700             1, 0, -1, 26, { 27, -1 }, -1 },
 701         /* { LENOVO_TCA55_SUBVENDOR, HDA_CODEC_AD1986A, HDAC_HP_SWITCH_CTL,
 702             0, 0, -1, 26, { 27, 28, 29, 30, -1 }, -1 }, */
 703         { LG_LW20_SUBVENDOR, HDA_CODEC_ALC880, HDAC_HP_SWITCH_CTL,
 704             0, 0, -1, 27, { 20, -1 }, -1 },
 705         { ACER_A5050_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 706             0, 0, -1, 20, { 21, -1 }, -1 },
 707         { ACER_3681WXM_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 708             0, 0, -1, 20, { 21, -1 }, -1 },
 709         { ACER_A4520_SUBVENDOR, HDA_CODEC_ALC268, HDAC_HP_SWITCH_CTL,
 710             0, 0, -1, 20, { 21, -1 }, -1 },
 711         { ACER_A1H2_SUBVENDOR, HDA_CODEC_ALC269, HDAC_HP_SWITCH_CTL,
 712             0, 0, -1, 33, { 20, -1 }, -1 },
 713         { UNIWILL_9080_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 714             0, 0, -1, 20, { 21, -1 }, -1 },
 715         { MSI_MS1034_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 716             0, 0, -1, 20, { 27, -1 }, -1 },
 717         { MSI_MS034A_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 718             0, 0, -1, 20, { 27, -1 }, -1 },
 719         { FS_SI1848_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 720             0, 0, -1, 20, { 21, -1 }, -1 },
 721         { FL_S7020D_SUBVENDOR, HDA_CODEC_ALC260, HDAC_HP_SWITCH_CTL,
 722             0, 0, -1, 20, { 16, -1 }, -1 },
 723         /*
 724          * All models that at least come from the same vendor with
 725          * simmilar codec.
 726          */
 727         { HP_ALL_SUBVENDOR, HDA_CODEC_CXVENICE, HDAC_HP_SWITCH_CTL,
 728             0, 0, -1, 17, { 16, -1 }, 16 },
 729         { HP_ALL_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 730             0, 0, -1, 6, { 5, -1 }, 5 },
 731         { TOSHIBA_ALL_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 732             0, 0, -1, 6, { 5, -1 }, -1 },
 733         { DELL_ALL_SUBVENDOR, HDA_CODEC_STAC9220, HDAC_HP_SWITCH_CTRL,
 734             0, 0, -1, 13, { 14, -1 }, -1 },
 735 #if 0
 736         { LENOVO_ALL_SUBVENDOR, HDA_CODEC_AD1986A, HDAC_HP_SWITCH_CTL,
 737             1, 0, -1, 26, { 27, -1 }, -1 },
 738         { ACER_ALL_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 739             0, 0, -1, 20, { 21, -1 }, -1 },
 740 #endif
 741 };
 742 #define HDAC_HP_SWITCH_LEN NELEM(hdac_hp_switch)
 743
 744 static const struct {
 745         uint32_t model;
 746         uint32_t id;
 747         nid_t eapdnid;
 748         int hp_switch;
 749 } hdac_eapd_switch[] = {
 750         { HP_V3000_SUBVENDOR, HDA_CODEC_CXVENICE, 16, 1 },
 751         { HP_NX7400_SUBVENDOR, HDA_CODEC_AD1981HD, 5, 1 },
 752         { HP_NX6310_SUBVENDOR, HDA_CODEC_AD1981HD, 5, 1 },
 753 };
 754 #define HDAC_EAPD_SWITCH_LEN NELEM(hdac_eapd_switch)
 755
 756 /****************************************************************************
 757  * Function prototypes
 758  ****************************************************************************/
 759 static void     hdac_intr_handler(void *);
 760 static int      hdac_reset(struct hdac_softc *);
 761 static int      hdac_get_capabilities(struct hdac_softc *);
 762 static void     hdac_dma_cb(void *, bus_dma_segment_t *, int, int);
 763 static int      hdac_dma_alloc(struct hdac_softc *,
 764                                         struct hdac_dma *, bus_size_t);
 765 static void     hdac_dma_free(struct hdac_softc *, struct hdac_dma *);
 766 static int      hdac_mem_alloc(struct hdac_softc *);
 767 static void     hdac_mem_free(struct hdac_softc *);
 768 static int      hdac_irq_alloc(struct hdac_softc *);
 769 static void     hdac_irq_free(struct hdac_softc *);
 770 static void     hdac_corb_init(struct hdac_softc *);
 771 static void     hdac_rirb_init(struct hdac_softc *);
 772 static void     hdac_corb_start(struct hdac_softc *);
 773 static void     hdac_rirb_start(struct hdac_softc *);
 774 static void     hdac_scan_codecs(struct hdac_softc *, int);
 775 static int      hdac_probe_codec(struct hdac_codec *);
 776 static struct   hdac_devinfo *hdac_probe_function(struct hdac_codec *, nid_t);
 777 static void     hdac_add_child(struct hdac_softc *, struct hdac_devinfo *);
 778
 779 static void     hdac_attach2(void *);
 780
 781 static uint32_t hdac_command_sendone_internal(struct hdac_softc *,
 782                                                         uint32_t, int);
 783 static void     hdac_command_send_internal(struct hdac_softc *,
 784                                         struct hdac_command_list *, int);
 785
 786 static int      hdac_probe(device_t);
 787 static int      hdac_attach(device_t);
 788 static int      hdac_detach(device_t);
 789 static void     hdac_widget_connection_select(struct hdac_widget *, uint8_t);
 790 static void     hdac_audio_ctl_amp_set(struct hdac_audio_ctl *,
 791                                                 uint32_t, int, int);
 792 static struct   hdac_audio_ctl *hdac_audio_ctl_amp_get(struct hdac_devinfo *,
 793                                                         nid_t, int, int);
 794 static void     hdac_audio_ctl_amp_set_internal(struct hdac_softc *,
 795                                 nid_t, nid_t, int, int, int, int, int, int);
 796 static int      hdac_audio_ctl_ossmixer_getnextdev(struct hdac_devinfo *);
 797 static struct   hdac_widget *hdac_widget_get(struct hdac_devinfo *, nid_t);
 798
 799 static int      hdac_rirb_flush(struct hdac_softc *sc);
 800 static int      hdac_unsolq_flush(struct hdac_softc *sc);
 801
 802 #define hdac_command(a1, a2, a3)        \
 803                 hdac_command_sendone_internal(a1, a2, a3)
 804
 805 #define hdac_codec_id(d)                                                \
 806                 ((uint32_t)((d == NULL) ? 0x00000000 :                  \
 807                 ((((uint32_t)(d)->vendor_id & 0x0000ffff) << 16) |      \
 808                 ((uint32_t)(d)->device_id & 0x0000ffff))))
 809
 810 static char *
 811 hdac_codec_name(struct hdac_devinfo *devinfo)
 812 {
 813         uint32_t id;
 814         int i;
 815
 816         id = hdac_codec_id(devinfo);
 817
 818         for (i = 0; i < HDAC_CODECS_LEN; i++) {
 819                 if (HDA_DEV_MATCH(hdac_codecs[i].id, id))
 820                         return (hdac_codecs[i].name);
 821         }
 822
 823         return ((id == 0x00000000) ? "NULL Codec" : "Unknown Codec");
 824 }
 825
 826 static char *
 827 hdac_audio_ctl_ossmixer_mask2name(uint32_t devmask)
 828 {
 829         static char *ossname[] = SOUND_DEVICE_NAMES;
 830         static char *unknown = "???";
 831         int i;
 832
 833         for (i = SOUND_MIXER_NRDEVICES - 1; i >= 0; i--) {
 834                 if (devmask & (1 << i))
 835                         return (ossname[i]);
 836         }
 837         return (unknown);
 838 }
 839
 840 static void
 841 hdac_audio_ctl_ossmixer_mask2allname(uint32_t mask, char *buf, size_t len)
 842 {
 843         static char *ossname[] = SOUND_DEVICE_NAMES;
 844         int i, first = 1;
 845
 846         bzero(buf, len);
 847         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
 848                 if (mask & (1 << i)) {
 849                         if (first == 0)
 850                                 strlcat(buf, ", ", len);
 851                         strlcat(buf, ossname[i], len);
 852                         first = 0;
 853                 }
 854         }
 855 }
 856
 857 static struct hdac_audio_ctl *
 858 hdac_audio_ctl_each(struct hdac_devinfo *devinfo, int *index)
 859 {
 860         if (devinfo == NULL ||
 861             devinfo->node_type != HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO ||
 862             index == NULL || devinfo->function.audio.ctl == NULL ||
 863             devinfo->function.audio.ctlcnt < 1 ||
 864             *index < 0 || *index >= devinfo->function.audio.ctlcnt)
 865                 return (NULL);
 866         return (&devinfo->function.audio.ctl[(*index)++]);
 867 }
 868
 869 static struct hdac_audio_ctl *
 870 hdac_audio_ctl_amp_get(struct hdac_devinfo *devinfo, nid_t nid,
 871                                                 int index, int cnt)
 872 {
 873         struct hdac_audio_ctl *ctl, *retctl = NULL;
 874         int i, at, atindex, found = 0;
 875
 876         if (devinfo == NULL || devinfo->function.audio.ctl == NULL)
 877                 return (NULL);
 878
 879         at = cnt;
 880         if (at == 0)
 881                 at = 1;
 882         else if (at < 0)
 883                 at = -1;
 884         atindex = index;
 885         if (atindex < 0)
 886                 atindex = -1;
 887
 888         i = 0;
 889         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
 890                 if (ctl->enable == 0 || ctl->widget == NULL)
 891                         continue;
 892                 if (!(ctl->widget->nid == nid && (atindex == -1 ||
 893                     ctl->index == atindex)))
 894                         continue;
 895                 found++;
 896                 if (found == cnt)
 897                         return (ctl);
 898                 retctl = ctl;
 899         }
 900
 901         return ((at == -1) ? retctl : NULL);
 902 }
 903
 904 static void
 905 hdac_hp_switch_handler(struct hdac_devinfo *devinfo)
 906 {
 907         struct hdac_softc *sc;
 908         struct hdac_widget *w;
 909         struct hdac_audio_ctl *ctl;
 910         uint32_t val, id, res;
 911         int i = 0, j, timeout, forcemute;
 912         nid_t cad;
 913
 914         if (devinfo == NULL || devinfo->codec == NULL ||
 915             devinfo->codec->sc == NULL)
 916                 return;
 917
 918         sc = devinfo->codec->sc;
 919         cad = devinfo->codec->cad;
 920         id = hdac_codec_id(devinfo);
 921         for (i = 0; i < HDAC_HP_SWITCH_LEN; i++) {
 922                 if (HDA_DEV_MATCH(hdac_hp_switch[i].model,
 923                     sc->pci_subvendor) &&
 924                     hdac_hp_switch[i].id == id)
 925                         break;
 926         }
 927
 928         if (i >= HDAC_HP_SWITCH_LEN)
 929                 return;
 930
 931         forcemute = 0;
 932         if (hdac_hp_switch[i].eapdnid != -1) {
 933                 w = hdac_widget_get(devinfo, hdac_hp_switch[i].eapdnid);
 934                 if (w != NULL && w->param.eapdbtl != HDAC_INVALID)
 935                         forcemute = (w->param.eapdbtl &
 936                             HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD) ? 0 : 1;
 937         }
 938
 939         if (hdac_hp_switch[i].execsense != -1)
 940                 hdac_command(sc,
 941                     HDA_CMD_SET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid,
 942                     hdac_hp_switch[i].execsense), cad);
 943
 944         timeout = 10000;
 945         do {
 946                 res = hdac_command(sc,
 947                     HDA_CMD_GET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid),
 948                     cad);
 949                 if (hdac_hp_switch[i].execsense == -1 || res != 0x7fffffff)
 950                         break;
 951                 DELAY(10);
 952         } while (--timeout != 0);
 953
 954         HDA_BOOTVERBOSE(
 955                 device_printf(sc->dev,
 956                     "HDA_DEBUG: Pin sense: nid=%d timeout=%d res=0x%08x\n",
 957                     hdac_hp_switch[i].hpnid, timeout, res);
 958         );
 959
 960         res = HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT(res);
 961         res ^= hdac_hp_switch[i].inverted;
 962
 963         switch (hdac_hp_switch[i].type) {
 964         case HDAC_HP_SWITCH_CTL:
 965                 ctl = hdac_audio_ctl_amp_get(devinfo,
 966                     hdac_hp_switch[i].hpnid, 0, 1);
 967                 if (ctl != NULL) {
 968                         val = (res != 0 && forcemute == 0) ?
 969                             HDA_AMP_MUTE_NONE : HDA_AMP_MUTE_ALL;
 970                         if (val != ctl->muted) {
 971                                 ctl->muted = val;
 972                                 hdac_audio_ctl_amp_set(ctl,
 973                                     HDA_AMP_MUTE_DEFAULT, ctl->left,
 974                                     ctl->right);
 975                         }
 976                 }
 977                 for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
 978                         ctl = hdac_audio_ctl_amp_get(devinfo,
 979                             hdac_hp_switch[i].spkrnid[j], 0, 1);
 980                         if (ctl == NULL)
 981                                 continue;
 982                         val = (res != 0 || forcemute == 1) ?
 983                             HDA_AMP_MUTE_ALL : HDA_AMP_MUTE_NONE;
 984                         if (val == ctl->muted)
 985                                 continue;
 986                         ctl->muted = val;
 987                         hdac_audio_ctl_amp_set(ctl, HDA_AMP_MUTE_DEFAULT,
 988                             ctl->left, ctl->right);
 989                 }
 990                 break;
 991         case HDAC_HP_SWITCH_CTRL:
 992                 if (res != 0) {
 993                         /* HP in */
 994                         w = hdac_widget_get(devinfo, hdac_hp_switch[i].hpnid);
 995                         if (w != NULL && w->type ==
 996                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
 997                                 if (forcemute == 0)
 998                                         val = w->wclass.pin.ctrl |
 999                                             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1000                                 else
1001                                         val = w->wclass.pin.ctrl &
1002                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1003                                 if (val != w->wclass.pin.ctrl) {
1004                                         w->wclass.pin.ctrl = val;
1005                                         hdac_command(sc,
1006                                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad,
1007                                             w->nid, w->wclass.pin.ctrl), cad);
1008                                 }
1009                         }
1010                         for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
1011                                 w = hdac_widget_get(devinfo,
1012                                     hdac_hp_switch[i].spkrnid[j]);
1013                                 if (w == NULL || w->type !=
1014                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1015                                         continue;
1016                                 val = w->wclass.pin.ctrl &
1017                                     ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1018                                 if (val == w->wclass.pin.ctrl)
1019                                         continue;
1020                                 w->wclass.pin.ctrl = val;
1021                                 hdac_command(sc, HDA_CMD_SET_PIN_WIDGET_CTRL(
1022                                     cad, w->nid, w->wclass.pin.ctrl), cad);
1023                         }
1024                 } else {
1025                         /* HP out */
1026                         w = hdac_widget_get(devinfo, hdac_hp_switch[i].hpnid);
1027                         if (w != NULL && w->type ==
1028                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
1029                                 val = w->wclass.pin.ctrl &
1030                                     ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1031                                 if (val != w->wclass.pin.ctrl) {
1032                                         w->wclass.pin.ctrl = val;
1033                                         hdac_command(sc,
1034                                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad,
1035                                             w->nid, w->wclass.pin.ctrl), cad);
1036                                 }
1037                         }
1038                         for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
1039                                 w = hdac_widget_get(devinfo,
1040                                     hdac_hp_switch[i].spkrnid[j]);
1041                                 if (w == NULL || w->type !=
1042                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1043                                         continue;
1044                                 if (forcemute == 0)
1045                                         val = w->wclass.pin.ctrl |
1046                                             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1047                                 else
1048                                         val = w->wclass.pin.ctrl &
1049                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1050                                 if (val == w->wclass.pin.ctrl)
1051                                         continue;
1052                                 w->wclass.pin.ctrl = val;
1053                                 hdac_command(sc, HDA_CMD_SET_PIN_WIDGET_CTRL(
1054                                     cad, w->nid, w->wclass.pin.ctrl), cad);
1055                         }
1056                 }
1057                 break;
1058         case HDAC_HP_SWITCH_DEBUG:
1059                 if (hdac_hp_switch[i].execsense != -1)
1060                         hdac_command(sc,
1061                             HDA_CMD_SET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid,
1062                             hdac_hp_switch[i].execsense), cad);
1063                 res = hdac_command(sc,
1064                     HDA_CMD_GET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid), cad);
1065                 device_printf(sc->dev,
1066                     "[ 0] HDA_DEBUG: Pin sense: nid=%d res=0x%08x\n",
1067                     hdac_hp_switch[i].hpnid, res);
1068                 for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
1069                         w = hdac_widget_get(devinfo,
1070                             hdac_hp_switch[i].spkrnid[j]);
1071                         if (w == NULL || w->type !=
1072                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1073                                 continue;
1074                         if (hdac_hp_switch[i].execsense != -1)
1075                                 hdac_command(sc,
1076                                     HDA_CMD_SET_PIN_SENSE(cad, w->nid,
1077                                     hdac_hp_switch[i].execsense), cad);
1078                         res = hdac_command(sc,
1079                             HDA_CMD_GET_PIN_SENSE(cad, w->nid), cad);
1080                         device_printf(sc->dev,
1081                             "[%2d] HDA_DEBUG: Pin sense: nid=%d res=0x%08x\n",
1082                             j + 1, w->nid, res);
1083                 }
1084                 break;
1085         default:
1086                 break;
1087         }
1088 }
1089
1090 static void
1091 hdac_unsolicited_handler(struct hdac_codec *codec, uint32_t tag)
1092 {
1093         struct hdac_softc *sc;
1094         struct hdac_devinfo *devinfo = NULL;
1095         device_t *devlist = NULL;
1096         int devcount, i;
1097
1098         if (codec == NULL || codec->sc == NULL)
1099                 return;
1100
1101         sc = codec->sc;
1102
1103         HDA_BOOTVERBOSE(
1104                 device_printf(sc->dev, "HDA_DEBUG: Unsol Tag: 0x%08x\n", tag);
1105         );
1106
1107         device_get_children(sc->dev, &devlist, &devcount);
1108         for (i = 0; devlist != NULL && i < devcount; i++) {
1109                 devinfo = (struct hdac_devinfo *)device_get_ivars(devlist[i]);
1110                 if (devinfo != NULL && devinfo->node_type ==
1111                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO &&
1112                     devinfo->codec != NULL &&
1113                     devinfo->codec->cad == codec->cad) {
1114                         break;
1115                 } else
1116                         devinfo = NULL;
1117         }
1118         if (devlist != NULL)
1119                 kfree(devlist, M_TEMP);
1120
1121         if (devinfo == NULL)
1122                 return;
1123
1124         switch (tag) {
1125         case HDAC_UNSOLTAG_EVENT_HP:
1126                 hdac_hp_switch_handler(devinfo);
1127                 break;
1128         case HDAC_UNSOLTAG_EVENT_TEST:
1129                 device_printf(sc->dev, "Unsol Test!\n");
1130                 break;
1131         default:
1132                 break;
1133         }
1134 }
1135
1136 static int
1137 hdac_stream_intr(struct hdac_softc *sc, struct hdac_chan *ch)
1138 {
1139         /* XXX to be removed */
1140 #ifdef HDAC_INTR_EXTRA
1141         uint32_t res;
1142 #endif
1143
1144         if (!(ch->flags & HDAC_CHN_RUNNING))
1145                 return (0);
1146
1147         /* XXX to be removed */
1148 #ifdef HDAC_INTR_EXTRA
1149         res = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDSTS);
1150 #endif
1151
1152         /* XXX to be removed */
1153 #ifdef HDAC_INTR_EXTRA
1154         HDA_BOOTVERBOSE(
1155                 if (res & (HDAC_SDSTS_DESE | HDAC_SDSTS_FIFOE))
1156                         device_printf(sc->dev,
1157                             "PCMDIR_%s intr triggered beyond stream boundary:"
1158                             "%08x\n",
1159                             (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC", res);
1160         );
1161 #endif
1162
1163         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDSTS,
1164             HDAC_SDSTS_DESE | HDAC_SDSTS_FIFOE | HDAC_SDSTS_BCIS );
1165
1166         /* XXX to be removed */
1167 #ifdef HDAC_INTR_EXTRA
1168         if (res & HDAC_SDSTS_BCIS) {
1169 #endif
1170                 return (1);
1171         /* XXX to be removed */
1172 #ifdef HDAC_INTR_EXTRA
1173         }
1174 #endif
1175
1176         return (0);
1177 }
1178
1179 /****************************************************************************
1180  * void hdac_intr_handler(void *)
1181  *
1182  * Interrupt handler. Processes interrupts received from the hdac.
1183  ****************************************************************************/
1184 static void
1185 hdac_intr_handler(void *context)
1186 {
1187         struct hdac_softc *sc;
1188         uint32_t intsts;
1189         uint8_t rirbsts;
1190         uint32_t trigger;
1191
1192         sc = (struct hdac_softc *)context;
1193
1194         hdac_lock(sc);
1195         if (sc->polling != 0) {
1196                 hdac_unlock(sc);
1197                 return;
1198         }
1199
1200         /* Do we have anything to do? */
1201         intsts = HDAC_READ_4(&sc->mem, HDAC_INTSTS);
1202         if (!HDA_FLAG_MATCH(intsts, HDAC_INTSTS_GIS)) {
1203                 hdac_unlock(sc);
1204                 return;
1205         }
1206
1207         trigger = 0;
1208
1209         /* Was this a controller interrupt? */
1210         if (HDA_FLAG_MATCH(intsts, HDAC_INTSTS_CIS)) {
1211                 rirbsts = HDAC_READ_1(&sc->mem, HDAC_RIRBSTS);
1212                 /* Get as many responses that we can */
1213                 while (HDA_FLAG_MATCH(rirbsts, HDAC_RIRBSTS_RINTFL)) {
1214                         HDAC_WRITE_1(&sc->mem,
1215                             HDAC_RIRBSTS, HDAC_RIRBSTS_RINTFL);
1216                         if (hdac_rirb_flush(sc) != 0)
1217                                 trigger |= HDAC_TRIGGER_UNSOL;
1218                         rirbsts = HDAC_READ_1(&sc->mem, HDAC_RIRBSTS);
1219                 }
1220                 /* XXX to be removed */
1221                 /* Clear interrupt and exit */
1222 #ifdef HDAC_INTR_EXTRA
1223                 HDAC_WRITE_4(&sc->mem, HDAC_INTSTS, HDAC_INTSTS_CIS);
1224 #endif
1225         }
1226
1227         if (intsts & HDAC_INTSTS_SIS_MASK) {
1228                 if ((intsts & (1 << sc->num_iss)) &&
1229                     hdac_stream_intr(sc, &sc->play) != 0)
1230                         trigger |= HDAC_TRIGGER_PLAY;
1231                 if ((intsts & (1 << 0)) &&
1232                     hdac_stream_intr(sc, &sc->rec) != 0)
1233                         trigger |= HDAC_TRIGGER_REC;
1234                 /* XXX to be removed */
1235 #ifdef HDAC_INTR_EXTRA
1236                 HDAC_WRITE_4(&sc->mem, HDAC_INTSTS, intsts &
1237                     HDAC_INTSTS_SIS_MASK);
1238 #endif
1239         }
1240
1241         hdac_unlock(sc);
1242
1243         if (trigger & HDAC_TRIGGER_PLAY)
1244                 chn_intr(sc->play.c);
1245         if (trigger & HDAC_TRIGGER_REC)
1246                 chn_intr(sc->rec.c);
1247         if (trigger & HDAC_TRIGGER_UNSOL)
1248                 taskqueue_enqueue(taskqueue_swi, &sc->unsolq_task);
1249 }
1250
1251 /****************************************************************************
1252  * int hdac_reset(hdac_softc *)
1253  *
1254  * Reset the hdac to a quiescent and known state.
1255  ****************************************************************************/
1256 static int
1257 hdac_reset(struct hdac_softc *sc)
1258 {
1259         uint32_t gctl;
1260         int count, i;
1261
1262         /*
1263          * Stop all Streams DMA engine
1264          */
1265         for (i = 0; i < sc->num_iss; i++)
1266                 HDAC_WRITE_4(&sc->mem, HDAC_ISDCTL(sc, i), 0x0);
1267         for (i = 0; i < sc->num_oss; i++)
1268                 HDAC_WRITE_4(&sc->mem, HDAC_OSDCTL(sc, i), 0x0);
1269         for (i = 0; i < sc->num_bss; i++)
1270                 HDAC_WRITE_4(&sc->mem, HDAC_BSDCTL(sc, i), 0x0);
1271
1272         /*
1273          * Stop Control DMA engines.
1274          */
1275         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, 0x0);
1276         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, 0x0);
1277
1278         /*
1279          * Reset DMA position buffer.
1280          */
1281         HDAC_WRITE_4(&sc->mem, HDAC_DPIBLBASE, 0x0);
1282         HDAC_WRITE_4(&sc->mem, HDAC_DPIBUBASE, 0x0);
1283
1284         /*
1285          * Reset the controller. The reset must remain asserted for
1286          * a minimum of 100us.
1287          */
1288         gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1289         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, gctl & ~HDAC_GCTL_CRST);
1290         count = 10000;
1291         do {
1292                 gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1293                 if (!(gctl & HDAC_GCTL_CRST))
1294                         break;
1295                 DELAY(10);
1296         } while (--count);
1297         if (gctl & HDAC_GCTL_CRST) {
1298                 device_printf(sc->dev, "Unable to put hdac in reset\n");
1299                 return (ENXIO);
1300         }
1301         DELAY(100);
1302         gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1303         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, gctl | HDAC_GCTL_CRST);
1304         count = 10000;
1305         do {
1306                 gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1307                 if (gctl & HDAC_GCTL_CRST)
1308                         break;
1309                 DELAY(10);
1310         } while (--count);
1311         if (!(gctl & HDAC_GCTL_CRST)) {
1312                 device_printf(sc->dev, "Device stuck in reset\n");
1313                 return (ENXIO);
1314         }
1315
1316         /*
1317          * Wait for codecs to finish their own reset sequence. The delay here
1318          * should be of 250us but for some reasons, on it's not enough on my
1319          * computer. Let's use twice as much as necessary to make sure that
1320          * it's reset properly.
1321          */
1322         DELAY(1000);
1323
1324         return (0);
1325 }
1326
1327
1328 /****************************************************************************
1329  * int hdac_get_capabilities(struct hdac_softc *);
1330  *
1331  * Retreive the general capabilities of the hdac;
1332  *      Number of Input Streams
1333  *      Number of Output Streams
1334  *      Number of bidirectional Streams
1335  *      64bit ready
1336  *      CORB and RIRB sizes
1337  ****************************************************************************/
1338 static int
1339 hdac_get_capabilities(struct hdac_softc *sc)
1340 {
1341         uint16_t gcap;
1342         uint8_t corbsize, rirbsize;
1343
1344         gcap = HDAC_READ_2(&sc->mem, HDAC_GCAP);
1345         sc->num_iss = HDAC_GCAP_ISS(gcap);
1346         sc->num_oss = HDAC_GCAP_OSS(gcap);
1347         sc->num_bss = HDAC_GCAP_BSS(gcap);
1348
1349         sc->support_64bit = HDA_FLAG_MATCH(gcap, HDAC_GCAP_64OK);
1350
1351         corbsize = HDAC_READ_1(&sc->mem, HDAC_CORBSIZE);
1352         if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_256) ==
1353             HDAC_CORBSIZE_CORBSZCAP_256)
1354                 sc->corb_size = 256;
1355         else if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_16) ==
1356             HDAC_CORBSIZE_CORBSZCAP_16)
1357                 sc->corb_size = 16;
1358         else if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_2) ==
1359             HDAC_CORBSIZE_CORBSZCAP_2)
1360                 sc->corb_size = 2;
1361         else {
1362                 device_printf(sc->dev, "%s: Invalid corb size (%x)\n",
1363                     __func__, corbsize);
1364                 return (ENXIO);
1365         }
1366
1367         rirbsize = HDAC_READ_1(&sc->mem, HDAC_RIRBSIZE);
1368         if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_256) ==
1369             HDAC_RIRBSIZE_RIRBSZCAP_256)
1370                 sc->rirb_size = 256;
1371         else if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_16) ==
1372             HDAC_RIRBSIZE_RIRBSZCAP_16)
1373                 sc->rirb_size = 16;
1374         else if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_2) ==
1375             HDAC_RIRBSIZE_RIRBSZCAP_2)
1376                 sc->rirb_size = 2;
1377         else {
1378                 device_printf(sc->dev, "%s: Invalid rirb size (%x)\n",
1379                     __func__, rirbsize);
1380                 return (ENXIO);
1381         }
1382
1383         return (0);
1384 }
1385
1386
1387 /****************************************************************************
1388  * void hdac_dma_cb
1389  *
1390  * This function is called by bus_dmamap_load when the mapping has been
1391  * established. We just record the physical address of the mapping into
1392  * the struct hdac_dma passed in.
1393  ****************************************************************************/
1394 static void
1395 hdac_dma_cb(void *callback_arg, bus_dma_segment_t *segs, int nseg, int error)
1396 {
1397         struct hdac_dma *dma;
1398
1399         if (error == 0) {
1400                 dma = (struct hdac_dma *)callback_arg;
1401                 dma->dma_paddr = segs[0].ds_addr;
1402         }
1403 }
1404
1405
1406 /****************************************************************************
1407  * int hdac_dma_alloc
1408  *
1409  * This function allocate and setup a dma region (struct hdac_dma).
1410  * It must be freed by a corresponding hdac_dma_free.
1411  ****************************************************************************/
1412 static int
1413 hdac_dma_alloc(struct hdac_softc *sc, struct hdac_dma *dma, bus_size_t size)
1414 {
1415         bus_size_t roundsz;
1416         int result;
1417         bus_addr_t lowaddr;
1418
1419         roundsz = roundup2(size, HDAC_DMA_ALIGNMENT);
1420         lowaddr = (sc->support_64bit) ? BUS_SPACE_MAXADDR :
1421             BUS_SPACE_MAXADDR_32BIT;
1422         bzero(dma, sizeof(*dma));
1423
1424         /*
1425          * Create a DMA tag
1426          */
1427         result = bus_dma_tag_create(NULL,       /* parent */
1428             HDAC_DMA_ALIGNMENT,                 /* alignment */
1429             0,                                  /* boundary */
1430             lowaddr,                            /* lowaddr */
1431             BUS_SPACE_MAXADDR,                  /* highaddr */
1432             NULL,                               /* filtfunc */
1433             NULL,                               /* fistfuncarg */
1434             roundsz,                            /* maxsize */
1435             1,                                  /* nsegments */
1436             roundsz,                            /* maxsegsz */
1437             0,                                  /* flags */
1438             &dma->dma_tag);                     /* dmat */
1439         if (result != 0) {
1440                 device_printf(sc->dev, "%s: bus_dma_tag_create failed (%x)\n",
1441                     __func__, result);
1442                 goto hdac_dma_alloc_fail;
1443         }
1444
1445         /*
1446          * Allocate DMA memory
1447          */
1448 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
1449         result = bus_dmamem_alloc(dma->dma_tag, (void **)&dma->dma_vaddr,
1450             BUS_DMA_NOWAIT | BUS_DMA_ZERO |
1451             ((sc->flags & HDAC_F_DMA_NOCACHE) ? BUS_DMA_NOCACHE : 0),
1452             &dma->dma_map);
1453 #else
1454         result = bus_dmamem_alloc(dma->dma_tag, (void **)&dma->dma_vaddr,
1455             BUS_DMA_NOWAIT | BUS_DMA_ZERO, &dma->dma_map);
1456 #endif
1457         if (result != 0) {
1458                 device_printf(sc->dev, "%s: bus_dmamem_alloc failed (%x)\n",
1459                     __func__, result);
1460                 goto hdac_dma_alloc_fail;
1461         }
1462
1463         dma->dma_size = roundsz;
1464
1465         /*
1466          * Map the memory
1467          */
1468         result = bus_dmamap_load(dma->dma_tag, dma->dma_map,
1469             (void *)dma->dma_vaddr, roundsz, hdac_dma_cb, (void *)dma, 0);
1470         if (result != 0 || dma->dma_paddr == 0) {
1471                 if (result == 0)
1472                         result = ENOMEM;
1473                 device_printf(sc->dev, "%s: bus_dmamem_load failed (%x)\n",
1474                     __func__, result);
1475                 goto hdac_dma_alloc_fail;
1476         }
1477
1478         HDA_BOOTVERBOSE(
1479                 device_printf(sc->dev, "%s: size=%ju -> roundsz=%ju\n",
1480                     __func__, (uintmax_t)size, (uintmax_t)roundsz);
1481         );
1482
1483         return (0);
1484
1485 hdac_dma_alloc_fail:
1486         hdac_dma_free(sc, dma);
1487
1488         return (result);
1489 }
1490
1491
1492 /****************************************************************************
1493  * void hdac_dma_free(struct hdac_softc *, struct hdac_dma *)
1494  *
1495  * Free a struct dhac_dma that has been previously allocated via the
1496  * hdac_dma_alloc function.
1497  ****************************************************************************/
1498 static void
1499 hdac_dma_free(struct hdac_softc *sc, struct hdac_dma *dma)
1500 {
1501         if (dma->dma_map != NULL) {
1502 #if 0
1503                 /* Flush caches */
1504                 bus_dmamap_sync(dma->dma_tag, dma->dma_map,
1505                     BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1506 #endif
1507                 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
1508         }
1509         if (dma->dma_vaddr != NULL) {
1510                 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
1511                 dma->dma_vaddr = NULL;
1512         }
1513         dma->dma_map = NULL;
1514         if (dma->dma_tag != NULL) {
1515                 bus_dma_tag_destroy(dma->dma_tag);
1516                 dma->dma_tag = NULL;
1517         }
1518         dma->dma_size = 0;
1519 }
1520
1521 /****************************************************************************
1522  * int hdac_mem_alloc(struct hdac_softc *)
1523  *
1524  * Allocate all the bus resources necessary to speak with the physical
1525  * controller.
1526  ****************************************************************************/
1527 static int
1528 hdac_mem_alloc(struct hdac_softc *sc)
1529 {
1530         struct hdac_mem *mem;
1531
1532         mem = &sc->mem;
1533         mem->mem_rid = PCIR_BAR(0);
1534         mem->mem_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY,
1535             &mem->mem_rid, RF_ACTIVE);
1536         if (mem->mem_res == NULL) {
1537                 device_printf(sc->dev,
1538                     "%s: Unable to allocate memory resource\n", __func__);
1539                 return (ENOMEM);
1540         }
1541         mem->mem_tag = rman_get_bustag(mem->mem_res);
1542         mem->mem_handle = rman_get_bushandle(mem->mem_res);
1543
1544         return (0);
1545 }
1546
1547 /****************************************************************************
1548  * void hdac_mem_free(struct hdac_softc *)
1549  *
1550  * Free up resources previously allocated by hdac_mem_alloc.
1551  ****************************************************************************/
1552 static void
1553 hdac_mem_free(struct hdac_softc *sc)
1554 {
1555         struct hdac_mem *mem;
1556
1557         mem = &sc->mem;
1558         if (mem->mem_res != NULL)
1559                 bus_release_resource(sc->dev, SYS_RES_MEMORY, mem->mem_rid,
1560                     mem->mem_res);
1561         mem->mem_res = NULL;
1562 }
1563
1564 /****************************************************************************
1565  * int hdac_irq_alloc(struct hdac_softc *)
1566  *
1567  * Allocate and setup the resources necessary for interrupt handling.
1568  ****************************************************************************/
1569 static int
1570 hdac_irq_alloc(struct hdac_softc *sc)
1571 {
1572         struct hdac_irq *irq;
1573         int result;
1574         u_int irq_flags;
1575
1576         irq = &sc->irq;
1577         irq->irq_rid = 0x0;
1578         irq->irq_type = pci_alloc_1intr(sc->dev, hdac_msi_enable,
1579             &irq->irq_rid, &irq_flags);
1580         irq->irq_res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ,
1581             &irq->irq_rid, irq_flags);
1582         if (irq->irq_res == NULL) {
1583                 device_printf(sc->dev, "%s: Unable to allocate irq\n",
1584                     __func__);
1585                 goto hdac_irq_alloc_fail;
1586         }
1587         result = snd_setup_intr(sc->dev, irq->irq_res, INTR_MPSAFE,
1588             hdac_intr_handler, sc, &irq->irq_handle);
1589         if (result != 0) {
1590                 device_printf(sc->dev,
1591                     "%s: Unable to setup interrupt handler (%x)\n",
1592                     __func__, result);
1593                 goto hdac_irq_alloc_fail;
1594         }
1595
1596         return (0);
1597
1598 hdac_irq_alloc_fail:
1599         hdac_irq_free(sc);
1600
1601         return (ENXIO);
1602 }
1603
1604 /****************************************************************************
1605  * void hdac_irq_free(struct hdac_softc *)
1606  *
1607  * Free up resources previously allocated by hdac_irq_alloc.
1608  ****************************************************************************/
1609 static void
1610 hdac_irq_free(struct hdac_softc *sc)
1611 {
1612         struct hdac_irq *irq;
1613
1614         irq = &sc->irq;
1615         if (irq->irq_res != NULL && irq->irq_handle != NULL)
1616                 bus_teardown_intr(sc->dev, irq->irq_res, irq->irq_handle);
1617         if (irq->irq_res != NULL)
1618                 bus_release_resource(sc->dev, SYS_RES_IRQ, irq->irq_rid,
1619                     irq->irq_res);
1620         if (irq->irq_type == PCI_INTR_TYPE_MSI)
1621                 pci_release_msi(sc->dev);
1622         irq->irq_handle = NULL;
1623         irq->irq_res = NULL;
1624         irq->irq_rid = 0x0;
1625 }
1626
1627 /****************************************************************************
1628  * void hdac_corb_init(struct hdac_softc *)
1629  *
1630  * Initialize the corb registers for operations but do not start it up yet.
1631  * The CORB engine must not be running when this function is called.
1632  ****************************************************************************/
1633 static void
1634 hdac_corb_init(struct hdac_softc *sc)
1635 {
1636         uint8_t corbsize;
1637         uint64_t corbpaddr;
1638
1639         /* Setup the CORB size. */
1640         switch (sc->corb_size) {
1641         case 256:
1642                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_256);
1643                 break;
1644         case 16:
1645                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_16);
1646                 break;
1647         case 2:
1648                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_2);
1649                 break;
1650         default:
1651                 panic("%s: Invalid CORB size (%x)", __func__, sc->corb_size);
1652         }
1653         HDAC_WRITE_1(&sc->mem, HDAC_CORBSIZE, corbsize);
1654
1655         /* Setup the CORB Address in the hdac */
1656         corbpaddr = (uint64_t)sc->corb_dma.dma_paddr;
1657         HDAC_WRITE_4(&sc->mem, HDAC_CORBLBASE, (uint32_t)corbpaddr);
1658         HDAC_WRITE_4(&sc->mem, HDAC_CORBUBASE, (uint32_t)(corbpaddr >> 32));
1659
1660         /* Set the WP and RP */
1661         sc->corb_wp = 0;
1662         HDAC_WRITE_2(&sc->mem, HDAC_CORBWP, sc->corb_wp);
1663         HDAC_WRITE_2(&sc->mem, HDAC_CORBRP, HDAC_CORBRP_CORBRPRST);
1664         /*
1665          * The HDA specification indicates that the CORBRPRST bit will always
1666          * read as zero. Unfortunately, it seems that at least the 82801G
1667          * doesn't reset the bit to zero, which stalls the corb engine.
1668          * manually reset the bit to zero before continuing.
1669          */
1670         HDAC_WRITE_2(&sc->mem, HDAC_CORBRP, 0x0);
1671
1672         /* Enable CORB error reporting */
1673 #if 0
1674         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, HDAC_CORBCTL_CMEIE);
1675 #endif
1676 }
1677
1678 /****************************************************************************
1679  * void hdac_rirb_init(struct hdac_softc *)
1680  *
1681  * Initialize the rirb registers for operations but do not start it up yet.
1682  * The RIRB engine must not be running when this function is called.
1683  ****************************************************************************/
1684 static void
1685 hdac_rirb_init(struct hdac_softc *sc)
1686 {
1687         uint8_t rirbsize;
1688         uint64_t rirbpaddr;
1689
1690         /* Setup the RIRB size. */
1691         switch (sc->rirb_size) {
1692         case 256:
1693                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_256);
1694                 break;
1695         case 16:
1696                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_16);
1697                 break;
1698         case 2:
1699                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_2);
1700                 break;
1701         default:
1702                 panic("%s: Invalid RIRB size (%x)", __func__, sc->rirb_size);
1703         }
1704         HDAC_WRITE_1(&sc->mem, HDAC_RIRBSIZE, rirbsize);
1705
1706         /* Setup the RIRB Address in the hdac */
1707         rirbpaddr = (uint64_t)sc->rirb_dma.dma_paddr;
1708         HDAC_WRITE_4(&sc->mem, HDAC_RIRBLBASE, (uint32_t)rirbpaddr);
1709         HDAC_WRITE_4(&sc->mem, HDAC_RIRBUBASE, (uint32_t)(rirbpaddr >> 32));
1710
1711         /* Setup the WP and RP */
1712         sc->rirb_rp = 0;
1713         HDAC_WRITE_2(&sc->mem, HDAC_RIRBWP, HDAC_RIRBWP_RIRBWPRST);
1714
1715         if (sc->polling == 0) {
1716                 /* Setup the interrupt threshold */
1717                 HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT, sc->rirb_size / 2);
1718
1719                 /* Enable Overrun and response received reporting */
1720 #if 0
1721                 HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL,
1722                     HDAC_RIRBCTL_RIRBOIC | HDAC_RIRBCTL_RINTCTL);
1723 #else
1724                 HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, HDAC_RIRBCTL_RINTCTL);
1725 #endif
1726         }
1727
1728 #if 0
1729         /*
1730          * Make sure that the Host CPU cache doesn't contain any dirty
1731          * cache lines that falls in the rirb. If I understood correctly, it
1732          * should be sufficient to do this only once as the rirb is purely
1733          * read-only from now on.
1734          */
1735         bus_dmamap_sync(sc->rirb_dma.dma_tag, sc->rirb_dma.dma_map,
1736             BUS_DMASYNC_PREREAD);
1737 #endif
1738 }
1739
1740 /****************************************************************************
1741  * void hdac_corb_start(hdac_softc *)
1742  *
1743  * Startup the corb DMA engine
1744  ****************************************************************************/
1745 static void
1746 hdac_corb_start(struct hdac_softc *sc)
1747 {
1748         uint32_t corbctl;
1749
1750         corbctl = HDAC_READ_1(&sc->mem, HDAC_CORBCTL);
1751         corbctl |= HDAC_CORBCTL_CORBRUN;
1752         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, corbctl);
1753 }
1754
1755 /****************************************************************************
1756  * void hdac_rirb_start(hdac_softc *)
1757  *
1758  * Startup the rirb DMA engine
1759  ****************************************************************************/
1760 static void
1761 hdac_rirb_start(struct hdac_softc *sc)
1762 {
1763         uint32_t rirbctl;
1764
1765         rirbctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
1766         rirbctl |= HDAC_RIRBCTL_RIRBDMAEN;
1767         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, rirbctl);
1768 }
1769
1770
1771 /****************************************************************************
1772  * void hdac_scan_codecs(struct hdac_softc *, int)
1773  *
1774  * Scan the bus for available codecs, starting with num.
1775  ****************************************************************************/
1776 static void
1777 hdac_scan_codecs(struct hdac_softc *sc, int num)
1778 {
1779         struct hdac_codec *codec;
1780         int i;
1781         uint16_t statests;
1782
1783         if (num < 0)
1784                 num = 0;
1785         if (num >= HDAC_CODEC_MAX)
1786                 num = HDAC_CODEC_MAX - 1;
1787
1788         statests = HDAC_READ_2(&sc->mem, HDAC_STATESTS);
1789         for (i = num; i < HDAC_CODEC_MAX; i++) {
1790                 if (HDAC_STATESTS_SDIWAKE(statests, i)) {
1791                         /* We have found a codec. */
1792                         codec = kmalloc(sizeof(*codec), M_HDAC,
1793                                         M_ZERO | M_WAITOK);
1794                         codec->commands = NULL;
1795                         codec->responses_received = 0;
1796                         codec->verbs_sent = 0;
1797                         codec->sc = sc;
1798                         codec->cad = i;
1799                         sc->codecs[i] = codec;
1800                         if (hdac_probe_codec(codec) != 0)
1801                                 break;
1802                 }
1803         }
1804         /* All codecs have been probed, now try to attach drivers to them */
1805         /* bus_generic_attach(sc->dev); */
1806 }
1807
1808 /****************************************************************************
1809  * void hdac_probe_codec(struct hdac_softc *, int)
1810  *
1811  * Probe a the given codec_id for available function groups.
1812  ****************************************************************************/
1813 static int
1814 hdac_probe_codec(struct hdac_codec *codec)
1815 {
1816         struct hdac_softc *sc = codec->sc;
1817         struct hdac_devinfo *devinfo;
1818         uint32_t vendorid, revisionid, subnode;
1819         int startnode;
1820         int endnode;
1821         int i;
1822         nid_t cad = codec->cad;
1823
1824         HDA_BOOTVERBOSE(
1825                 device_printf(sc->dev, "HDA_DEBUG: Probing codec: %d\n", cad);
1826         );
1827         vendorid = hdac_command(sc,
1828             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_VENDOR_ID),
1829             cad);
1830         revisionid = hdac_command(sc,
1831             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_REVISION_ID),
1832             cad);
1833         subnode = hdac_command(sc,
1834             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_SUB_NODE_COUNT),
1835             cad);
1836         startnode = HDA_PARAM_SUB_NODE_COUNT_START(subnode);
1837         endnode = startnode + HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode);
1838
1839         HDA_BOOTVERBOSE(
1840                 device_printf(sc->dev, "HDA_DEBUG: \tstartnode=%d endnode=%d\n",
1841                     startnode, endnode);
1842         );
1843         for (i = startnode; i < endnode; i++) {
1844                 devinfo = hdac_probe_function(codec, i);
1845                 if (devinfo != NULL) {
1846                         /* XXX Ignore other FG. */
1847                         devinfo->vendor_id =
1848                             HDA_PARAM_VENDOR_ID_VENDOR_ID(vendorid);
1849                         devinfo->device_id =
1850                             HDA_PARAM_VENDOR_ID_DEVICE_ID(vendorid);
1851                         devinfo->revision_id =
1852                             HDA_PARAM_REVISION_ID_REVISION_ID(revisionid);
1853                         devinfo->stepping_id =
1854                             HDA_PARAM_REVISION_ID_STEPPING_ID(revisionid);
1855                         HDA_BOOTVERBOSE(
1856                                 device_printf(sc->dev,
1857                                     "HDA_DEBUG: \tFound AFG nid=%d "
1858                                     "[startnode=%d endnode=%d]\n",
1859                                     devinfo->nid, startnode, endnode);
1860                         );
1861                         return (1);
1862                 }
1863         }
1864
1865         HDA_BOOTVERBOSE(
1866                 device_printf(sc->dev, "HDA_DEBUG: \tAFG not found\n");
1867         );
1868         return (0);
1869 }
1870
1871 static struct hdac_devinfo *
1872 hdac_probe_function(struct hdac_codec *codec, nid_t nid)
1873 {
1874         struct hdac_softc *sc = codec->sc;
1875         struct hdac_devinfo *devinfo;
1876         uint32_t fctgrptype;
1877         nid_t cad = codec->cad;
1878
1879         fctgrptype = HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(hdac_command(sc,
1880             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_FCT_GRP_TYPE), cad));
1881
1882         /* XXX For now, ignore other FG. */
1883         if (fctgrptype != HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO)
1884                 return (NULL);
1885
1886         devinfo = kmalloc(sizeof(*devinfo), M_HDAC, M_WAITOK | M_ZERO);
1887         devinfo->nid = nid;
1888         devinfo->node_type = fctgrptype;
1889         devinfo->codec = codec;
1890
1891         hdac_add_child(sc, devinfo);
1892
1893         return (devinfo);
1894 }
1895
1896 static void
1897 hdac_add_child(struct hdac_softc *sc, struct hdac_devinfo *devinfo)
1898 {
1899         devinfo->dev = device_add_child(sc->dev, NULL, -1);
1900         device_set_ivars(devinfo->dev, (void *)devinfo);
1901         /* XXX - Print more information when booting verbose??? */
1902 }
1903
1904 static void
1905 hdac_widget_connection_parse(struct hdac_widget *w)
1906 {
1907         struct hdac_softc *sc = w->devinfo->codec->sc;
1908         uint32_t res;
1909         int i, j, max, ents, entnum;
1910         nid_t cad = w->devinfo->codec->cad;
1911         nid_t nid = w->nid;
1912         nid_t cnid, addcnid, prevcnid;
1913
1914         w->nconns = 0;
1915
1916         res = hdac_command(sc,
1917             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_CONN_LIST_LENGTH), cad);
1918
1919         ents = HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH(res);
1920
1921         if (ents < 1)
1922                 return;
1923
1924         entnum = HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM(res) ? 2 : 4;
1925         max = NELEM(w->conns) - 1;
1926         prevcnid = 0;
1927
1928 #define CONN_RMASK(e)           (1 << ((32 / (e)) - 1))
1929 #define CONN_NMASK(e)           (CONN_RMASK(e) - 1)
1930 #define CONN_RESVAL(r, e, n)    ((r) >> ((32 / (e)) * (n)))
1931 #define CONN_RANGE(r, e, n)     (CONN_RESVAL(r, e, n) & CONN_RMASK(e))
1932 #define CONN_CNID(r, e, n)      (CONN_RESVAL(r, e, n) & CONN_NMASK(e))
1933
1934         for (i = 0; i < ents; i += entnum) {
1935                 res = hdac_command(sc,
1936                     HDA_CMD_GET_CONN_LIST_ENTRY(cad, nid, i), cad);
1937                 for (j = 0; j < entnum; j++) {
1938                         cnid = CONN_CNID(res, entnum, j);
1939                         if (cnid == 0) {
1940                                 if (w->nconns < ents)
1941                                         device_printf(sc->dev,
1942                                             "%s: nid=%d WARNING: zero cnid "
1943                                             "entnum=%d j=%d index=%d "
1944                                             "entries=%d found=%d res=0x%08x\n",
1945                                             __func__, nid, entnum, j, i,
1946                                             ents, w->nconns, res);
1947                                 else
1948                                         goto getconns_out;
1949                         }
1950                         if (cnid < w->devinfo->startnode ||
1951                             cnid >= w->devinfo->endnode) {
1952                                 HDA_BOOTVERBOSE(
1953                                         device_printf(sc->dev,
1954                                             "%s: GHOST: nid=%d j=%d "
1955                                             "entnum=%d index=%d res=0x%08x\n",
1956                                             __func__, nid, j, entnum, i, res);
1957                                 );
1958                         }
1959                         if (CONN_RANGE(res, entnum, j) == 0)
1960                                 addcnid = cnid;
1961                         else if (prevcnid == 0 || prevcnid >= cnid) {
1962                                 device_printf(sc->dev,
1963                                     "%s: WARNING: Invalid child range "
1964                                     "nid=%d index=%d j=%d entnum=%d "
1965                                     "prevcnid=%d cnid=%d res=0x%08x\n",
1966                                     __func__, nid, i, j, entnum, prevcnid,
1967                                     cnid, res);
1968                                 addcnid = cnid;
1969                         } else
1970                                 addcnid = prevcnid + 1;
1971                         while (addcnid <= cnid) {
1972                                 if (w->nconns > max) {
1973                                         device_printf(sc->dev,
1974                                             "%s: nid=%d: Adding %d: "
1975                                             "Max connection reached! max=%d\n",
1976                                             __func__, nid, addcnid, max + 1);
1977                                         goto getconns_out;
1978                                 }
1979                                 w->conns[w->nconns++] = addcnid++;
1980                         }
1981                         prevcnid = cnid;
1982                 }
1983         }
1984
1985 getconns_out:
1986         HDA_BOOTVERBOSE(
1987                 device_printf(sc->dev,
1988                     "HDA_DEBUG: %s: nid=%d entries=%d found=%d\n",
1989                     __func__, nid, ents, w->nconns);
1990         );
1991         return;
1992 }
1993
1994 static uint32_t
1995 hdac_widget_pin_getconfig(struct hdac_widget *w)
1996 {
1997         struct hdac_softc *sc;
1998         uint32_t config, orig, id;
1999         nid_t cad, nid;
2000
2001         sc = w->devinfo->codec->sc;
2002         cad = w->devinfo->codec->cad;
2003         nid = w->nid;
2004         id = hdac_codec_id(w->devinfo);
2005
2006         config = hdac_command(sc,
2007             HDA_CMD_GET_CONFIGURATION_DEFAULT(cad, nid),
2008             cad);
2009         orig = config;
2010
2011         /*
2012          * XXX REWRITE!!!! Don't argue!
2013          */
2014         if (id == HDA_CODEC_ALC880 && sc->pci_subvendor == LG_LW20_SUBVENDOR) {
2015                 switch (nid) {
2016                 case 26:
2017                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2018                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2019                         break;
2020                 case 27:
2021                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2022                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT;
2023                         break;
2024                 default:
2025                         break;
2026                 }
2027         } else if (id == HDA_CODEC_ALC880 &&
2028             (sc->pci_subvendor == CLEVO_D900T_SUBVENDOR ||
2029             sc->pci_subvendor == ASUS_M5200_SUBVENDOR)) {
2030                 /*
2031                  * Super broken BIOS
2032                  */
2033                 switch (nid) {
2034                 case 20:
2035                         break;
2036                 case 21:
2037                         break;
2038                 case 22:
2039                         break;
2040                 case 23:
2041                         break;
2042                 case 24:        /* MIC1 */
2043                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2044                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2045                         break;
2046                 case 25:        /* XXX MIC2 */
2047                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2048                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2049                         break;
2050                 case 26:        /* LINE1 */
2051                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2052                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2053                         break;
2054                 case 27:        /* XXX LINE2 */
2055                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2056                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2057                         break;
2058                 case 28:        /* CD */
2059                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2060                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_CD;
2061                         break;
2062                 case 30:
2063                         break;
2064                 case 31:
2065                         break;
2066                 default:
2067                         break;
2068                 }
2069         } else if (id == HDA_CODEC_ALC883 &&
2070             (sc->pci_subvendor == MSI_MS034A_SUBVENDOR ||
2071             HDA_DEV_MATCH(ACER_ALL_SUBVENDOR, sc->pci_subvendor))) {
2072                 switch (nid) {
2073                 case 25:
2074                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2075                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2076                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2077                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2078                         break;
2079                 case 28:
2080                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2081                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2082                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_CD |
2083                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2084                         break;
2085                 default:
2086                         break;
2087                 }
2088         } else if (id == HDA_CODEC_CXVENICE && sc->pci_subvendor ==
2089             HP_V3000_SUBVENDOR) {
2090                 switch (nid) {
2091                 case 18:
2092                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK;
2093                         config |= HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE;
2094                         break;
2095                 case 20:
2096                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2097                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2098                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2099                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2100                         break;
2101                 case 21:
2102                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2103                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2104                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_CD |
2105                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2106                         break;
2107                 default:
2108                         break;
2109                 }
2110         } else if (id == HDA_CODEC_CXWAIKIKI && sc->pci_subvendor ==
2111             HP_DV5000_SUBVENDOR) {
2112                 switch (nid) {
2113                 case 20:
2114                 case 21:
2115                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK;
2116                         config |= HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE;
2117                         break;
2118                 default:
2119                         break;
2120                 }
2121         } else if (id == HDA_CODEC_ALC861 && sc->pci_subvendor ==
2122             ASUS_W6F_SUBVENDOR) {
2123                 switch (nid) {
2124                 case 11:
2125                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2126                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2127                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT |
2128                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2129                         break;
2130                 case 15:
2131                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2132                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2133                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT |
2134                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK);
2135                         break;
2136                 default:
2137                         break;
2138                 }
2139         } else if (id == HDA_CODEC_ALC861 && sc->pci_subvendor ==
2140             UNIWILL_9075_SUBVENDOR) {
2141                 switch (nid) {
2142                 case 15:
2143                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2144                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2145                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT |
2146                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK);
2147                         break;
2148                 default:
2149                         break;
2150                 }
2151         } else if (id == HDA_CODEC_AD1986A &&
2152             (sc->pci_subvendor == ASUS_M2NPVMX_SUBVENDOR ||
2153             sc->pci_subvendor == ASUS_A8NVMCSM_SUBVENDOR)) {
2154                 switch (nid) {
2155                 case 28:        /* LINE */
2156                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2157                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2158                         break;
2159                 case 29:        /* MIC */
2160                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2161                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2162                         break;
2163                 default:
2164                         break;
2165                 }
2166         }
2167
2168         HDA_BOOTVERBOSE(
2169                 if (config != orig)
2170                         device_printf(sc->dev,
2171                             "HDA_DEBUG: Pin config nid=%u 0x%08x -> 0x%08x\n",
2172                             nid, orig, config);
2173         );
2174
2175         return (config);
2176 }
2177
2178 static uint32_t
2179 hdac_widget_pin_getcaps(struct hdac_widget *w)
2180 {
2181         struct hdac_softc *sc;
2182         uint32_t caps, orig;
2183         nid_t cad, nid;
2184
2185         sc = w->devinfo->codec->sc;
2186         cad = w->devinfo->codec->cad;
2187         nid = w->nid;
2188
2189         caps = hdac_command(sc,
2190             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_PIN_CAP), cad);
2191         orig = caps;
2192
2193         HDA_BOOTVERBOSE(
2194                 if (caps != orig)
2195                         device_printf(sc->dev,
2196                             "HDA_DEBUG: Pin caps nid=%u 0x%08x -> 0x%08x\n",
2197                             nid, orig, caps);
2198         );
2199
2200         return (caps);
2201 }
2202
2203 static void
2204 hdac_widget_pin_parse(struct hdac_widget *w)
2205 {
2206         struct hdac_softc *sc = w->devinfo->codec->sc;
2207         uint32_t config, pincap;
2208         char *devstr, *connstr;
2209         nid_t cad = w->devinfo->codec->cad;
2210         nid_t nid = w->nid;
2211
2212         config = hdac_widget_pin_getconfig(w);
2213         w->wclass.pin.config = config;
2214
2215         pincap = hdac_widget_pin_getcaps(w);
2216         w->wclass.pin.cap = pincap;
2217
2218         w->wclass.pin.ctrl = hdac_command(sc,
2219             HDA_CMD_GET_PIN_WIDGET_CTRL(cad, nid), cad) &
2220             ~(HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE |
2221             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
2222             HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE |
2223             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK);
2224
2225         if (HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap))
2226                 w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE;
2227         if (HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap))
2228                 w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
2229         if (HDA_PARAM_PIN_CAP_INPUT_CAP(pincap))
2230                 w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE;
2231         if (HDA_PARAM_PIN_CAP_EAPD_CAP(pincap)) {
2232                 w->param.eapdbtl = hdac_command(sc,
2233                     HDA_CMD_GET_EAPD_BTL_ENABLE(cad, nid), cad);
2234                 w->param.eapdbtl &= 0x7;
2235                 w->param.eapdbtl |= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
2236         } else
2237                 w->param.eapdbtl = HDAC_INVALID;
2238
2239         switch (config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) {
2240         case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT:
2241                 devstr = "line out";
2242                 break;
2243         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER:
2244                 devstr = "speaker";
2245                 break;
2246         case HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT:
2247                 devstr = "headphones out";
2248                 break;
2249         case HDA_CONFIG_DEFAULTCONF_DEVICE_CD:
2250                 devstr = "CD";
2251                 break;
2252         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT:
2253                 devstr = "SPDIF out";
2254                 break;
2255         case HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT:
2256                 devstr = "digital (other) out";
2257                 break;
2258         case HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_LINE:
2259                 devstr = "modem, line side";
2260                 break;
2261         case HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_HANDSET:
2262                 devstr = "modem, handset side";
2263                 break;
2264         case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN:
2265                 devstr = "line in";
2266                 break;
2267         case HDA_CONFIG_DEFAULTCONF_DEVICE_AUX:
2268                 devstr = "AUX";
2269                 break;
2270         case HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN:
2271                 devstr = "Mic in";
2272                 break;
2273         case HDA_CONFIG_DEFAULTCONF_DEVICE_TELEPHONY:
2274                 devstr = "telephony";
2275                 break;
2276         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_IN:
2277                 devstr = "SPDIF in";
2278                 break;
2279         case HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_IN:
2280                 devstr = "digital (other) in";
2281                 break;
2282         case HDA_CONFIG_DEFAULTCONF_DEVICE_OTHER:
2283                 devstr = "other";
2284                 break;
2285         default:
2286                 devstr = "unknown";
2287                 break;
2288         }
2289
2290         switch (config & HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) {
2291         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK:
2292                 connstr = "jack";
2293                 break;
2294         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE:
2295                 connstr = "none";
2296                 break;
2297         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED:
2298                 connstr = "fixed";
2299                 break;
2300         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_BOTH:
2301                 connstr = "jack / fixed";
2302                 break;
2303         default:
2304                 connstr = "unknown";
2305                 break;
2306         }
2307
2308         strlcat(w->name, ": ", sizeof(w->name));
2309         strlcat(w->name, devstr, sizeof(w->name));
2310         strlcat(w->name, " (", sizeof(w->name));
2311         strlcat(w->name, connstr, sizeof(w->name));
2312         strlcat(w->name, ")", sizeof(w->name));
2313 }
2314
2315 static void
2316 hdac_widget_parse(struct hdac_widget *w)
2317 {
2318         struct hdac_softc *sc = w->devinfo->codec->sc;
2319         uint32_t wcap, cap;
2320         char *typestr;
2321         nid_t cad = w->devinfo->codec->cad;
2322         nid_t nid = w->nid;
2323
2324         wcap = hdac_command(sc,
2325             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_AUDIO_WIDGET_CAP),
2326             cad);
2327         w->param.widget_cap = wcap;
2328         w->type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE(wcap);
2329
2330         switch (w->type) {
2331         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT:
2332                 typestr = "audio output";
2333                 break;
2334         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
2335                 typestr = "audio input";
2336                 break;
2337         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
2338                 typestr = "audio mixer";
2339                 break;
2340         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
2341                 typestr = "audio selector";
2342                 break;
2343         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
2344                 typestr = "pin";
2345                 break;
2346         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET:
2347                 typestr = "power widget";
2348                 break;
2349         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET:
2350                 typestr = "volume widget";
2351                 break;
2352         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET:
2353                 typestr = "beep widget";
2354                 break;
2355         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VENDOR_WIDGET:
2356                 typestr = "vendor widget";
2357                 break;
2358         default:
2359                 typestr = "unknown type";
2360                 break;
2361         }
2362
2363         strlcpy(w->name, typestr, sizeof(w->name));
2364
2365         if (HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL(wcap)) {
2366                 hdac_command(sc,
2367                     HDA_CMD_SET_POWER_STATE(cad, nid, HDA_CMD_POWER_STATE_D0),
2368                     cad);
2369                 DELAY(1000);
2370         }
2371
2372         hdac_widget_connection_parse(w);
2373
2374         if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(wcap)) {
2375                 if (HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(wcap))
2376                         w->param.outamp_cap =
2377                             hdac_command(sc,
2378                             HDA_CMD_GET_PARAMETER(cad, nid,
2379                             HDA_PARAM_OUTPUT_AMP_CAP), cad);
2380                 else
2381                         w->param.outamp_cap =
2382                             w->devinfo->function.audio.outamp_cap;
2383         } else
2384                 w->param.outamp_cap = 0;
2385
2386         if (HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(wcap)) {
2387                 if (HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(wcap))
2388                         w->param.inamp_cap =
2389                             hdac_command(sc,
2390                             HDA_CMD_GET_PARAMETER(cad, nid,
2391                             HDA_PARAM_INPUT_AMP_CAP), cad);
2392                 else
2393                         w->param.inamp_cap =
2394                             w->devinfo->function.audio.inamp_cap;
2395         } else
2396                 w->param.inamp_cap = 0;
2397
2398         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT ||
2399             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) {
2400                 if (HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR(wcap)) {
2401                         cap = hdac_command(sc,
2402                             HDA_CMD_GET_PARAMETER(cad, nid,
2403                             HDA_PARAM_SUPP_STREAM_FORMATS), cad);
2404                         w->param.supp_stream_formats = (cap != 0) ? cap :
2405                             w->devinfo->function.audio.supp_stream_formats;
2406                         cap = hdac_command(sc,
2407                             HDA_CMD_GET_PARAMETER(cad, nid,
2408                             HDA_PARAM_SUPP_PCM_SIZE_RATE), cad);
2409                         w->param.supp_pcm_size_rate = (cap != 0) ? cap :
2410                             w->devinfo->function.audio.supp_pcm_size_rate;
2411                 } else {
2412                         w->param.supp_stream_formats =
2413                             w->devinfo->function.audio.supp_stream_formats;
2414                         w->param.supp_pcm_size_rate =
2415                             w->devinfo->function.audio.supp_pcm_size_rate;
2416                 }
2417         } else {
2418                 w->param.supp_stream_formats = 0;
2419                 w->param.supp_pcm_size_rate = 0;
2420         }
2421
2422         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
2423                 hdac_widget_pin_parse(w);
2424 }
2425
2426 static struct hdac_widget *
2427 hdac_widget_get(struct hdac_devinfo *devinfo, nid_t nid)
2428 {
2429         if (devinfo == NULL || devinfo->widget == NULL ||
2430                     nid < devinfo->startnode || nid >= devinfo->endnode)
2431                 return (NULL);
2432         return (&devinfo->widget[nid - devinfo->startnode]);
2433 }
2434
2435 static __inline int
2436 hda_poll_channel(struct hdac_chan *ch)
2437 {
2438         uint32_t sz, delta;
2439         volatile uint32_t ptr;
2440
2441         if (!(ch->flags & HDAC_CHN_RUNNING))
2442                 return (0);
2443
2444         sz = ch->blksz * ch->blkcnt;
2445         if (ch->dmapos != NULL)
2446                 ptr = *(ch->dmapos);
2447         else
2448                 ptr = HDAC_READ_4(&ch->devinfo->codec->sc->mem,
2449                     ch->off + HDAC_SDLPIB);
2450         ch->ptr = ptr;
2451         ptr %= sz;
2452         ptr &= ~(ch->blksz - 1);
2453         delta = (sz + ptr - ch->prevptr) % sz;
2454
2455         if (delta < ch->blksz)
2456                 return (0);
2457
2458         ch->prevptr = ptr;
2459
2460         return (1);
2461 }
2462
2463 #define hda_chan_active(sc)    (((sc)->play.flags | (sc)->rec.flags) & \
2464                                 HDAC_CHN_RUNNING)
2465
2466 static void
2467 hda_poll_callback(void *arg)
2468 {
2469         struct hdac_softc *sc = arg;
2470         uint32_t trigger;
2471
2472         if (sc == NULL)
2473                 return;
2474
2475         hdac_lock(sc);
2476         if (sc->polling == 0 || hda_chan_active(sc) == 0) {
2477                 hdac_unlock(sc);
2478                 return;
2479         }
2480
2481         trigger = 0;
2482         trigger |= (hda_poll_channel(&sc->play) != 0) ? HDAC_TRIGGER_PLAY : 0;
2483         trigger |= (hda_poll_channel(&sc->rec)) != 0 ? HDAC_TRIGGER_REC : 0;
2484
2485         /* XXX */
2486         callout_reset(&sc->poll_hda, 1/*sc->poll_ticks*/,
2487             hda_poll_callback, sc);
2488
2489         hdac_unlock(sc);
2490
2491         if (trigger & HDAC_TRIGGER_PLAY)
2492                 chn_intr(sc->play.c);
2493         if (trigger & HDAC_TRIGGER_REC)
2494                 chn_intr(sc->rec.c);
2495 }
2496
2497 static int
2498 hdac_rirb_flush(struct hdac_softc *sc)
2499 {
2500         struct hdac_rirb *rirb_base, *rirb;
2501         struct hdac_codec *codec;
2502         struct hdac_command_list *commands;
2503         nid_t cad;
2504         uint32_t resp;
2505         uint8_t rirbwp;
2506         int ret;
2507
2508         rirb_base = (struct hdac_rirb *)sc->rirb_dma.dma_vaddr;
2509         rirbwp = HDAC_READ_1(&sc->mem, HDAC_RIRBWP);
2510 #if 0
2511         bus_dmamap_sync(sc->rirb_dma.dma_tag, sc->rirb_dma.dma_map,
2512             BUS_DMASYNC_POSTREAD);
2513 #endif
2514         ret = 0;
2515
2516         while (sc->rirb_rp != rirbwp) {
2517                 sc->rirb_rp++;
2518                 sc->rirb_rp %= sc->rirb_size;
2519                 rirb = &rirb_base[sc->rirb_rp];
2520                 cad = HDAC_RIRB_RESPONSE_EX_SDATA_IN(rirb->response_ex);
2521                 if (cad < 0 || cad >= HDAC_CODEC_MAX ||
2522                     sc->codecs[cad] == NULL)
2523                         continue;
2524                 resp = rirb->response;
2525                 codec = sc->codecs[cad];
2526                 commands = codec->commands;
2527                 if (rirb->response_ex & HDAC_RIRB_RESPONSE_EX_UNSOLICITED) {
2528                         sc->unsolq[sc->unsolq_wp++] = (cad << 16) |
2529                             ((resp >> 26) & 0xffff);
2530                         sc->unsolq_wp %= HDAC_UNSOLQ_MAX;
2531                 } else if (commands != NULL && commands->num_commands > 0 &&
2532                     codec->responses_received < commands->num_commands)
2533                         commands->responses[codec->responses_received++] =
2534                             resp;
2535                 ret++;
2536         }
2537
2538         return (ret);
2539 }
2540
2541 static int
2542 hdac_unsolq_flush(struct hdac_softc *sc)
2543 {
2544         nid_t cad;
2545         uint32_t tag;
2546         int ret = 0;
2547
2548         if (sc->unsolq_st == HDAC_UNSOLQ_READY) {
2549                 sc->unsolq_st = HDAC_UNSOLQ_BUSY;
2550                 while (sc->unsolq_rp != sc->unsolq_wp) {
2551                         cad = sc->unsolq[sc->unsolq_rp] >> 16;
2552                         tag = sc->unsolq[sc->unsolq_rp++] & 0xffff;
2553                         sc->unsolq_rp %= HDAC_UNSOLQ_MAX;
2554                         hdac_unsolicited_handler(sc->codecs[cad], tag);
2555                         ret++;
2556                 }
2557                 sc->unsolq_st = HDAC_UNSOLQ_READY;
2558         }
2559
2560         return (ret);
2561 }
2562
2563 static void
2564 hdac_poll_callback(void *arg)
2565 {
2566         struct hdac_softc *sc = arg;
2567         if (sc == NULL)
2568                 return;
2569
2570         hdac_lock(sc);
2571         if (sc->polling == 0 || sc->poll_ival == 0) {
2572                 hdac_unlock(sc);
2573                 return;
2574         }
2575         if (hdac_rirb_flush(sc) != 0)
2576                 hdac_unsolq_flush(sc);
2577         callout_reset(&sc->poll_hdac, sc->poll_ival, hdac_poll_callback, sc);
2578         hdac_unlock(sc);
2579 }
2580
2581 static void
2582 hdac_stream_stop(struct hdac_chan *ch)
2583 {
2584         struct hdac_softc *sc = ch->devinfo->codec->sc;
2585         uint32_t ctl;
2586
2587         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2588         ctl &= ~(HDAC_SDCTL_IOCE | HDAC_SDCTL_FEIE | HDAC_SDCTL_DEIE |
2589             HDAC_SDCTL_RUN);
2590         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2591
2592         ch->flags &= ~HDAC_CHN_RUNNING;
2593
2594         if (sc->polling != 0) {
2595                 int pollticks;
2596
2597                 if (hda_chan_active(sc) == 0) {
2598                         callout_stop(&sc->poll_hda);
2599                         sc->poll_ticks = 1;
2600                 } else {
2601                         if (sc->play.flags & HDAC_CHN_RUNNING)
2602                                 ch = &sc->play;
2603                         else
2604                                 ch = &sc->rec;
2605                         pollticks = ((uint64_t)hz * ch->blksz) /
2606                             ((uint64_t)sndbuf_getbps(ch->b) *
2607                             sndbuf_getspd(ch->b));
2608                         pollticks >>= 2;
2609                         if (pollticks > hz)
2610                                 pollticks = hz;
2611                         if (pollticks < 1) {
2612                                 HDA_BOOTVERBOSE(
2613                                         device_printf(sc->dev,
2614                                             "%s: pollticks=%d < 1 !\n",
2615                                             __func__, pollticks);
2616                                 );
2617                                 pollticks = 1;
2618                         }
2619                         if (pollticks > sc->poll_ticks) {
2620                                 HDA_BOOTVERBOSE(
2621                                         device_printf(sc->dev,
2622                                             "%s: pollticks %d -> %d\n",
2623                                             __func__, sc->poll_ticks,
2624                                             pollticks);
2625                                 );
2626                                 sc->poll_ticks = pollticks;
2627                                 callout_reset(&sc->poll_hda, 1,
2628                                     hda_poll_callback, sc);
2629                         }
2630                 }
2631         } else {
2632                 ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
2633                 ctl &= ~(1 << (ch->off >> 5));
2634                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
2635         }
2636 }
2637
2638 static void
2639 hdac_stream_start(struct hdac_chan *ch)
2640 {
2641         struct hdac_softc *sc = ch->devinfo->codec->sc;
2642         uint32_t ctl;
2643
2644         if (sc->polling != 0) {
2645                 int pollticks;
2646
2647                 pollticks = ((uint64_t)hz * ch->blksz) /
2648                     ((uint64_t)sndbuf_getbps(ch->b) * sndbuf_getspd(ch->b));
2649                 pollticks >>= 2;
2650                 if (pollticks > hz)
2651                         pollticks = hz;
2652                 if (pollticks < 1) {
2653                         HDA_BOOTVERBOSE(
2654                                 device_printf(sc->dev,
2655                                     "%s: pollticks=%d < 1 !\n",
2656                                     __func__, pollticks);
2657                         );
2658                         pollticks = 1;
2659                 }
2660                 if (hda_chan_active(sc) == 0 || pollticks < sc->poll_ticks) {
2661                         HDA_BOOTVERBOSE(
2662                                 if (hda_chan_active(sc) == 0) {
2663                                         device_printf(sc->dev,
2664                                             "%s: pollticks=%d\n",
2665                                             __func__, pollticks);
2666                                 } else {
2667                                         device_printf(sc->dev,
2668                                             "%s: pollticks %d -> %d\n",
2669                                             __func__, sc->poll_ticks,
2670                                             pollticks);
2671                                 }
2672                         );
2673                         sc->poll_ticks = pollticks;
2674                         callout_reset(&sc->poll_hda, 1, hda_poll_callback,
2675                             sc);
2676                 }
2677                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2678                 ctl |= HDAC_SDCTL_RUN;
2679         } else {
2680                 ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
2681                 ctl |= 1 << (ch->off >> 5);
2682                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
2683                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2684                 ctl |= HDAC_SDCTL_IOCE | HDAC_SDCTL_FEIE | HDAC_SDCTL_DEIE |
2685                     HDAC_SDCTL_RUN;
2686         }
2687         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2688
2689         ch->flags |= HDAC_CHN_RUNNING;
2690 }
2691
2692 static void
2693 hdac_stream_reset(struct hdac_chan *ch)
2694 {
2695         struct hdac_softc *sc = ch->devinfo->codec->sc;
2696         int timeout = 1000;
2697         int to = timeout;
2698         uint32_t ctl;
2699
2700         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2701         ctl |= HDAC_SDCTL_SRST;
2702         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2703         do {
2704                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2705                 if (ctl & HDAC_SDCTL_SRST)
2706                         break;
2707                 DELAY(10);
2708         } while (--to);
2709         if (!(ctl & HDAC_SDCTL_SRST)) {
2710                 device_printf(sc->dev, "timeout in reset\n");
2711         }
2712         ctl &= ~HDAC_SDCTL_SRST;
2713         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2714         to = timeout;
2715         do {
2716                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2717                 if (!(ctl & HDAC_SDCTL_SRST))
2718                         break;
2719                 DELAY(10);
2720         } while (--to);
2721         if (ctl & HDAC_SDCTL_SRST)
2722                 device_printf(sc->dev, "can't reset!\n");
2723 }
2724
2725 static void
2726 hdac_stream_setid(struct hdac_chan *ch)
2727 {
2728         struct hdac_softc *sc = ch->devinfo->codec->sc;
2729         uint32_t ctl;
2730
2731         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL2);
2732         ctl &= ~HDAC_SDCTL2_STRM_MASK;
2733         ctl |= ch->sid << HDAC_SDCTL2_STRM_SHIFT;
2734         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL2, ctl);
2735 }
2736
2737 static void
2738 hdac_bdl_setup(struct hdac_chan *ch)
2739 {
2740         struct hdac_softc *sc = ch->devinfo->codec->sc;
2741         struct hdac_bdle *bdle;
2742         uint64_t addr;
2743         uint32_t blksz, blkcnt;
2744         int i;
2745
2746         addr = (uint64_t)sndbuf_getbufaddr(ch->b);
2747         bdle = (struct hdac_bdle *)ch->bdl_dma.dma_vaddr;
2748
2749         if (sc->polling != 0) {
2750                 blksz = ch->blksz * ch->blkcnt;
2751                 blkcnt = 1;
2752         } else {
2753                 blksz = ch->blksz;
2754                 blkcnt = ch->blkcnt;
2755         }
2756
2757         for (i = 0; i < blkcnt; i++, bdle++) {
2758                 bdle->addrl = (uint32_t)addr;
2759                 bdle->addrh = (uint32_t)(addr >> 32);
2760                 bdle->len = blksz;
2761                 bdle->ioc = 1 ^ sc->polling;
2762                 addr += blksz;
2763         }
2764
2765         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDCBL, blksz * blkcnt);
2766         HDAC_WRITE_2(&sc->mem, ch->off + HDAC_SDLVI, blkcnt - 1);
2767         addr = ch->bdl_dma.dma_paddr;
2768         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDBDPL, (uint32_t)addr);
2769         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDBDPU, (uint32_t)(addr >> 32));
2770         if (ch->dmapos != NULL &&
2771             !(HDAC_READ_4(&sc->mem, HDAC_DPIBLBASE) & 0x00000001)) {
2772                 addr = sc->pos_dma.dma_paddr;
2773                 HDAC_WRITE_4(&sc->mem, HDAC_DPIBLBASE,
2774                     ((uint32_t)addr & HDAC_DPLBASE_DPLBASE_MASK) | 0x00000001);
2775                 HDAC_WRITE_4(&sc->mem, HDAC_DPIBUBASE, (uint32_t)(addr >> 32));
2776         }
2777 }
2778
2779 static int
2780 hdac_bdl_alloc(struct hdac_chan *ch)
2781 {
2782         struct hdac_softc *sc = ch->devinfo->codec->sc;
2783         int rc;
2784
2785         rc = hdac_dma_alloc(sc, &ch->bdl_dma,
2786             sizeof(struct hdac_bdle) * HDA_BDL_MAX);
2787         if (rc) {
2788                 device_printf(sc->dev, "can't alloc bdl\n");
2789                 return (rc);
2790         }
2791
2792         return (0);
2793 }
2794
2795 static void
2796 hdac_audio_ctl_amp_set_internal(struct hdac_softc *sc, nid_t cad, nid_t nid,
2797                                         int index, int lmute, int rmute,
2798                                         int left, int right, int dir)
2799 {
2800         uint16_t v = 0;
2801
2802         if (sc == NULL)
2803                 return;
2804
2805         if (left != right || lmute != rmute) {
2806                 v = (1 << (15 - dir)) | (1 << 13) | (index << 8) |
2807                     (lmute << 7) | left;
2808                 hdac_command(sc,
2809                     HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, v), cad);
2810                 v = (1 << (15 - dir)) | (1 << 12) | (index << 8) |
2811                     (rmute << 7) | right;
2812         } else
2813                 v = (1 << (15 - dir)) | (3 << 12) | (index << 8) |
2814                     (lmute << 7) | left;
2815
2816         hdac_command(sc,
2817             HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, v), cad);
2818 }
2819
2820 static void
2821 hdac_audio_ctl_amp_set(struct hdac_audio_ctl *ctl, uint32_t mute,
2822                                                 int left, int right)
2823 {
2824         struct hdac_softc *sc;
2825         nid_t nid, cad;
2826         int lmute, rmute;
2827
2828         if (ctl == NULL || ctl->widget == NULL ||
2829             ctl->widget->devinfo == NULL ||
2830             ctl->widget->devinfo->codec == NULL ||
2831             ctl->widget->devinfo->codec->sc == NULL)
2832                 return;
2833
2834         sc = ctl->widget->devinfo->codec->sc;
2835         cad = ctl->widget->devinfo->codec->cad;
2836         nid = ctl->widget->nid;
2837
2838         if (mute == HDA_AMP_MUTE_DEFAULT) {
2839                 lmute = HDA_AMP_LEFT_MUTED(ctl->muted);
2840                 rmute = HDA_AMP_RIGHT_MUTED(ctl->muted);
2841         } else {
2842                 lmute = HDA_AMP_LEFT_MUTED(mute);
2843                 rmute = HDA_AMP_RIGHT_MUTED(mute);
2844         }
2845
2846         if (ctl->dir & HDA_CTL_OUT)
2847                 hdac_audio_ctl_amp_set_internal(sc, cad, nid, ctl->index,
2848                     lmute, rmute, left, right, 0);
2849         if (ctl->dir & HDA_CTL_IN)
2850                 hdac_audio_ctl_amp_set_internal(sc, cad, nid, ctl->index,
2851                     lmute, rmute, left, right, 1);
2852         ctl->left = left;
2853         ctl->right = right;
2854 }
2855
2856 static void
2857 hdac_widget_connection_select(struct hdac_widget *w, uint8_t index)
2858 {
2859         if (w == NULL || w->nconns < 1 || index > (w->nconns - 1))
2860                 return;
2861         hdac_command(w->devinfo->codec->sc,
2862             HDA_CMD_SET_CONNECTION_SELECT_CONTROL(w->devinfo->codec->cad,
2863             w->nid, index), w->devinfo->codec->cad);
2864         w->selconn = index;
2865 }
2866
2867
2868 /****************************************************************************
2869  * uint32_t hdac_command_sendone_internal
2870  *
2871  * Wrapper function that sends only one command to a given codec
2872  ****************************************************************************/
2873 static uint32_t
2874 hdac_command_sendone_internal(struct hdac_softc *sc, uint32_t verb, nid_t cad)
2875 {
2876         struct hdac_command_list cl;
2877         uint32_t response = HDAC_INVALID;
2878
2879         if (!hdac_lockowned(sc))
2880                 device_printf(sc->dev, "WARNING!!!! mtx not owned!!!!\n");
2881         cl.num_commands = 1;
2882         cl.verbs = &verb;
2883         cl.responses = &response;
2884
2885         hdac_command_send_internal(sc, &cl, cad);
2886
2887         return (response);
2888 }
2889
2890 /****************************************************************************
2891  * hdac_command_send_internal
2892  *
2893  * Send a command list to the codec via the corb. We queue as much verbs as
2894  * we can and sleep on the codec. When the interrupt get the responses
2895  * back from the rirb, it will wake us up so we can queue the remaining verbs
2896  * if any.
2897  ****************************************************************************/
2898 static void
2899 hdac_command_send_internal(struct hdac_softc *sc,
2900                         struct hdac_command_list *commands, nid_t cad)
2901 {
2902         struct hdac_codec *codec;
2903         int corbrp;
2904         uint32_t *corb;
2905         int timeout;
2906         int retry = 10;
2907
2908         if (sc == NULL || sc->codecs[cad] == NULL || commands == NULL ||
2909             commands->num_commands < 1)
2910                 return;
2911
2912         codec = sc->codecs[cad];
2913         codec->commands = commands;
2914         codec->responses_received = 0;
2915         codec->verbs_sent = 0;
2916         corb = (uint32_t *)sc->corb_dma.dma_vaddr;
2917
2918         do {
2919                 if (codec->verbs_sent != commands->num_commands) {
2920                         /* Queue as many verbs as possible */
2921                         corbrp = HDAC_READ_2(&sc->mem, HDAC_CORBRP);
2922 #if 0
2923                         bus_dmamap_sync(sc->corb_dma.dma_tag,
2924                             sc->corb_dma.dma_map, BUS_DMASYNC_PREWRITE);
2925 #endif
2926                         while (codec->verbs_sent != commands->num_commands &&
2927                             ((sc->corb_wp + 1) % sc->corb_size) != corbrp) {
2928                                 sc->corb_wp++;
2929                                 sc->corb_wp %= sc->corb_size;
2930                                 corb[sc->corb_wp] =
2931                                     commands->verbs[codec->verbs_sent++];
2932                         }
2933
2934                         /* Send the verbs to the codecs */
2935 #if 0
2936                         bus_dmamap_sync(sc->corb_dma.dma_tag,
2937                             sc->corb_dma.dma_map, BUS_DMASYNC_POSTWRITE);
2938 #endif
2939                         HDAC_WRITE_2(&sc->mem, HDAC_CORBWP, sc->corb_wp);
2940                 }
2941
2942                 timeout = 1000;
2943                 while (hdac_rirb_flush(sc) == 0 && --timeout)
2944                         DELAY(10);
2945         } while ((codec->verbs_sent != commands->num_commands ||
2946             codec->responses_received != commands->num_commands) && --retry);
2947
2948         if (retry == 0)
2949                 device_printf(sc->dev,
2950                     "%s: TIMEOUT numcmd=%d, sent=%d, received=%d\n",
2951                     __func__, commands->num_commands, codec->verbs_sent,
2952                     codec->responses_received);
2953
2954         codec->commands = NULL;
2955         codec->responses_received = 0;
2956         codec->verbs_sent = 0;
2957
2958         hdac_unsolq_flush(sc);
2959 }
2960
2961
2962 /****************************************************************************
2963  * Device Methods
2964  ****************************************************************************/
2965
2966 /****************************************************************************
2967  * int hdac_probe(device_t)
2968  *
2969  * Probe for the presence of an hdac. If none is found, check for a generic
2970  * match using the subclass of the device.
2971  ****************************************************************************/
2972 static int
2973 hdac_probe(device_t dev)
2974 {
2975         int i, result;
2976         uint32_t model;
2977         uint16_t class, subclass;
2978         char desc[64];
2979
2980         model = (uint32_t)pci_get_device(dev) << 16;
2981         model |= (uint32_t)pci_get_vendor(dev) & 0x0000ffff;
2982         class = pci_get_class(dev);
2983         subclass = pci_get_subclass(dev);
2984
2985         bzero(desc, sizeof(desc));
2986         result = ENXIO;
2987         for (i = 0; i < HDAC_DEVICES_LEN; i++) {
2988                 if (hdac_devices[i].model == model) {
2989                         strlcpy(desc, hdac_devices[i].desc, sizeof(desc));
2990                         result = BUS_PROBE_DEFAULT;
2991                         break;
2992                 }
2993                 if (HDA_DEV_MATCH(hdac_devices[i].model, model) &&
2994                     class == PCIC_MULTIMEDIA &&
2995                     subclass == PCIS_MULTIMEDIA_HDA) {
2996                         strlcpy(desc, hdac_devices[i].desc, sizeof(desc));
2997                         result = BUS_PROBE_GENERIC;
2998                         break;
2999                 }
3000         }
3001         if (result == ENXIO && class == PCIC_MULTIMEDIA &&
3002             subclass == PCIS_MULTIMEDIA_HDA) {
3003                 strlcpy(desc, "Generic", sizeof(desc));
3004                 result = BUS_PROBE_GENERIC;
3005         }
3006         if (result != ENXIO) {
3007                 strlcat(desc, " High Definition Audio Controller",
3008                     sizeof(desc));
3009                 device_set_desc_copy(dev, desc);
3010         }
3011
3012         return (result);
3013 }
3014
3015 static void *
3016 hdac_channel_init(kobj_t obj, void *data, struct snd_dbuf *b,
3017                                         struct pcm_channel *c, int dir)
3018 {
3019         struct hdac_devinfo *devinfo = data;
3020         struct hdac_softc *sc = devinfo->codec->sc;
3021         struct hdac_chan *ch;
3022
3023         hdac_lock(sc);
3024         if (dir == PCMDIR_PLAY) {
3025                 ch = &sc->play;
3026                 ch->off = (sc->num_iss + devinfo->function.audio.playcnt) << 5;
3027                 devinfo->function.audio.playcnt++;
3028         } else {
3029                 ch = &sc->rec;
3030                 ch->off = devinfo->function.audio.reccnt << 5;
3031                 devinfo->function.audio.reccnt++;
3032         }
3033         if (devinfo->function.audio.quirks & HDA_QUIRK_FIXEDRATE) {
3034                 ch->caps.minspeed = ch->caps.maxspeed = 48000;
3035                 ch->pcmrates[0] = 48000;
3036                 ch->pcmrates[1] = 0;
3037         }
3038         if (sc->pos_dma.dma_vaddr != NULL)
3039                 ch->dmapos = (uint32_t *)(sc->pos_dma.dma_vaddr +
3040                     (sc->streamcnt * 8));
3041         else
3042                 ch->dmapos = NULL;
3043         ch->sid = ++sc->streamcnt;
3044         ch->dir = dir;
3045         ch->b = b;
3046         ch->c = c;
3047         ch->devinfo = devinfo;
3048         ch->blksz = sc->chan_size / sc->chan_blkcnt;
3049         ch->blkcnt = sc->chan_blkcnt;
3050         hdac_unlock(sc);
3051
3052         if (hdac_bdl_alloc(ch) != 0) {
3053                 ch->blkcnt = 0;
3054                 return (NULL);
3055         }
3056
3057         if (sndbuf_alloc(ch->b, sc->chan_dmat, sc->chan_size) != 0)
3058                 return (NULL);
3059
3060         HDAC_DMA_ATTR(sc, sndbuf_getbuf(ch->b), sndbuf_getmaxsize(ch->b),
3061             PAT_UNCACHEABLE);
3062
3063         return (ch);
3064 }
3065
3066 static int
3067 hdac_channel_free(kobj_t obj, void *data)
3068 {
3069         struct hdac_softc *sc;
3070         struct hdac_chan *ch;
3071
3072         ch = (struct hdac_chan *)data;
3073         sc = (ch != NULL && ch->devinfo != NULL && ch->devinfo->codec != NULL) ?
3074             ch->devinfo->codec->sc : NULL;
3075         if (ch != NULL && sc != NULL) {
3076                 HDAC_DMA_ATTR(sc, sndbuf_getbuf(ch->b),
3077                     sndbuf_getmaxsize(ch->b), PAT_WRITE_BACK);
3078         }
3079
3080         return (1);
3081 }
3082
3083 static int
3084 hdac_channel_setformat(kobj_t obj, void *data, uint32_t format)
3085 {
3086         struct hdac_chan *ch = data;
3087         int i;
3088
3089         for (i = 0; ch->caps.fmtlist[i] != 0; i++) {
3090                 if (format == ch->caps.fmtlist[i]) {
3091                         ch->fmt = format;
3092                         return (0);
3093                 }
3094         }
3095
3096         return (EINVAL);
3097 }
3098
3099 static int
3100 hdac_channel_setspeed(kobj_t obj, void *data, uint32_t speed)
3101 {
3102         struct hdac_chan *ch = data;
3103         uint32_t spd = 0, threshold;
3104         int i;
3105
3106         for (i = 0; ch->pcmrates[i] != 0; i++) {
3107                 spd = ch->pcmrates[i];
3108                 threshold = spd + ((ch->pcmrates[i + 1] != 0) ?
3109                     ((ch->pcmrates[i + 1] - spd) >> 1) : 0);
3110                 if (speed < threshold)
3111                         break;
3112         }
3113
3114         if (spd == 0)   /* impossible */
3115                 ch->spd = 48000;
3116         else
3117                 ch->spd = spd;
3118
3119         return (ch->spd);
3120 }
3121
3122 static void
3123 hdac_stream_setup(struct hdac_chan *ch)
3124 {
3125         struct hdac_softc *sc = ch->devinfo->codec->sc;
3126         struct hdac_widget *w;
3127         int i, chn, totalchn;
3128         nid_t cad = ch->devinfo->codec->cad;
3129         uint16_t fmt;
3130
3131         fmt = 0;
3132         if (ch->fmt & AFMT_S16_LE)
3133                 fmt |= ch->bit16 << 4;
3134         else if (ch->fmt & AFMT_S32_LE)
3135                 fmt |= ch->bit32 << 4;
3136         else
3137                 fmt |= 1 << 4;
3138
3139         for (i = 0; i < HDA_RATE_TAB_LEN; i++) {
3140                 if (hda_rate_tab[i].valid && ch->spd == hda_rate_tab[i].rate) {
3141                         fmt |= hda_rate_tab[i].base;
3142                         fmt |= hda_rate_tab[i].mul;
3143                         fmt |= hda_rate_tab[i].div;
3144                         break;
3145                 }
3146         }
3147
3148         if (ch->fmt & AFMT_STEREO) {
3149                 fmt |= 1;
3150                 totalchn = 2;
3151         } else
3152                 totalchn = 1;
3153
3154         HDAC_WRITE_2(&sc->mem, ch->off + HDAC_SDFMT, fmt);
3155
3156         chn = 0;
3157         for (i = 0; ch->io[i] != -1; i++) {
3158                 w = hdac_widget_get(ch->devinfo, ch->io[i]);
3159                 if (w == NULL)
3160                         continue;
3161                 HDA_BOOTVERBOSE(
3162                         device_printf(sc->dev,
3163                             "HDA_DEBUG: PCMDIR_%s: Stream setup nid=%d "
3164                             "fmt=0x%08x\n",
3165                             (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC",
3166                             ch->io[i], fmt);
3167                 );
3168                 hdac_command(sc,
3169                     HDA_CMD_SET_CONV_FMT(cad, ch->io[i], fmt), cad);
3170                 if (ch->dir == PCMDIR_REC)
3171                         hdac_command(sc,
3172                             HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3173                             (chn < totalchn) ? ((ch->sid << 4) | chn) : 0),
3174                             cad);
3175                 else
3176                         hdac_command(sc,
3177                             HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3178                             ch->sid << 4), cad);
3179                 chn +=
3180                     HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(w->param.widget_cap) ?
3181                     2 : 1;
3182         }
3183 }
3184
3185 static int
3186 hdac_channel_setfragments(kobj_t obj, void *data,
3187                                         uint32_t blksz, uint32_t blkcnt)
3188 {
3189         struct hdac_chan *ch = data;
3190         struct hdac_softc *sc = ch->devinfo->codec->sc;
3191
3192         blksz &= HDA_BLK_ALIGN;
3193
3194         if (blksz > (sndbuf_getmaxsize(ch->b) / HDA_BDL_MIN))
3195                 blksz = sndbuf_getmaxsize(ch->b) / HDA_BDL_MIN;
3196         if (blksz < HDA_BLK_MIN)
3197                 blksz = HDA_BLK_MIN;
3198         if (blkcnt > HDA_BDL_MAX)
3199                 blkcnt = HDA_BDL_MAX;
3200         if (blkcnt < HDA_BDL_MIN)
3201                 blkcnt = HDA_BDL_MIN;
3202
3203         while ((blksz * blkcnt) > sndbuf_getmaxsize(ch->b)) {
3204                 if ((blkcnt >> 1) >= HDA_BDL_MIN)
3205                         blkcnt >>= 1;
3206                 else if ((blksz >> 1) >= HDA_BLK_MIN)
3207                         blksz >>= 1;
3208                 else
3209                         break;
3210         }
3211
3212         if ((sndbuf_getblksz(ch->b) != blksz ||
3213             sndbuf_getblkcnt(ch->b) != blkcnt) &&
3214             sndbuf_resize(ch->b, blkcnt, blksz) != 0)
3215                 device_printf(sc->dev, "%s: failed blksz=%u blkcnt=%u\n",
3216                     __func__, blksz, blkcnt);
3217
3218         ch->blksz = sndbuf_getblksz(ch->b);
3219         ch->blkcnt = sndbuf_getblkcnt(ch->b);
3220
3221         return (1);
3222 }
3223
3224 static int
3225 hdac_channel_setblocksize(kobj_t obj, void *data, uint32_t blksz)
3226 {
3227         struct hdac_chan *ch = data;
3228         struct hdac_softc *sc = ch->devinfo->codec->sc;
3229
3230         hdac_channel_setfragments(obj, data, blksz, sc->chan_blkcnt);
3231
3232         return (ch->blksz);
3233 }
3234
3235 static void
3236 hdac_channel_stop(struct hdac_softc *sc, struct hdac_chan *ch)
3237 {
3238         struct hdac_devinfo *devinfo = ch->devinfo;
3239         nid_t cad = devinfo->codec->cad;
3240         int i;
3241
3242         hdac_stream_stop(ch);
3243
3244         for (i = 0; ch->io[i] != -1; i++) {
3245                 hdac_command(sc,
3246                     HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3247                     0), cad);
3248         }
3249 }
3250
3251 static void
3252 hdac_channel_start(struct hdac_softc *sc, struct hdac_chan *ch)
3253 {
3254         ch->ptr = 0;
3255         ch->prevptr = 0;
3256         hdac_stream_stop(ch);
3257         hdac_stream_reset(ch);
3258         hdac_bdl_setup(ch);
3259         hdac_stream_setid(ch);
3260         hdac_stream_setup(ch);
3261         hdac_stream_start(ch);
3262 }
3263
3264 static int
3265 hdac_channel_trigger(kobj_t obj, void *data, int go)
3266 {
3267         struct hdac_chan *ch = data;
3268         struct hdac_softc *sc = ch->devinfo->codec->sc;
3269
3270         if (!(go == PCMTRIG_START || go == PCMTRIG_STOP || go == PCMTRIG_ABORT))
3271                 return (0);
3272
3273         hdac_lock(sc);
3274         switch (go) {
3275         case PCMTRIG_START:
3276                 hdac_channel_start(sc, ch);
3277                 break;
3278         case PCMTRIG_STOP:
3279         case PCMTRIG_ABORT:
3280                 hdac_channel_stop(sc, ch);
3281                 break;
3282         default:
3283                 break;
3284         }
3285         hdac_unlock(sc);
3286
3287         return (0);
3288 }
3289
3290 static int
3291 hdac_channel_getptr(kobj_t obj, void *data)
3292 {
3293         struct hdac_chan *ch = data;
3294         struct hdac_softc *sc = ch->devinfo->codec->sc;
3295         uint32_t ptr;
3296
3297         hdac_lock(sc);
3298         if (sc->polling != 0)
3299                 ptr = ch->ptr;
3300         else if (ch->dmapos != NULL)
3301                 ptr = *(ch->dmapos);
3302         else
3303                 ptr = HDAC_READ_4(&sc->mem, ch->off + HDAC_SDLPIB);
3304         hdac_unlock(sc);
3305
3306         /*
3307          * Round to available space and force 128 bytes aligment.
3308          */
3309         ptr %= ch->blksz * ch->blkcnt;
3310         ptr &= HDA_BLK_ALIGN;
3311
3312         return (ptr);
3313 }
3314
3315 static struct pcmchan_caps *
3316 hdac_channel_getcaps(kobj_t obj, void *data)
3317 {
3318         return (&((struct hdac_chan *)data)->caps);
3319 }
3320
3321 static kobj_method_t hdac_channel_methods[] = {
3322         KOBJMETHOD(channel_init,                hdac_channel_init),
3323         KOBJMETHOD(channel_free,                hdac_channel_free),
3324         KOBJMETHOD(channel_setformat,           hdac_channel_setformat),
3325         KOBJMETHOD(channel_setspeed,            hdac_channel_setspeed),
3326         KOBJMETHOD(channel_setblocksize,        hdac_channel_setblocksize),
3327         KOBJMETHOD(channel_trigger,             hdac_channel_trigger),
3328         KOBJMETHOD(channel_getptr,              hdac_channel_getptr),
3329         KOBJMETHOD(channel_getcaps,             hdac_channel_getcaps),
3330         KOBJMETHOD_END
3331 };
3332 CHANNEL_DECLARE(hdac_channel);
3333
3334 static void
3335 hdac_jack_poll_callback(void *arg)
3336 {
3337         struct hdac_devinfo *devinfo = arg;
3338         struct hdac_softc *sc;
3339
3340         if (devinfo == NULL || devinfo->codec == NULL ||
3341             devinfo->codec->sc == NULL)
3342                 return;
3343         sc = devinfo->codec->sc;
3344         hdac_lock(sc);
3345         if (sc->poll_ival == 0) {
3346                 hdac_unlock(sc);
3347                 return;
3348         }
3349         hdac_hp_switch_handler(devinfo);
3350         callout_reset(&sc->poll_jack, sc->poll_ival,
3351             hdac_jack_poll_callback, devinfo);
3352         hdac_unlock(sc);
3353 }
3354
3355 static int
3356 hdac_audio_ctl_ossmixer_init(struct snd_mixer *m)
3357 {
3358         struct hdac_devinfo *devinfo = mix_getdevinfo(m);
3359         struct hdac_softc *sc = devinfo->codec->sc;
3360         struct hdac_widget *w, *cw;
3361         struct hdac_audio_ctl *ctl;
3362         uint32_t mask, recmask, id;
3363         int i, j, softpcmvol;
3364         nid_t cad;
3365
3366         hdac_lock(sc);
3367
3368         mask = 0;
3369         recmask = 0;
3370
3371         id = hdac_codec_id(devinfo);
3372         cad = devinfo->codec->cad;
3373         for (i = 0; i < HDAC_HP_SWITCH_LEN; i++) {
3374                 if (!(HDA_DEV_MATCH(hdac_hp_switch[i].model,
3375                     sc->pci_subvendor) && hdac_hp_switch[i].id == id))
3376                         continue;
3377                 w = hdac_widget_get(devinfo, hdac_hp_switch[i].hpnid);
3378                 if (w == NULL || w->enable == 0 || w->type !=
3379                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
3380                         continue;
3381                 if (hdac_hp_switch[i].polling != 0)
3382                         callout_reset(&sc->poll_jack, 1,
3383                             hdac_jack_poll_callback, devinfo);
3384                 else if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(w->param.widget_cap))
3385                         hdac_command(sc,
3386                             HDA_CMD_SET_UNSOLICITED_RESPONSE(cad, w->nid,
3387                             HDA_CMD_SET_UNSOLICITED_RESPONSE_ENABLE |
3388                             HDAC_UNSOLTAG_EVENT_HP), cad);
3389                 else
3390                         continue;
3391                 hdac_hp_switch_handler(devinfo);
3392                 HDA_BOOTVERBOSE(
3393                         device_printf(sc->dev,
3394                             "HDA_DEBUG: Enabling headphone/speaker "
3395                             "audio routing switching:\n");
3396                         device_printf(sc->dev,
3397                             "HDA_DEBUG: \tindex=%d nid=%d "
3398                             "pci_subvendor=0x%08x "
3399                             "codec=0x%08x [%s]\n",
3400                             i, w->nid, sc->pci_subvendor, id,
3401                             (hdac_hp_switch[i].polling != 0) ? "POLL" :
3402                             "UNSOL");
3403                 );
3404                 break;
3405         }
3406         for (i = 0; i < HDAC_EAPD_SWITCH_LEN; i++) {
3407                 if (!(HDA_DEV_MATCH(hdac_eapd_switch[i].model,
3408                     sc->pci_subvendor) &&
3409                     hdac_eapd_switch[i].id == id))
3410                         continue;
3411                 w = hdac_widget_get(devinfo, hdac_eapd_switch[i].eapdnid);
3412                 if (w == NULL || w->enable == 0)
3413                         break;
3414                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
3415                     w->param.eapdbtl == HDAC_INVALID)
3416                         break;
3417                 mask |= SOUND_MASK_OGAIN;
3418                 break;
3419         }
3420
3421         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
3422                 w = hdac_widget_get(devinfo, i);
3423                 if (w == NULL || w->enable == 0)
3424                         continue;
3425                 mask |= w->ctlflags;
3426                 if (!(w->pflags & HDA_ADC_RECSEL))
3427                         continue;
3428                 for (j = 0; j < w->nconns; j++) {
3429                         cw = hdac_widget_get(devinfo, w->conns[j]);
3430                         if (cw == NULL || cw->enable == 0)
3431                                 continue;
3432                         recmask |= cw->ctlflags;
3433                 }
3434         }
3435
3436         if (!(mask & SOUND_MASK_PCM)) {
3437                 softpcmvol = 1;
3438                 mask |= SOUND_MASK_PCM;
3439         } else
3440                 softpcmvol = (devinfo->function.audio.quirks &
3441                     HDA_QUIRK_SOFTPCMVOL) ? 1 : 0;
3442
3443         i = 0;
3444         ctl = NULL;
3445         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
3446                 if (ctl->widget == NULL || ctl->enable == 0)
3447                         continue;
3448                 if (!(ctl->ossmask & SOUND_MASK_PCM))
3449                         continue;
3450                 if (ctl->step > 0)
3451                         break;
3452         }
3453
3454         if (softpcmvol == 1 || ctl == NULL) {
3455                 pcm_setflags(sc->dev, pcm_getflags(sc->dev) | SD_F_SOFTPCMVOL);
3456                 HDA_BOOTVERBOSE(
3457                         device_printf(sc->dev,
3458                             "HDA_DEBUG: %s Soft PCM volume\n",
3459                             (softpcmvol == 1) ?
3460                             "Forcing" : "Enabling");
3461                 );
3462                 i = 0;
3463                 /*
3464                  * XXX Temporary quirk for STAC9220, until the parser
3465                  *     become smarter.
3466                  */
3467                 if (id == HDA_CODEC_STAC9220) {
3468                         mask |= SOUND_MASK_VOLUME;
3469                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) !=
3470                             NULL) {
3471                                 if (ctl->widget == NULL || ctl->enable == 0)
3472                                         continue;
3473                                 if (ctl->widget->nid == 11 && ctl->index == 0) {
3474                                         ctl->ossmask = SOUND_MASK_VOLUME;
3475                                         ctl->ossval = 100 | (100 << 8);
3476                                 } else
3477                                         ctl->ossmask &= ~SOUND_MASK_VOLUME;
3478                         }
3479                 } else if (id == HDA_CODEC_STAC9221) {
3480                         mask |= SOUND_MASK_VOLUME;
3481                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) !=
3482                             NULL) {
3483                                 if (ctl->widget == NULL)
3484                                         continue;
3485                                 if (ctl->widget->type ==
3486                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT &&
3487                                     ctl->index == 0 && (ctl->widget->nid == 2 ||
3488                                     ctl->widget->enable != 0)) {
3489                                         ctl->enable = 1;
3490                                         ctl->ossmask = SOUND_MASK_VOLUME;
3491                                         ctl->ossval = 100 | (100 << 8);
3492                                 } else if (ctl->enable == 0)
3493                                         continue;
3494                                 else
3495                                         ctl->ossmask &= ~SOUND_MASK_VOLUME;
3496                         }
3497                 } else {
3498                         mix_setparentchild(m, SOUND_MIXER_VOLUME,
3499                             SOUND_MASK_PCM);
3500                         if (!(mask & SOUND_MASK_VOLUME))
3501                                 mix_setrealdev(m, SOUND_MIXER_VOLUME,
3502                                     SOUND_MIXER_NONE);
3503                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) !=
3504                             NULL) {
3505                                 if (ctl->widget == NULL || ctl->enable == 0)
3506                                         continue;
3507                                 if (!HDA_FLAG_MATCH(ctl->ossmask,
3508                                     SOUND_MASK_VOLUME | SOUND_MASK_PCM))
3509                                         continue;
3510                                 if (!(ctl->mute == 1 && ctl->step == 0))
3511                                         ctl->enable = 0;
3512                         }
3513                 }
3514         }
3515
3516         recmask &= ~(SOUND_MASK_PCM | SOUND_MASK_RECLEV | SOUND_MASK_SPEAKER |
3517             SOUND_MASK_BASS | SOUND_MASK_TREBLE | SOUND_MASK_IGAIN |
3518             SOUND_MASK_OGAIN);
3519         recmask &= (1 << SOUND_MIXER_NRDEVICES) - 1;
3520         mask &= (1 << SOUND_MIXER_NRDEVICES) - 1;
3521
3522         mix_setrecdevs(m, recmask);
3523         mix_setdevs(m, mask);
3524
3525         hdac_unlock(sc);
3526
3527         return (0);
3528 }
3529
3530 static int
3531 hdac_audio_ctl_ossmixer_set(struct snd_mixer *m, unsigned dev,
3532                                         unsigned left, unsigned right)
3533 {
3534         struct hdac_devinfo *devinfo = mix_getdevinfo(m);
3535         struct hdac_softc *sc = devinfo->codec->sc;
3536         struct hdac_widget *w;
3537         struct hdac_audio_ctl *ctl;
3538         uint32_t id, mute;
3539         int lvol, rvol, mlvol, mrvol;
3540         int i = 0;
3541
3542         hdac_lock(sc);
3543         if (dev == SOUND_MIXER_OGAIN) {
3544                 uint32_t orig;
3545                 /*if (left != right || !(left == 0 || left == 1)) {
3546                         hdac_unlock(sc);
3547                         return (-1);
3548                 }*/
3549                 id = hdac_codec_id(devinfo);
3550                 for (i = 0; i < HDAC_EAPD_SWITCH_LEN; i++) {
3551                         if (HDA_DEV_MATCH(hdac_eapd_switch[i].model,
3552                             sc->pci_subvendor) &&
3553                             hdac_eapd_switch[i].id == id)
3554                                 break;
3555                 }
3556                 if (i >= HDAC_EAPD_SWITCH_LEN) {
3557                         hdac_unlock(sc);
3558                         return (-1);
3559                 }
3560                 w = hdac_widget_get(devinfo, hdac_eapd_switch[i].eapdnid);
3561                 if (w == NULL ||
3562                     w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
3563                     w->param.eapdbtl == HDAC_INVALID) {
3564                         hdac_unlock(sc);
3565                         return (-1);
3566                 }
3567                 orig = w->param.eapdbtl;
3568                 if (left == 0)
3569                         w->param.eapdbtl &= ~HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3570                 else
3571                         w->param.eapdbtl |= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3572                 if (orig != w->param.eapdbtl) {
3573                         uint32_t val;
3574
3575                         if (hdac_eapd_switch[i].hp_switch != 0)
3576                                 hdac_hp_switch_handler(devinfo);
3577                         val = w->param.eapdbtl;
3578                         if (devinfo->function.audio.quirks & HDA_QUIRK_EAPDINV)
3579                                 val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3580                         hdac_command(sc,
3581                             HDA_CMD_SET_EAPD_BTL_ENABLE(devinfo->codec->cad,
3582                             w->nid, val), devinfo->codec->cad);
3583                 }
3584                 hdac_unlock(sc);
3585                 return (left | (left << 8));
3586         }
3587         if (dev == SOUND_MIXER_VOLUME)
3588                 devinfo->function.audio.mvol = left | (right << 8);
3589
3590         mlvol = devinfo->function.audio.mvol & 0x7f;
3591         mrvol = (devinfo->function.audio.mvol >> 8) & 0x7f;
3592         lvol = 0;
3593         rvol = 0;
3594
3595         i = 0;
3596         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
3597                 if (ctl->widget == NULL || ctl->enable == 0 ||
3598                     !(ctl->ossmask & (1 << dev)))
3599                         continue;
3600                 switch (dev) {
3601                 case SOUND_MIXER_VOLUME:
3602                         lvol = ((ctl->ossval & 0x7f) * left) / 100;
3603                         lvol = (lvol * ctl->step) / 100;
3604                         rvol = (((ctl->ossval >> 8) & 0x7f) * right) / 100;
3605                         rvol = (rvol * ctl->step) / 100;
3606                         break;
3607                 default:
3608                         if (ctl->ossmask & SOUND_MASK_VOLUME) {
3609                                 lvol = (left * mlvol) / 100;
3610                                 lvol = (lvol * ctl->step) / 100;
3611                                 rvol = (right * mrvol) / 100;
3612                                 rvol = (rvol * ctl->step) / 100;
3613                         } else {
3614                                 lvol = (left * ctl->step) / 100;
3615                                 rvol = (right * ctl->step) / 100;
3616                         }
3617                         ctl->ossval = left | (right << 8);
3618                         break;
3619                 }
3620                 mute = 0;
3621                 if (ctl->step < 1) {
3622                         mute |= (left == 0) ? HDA_AMP_MUTE_LEFT :
3623                             (ctl->muted & HDA_AMP_MUTE_LEFT);
3624                         mute |= (right == 0) ? HDA_AMP_MUTE_RIGHT :
3625                             (ctl->muted & HDA_AMP_MUTE_RIGHT);
3626                 } else {
3627                         mute |= (lvol == 0) ? HDA_AMP_MUTE_LEFT :
3628                             (ctl->muted & HDA_AMP_MUTE_LEFT);
3629                         mute |= (rvol == 0) ? HDA_AMP_MUTE_RIGHT :
3630                             (ctl->muted & HDA_AMP_MUTE_RIGHT);
3631                 }
3632                 hdac_audio_ctl_amp_set(ctl, mute, lvol, rvol);
3633         }
3634         hdac_unlock(sc);
3635
3636         return (left | (right << 8));
3637 }
3638
3639 static int
3640 hdac_audio_ctl_ossmixer_setrecsrc(struct snd_mixer *m, uint32_t src)
3641 {
3642         struct hdac_devinfo *devinfo = mix_getdevinfo(m);
3643         struct hdac_widget *w, *cw;
3644         struct hdac_softc *sc = devinfo->codec->sc;
3645         uint32_t ret = src, target;
3646         int i, j;
3647
3648         target = 0;
3649         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
3650                 if (src & (1 << i)) {
3651                         target = 1 << i;
3652                         break;
3653                 }
3654         }
3655
3656         hdac_lock(sc);
3657
3658         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
3659                 w = hdac_widget_get(devinfo, i);
3660                 if (w == NULL || w->enable == 0)
3661                         continue;
3662                 if (!(w->pflags & HDA_ADC_RECSEL))
3663                         continue;
3664                 for (j = 0; j < w->nconns; j++) {
3665                         cw = hdac_widget_get(devinfo, w->conns[j]);
3666                         if (cw == NULL || cw->enable == 0)
3667                                 continue;
3668                         if ((target == SOUND_MASK_VOLUME &&
3669                             cw->type !=
3670                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) ||
3671                             (target != SOUND_MASK_VOLUME &&
3672                             cw->type ==
3673                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER))
3674                                 continue;
3675                         if (cw->ctlflags & target) {
3676                                 if (!(w->pflags & HDA_ADC_LOCKED))
3677                                         hdac_widget_connection_select(w, j);
3678                                 ret = target;
3679                                 j += w->nconns;
3680                         }
3681                 }
3682         }
3683
3684         hdac_unlock(sc);
3685
3686         return (ret);
3687 }
3688
3689 static kobj_method_t hdac_audio_ctl_ossmixer_methods[] = {
3690         KOBJMETHOD(mixer_init,          hdac_audio_ctl_ossmixer_init),
3691         KOBJMETHOD(mixer_set,           hdac_audio_ctl_ossmixer_set),
3692         KOBJMETHOD(mixer_setrecsrc,     hdac_audio_ctl_ossmixer_setrecsrc),
3693         KOBJMETHOD_END
3694 };
3695 MIXER_DECLARE(hdac_audio_ctl_ossmixer);
3696
3697 static void
3698 hdac_unsolq_task(void *context, int pending)
3699 {
3700         struct hdac_softc *sc;
3701
3702         sc = (struct hdac_softc *)context;
3703
3704         hdac_lock(sc);
3705         hdac_unsolq_flush(sc);
3706         hdac_unlock(sc);
3707 }
3708
3709 /****************************************************************************
3710  * int hdac_attach(device_t)
3711  *
3712  * Attach the device into the kernel. Interrupts usually won't be enabled
3713  * when this function is called. Setup everything that doesn't require
3714  * interrupts and defer probing of codecs until interrupts are enabled.
3715  ****************************************************************************/
3716 static int
3717 hdac_attach(device_t dev)
3718 {
3719         struct hdac_softc *sc;
3720         int result;
3721         int i;
3722         uint16_t vendor;
3723         uint8_t v;
3724
3725         sc = kmalloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
3726         sc->lock = snd_mtxcreate(device_get_nameunit(dev), HDAC_MTX_NAME);
3727         sc->dev = dev;
3728         sc->pci_subvendor = (uint32_t)pci_get_subdevice(sc->dev) << 16;
3729         sc->pci_subvendor |= (uint32_t)pci_get_subvendor(sc->dev) & 0x0000ffff;
3730         vendor = pci_get_vendor(dev);
3731
3732         if (sc->pci_subvendor == HP_NX6325_SUBVENDORX) {
3733                 /* Screw nx6325 - subdevice/subvendor swapped */
3734                 sc->pci_subvendor = HP_NX6325_SUBVENDOR;
3735         }
3736
3737         callout_init(&sc->poll_hda);
3738         callout_init(&sc->poll_hdac);
3739         callout_init(&sc->poll_jack);
3740
3741         TASK_INIT(&sc->unsolq_task, 0, hdac_unsolq_task, sc);
3742
3743         sc->poll_ticks = 1;
3744         sc->poll_ival = HDAC_POLL_INTERVAL;
3745         if (resource_int_value(device_get_name(dev),
3746             device_get_unit(dev), "polling", &i) == 0 && i != 0)
3747                 sc->polling = 1;
3748         else
3749                 sc->polling = 0;
3750
3751         sc->chan_size = pcm_getbuffersize(dev,
3752             HDA_BUFSZ_MIN, HDA_BUFSZ_DEFAULT, HDA_BUFSZ_MAX);
3753
3754         if (resource_int_value(device_get_name(dev),
3755             device_get_unit(dev), "blocksize", &i) == 0 && i > 0) {
3756                 i &= HDA_BLK_ALIGN;
3757                 if (i < HDA_BLK_MIN)
3758                         i = HDA_BLK_MIN;
3759                 sc->chan_blkcnt = sc->chan_size / i;
3760                 i = 0;
3761                 while (sc->chan_blkcnt >> i)
3762                         i++;
3763                 sc->chan_blkcnt = 1 << (i - 1);
3764                 if (sc->chan_blkcnt < HDA_BDL_MIN)
3765                         sc->chan_blkcnt = HDA_BDL_MIN;
3766                 else if (sc->chan_blkcnt > HDA_BDL_MAX)
3767                         sc->chan_blkcnt = HDA_BDL_MAX;
3768         } else
3769                 sc->chan_blkcnt = HDA_BDL_DEFAULT;
3770
3771         result = bus_dma_tag_create(NULL,       /* parent */
3772             HDAC_DMA_ALIGNMENT,                 /* alignment */
3773             0,                                  /* boundary */
3774             BUS_SPACE_MAXADDR_32BIT,            /* lowaddr */
3775             BUS_SPACE_MAXADDR,                  /* highaddr */
3776             NULL,                               /* filtfunc */
3777             NULL,                               /* fistfuncarg */
3778             sc->chan_size,                      /* maxsize */
3779             1,                                  /* nsegments */
3780             sc->chan_size,                      /* maxsegsz */
3781             0,                                  /* flags */
3782             &sc->chan_dmat);                    /* dmat */
3783         if (result != 0) {
3784                 device_printf(dev, "%s: bus_dma_tag_create failed (%x)\n",
3785                      __func__, result);
3786                 snd_mtxfree(sc->lock);
3787                 kfree(sc, M_DEVBUF);
3788                 return (ENXIO);
3789         }
3790
3791
3792         sc->hdabus = NULL;
3793         for (i = 0; i < HDAC_CODEC_MAX; i++)
3794                 sc->codecs[i] = NULL;
3795
3796         pci_enable_busmaster(dev);
3797
3798         if (vendor == INTEL_VENDORID) {
3799                 /* TCSEL -> TC0 */
3800                 v = pci_read_config(dev, 0x44, 1);
3801                 pci_write_config(dev, 0x44, v & 0xf8, 1);
3802                 HDA_BOOTVERBOSE(
3803                         device_printf(dev, "TCSEL: 0x%02d -> 0x%02d\n", v,
3804                             pci_read_config(dev, 0x44, 1));
3805                 );
3806         }
3807
3808 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
3809         sc->flags |= HDAC_F_DMA_NOCACHE;
3810
3811         if (resource_int_value(device_get_name(dev),
3812             device_get_unit(dev), "snoop", &i) == 0 && i != 0) {
3813 #else
3814         sc->flags &= ~HDAC_F_DMA_NOCACHE;
3815 #endif
3816
3817                 /*
3818                  * Try to enable PCIe snoop to avoid messing around with
3819                  * uncacheable DMA attribute. Since PCIe snoop register
3820                  * config is pretty much vendor specific, there are no
3821                  * general solutions on how to enable it, forcing us (even
3822                  * Microsoft) to enable uncacheable or write combined DMA
3823                  * by default.
3824                  *
3825                  * http://msdn2.microsoft.com/en-us/library/ms790324.aspx
3826                  */
3827                 for (i = 0; i < HDAC_PCIESNOOP_LEN; i++) {
3828                         if (hdac_pcie_snoop[i].vendor != vendor)
3829                                 continue;
3830                         sc->flags &= ~HDAC_F_DMA_NOCACHE;
3831                         if (hdac_pcie_snoop[i].reg == 0x00)
3832                                 break;
3833                         v = pci_read_config(dev, hdac_pcie_snoop[i].reg, 1);
3834                         if ((v & hdac_pcie_snoop[i].enable) ==
3835                             hdac_pcie_snoop[i].enable)
3836                                 break;
3837                         v &= hdac_pcie_snoop[i].mask;
3838                         v |= hdac_pcie_snoop[i].enable;
3839                         pci_write_config(dev, hdac_pcie_snoop[i].reg, v, 1);
3840                         v = pci_read_config(dev, hdac_pcie_snoop[i].reg, 1);
3841                         if ((v & hdac_pcie_snoop[i].enable) !=
3842                             hdac_pcie_snoop[i].enable) {
3843                                 HDA_BOOTVERBOSE(
3844                                         device_printf(dev,
3845                                             "WARNING: Failed to enable PCIe "
3846                                             "snoop!\n");
3847                                 );
3848 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
3849                                 sc->flags |= HDAC_F_DMA_NOCACHE;
3850 #endif
3851                         }
3852                         break;
3853                 }
3854
3855                 if (pci_is_pcie(dev)) {
3856                         int pcie_cap = pci_get_pciecap_ptr(dev);
3857                         uint16_t dev_ctl;
3858
3859                         dev_ctl = pci_read_config(dev,
3860                             pcie_cap + PCIER_DEVCTRL, 2);
3861                         if (bootverbose) {
3862                                 device_printf(dev, "device ctrl %#x\n",
3863                                     dev_ctl);
3864                         }
3865
3866                         if (dev_ctl & PCIEM_DEVCTL_NOSNOOP) {
3867                                 dev_ctl &= ~PCIEM_DEVCTL_NOSNOOP;
3868                                 pci_write_config(dev,
3869                                     pcie_cap + PCIER_DEVCTRL, dev_ctl, 2);
3870
3871                                 if (bootverbose)
3872                                         device_printf(dev, "disable nosnoop\n");
3873                         }
3874                         sc->flags &= ~HDAC_F_DMA_NOCACHE;
3875                 }
3876
3877 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
3878         }
3879 #endif
3880
3881         HDA_BOOTVERBOSE(
3882                 device_printf(dev, "DMA Coherency: %s / vendor=0x%04x\n",
3883                     (sc->flags & HDAC_F_DMA_NOCACHE) ?
3884                     "Uncacheable" : "PCIe snoop", vendor);
3885         );
3886
3887         /* Allocate resources */
3888         result = hdac_mem_alloc(sc);
3889         if (result != 0)
3890                 goto hdac_attach_fail;
3891         result = hdac_irq_alloc(sc);
3892         if (result != 0)
3893                 goto hdac_attach_fail;
3894
3895         /* Get Capabilities */
3896         result = hdac_get_capabilities(sc);
3897         if (result != 0)
3898                 goto hdac_attach_fail;
3899
3900         /* Allocate CORB and RIRB dma memory */
3901         result = hdac_dma_alloc(sc, &sc->corb_dma,
3902             sc->corb_size * sizeof(uint32_t));
3903         if (result != 0)
3904                 goto hdac_attach_fail;
3905         result = hdac_dma_alloc(sc, &sc->rirb_dma,
3906             sc->rirb_size * sizeof(struct hdac_rirb));
3907         if (result != 0)
3908                 goto hdac_attach_fail;
3909
3910         /* Quiesce everything */
3911         hdac_reset(sc);
3912
3913         /* Initialize the CORB and RIRB */
3914         hdac_corb_init(sc);
3915         hdac_rirb_init(sc);
3916
3917         /* Defer remaining of initialization until interrupts are enabled */
3918         sc->intrhook.ich_func = hdac_attach2;
3919         sc->intrhook.ich_arg = (void *)sc;
3920         sc->intrhook.ich_desc = "snd_hda";
3921         if (cold == 0 || config_intrhook_establish(&sc->intrhook) != 0) {
3922                 sc->intrhook.ich_func = NULL;
3923                 hdac_attach2(sc);
3924         }
3925
3926         return (0);
3927
3928 hdac_attach_fail:
3929         hdac_irq_free(sc);
3930         hdac_dma_free(sc, &sc->rirb_dma);
3931         hdac_dma_free(sc, &sc->corb_dma);
3932         hdac_mem_free(sc);
3933         snd_mtxfree(sc->lock);
3934         kfree(sc, M_DEVBUF);
3935
3936         return (ENXIO);
3937 }
3938
3939 static void
3940 hdac_audio_parse(struct hdac_devinfo *devinfo)
3941 {
3942         struct hdac_softc *sc = devinfo->codec->sc;
3943         struct hdac_widget *w;
3944         uint32_t res;
3945         int i;
3946         nid_t cad, nid;
3947
3948         cad = devinfo->codec->cad;
3949         nid = devinfo->nid;
3950
3951         hdac_command(sc,
3952             HDA_CMD_SET_POWER_STATE(cad, nid, HDA_CMD_POWER_STATE_D0), cad);
3953
3954         DELAY(100);
3955
3956         res = hdac_command(sc,
3957             HDA_CMD_GET_PARAMETER(cad , nid, HDA_PARAM_SUB_NODE_COUNT), cad);
3958
3959         devinfo->nodecnt = HDA_PARAM_SUB_NODE_COUNT_TOTAL(res);
3960         devinfo->startnode = HDA_PARAM_SUB_NODE_COUNT_START(res);
3961         devinfo->endnode = devinfo->startnode + devinfo->nodecnt;
3962
3963         res = hdac_command(sc,
3964             HDA_CMD_GET_PARAMETER(cad , nid, HDA_PARAM_GPIO_COUNT), cad);
3965         devinfo->function.audio.gpio = res;
3966
3967         HDA_BOOTVERBOSE(
3968                 device_printf(sc->dev, "       Vendor: 0x%08x\n",
3969                     devinfo->vendor_id);
3970                 device_printf(sc->dev, "       Device: 0x%08x\n",
3971                     devinfo->device_id);
3972                 device_printf(sc->dev, "     Revision: 0x%08x\n",
3973                     devinfo->revision_id);
3974                 device_printf(sc->dev, "     Stepping: 0x%08x\n",
3975                     devinfo->stepping_id);
3976                 device_printf(sc->dev, "PCI Subvendor: 0x%08x\n",
3977                     sc->pci_subvendor);
3978                 device_printf(sc->dev, "        Nodes: start=%d "
3979                     "endnode=%d total=%d\n",
3980                     devinfo->startnode, devinfo->endnode, devinfo->nodecnt);
3981                 device_printf(sc->dev, "    CORB size: %d\n", sc->corb_size);
3982                 device_printf(sc->dev, "    RIRB size: %d\n", sc->rirb_size);
3983                 device_printf(sc->dev, "      Streams: ISS=%d OSS=%d BSS=%d\n",
3984                     sc->num_iss, sc->num_oss, sc->num_bss);
3985                 device_printf(sc->dev, "         GPIO: 0x%08x\n",
3986                     devinfo->function.audio.gpio);
3987                 device_printf(sc->dev, "               NumGPIO=%d NumGPO=%d "
3988                     "NumGPI=%d GPIWake=%d GPIUnsol=%d\n",
3989                     HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio),
3990                     HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio),
3991                     HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio),
3992                     HDA_PARAM_GPIO_COUNT_GPI_WAKE(devinfo->function.audio.gpio),
3993                     HDA_PARAM_GPIO_COUNT_GPI_UNSOL(devinfo->function.audio.gpio));
3994         );
3995
3996         res = hdac_command(sc,
3997             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_SUPP_STREAM_FORMATS),
3998             cad);
3999         devinfo->function.audio.supp_stream_formats = res;
4000
4001         res = hdac_command(sc,
4002             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_SUPP_PCM_SIZE_RATE),
4003             cad);
4004         devinfo->function.audio.supp_pcm_size_rate = res;
4005
4006         res = hdac_command(sc,
4007             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_OUTPUT_AMP_CAP),
4008             cad);
4009         devinfo->function.audio.outamp_cap = res;
4010
4011         res = hdac_command(sc,
4012             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_INPUT_AMP_CAP),
4013             cad);
4014         devinfo->function.audio.inamp_cap = res;
4015
4016         if (devinfo->nodecnt > 0)
4017                 devinfo->widget = kmalloc(
4018                     sizeof(*(devinfo->widget)) * devinfo->nodecnt,
4019                     M_HDAC, M_WAITOK | M_ZERO);
4020         else
4021                 devinfo->widget = NULL;
4022
4023         if (devinfo->widget == NULL) {
4024                 device_printf(sc->dev, "unable to allocate widgets!\n");
4025                 devinfo->endnode = devinfo->startnode;
4026                 devinfo->nodecnt = 0;
4027                 return;
4028         }
4029
4030         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4031                 w = hdac_widget_get(devinfo, i);
4032                 if (w == NULL)
4033                         device_printf(sc->dev, "Ghost widget! nid=%d!\n", i);
4034                 else {
4035                         w->devinfo = devinfo;
4036                         w->nid = i;
4037                         w->enable = 1;
4038                         w->selconn = -1;
4039                         w->pflags = 0;
4040                         w->ctlflags = 0;
4041                         w->param.eapdbtl = HDAC_INVALID;
4042                         hdac_widget_parse(w);
4043                 }
4044         }
4045 }
4046
4047 static void
4048 hdac_audio_ctl_parse(struct hdac_devinfo *devinfo)
4049 {
4050         struct hdac_softc *sc = devinfo->codec->sc;
4051         struct hdac_audio_ctl *ctls;
4052         struct hdac_widget *w, *cw;
4053         int i, j, cnt, max, ocap, icap;
4054         int mute, offset, step, size;
4055
4056         /* XXX This is redundant */
4057         max = 0;
4058         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4059                 w = hdac_widget_get(devinfo, i);
4060                 if (w == NULL || w->enable == 0)
4061                         continue;
4062                 if (w->param.outamp_cap != 0)
4063                         max++;
4064                 if (w->param.inamp_cap != 0) {
4065                         switch (w->type) {
4066                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4067                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4068                                 for (j = 0; j < w->nconns; j++) {
4069                                         cw = hdac_widget_get(devinfo,
4070                                             w->conns[j]);
4071                                         if (cw == NULL || cw->enable == 0)
4072                                                 continue;
4073                                         max++;
4074                                 }
4075                                 break;
4076                         default:
4077                                 max++;
4078                                 break;
4079                         }
4080                 }
4081         }
4082
4083         devinfo->function.audio.ctlcnt = max;
4084
4085         if (max < 1)
4086                 return;
4087
4088         ctls = kmalloc(sizeof(*ctls) * max, M_HDAC, M_ZERO | M_WAITOK);
4089         cnt = 0;
4090         for (i = devinfo->startnode; cnt < max && i < devinfo->endnode; i++) {
4091                 if (cnt >= max) {
4092                         device_printf(sc->dev, "%s: Ctl overflow!\n",
4093                             __func__);
4094                         break;
4095                 }
4096                 w = hdac_widget_get(devinfo, i);
4097                 if (w == NULL || w->enable == 0)
4098                         continue;
4099                 ocap = w->param.outamp_cap;
4100                 icap = w->param.inamp_cap;
4101                 if (ocap != 0) {
4102                         mute = HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(ocap);
4103                         step = HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(ocap);
4104                         size = HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(ocap);
4105                         offset = HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(ocap);
4106                         /*if (offset > step) {
4107                                 HDA_BOOTVERBOSE(
4108                                         device_printf(sc->dev,
4109                                             "HDA_DEBUG: BUGGY outamp: nid=%d "
4110                                             "[offset=%d > step=%d]\n",
4111                                             w->nid, offset, step);
4112                                 );
4113                                 offset = step;
4114                         }*/
4115                         ctls[cnt].enable = 1;
4116                         ctls[cnt].widget = w;
4117                         ctls[cnt].mute = mute;
4118                         ctls[cnt].step = step;
4119                         ctls[cnt].size = size;
4120                         ctls[cnt].offset = offset;
4121                         ctls[cnt].left = offset;
4122                         ctls[cnt].right = offset;
4123                         ctls[cnt++].dir = HDA_CTL_OUT;
4124                 }
4125
4126                 if (icap != 0) {
4127                         mute = HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(icap);
4128                         step = HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(icap);
4129                         size = HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(icap);
4130                         offset = HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(icap);
4131                         /*if (offset > step) {
4132                                 HDA_BOOTVERBOSE(
4133                                         device_printf(sc->dev,
4134                                             "HDA_DEBUG: BUGGY inamp: nid=%d "
4135                                             "[offset=%d > step=%d]\n",
4136                                             w->nid, offset, step);
4137                                 );
4138                                 offset = step;
4139                         }*/
4140                         switch (w->type) {
4141                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4142                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4143                                 for (j = 0; j < w->nconns; j++) {
4144                                         if (cnt >= max) {
4145                                                 device_printf(sc->dev,
4146                                                     "%s: Ctl overflow!\n",
4147                                                     __func__);
4148                                                 break;
4149                                         }
4150                                         cw = hdac_widget_get(devinfo,
4151                                             w->conns[j]);
4152                                         if (cw == NULL || cw->enable == 0)
4153                                                 continue;
4154                                         ctls[cnt].enable = 1;
4155                                         ctls[cnt].widget = w;
4156                                         ctls[cnt].childwidget = cw;
4157                                         ctls[cnt].index = j;
4158                                         ctls[cnt].mute = mute;
4159                                         ctls[cnt].step = step;
4160                                         ctls[cnt].size = size;
4161                                         ctls[cnt].offset = offset;
4162                                         ctls[cnt].left = offset;
4163                                         ctls[cnt].right = offset;
4164                                         ctls[cnt++].dir = HDA_CTL_IN;
4165                                 }
4166                                 break;
4167                         default:
4168                                 if (cnt >= max) {
4169                                         device_printf(sc->dev,
4170                                             "%s: Ctl overflow!\n",
4171                                             __func__);
4172                                         break;
4173                                 }
4174                                 ctls[cnt].enable = 1;
4175                                 ctls[cnt].widget = w;
4176                                 ctls[cnt].mute = mute;
4177                                 ctls[cnt].step = step;
4178                                 ctls[cnt].size = size;
4179                                 ctls[cnt].offset = offset;
4180                                 ctls[cnt].left = offset;
4181                                 ctls[cnt].right = offset;
4182                                 ctls[cnt++].dir = HDA_CTL_IN;
4183                                 break;
4184                         }
4185                 }
4186         }
4187
4188         devinfo->function.audio.ctl = ctls;
4189 }
4190
4191 static const struct {
4192         uint32_t model;
4193         uint32_t id;
4194         uint32_t set, unset;
4195 } hdac_quirks[] = {
4196         /*
4197          * XXX Force stereo quirk. Monoural recording / playback
4198          *     on few codecs (especially ALC880) seems broken or
4199          *     perhaps unsupported.
4200          */
4201         { HDA_MATCH_ALL, HDA_MATCH_ALL,
4202             HDA_QUIRK_FORCESTEREO | HDA_QUIRK_IVREF, 0 },
4203         { ACER_ALL_SUBVENDOR, HDA_MATCH_ALL,
4204             HDA_QUIRK_GPIO0, 0 },
4205         { ASUS_M5200_SUBVENDOR, HDA_CODEC_ALC880,
4206             HDA_QUIRK_GPIO0, 0 },
4207         { ASUS_A7M_SUBVENDOR, HDA_CODEC_ALC880,
4208             HDA_QUIRK_GPIO0, 0 },
4209         { ASUS_A7T_SUBVENDOR, HDA_CODEC_ALC882,
4210             HDA_QUIRK_GPIO0, 0 },
4211         { ASUS_W2J_SUBVENDOR, HDA_CODEC_ALC882,
4212             HDA_QUIRK_GPIO0, 0 },
4213         { ASUS_U5F_SUBVENDOR, HDA_CODEC_AD1986A,
4214             HDA_QUIRK_EAPDINV, 0 },
4215         { ASUS_A8JC_SUBVENDOR, HDA_CODEC_AD1986A,
4216             HDA_QUIRK_EAPDINV, 0 },
4217         { ASUS_F3JC_SUBVENDOR, HDA_CODEC_ALC861,
4218             HDA_QUIRK_OVREF, 0 },
4219         { ASUS_W6F_SUBVENDOR, HDA_CODEC_ALC861,
4220             HDA_QUIRK_OVREF, 0 },
4221         { UNIWILL_9075_SUBVENDOR, HDA_CODEC_ALC861,
4222             HDA_QUIRK_OVREF, 0 },
4223         /*{ ASUS_M2N_SUBVENDOR, HDA_CODEC_AD1988,
4224             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },*/
4225         { MEDION_MD95257_SUBVENDOR, HDA_CODEC_ALC880,
4226             HDA_QUIRK_GPIO1, 0 },
4227         { LENOVO_3KN100_SUBVENDOR, HDA_CODEC_AD1986A,
4228             HDA_QUIRK_EAPDINV, 0 },
4229         { SAMSUNG_Q1_SUBVENDOR, HDA_CODEC_AD1986A,
4230             HDA_QUIRK_EAPDINV, 0 },
4231         { APPLE_MB3_SUBVENDOR, HDA_CODEC_ALC885,
4232             HDA_QUIRK_GPIO0 | HDA_QUIRK_OVREF50, 0},
4233         { APPLE_INTEL_MAC, HDA_CODEC_STAC9221,
4234             HDA_QUIRK_GPIO0 | HDA_QUIRK_GPIO1, 0 },
4235         { HDA_MATCH_ALL, HDA_CODEC_AD1988,
4236             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },
4237         { HDA_MATCH_ALL, HDA_CODEC_AD1988B,
4238             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },
4239         { HDA_MATCH_ALL, HDA_CODEC_CXVENICE,
4240             0, HDA_QUIRK_FORCESTEREO },
4241         { HDA_MATCH_ALL, HDA_CODEC_STACXXXX,
4242             HDA_QUIRK_SOFTPCMVOL, 0 }
4243 };
4244 #define HDAC_QUIRKS_LEN NELEM(hdac_quirks)
4245
4246 static void
4247 hdac_vendor_patch_parse(struct hdac_devinfo *devinfo)
4248 {
4249         struct hdac_widget *w;
4250         struct hdac_audio_ctl *ctl;
4251         uint32_t id, subvendor;
4252         int i;
4253
4254         id = hdac_codec_id(devinfo);
4255         subvendor = devinfo->codec->sc->pci_subvendor;
4256
4257         /*
4258          * Quirks
4259          */
4260         for (i = 0; i < HDAC_QUIRKS_LEN; i++) {
4261                 if (!(HDA_DEV_MATCH(hdac_quirks[i].model, subvendor) &&
4262                     HDA_DEV_MATCH(hdac_quirks[i].id, id)))
4263                         continue;
4264                 if (hdac_quirks[i].set != 0)
4265                         devinfo->function.audio.quirks |=
4266                             hdac_quirks[i].set;
4267                 if (hdac_quirks[i].unset != 0)
4268                         devinfo->function.audio.quirks &=
4269                             ~(hdac_quirks[i].unset);
4270         }
4271
4272         switch (id) {
4273         case HDA_CODEC_ALC260:
4274                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4275                         w = hdac_widget_get(devinfo, i);
4276                         if (w == NULL || w->enable == 0)
4277                                 continue;
4278                         if (w->type !=
4279                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT)
4280                                 continue;
4281                         if (w->nid != 5)
4282                                 w->enable = 0;
4283                 }
4284                 if (subvendor == HP_XW4300_SUBVENDOR) {
4285                         ctl = hdac_audio_ctl_amp_get(devinfo, 16, 0, 1);
4286                         if (ctl != NULL && ctl->widget != NULL) {
4287                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4288                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4289                         }
4290                         ctl = hdac_audio_ctl_amp_get(devinfo, 17, 0, 1);
4291                         if (ctl != NULL && ctl->widget != NULL) {
4292                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4293                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4294                         }
4295                 } else if (subvendor == HP_3010_SUBVENDOR) {
4296                         ctl = hdac_audio_ctl_amp_get(devinfo, 17, 0, 1);
4297                         if (ctl != NULL && ctl->widget != NULL) {
4298                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4299                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4300                         }
4301                         ctl = hdac_audio_ctl_amp_get(devinfo, 21, 0, 1);
4302                         if (ctl != NULL && ctl->widget != NULL) {
4303                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4304                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4305                         }
4306                 }
4307                 break;
4308         case HDA_CODEC_ALC268:
4309                 if (HDA_DEV_MATCH(ACER_ALL_SUBVENDOR, subvendor)) {
4310                         w = hdac_widget_get(devinfo, 29);
4311                         if (w != NULL) {
4312                                 w->enable = 1;
4313                                 w->type =
4314                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET;
4315                                 w->param.widget_cap &=
4316                                     ~HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK;
4317                                 w->param.widget_cap |=
4318                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET <<
4319                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT;
4320                                 strlcpy(w->name, "beep widget", sizeof(w->name));
4321                         }
4322                 }
4323                 break;
4324         case HDA_CODEC_ALC262:
4325                 if (subvendor == HP_DC7700_SUBVENDOR) {
4326                         ctl = hdac_audio_ctl_amp_get(devinfo, 22, 0, 1);
4327                         if (ctl != NULL && ctl->widget != NULL) {
4328                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4329                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4330                         }
4331                         ctl = hdac_audio_ctl_amp_get(devinfo, 27, 0, 1);
4332                         if (ctl != NULL && ctl->widget != NULL) {
4333                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4334                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4335                         }
4336                 }
4337                 break;
4338         case HDA_CODEC_ALC861:
4339                 ctl = hdac_audio_ctl_amp_get(devinfo, 21, 2, 1);
4340                 if (ctl != NULL)
4341                         ctl->muted = HDA_AMP_MUTE_ALL;
4342                 break;
4343         case HDA_CODEC_ALC880:
4344                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4345                         w = hdac_widget_get(devinfo, i);
4346                         if (w == NULL || w->enable == 0)
4347                                 continue;
4348                         if (w->type ==
4349                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT &&
4350                             w->nid != 9 && w->nid != 29) {
4351                                         w->enable = 0;
4352                         } else if (w->type !=
4353                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET &&
4354                             w->nid == 29) {
4355                                 w->type =
4356                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET;
4357                                 w->param.widget_cap &=
4358                                     ~HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK;
4359                                 w->param.widget_cap |=
4360                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET <<
4361                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT;
4362                                 strlcpy(w->name, "beep widget", sizeof(w->name));
4363                         }
4364                 }
4365                 break;
4366         case HDA_CODEC_ALC883:
4367                 /*
4368                  * nid: 24/25 = External (jack) or Internal (fixed) Mic.
4369                  *              Clear vref cap for jack connectivity.
4370                  */
4371                 w = hdac_widget_get(devinfo, 24);
4372                 if (w != NULL && w->enable != 0 && w->type ==
4373                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4374                     (w->wclass.pin.config &
4375                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
4376                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK)
4377                         w->wclass.pin.cap &= ~(
4378                             HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK |
4379                             HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK |
4380                             HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK);
4381                 w = hdac_widget_get(devinfo, 25);
4382                 if (w != NULL && w->enable != 0 && w->type ==
4383                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4384                     (w->wclass.pin.config &
4385                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
4386                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK)
4387                         w->wclass.pin.cap &= ~(
4388                             HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK |
4389                             HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK |
4390                             HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK);
4391                 /*
4392                  * nid: 26 = Line-in, leave it alone.
4393                  */
4394                 break;
4395         case HDA_CODEC_AD1981HD:
4396                 w = hdac_widget_get(devinfo, 11);
4397                 if (w != NULL && w->enable != 0 && w->nconns > 3)
4398                         w->selconn = 3;
4399                 if (subvendor == IBM_M52_SUBVENDOR) {
4400                         ctl = hdac_audio_ctl_amp_get(devinfo, 7, 0, 1);
4401                         if (ctl != NULL)
4402                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4403                 }
4404                 break;
4405         case HDA_CODEC_AD1986A:
4406                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4407                         w = hdac_widget_get(devinfo, i);
4408                         if (w == NULL || w->enable == 0)
4409                                 continue;
4410                         if (w->type !=
4411                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT)
4412                                 continue;
4413                         if (w->nid != 3)
4414                                 w->enable = 0;
4415                 }
4416                 if (subvendor == ASUS_M2NPVMX_SUBVENDOR ||
4417                     subvendor == ASUS_A8NVMCSM_SUBVENDOR) {
4418                         /* nid 28 is mic, nid 29 is line-in */
4419                         w = hdac_widget_get(devinfo, 15);
4420                         if (w != NULL)
4421                                 w->selconn = 2;
4422                         w = hdac_widget_get(devinfo, 16);
4423                         if (w != NULL)
4424                                 w->selconn = 1;
4425                 }
4426                 break;
4427         case HDA_CODEC_AD1988:
4428         case HDA_CODEC_AD1988B:
4429                 /*w = hdac_widget_get(devinfo, 12);
4430                 if (w != NULL) {
4431                         w->selconn = 1;
4432                         w->pflags |= HDA_ADC_LOCKED;
4433                 }
4434                 w = hdac_widget_get(devinfo, 13);
4435                 if (w != NULL) {
4436                         w->selconn = 4;
4437                         w->pflags |= HDA_ADC_LOCKED;
4438                 }
4439                 w = hdac_widget_get(devinfo, 14);
4440                 if (w != NULL) {
4441                         w->selconn = 2;
4442                         w->pflags |= HDA_ADC_LOCKED;
4443                 }*/
4444                 ctl = hdac_audio_ctl_amp_get(devinfo, 57, 0, 1);
4445                 if (ctl != NULL) {
4446                         ctl->ossmask = SOUND_MASK_IGAIN;
4447                         ctl->widget->ctlflags |= SOUND_MASK_IGAIN;
4448                 }
4449                 ctl = hdac_audio_ctl_amp_get(devinfo, 58, 0, 1);
4450                 if (ctl != NULL) {
4451                         ctl->ossmask = SOUND_MASK_IGAIN;
4452                         ctl->widget->ctlflags |= SOUND_MASK_IGAIN;
4453                 }
4454                 ctl = hdac_audio_ctl_amp_get(devinfo, 60, 0, 1);
4455                 if (ctl != NULL) {
4456                         ctl->ossmask = SOUND_MASK_IGAIN;
4457                         ctl->widget->ctlflags |= SOUND_MASK_IGAIN;
4458                 }
4459                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 0, 1);
4460                 if (ctl != NULL) {
4461                         ctl->ossmask = SOUND_MASK_MIC | SOUND_MASK_VOLUME;
4462                         ctl->widget->ctlflags |= SOUND_MASK_MIC;
4463                 }
4464                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 4, 1);
4465                 if (ctl != NULL) {
4466                         ctl->ossmask = SOUND_MASK_MIC | SOUND_MASK_VOLUME;
4467                         ctl->widget->ctlflags |= SOUND_MASK_MIC;
4468                 }
4469                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 1, 1);
4470                 if (ctl != NULL) {
4471                         ctl->ossmask = SOUND_MASK_LINE | SOUND_MASK_VOLUME;
4472                         ctl->widget->ctlflags |= SOUND_MASK_LINE;
4473                 }
4474                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 7, 1);
4475                 if (ctl != NULL) {
4476                         ctl->ossmask = SOUND_MASK_SPEAKER | SOUND_MASK_VOLUME;
4477                         ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4478                 }
4479                 break;
4480         case HDA_CODEC_STAC9221:
4481                 /*
4482                  * Dell XPS M1210 need all DACs for each output jacks
4483                  */
4484                 if (subvendor == DELL_XPSM1210_SUBVENDOR)
4485                         break;
4486                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4487                         w = hdac_widget_get(devinfo, i);
4488                         if (w == NULL || w->enable == 0)
4489                                 continue;
4490                         if (w->type !=
4491                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT)
4492                                 continue;
4493                         if (w->nid != 2)
4494                                 w->enable = 0;
4495                 }
4496                 break;
4497         case HDA_CODEC_STAC9221D:
4498                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4499                         w = hdac_widget_get(devinfo, i);
4500                         if (w == NULL || w->enable == 0)
4501                                 continue;
4502                         if (w->type ==
4503                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT &&
4504                             w->nid != 6)
4505                                 w->enable = 0;
4506
4507                 }
4508                 break;
4509         case HDA_CODEC_STAC9227:
4510                 w = hdac_widget_get(devinfo, 8);
4511                 if (w != NULL)
4512                         w->enable = 0;
4513                 w = hdac_widget_get(devinfo, 9);
4514                 if (w != NULL)
4515                         w->enable = 0;
4516                 break;
4517         case HDA_CODEC_CXWAIKIKI:
4518                 if (subvendor == HP_DV5000_SUBVENDOR) {
4519                         w = hdac_widget_get(devinfo, 27);
4520                         if (w != NULL)
4521                                 w->enable = 0;
4522                 }
4523                 ctl = hdac_audio_ctl_amp_get(devinfo, 16, 0, 1);
4524                 if (ctl != NULL)
4525                         ctl->ossmask = SOUND_MASK_SKIP;
4526                 ctl = hdac_audio_ctl_amp_get(devinfo, 25, 0, 1);
4527                 if (ctl != NULL && ctl->childwidget != NULL &&
4528                     ctl->childwidget->enable != 0) {
4529                         ctl->ossmask = SOUND_MASK_PCM | SOUND_MASK_VOLUME;
4530                         ctl->childwidget->ctlflags |= SOUND_MASK_PCM;
4531                 }
4532                 ctl = hdac_audio_ctl_amp_get(devinfo, 25, 1, 1);
4533                 if (ctl != NULL && ctl->childwidget != NULL &&
4534                     ctl->childwidget->enable != 0) {
4535                         ctl->ossmask = SOUND_MASK_LINE | SOUND_MASK_VOLUME;
4536                         ctl->childwidget->ctlflags |= SOUND_MASK_LINE;
4537                 }
4538                 ctl = hdac_audio_ctl_amp_get(devinfo, 25, 2, 1);
4539                 if (ctl != NULL && ctl->childwidget != NULL &&
4540                     ctl->childwidget->enable != 0) {
4541                         ctl->ossmask = SOUND_MASK_MIC | SOUND_MASK_VOLUME;
4542                         ctl->childwidget->ctlflags |= SOUND_MASK_MIC;
4543                 }
4544                 ctl = hdac_audio_ctl_amp_get(devinfo, 26, 0, 1);
4545                 if (ctl != NULL) {
4546                         ctl->ossmask = SOUND_MASK_SKIP;
4547                         /* XXX mixer \=rec mic broken.. why?!? */
4548                         /* ctl->widget->ctlflags |= SOUND_MASK_MIC; */
4549                 }
4550                 break;
4551         default:
4552                 break;
4553         }
4554 }
4555
4556 static int
4557 hdac_audio_ctl_ossmixer_getnextdev(struct hdac_devinfo *devinfo)
4558 {
4559         int *dev = &devinfo->function.audio.ossidx;
4560
4561         while (*dev < SOUND_MIXER_NRDEVICES) {
4562                 switch (*dev) {
4563                 case SOUND_MIXER_VOLUME:
4564                 case SOUND_MIXER_BASS:
4565                 case SOUND_MIXER_TREBLE:
4566                 case SOUND_MIXER_PCM:
4567                 case SOUND_MIXER_SPEAKER:
4568                 case SOUND_MIXER_LINE:
4569                 case SOUND_MIXER_MIC:
4570                 case SOUND_MIXER_CD:
4571                 case SOUND_MIXER_RECLEV:
4572                 case SOUND_MIXER_IGAIN:
4573                 case SOUND_MIXER_OGAIN: /* reserved for EAPD switch */
4574                         (*dev)++;
4575                         break;
4576                 default:
4577                         return (*dev)++;
4578                         break;
4579                 }
4580         }
4581
4582         return (-1);
4583 }
4584
4585 static int
4586 hdac_widget_find_dac_path(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4587 {
4588         struct hdac_widget *w;
4589         int i, ret = 0;
4590
4591         if (depth > HDA_PARSE_MAXDEPTH)
4592                 return (0);
4593         w = hdac_widget_get(devinfo, nid);
4594         if (w == NULL || w->enable == 0)
4595                 return (0);
4596         switch (w->type) {
4597         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT:
4598                 w->pflags |= HDA_DAC_PATH;
4599                 ret = 1;
4600                 break;
4601         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4602         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4603                 for (i = 0; i < w->nconns; i++) {
4604                         if (hdac_widget_find_dac_path(devinfo,
4605                             w->conns[i], depth + 1) != 0) {
4606                                 if (w->selconn == -1)
4607                                         w->selconn = i;
4608                                 ret = 1;
4609                                 w->pflags |= HDA_DAC_PATH;
4610                         }
4611                 }
4612                 break;
4613         default:
4614                 break;
4615         }
4616         return (ret);
4617 }
4618
4619 static int
4620 hdac_widget_find_adc_path(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4621 {
4622         struct hdac_widget *w;
4623         int i, conndev, ret = 0;
4624
4625         if (depth > HDA_PARSE_MAXDEPTH)
4626                 return (0);
4627         w = hdac_widget_get(devinfo, nid);
4628         if (w == NULL || w->enable == 0)
4629                 return (0);
4630         switch (w->type) {
4631         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
4632         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4633         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4634                 for (i = 0; i < w->nconns; i++) {
4635                         if (hdac_widget_find_adc_path(devinfo, w->conns[i],
4636                             depth + 1) != 0) {
4637                                 if (w->selconn == -1)
4638                                         w->selconn = i;
4639                                 w->pflags |= HDA_ADC_PATH;
4640                                 ret = 1;
4641                         }
4642                 }
4643                 break;
4644         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
4645                 conndev = w->wclass.pin.config &
4646                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4647                 if (HDA_PARAM_PIN_CAP_INPUT_CAP(w->wclass.pin.cap) &&
4648                     (conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_CD ||
4649                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN ||
4650                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN)) {
4651                         w->pflags |= HDA_ADC_PATH;
4652                         ret = 1;
4653                 }
4654                 break;
4655         /*case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4656                 if (w->pflags & HDA_DAC_PATH) {
4657                         w->pflags |= HDA_ADC_PATH;
4658                         ret = 1;
4659                 }
4660                 break;*/
4661         default:
4662                 break;
4663         }
4664         return (ret);
4665 }
4666
4667 static uint32_t
4668 hdac_audio_ctl_outamp_build(struct hdac_devinfo *devinfo,
4669                                 nid_t nid, nid_t pnid, int index, int depth)
4670 {
4671         struct hdac_widget *w, *pw;
4672         struct hdac_audio_ctl *ctl;
4673         uint32_t fl = 0;
4674         int i, ossdev, conndev, strategy;
4675
4676         if (depth > HDA_PARSE_MAXDEPTH)
4677                 return (0);
4678
4679         w = hdac_widget_get(devinfo, nid);
4680         if (w == NULL || w->enable == 0)
4681                 return (0);
4682
4683         pw = hdac_widget_get(devinfo, pnid);
4684         strategy = devinfo->function.audio.parsing_strategy;
4685
4686         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER
4687             || w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR) {
4688                 for (i = 0; i < w->nconns; i++) {
4689                         fl |= hdac_audio_ctl_outamp_build(devinfo, w->conns[i],
4690                             w->nid, i, depth + 1);
4691                 }
4692                 w->ctlflags |= fl;
4693                 return (fl);
4694         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT &&
4695             (w->pflags & HDA_DAC_PATH)) {
4696                 i = 0;
4697                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4698                         if (ctl->enable == 0 || ctl->widget == NULL)
4699                                 continue;
4700                         /* XXX This should be compressed! */
4701                         if (((ctl->widget->nid == w->nid) ||
4702                             (ctl->widget->nid == pnid && ctl->index == index &&
4703                             (ctl->dir & HDA_CTL_IN)) ||
4704                             (ctl->widget->nid == pnid && pw != NULL &&
4705                             pw->type ==
4706                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
4707                             (pw->nconns < 2 || pw->selconn == index ||
4708                             pw->selconn == -1) &&
4709                             (ctl->dir & HDA_CTL_OUT)) ||
4710                             (strategy == HDA_PARSE_DIRECT &&
4711                             ctl->widget->nid == w->nid)) &&
4712                             !(ctl->ossmask & ~SOUND_MASK_VOLUME)) {
4713                                 /*if (pw != NULL && pw->selconn == -1)
4714                                         pw->selconn = index;
4715                                 fl |= SOUND_MASK_VOLUME;
4716                                 fl |= SOUND_MASK_PCM;
4717                                 ctl->ossmask |= SOUND_MASK_VOLUME;
4718                                 ctl->ossmask |= SOUND_MASK_PCM;
4719                                 ctl->ossdev = SOUND_MIXER_PCM;*/
4720                                 if (!(w->ctlflags & SOUND_MASK_PCM) ||
4721                                     (pw != NULL &&
4722                                     !(pw->ctlflags & SOUND_MASK_PCM))) {
4723                                         fl |= SOUND_MASK_VOLUME;
4724                                         fl |= SOUND_MASK_PCM;
4725                                         ctl->ossmask |= SOUND_MASK_VOLUME;
4726                                         ctl->ossmask |= SOUND_MASK_PCM;
4727                                         ctl->ossdev = SOUND_MIXER_PCM;
4728                                         w->ctlflags |= SOUND_MASK_VOLUME;
4729                                         w->ctlflags |= SOUND_MASK_PCM;
4730                                         if (pw != NULL) {
4731                                                 if (pw->selconn == -1)
4732                                                         pw->selconn = index;
4733                                                 pw->ctlflags |=
4734                                                     SOUND_MASK_VOLUME;
4735                                                 pw->ctlflags |=
4736                                                     SOUND_MASK_PCM;
4737                                         }
4738                                 }
4739                         }
4740                 }
4741                 w->ctlflags |= fl;
4742                 return (fl);
4743         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4744             HDA_PARAM_PIN_CAP_INPUT_CAP(w->wclass.pin.cap) &&
4745             (w->pflags & HDA_ADC_PATH)) {
4746                 conndev = w->wclass.pin.config &
4747                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4748                 i = 0;
4749                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4750                         if (ctl->enable == 0 || ctl->widget == NULL)
4751                                 continue;
4752                         /* XXX This should be compressed! */
4753                         if (((ctl->widget->nid == pnid && ctl->index == index &&
4754                             (ctl->dir & HDA_CTL_IN)) ||
4755                             (ctl->widget->nid == pnid && pw != NULL &&
4756                             pw->type ==
4757                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
4758                             (pw->nconns < 2 || pw->selconn == index ||
4759                             pw->selconn == -1) &&
4760                             (ctl->dir & HDA_CTL_OUT)) ||
4761                             (strategy == HDA_PARSE_DIRECT &&
4762                             ctl->widget->nid == w->nid)) &&
4763                             !(ctl->ossmask & ~SOUND_MASK_VOLUME)) {
4764                                 if (pw != NULL && pw->selconn == -1)
4765                                         pw->selconn = index;
4766                                 ossdev = 0;
4767                                 switch (conndev) {
4768                                 case HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN:
4769                                         ossdev = SOUND_MIXER_MIC;
4770                                         break;
4771                                 case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN:
4772                                         ossdev = SOUND_MIXER_LINE;
4773                                         break;
4774                                 case HDA_CONFIG_DEFAULTCONF_DEVICE_CD:
4775                                         ossdev = SOUND_MIXER_CD;
4776                                         break;
4777                                 default:
4778                                         ossdev =
4779                                             hdac_audio_ctl_ossmixer_getnextdev(
4780                                             devinfo);
4781                                         if (ossdev < 0)
4782                                                 ossdev = 0;
4783                                         break;
4784                                 }
4785                                 if (strategy == HDA_PARSE_MIXER) {
4786                                         fl |= SOUND_MASK_VOLUME;
4787                                         ctl->ossmask |= SOUND_MASK_VOLUME;
4788                                 }
4789                                 fl |= 1 << ossdev;
4790                                 ctl->ossmask |= 1 << ossdev;
4791                                 ctl->ossdev = ossdev;
4792                         }
4793                 }
4794                 w->ctlflags |= fl;
4795                 return (fl);
4796         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET) {
4797                 i = 0;
4798                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4799                         if (ctl->enable == 0 || ctl->widget == NULL)
4800                                 continue;
4801                         /* XXX This should be compressed! */
4802                         if (((ctl->widget->nid == pnid && ctl->index == index &&
4803                             (ctl->dir & HDA_CTL_IN)) ||
4804                             (ctl->widget->nid == pnid && pw != NULL &&
4805                             pw->type ==
4806                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
4807                             (pw->nconns < 2 || pw->selconn == index ||
4808                             pw->selconn == -1) &&
4809                             (ctl->dir & HDA_CTL_OUT)) ||
4810                             (strategy == HDA_PARSE_DIRECT &&
4811                             ctl->widget->nid == w->nid)) &&
4812                             !(ctl->ossmask & ~SOUND_MASK_VOLUME)) {
4813                                 if (pw != NULL && pw->selconn == -1)
4814                                         pw->selconn = index;
4815                                 fl |= SOUND_MASK_VOLUME;
4816                                 fl |= SOUND_MASK_SPEAKER;
4817                                 ctl->ossmask |= SOUND_MASK_VOLUME;
4818                                 ctl->ossmask |= SOUND_MASK_SPEAKER;
4819                                 ctl->ossdev = SOUND_MIXER_SPEAKER;
4820                         }
4821                 }
4822                 w->ctlflags |= fl;
4823                 return (fl);
4824         }
4825         return (0);
4826 }
4827
4828 static uint32_t
4829 hdac_audio_ctl_inamp_build(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4830 {
4831         struct hdac_widget *w, *cw;
4832         struct hdac_audio_ctl *ctl;
4833         uint32_t fl;
4834         int i;
4835
4836         if (depth > HDA_PARSE_MAXDEPTH)
4837                 return (0);
4838
4839         w = hdac_widget_get(devinfo, nid);
4840         if (w == NULL || w->enable == 0)
4841                 return (0);
4842         /*if (!(w->pflags & HDA_ADC_PATH))
4843                 return (0);
4844         if (!(w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT ||
4845             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4846                 return (0);*/
4847         i = 0;
4848         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4849                 if (ctl->enable == 0 || ctl->widget == NULL)
4850                         continue;
4851                 if (ctl->widget->nid == nid) {
4852                         ctl->ossmask |= SOUND_MASK_RECLEV;
4853                         w->ctlflags |= SOUND_MASK_RECLEV;
4854                         return (SOUND_MASK_RECLEV);
4855                 }
4856         }
4857         for (i = 0; i < w->nconns; i++) {
4858                 cw = hdac_widget_get(devinfo, w->conns[i]);
4859                 if (cw == NULL || cw->enable == 0)
4860                         continue;
4861                 if (cw->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR)
4862                         continue;
4863                 fl = hdac_audio_ctl_inamp_build(devinfo, cw->nid, depth + 1);
4864                 if (fl != 0) {
4865                         cw->ctlflags |= fl;
4866                         w->ctlflags |= fl;
4867                         return (fl);
4868                 }
4869         }
4870         return (0);
4871 }
4872
4873 static int
4874 hdac_audio_ctl_recsel_build(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4875 {
4876         struct hdac_widget *w, *cw;
4877         int i, child = 0;
4878
4879         if (depth > HDA_PARSE_MAXDEPTH)
4880                 return (0);
4881
4882         w = hdac_widget_get(devinfo, nid);
4883         if (w == NULL || w->enable == 0)
4884                 return (0);
4885         /*if (!(w->pflags & HDA_ADC_PATH))
4886                 return (0);
4887         if (!(w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT ||
4888             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4889                 return (0);*/
4890         /* XXX weak! */
4891         for (i = 0; i < w->nconns; i++) {
4892                 cw = hdac_widget_get(devinfo, w->conns[i]);
4893                 if (cw == NULL)
4894                         continue;
4895                 if (++child > 1) {
4896                         w->pflags |= HDA_ADC_RECSEL;
4897                         return (1);
4898                 }
4899         }
4900         for (i = 0; i < w->nconns; i++) {
4901                 if (hdac_audio_ctl_recsel_build(devinfo,
4902                     w->conns[i], depth + 1) != 0)
4903                         return (1);
4904         }
4905         return (0);
4906 }
4907
4908 static int
4909 hdac_audio_build_tree_strategy(struct hdac_devinfo *devinfo)
4910 {
4911         struct hdac_widget *w, *cw;
4912         int i, j, conndev, found_dac = 0;
4913         int strategy;
4914
4915         strategy = devinfo->function.audio.parsing_strategy;
4916
4917         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4918                 w = hdac_widget_get(devinfo, i);
4919                 if (w == NULL || w->enable == 0)
4920                         continue;
4921                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
4922                         continue;
4923                 if (!HDA_PARAM_PIN_CAP_OUTPUT_CAP(w->wclass.pin.cap))
4924                         continue;
4925                 conndev = w->wclass.pin.config &
4926                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4927                 if (!(conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT ||
4928                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER ||
4929                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT))
4930                         continue;
4931                 for (j = 0; j < w->nconns; j++) {
4932                         cw = hdac_widget_get(devinfo, w->conns[j]);
4933                         if (cw == NULL || cw->enable == 0)
4934                                 continue;
4935                         if (strategy == HDA_PARSE_MIXER && !(cw->type ==
4936                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER ||
4937                             cw->type ==
4938                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4939                                 continue;
4940                         if (hdac_widget_find_dac_path(devinfo, cw->nid, 0)
4941                             != 0) {
4942                                 if (w->selconn == -1)
4943                                         w->selconn = j;
4944                                 w->pflags |= HDA_DAC_PATH;
4945                                 found_dac++;
4946                         }
4947                 }
4948         }
4949
4950         return (found_dac);
4951 }
4952
4953 static void
4954 hdac_audio_build_tree(struct hdac_devinfo *devinfo)
4955 {
4956         struct hdac_widget *w;
4957         struct hdac_audio_ctl *ctl;
4958         int i, j, dacs, strategy;
4959
4960         /* Construct DAC path */
4961         strategy = HDA_PARSE_MIXER;
4962         devinfo->function.audio.parsing_strategy = strategy;
4963         HDA_BOOTVERBOSE(
4964                 device_printf(devinfo->codec->sc->dev,
4965                     "HDA_DEBUG: HWiP: HDA Widget Parser - Revision %d\n",
4966                     HDA_WIDGET_PARSER_REV);
4967         );
4968         dacs = hdac_audio_build_tree_strategy(devinfo);
4969         if (dacs == 0) {
4970                 HDA_BOOTVERBOSE(
4971                         device_printf(devinfo->codec->sc->dev,
4972                             "HDA_DEBUG: HWiP: 0 DAC path found! "
4973                             "Retrying parser "
4974                             "using HDA_PARSE_DIRECT strategy.\n");
4975                 );
4976                 strategy = HDA_PARSE_DIRECT;
4977                 devinfo->function.audio.parsing_strategy = strategy;
4978                 dacs = hdac_audio_build_tree_strategy(devinfo);
4979         }
4980
4981         HDA_BOOTVERBOSE(
4982                 device_printf(devinfo->codec->sc->dev,
4983                     "HDA_DEBUG: HWiP: Found %d DAC path using HDA_PARSE_%s "
4984                     "strategy.\n",
4985                     dacs, (strategy == HDA_PARSE_MIXER) ? "MIXER" : "DIRECT");
4986         );
4987
4988         /* Construct ADC path */
4989         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4990                 w = hdac_widget_get(devinfo, i);
4991                 if (w == NULL || w->enable == 0)
4992                         continue;
4993                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT)
4994                         continue;
4995                 (void)hdac_widget_find_adc_path(devinfo, w->nid, 0);
4996         }
4997
4998         /* Output mixers */
4999         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5000                 w = hdac_widget_get(devinfo, i);
5001                 if (w == NULL || w->enable == 0)
5002                         continue;
5003                 if ((strategy == HDA_PARSE_MIXER &&
5004                     (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER ||
5005                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR)
5006                     && (w->pflags & HDA_DAC_PATH)) ||
5007                     (strategy == HDA_PARSE_DIRECT && (w->pflags &
5008                     (HDA_DAC_PATH | HDA_ADC_PATH)))) {
5009                         w->ctlflags |= hdac_audio_ctl_outamp_build(devinfo,
5010                             w->nid, devinfo->startnode - 1, 0, 0);
5011                 } else if (w->type ==
5012                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET) {
5013                         j = 0;
5014                         while ((ctl = hdac_audio_ctl_each(devinfo, &j)) !=
5015                             NULL) {
5016                                 if (ctl->enable == 0 || ctl->widget == NULL)
5017                                         continue;
5018                                 if (ctl->widget->nid != w->nid)
5019                                         continue;
5020                                 ctl->ossmask |= SOUND_MASK_VOLUME;
5021                                 ctl->ossmask |= SOUND_MASK_SPEAKER;
5022                                 ctl->ossdev = SOUND_MIXER_SPEAKER;
5023                                 w->ctlflags |= SOUND_MASK_VOLUME;
5024                                 w->ctlflags |= SOUND_MASK_SPEAKER;
5025                         }
5026                 }
5027         }
5028
5029         /* Input mixers (rec) */
5030         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5031                 w = hdac_widget_get(devinfo, i);
5032                 if (w == NULL || w->enable == 0)
5033                         continue;
5034                 if (!(w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT &&
5035                     w->pflags & HDA_ADC_PATH))
5036                         continue;
5037                 hdac_audio_ctl_inamp_build(devinfo, w->nid, 0);
5038                 hdac_audio_ctl_recsel_build(devinfo, w->nid, 0);
5039         }
5040 }
5041
5042 #define HDA_COMMIT_CONN (1 << 0)
5043 #define HDA_COMMIT_CTRL (1 << 1)
5044 #define HDA_COMMIT_EAPD (1 << 2)
5045 #define HDA_COMMIT_GPIO (1 << 3)
5046 #define HDA_COMMIT_MISC (1 << 4)
5047 #define HDA_COMMIT_ALL  (HDA_COMMIT_CONN | HDA_COMMIT_CTRL | \
5048                         HDA_COMMIT_EAPD | HDA_COMMIT_GPIO | HDA_COMMIT_MISC)
5049
5050 static void
5051 hdac_audio_commit(struct hdac_devinfo *devinfo, uint32_t cfl)
5052 {
5053         struct hdac_softc *sc = devinfo->codec->sc;
5054         struct hdac_widget *w;
5055         nid_t cad;
5056         int i;
5057
5058         if (!(cfl & HDA_COMMIT_ALL))
5059                 return;
5060
5061         cad = devinfo->codec->cad;
5062
5063         if ((cfl & HDA_COMMIT_MISC)) {
5064                 if (sc->pci_subvendor == APPLE_INTEL_MAC)
5065                         hdac_command(sc, HDA_CMD_12BIT(cad, devinfo->nid,
5066                             0x7e7, 0), cad);
5067         }
5068
5069         if (cfl & HDA_COMMIT_GPIO) {
5070                 uint32_t gdata, gmask, gdir;
5071                 int commitgpio, numgpio;
5072
5073                 gdata = 0;
5074                 gmask = 0;
5075                 gdir = 0;
5076                 commitgpio = 0;
5077
5078                 numgpio = HDA_PARAM_GPIO_COUNT_NUM_GPIO(
5079                     devinfo->function.audio.gpio);
5080
5081                 if (devinfo->function.audio.quirks & HDA_QUIRK_GPIOFLUSH)
5082                         commitgpio = (numgpio > 0) ? 1 : 0;
5083                 else {
5084                         for (i = 0; i < numgpio && i < HDA_GPIO_MAX; i++) {
5085                                 if (!(devinfo->function.audio.quirks &
5086                                     (1 << i)))
5087                                         continue;
5088                                 if (commitgpio == 0) {
5089                                         commitgpio = 1;
5090                                         HDA_BOOTVERBOSE(
5091                                                 gdata = hdac_command(sc,
5092                                                     HDA_CMD_GET_GPIO_DATA(cad,
5093                                                     devinfo->nid), cad);
5094                                                 gmask = hdac_command(sc,
5095                                                     HDA_CMD_GET_GPIO_ENABLE_MASK(cad,
5096                                                     devinfo->nid), cad);
5097                                                 gdir = hdac_command(sc,
5098                                                     HDA_CMD_GET_GPIO_DIRECTION(cad,
5099                                                     devinfo->nid), cad);
5100                                                 device_printf(sc->dev,
5101                                                     "GPIO init: data=0x%08x "
5102                                                     "mask=0x%08x dir=0x%08x\n",
5103                                                     gdata, gmask, gdir);
5104                                                 gdata = 0;
5105                                                 gmask = 0;
5106                                                 gdir = 0;
5107                                         );
5108                                 }
5109                                 gdata |= 1 << i;
5110                                 gmask |= 1 << i;
5111                                 gdir |= 1 << i;
5112                         }
5113                 }
5114
5115                 if (commitgpio != 0) {
5116                         HDA_BOOTVERBOSE(
5117                                 device_printf(sc->dev,
5118                                     "GPIO commit: data=0x%08x mask=0x%08x "
5119                                     "dir=0x%08x\n",
5120                                     gdata, gmask, gdir);
5121                         );
5122                         hdac_command(sc,
5123                             HDA_CMD_SET_GPIO_ENABLE_MASK(cad, devinfo->nid,
5124                             gmask), cad);
5125                         hdac_command(sc,
5126                             HDA_CMD_SET_GPIO_DIRECTION(cad, devinfo->nid,
5127                             gdir), cad);
5128                         hdac_command(sc,
5129                             HDA_CMD_SET_GPIO_DATA(cad, devinfo->nid,
5130                             gdata), cad);
5131                 }
5132         }
5133
5134         for (i = 0; i < devinfo->nodecnt; i++) {
5135                 w = &devinfo->widget[i];
5136                 if (w == NULL || w->enable == 0)
5137                         continue;
5138                 if (cfl & HDA_COMMIT_CONN) {
5139                         if (w->selconn == -1)
5140                                 w->selconn = 0;
5141                         if (w->nconns > 0)
5142                                 hdac_widget_connection_select(w, w->selconn);
5143                 }
5144                 if ((cfl & HDA_COMMIT_CTRL) &&
5145                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
5146                         uint32_t pincap;
5147
5148                         pincap = w->wclass.pin.cap;
5149
5150                         if ((w->pflags & (HDA_DAC_PATH | HDA_ADC_PATH)) ==
5151                             (HDA_DAC_PATH | HDA_ADC_PATH))
5152                                 device_printf(sc->dev, "WARNING: node %d "
5153                                     "participate both for DAC/ADC!\n", w->nid);
5154                         if (w->pflags & HDA_DAC_PATH) {
5155                                 w->wclass.pin.ctrl &=
5156                                     ~HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE;
5157                                 if ((w->wclass.pin.config &
5158                                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) !=
5159                                     HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT)
5160                                         w->wclass.pin.ctrl &=
5161                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE;
5162                                 if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF100) &&
5163                                     HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
5164                                         w->wclass.pin.ctrl |=
5165                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5166                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100);
5167                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF80) &&
5168                                     HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
5169                                         w->wclass.pin.ctrl |=
5170                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5171                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80);
5172                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF50) &&
5173                                     HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
5174                                         w->wclass.pin.ctrl |=
5175                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5176                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50);
5177                         } else if (w->pflags & HDA_ADC_PATH) {
5178                                 w->wclass.pin.ctrl &=
5179                                     ~(HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
5180                                     HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE);
5181                                 if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF100) &&
5182                                     HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
5183                                         w->wclass.pin.ctrl |=
5184                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5185                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100);
5186                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF80) &&
5187                                     HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
5188                                         w->wclass.pin.ctrl |=
5189                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5190                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80);
5191                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF50) &&
5192                                     HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
5193                                         w->wclass.pin.ctrl |=
5194                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5195                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50);
5196                         } else
5197                                 w->wclass.pin.ctrl &= ~(
5198                                     HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE |
5199                                     HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
5200                                     HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE |
5201                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK);
5202                         hdac_command(sc,
5203                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad, w->nid,
5204                             w->wclass.pin.ctrl), cad);
5205                 }
5206                 if ((cfl & HDA_COMMIT_EAPD) &&
5207                     w->param.eapdbtl != HDAC_INVALID) {
5208                         uint32_t val;
5209
5210                         val = w->param.eapdbtl;
5211                         if (devinfo->function.audio.quirks &
5212                             HDA_QUIRK_EAPDINV)
5213                                 val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
5214                         hdac_command(sc,
5215                             HDA_CMD_SET_EAPD_BTL_ENABLE(cad, w->nid,
5216                             val), cad);
5217
5218                 }
5219                 DELAY(1000);
5220         }
5221 }
5222
5223 static void
5224 hdac_audio_ctl_commit(struct hdac_devinfo *devinfo)
5225 {
5226         struct hdac_softc *sc = devinfo->codec->sc;
5227         struct hdac_audio_ctl *ctl;
5228         int i;
5229
5230         devinfo->function.audio.mvol = 100 | (100 << 8);
5231         i = 0;
5232         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5233                 if (ctl->enable == 0 || ctl->widget == NULL) {
5234                         HDA_BOOTVERBOSE(
5235                                 device_printf(sc->dev, "[%2d] Ctl nid=%d",
5236                                     i, (ctl->widget != NULL) ?
5237                                     ctl->widget->nid : -1);
5238                                 if (ctl->childwidget != NULL)
5239                                         kprintf(" childnid=%d",
5240                                             ctl->childwidget->nid);
5241                                 if (ctl->widget == NULL)
5242                                         kprintf(" NULL WIDGET!");
5243                                 kprintf(" DISABLED\n");
5244                         );
5245                         continue;
5246                 }
5247                 HDA_BOOTVERBOSE(
5248                         if (ctl->ossmask == 0) {
5249                                 device_printf(sc->dev, "[%2d] Ctl nid=%d",
5250                                     i, ctl->widget->nid);
5251                                 if (ctl->childwidget != NULL)
5252                                         kprintf(" childnid=%d",
5253                                         ctl->childwidget->nid);
5254                                 kprintf(" Bind to NONE\n");
5255                         }
5256                 );
5257                 if (ctl->step > 0) {
5258                         ctl->ossval = (ctl->left * 100) / ctl->step;
5259                         ctl->ossval |= ((ctl->right * 100) / ctl->step) << 8;
5260                 } else
5261                         ctl->ossval = 0;
5262                 hdac_audio_ctl_amp_set(ctl, HDA_AMP_MUTE_DEFAULT,
5263                     ctl->left, ctl->right);
5264         }
5265 }
5266
5267 static int
5268 hdac_pcmchannel_setup(struct hdac_devinfo *devinfo, int dir)
5269 {
5270         struct hdac_chan *ch;
5271         struct hdac_widget *w;
5272         uint32_t cap, fmtcap, pcmcap, path;
5273         int i, type, ret, max;
5274
5275         if (dir == PCMDIR_PLAY) {
5276                 type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT;
5277                 ch = &devinfo->codec->sc->play;
5278                 path = HDA_DAC_PATH;
5279         } else {
5280                 type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT;
5281                 ch = &devinfo->codec->sc->rec;
5282                 path = HDA_ADC_PATH;
5283         }
5284
5285         ch->caps = hdac_caps;
5286         ch->caps.fmtlist = ch->fmtlist;
5287         ch->bit16 = 1;
5288         ch->bit32 = 0;
5289         ch->pcmrates[0] = 48000;
5290         ch->pcmrates[1] = 0;
5291
5292         ret = 0;
5293         fmtcap = devinfo->function.audio.supp_stream_formats;
5294         pcmcap = devinfo->function.audio.supp_pcm_size_rate;
5295         max = NELEM(ch->io) - 1;
5296
5297         for (i = devinfo->startnode; i < devinfo->endnode && ret < max; i++) {
5298                 w = hdac_widget_get(devinfo, i);
5299                 if (w == NULL || w->enable == 0 || w->type != type ||
5300                     !(w->pflags & path))
5301                         continue;
5302                 cap = w->param.widget_cap;
5303                 /*if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(cap))
5304                         continue;*/
5305                 if (!HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(cap))
5306                         continue;
5307                 cap = w->param.supp_stream_formats;
5308                 /*if (HDA_PARAM_SUPP_STREAM_FORMATS_AC3(cap)) {
5309                 }
5310                 if (HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(cap)) {
5311                 }*/
5312                 if (!HDA_PARAM_SUPP_STREAM_FORMATS_PCM(cap))
5313                         continue;
5314                 if (ret == 0) {
5315                         fmtcap = w->param.supp_stream_formats;
5316                         pcmcap = w->param.supp_pcm_size_rate;
5317                 } else {
5318                         fmtcap &= w->param.supp_stream_formats;
5319                         pcmcap &= w->param.supp_pcm_size_rate;
5320                 }
5321                 ch->io[ret++] = i;
5322         }
5323         ch->io[ret] = -1;
5324
5325         ch->supp_stream_formats = fmtcap;
5326         ch->supp_pcm_size_rate = pcmcap;
5327
5328         /*
5329          *  8bit = 0
5330          * 16bit = 1
5331          * 20bit = 2
5332          * 24bit = 3
5333          * 32bit = 4
5334          */
5335         if (ret > 0) {
5336                 cap = pcmcap;
5337                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(cap))
5338                         ch->bit16 = 1;
5339                 else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(cap))
5340                         ch->bit16 = 0;
5341                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(cap))
5342                         ch->bit32 = 4;
5343                 else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(cap))
5344                         ch->bit32 = 3;
5345                 else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(cap))
5346                         ch->bit32 = 2;
5347                 i = 0;
5348                 if (!(devinfo->function.audio.quirks & HDA_QUIRK_FORCESTEREO))
5349                         ch->fmtlist[i++] = AFMT_S16_LE;
5350                 ch->fmtlist[i++] = AFMT_S16_LE | AFMT_STEREO;
5351                 if (ch->bit32 > 0) {
5352                         if (!(devinfo->function.audio.quirks &
5353                             HDA_QUIRK_FORCESTEREO))
5354                                 ch->fmtlist[i++] = AFMT_S32_LE;
5355                         ch->fmtlist[i++] = AFMT_S32_LE | AFMT_STEREO;
5356                 }
5357                 ch->fmtlist[i] = 0;
5358                 i = 0;
5359                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(cap))
5360                         ch->pcmrates[i++] = 8000;
5361                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(cap))
5362                         ch->pcmrates[i++] = 11025;
5363                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(cap))
5364                         ch->pcmrates[i++] = 16000;
5365                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(cap))
5366                         ch->pcmrates[i++] = 22050;
5367                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(cap))
5368                         ch->pcmrates[i++] = 32000;
5369                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(cap))
5370                         ch->pcmrates[i++] = 44100;
5371                 /* if (HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ(cap)) */
5372                 ch->pcmrates[i++] = 48000;
5373                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(cap))
5374                         ch->pcmrates[i++] = 88200;
5375                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(cap))
5376                         ch->pcmrates[i++] = 96000;
5377                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(cap))
5378                         ch->pcmrates[i++] = 176400;
5379                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(cap))
5380                         ch->pcmrates[i++] = 192000;
5381                 /* if (HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ(cap)) */
5382                 ch->pcmrates[i] = 0;
5383                 if (i > 0) {
5384                         ch->caps.minspeed = ch->pcmrates[0];
5385                         ch->caps.maxspeed = ch->pcmrates[i - 1];
5386                 }
5387         }
5388
5389         return (ret);
5390 }
5391
5392 static void
5393 hdac_dump_ctls(struct hdac_devinfo *devinfo, const char *banner, uint32_t flag)
5394 {
5395         struct hdac_audio_ctl *ctl;
5396         struct hdac_softc *sc = devinfo->codec->sc;
5397         int i;
5398         uint32_t fl = 0;
5399
5400
5401         if (flag == 0) {
5402                 fl = SOUND_MASK_VOLUME | SOUND_MASK_PCM |
5403                     SOUND_MASK_CD | SOUND_MASK_LINE | SOUND_MASK_RECLEV |
5404                     SOUND_MASK_MIC | SOUND_MASK_SPEAKER | SOUND_MASK_OGAIN;
5405         }
5406
5407         i = 0;
5408         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5409                 if (ctl->enable == 0 || ctl->widget == NULL ||
5410                     ctl->widget->enable == 0 || (ctl->ossmask &
5411                     (SOUND_MASK_SKIP | SOUND_MASK_DISABLE)))
5412                         continue;
5413                 if ((flag == 0 && (ctl->ossmask & ~fl)) ||
5414                     (flag != 0 && (ctl->ossmask & flag))) {
5415                         if (banner != NULL) {
5416                                 device_printf(sc->dev, "\n");
5417                                 device_printf(sc->dev, "%s\n", banner);
5418                         }
5419                         goto hdac_ctl_dump_it_all;
5420                 }
5421         }
5422
5423         return;
5424
5425 hdac_ctl_dump_it_all:
5426         i = 0;
5427         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5428                 if (ctl->enable == 0 || ctl->widget == NULL ||
5429                     ctl->widget->enable == 0)
5430                         continue;
5431                 if (!((flag == 0 && (ctl->ossmask & ~fl)) ||
5432                     (flag != 0 && (ctl->ossmask & flag))))
5433                         continue;
5434                 if (flag == 0) {
5435                         device_printf(sc->dev, "\n");
5436                         device_printf(sc->dev, "Unknown Ctl (OSS: %s)\n",
5437                             hdac_audio_ctl_ossmixer_mask2name(ctl->ossmask));
5438                 }
5439                 device_printf(sc->dev, "   |\n");
5440                 device_printf(sc->dev, "   +-  nid: %2d index: %2d ",
5441                     ctl->widget->nid, ctl->index);
5442                 if (ctl->childwidget != NULL)
5443                         kprintf("(nid: %2d) ", ctl->childwidget->nid);
5444                 else
5445                         kprintf("          ");
5446                 kprintf("mute: %d step: %3d size: %3d off: %3d dir=0x%x ossmask=0x%08x\n",
5447                     ctl->mute, ctl->step, ctl->size, ctl->offset, ctl->dir,
5448                     ctl->ossmask);
5449         }
5450 }
5451
5452 static void
5453 hdac_dump_audio_formats(struct hdac_softc *sc, uint32_t fcap, uint32_t pcmcap)
5454 {
5455         uint32_t cap;
5456
5457         cap = fcap;
5458         if (cap != 0) {
5459                 device_printf(sc->dev, "     Stream cap: 0x%08x\n", cap);
5460                 device_printf(sc->dev, "         Format:");
5461                 if (HDA_PARAM_SUPP_STREAM_FORMATS_AC3(cap))
5462                         kprintf(" AC3");
5463                 if (HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(cap))
5464                         kprintf(" FLOAT32");
5465                 if (HDA_PARAM_SUPP_STREAM_FORMATS_PCM(cap))
5466                         kprintf(" PCM");
5467                 kprintf("\n");
5468         }
5469         cap = pcmcap;
5470         if (cap != 0) {
5471                 device_printf(sc->dev, "        PCM cap: 0x%08x\n", cap);
5472                 device_printf(sc->dev, "       PCM size:");
5473                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(cap))
5474                         kprintf(" 8");
5475                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(cap))
5476                         kprintf(" 16");
5477                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(cap))
5478                         kprintf(" 20");
5479                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(cap))
5480                         kprintf(" 24");
5481                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(cap))
5482                         kprintf(" 32");
5483                 kprintf("\n");
5484                 device_printf(sc->dev, "       PCM rate:");
5485                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(cap))
5486                         kprintf(" 8");
5487                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(cap))
5488                         kprintf(" 11");
5489                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(cap))
5490                         kprintf(" 16");
5491                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(cap))
5492                         kprintf(" 22");
5493                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(cap))
5494                         kprintf(" 32");
5495                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(cap))
5496                         kprintf(" 44");
5497                 kprintf(" 48");
5498                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(cap))
5499                         kprintf(" 88");
5500                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(cap))
5501                         kprintf(" 96");
5502                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(cap))
5503                         kprintf(" 176");
5504                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(cap))
5505                         kprintf(" 192");
5506                 kprintf("\n");
5507         }
5508 }
5509
5510 static void
5511 hdac_dump_pin(struct hdac_softc *sc, struct hdac_widget *w)
5512 {
5513         uint32_t pincap, wcap;
5514
5515         pincap = w->wclass.pin.cap;
5516         wcap = w->param.widget_cap;
5517
5518         device_printf(sc->dev, "        Pin cap: 0x%08x\n", pincap);
5519         device_printf(sc->dev, "                ");
5520         if (HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(pincap))
5521                 kprintf(" ISC");
5522         if (HDA_PARAM_PIN_CAP_TRIGGER_REQD(pincap))
5523                 kprintf(" TRQD");
5524         if (HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(pincap))
5525                 kprintf(" PDC");
5526         if (HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap))
5527                 kprintf(" HP");
5528         if (HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap))
5529                 kprintf(" OUT");
5530         if (HDA_PARAM_PIN_CAP_INPUT_CAP(pincap))
5531                 kprintf(" IN");
5532         if (HDA_PARAM_PIN_CAP_BALANCED_IO_PINS(pincap))
5533                 kprintf(" BAL");
5534         if (HDA_PARAM_PIN_CAP_VREF_CTRL(pincap)) {
5535                 kprintf(" VREF[");
5536                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
5537                         kprintf(" 50");
5538                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
5539                         kprintf(" 80");
5540                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
5541                         kprintf(" 100");
5542                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND(pincap))
5543                         kprintf(" GROUND");
5544                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ(pincap))
5545                         kprintf(" HIZ");
5546                 kprintf(" ]");
5547         }
5548         if (HDA_PARAM_PIN_CAP_EAPD_CAP(pincap))
5549                 kprintf(" EAPD");
5550         if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(wcap))
5551                 kprintf(" : UNSOL");
5552         kprintf("\n");
5553         device_printf(sc->dev, "     Pin config: 0x%08x\n",
5554             w->wclass.pin.config);
5555         device_printf(sc->dev, "    Pin control: 0x%08x", w->wclass.pin.ctrl);
5556         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE)
5557                 kprintf(" HP");
5558         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE)
5559                 kprintf(" IN");
5560         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE)
5561                 kprintf(" OUT");
5562         kprintf("\n");
5563 }
5564
5565 static void
5566 hdac_dump_amp(struct hdac_softc *sc, uint32_t cap, char *banner)
5567 {
5568         device_printf(sc->dev, "     %s amp: 0x%08x\n", banner, cap);
5569         device_printf(sc->dev, "                 "
5570             "mute=%d step=%d size=%d offset=%d\n",
5571             HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(cap),
5572             HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(cap),
5573             HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(cap),
5574             HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(cap));
5575 }
5576
5577 static void
5578 hdac_dump_nodes(struct hdac_devinfo *devinfo)
5579 {
5580         struct hdac_softc *sc = devinfo->codec->sc;
5581         struct hdac_widget *w, *cw;
5582         int i, j;
5583
5584         device_printf(sc->dev, "\n");
5585         device_printf(sc->dev, "Default Parameter\n");
5586         device_printf(sc->dev, "-----------------\n");
5587         hdac_dump_audio_formats(sc,
5588             devinfo->function.audio.supp_stream_formats,
5589             devinfo->function.audio.supp_pcm_size_rate);
5590         device_printf(sc->dev, "         IN amp: 0x%08x\n",
5591             devinfo->function.audio.inamp_cap);
5592         device_printf(sc->dev, "        OUT amp: 0x%08x\n",
5593             devinfo->function.audio.outamp_cap);
5594         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5595                 w = hdac_widget_get(devinfo, i);
5596                 if (w == NULL) {
5597                         device_printf(sc->dev, "Ghost widget nid=%d\n", i);
5598                         continue;
5599                 }
5600                 device_printf(sc->dev, "\n");
5601                 device_printf(sc->dev, "            nid: %d [%s]%s\n", w->nid,
5602                     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap) ?
5603                     "DIGITAL" : "ANALOG",
5604                     (w->enable == 0) ? " [DISABLED]" : "");
5605                 device_printf(sc->dev, "           name: %s\n", w->name);
5606                 device_printf(sc->dev, "     widget_cap: 0x%08x\n",
5607                     w->param.widget_cap);
5608                 device_printf(sc->dev, "    Parse flags: 0x%08x\n",
5609                     w->pflags);
5610                 device_printf(sc->dev, "      Ctl flags: 0x%08x\n",
5611                     w->ctlflags);
5612                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT ||
5613                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) {
5614                         hdac_dump_audio_formats(sc,
5615                             w->param.supp_stream_formats,
5616                             w->param.supp_pcm_size_rate);
5617                 } else if (w->type ==
5618                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
5619                         hdac_dump_pin(sc, w);
5620                 if (w->param.eapdbtl != HDAC_INVALID)
5621                         device_printf(sc->dev, "           EAPD: 0x%08x\n",
5622                             w->param.eapdbtl);
5623                 if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(w->param.widget_cap) &&
5624                     w->param.outamp_cap != 0)
5625                         hdac_dump_amp(sc, w->param.outamp_cap, "Output");
5626                 if (HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(w->param.widget_cap) &&
5627                     w->param.inamp_cap != 0)
5628                         hdac_dump_amp(sc, w->param.inamp_cap, " Input");
5629                 device_printf(sc->dev, "    connections: %d\n", w->nconns);
5630                 for (j = 0; j < w->nconns; j++) {
5631                         cw = hdac_widget_get(devinfo, w->conns[j]);
5632                         device_printf(sc->dev, "          |\n");
5633                         device_printf(sc->dev, "          + <- nid=%d [%s]",
5634                             w->conns[j], (cw == NULL) ? "GHOST!" : cw->name);
5635                         if (cw == NULL)
5636                                 kprintf(" [UNKNOWN]");
5637                         else if (cw->enable == 0)
5638                                 kprintf(" [DISABLED]");
5639                         if (w->nconns > 1 && w->selconn == j && w->type !=
5640                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
5641                                 kprintf(" (selected)");
5642                         kprintf("\n");
5643                 }
5644         }
5645
5646 }
5647
5648 static int
5649 hdac_dump_dac_internal(struct hdac_devinfo *devinfo, nid_t nid, int depth)
5650 {
5651         struct hdac_widget *w, *cw;
5652         struct hdac_softc *sc = devinfo->codec->sc;
5653         int i;
5654
5655         if (depth > HDA_PARSE_MAXDEPTH)
5656                 return (0);
5657
5658         w = hdac_widget_get(devinfo, nid);
5659         if (w == NULL || w->enable == 0 || !(w->pflags & HDA_DAC_PATH))
5660                 return (0);
5661
5662         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
5663                 device_printf(sc->dev, "\n");
5664                 device_printf(sc->dev, "    nid=%d [%s]\n", w->nid, w->name);
5665                 device_printf(sc->dev, "      ^\n");
5666                 device_printf(sc->dev, "      |\n");
5667                 device_printf(sc->dev, "      +-----<------+\n");
5668         } else {
5669                 device_printf(sc->dev, "                   ^\n");
5670                 device_printf(sc->dev, "                   |\n");
5671                 device_printf(sc->dev, "               ");
5672                 kprintf("  nid=%d [%s]\n", w->nid, w->name);
5673         }
5674
5675         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT) {
5676                 return (1);
5677         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) {
5678                 for (i = 0; i < w->nconns; i++) {
5679                         cw = hdac_widget_get(devinfo, w->conns[i]);
5680                         if (cw == NULL || cw->enable == 0 || cw->type ==
5681                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
5682                                 continue;
5683                         if (hdac_dump_dac_internal(devinfo, cw->nid,
5684                             depth + 1) != 0)
5685                                 return (1);
5686                 }
5687         } else if ((w->type ==
5688             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR ||
5689             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) &&
5690             w->selconn > -1 && w->selconn < w->nconns) {
5691                 if (hdac_dump_dac_internal(devinfo, w->conns[w->selconn],
5692                     depth + 1) != 0)
5693                         return (1);
5694         }
5695
5696         return (0);
5697 }
5698
5699 static void
5700 hdac_dump_dac(struct hdac_devinfo *devinfo)
5701 {
5702         struct hdac_widget *w;
5703         struct hdac_softc *sc = devinfo->codec->sc;
5704         int i, printed = 0;
5705
5706         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5707                 w = hdac_widget_get(devinfo, i);
5708                 if (w == NULL || w->enable == 0)
5709                         continue;
5710                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
5711                     !(w->pflags & HDA_DAC_PATH))
5712                         continue;
5713                 if (printed == 0) {
5714                         printed = 1;
5715                         device_printf(sc->dev, "\n");
5716                         device_printf(sc->dev, "Playback path:\n");
5717                 }
5718                 hdac_dump_dac_internal(devinfo, w->nid, 0);
5719         }
5720 }
5721
5722 static void
5723 hdac_dump_adc(struct hdac_devinfo *devinfo)
5724 {
5725         struct hdac_widget *w, *cw;
5726         struct hdac_softc *sc = devinfo->codec->sc;
5727         int i, j;
5728         int printed = 0;
5729         char ossdevs[256];
5730
5731         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5732                 w = hdac_widget_get(devinfo, i);
5733                 if (w == NULL || w->enable == 0)
5734                         continue;
5735                 if (!(w->pflags & HDA_ADC_RECSEL))
5736                         continue;
5737                 if (printed == 0) {
5738                         printed = 1;
5739                         device_printf(sc->dev, "\n");
5740                         device_printf(sc->dev, "Recording sources:\n");
5741                 }
5742                 device_printf(sc->dev, "\n");
5743                 device_printf(sc->dev, "    nid=%d [%s]\n", w->nid, w->name);
5744                 for (j = 0; j < w->nconns; j++) {
5745                         cw = hdac_widget_get(devinfo, w->conns[j]);
5746                         if (cw == NULL || cw->enable == 0)
5747                                 continue;
5748                         hdac_audio_ctl_ossmixer_mask2allname(cw->ctlflags,
5749                             ossdevs, sizeof(ossdevs));
5750                         device_printf(sc->dev, "      |\n");
5751                         device_printf(sc->dev, "      + <- nid=%d [%s]",
5752                             cw->nid, cw->name);
5753                         if (strlen(ossdevs) > 0) {
5754                                 kprintf(" [recsrc: %s]", ossdevs);
5755                         }
5756                         kprintf("\n");
5757                 }
5758         }
5759 }
5760
5761 static void
5762 hdac_dump_pcmchannels(struct hdac_softc *sc, int pcnt, int rcnt)
5763 {
5764         nid_t *nids;
5765
5766         if (pcnt > 0) {
5767                 device_printf(sc->dev, "\n");
5768                 device_printf(sc->dev, "   PCM Playback: %d\n", pcnt);
5769                 hdac_dump_audio_formats(sc, sc->play.supp_stream_formats,
5770                     sc->play.supp_pcm_size_rate);
5771                 device_printf(sc->dev, "            DAC:");
5772                 for (nids = sc->play.io; *nids != -1; nids++)
5773                         kprintf(" %d", *nids);
5774                 kprintf("\n");
5775         }
5776
5777         if (rcnt > 0) {
5778                 device_printf(sc->dev, "\n");
5779                 device_printf(sc->dev, "     PCM Record: %d\n", rcnt);
5780                 hdac_dump_audio_formats(sc, sc->play.supp_stream_formats,
5781                     sc->rec.supp_pcm_size_rate);
5782                 device_printf(sc->dev, "            ADC:");
5783                 for (nids = sc->rec.io; *nids != -1; nids++)
5784                         kprintf(" %d", *nids);
5785                 kprintf("\n");
5786         }
5787 }
5788
5789 static void
5790 hdac_release_resources(struct hdac_softc *sc)
5791 {
5792         struct hdac_devinfo *devinfo = NULL;
5793         device_t *devlist = NULL;
5794         int i, devcount;
5795
5796         if (sc == NULL)
5797                 return;
5798
5799         hdac_lock(sc);
5800         sc->polling = 0;
5801         sc->poll_ival = 0;
5802         callout_stop(&sc->poll_hda);
5803         callout_stop(&sc->poll_hdac);
5804         callout_stop(&sc->poll_jack);
5805         hdac_reset(sc);
5806         hdac_unlock(sc);
5807
5808         hdac_irq_free(sc);
5809
5810         /* give pending interrupts stuck on the lock a chance to clear */
5811         /* bad hack */
5812         tsleep(&sc->irq, 0, "hdaslp", hz / 10);
5813
5814         device_get_children(sc->dev, &devlist, &devcount);
5815         for (i = 0; devlist != NULL && i < devcount; i++) {
5816                 devinfo = (struct hdac_devinfo *)device_get_ivars(devlist[i]);
5817                 if (devinfo == NULL)
5818                         continue;
5819                 if (devinfo->widget != NULL)
5820                         kfree(devinfo->widget, M_HDAC);
5821                 if (devinfo->node_type ==
5822                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO &&
5823                     devinfo->function.audio.ctl != NULL)
5824                         kfree(devinfo->function.audio.ctl, M_HDAC);
5825                 kfree(devinfo, M_HDAC);
5826                 device_delete_child(sc->dev, devlist[i]);
5827         }
5828         if (devlist != NULL)
5829                 kfree(devlist, M_TEMP);
5830
5831         for (i = 0; i < HDAC_CODEC_MAX; i++) {
5832                 if (sc->codecs[i] != NULL)
5833                         kfree(sc->codecs[i], M_HDAC);
5834                 sc->codecs[i] = NULL;
5835         }
5836
5837         hdac_dma_free(sc, &sc->pos_dma);
5838         hdac_dma_free(sc, &sc->rirb_dma);
5839         hdac_dma_free(sc, &sc->corb_dma);
5840         if (sc->play.blkcnt > 0)
5841                 hdac_dma_free(sc, &sc->play.bdl_dma);
5842         if (sc->rec.blkcnt > 0)
5843                 hdac_dma_free(sc, &sc->rec.bdl_dma);
5844         if (sc->chan_dmat != NULL) {
5845                 bus_dma_tag_destroy(sc->chan_dmat);
5846                 sc->chan_dmat = NULL;
5847         }
5848         hdac_mem_free(sc);
5849         snd_mtxfree(sc->lock);
5850         kfree(sc, M_DEVBUF);
5851 }
5852
5853 /* This function surely going to make its way into upper level someday. */
5854 static void
5855 hdac_config_fetch(struct hdac_softc *sc, uint32_t *on, uint32_t *off)
5856 {
5857         const char *res = NULL;
5858         int i = 0, j, k, len, inv;
5859
5860         if (on != NULL)
5861                 *on = 0;
5862         if (off != NULL)
5863                 *off = 0;
5864         if (sc == NULL)
5865                 return;
5866         if (resource_string_value(device_get_name(sc->dev),
5867             device_get_unit(sc->dev), "config", &res) != 0)
5868                 return;
5869         if (!(res != NULL && strlen(res) > 0))
5870                 return;
5871         HDA_BOOTVERBOSE(
5872                 device_printf(sc->dev, "HDA_DEBUG: HDA Config:");
5873         );
5874         for (;;) {
5875                 while (res[i] != '\0' &&
5876                     (res[i] == ',' || isspace(res[i]) != 0))
5877                         i++;
5878                 if (res[i] == '\0') {
5879                         HDA_BOOTVERBOSE(
5880                                 kprintf("\n");
5881                         );
5882                         return;
5883                 }
5884                 j = i;
5885                 while (res[j] != '\0' &&
5886                     !(res[j] == ',' || isspace(res[j]) != 0))
5887                         j++;
5888                 len = j - i;
5889                 if (len > 2 && strncmp(res + i, "no", 2) == 0)
5890                         inv = 2;
5891                 else
5892                         inv = 0;
5893                 for (k = 0; len > inv && k < HDAC_QUIRKS_TAB_LEN; k++) {
5894                         if (strncmp(res + i + inv,
5895                             hdac_quirks_tab[k].key, len - inv) != 0)
5896                                 continue;
5897                         if (len - inv != strlen(hdac_quirks_tab[k].key))
5898                                 break;
5899                         HDA_BOOTVERBOSE(
5900                                 kprintf(" %s%s", (inv != 0) ? "no" : "",
5901                                     hdac_quirks_tab[k].key);
5902                         );
5903                         if (inv == 0 && on != NULL)
5904                                 *on |= hdac_quirks_tab[k].value;
5905                         else if (inv != 0 && off != NULL)
5906                                 *off |= hdac_quirks_tab[k].value;
5907                         break;
5908                 }
5909                 i = j;
5910         }
5911 }
5912
5913 #ifdef SND_DYNSYSCTL
5914 static int
5915 sysctl_hdac_polling(SYSCTL_HANDLER_ARGS)
5916 {
5917         struct hdac_softc *sc;
5918         struct hdac_devinfo *devinfo;
5919         device_t dev;
5920         uint32_t ctl;
5921         int err, val;
5922
5923         dev = oidp->oid_arg1;
5924         devinfo = pcm_getdevinfo(dev);
5925         if (devinfo == NULL || devinfo->codec == NULL ||
5926             devinfo->codec->sc == NULL)
5927                 return (EINVAL);
5928         sc = devinfo->codec->sc;
5929         hdac_lock(sc);
5930         val = sc->polling;
5931         hdac_unlock(sc);
5932         err = sysctl_handle_int(oidp, &val, 0, req);
5933
5934         if (err != 0 || req->newptr == NULL)
5935                 return (err);
5936         if (val < 0 || val > 1)
5937                 return (EINVAL);
5938
5939         hdac_lock(sc);
5940         if (val != sc->polling) {
5941                 if (hda_chan_active(sc) != 0)
5942                         err = EBUSY;
5943                 else if (val == 0) {
5944                         callout_stop(&sc->poll_hdac);
5945                         hdac_unlock(sc);
5946                         hdac_lock(sc);
5947                         HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT,
5948                             sc->rirb_size / 2);
5949                         ctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
5950                         ctl |= HDAC_RIRBCTL_RINTCTL;
5951                         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, ctl);
5952                         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL,
5953                             HDAC_INTCTL_CIE | HDAC_INTCTL_GIE);
5954                         sc->polling = 0;
5955                         DELAY(1000);
5956                 } else {
5957                         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, 0);
5958                         HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT, 0);
5959                         ctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
5960                         ctl &= ~HDAC_RIRBCTL_RINTCTL;
5961                         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, ctl);
5962                         callout_reset(&sc->poll_hdac, 1, hdac_poll_callback,
5963                             sc);
5964                         sc->polling = 1;
5965                         DELAY(1000);
5966                 }
5967         }
5968         hdac_unlock(sc);
5969
5970         return (err);
5971 }
5972
5973 static int
5974 sysctl_hdac_polling_interval(SYSCTL_HANDLER_ARGS)
5975 {
5976         struct hdac_softc *sc;
5977         struct hdac_devinfo *devinfo;
5978         device_t dev;
5979         int err, val;
5980
5981         dev = oidp->oid_arg1;
5982         devinfo = pcm_getdevinfo(dev);
5983         if (devinfo == NULL || devinfo->codec == NULL ||
5984             devinfo->codec->sc == NULL)
5985                 return (EINVAL);
5986         sc = devinfo->codec->sc;
5987         hdac_lock(sc);
5988         val = ((uint64_t)sc->poll_ival * 1000) / hz;
5989         hdac_unlock(sc);
5990         err = sysctl_handle_int(oidp, &val, 0, req);
5991
5992         if (err != 0 || req->newptr == NULL)
5993                 return (err);
5994
5995         if (val < 1)
5996                 val = 1;
5997         if (val > 5000)
5998                 val = 5000;
5999         val = ((uint64_t)val * hz) / 1000;
6000         if (val < 1)
6001                 val = 1;
6002         if (val > (hz * 5))
6003                 val = hz * 5;
6004
6005         hdac_lock(sc);
6006         sc->poll_ival = val;
6007         hdac_unlock(sc);
6008
6009         return (err);
6010 }
6011
6012 #ifdef SND_DEBUG
6013 static int
6014 sysctl_hdac_pindump(SYSCTL_HANDLER_ARGS)
6015 {
6016         struct hdac_softc *sc;
6017         struct hdac_devinfo *devinfo;
6018         struct hdac_widget *w;
6019         device_t dev;
6020         uint32_t res, pincap, execres;
6021         int i, err, val;
6022         nid_t cad;
6023
6024         dev = oidp->oid_arg1;
6025         devinfo = pcm_getdevinfo(dev);
6026         if (devinfo == NULL || devinfo->codec == NULL ||
6027             devinfo->codec->sc == NULL)
6028                 return (EINVAL);
6029         val = 0;
6030         err = sysctl_handle_int(oidp, &val, 0, req);
6031         if (err != 0 || req->newptr == NULL || val == 0)
6032                 return (err);
6033         sc = devinfo->codec->sc;
6034         cad = devinfo->codec->cad;
6035         hdac_lock(sc);
6036         device_printf(dev, "HDAC Dump AFG [nid=%d]:\n", devinfo->nid);
6037         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6038                 w = hdac_widget_get(devinfo, i);
6039                 if (w == NULL || w->type !=
6040                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
6041                         continue;
6042                 pincap = w->wclass.pin.cap;
6043                 if ((HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(pincap) ||
6044                     HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(pincap)) &&
6045                     HDA_PARAM_PIN_CAP_TRIGGER_REQD(pincap)) {
6046                         timeout = 10000;
6047                         hdac_command(sc,
6048                             HDA_CMD_SET_PIN_SENSE(cad, w->nid, 0), cad);
6049                         do {
6050                                 res = hdac_command(sc,
6051                                     HDA_CMD_GET_PIN_SENSE(cad, w->nid), cad);
6052                                 if (res != 0x7fffffff)
6053                                         break;
6054                                 DELAY(10);
6055                         } while (--timeout != 0);
6056                 } else {
6057                         timeout = -1;
6058                         res = hdac_command(sc, HDA_CMD_GET_PIN_SENSE(cad,
6059                             w->nid), cad);
6060                 }
6061                 device_printf(dev,
6062                     "PIN_SENSE: nid=%-3d timeout=%d res=0x%08x [%s]\n",
6063                     w->nid, timeout, res,
6064                     (w->enable == 0) ? "DISABLED" : "ENABLED");
6065         }
6066         device_printf(dev,
6067             "NumGPIO=%d NumGPO=%d NumGPI=%d GPIWake=%d GPIUnsol=%d\n",
6068             HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio),
6069             HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio),
6070             HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio),
6071             HDA_PARAM_GPIO_COUNT_GPI_WAKE(devinfo->function.audio.gpio),
6072             HDA_PARAM_GPIO_COUNT_GPI_UNSOL(devinfo->function.audio.gpio));
6073         if (HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio) > 0) {
6074                 device_printf(dev, " GPI:");
6075                 res = hdac_command(sc,
6076                     HDA_CMD_GET_GPI_DATA(cad, devinfo->nid), cad);
6077                 kprintf(" data=0x%08x", res);
6078                 res = hdac_command(sc,
6079                     HDA_CMD_GET_GPI_WAKE_ENABLE_MASK(cad, devinfo->nid),
6080                     cad);
6081                 kprintf(" wake=0x%08x", res);
6082                 res = hdac_command(sc,
6083                     HDA_CMD_GET_GPI_UNSOLICITED_ENABLE_MASK(cad, devinfo->nid),
6084                     cad);
6085                 kprintf(" unsol=0x%08x", res);
6086                 res = hdac_command(sc,
6087                     HDA_CMD_GET_GPI_STICKY_MASK(cad, devinfo->nid), cad);
6088                 kprintf(" sticky=0x%08x\n", res);
6089         }
6090         if (HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio) > 0) {
6091                 device_printf(dev, " GPO:");
6092                 res = hdac_command(sc,
6093                     HDA_CMD_GET_GPO_DATA(cad, devinfo->nid), cad);
6094                 kprintf(" data=0x%08x\n", res);
6095         }
6096         if (HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio) > 0) {
6097                 device_printf(dev, "GPI0:");
6098                 res = hdac_command(sc,
6099                     HDA_CMD_GET_GPIO_DATA(cad, devinfo->nid), cad);
6100                 kprintf(" data=0x%08x", res);
6101                 res = hdac_command(sc,
6102                     HDA_CMD_GET_GPIO_ENABLE_MASK(cad, devinfo->nid), cad);
6103                 kprintf(" enable=0x%08x", res);
6104                 res = hdac_command(sc,
6105                     HDA_CMD_GET_GPIO_DIRECTION(cad, devinfo->nid), cad);
6106                 kprintf(" direction=0x%08x\n", res);
6107                 res = hdac_command(sc,
6108                     HDA_CMD_GET_GPIO_WAKE_ENABLE_MASK(cad, devinfo->nid), cad);
6109                 device_printf(dev, "      wake=0x%08x", res);
6110                 res = hdac_command(sc,
6111                     HDA_CMD_GET_GPIO_UNSOLICITED_ENABLE_MASK(cad, devinfo->nid),
6112                     cad);
6113                 kprintf("  unsol=0x%08x", res);
6114                 res = hdac_command(sc,
6115                     HDA_CMD_GET_GPIO_STICKY_MASK(cad, devinfo->nid), cad);
6116                 kprintf("    sticky=0x%08x\n", res);
6117         }
6118         hdac_unlock(sc);
6119         return (0);
6120 }
6121 #endif
6122 #endif
6123
6124 static void
6125 hdac_attach2(void *arg)
6126 {
6127         struct hdac_softc *sc;
6128         struct hdac_widget *w;
6129         struct hdac_audio_ctl *ctl;
6130         uint32_t quirks_on, quirks_off;
6131         int pcnt, rcnt, codec_index;
6132         int i;
6133         char status[SND_STATUSLEN];
6134         device_t *devlist = NULL;
6135         int devcount;
6136         struct hdac_devinfo *devinfo = NULL;
6137
6138         sc = (struct hdac_softc *)arg;
6139
6140         hdac_config_fetch(sc, &quirks_on, &quirks_off);
6141
6142         HDA_BOOTVERBOSE(
6143                 device_printf(sc->dev, "HDA_DEBUG: HDA Config: on=0x%08x off=0x%08x\n",
6144                     quirks_on, quirks_off);
6145         );
6146
6147         if (resource_int_value(device_get_name(sc->dev),
6148             device_get_unit(sc->dev), "codec_index", &codec_index) != 0) {
6149                 switch (sc->pci_subvendor) {
6150                 case GB_G33S2H_SUBVENDOR:
6151                         codec_index = 2;
6152                         break;
6153                 default:
6154                         codec_index = 0;
6155                         break;
6156                 }
6157         }
6158
6159         hdac_lock(sc);
6160
6161         /* Remove ourselves from the config hooks */
6162         if (sc->intrhook.ich_func != NULL) {
6163                 config_intrhook_disestablish(&sc->intrhook);
6164                 sc->intrhook.ich_func = NULL;
6165         }
6166
6167         /* Start the corb and rirb engines */
6168         HDA_BOOTVERBOSE(
6169                 device_printf(sc->dev, "HDA_DEBUG: Starting CORB Engine...\n");
6170         );
6171         hdac_corb_start(sc);
6172         HDA_BOOTVERBOSE(
6173                 device_printf(sc->dev, "HDA_DEBUG: Starting RIRB Engine...\n");
6174         );
6175         hdac_rirb_start(sc);
6176
6177         HDA_BOOTVERBOSE(
6178                 device_printf(sc->dev,
6179                     "HDA_DEBUG: Enabling controller interrupt...\n");
6180         );
6181         if (sc->polling == 0)
6182                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL,
6183                     HDAC_INTCTL_CIE | HDAC_INTCTL_GIE);
6184         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, HDAC_READ_4(&sc->mem, HDAC_GCTL) |
6185             HDAC_GCTL_UNSOL);
6186
6187         DELAY(1000);
6188
6189         HDA_BOOTVERBOSE(
6190                 device_printf(sc->dev,
6191                     "HDA_DEBUG: Scanning HDA codecs [start index=%d] ...\n",
6192                     codec_index);
6193         );
6194         hdac_scan_codecs(sc, codec_index);
6195
6196         device_get_children(sc->dev, &devlist, &devcount);
6197         for (i = 0; devlist != NULL && i < devcount; i++) {
6198                 devinfo = (struct hdac_devinfo *)device_get_ivars(devlist[i]);
6199                 if (devinfo != NULL && devinfo->node_type ==
6200                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) {
6201                         break;
6202                 } else
6203                         devinfo = NULL;
6204         }
6205         if (devlist != NULL)
6206                 kfree(devlist, M_TEMP);
6207
6208         if (devinfo == NULL) {
6209                 hdac_unlock(sc);
6210                 device_printf(sc->dev, "Audio Function Group not found!\n");
6211                 hdac_release_resources(sc);
6212                 return;
6213         }
6214
6215         HDA_BOOTVERBOSE(
6216                 device_printf(sc->dev,
6217                     "HDA_DEBUG: Parsing AFG nid=%d cad=%d\n",
6218                     devinfo->nid, devinfo->codec->cad);
6219         );
6220         hdac_audio_parse(devinfo);
6221         HDA_BOOTVERBOSE(
6222                 device_printf(sc->dev, "HDA_DEBUG: Parsing Ctls...\n");
6223         );
6224         hdac_audio_ctl_parse(devinfo);
6225         HDA_BOOTVERBOSE(
6226                 device_printf(sc->dev, "HDA_DEBUG: Parsing vendor patch...\n");
6227         );
6228         hdac_vendor_patch_parse(devinfo);
6229         if (quirks_on != 0)
6230                 devinfo->function.audio.quirks |= quirks_on;
6231         if (quirks_off != 0)
6232                 devinfo->function.audio.quirks &= ~quirks_off;
6233
6234         /* XXX Disable all DIGITAL path. */
6235         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6236                 w = hdac_widget_get(devinfo, i);
6237                 if (w == NULL)
6238                         continue;
6239                 if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap)) {
6240                         w->enable = 0;
6241                         continue;
6242                 }
6243                 /* XXX Disable useless pin ? */
6244                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
6245                     (w->wclass.pin.config &
6246                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
6247                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE)
6248                         w->enable = 0;
6249         }
6250         i = 0;
6251         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6252                 if (ctl->widget == NULL)
6253                         continue;
6254                 if (ctl->ossmask & SOUND_MASK_DISABLE)
6255                         ctl->enable = 0;
6256                 w = ctl->widget;
6257                 if (w->enable == 0 ||
6258                     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap))
6259                         ctl->enable = 0;
6260                 w = ctl->childwidget;
6261                 if (w == NULL)
6262                         continue;
6263                 if (w->enable == 0 ||
6264                     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap))
6265                         ctl->enable = 0;
6266         }
6267
6268         HDA_BOOTVERBOSE(
6269                 device_printf(sc->dev, "HDA_DEBUG: Building AFG tree...\n");
6270         );
6271         hdac_audio_build_tree(devinfo);
6272
6273         i = 0;
6274         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6275                 if (ctl->ossmask & (SOUND_MASK_SKIP | SOUND_MASK_DISABLE))
6276                         ctl->ossmask = 0;
6277         }
6278         HDA_BOOTVERBOSE(
6279                 device_printf(sc->dev, "HDA_DEBUG: AFG commit...\n");
6280         );
6281         hdac_audio_commit(devinfo, HDA_COMMIT_ALL);
6282         HDA_BOOTVERBOSE(
6283                 device_printf(sc->dev, "HDA_DEBUG: Ctls commit...\n");
6284         );
6285         hdac_audio_ctl_commit(devinfo);
6286
6287         HDA_BOOTVERBOSE(
6288                 device_printf(sc->dev, "HDA_DEBUG: PCMDIR_PLAY setup...\n");
6289         );
6290         pcnt = hdac_pcmchannel_setup(devinfo, PCMDIR_PLAY);
6291         HDA_BOOTVERBOSE(
6292                 device_printf(sc->dev, "HDA_DEBUG: PCMDIR_REC setup...\n");
6293         );
6294         rcnt = hdac_pcmchannel_setup(devinfo, PCMDIR_REC);
6295
6296         hdac_unlock(sc);
6297         HDA_BOOTVERBOSE(
6298                 device_printf(sc->dev,
6299                     "HDA_DEBUG: OSS mixer initialization...\n");
6300         );
6301
6302         /*
6303          * There is no point of return after this. If the driver failed,
6304          * so be it. Let the detach procedure do all the cleanup.
6305          */
6306         if (mixer_init(sc->dev, &hdac_audio_ctl_ossmixer_class, devinfo) != 0)
6307                 device_printf(sc->dev, "Can't register mixer\n");
6308
6309         if (pcnt > 0)
6310                 pcnt = 1;
6311         if (rcnt > 0)
6312                 rcnt = 1;
6313
6314         HDA_BOOTVERBOSE(
6315                 device_printf(sc->dev,
6316                     "HDA_DEBUG: Registering PCM channels...\n");
6317         );
6318         if (pcm_register(sc->dev, devinfo, pcnt, rcnt) != 0)
6319                 device_printf(sc->dev, "Can't register PCM\n");
6320
6321         sc->registered++;
6322
6323         if ((devinfo->function.audio.quirks & HDA_QUIRK_DMAPOS) &&
6324             hdac_dma_alloc(sc, &sc->pos_dma,
6325             (sc->num_iss + sc->num_oss + sc->num_bss) * 8) != 0) {
6326                 HDA_BOOTVERBOSE(
6327                         device_printf(sc->dev,
6328                             "Failed to allocate DMA pos buffer (non-fatal)\n");
6329                 );
6330         }
6331
6332         for (i = 0; i < pcnt; i++)
6333                 pcm_addchan(sc->dev, PCMDIR_PLAY, &hdac_channel_class, devinfo);
6334         for (i = 0; i < rcnt; i++)
6335                 pcm_addchan(sc->dev, PCMDIR_REC, &hdac_channel_class, devinfo);
6336
6337 #ifdef SND_DYNSYSCTL
6338         SYSCTL_ADD_PROC(snd_sysctl_tree(sc->dev),
6339             SYSCTL_CHILDREN(snd_sysctl_tree_top(sc->dev)), OID_AUTO,
6340             "polling", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev),
6341             sysctl_hdac_polling, "I", "Enable polling mode");
6342         SYSCTL_ADD_PROC(snd_sysctl_tree(sc->dev),
6343             SYSCTL_CHILDREN(snd_sysctl_tree_top(sc->dev)), OID_AUTO,
6344             "polling_interval", CTLTYPE_INT | CTLFLAG_RW, sc->dev,
6345             sizeof(sc->dev), sysctl_hdac_polling_interval, "I",
6346             "Controller/Jack Sense polling interval (1-1000 ms)");
6347 #ifdef SND_DEBUG
6348         SYSCTL_ADD_PROC(snd_sysctl_tree(sc->dev),
6349             SYSCTL_CHILDREN(snd_sysctl_tree_top(sc->dev)), OID_AUTO,
6350             "pindump", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev),
6351             sysctl_hdac_pindump, "I", "Dump pin states/data");
6352 #endif
6353 #endif
6354
6355         ksnprintf(status, SND_STATUSLEN, "at memory 0x%lx irq %ld %s [%s]",
6356             rman_get_start(sc->mem.mem_res), rman_get_start(sc->irq.irq_res),
6357             PCM_KLDSTRING(snd_hda), HDA_DRV_TEST_REV);
6358         pcm_setstatus(sc->dev, status);
6359         device_printf(sc->dev, "<HDA Codec: %s>\n", hdac_codec_name(devinfo));
6360         HDA_BOOTVERBOSE(
6361                 device_printf(sc->dev, "<HDA Codec ID: 0x%08x>\n",
6362                     hdac_codec_id(devinfo));
6363         );
6364         device_printf(sc->dev, "<HDA Driver Revision: %s>\n",
6365             HDA_DRV_TEST_REV);
6366
6367         HDA_BOOTVERBOSE(
6368                 if (devinfo->function.audio.quirks != 0) {
6369                         device_printf(sc->dev, "\n");
6370                         device_printf(sc->dev, "HDA config/quirks:");
6371                         for (i = 0; i < HDAC_QUIRKS_TAB_LEN; i++) {
6372                                 if ((devinfo->function.audio.quirks &
6373                                     hdac_quirks_tab[i].value) ==
6374                                     hdac_quirks_tab[i].value)
6375                                         kprintf(" %s", hdac_quirks_tab[i].key);
6376                         }
6377                         kprintf("\n");
6378                 }
6379                 device_printf(sc->dev, "\n");
6380                 device_printf(sc->dev, "+-------------------+\n");
6381                 device_printf(sc->dev, "| DUMPING HDA NODES |\n");
6382                 device_printf(sc->dev, "+-------------------+\n");
6383                 hdac_dump_nodes(devinfo);
6384                 device_printf(sc->dev, "\n");
6385                 device_printf(sc->dev, "+------------------------+\n");
6386                 device_printf(sc->dev, "| DUMPING HDA AMPLIFIERS |\n");
6387                 device_printf(sc->dev, "+------------------------+\n");
6388                 device_printf(sc->dev, "\n");
6389                 i = 0;
6390                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6391                         device_printf(sc->dev, "%3d: nid=%d", i,
6392                             (ctl->widget != NULL) ? ctl->widget->nid : -1);
6393                         if (ctl->childwidget != NULL)
6394                                 kprintf(" cnid=%d", ctl->childwidget->nid);
6395                         kprintf(" dir=0x%x index=%d "
6396                             "ossmask=0x%08x ossdev=%d%s\n",
6397                             ctl->dir, ctl->index,
6398                             ctl->ossmask, ctl->ossdev,
6399                             (ctl->enable == 0) ? " [DISABLED]" : "");
6400                 }
6401                 device_printf(sc->dev, "\n");
6402                 device_printf(sc->dev, "+-----------------------------------+\n");
6403                 device_printf(sc->dev, "| DUMPING HDA AUDIO/VOLUME CONTROLS |\n");
6404                 device_printf(sc->dev, "+-----------------------------------+\n");
6405                 hdac_dump_ctls(devinfo, "Master Volume (OSS: vol)", SOUND_MASK_VOLUME);
6406                 hdac_dump_ctls(devinfo, "PCM Volume (OSS: pcm)", SOUND_MASK_PCM);
6407                 hdac_dump_ctls(devinfo, "CD Volume (OSS: cd)", SOUND_MASK_CD);
6408                 hdac_dump_ctls(devinfo, "Microphone Volume (OSS: mic)", SOUND_MASK_MIC);
6409                 hdac_dump_ctls(devinfo, "Line-in Volume (OSS: line)", SOUND_MASK_LINE);
6410                 hdac_dump_ctls(devinfo, "Recording Level (OSS: rec)", SOUND_MASK_RECLEV);
6411                 hdac_dump_ctls(devinfo, "Speaker/Beep (OSS: speaker)", SOUND_MASK_SPEAKER);
6412                 hdac_dump_ctls(devinfo, NULL, 0);
6413                 hdac_dump_dac(devinfo);
6414                 hdac_dump_adc(devinfo);
6415                 device_printf(sc->dev, "\n");
6416                 device_printf(sc->dev, "+--------------------------------------+\n");
6417                 device_printf(sc->dev, "| DUMPING PCM Playback/Record Channels |\n");
6418                 device_printf(sc->dev, "+--------------------------------------+\n");
6419                 hdac_dump_pcmchannels(sc, pcnt, rcnt);
6420         );
6421
6422         if (sc->polling != 0) {
6423                 hdac_lock(sc);
6424                 callout_reset(&sc->poll_hdac, 1, hdac_poll_callback, sc);
6425                 hdac_unlock(sc);
6426         }
6427 }
6428
6429 /****************************************************************************
6430  * int hdac_detach(device_t)
6431  *
6432  * Detach and free up resources utilized by the hdac device.
6433  ****************************************************************************/
6434 static int
6435 hdac_detach(device_t dev)
6436 {
6437         struct hdac_softc *sc = NULL;
6438         struct hdac_devinfo *devinfo = NULL;
6439         int err;
6440
6441         devinfo = (struct hdac_devinfo *)pcm_getdevinfo(dev);
6442         if (devinfo != NULL && devinfo->codec != NULL)
6443                 sc = devinfo->codec->sc;
6444         if (sc == NULL)
6445                 return (0);
6446
6447         if (sc->registered > 0) {
6448                 err = pcm_unregister(dev);
6449                 if (err != 0)
6450                         return (err);
6451         }
6452
6453         hdac_release_resources(sc);
6454
6455         return (0);
6456 }
6457
6458 static device_method_t hdac_methods[] = {
6459         /* device interface */
6460         DEVMETHOD(device_probe,         hdac_probe),
6461         DEVMETHOD(device_attach,        hdac_attach),
6462         DEVMETHOD(device_detach,        hdac_detach),
6463         DEVMETHOD_END
6464 };
6465
6466 static driver_t hdac_driver = {
6467         "pcm",
6468         hdac_methods,
6469         PCM_SOFTC_SIZE,
6470 };
6471
6472 DRIVER_MODULE(snd_hda, pci, hdac_driver, pcm_devclass, NULL, NULL);
6473 MODULE_DEPEND(snd_hda, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
6474 MODULE_VERSION(snd_hda, 1);