2 * Copyright (c) 2006-2008 Stanislav Sedov <stas@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * $FreeBSD: head/sys/dev/cpuctl/cpuctl.c 275960 2014-12-20 16:40:49Z kib $
30 #include <sys/param.h>
31 #include <sys/systm.h>
33 #include <sys/fcntl.h>
34 #include <sys/malloc.h>
35 #include <sys/module.h>
38 #include <sys/queue.h>
39 #include <sys/sched.h>
40 #include <sys/kernel.h>
41 #include <sys/sysctl.h>
43 #include <sys/cpuctl.h>
44 #include <sys/device.h>
45 #include <sys/thread2.h>
47 #include <machine/cpufunc.h>
48 #include <machine/md_var.h>
49 #include <machine/specialreg.h>
51 static d_open_t cpuctl_open;
52 static d_close_t cpuctl_close;
53 static d_ioctl_t cpuctl_ioctl;
55 #define CPUCTL_VERSION 1
58 # define DPRINTF(format,...) kprintf(format, __VA_ARGS__);
60 # define DPRINTF(format,...)
63 #define UCODE_SIZE_MAX (4 * 1024 * 1024)
65 static int cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd);
66 static void cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data);
67 static void cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data);
68 static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data);
69 static int update_intel(int cpu, cpuctl_update_args_t *args);
70 static int update_amd(int cpu, cpuctl_update_args_t *args);
71 static int update_via(int cpu, cpuctl_update_args_t *args);
73 static cdev_t *cpuctl_devs;
74 static MALLOC_DEFINE(M_CPUCTL, "cpuctl", "CPUCTL buffer");
75 static struct lock cpuctl_lock = LOCK_INITIALIZER("cpuctl", 0, 0);
77 static struct dev_ops cpuctl_cdevsw = {
78 .head = { .name = "cpuctl", .flags = D_MPSAFE },
79 .d_open = cpuctl_open,
80 .d_close = cpuctl_close,
81 .d_ioctl = cpuctl_ioctl,
85 cpuctl_ioctl(struct dev_ioctl_args *ap)
88 int cpu = dev2unit(ap->a_head.a_dev);
89 u_long cmd = ap->a_cmd;
90 int flags = ap->a_fflag;
91 caddr_t data = ap->a_data;
94 DPRINTF("[cpuctl,%d]: bad cpu number %d\n", __LINE__, cpu);
97 /* Require write flag for "write" requests. */
98 if ((cmd == CPUCTL_WRMSR || cmd == CPUCTL_UPDATE ||
99 cmd == CPUCTL_MSRSBIT || cmd == CPUCTL_MSRCBIT) &&
100 ((flags & FWRITE) == 0))
103 lockmgr(&cpuctl_lock, LK_EXCLUSIVE);
107 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd);
112 ret = priv_check(curthread, PRIV_CPUCTL_WRMSR);
115 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd);
118 cpuctl_do_cpuid(cpu, (cpuctl_cpuid_args_t *)data);
122 ret = priv_check(curthread, PRIV_CPUCTL_UPDATE);
125 ret = cpuctl_do_update(cpu, (cpuctl_update_args_t *)data);
127 case CPUCTL_CPUID_COUNT:
128 cpuctl_do_cpuid_count(cpu, (cpuctl_cpuid_count_args_t *)data);
136 lockmgr(&cpuctl_lock, LK_RELEASE);
142 * Actually perform cpuid operation.
145 cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data)
149 KASSERT(cpu >= 0 && cpu < ncpus,
150 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
152 /* Explicitly clear cpuid data to avoid returning stale info. */
153 bzero(data->data, sizeof(data->data));
154 DPRINTF("[cpuctl,%d]: retrieving cpuid lev %#0x type %#0x for %d cpu\n",
155 __LINE__, data->level, data->level_type, cpu);
157 lwkt_migratecpu(cpu);
158 cpuid_count(data->level, data->level_type, data->data);
159 lwkt_migratecpu(oldcpu);
163 cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data)
165 cpuctl_cpuid_count_args_t cdata;
167 cdata.level = data->level;
168 /* Override the level type. */
169 cdata.level_type = 0;
170 cpuctl_do_cpuid_count(cpu, &cdata);
171 bcopy(cdata.data, data->data, sizeof(data->data)); /* Ignore error */
175 * Actually perform MSR operations.
178 cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd)
184 KASSERT(cpu >= 0 && cpu < ncpus,
185 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
188 * Explicitly clear cpuid data to avoid returning stale
191 DPRINTF("[cpuctl,%d]: operating on MSR %#0x for %d cpu\n", __LINE__,
194 lwkt_migratecpu(cpu);
195 if (cmd == CPUCTL_RDMSR) {
197 ret = rdmsr_safe(data->msr, &data->data);
198 } else if (cmd == CPUCTL_WRMSR) {
199 ret = wrmsr_safe(data->msr, data->data);
200 } else if (cmd == CPUCTL_MSRSBIT) {
202 ret = rdmsr_safe(data->msr, ®);
204 ret = wrmsr_safe(data->msr, reg | data->data);
206 } else if (cmd == CPUCTL_MSRCBIT) {
208 ret = rdmsr_safe(data->msr, ®);
210 ret = wrmsr_safe(data->msr, reg & ~data->data);
213 panic("[cpuctl,%d]: unknown operation requested: %lu", __LINE__, cmd);
214 lwkt_migratecpu(oldcpu);
219 * Actually perform microcode update.
221 extern void mitigation_vm_setup(void *arg);
224 cpuctl_do_update(int cpu, cpuctl_update_args_t *data)
226 cpuctl_cpuid_args_t args = {
232 KASSERT(cpu >= 0 && cpu < ncpus,
233 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu));
234 DPRINTF("[cpuctl,%d]: XXX %d", __LINE__, cpu);
236 cpuctl_do_cpuid(cpu, &args);
237 ((uint32_t *)vendor)[0] = args.data[1];
238 ((uint32_t *)vendor)[1] = args.data[3];
239 ((uint32_t *)vendor)[2] = args.data[2];
241 if (strncmp(vendor, INTEL_VENDOR_ID, sizeof(INTEL_VENDOR_ID)) == 0)
242 ret = update_intel(cpu, data);
243 else if(strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) == 0)
244 ret = update_amd(cpu, data);
245 else if(strncmp(vendor, CENTAUR_VENDOR_ID, sizeof(CENTAUR_VENDOR_ID)) == 0)
246 ret = update_via(cpu, data);
251 mitigation_vm_setup((void *)(intptr_t)1);
257 update_intel(int cpu, cpuctl_update_args_t *args)
265 if (args->size == 0 || args->data == NULL) {
266 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
269 if (args->size > UCODE_SIZE_MAX) {
270 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
275 * 16 byte alignment required. Rely on the fact that
276 * malloc(9) always returns the pointer aligned at least on
277 * the size of the allocation.
279 ptr = kmalloc(args->size + 16, M_CPUCTL, M_WAITOK);
280 if (copyin(args->data, ptr, args->size) != 0) {
281 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
282 __LINE__, args->data, ptr, args->size);
287 lwkt_migratecpu(cpu);
289 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */
294 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr));
295 wrmsr_safe(MSR_BIOS_SIGN, 0);
298 * Serialize instruction flow.
302 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */
303 lwkt_migratecpu(oldcpu);
304 kprintf("[cpu %d]: updated microcode from rev=0x%x to rev=0x%x\n", cpu,
305 (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32));
312 kfree(ptr, M_CPUCTL);
317 update_amd(int cpu, cpuctl_update_args_t *args)
324 if (args->size == 0 || args->data == NULL) {
325 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
328 if (args->size > UCODE_SIZE_MAX) {
329 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
333 * XXX Might not require contignous address space - needs check
335 ptr = contigmalloc(args->size, M_CPUCTL, 0, 0, 0xffffffff, 16, 0);
337 DPRINTF("[cpuctl,%d]: cannot allocate %zd bytes of memory",
338 __LINE__, args->size);
341 if (copyin(args->data, ptr, args->size) != 0) {
342 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
343 __LINE__, args->data, ptr, args->size);
348 lwkt_migratecpu(cpu);
354 wrmsr_safe(MSR_K8_UCODE_UPDATE, (uintptr_t)ptr);
357 * Serialize instruction flow.
361 lwkt_migratecpu(oldcpu);
365 contigfree(ptr, args->size, M_CPUCTL);
370 update_via(int cpu, cpuctl_update_args_t *args)
373 uint64_t rev0, rev1, res;
378 if (args->size == 0 || args->data == NULL) {
379 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__);
382 if (args->size > UCODE_SIZE_MAX) {
383 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__);
388 * 4 byte alignment required.
390 ptr = kmalloc(args->size, M_CPUCTL, M_WAITOK);
391 if (copyin(args->data, ptr, args->size) != 0) {
392 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed",
393 __LINE__, args->data, ptr, args->size);
398 lwkt_migratecpu(cpu);
400 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */
405 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr));
409 * Result are in low byte of MSR FCR5:
410 * 0x00: No update has been attempted since RESET.
411 * 0x01: The last attempted update was successful.
412 * 0x02: The last attempted update was unsuccessful due to a bad
413 * environment. No update was loaded and any preexisting
414 * patches are still active.
415 * 0x03: The last attempted update was not applicable to this processor.
416 * No update was loaded and any preexisting patches are still
418 * 0x04: The last attempted update was not successful due to an invalid
419 * update data block. No update was loaded and any preexisting
420 * patches are still active
422 rdmsr_safe(0x1205, &res);
425 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */
426 lwkt_migratecpu(oldcpu);
428 DPRINTF("[cpu,%d]: rev0=%x rev1=%x res=%x\n", __LINE__,
429 (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32), (unsigned)res);
436 kfree(ptr, M_CPUCTL);
441 cpuctl_open(struct dev_open_args *ap)
446 cpu = dev2unit(ap->a_head.a_dev);
447 if (cpu < 0 || cpu >= ncpus) {
448 DPRINTF("[cpuctl,%d]: incorrect cpu number %d\n",
452 if (ap->a_oflags & FWRITE)
453 ret = securelevel > 0 ? EPERM : 0;
458 cpuctl_close(struct dev_close_args *ap)
464 cpuctl_modevent(module_t mod __unused, int type, void *data __unused)
470 if ((cpu_feature & CPUID_MSR) == 0) {
472 kprintf("cpuctl: not available.\n");
476 kprintf("cpuctl: access to MSR registers/cpuid info.\n");
477 cpuctl_devs = kmalloc(sizeof(*cpuctl_devs) * ncpus, M_CPUCTL,
479 for (cpu = 0; cpu < ncpus; cpu++)
480 cpuctl_devs[cpu] = make_dev(&cpuctl_cdevsw, cpu,
481 UID_ROOT, GID_KMEM, 0640, "cpuctl%d", cpu);
484 for (cpu = 0; cpu < ncpus; cpu++) {
485 if (cpuctl_devs[cpu] != NULL)
486 destroy_dev(cpuctl_devs[cpu]);
488 kfree(cpuctl_devs, M_CPUCTL);
498 DEV_MODULE(cpuctl, cpuctl_modevent, NULL);
499 MODULE_VERSION(cpuctl, CPUCTL_VERSION);