2 * Copyright (c) 2009 Yahoo! Inc.
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6 * modification, are permitted provided that the following conditions
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26 * $FreeBSD: src/sys/dev/mps/mps_pci.c,v 1.4 2012/01/26 18:17:21 ken Exp $
29 /* PCI/PCI-X/PCIe bus interface for the LSI MPT2 controllers */
31 /* TODO Move headers to mpsvar */
32 #include <sys/types.h>
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/endian.h>
40 #include <sys/eventhandler.h>
41 #include <sys/malloc.h>
42 #include <sys/sysctl.h>
47 #include <bus/pci/pcireg.h>
48 #include <bus/pci/pcivar.h>
49 #include <bus/pci/pci_private.h>
51 #include <dev/raid/mps/mpi/mpi2_type.h>
52 #include <dev/raid/mps/mpi/mpi2.h>
53 #include <dev/raid/mps/mpi/mpi2_ioc.h>
54 #include <dev/raid/mps/mpi/mpi2_cnfg.h>
55 #include <dev/raid/mps/mpi/mpi2_tool.h>
57 #include <sys/queue.h>
58 #include <sys/kthread.h>
59 #include <dev/raid/mps/mps_ioctl.h>
60 #include <dev/raid/mps/mpsvar.h>
62 static int mps_pci_probe(device_t);
63 static int mps_pci_attach(device_t);
64 static int mps_pci_detach(device_t);
65 static int mps_pci_suspend(device_t);
66 static int mps_pci_resume(device_t);
67 static void mps_pci_free(struct mps_softc *);
68 #if 0 /* XXX swildner */
69 static int mps_alloc_msix(struct mps_softc *sc, int msgs);
72 static device_method_t mps_methods[] = {
73 DEVMETHOD(device_probe, mps_pci_probe),
74 DEVMETHOD(device_attach, mps_pci_attach),
75 DEVMETHOD(device_detach, mps_pci_detach),
76 DEVMETHOD(device_suspend, mps_pci_suspend),
77 DEVMETHOD(device_resume, mps_pci_resume),
82 static driver_t mps_pci_driver = {
85 sizeof(struct mps_softc)
88 static devclass_t mps_devclass;
89 DRIVER_MODULE(mps, pci, mps_pci_driver, mps_devclass, NULL, NULL);
90 MODULE_VERSION(mps, 1);
99 } mps_identifiers[] = {
100 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2004,
101 0xffff, 0xffff, 0, "LSI SAS2004" },
102 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2008,
103 0xffff, 0xffff, 0, "LSI SAS2008" },
104 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_1,
105 0xffff, 0xffff, 0, "LSI SAS2108" },
106 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_2,
107 0xffff, 0xffff, 0, "LSI SAS2108" },
108 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3,
109 0xffff, 0xffff, 0, "LSI SAS2108" },
110 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1,
111 0xffff, 0xffff, 0, "LSI SAS2116" },
112 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2,
113 0xffff, 0xffff, 0, "LSI SAS2116" },
114 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_1,
115 0xffff, 0xffff, 0, "LSI SAS2208" },
116 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_2,
117 0xffff, 0xffff, 0, "LSI SAS2208" },
118 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_3,
119 0xffff, 0xffff, 0, "LSI SAS2208" },
120 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_4,
121 0xffff, 0xffff, 0, "LSI SAS2208" },
122 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_5,
123 0xffff, 0xffff, 0, "LSI SAS2208" },
124 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_6,
125 0xffff, 0xffff, 0, "LSI SAS2208" },
126 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_1,
127 0xffff, 0xffff, 0, "LSI SAS2308" },
128 // Add Customer specific vender/subdevice id before generic
129 // (0xffff) vender/subdevice id.
130 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
131 0x8086, 0x3516, 0, "Intel(R) Integrated RAID Module RMS25JB080" },
132 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
133 0x8086, 0x3517, 0, "Intel(R) Integrated RAID Module RMS25JB040" },
134 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
135 0x8086, 0x3518, 0, "Intel(R) Integrated RAID Module RMS25KB080" },
136 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
137 0x8086, 0x3519, 0, "Intel(R) Integrated RAID Module RMS25KB040" },
138 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
139 0xffff, 0xffff, 0, "LSI SAS2308" },
140 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_3,
141 0xffff, 0xffff, 0, "LSI SAS2308" },
142 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SSS6200,
143 0xffff, 0xffff, MPS_FLAGS_WD_AVAILABLE, "LSI SSS6200" },
144 { 0, 0, 0, 0, 0, NULL }
147 static struct mps_ident *
148 mps_find_ident(device_t dev)
152 for (m = mps_identifiers; m->vendor != 0; m++) {
153 if (m->vendor != pci_get_vendor(dev))
155 if (m->device != pci_get_device(dev))
157 if ((m->subvendor != 0xffff) &&
158 (m->subvendor != pci_get_subvendor(dev)))
160 if ((m->subdevice != 0xffff) &&
161 (m->subdevice != pci_get_subdevice(dev)))
170 mps_pci_probe(device_t dev)
172 struct mps_ident *id;
174 if ((id = mps_find_ident(dev)) != NULL) {
175 device_set_desc(dev, id->desc);
176 return (BUS_PROBE_DEFAULT);
182 mps_pci_attach(device_t dev)
184 struct mps_softc *sc;
189 sc = device_get_softc(dev);
190 bzero(sc, sizeof(*sc));
192 m = mps_find_ident(dev);
193 sc->mps_flags = m->flags;
195 /* Twiddle basic PCI config bits for a sanity check */
196 command = pci_read_config(dev, PCIR_COMMAND, 2);
197 command |= PCIM_CMD_BUSMASTEREN;
198 pci_write_config(dev, PCIR_COMMAND, command, 2);
199 command = pci_read_config(dev, PCIR_COMMAND, 2);
200 if ((command & PCIM_CMD_BUSMASTEREN) == 0) {
201 device_printf(dev, "Cannot enable PCI busmaster\n");
204 if ((command & PCIM_CMD_MEMEN) == 0) {
205 device_printf(dev, "PCI memory window not available\n");
209 /* Allocate the System Interface Register Set */
210 sc->mps_regs_rid = PCIR_BAR(1);
211 if ((sc->mps_regs_resource = bus_alloc_resource_any(dev,
212 SYS_RES_MEMORY, &sc->mps_regs_rid, RF_ACTIVE)) == NULL) {
213 device_printf(dev, "Cannot allocate PCI registers\n");
216 sc->mps_btag = rman_get_bustag(sc->mps_regs_resource);
217 sc->mps_bhandle = rman_get_bushandle(sc->mps_regs_resource);
219 /* Allocate the parent DMA tag */
220 if (bus_dma_tag_create(NULL, /* parent */
221 1, 0, /* algnmnt, boundary */
222 BUS_SPACE_MAXADDR, /* lowaddr */
223 BUS_SPACE_MAXADDR, /* highaddr */
224 NULL, NULL, /* filter, filterarg */
225 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
226 BUS_SPACE_UNRESTRICTED, /* nsegments */
227 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
229 &sc->mps_parent_dmat)) {
230 device_printf(dev, "Cannot allocate parent DMA tag\n");
235 if ((error = mps_attach(sc)) != 0)
242 mps_pci_setup_interrupts(struct mps_softc *sc)
249 #if 0 /* XXX swildner */
250 if ((sc->disable_msix == 0) &&
251 ((msgs = pci_msix_count(dev)) >= MPS_MSI_COUNT))
252 error = mps_alloc_msix(sc, MPS_MSI_COUNT);
255 sc->mps_irq_rid[0] = 0;
256 sc->mps_irq_type[0] = pci_alloc_1intr(dev, sc->enable_msi,
257 &sc->mps_irq_rid[0], &irq_flags);
258 sc->mps_irq[0] = bus_alloc_resource_any(dev, SYS_RES_IRQ,
259 &sc->mps_irq_rid[0], irq_flags);
260 if (sc->mps_irq[0] == NULL) {
261 device_printf(dev, "Cannot allocate interrupt\n");
264 error = bus_setup_intr(dev, sc->mps_irq[0], INTR_MPSAFE, mps_intr, sc,
265 &sc->mps_intrhand[0], NULL);
267 device_printf(dev, "Cannot setup interrupt\n");
273 mps_pci_detach(device_t dev)
275 struct mps_softc *sc;
278 sc = device_get_softc(dev);
280 if ((error = mps_free(sc)) != 0)
288 mps_pci_free(struct mps_softc *sc)
290 if (sc->mps_parent_dmat != NULL) {
291 bus_dma_tag_destroy(sc->mps_parent_dmat);
294 bus_teardown_intr(sc->mps_dev, sc->mps_irq[0], sc->mps_intrhand[0]);
295 bus_release_resource(sc->mps_dev, SYS_RES_IRQ, sc->mps_irq_rid[0],
297 if (sc->mps_irq_type[0] == PCI_INTR_TYPE_MSI)
298 pci_release_msi(sc->mps_dev);
300 if (sc->mps_regs_resource != NULL) {
301 bus_release_resource(sc->mps_dev, SYS_RES_MEMORY,
302 sc->mps_regs_rid, sc->mps_regs_resource);
309 mps_pci_suspend(device_t dev)
315 mps_pci_resume(device_t dev)
320 #if 0 /* XXX swildner */
322 mps_alloc_msix(struct mps_softc *sc, int msgs)
326 error = pci_alloc_msix(sc->mps_dev, &msgs);
332 mps_pci_restore(struct mps_softc *sc)
334 struct pci_devinfo *dinfo;
336 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
338 dinfo = device_get_ivars(sc->mps_dev);
340 mps_dprint(sc, MPS_FAULT, "%s: NULL dinfo\n", __func__);
344 pci_cfg_restore(sc->mps_dev, dinfo);