sys/cpu/amd64/include/atomic.h

   1 /*-
   2  * Copyright (c) 1998 Doug Rabson
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD: src/sys/amd64/include/atomic.h,v 1.32 2003/11/21 03:02:00 peter Exp $
  27  * $DragonFly: src/sys/cpu/amd64/include/atomic.h,v 1.1 2007/08/21 19:40:24 corecode Exp $
  28  */
  29 #ifndef _CPU_ATOMIC_H_
  30 #define _CPU_ATOMIC_H_
  31
  32 /*
  33  * Various simple arithmetic on memory which is atomic in the presence
  34  * of interrupts and multiple processors.
  35  *
  36  * atomic_set_char(P, V)        (*(u_char*)(P) |= (V))
  37  * atomic_clear_char(P, V)      (*(u_char*)(P) &= ~(V))
  38  * atomic_add_char(P, V)        (*(u_char*)(P) += (V))
  39  * atomic_subtract_char(P, V)   (*(u_char*)(P) -= (V))
  40  *
  41  * atomic_set_short(P, V)       (*(u_short*)(P) |= (V))
  42  * atomic_clear_short(P, V)     (*(u_short*)(P) &= ~(V))
  43  * atomic_add_short(P, V)       (*(u_short*)(P) += (V))
  44  * atomic_subtract_short(P, V)  (*(u_short*)(P) -= (V))
  45  *
  46  * atomic_set_int(P, V)         (*(u_int*)(P) |= (V))
  47  * atomic_clear_int(P, V)       (*(u_int*)(P) &= ~(V))
  48  * atomic_add_int(P, V)         (*(u_int*)(P) += (V))
  49  * atomic_subtract_int(P, V)    (*(u_int*)(P) -= (V))
  50  * atomic_readandclear_int(P)   (return  *(u_int*)P; *(u_int*)P = 0;)
  51  *
  52  * atomic_set_long(P, V)        (*(u_long*)(P) |= (V))
  53  * atomic_clear_long(P, V)      (*(u_long*)(P) &= ~(V))
  54  * atomic_add_long(P, V)        (*(u_long*)(P) += (V))
  55  * atomic_subtract_long(P, V)   (*(u_long*)(P) -= (V))
  56  * atomic_readandclear_long(P)  (return  *(u_long*)P; *(u_long*)P = 0;)
  57  */
  58
  59 /*
  60  * The above functions are expanded inline in the statically-linked
  61  * kernel.  Lock prefixes are generated if an SMP kernel is being
  62  * built.
  63  *
  64  * Kernel modules call real functions which are built into the kernel.
  65  * This allows kernel modules to be portable between UP and SMP systems.
  66  */
  67 #if defined(KLD_MODULE)
  68 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V)                     \
  69 void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
  70
  71 int atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src);
  72 int atomic_cmpset_long(volatile u_long *dst, u_long exp, u_long src);
  73
  74 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP)                       \
  75 u_##TYPE        atomic_load_acq_##TYPE(volatile u_##TYPE *p);   \
  76 void            atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
  77
  78 #else /* !KLD_MODULE */
  79
  80 #ifdef __GNUC__
  81
  82 /*
  83  * For userland, assume the SMP case and use lock prefixes so that
  84  * the binaries will run on both types of systems.
  85  */
  86 #if defined(SMP) || !defined(_KERNEL)
  87 #define MPLOCKED        "lock ; "
  88 #else
  89 #define MPLOCKED
  90 #endif
  91
  92 /*
  93  * The assembly is volatilized to demark potential before-and-after side
  94  * effects if an interrupt or SMP collision were to occur.
  95  */
  96 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V)             \
  97 static __inline void                                    \
  98 atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
  99 {                                                       \
 100         __asm __volatile(MPLOCKED OP                    \
 101                          : "+m" (*p)                    \
 102                          : CONS (V));                   \
 103 }                                                       \
 104 struct __hack
 105
 106 #else /* !__GNUC__ */
 107
 108 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V)                             \
 109 extern void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
 110
 111 #endif /* __GNUC__ */
 112
 113 /*
 114  * These functions operate on a 32 bit interrupt interlock which is defined
 115  * as follows:
 116  *
 117  *      bit 0-30        interrupt handler disabled bits (counter)
 118  *      bit 31          interrupt handler currently running bit (1 = run)
 119  *
 120  * atomic_intr_cond_test(P)     Determine if the interlock is in an
 121  *                              acquired state.  Returns 0 if it not
 122  *                              acquired, non-zero if it is.
 123  *
 124  * atomic_intr_cond_try(P)
 125  *                              Increment the request counter and attempt to
 126  *                              set bit 31 to acquire the interlock.  If
 127  *                              we are unable to set bit 31 the request
 128  *                              counter is decremented and we return -1,
 129  *                              otherwise we return 0.
 130  *
 131  * atomic_intr_cond_enter(P, func, arg)
 132  *                              Increment the request counter and attempt to
 133  *                              set bit 31 to acquire the interlock.  If
 134  *                              we are unable to set bit 31 func(arg) is
 135  *                              called in a loop until we are able to set
 136  *                              bit 31.
 137  *
 138  * atomic_intr_cond_exit(P, func, arg)
 139  *                              Decrement the request counter and clear bit
 140  *                              31.  If the request counter is still non-zero
 141  *                              call func(arg) once.
 142  *
 143  * atomic_intr_handler_disable(P)
 144  *                              Set bit 30, indicating that the interrupt
 145  *                              handler has been disabled.  Must be called
 146  *                              after the hardware is disabled.
 147  *
 148  *                              Returns bit 31 indicating whether a serialized
 149  *                              accessor is active (typically the interrupt
 150  *                              handler is running).  0 == not active,
 151  *                              non-zero == active.
 152  *
 153  * atomic_intr_handler_enable(P)
 154  *                              Clear bit 30, indicating that the interrupt
 155  *                              handler has been enabled.  Must be called
 156  *                              before the hardware is actually enabled.
 157  *
 158  * atomic_intr_handler_is_enabled(P)
 159  *                              Returns bit 30, 0 indicates that the handler
 160  *                              is enabled, non-zero indicates that it is
 161  *                              disabled.  The request counter portion of
 162  *                              the field is ignored.
 163  */
 164
 165 #ifndef __ATOMIC_INTR_T
 166 #define __ATOMIC_INTR_T
 167 typedef volatile int atomic_intr_t;
 168 #endif
 169
 170 #if defined(KLD_MODULE)
 171
 172 void atomic_intr_init(atomic_intr_t *p);
 173 int atomic_intr_handler_disable(atomic_intr_t *p);
 174 void atomic_intr_handler_enable(atomic_intr_t *p);
 175 int atomic_intr_handler_is_enabled(atomic_intr_t *p);
 176 int atomic_intr_cond_test(atomic_intr_t *p);
 177 int atomic_intr_cond_try(atomic_intr_t *p);
 178 void atomic_intr_cond_enter(atomic_intr_t *p, void (*func)(void *), void *arg);
 179 void atomic_intr_cond_exit(atomic_intr_t *p, void (*func)(void *), void *arg);
 180
 181 #else
 182
 183 static __inline
 184 void
 185 atomic_intr_init(atomic_intr_t *p)
 186 {
 187         *p = 0;
 188 }
 189
 190 static __inline
 191 int
 192 atomic_intr_handler_disable(atomic_intr_t *p)
 193 {
 194         int data;
 195
 196         __asm __volatile(MPLOCKED "orl $0x40000000,%1; movl %1,%%eax; " \
 197                                   "andl $0x80000000,%%eax" \
 198                                   : "=a"(data) , "+m"(*p));
 199         return(data);
 200 }
 201
 202 static __inline
 203 void
 204 atomic_intr_handler_enable(atomic_intr_t *p)
 205 {
 206         __asm __volatile(MPLOCKED "andl $0xBFFFFFFF,%0" : "+m" (*p));
 207 }
 208
 209 static __inline
 210 int
 211 atomic_intr_handler_is_enabled(atomic_intr_t *p)
 212 {
 213         int data;
 214
 215         __asm __volatile("movl %1,%%eax; andl $0x40000000,%%eax" \
 216                          : "=a"(data) : "m"(*p));
 217         return(data);
 218 }
 219
 220 static __inline
 221 void
 222 atomic_intr_cond_enter(atomic_intr_t *p, void (*func)(void *), void *arg)
 223 {
 224         __asm __volatile(MPLOCKED "incl %0; " \
 225                          "1: ;" \
 226                          MPLOCKED "btsl $31,%0; jnc 2f; " \
 227                          "movq %2,%rdi; call *%1; " \
 228                          "jmp 1b; " \
 229                          "2: ;" \
 230                          : "+m" (*p) \
 231                          : "r"(func), "m"(arg) \
 232                          : "ax", "cx", "dx", "di");     /* XXX clobbers more regs */
 233 }
 234
 235 /*
 236  * Attempt to enter the interrupt condition variable.  Returns zero on
 237  * success, 1 on failure.
 238  */
 239 static __inline
 240 int
 241 atomic_intr_cond_try(atomic_intr_t *p)
 242 {
 243         int ret;
 244
 245         __asm __volatile(MPLOCKED "incl %0; " \
 246                          "1: ;" \
 247                          "subl %%eax,%%eax; " \
 248                          MPLOCKED "btsl $31,%0; jnc 2f; " \
 249                          MPLOCKED "decl %0; " \
 250                          "movl $1,%%eax;" \
 251                          "2: ;" \
 252                          : "+m" (*p), "=a"(ret) \
 253                          : : "cx", "dx");
 254         return (ret);
 255 }
 256
 257
 258 static __inline
 259 int
 260 atomic_intr_cond_test(atomic_intr_t *p)
 261 {
 262         return((int)(*p & 0x80000000));
 263 }
 264
 265 static __inline
 266 void
 267 atomic_intr_cond_exit(atomic_intr_t *p, void (*func)(void *), void *arg)
 268 {
 269         __asm __volatile(MPLOCKED "decl %0; " \
 270                         MPLOCKED "btrl $31,%0; " \
 271                         "testl $0x3FFFFFFF,%0; jz 1f; " \
 272                          "movq %2,%rdi; call *%1; " \
 273                          "1: ;" \
 274                          : "+m" (*p) \
 275                          : "r"(func), "m"(arg) \
 276                          : "ax", "cx", "dx", "di");     /* XXX clobbers more regs */
 277 }
 278
 279 #endif
 280
 281 /*
 282  * Atomic compare and set, used by the mutex functions
 283  *
 284  * if (*dst == exp) *dst = src (all 32 bit words)
 285  *
 286  * Returns 0 on failure, non-zero on success
 287  */
 288
 289 #if defined(__GNUC__)
 290
 291 static __inline int
 292 atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src)
 293 {
 294         int res = exp;
 295
 296         __asm __volatile (
 297                 MPLOCKED
 298         "       cmpxchgl %1,%2 ;        "
 299         "       setz    %%al ;          "
 300         "       movzbl  %%al,%0 ;       "
 301         "1:                             "
 302         "# atomic_cmpset_int"
 303         : "+a" (res)                    /* 0 (result) */
 304         : "r" (src),                    /* 1 */
 305           "m" (*(dst))                  /* 2 */
 306         : "memory");
 307
 308         return (res);
 309 }
 310
 311 static __inline int
 312 atomic_cmpset_long(volatile u_long *dst, u_long exp, u_long src)
 313 {
 314         long res = exp;
 315
 316         __asm __volatile (
 317                 MPLOCKED
 318         "       cmpxchgq %1,%2 ;        "
 319         "       setz    %%al ;          "
 320         "       movzbq  %%al,%0 ;       "
 321         "1:                             "
 322         "# atomic_cmpset_long"
 323         : "+a" (res)                    /* 0 (result) */
 324         : "r" (src),                    /* 1 */
 325           "m" (*(dst))                  /* 2 */
 326         : "memory");
 327
 328         return (res);
 329 }
 330 #endif /* defined(__GNUC__) */
 331
 332 #if defined(__GNUC__)
 333
 334 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP)               \
 335 static __inline u_##TYPE                                \
 336 atomic_load_acq_##TYPE(volatile u_##TYPE *p)            \
 337 {                                                       \
 338         u_##TYPE res;                                   \
 339                                                         \
 340         __asm __volatile(MPLOCKED LOP                   \
 341         : "=a" (res),                   /* 0 (result) */\
 342           "+m" (*p)                     /* 1 */         \
 343         : : "memory");                                  \
 344                                                         \
 345         return (res);                                   \
 346 }                                                       \
 347                                                         \
 348 /*                                                      \
 349  * The XCHG instruction asserts LOCK automagically.     \
 350  */                                                     \
 351 static __inline void                                    \
 352 atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
 353 {                                                       \
 354         __asm __volatile(SOP                            \
 355         : "+m" (*p),                    /* 0 */         \
 356           "+r" (v)                      /* 1 */         \
 357         : : "memory");                                  \
 358 }                                                       \
 359 struct __hack
 360
 361 #else /* !defined(__GNUC__) */
 362
 363 extern int atomic_cmpset_int(volatile u_int *, u_int, u_int);
 364 extern int atomic_cmpset_long(volatile u_long *, u_long, u_long);
 365
 366 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP)                               \
 367 extern u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p);           \
 368 extern void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
 369
 370 #endif /* defined(__GNUC__) */
 371
 372 #endif /* KLD_MODULE */
 373
 374 ATOMIC_ASM(set,      char,  "orb %b1,%0",  "iq",  v);
 375 ATOMIC_ASM(clear,    char,  "andb %b1,%0", "iq", ~v);
 376 ATOMIC_ASM(add,      char,  "addb %b1,%0", "iq",  v);
 377 ATOMIC_ASM(subtract, char,  "subb %b1,%0", "iq",  v);
 378
 379 ATOMIC_ASM(set,      short, "orw %w1,%0",  "ir",  v);
 380 ATOMIC_ASM(clear,    short, "andw %w1,%0", "ir", ~v);
 381 ATOMIC_ASM(add,      short, "addw %w1,%0", "ir",  v);
 382 ATOMIC_ASM(subtract, short, "subw %w1,%0", "ir",  v);
 383
 384 ATOMIC_ASM(set,      int,   "orl %1,%0",   "ir",  v);
 385 ATOMIC_ASM(clear,    int,   "andl %1,%0",  "ir", ~v);
 386 ATOMIC_ASM(add,      int,   "addl %1,%0",  "ir",  v);
 387 ATOMIC_ASM(subtract, int,   "subl %1,%0",  "ir",  v);
 388
 389 ATOMIC_ASM(set,      long,  "orq %1,%0",   "ir",  v);
 390 ATOMIC_ASM(clear,    long,  "andq %1,%0",  "ir", ~v);
 391 ATOMIC_ASM(add,      long,  "addq %1,%0",  "ir",  v);
 392 ATOMIC_ASM(subtract, long,  "subq %1,%0",  "ir",  v);
 393
 394 ATOMIC_STORE_LOAD(char, "cmpxchgb %b0,%1", "xchgb %b1,%0");
 395 ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0");
 396 ATOMIC_STORE_LOAD(int,  "cmpxchgl %0,%1",  "xchgl %1,%0");
 397 ATOMIC_STORE_LOAD(long, "cmpxchgq %0,%1",  "xchgq %1,%0");
 398
 399 #undef ATOMIC_ASM
 400 #undef ATOMIC_STORE_LOAD
 401
 402 #define atomic_set_acq_char             atomic_set_char
 403 #define atomic_set_rel_char             atomic_set_char
 404 #define atomic_clear_acq_char           atomic_clear_char
 405 #define atomic_clear_rel_char           atomic_clear_char
 406 #define atomic_add_acq_char             atomic_add_char
 407 #define atomic_add_rel_char             atomic_add_char
 408 #define atomic_subtract_acq_char        atomic_subtract_char
 409 #define atomic_subtract_rel_char        atomic_subtract_char
 410
 411 #define atomic_set_acq_short            atomic_set_short
 412 #define atomic_set_rel_short            atomic_set_short
 413 #define atomic_clear_acq_short          atomic_clear_short
 414 #define atomic_clear_rel_short          atomic_clear_short
 415 #define atomic_add_acq_short            atomic_add_short
 416 #define atomic_add_rel_short            atomic_add_short
 417 #define atomic_subtract_acq_short       atomic_subtract_short
 418 #define atomic_subtract_rel_short       atomic_subtract_short
 419
 420 #define atomic_set_acq_int              atomic_set_int
 421 #define atomic_set_rel_int              atomic_set_int
 422 #define atomic_clear_acq_int            atomic_clear_int
 423 #define atomic_clear_rel_int            atomic_clear_int
 424 #define atomic_add_acq_int              atomic_add_int
 425 #define atomic_add_rel_int              atomic_add_int
 426 #define atomic_subtract_acq_int         atomic_subtract_int
 427 #define atomic_subtract_rel_int         atomic_subtract_int
 428 #define atomic_cmpset_acq_int           atomic_cmpset_int
 429 #define atomic_cmpset_rel_int           atomic_cmpset_int
 430
 431 #define atomic_set_acq_long             atomic_set_long
 432 #define atomic_set_rel_long             atomic_set_long
 433 #define atomic_clear_acq_long           atomic_clear_long
 434 #define atomic_clear_rel_long           atomic_clear_long
 435 #define atomic_add_acq_long             atomic_add_long
 436 #define atomic_add_rel_long             atomic_add_long
 437 #define atomic_subtract_acq_long        atomic_subtract_long
 438 #define atomic_subtract_rel_long        atomic_subtract_long
 439
 440 #define atomic_cmpset_acq_ptr           atomic_cmpset_ptr
 441 #define atomic_cmpset_rel_ptr           atomic_cmpset_ptr
 442
 443 #define atomic_set_8            atomic_set_char
 444 #define atomic_set_acq_8        atomic_set_acq_char
 445 #define atomic_set_rel_8        atomic_set_rel_char
 446 #define atomic_clear_8          atomic_clear_char
 447 #define atomic_clear_acq_8      atomic_clear_acq_char
 448 #define atomic_clear_rel_8      atomic_clear_rel_char
 449 #define atomic_add_8            atomic_add_char
 450 #define atomic_add_acq_8        atomic_add_acq_char
 451 #define atomic_add_rel_8        atomic_add_rel_char
 452 #define atomic_subtract_8       atomic_subtract_char
 453 #define atomic_subtract_acq_8   atomic_subtract_acq_char
 454 #define atomic_subtract_rel_8   atomic_subtract_rel_char
 455 #define atomic_load_acq_8       atomic_load_acq_char
 456 #define atomic_store_rel_8      atomic_store_rel_char
 457
 458 #define atomic_set_16           atomic_set_short
 459 #define atomic_set_acq_16       atomic_set_acq_short
 460 #define atomic_set_rel_16       atomic_set_rel_short
 461 #define atomic_clear_16         atomic_clear_short
 462 #define atomic_clear_acq_16     atomic_clear_acq_short
 463 #define atomic_clear_rel_16     atomic_clear_rel_short
 464 #define atomic_add_16           atomic_add_short
 465 #define atomic_add_acq_16       atomic_add_acq_short
 466 #define atomic_add_rel_16       atomic_add_rel_short
 467 #define atomic_subtract_16      atomic_subtract_short
 468 #define atomic_subtract_acq_16  atomic_subtract_acq_short
 469 #define atomic_subtract_rel_16  atomic_subtract_rel_short
 470 #define atomic_load_acq_16      atomic_load_acq_short
 471 #define atomic_store_rel_16     atomic_store_rel_short
 472
 473 #define atomic_set_32           atomic_set_int
 474 #define atomic_set_acq_32       atomic_set_acq_int
 475 #define atomic_set_rel_32       atomic_set_rel_int
 476 #define atomic_clear_32         atomic_clear_int
 477 #define atomic_clear_acq_32     atomic_clear_acq_int
 478 #define atomic_clear_rel_32     atomic_clear_rel_int
 479 #define atomic_add_32           atomic_add_int
 480 #define atomic_add_acq_32       atomic_add_acq_int
 481 #define atomic_add_rel_32       atomic_add_rel_int
 482 #define atomic_subtract_32      atomic_subtract_int
 483 #define atomic_subtract_acq_32  atomic_subtract_acq_int
 484 #define atomic_subtract_rel_32  atomic_subtract_rel_int
 485 #define atomic_load_acq_32      atomic_load_acq_int
 486 #define atomic_store_rel_32     atomic_store_rel_int
 487 #define atomic_cmpset_32        atomic_cmpset_int
 488 #define atomic_cmpset_acq_32    atomic_cmpset_acq_int
 489 #define atomic_cmpset_rel_32    atomic_cmpset_rel_int
 490 #define atomic_readandclear_32  atomic_readandclear_int
 491
 492 #if !defined(WANT_FUNCTIONS)
 493 static __inline int
 494 atomic_cmpset_ptr(volatile void *dst, void *exp, void *src)
 495 {
 496
 497         return (atomic_cmpset_long((volatile u_long *)dst,
 498             (u_long)exp, (u_long)src));
 499 }
 500
 501 static __inline void *
 502 atomic_load_acq_ptr(volatile void *p)
 503 {
 504         /*
 505          * The apparently-bogus cast to intptr_t in the following is to
 506          * avoid a warning from "gcc -Wbad-function-cast".
 507          */
 508         return ((void *)(intptr_t)atomic_load_acq_long((volatile u_long *)p));
 509 }
 510
 511 static __inline void
 512 atomic_store_rel_ptr(volatile void *p, void *v)
 513 {
 514         atomic_store_rel_long((volatile u_long *)p, (u_long)v);
 515 }
 516
 517 #define ATOMIC_PTR(NAME)                                \
 518 static __inline void                                    \
 519 atomic_##NAME##_ptr(volatile void *p, uintptr_t v)      \
 520 {                                                       \
 521         atomic_##NAME##_long((volatile u_long *)p, v);  \
 522 }                                                       \
 523                                                         \
 524 static __inline void                                    \
 525 atomic_##NAME##_acq_ptr(volatile void *p, uintptr_t v)  \
 526 {                                                       \
 527         atomic_##NAME##_acq_long((volatile u_long *)p, v);\
 528 }                                                       \
 529                                                         \
 530 static __inline void                                    \
 531 atomic_##NAME##_rel_ptr(volatile void *p, uintptr_t v)  \
 532 {                                                       \
 533         atomic_##NAME##_rel_long((volatile u_long *)p, v);\
 534 }
 535
 536 ATOMIC_PTR(set)
 537 ATOMIC_PTR(clear)
 538 ATOMIC_PTR(add)
 539 ATOMIC_PTR(subtract)
 540
 541 #undef ATOMIC_PTR
 542
 543 #if defined(__GNUC__)
 544
 545 static __inline u_int
 546 atomic_readandclear_int(volatile u_int *addr)
 547 {
 548         u_int result;
 549
 550         __asm __volatile (
 551         "       xorl    %0,%0 ;         "
 552         "       xchgl   %1,%0 ;         "
 553         "# atomic_readandclear_int"
 554         : "=&r" (result)                /* 0 (result) */
 555         : "m" (*addr));                 /* 1 (addr) */
 556
 557         return (result);
 558 }
 559
 560 static __inline u_long
 561 atomic_readandclear_long(volatile u_long *addr)
 562 {
 563         u_long result;
 564
 565         __asm __volatile (
 566         "       xorq    %0,%0 ;         "
 567         "       xchgq   %1,%0 ;         "
 568         "# atomic_readandclear_int"
 569         : "=&r" (result)                /* 0 (result) */
 570         : "m" (*addr));                 /* 1 (addr) */
 571
 572         return (result);
 573 }
 574
 575 #else /* !defined(__GNUC__) */
 576
 577 extern u_long   atomic_readandclear_long(volatile u_long *);
 578 extern u_int    atomic_readandclear_int(volatile u_int *);
 579
 580 #endif /* defined(__GNUC__) */
 581
 582 #endif  /* !defined(WANT_FUNCTIONS) */
 583 #endif /* ! _CPU_ATOMIC_H_ */