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3 * Copyright (c) 2013-2016 Avago Technologies
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30 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
32 * $FreeBSD: head/sys/dev/mpr/mpi/mpi2_ra.h 299263 2016-05-09 16:12:32Z slm $
36 * Copyright (c) 2012-2015 LSI Corporation.
37 * Copyright (c) 2013-2016 Avago Technologies
38 * All rights reserved.
42 * Title: MPI RAID Accelerator messages and structures
43 * Creation Date: April 13, 2009
45 * mpi2_ra.h Version: 02.00.01
50 * Date Version Description
51 * -------- -------- ------------------------------------------------------
52 * 05-06-09 02.00.00 Initial version.
53 * 11-18-14 02.00.01 Updated copyright information.
54 * --------------------------------------------------------------------------
60 /* generic structure for RAID Accelerator Control Block */
61 typedef struct _MPI2_RAID_ACCELERATOR_CONTROL_BLOCK
63 U32 Reserved[8]; /* 0x00 */
64 U32 RaidAcceleratorCDB[1]; /* 0x20 */
65 } MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
66 MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
67 Mpi2RAIDAcceleratorControlBlock_t,
68 MPI2_POINTER pMpi2RAIDAcceleratorControlBlock_t;
71 /******************************************************************************
73 * RAID Accelerator Messages
75 *******************************************************************************/
77 /* RAID Accelerator Request Message */
78 typedef struct _MPI2_RAID_ACCELERATOR_REQUEST
80 U16 Reserved0; /* 0x00 */
81 U8 ChainOffset; /* 0x02 */
82 U8 Function; /* 0x03 */
83 U16 Reserved1; /* 0x04 */
84 U8 Reserved2; /* 0x06 */
85 U8 MsgFlags; /* 0x07 */
88 U16 Reserved3; /* 0x0A */
89 U64 RaidAcceleratorControlBlockAddress; /* 0x0C */
90 U8 DmaEngineNumber; /* 0x14 */
91 U8 Reserved4; /* 0x15 */
92 U16 Reserved5; /* 0x16 */
93 U32 Reserved6; /* 0x18 */
94 U32 Reserved7; /* 0x1C */
95 U32 Reserved8; /* 0x20 */
96 } MPI2_RAID_ACCELERATOR_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REQUEST,
97 Mpi2RAIDAcceleratorRequest_t, MPI2_POINTER pMpi2RAIDAcceleratorRequest_t;
100 /* RAID Accelerator Error Reply Message */
101 typedef struct _MPI2_RAID_ACCELERATOR_REPLY
103 U16 Reserved0; /* 0x00 */
104 U8 MsgLength; /* 0x02 */
105 U8 Function; /* 0x03 */
106 U16 Reserved1; /* 0x04 */
107 U8 Reserved2; /* 0x06 */
108 U8 MsgFlags; /* 0x07 */
111 U16 Reserved3; /* 0x0A */
112 U16 Reserved4; /* 0x0C */
113 U16 IOCStatus; /* 0x0E */
114 U32 IOCLogInfo; /* 0x10 */
115 U32 ProductSpecificData[3]; /* 0x14 */
116 } MPI2_RAID_ACCELERATOR_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REPLY,
117 Mpi2RAIDAcceleratorReply_t, MPI2_POINTER pMpi2RAIDAcceleratorReply_t;