1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996,
3 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This is the loop optimization pass of the compiler.
24 It finds invariant computations within loops and moves them
25 to the beginning of the loop. Then it identifies basic and
26 general induction variables. Strength reduction is applied to the general
27 induction variables, and induction variable elimination is applied to
28 the basic induction variables.
30 It also finds cases where
31 a register is set within the loop by zero-extending a narrower value
32 and changes these to zero the entire register once before the loop
33 and merely copy the low part within the loop.
35 Most of the complexity is in heuristics to decide when it is worth
36 while to do these things. */
43 #include "insn-config.h"
44 #include "insn-flags.h"
46 #include "hard-reg-set.h"
54 /* Vector mapping INSN_UIDs to luids.
55 The luids are like uids but increase monotonically always.
56 We use them to see whether a jump comes from outside a given loop. */
60 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
61 number the insn is contained in. */
65 /* 1 + largest uid of any insn. */
69 /* 1 + luid of last insn. */
73 /* Number of loops detected in current function. Used as index to the
76 static int max_loop_num;
78 /* Indexed by loop number, contains the first and last insn of each loop. */
80 static rtx *loop_number_loop_starts, *loop_number_loop_ends;
82 /* Likewise for the continue insn */
83 static rtx *loop_number_loop_cont;
85 /* The first code_label that is reached in every loop iteration.
86 0 when not computed yet, initially const0_rtx if a jump couldn't be
88 Also set to 0 when there is no such label before the NOTE_INSN_LOOP_CONT
89 of this loop, or in verify_dominator, if a jump couldn't be followed. */
90 static rtx *loop_number_cont_dominator;
92 /* For each loop, gives the containing loop number, -1 if none. */
96 #ifdef HAVE_decrement_and_branch_on_count
97 /* Records whether resource in use by inner loop. */
99 int *loop_used_count_register;
100 #endif /* HAVE_decrement_and_branch_on_count */
102 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
103 really a loop (an insn outside the loop branches into it). */
105 static char *loop_invalid;
107 /* Indexed by loop number, links together all LABEL_REFs which refer to
108 code labels outside the loop. Used by routines that need to know all
109 loop exits, such as final_biv_value and final_giv_value.
111 This does not include loop exits due to return instructions. This is
112 because all bivs and givs are pseudos, and hence must be dead after a
113 return, so the presense of a return does not affect any of the
114 optimizations that use this info. It is simpler to just not include return
115 instructions on this list. */
117 rtx *loop_number_exit_labels;
119 /* Indexed by loop number, counts the number of LABEL_REFs on
120 loop_number_exit_labels for this loop and all loops nested inside it. */
122 int *loop_number_exit_count;
124 /* Nonzero if there is a subroutine call in the current loop. */
126 static int loop_has_call;
128 /* Nonzero if there is a volatile memory reference in the current
131 static int loop_has_volatile;
133 /* Nonzero if there is a tablejump in the current loop. */
135 static int loop_has_tablejump;
137 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
138 current loop. A continue statement will generate a branch to
139 NEXT_INSN (loop_continue). */
141 static rtx loop_continue;
143 /* Indexed by register number, contains the number of times the reg
144 is set during the loop being scanned.
145 During code motion, a negative value indicates a reg that has been
146 made a candidate; in particular -2 means that it is an candidate that
147 we know is equal to a constant and -1 means that it is an candidate
148 not known equal to a constant.
149 After code motion, regs moved have 0 (which is accurate now)
150 while the failed candidates have the original number of times set.
152 Therefore, at all times, == 0 indicates an invariant register;
153 < 0 a conditionally invariant one. */
155 static varray_type set_in_loop;
157 /* Original value of set_in_loop; same except that this value
158 is not set negative for a reg whose sets have been made candidates
159 and not set to 0 for a reg that is moved. */
161 static varray_type n_times_set;
163 /* Index by register number, 1 indicates that the register
164 cannot be moved or strength reduced. */
166 static varray_type may_not_optimize;
168 /* Contains the insn in which a register was used if it was used
169 exactly once; contains const0_rtx if it was used more than once. */
171 static varray_type reg_single_usage;
173 /* Nonzero means reg N has already been moved out of one loop.
174 This reduces the desire to move it out of another. */
176 static char *moved_once;
178 /* List of MEMs that are stored in this loop. */
180 static rtx loop_store_mems;
182 /* The insn where the first of these was found. */
183 static rtx first_loop_store_insn;
185 typedef struct loop_mem_info {
186 rtx mem; /* The MEM itself. */
187 rtx reg; /* Corresponding pseudo, if any. */
188 int optimize; /* Nonzero if we can optimize access to this MEM. */
191 /* Array of MEMs that are used (read or written) in this loop, but
192 cannot be aliased by anything in this loop, except perhaps
193 themselves. In other words, if loop_mems[i] is altered during the
194 loop, it is altered by an expression that is rtx_equal_p to it. */
196 static loop_mem_info *loop_mems;
198 /* The index of the next available slot in LOOP_MEMS. */
200 static int loop_mems_idx;
202 /* The number of elements allocated in LOOP_MEMs. */
204 static int loop_mems_allocated;
206 /* Nonzero if we don't know what MEMs were changed in the current loop.
207 This happens if the loop contains a call (in which case `loop_has_call'
208 will also be set) or if we store into more than NUM_STORES MEMs. */
210 static int unknown_address_altered;
212 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
213 static int num_movables;
215 /* Count of memory write instructions discovered in the loop. */
216 static int num_mem_sets;
218 /* Number of loops contained within the current one, including itself. */
219 static int loops_enclosed;
221 /* Bound on pseudo register number before loop optimization.
222 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
223 int max_reg_before_loop;
225 /* This obstack is used in product_cheap_p to allocate its rtl. It
226 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
227 If we used the same obstack that it did, we would be deallocating
230 static struct obstack temp_obstack;
232 /* This is where the pointer to the obstack being used for RTL is stored. */
234 extern struct obstack *rtl_obstack;
236 #define obstack_chunk_alloc xmalloc
237 #define obstack_chunk_free free
239 /* During the analysis of a loop, a chain of `struct movable's
240 is made to record all the movable insns found.
241 Then the entire chain can be scanned to decide which to move. */
245 rtx insn; /* A movable insn */
246 rtx set_src; /* The expression this reg is set from. */
247 rtx set_dest; /* The destination of this SET. */
248 rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST
249 of any registers used within the LIBCALL. */
250 int consec; /* Number of consecutive following insns
251 that must be moved with this one. */
252 int regno; /* The register it sets */
253 short lifetime; /* lifetime of that register;
254 may be adjusted when matching movables
255 that load the same value are found. */
256 short savings; /* Number of insns we can move for this reg,
257 including other movables that force this
258 or match this one. */
259 unsigned int cond : 1; /* 1 if only conditionally movable */
260 unsigned int force : 1; /* 1 means MUST move this insn */
261 unsigned int global : 1; /* 1 means reg is live outside this loop */
262 /* If PARTIAL is 1, GLOBAL means something different:
263 that the reg is live outside the range from where it is set
264 to the following label. */
265 unsigned int done : 1; /* 1 inhibits further processing of this */
267 unsigned int partial : 1; /* 1 means this reg is used for zero-extending.
268 In particular, moving it does not make it
270 unsigned int move_insn : 1; /* 1 means that we call emit_move_insn to
271 load SRC, rather than copying INSN. */
272 unsigned int move_insn_first:1;/* Same as above, if this is necessary for the
273 first insn of a consecutive sets group. */
274 unsigned int is_equiv : 1; /* 1 means a REG_EQUIV is present on INSN. */
275 enum machine_mode savemode; /* Nonzero means it is a mode for a low part
276 that we should avoid changing when clearing
277 the rest of the reg. */
278 struct movable *match; /* First entry for same value */
279 struct movable *forces; /* An insn that must be moved if this is */
280 struct movable *next;
283 static struct movable *the_movables;
285 FILE *loop_dump_stream;
287 /* For communicating return values from note_set_pseudo_multiple_uses. */
288 static int note_set_pseudo_multiple_uses_retval;
290 /* Forward declarations. */
292 static void verify_dominator PROTO((int));
293 static void find_and_verify_loops PROTO((rtx));
294 static void mark_loop_jump PROTO((rtx, int));
295 static void prescan_loop PROTO((rtx, rtx));
296 static int reg_in_basic_block_p PROTO((rtx, rtx));
297 static int consec_sets_invariant_p PROTO((rtx, int, rtx));
298 static int labels_in_range_p PROTO((rtx, int));
299 static void count_one_set PROTO((rtx, rtx, varray_type, rtx *));
301 static void count_loop_regs_set PROTO((rtx, rtx, varray_type, varray_type,
303 static void note_addr_stored PROTO((rtx, rtx));
304 static void note_set_pseudo_multiple_uses PROTO((rtx, rtx));
305 static int loop_reg_used_before_p PROTO((rtx, rtx, rtx, rtx, rtx));
306 static void scan_loop PROTO((rtx, rtx, rtx, int, int));
308 static void replace_call_address PROTO((rtx, rtx, rtx));
310 static rtx skip_consec_insns PROTO((rtx, int));
311 static int libcall_benefit PROTO((rtx));
312 static void ignore_some_movables PROTO((struct movable *));
313 static void force_movables PROTO((struct movable *));
314 static void combine_movables PROTO((struct movable *, int));
315 static int regs_match_p PROTO((rtx, rtx, struct movable *));
316 static int rtx_equal_for_loop_p PROTO((rtx, rtx, struct movable *));
317 static void add_label_notes PROTO((rtx, rtx));
318 static void move_movables PROTO((struct movable *, int, int, rtx, rtx, int));
319 static int count_nonfixed_reads PROTO((rtx));
320 static void strength_reduce PROTO((rtx, rtx, rtx, int, rtx, rtx, rtx, int, int));
321 static void find_single_use_in_loop PROTO((rtx, rtx, varray_type));
322 static int valid_initial_value_p PROTO((rtx, rtx, int, rtx));
323 static void find_mem_givs PROTO((rtx, rtx, int, rtx, rtx));
324 static void record_biv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx *, int, int));
325 static void check_final_value PROTO((struct induction *, rtx, rtx,
326 unsigned HOST_WIDE_INT));
327 static void record_giv PROTO((struct induction *, rtx, rtx, rtx, rtx, rtx, int, enum g_types, int, rtx *, rtx, rtx));
328 static void update_giv_derive PROTO((rtx));
329 static int basic_induction_var PROTO((rtx, enum machine_mode, rtx, rtx, rtx *, rtx *, rtx **));
330 static rtx simplify_giv_expr PROTO((rtx, int *));
331 static int general_induction_var PROTO((rtx, rtx *, rtx *, rtx *, int, int *));
332 static int consec_sets_giv PROTO((int, rtx, rtx, rtx, rtx *, rtx *, rtx *));
333 static int check_dbra_loop PROTO((rtx, int, rtx, struct loop_info *));
334 static rtx express_from_1 PROTO((rtx, rtx, rtx));
335 static rtx combine_givs_p PROTO((struct induction *, struct induction *));
336 static void combine_givs PROTO((struct iv_class *));
337 struct recombine_givs_stats;
338 static int find_life_end PROTO((rtx, struct recombine_givs_stats *, rtx, rtx));
339 static void recombine_givs PROTO((struct iv_class *, rtx, rtx, int));
340 static int product_cheap_p PROTO((rtx, rtx));
341 static int maybe_eliminate_biv PROTO((struct iv_class *, rtx, rtx, int, int, int));
342 static int maybe_eliminate_biv_1 PROTO((rtx, rtx, struct iv_class *, int, rtx));
343 static int last_use_this_basic_block PROTO((rtx, rtx));
344 static void record_initial PROTO((rtx, rtx));
345 static void update_reg_last_use PROTO((rtx, rtx));
346 static rtx next_insn_in_loop PROTO((rtx, rtx, rtx, rtx));
347 static void load_mems_and_recount_loop_regs_set PROTO((rtx, rtx, rtx,
349 static void load_mems PROTO((rtx, rtx, rtx, rtx));
350 static int insert_loop_mem PROTO((rtx *, void *));
351 static int replace_loop_mem PROTO((rtx *, void *));
352 static int replace_label PROTO((rtx *, void *));
354 typedef struct rtx_and_int {
359 typedef struct rtx_pair {
364 /* Nonzero iff INSN is between START and END, inclusive. */
365 #define INSN_IN_RANGE_P(INSN, START, END) \
366 (INSN_UID (INSN) < max_uid_for_loop \
367 && INSN_LUID (INSN) >= INSN_LUID (START) \
368 && INSN_LUID (INSN) <= INSN_LUID (END))
370 #ifdef HAVE_decrement_and_branch_on_count
371 /* Test whether BCT applicable and safe. */
372 static void insert_bct PROTO((rtx, rtx, struct loop_info *));
374 /* Auxiliary function that inserts the BCT pattern into the loop. */
375 static void instrument_loop_bct PROTO((rtx, rtx, rtx));
376 #endif /* HAVE_decrement_and_branch_on_count */
378 /* Indirect_jump_in_function is computed once per function. */
379 int indirect_jump_in_function = 0;
380 static int indirect_jump_in_function_p PROTO((rtx));
382 static int compute_luids PROTO((rtx, rtx, int));
384 static int biv_elimination_giv_has_0_offset PROTO((struct induction *,
385 struct induction *, rtx));
387 /* Relative gain of eliminating various kinds of operations. */
390 static int shift_cost;
391 static int mult_cost;
394 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
395 copy the value of the strength reduced giv to its original register. */
396 static int copy_cost;
398 /* Cost of using a register, to normalize the benefits of a giv. */
399 static int reg_address_cost;
405 char *free_point = (char *) oballoc (1);
406 rtx reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
408 add_cost = rtx_cost (gen_rtx_PLUS (word_mode, reg, reg), SET);
411 reg_address_cost = ADDRESS_COST (reg);
413 reg_address_cost = rtx_cost (reg, MEM);
416 /* We multiply by 2 to reconcile the difference in scale between
417 these two ways of computing costs. Otherwise the cost of a copy
418 will be far less than the cost of an add. */
422 /* Free the objects we just allocated. */
425 /* Initialize the obstack used for rtl in product_cheap_p. */
426 gcc_obstack_init (&temp_obstack);
429 /* Compute the mapping from uids to luids.
430 LUIDs are numbers assigned to insns, like uids,
431 except that luids increase monotonically through the code.
432 Start at insn START and stop just before END. Assign LUIDs
433 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
435 compute_luids (start, end, prev_luid)
442 for (insn = start, i = prev_luid; insn != end; insn = NEXT_INSN (insn))
444 if (INSN_UID (insn) >= max_uid_for_loop)
446 /* Don't assign luids to line-number NOTEs, so that the distance in
447 luids between two insns is not affected by -g. */
448 if (GET_CODE (insn) != NOTE
449 || NOTE_LINE_NUMBER (insn) <= 0)
450 uid_luid[INSN_UID (insn)] = ++i;
452 /* Give a line number note the same luid as preceding insn. */
453 uid_luid[INSN_UID (insn)] = i;
458 /* Entry point of this file. Perform loop optimization
459 on the current function. F is the first insn of the function
460 and DUMPFILE is a stream for output of a trace of actions taken
461 (or 0 if none should be output). */
464 loop_optimize (f, dumpfile, unroll_p, bct_p)
465 /* f is the first instruction of a chain of insns for one function */
473 loop_dump_stream = dumpfile;
475 init_recog_no_volatile ();
477 max_reg_before_loop = max_reg_num ();
479 moved_once = (char *) alloca (max_reg_before_loop);
480 bzero (moved_once, max_reg_before_loop);
484 /* Count the number of loops. */
487 for (insn = f; insn; insn = NEXT_INSN (insn))
489 if (GET_CODE (insn) == NOTE
490 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
494 /* Don't waste time if no loops. */
495 if (max_loop_num == 0)
498 /* Get size to use for tables indexed by uids.
499 Leave some space for labels allocated by find_and_verify_loops. */
500 max_uid_for_loop = get_max_uid () + 1 + max_loop_num * 32;
502 uid_luid = (int *) alloca (max_uid_for_loop * sizeof (int));
503 uid_loop_num = (int *) alloca (max_uid_for_loop * sizeof (int));
505 bzero ((char *) uid_luid, max_uid_for_loop * sizeof (int));
506 bzero ((char *) uid_loop_num, max_uid_for_loop * sizeof (int));
508 /* Allocate tables for recording each loop. We set each entry, so they need
510 loop_number_loop_starts = (rtx *) alloca (max_loop_num * sizeof (rtx));
511 loop_number_loop_ends = (rtx *) alloca (max_loop_num * sizeof (rtx));
512 loop_number_loop_cont = (rtx *) alloca (max_loop_num * sizeof (rtx));
513 loop_number_cont_dominator = (rtx *) alloca (max_loop_num * sizeof (rtx));
514 loop_outer_loop = (int *) alloca (max_loop_num * sizeof (int));
515 loop_invalid = (char *) alloca (max_loop_num * sizeof (char));
516 loop_number_exit_labels = (rtx *) alloca (max_loop_num * sizeof (rtx));
517 loop_number_exit_count = (int *) alloca (max_loop_num * sizeof (int));
519 #ifdef HAVE_decrement_and_branch_on_count
520 /* Allocate for BCT optimization */
521 loop_used_count_register = (int *) alloca (max_loop_num * sizeof (int));
522 bzero ((char *) loop_used_count_register, max_loop_num * sizeof (int));
523 #endif /* HAVE_decrement_and_branch_on_count */
525 /* Find and process each loop.
526 First, find them, and record them in order of their beginnings. */
527 find_and_verify_loops (f);
529 /* Now find all register lifetimes. This must be done after
530 find_and_verify_loops, because it might reorder the insns in the
532 reg_scan (f, max_reg_num (), 1);
534 /* This must occur after reg_scan so that registers created by gcse
535 will have entries in the register tables.
537 We could have added a call to reg_scan after gcse_main in toplev.c,
538 but moving this call to init_alias_analysis is more efficient. */
539 init_alias_analysis ();
541 /* See if we went too far. Note that get_max_uid already returns
542 one more that the maximum uid of all insn. */
543 if (get_max_uid () > max_uid_for_loop)
545 /* Now reset it to the actual size we need. See above. */
546 max_uid_for_loop = get_max_uid ();
548 /* find_and_verify_loops has already called compute_luids, but it might
549 have rearranged code afterwards, so we need to recompute the luids now. */
550 max_luid = compute_luids (f, NULL_RTX, 0);
552 /* Don't leave gaps in uid_luid for insns that have been
553 deleted. It is possible that the first or last insn
554 using some register has been deleted by cross-jumping.
555 Make sure that uid_luid for that former insn's uid
556 points to the general area where that insn used to be. */
557 for (i = 0; i < max_uid_for_loop; i++)
559 uid_luid[0] = uid_luid[i];
560 if (uid_luid[0] != 0)
563 for (i = 0; i < max_uid_for_loop; i++)
564 if (uid_luid[i] == 0)
565 uid_luid[i] = uid_luid[i - 1];
567 /* Create a mapping from loops to BLOCK tree nodes. */
568 if (unroll_p && write_symbols != NO_DEBUG)
569 find_loop_tree_blocks ();
571 /* Determine if the function has indirect jump. On some systems
572 this prevents low overhead loop instructions from being used. */
573 indirect_jump_in_function = indirect_jump_in_function_p (f);
575 /* Now scan the loops, last ones first, since this means inner ones are done
576 before outer ones. */
577 for (i = max_loop_num-1; i >= 0; i--)
578 if (! loop_invalid[i] && loop_number_loop_ends[i])
579 scan_loop (loop_number_loop_starts[i], loop_number_loop_ends[i],
580 loop_number_loop_cont[i], unroll_p, bct_p);
582 /* If debugging and unrolling loops, we must replicate the tree nodes
583 corresponding to the blocks inside the loop, so that the original one
584 to one mapping will remain. */
585 if (unroll_p && write_symbols != NO_DEBUG)
586 unroll_block_trees ();
588 end_alias_analysis ();
591 /* Returns the next insn, in execution order, after INSN. START and
592 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
593 respectively. LOOP_TOP, if non-NULL, is the top of the loop in the
594 insn-stream; it is used with loops that are entered near the
598 next_insn_in_loop (insn, start, end, loop_top)
604 insn = NEXT_INSN (insn);
609 /* Go to the top of the loop, and continue there. */
623 /* Optimize one loop whose start is LOOP_START and end is END.
624 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
626 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
628 /* ??? Could also move memory writes out of loops if the destination address
629 is invariant, the source is invariant, the memory write is not volatile,
630 and if we can prove that no read inside the loop can read this address
631 before the write occurs. If there is a read of this address after the
632 write, then we can also mark the memory read as invariant. */
635 scan_loop (loop_start, end, loop_cont, unroll_p, bct_p)
636 rtx loop_start, end, loop_cont;
641 /* 1 if we are scanning insns that could be executed zero times. */
643 /* 1 if we are scanning insns that might never be executed
644 due to a subroutine call which might exit before they are reached. */
646 /* For a rotated loop that is entered near the bottom,
647 this is the label at the top. Otherwise it is zero. */
649 /* Jump insn that enters the loop, or 0 if control drops in. */
650 rtx loop_entry_jump = 0;
651 /* Place in the loop where control enters. */
653 /* Number of insns in the loop. */
658 /* The SET from an insn, if it is the only SET in the insn. */
660 /* Chain describing insns movable in current loop. */
661 struct movable *movables = 0;
662 /* Last element in `movables' -- so we can add elements at the end. */
663 struct movable *last_movable = 0;
664 /* Ratio of extra register life span we can justify
665 for saving an instruction. More if loop doesn't call subroutines
666 since in that case saving an insn makes more difference
667 and more registers are available. */
669 /* Nonzero if we are scanning instructions in a sub-loop. */
673 /* Determine whether this loop starts with a jump down to a test at
674 the end. This will occur for a small number of loops with a test
675 that is too complex to duplicate in front of the loop.
677 We search for the first insn or label in the loop, skipping NOTEs.
678 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
679 (because we might have a loop executed only once that contains a
680 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
681 (in case we have a degenerate loop).
683 Note that if we mistakenly think that a loop is entered at the top
684 when, in fact, it is entered at the exit test, the only effect will be
685 slightly poorer optimization. Making the opposite error can generate
686 incorrect code. Since very few loops now start with a jump to the
687 exit test, the code here to detect that case is very conservative. */
689 for (p = NEXT_INSN (loop_start);
691 && GET_CODE (p) != CODE_LABEL && GET_RTX_CLASS (GET_CODE (p)) != 'i'
692 && (GET_CODE (p) != NOTE
693 || (NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_BEG
694 && NOTE_LINE_NUMBER (p) != NOTE_INSN_LOOP_END));
700 /* Set up variables describing this loop. */
701 prescan_loop (loop_start, end);
702 threshold = (loop_has_call ? 1 : 2) * (1 + n_non_fixed_regs);
704 /* If loop has a jump before the first label,
705 the true entry is the target of that jump.
706 Start scan from there.
707 But record in LOOP_TOP the place where the end-test jumps
708 back to so we can scan that after the end of the loop. */
709 if (GET_CODE (p) == JUMP_INSN)
713 /* Loop entry must be unconditional jump (and not a RETURN) */
715 && JUMP_LABEL (p) != 0
716 /* Check to see whether the jump actually
717 jumps out of the loop (meaning it's no loop).
718 This case can happen for things like
719 do {..} while (0). If this label was generated previously
720 by loop, we can't tell anything about it and have to reject
722 && INSN_IN_RANGE_P (JUMP_LABEL (p), loop_start, end))
724 loop_top = next_label (scan_start);
725 scan_start = JUMP_LABEL (p);
729 /* If SCAN_START was an insn created by loop, we don't know its luid
730 as required by loop_reg_used_before_p. So skip such loops. (This
731 test may never be true, but it's best to play it safe.)
733 Also, skip loops where we do not start scanning at a label. This
734 test also rejects loops starting with a JUMP_INSN that failed the
737 if (INSN_UID (scan_start) >= max_uid_for_loop
738 || GET_CODE (scan_start) != CODE_LABEL)
740 if (loop_dump_stream)
741 fprintf (loop_dump_stream, "\nLoop from %d to %d is phony.\n\n",
742 INSN_UID (loop_start), INSN_UID (end));
746 /* Count number of times each reg is set during this loop.
747 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
748 the setting of register I. Set VARRAY_RTX (reg_single_usage, I). */
750 /* Allocate extra space for REGS that might be created by
751 load_mems. We allocate a little extra slop as well, in the hopes
752 that even after the moving of movables creates some new registers
753 we won't have to reallocate these arrays. However, we do grow
754 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
755 nregs = max_reg_num () + loop_mems_idx + 16;
756 VARRAY_INT_INIT (set_in_loop, nregs, "set_in_loop");
757 VARRAY_INT_INIT (n_times_set, nregs, "n_times_set");
758 VARRAY_CHAR_INIT (may_not_optimize, nregs, "may_not_optimize");
759 VARRAY_RTX_INIT (reg_single_usage, nregs, "reg_single_usage");
761 count_loop_regs_set (loop_top ? loop_top : loop_start, end,
762 may_not_optimize, reg_single_usage, &insn_count, nregs);
764 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
766 VARRAY_CHAR (may_not_optimize, i) = 1;
767 VARRAY_INT (set_in_loop, i) = 1;
770 #ifdef AVOID_CCMODE_COPIES
771 /* Don't try to move insns which set CC registers if we should not
772 create CCmode register copies. */
773 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
774 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
775 VARRAY_CHAR (may_not_optimize, i) = 1;
778 bcopy ((char *) &set_in_loop->data,
779 (char *) &n_times_set->data, nregs * sizeof (int));
781 if (loop_dump_stream)
783 fprintf (loop_dump_stream, "\nLoop from %d to %d: %d real insns.\n",
784 INSN_UID (loop_start), INSN_UID (end), insn_count);
786 fprintf (loop_dump_stream, "Continue at insn %d.\n",
787 INSN_UID (loop_continue));
790 /* Scan through the loop finding insns that are safe to move.
791 Set set_in_loop negative for the reg being set, so that
792 this reg will be considered invariant for subsequent insns.
793 We consider whether subsequent insns use the reg
794 in deciding whether it is worth actually moving.
796 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
797 and therefore it is possible that the insns we are scanning
798 would never be executed. At such times, we must make sure
799 that it is safe to execute the insn once instead of zero times.
800 When MAYBE_NEVER is 0, all insns will be executed at least once
801 so that is not a problem. */
803 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
805 p = next_insn_in_loop (p, scan_start, end, loop_top))
807 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
808 && find_reg_note (p, REG_LIBCALL, NULL_RTX))
810 else if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
811 && find_reg_note (p, REG_RETVAL, NULL_RTX))
814 if (GET_CODE (p) == INSN
815 && (set = single_set (p))
816 && GET_CODE (SET_DEST (set)) == REG
817 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
822 rtx src = SET_SRC (set);
823 rtx dependencies = 0;
825 /* Figure out what to use as a source of this insn. If a REG_EQUIV
826 note is given or if a REG_EQUAL note with a constant operand is
827 specified, use it as the source and mark that we should move
828 this insn by calling emit_move_insn rather that duplicating the
831 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
833 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
835 src = XEXP (temp, 0), move_insn = 1;
838 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
839 if (temp && CONSTANT_P (XEXP (temp, 0)))
840 src = XEXP (temp, 0), move_insn = 1;
841 if (temp && find_reg_note (p, REG_RETVAL, NULL_RTX))
843 src = XEXP (temp, 0);
844 /* A libcall block can use regs that don't appear in
845 the equivalent expression. To move the libcall,
846 we must move those regs too. */
847 dependencies = libcall_other_reg (p, src);
851 /* Don't try to optimize a register that was made
852 by loop-optimization for an inner loop.
853 We don't know its life-span, so we can't compute the benefit. */
854 if (REGNO (SET_DEST (set)) >= max_reg_before_loop)
856 else if (/* The register is used in basic blocks other
857 than the one where it is set (meaning that
858 something after this point in the loop might
859 depend on its value before the set). */
860 ! reg_in_basic_block_p (p, SET_DEST (set))
861 /* And the set is not guaranteed to be executed one
862 the loop starts, or the value before the set is
863 needed before the set occurs...
865 ??? Note we have quadratic behaviour here, mitigated
866 by the fact that the previous test will often fail for
867 large loops. Rather than re-scanning the entire loop
868 each time for register usage, we should build tables
869 of the register usage and use them here instead. */
871 || loop_reg_used_before_p (set, p, loop_start,
873 /* It is unsafe to move the set.
875 This code used to consider it OK to move a set of a variable
876 which was not created by the user and not used in an exit test.
877 That behavior is incorrect and was removed. */
879 else if ((tem = invariant_p (src))
880 && (dependencies == 0
881 || (tem2 = invariant_p (dependencies)) != 0)
882 && (VARRAY_INT (set_in_loop,
883 REGNO (SET_DEST (set))) == 1
885 = consec_sets_invariant_p
887 VARRAY_INT (set_in_loop, REGNO (SET_DEST (set))),
889 /* If the insn can cause a trap (such as divide by zero),
890 can't move it unless it's guaranteed to be executed
891 once loop is entered. Even a function call might
892 prevent the trap insn from being reached
893 (since it might exit!) */
894 && ! ((maybe_never || call_passed)
895 && may_trap_p (src)))
897 register struct movable *m;
898 register int regno = REGNO (SET_DEST (set));
900 /* A potential lossage is where we have a case where two insns
901 can be combined as long as they are both in the loop, but
902 we move one of them outside the loop. For large loops,
903 this can lose. The most common case of this is the address
904 of a function being called.
906 Therefore, if this register is marked as being used exactly
907 once if we are in a loop with calls (a "large loop"), see if
908 we can replace the usage of this register with the source
909 of this SET. If we can, delete this insn.
911 Don't do this if P has a REG_RETVAL note or if we have
912 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
915 && VARRAY_RTX (reg_single_usage, regno) != 0
916 && VARRAY_RTX (reg_single_usage, regno) != const0_rtx
917 && REGNO_FIRST_UID (regno) == INSN_UID (p)
918 && (REGNO_LAST_UID (regno)
919 == INSN_UID (VARRAY_RTX (reg_single_usage, regno)))
920 && VARRAY_INT (set_in_loop, regno) == 1
921 && ! side_effects_p (SET_SRC (set))
922 && ! find_reg_note (p, REG_RETVAL, NULL_RTX)
923 && ! find_reg_note (p, REG_LABEL, NULL_RTX)
924 && (! SMALL_REGISTER_CLASSES
925 || (! (GET_CODE (SET_SRC (set)) == REG
926 && REGNO (SET_SRC (set)) < FIRST_PSEUDO_REGISTER)))
927 /* This test is not redundant; SET_SRC (set) might be
928 a call-clobbered register and the life of REGNO
929 might span a call. */
930 && ! modified_between_p (SET_SRC (set), p,
932 (reg_single_usage, regno))
933 && no_labels_between_p (p, VARRAY_RTX (reg_single_usage, regno))
934 && validate_replace_rtx (SET_DEST (set), SET_SRC (set),
936 (reg_single_usage, regno)))
938 /* Replace any usage in a REG_EQUAL note. Must copy the
939 new source, so that we don't get rtx sharing between the
940 SET_SOURCE and REG_NOTES of insn p. */
941 REG_NOTES (VARRAY_RTX (reg_single_usage, regno))
942 = replace_rtx (REG_NOTES (VARRAY_RTX
943 (reg_single_usage, regno)),
944 SET_DEST (set), copy_rtx (SET_SRC (set)));
947 NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED;
948 NOTE_SOURCE_FILE (p) = 0;
949 VARRAY_INT (set_in_loop, regno) = 0;
953 m = (struct movable *) alloca (sizeof (struct movable));
957 m->dependencies = dependencies;
958 m->set_dest = SET_DEST (set);
960 m->consec = VARRAY_INT (set_in_loop,
961 REGNO (SET_DEST (set))) - 1;
965 m->move_insn = move_insn;
966 m->move_insn_first = 0;
967 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
968 m->savemode = VOIDmode;
970 /* Set M->cond if either invariant_p or consec_sets_invariant_p
971 returned 2 (only conditionally invariant). */
972 m->cond = ((tem | tem1 | tem2) > 1);
973 m->global = (uid_luid[REGNO_LAST_UID (regno)] > INSN_LUID (end)
974 || uid_luid[REGNO_FIRST_UID (regno)] < INSN_LUID (loop_start));
976 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
977 - uid_luid[REGNO_FIRST_UID (regno)]);
978 m->savings = VARRAY_INT (n_times_set, regno);
979 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
980 m->savings += libcall_benefit (p);
981 VARRAY_INT (set_in_loop, regno) = move_insn ? -2 : -1;
982 /* Add M to the end of the chain MOVABLES. */
986 last_movable->next = m;
991 /* It is possible for the first instruction to have a
992 REG_EQUAL note but a non-invariant SET_SRC, so we must
993 remember the status of the first instruction in case
994 the last instruction doesn't have a REG_EQUAL note. */
995 m->move_insn_first = m->move_insn;
997 /* Skip this insn, not checking REG_LIBCALL notes. */
998 p = next_nonnote_insn (p);
999 /* Skip the consecutive insns, if there are any. */
1000 p = skip_consec_insns (p, m->consec);
1001 /* Back up to the last insn of the consecutive group. */
1002 p = prev_nonnote_insn (p);
1004 /* We must now reset m->move_insn, m->is_equiv, and possibly
1005 m->set_src to correspond to the effects of all the
1007 temp = find_reg_note (p, REG_EQUIV, NULL_RTX);
1009 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1012 temp = find_reg_note (p, REG_EQUAL, NULL_RTX);
1013 if (temp && CONSTANT_P (XEXP (temp, 0)))
1014 m->set_src = XEXP (temp, 0), m->move_insn = 1;
1019 m->is_equiv = (find_reg_note (p, REG_EQUIV, NULL_RTX) != 0);
1022 /* If this register is always set within a STRICT_LOW_PART
1023 or set to zero, then its high bytes are constant.
1024 So clear them outside the loop and within the loop
1025 just load the low bytes.
1026 We must check that the machine has an instruction to do so.
1027 Also, if the value loaded into the register
1028 depends on the same register, this cannot be done. */
1029 else if (SET_SRC (set) == const0_rtx
1030 && GET_CODE (NEXT_INSN (p)) == INSN
1031 && (set1 = single_set (NEXT_INSN (p)))
1032 && GET_CODE (set1) == SET
1033 && (GET_CODE (SET_DEST (set1)) == STRICT_LOW_PART)
1034 && (GET_CODE (XEXP (SET_DEST (set1), 0)) == SUBREG)
1035 && (SUBREG_REG (XEXP (SET_DEST (set1), 0))
1037 && !reg_mentioned_p (SET_DEST (set), SET_SRC (set1)))
1039 register int regno = REGNO (SET_DEST (set));
1040 if (VARRAY_INT (set_in_loop, regno) == 2)
1042 register struct movable *m;
1043 m = (struct movable *) alloca (sizeof (struct movable));
1046 m->set_dest = SET_DEST (set);
1047 m->dependencies = 0;
1053 m->move_insn_first = 0;
1055 /* If the insn may not be executed on some cycles,
1056 we can't clear the whole reg; clear just high part.
1057 Not even if the reg is used only within this loop.
1064 Clearing x before the inner loop could clobber a value
1065 being saved from the last time around the outer loop.
1066 However, if the reg is not used outside this loop
1067 and all uses of the register are in the same
1068 basic block as the store, there is no problem.
1070 If this insn was made by loop, we don't know its
1071 INSN_LUID and hence must make a conservative
1073 m->global = (INSN_UID (p) >= max_uid_for_loop
1074 || (uid_luid[REGNO_LAST_UID (regno)]
1076 || (uid_luid[REGNO_FIRST_UID (regno)]
1078 || (labels_in_range_p
1079 (p, uid_luid[REGNO_FIRST_UID (regno)])));
1080 if (maybe_never && m->global)
1081 m->savemode = GET_MODE (SET_SRC (set1));
1083 m->savemode = VOIDmode;
1087 m->lifetime = (uid_luid[REGNO_LAST_UID (regno)]
1088 - uid_luid[REGNO_FIRST_UID (regno)]);
1090 VARRAY_INT (set_in_loop, regno) = -1;
1091 /* Add M to the end of the chain MOVABLES. */
1095 last_movable->next = m;
1100 /* Past a call insn, we get to insns which might not be executed
1101 because the call might exit. This matters for insns that trap.
1102 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1103 so they don't count. */
1104 else if (GET_CODE (p) == CALL_INSN && ! in_libcall)
1106 /* Past a label or a jump, we get to insns for which we
1107 can't count on whether or how many times they will be
1108 executed during each iteration. Therefore, we can
1109 only move out sets of trivial variables
1110 (those not used after the loop). */
1111 /* Similar code appears twice in strength_reduce. */
1112 else if ((GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN)
1113 /* If we enter the loop in the middle, and scan around to the
1114 beginning, don't set maybe_never for that. This must be an
1115 unconditional jump, otherwise the code at the top of the
1116 loop might never be executed. Unconditional jumps are
1117 followed a by barrier then loop end. */
1118 && ! (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == loop_top
1119 && NEXT_INSN (NEXT_INSN (p)) == end
1120 && simplejump_p (p)))
1122 else if (GET_CODE (p) == NOTE)
1124 /* At the virtual top of a converted loop, insns are again known to
1125 be executed: logically, the loop begins here even though the exit
1126 code has been duplicated. */
1127 if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP && loop_depth == 0)
1128 maybe_never = call_passed = 0;
1129 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
1131 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
1136 /* If one movable subsumes another, ignore that other. */
1138 ignore_some_movables (movables);
1140 /* For each movable insn, see if the reg that it loads
1141 leads when it dies right into another conditionally movable insn.
1142 If so, record that the second insn "forces" the first one,
1143 since the second can be moved only if the first is. */
1145 force_movables (movables);
1147 /* See if there are multiple movable insns that load the same value.
1148 If there are, make all but the first point at the first one
1149 through the `match' field, and add the priorities of them
1150 all together as the priority of the first. */
1152 combine_movables (movables, nregs);
1154 /* Now consider each movable insn to decide whether it is worth moving.
1155 Store 0 in set_in_loop for each reg that is moved.
1157 Generally this increases code size, so do not move moveables when
1158 optimizing for code size. */
1160 if (! optimize_size)
1161 move_movables (movables, threshold,
1162 insn_count, loop_start, end, nregs);
1164 /* Now candidates that still are negative are those not moved.
1165 Change set_in_loop to indicate that those are not actually invariant. */
1166 for (i = 0; i < nregs; i++)
1167 if (VARRAY_INT (set_in_loop, i) < 0)
1168 VARRAY_INT (set_in_loop, i) = VARRAY_INT (n_times_set, i);
1170 /* Now that we've moved some things out of the loop, we might be able to
1171 hoist even more memory references. */
1172 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top,
1173 loop_start, &insn_count);
1175 if (flag_strength_reduce)
1177 the_movables = movables;
1178 strength_reduce (scan_start, end, loop_top,
1179 insn_count, loop_start, end, loop_cont, unroll_p, bct_p);
1182 VARRAY_FREE (reg_single_usage);
1183 VARRAY_FREE (set_in_loop);
1184 VARRAY_FREE (n_times_set);
1185 VARRAY_FREE (may_not_optimize);
1188 /* Add elements to *OUTPUT to record all the pseudo-regs
1189 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1192 record_excess_regs (in_this, not_in_this, output)
1193 rtx in_this, not_in_this;
1200 code = GET_CODE (in_this);
1214 if (REGNO (in_this) >= FIRST_PSEUDO_REGISTER
1215 && ! reg_mentioned_p (in_this, not_in_this))
1216 *output = gen_rtx_EXPR_LIST (VOIDmode, in_this, *output);
1223 fmt = GET_RTX_FORMAT (code);
1224 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1231 for (j = 0; j < XVECLEN (in_this, i); j++)
1232 record_excess_regs (XVECEXP (in_this, i, j), not_in_this, output);
1236 record_excess_regs (XEXP (in_this, i), not_in_this, output);
1242 /* Check what regs are referred to in the libcall block ending with INSN,
1243 aside from those mentioned in the equivalent value.
1244 If there are none, return 0.
1245 If there are one or more, return an EXPR_LIST containing all of them. */
1248 libcall_other_reg (insn, equiv)
1251 rtx note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
1252 rtx p = XEXP (note, 0);
1255 /* First, find all the regs used in the libcall block
1256 that are not mentioned as inputs to the result. */
1260 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
1261 || GET_CODE (p) == CALL_INSN)
1262 record_excess_regs (PATTERN (p), equiv, &output);
1269 /* Return 1 if all uses of REG
1270 are between INSN and the end of the basic block. */
1273 reg_in_basic_block_p (insn, reg)
1276 int regno = REGNO (reg);
1279 if (REGNO_FIRST_UID (regno) != INSN_UID (insn))
1282 /* Search this basic block for the already recorded last use of the reg. */
1283 for (p = insn; p; p = NEXT_INSN (p))
1285 switch (GET_CODE (p))
1292 /* Ordinary insn: if this is the last use, we win. */
1293 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1298 /* Jump insn: if this is the last use, we win. */
1299 if (REGNO_LAST_UID (regno) == INSN_UID (p))
1301 /* Otherwise, it's the end of the basic block, so we lose. */
1306 /* It's the end of the basic block, so we lose. */
1314 /* The "last use" doesn't follow the "first use"?? */
1318 /* Compute the benefit of eliminating the insns in the block whose
1319 last insn is LAST. This may be a group of insns used to compute a
1320 value directly or can contain a library call. */
1323 libcall_benefit (last)
1329 for (insn = XEXP (find_reg_note (last, REG_RETVAL, NULL_RTX), 0);
1330 insn != last; insn = NEXT_INSN (insn))
1332 if (GET_CODE (insn) == CALL_INSN)
1333 benefit += 10; /* Assume at least this many insns in a library
1335 else if (GET_CODE (insn) == INSN
1336 && GET_CODE (PATTERN (insn)) != USE
1337 && GET_CODE (PATTERN (insn)) != CLOBBER)
1344 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1347 skip_consec_insns (insn, count)
1351 for (; count > 0; count--)
1355 /* If first insn of libcall sequence, skip to end. */
1356 /* Do this at start of loop, since INSN is guaranteed to
1358 if (GET_CODE (insn) != NOTE
1359 && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
1360 insn = XEXP (temp, 0);
1362 do insn = NEXT_INSN (insn);
1363 while (GET_CODE (insn) == NOTE);
1369 /* Ignore any movable whose insn falls within a libcall
1370 which is part of another movable.
1371 We make use of the fact that the movable for the libcall value
1372 was made later and so appears later on the chain. */
1375 ignore_some_movables (movables)
1376 struct movable *movables;
1378 register struct movable *m, *m1;
1380 for (m = movables; m; m = m->next)
1382 /* Is this a movable for the value of a libcall? */
1383 rtx note = find_reg_note (m->insn, REG_RETVAL, NULL_RTX);
1387 /* Check for earlier movables inside that range,
1388 and mark them invalid. We cannot use LUIDs here because
1389 insns created by loop.c for prior loops don't have LUIDs.
1390 Rather than reject all such insns from movables, we just
1391 explicitly check each insn in the libcall (since invariant
1392 libcalls aren't that common). */
1393 for (insn = XEXP (note, 0); insn != m->insn; insn = NEXT_INSN (insn))
1394 for (m1 = movables; m1 != m; m1 = m1->next)
1395 if (m1->insn == insn)
1401 /* For each movable insn, see if the reg that it loads
1402 leads when it dies right into another conditionally movable insn.
1403 If so, record that the second insn "forces" the first one,
1404 since the second can be moved only if the first is. */
1407 force_movables (movables)
1408 struct movable *movables;
1410 register struct movable *m, *m1;
1411 for (m1 = movables; m1; m1 = m1->next)
1412 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1413 if (!m1->partial && !m1->done)
1415 int regno = m1->regno;
1416 for (m = m1->next; m; m = m->next)
1417 /* ??? Could this be a bug? What if CSE caused the
1418 register of M1 to be used after this insn?
1419 Since CSE does not update regno_last_uid,
1420 this insn M->insn might not be where it dies.
1421 But very likely this doesn't matter; what matters is
1422 that M's reg is computed from M1's reg. */
1423 if (INSN_UID (m->insn) == REGNO_LAST_UID (regno)
1426 if (m != 0 && m->set_src == m1->set_dest
1427 /* If m->consec, m->set_src isn't valid. */
1431 /* Increase the priority of the moving the first insn
1432 since it permits the second to be moved as well. */
1436 m1->lifetime += m->lifetime;
1437 m1->savings += m->savings;
1442 /* Find invariant expressions that are equal and can be combined into
1446 combine_movables (movables, nregs)
1447 struct movable *movables;
1450 register struct movable *m;
1451 char *matched_regs = (char *) alloca (nregs);
1452 enum machine_mode mode;
1454 /* Regs that are set more than once are not allowed to match
1455 or be matched. I'm no longer sure why not. */
1456 /* Perhaps testing m->consec_sets would be more appropriate here? */
1458 for (m = movables; m; m = m->next)
1459 if (m->match == 0 && VARRAY_INT (n_times_set, m->regno) == 1 && !m->partial)
1461 register struct movable *m1;
1462 int regno = m->regno;
1464 bzero (matched_regs, nregs);
1465 matched_regs[regno] = 1;
1467 /* We want later insns to match the first one. Don't make the first
1468 one match any later ones. So start this loop at m->next. */
1469 for (m1 = m->next; m1; m1 = m1->next)
1470 if (m != m1 && m1->match == 0 && VARRAY_INT (n_times_set, m1->regno) == 1
1471 /* A reg used outside the loop mustn't be eliminated. */
1473 /* A reg used for zero-extending mustn't be eliminated. */
1475 && (matched_regs[m1->regno]
1478 /* Can combine regs with different modes loaded from the
1479 same constant only if the modes are the same or
1480 if both are integer modes with M wider or the same
1481 width as M1. The check for integer is redundant, but
1482 safe, since the only case of differing destination
1483 modes with equal sources is when both sources are
1484 VOIDmode, i.e., CONST_INT.
1486 For 2.95, don't do this if the mode of M1 is Pmode.
1487 This prevents us from substituting SUBREGs for REGs
1488 in memory accesses; not all targets are prepared to
1489 handle this properly. */
1490 (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest)
1491 || (GET_MODE_CLASS (GET_MODE (m->set_dest)) == MODE_INT
1492 && GET_MODE_CLASS (GET_MODE (m1->set_dest)) == MODE_INT
1493 && GET_MODE (m1->set_dest) != Pmode
1494 && (GET_MODE_BITSIZE (GET_MODE (m->set_dest))
1495 >= GET_MODE_BITSIZE (GET_MODE (m1->set_dest)))))
1496 /* See if the source of M1 says it matches M. */
1497 && ((GET_CODE (m1->set_src) == REG
1498 && matched_regs[REGNO (m1->set_src)])
1499 || rtx_equal_for_loop_p (m->set_src, m1->set_src,
1501 && ((m->dependencies == m1->dependencies)
1502 || rtx_equal_p (m->dependencies, m1->dependencies)))
1504 m->lifetime += m1->lifetime;
1505 m->savings += m1->savings;
1508 matched_regs[m1->regno] = 1;
1512 /* Now combine the regs used for zero-extension.
1513 This can be done for those not marked `global'
1514 provided their lives don't overlap. */
1516 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1517 mode = GET_MODE_WIDER_MODE (mode))
1519 register struct movable *m0 = 0;
1521 /* Combine all the registers for extension from mode MODE.
1522 Don't combine any that are used outside this loop. */
1523 for (m = movables; m; m = m->next)
1524 if (m->partial && ! m->global
1525 && mode == GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m->insn)))))
1527 register struct movable *m1;
1528 int first = uid_luid[REGNO_FIRST_UID (m->regno)];
1529 int last = uid_luid[REGNO_LAST_UID (m->regno)];
1533 /* First one: don't check for overlap, just record it. */
1538 /* Make sure they extend to the same mode.
1539 (Almost always true.) */
1540 if (GET_MODE (m->set_dest) != GET_MODE (m0->set_dest))
1543 /* We already have one: check for overlap with those
1544 already combined together. */
1545 for (m1 = movables; m1 != m; m1 = m1->next)
1546 if (m1 == m0 || (m1->partial && m1->match == m0))
1547 if (! (uid_luid[REGNO_FIRST_UID (m1->regno)] > last
1548 || uid_luid[REGNO_LAST_UID (m1->regno)] < first))
1551 /* No overlap: we can combine this with the others. */
1552 m0->lifetime += m->lifetime;
1553 m0->savings += m->savings;
1562 /* Return 1 if regs X and Y will become the same if moved. */
1565 regs_match_p (x, y, movables)
1567 struct movable *movables;
1571 struct movable *mx, *my;
1573 for (mx = movables; mx; mx = mx->next)
1574 if (mx->regno == xn)
1577 for (my = movables; my; my = my->next)
1578 if (my->regno == yn)
1582 && ((mx->match == my->match && mx->match != 0)
1584 || mx == my->match));
1587 /* Return 1 if X and Y are identical-looking rtx's.
1588 This is the Lisp function EQUAL for rtx arguments.
1590 If two registers are matching movables or a movable register and an
1591 equivalent constant, consider them equal. */
1594 rtx_equal_for_loop_p (x, y, movables)
1596 struct movable *movables;
1600 register struct movable *m;
1601 register enum rtx_code code;
1606 if (x == 0 || y == 0)
1609 code = GET_CODE (x);
1611 /* If we have a register and a constant, they may sometimes be
1613 if (GET_CODE (x) == REG && VARRAY_INT (set_in_loop, REGNO (x)) == -2
1616 for (m = movables; m; m = m->next)
1617 if (m->move_insn && m->regno == REGNO (x)
1618 && rtx_equal_p (m->set_src, y))
1621 else if (GET_CODE (y) == REG && VARRAY_INT (set_in_loop, REGNO (y)) == -2
1624 for (m = movables; m; m = m->next)
1625 if (m->move_insn && m->regno == REGNO (y)
1626 && rtx_equal_p (m->set_src, x))
1630 /* Otherwise, rtx's of different codes cannot be equal. */
1631 if (code != GET_CODE (y))
1634 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1635 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1637 if (GET_MODE (x) != GET_MODE (y))
1640 /* These three types of rtx's can be compared nonrecursively. */
1642 return (REGNO (x) == REGNO (y) || regs_match_p (x, y, movables));
1644 if (code == LABEL_REF)
1645 return XEXP (x, 0) == XEXP (y, 0);
1646 if (code == SYMBOL_REF)
1647 return XSTR (x, 0) == XSTR (y, 0);
1649 /* Compare the elements. If any pair of corresponding elements
1650 fail to match, return 0 for the whole things. */
1652 fmt = GET_RTX_FORMAT (code);
1653 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1658 if (XWINT (x, i) != XWINT (y, i))
1663 if (XINT (x, i) != XINT (y, i))
1668 /* Two vectors must have the same length. */
1669 if (XVECLEN (x, i) != XVECLEN (y, i))
1672 /* And the corresponding elements must match. */
1673 for (j = 0; j < XVECLEN (x, i); j++)
1674 if (rtx_equal_for_loop_p (XVECEXP (x, i, j), XVECEXP (y, i, j), movables) == 0)
1679 if (rtx_equal_for_loop_p (XEXP (x, i), XEXP (y, i), movables) == 0)
1684 if (strcmp (XSTR (x, i), XSTR (y, i)))
1689 /* These are just backpointers, so they don't matter. */
1695 /* It is believed that rtx's at this level will never
1696 contain anything but integers and other rtx's,
1697 except for within LABEL_REFs and SYMBOL_REFs. */
1705 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1706 insns in INSNS which use thet reference. */
1709 add_label_notes (x, insns)
1713 enum rtx_code code = GET_CODE (x);
1718 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
1720 /* This code used to ignore labels that referred to dispatch tables to
1721 avoid flow generating (slighly) worse code.
1723 We no longer ignore such label references (see LABEL_REF handling in
1724 mark_jump_label for additional information). */
1725 for (insn = insns; insn; insn = NEXT_INSN (insn))
1726 if (reg_mentioned_p (XEXP (x, 0), insn))
1727 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
1731 fmt = GET_RTX_FORMAT (code);
1732 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1735 add_label_notes (XEXP (x, i), insns);
1736 else if (fmt[i] == 'E')
1737 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1738 add_label_notes (XVECEXP (x, i, j), insns);
1742 /* Scan MOVABLES, and move the insns that deserve to be moved.
1743 If two matching movables are combined, replace one reg with the
1744 other throughout. */
1747 move_movables (movables, threshold, insn_count, loop_start, end, nregs)
1748 struct movable *movables;
1756 register struct movable *m;
1758 /* Map of pseudo-register replacements to handle combining
1759 when we move several insns that load the same value
1760 into different pseudo-registers. */
1761 rtx *reg_map = (rtx *) alloca (nregs * sizeof (rtx));
1762 char *already_moved = (char *) alloca (nregs);
1764 bzero (already_moved, nregs);
1765 bzero ((char *) reg_map, nregs * sizeof (rtx));
1769 for (m = movables; m; m = m->next)
1771 /* Describe this movable insn. */
1773 if (loop_dump_stream)
1775 fprintf (loop_dump_stream, "Insn %d: regno %d (life %d), ",
1776 INSN_UID (m->insn), m->regno, m->lifetime);
1778 fprintf (loop_dump_stream, "consec %d, ", m->consec);
1780 fprintf (loop_dump_stream, "cond ");
1782 fprintf (loop_dump_stream, "force ");
1784 fprintf (loop_dump_stream, "global ");
1786 fprintf (loop_dump_stream, "done ");
1788 fprintf (loop_dump_stream, "move-insn ");
1790 fprintf (loop_dump_stream, "matches %d ",
1791 INSN_UID (m->match->insn));
1793 fprintf (loop_dump_stream, "forces %d ",
1794 INSN_UID (m->forces->insn));
1797 /* Count movables. Value used in heuristics in strength_reduce. */
1800 /* Ignore the insn if it's already done (it matched something else).
1801 Otherwise, see if it is now safe to move. */
1805 || (1 == invariant_p (m->set_src)
1806 && (m->dependencies == 0
1807 || 1 == invariant_p (m->dependencies))
1809 || 1 == consec_sets_invariant_p (m->set_dest,
1812 && (! m->forces || m->forces->done))
1816 int savings = m->savings;
1818 /* We have an insn that is safe to move.
1819 Compute its desirability. */
1824 if (loop_dump_stream)
1825 fprintf (loop_dump_stream, "savings %d ", savings);
1827 if (moved_once[regno] && loop_dump_stream)
1828 fprintf (loop_dump_stream, "halved since already moved ");
1830 /* An insn MUST be moved if we already moved something else
1831 which is safe only if this one is moved too: that is,
1832 if already_moved[REGNO] is nonzero. */
1834 /* An insn is desirable to move if the new lifetime of the
1835 register is no more than THRESHOLD times the old lifetime.
1836 If it's not desirable, it means the loop is so big
1837 that moving won't speed things up much,
1838 and it is liable to make register usage worse. */
1840 /* It is also desirable to move if it can be moved at no
1841 extra cost because something else was already moved. */
1843 if (already_moved[regno]
1844 || flag_move_all_movables
1845 || (threshold * savings * m->lifetime) >=
1846 (moved_once[regno] ? insn_count * 2 : insn_count)
1847 || (m->forces && m->forces->done
1848 && VARRAY_INT (n_times_set, m->forces->regno) == 1))
1851 register struct movable *m1;
1854 /* Now move the insns that set the reg. */
1856 if (m->partial && m->match)
1860 /* Find the end of this chain of matching regs.
1861 Thus, we load each reg in the chain from that one reg.
1862 And that reg is loaded with 0 directly,
1863 since it has ->match == 0. */
1864 for (m1 = m; m1->match; m1 = m1->match);
1865 newpat = gen_move_insn (SET_DEST (PATTERN (m->insn)),
1866 SET_DEST (PATTERN (m1->insn)));
1867 i1 = emit_insn_before (newpat, loop_start);
1869 /* Mark the moved, invariant reg as being allowed to
1870 share a hard reg with the other matching invariant. */
1871 REG_NOTES (i1) = REG_NOTES (m->insn);
1872 r1 = SET_DEST (PATTERN (m->insn));
1873 r2 = SET_DEST (PATTERN (m1->insn));
1875 = gen_rtx_EXPR_LIST (VOIDmode, r1,
1876 gen_rtx_EXPR_LIST (VOIDmode, r2,
1878 delete_insn (m->insn);
1883 if (loop_dump_stream)
1884 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1886 /* If we are to re-generate the item being moved with a
1887 new move insn, first delete what we have and then emit
1888 the move insn before the loop. */
1889 else if (m->move_insn)
1893 for (count = m->consec; count >= 0; count--)
1895 /* If this is the first insn of a library call sequence,
1897 if (GET_CODE (p) != NOTE
1898 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1901 /* If this is the last insn of a libcall sequence, then
1902 delete every insn in the sequence except the last.
1903 The last insn is handled in the normal manner. */
1904 if (GET_CODE (p) != NOTE
1905 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1907 temp = XEXP (temp, 0);
1909 temp = delete_insn (temp);
1913 p = delete_insn (p);
1915 /* simplify_giv_expr expects that it can walk the insns
1916 at m->insn forwards and see this old sequence we are
1917 tossing here. delete_insn does preserve the next
1918 pointers, but when we skip over a NOTE we must fix
1919 it up. Otherwise that code walks into the non-deleted
1921 while (p && GET_CODE (p) == NOTE)
1922 p = NEXT_INSN (temp) = NEXT_INSN (p);
1926 emit_move_insn (m->set_dest, m->set_src);
1927 temp = get_insns ();
1930 add_label_notes (m->set_src, temp);
1932 i1 = emit_insns_before (temp, loop_start);
1933 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
1935 = gen_rtx_EXPR_LIST (m->is_equiv ? REG_EQUIV : REG_EQUAL,
1936 m->set_src, REG_NOTES (i1));
1938 if (loop_dump_stream)
1939 fprintf (loop_dump_stream, " moved to %d", INSN_UID (i1));
1941 /* The more regs we move, the less we like moving them. */
1946 for (count = m->consec; count >= 0; count--)
1950 /* If first insn of libcall sequence, skip to end. */
1951 /* Do this at start of loop, since p is guaranteed to
1953 if (GET_CODE (p) != NOTE
1954 && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
1957 /* If last insn of libcall sequence, move all
1958 insns except the last before the loop. The last
1959 insn is handled in the normal manner. */
1960 if (GET_CODE (p) != NOTE
1961 && (temp = find_reg_note (p, REG_RETVAL, NULL_RTX)))
1965 rtx fn_address_insn = 0;
1968 for (temp = XEXP (temp, 0); temp != p;
1969 temp = NEXT_INSN (temp))
1975 if (GET_CODE (temp) == NOTE)
1978 body = PATTERN (temp);
1980 /* Find the next insn after TEMP,
1981 not counting USE or NOTE insns. */
1982 for (next = NEXT_INSN (temp); next != p;
1983 next = NEXT_INSN (next))
1984 if (! (GET_CODE (next) == INSN
1985 && GET_CODE (PATTERN (next)) == USE)
1986 && GET_CODE (next) != NOTE)
1989 /* If that is the call, this may be the insn
1990 that loads the function address.
1992 Extract the function address from the insn
1993 that loads it into a register.
1994 If this insn was cse'd, we get incorrect code.
1996 So emit a new move insn that copies the
1997 function address into the register that the
1998 call insn will use. flow.c will delete any
1999 redundant stores that we have created. */
2000 if (GET_CODE (next) == CALL_INSN
2001 && GET_CODE (body) == SET
2002 && GET_CODE (SET_DEST (body)) == REG
2003 && (n = find_reg_note (temp, REG_EQUAL,
2006 fn_reg = SET_SRC (body);
2007 if (GET_CODE (fn_reg) != REG)
2008 fn_reg = SET_DEST (body);
2009 fn_address = XEXP (n, 0);
2010 fn_address_insn = temp;
2012 /* We have the call insn.
2013 If it uses the register we suspect it might,
2014 load it with the correct address directly. */
2015 if (GET_CODE (temp) == CALL_INSN
2017 && reg_referenced_p (fn_reg, body))
2018 emit_insn_after (gen_move_insn (fn_reg,
2022 if (GET_CODE (temp) == CALL_INSN)
2024 i1 = emit_call_insn_before (body, loop_start);
2025 /* Because the USAGE information potentially
2026 contains objects other than hard registers
2027 we need to copy it. */
2028 if (CALL_INSN_FUNCTION_USAGE (temp))
2029 CALL_INSN_FUNCTION_USAGE (i1)
2030 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp));
2033 i1 = emit_insn_before (body, loop_start);
2036 if (temp == fn_address_insn)
2037 fn_address_insn = i1;
2038 REG_NOTES (i1) = REG_NOTES (temp);
2044 if (m->savemode != VOIDmode)
2046 /* P sets REG to zero; but we should clear only
2047 the bits that are not covered by the mode
2049 rtx reg = m->set_dest;
2055 (GET_MODE (reg), and_optab, reg,
2056 GEN_INT ((((HOST_WIDE_INT) 1
2057 << GET_MODE_BITSIZE (m->savemode)))
2059 reg, 1, OPTAB_LIB_WIDEN);
2063 emit_move_insn (reg, tem);
2064 sequence = gen_sequence ();
2066 i1 = emit_insn_before (sequence, loop_start);
2068 else if (GET_CODE (p) == CALL_INSN)
2070 i1 = emit_call_insn_before (PATTERN (p), loop_start);
2071 /* Because the USAGE information potentially
2072 contains objects other than hard registers
2073 we need to copy it. */
2074 if (CALL_INSN_FUNCTION_USAGE (p))
2075 CALL_INSN_FUNCTION_USAGE (i1)
2076 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p));
2078 else if (count == m->consec && m->move_insn_first)
2080 /* The SET_SRC might not be invariant, so we must
2081 use the REG_EQUAL note. */
2083 emit_move_insn (m->set_dest, m->set_src);
2084 temp = get_insns ();
2087 add_label_notes (m->set_src, temp);
2089 i1 = emit_insns_before (temp, loop_start);
2090 if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
2092 = gen_rtx_EXPR_LIST ((m->is_equiv ? REG_EQUIV
2094 m->set_src, REG_NOTES (i1));
2097 i1 = emit_insn_before (PATTERN (p), loop_start);
2099 if (REG_NOTES (i1) == 0)
2101 REG_NOTES (i1) = REG_NOTES (p);
2103 /* If there is a REG_EQUAL note present whose value
2104 is not loop invariant, then delete it, since it
2105 may cause problems with later optimization passes.
2106 It is possible for cse to create such notes
2107 like this as a result of record_jump_cond. */
2109 if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX))
2110 && ! invariant_p (XEXP (temp, 0)))
2111 remove_note (i1, temp);
2117 if (loop_dump_stream)
2118 fprintf (loop_dump_stream, " moved to %d",
2121 /* If library call, now fix the REG_NOTES that contain
2122 insn pointers, namely REG_LIBCALL on FIRST
2123 and REG_RETVAL on I1. */
2124 if ((temp = find_reg_note (i1, REG_RETVAL, NULL_RTX)))
2126 XEXP (temp, 0) = first;
2127 temp = find_reg_note (first, REG_LIBCALL, NULL_RTX);
2128 XEXP (temp, 0) = i1;
2135 /* simplify_giv_expr expects that it can walk the insns
2136 at m->insn forwards and see this old sequence we are
2137 tossing here. delete_insn does preserve the next
2138 pointers, but when we skip over a NOTE we must fix
2139 it up. Otherwise that code walks into the non-deleted
2141 while (p && GET_CODE (p) == NOTE)
2142 p = NEXT_INSN (temp) = NEXT_INSN (p);
2145 /* The more regs we move, the less we like moving them. */
2149 /* Any other movable that loads the same register
2151 already_moved[regno] = 1;
2153 /* This reg has been moved out of one loop. */
2154 moved_once[regno] = 1;
2156 /* The reg set here is now invariant. */
2158 VARRAY_INT (set_in_loop, regno) = 0;
2162 /* Change the length-of-life info for the register
2163 to say it lives at least the full length of this loop.
2164 This will help guide optimizations in outer loops. */
2166 if (uid_luid[REGNO_FIRST_UID (regno)] > INSN_LUID (loop_start))
2167 /* This is the old insn before all the moved insns.
2168 We can't use the moved insn because it is out of range
2169 in uid_luid. Only the old insns have luids. */
2170 REGNO_FIRST_UID (regno) = INSN_UID (loop_start);
2171 if (uid_luid[REGNO_LAST_UID (regno)] < INSN_LUID (end))
2172 REGNO_LAST_UID (regno) = INSN_UID (end);
2174 /* Combine with this moved insn any other matching movables. */
2177 for (m1 = movables; m1; m1 = m1->next)
2182 /* Schedule the reg loaded by M1
2183 for replacement so that shares the reg of M.
2184 If the modes differ (only possible in restricted
2185 circumstances, make a SUBREG. */
2186 if (GET_MODE (m->set_dest) == GET_MODE (m1->set_dest))
2187 reg_map[m1->regno] = m->set_dest;
2190 = gen_lowpart_common (GET_MODE (m1->set_dest),
2193 /* Get rid of the matching insn
2194 and prevent further processing of it. */
2197 /* if library call, delete all insn except last, which
2199 if ((temp = find_reg_note (m1->insn, REG_RETVAL,
2202 for (temp = XEXP (temp, 0); temp != m1->insn;
2203 temp = NEXT_INSN (temp))
2206 delete_insn (m1->insn);
2208 /* Any other movable that loads the same register
2210 already_moved[m1->regno] = 1;
2212 /* The reg merged here is now invariant,
2213 if the reg it matches is invariant. */
2215 VARRAY_INT (set_in_loop, m1->regno) = 0;
2218 else if (loop_dump_stream)
2219 fprintf (loop_dump_stream, "not desirable");
2221 else if (loop_dump_stream && !m->match)
2222 fprintf (loop_dump_stream, "not safe");
2224 if (loop_dump_stream)
2225 fprintf (loop_dump_stream, "\n");
2229 new_start = loop_start;
2231 /* Go through all the instructions in the loop, making
2232 all the register substitutions scheduled in REG_MAP. */
2233 for (p = new_start; p != end; p = NEXT_INSN (p))
2234 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2235 || GET_CODE (p) == CALL_INSN)
2237 replace_regs (PATTERN (p), reg_map, nregs, 0);
2238 replace_regs (REG_NOTES (p), reg_map, nregs, 0);
2244 /* Scan X and replace the address of any MEM in it with ADDR.
2245 REG is the address that MEM should have before the replacement. */
2248 replace_call_address (x, reg, addr)
2251 register enum rtx_code code;
2257 code = GET_CODE (x);
2271 /* Short cut for very common case. */
2272 replace_call_address (XEXP (x, 1), reg, addr);
2276 /* Short cut for very common case. */
2277 replace_call_address (XEXP (x, 0), reg, addr);
2281 /* If this MEM uses a reg other than the one we expected,
2282 something is wrong. */
2283 if (XEXP (x, 0) != reg)
2292 fmt = GET_RTX_FORMAT (code);
2293 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2296 replace_call_address (XEXP (x, i), reg, addr);
2300 for (j = 0; j < XVECLEN (x, i); j++)
2301 replace_call_address (XVECEXP (x, i, j), reg, addr);
2307 /* Return the number of memory refs to addresses that vary
2311 count_nonfixed_reads (x)
2314 register enum rtx_code code;
2322 code = GET_CODE (x);
2336 return ((invariant_p (XEXP (x, 0)) != 1)
2337 + count_nonfixed_reads (XEXP (x, 0)));
2344 fmt = GET_RTX_FORMAT (code);
2345 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2348 value += count_nonfixed_reads (XEXP (x, i));
2352 for (j = 0; j < XVECLEN (x, i); j++)
2353 value += count_nonfixed_reads (XVECEXP (x, i, j));
2361 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2362 Replace it with an instruction to load just the low bytes
2363 if the machine supports such an instruction,
2364 and insert above LOOP_START an instruction to clear the register. */
2367 constant_high_bytes (p, loop_start)
2371 register int insn_code_number;
2373 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2374 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2376 new = gen_rtx_SET (VOIDmode,
2377 gen_rtx_STRICT_LOW_PART (VOIDmode,
2378 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p)), 0)),
2379 SET_DEST (PATTERN (p)),
2381 XEXP (SET_SRC (PATTERN (p)), 0));
2382 insn_code_number = recog (new, p);
2384 if (insn_code_number)
2388 /* Clear destination register before the loop. */
2389 emit_insn_before (gen_rtx_SET (VOIDmode, SET_DEST (PATTERN (p)),
2393 /* Inside the loop, just load the low part. */
2399 /* Scan a loop setting the variables `unknown_address_altered',
2400 `num_mem_sets', `loop_continue', `loops_enclosed', `loop_has_call',
2401 `loop_has_volatile', and `loop_has_tablejump'.
2402 Also, fill in the array `loop_mems' and the list `loop_store_mems'. */
2405 prescan_loop (start, end)
2408 register int level = 1;
2410 int loop_has_multiple_exit_targets = 0;
2411 /* The label after END. Jumping here is just like falling off the
2412 end of the loop. We use next_nonnote_insn instead of next_label
2413 as a hedge against the (pathological) case where some actual insn
2414 might end up between the two. */
2415 rtx exit_target = next_nonnote_insn (end);
2416 if (exit_target == NULL_RTX || GET_CODE (exit_target) != CODE_LABEL)
2417 loop_has_multiple_exit_targets = 1;
2419 unknown_address_altered = 0;
2421 loop_has_volatile = 0;
2422 loop_has_tablejump = 0;
2423 loop_store_mems = NULL_RTX;
2424 first_loop_store_insn = NULL_RTX;
2431 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2432 insn = NEXT_INSN (insn))
2434 if (GET_CODE (insn) == NOTE)
2436 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
2439 /* Count number of loops contained in this one. */
2442 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
2451 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2454 loop_continue = insn;
2457 else if (GET_CODE (insn) == CALL_INSN)
2459 if (! CONST_CALL_P (insn))
2460 unknown_address_altered = 1;
2463 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
2465 rtx label1 = NULL_RTX;
2466 rtx label2 = NULL_RTX;
2468 if (volatile_refs_p (PATTERN (insn)))
2469 loop_has_volatile = 1;
2471 if (GET_CODE (insn) == JUMP_INSN
2472 && (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2473 || GET_CODE (PATTERN (insn)) == ADDR_VEC))
2474 loop_has_tablejump = 1;
2476 note_stores (PATTERN (insn), note_addr_stored);
2477 if (! first_loop_store_insn && loop_store_mems)
2478 first_loop_store_insn = insn;
2480 if (! loop_has_multiple_exit_targets
2481 && GET_CODE (insn) == JUMP_INSN
2482 && GET_CODE (PATTERN (insn)) == SET
2483 && SET_DEST (PATTERN (insn)) == pc_rtx)
2485 if (GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE)
2487 label1 = XEXP (SET_SRC (PATTERN (insn)), 1);
2488 label2 = XEXP (SET_SRC (PATTERN (insn)), 2);
2492 label1 = SET_SRC (PATTERN (insn));
2496 if (label1 && label1 != pc_rtx)
2498 if (GET_CODE (label1) != LABEL_REF)
2500 /* Something tricky. */
2501 loop_has_multiple_exit_targets = 1;
2504 else if (XEXP (label1, 0) != exit_target
2505 && LABEL_OUTSIDE_LOOP_P (label1))
2507 /* A jump outside the current loop. */
2508 loop_has_multiple_exit_targets = 1;
2518 else if (GET_CODE (insn) == RETURN)
2519 loop_has_multiple_exit_targets = 1;
2522 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2523 if (/* We can't tell what MEMs are aliased by what. */
2524 !unknown_address_altered
2525 /* An exception thrown by a called function might land us
2528 /* We don't want loads for MEMs moved to a location before the
2529 one at which their stack memory becomes allocated. (Note
2530 that this is not a problem for malloc, etc., since those
2531 require actual function calls. */
2532 && !current_function_calls_alloca
2533 /* There are ways to leave the loop other than falling off the
2535 && !loop_has_multiple_exit_targets)
2536 for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
2537 insn = NEXT_INSN (insn))
2538 for_each_rtx (&insn, insert_loop_mem, 0);
2541 /* LOOP_NUMBER_CONT_DOMINATOR is now the last label between the loop start
2542 and the continue note that is a the destination of a (cond)jump after
2543 the continue note. If there is any (cond)jump between the loop start
2544 and what we have so far as LOOP_NUMBER_CONT_DOMINATOR that has a
2545 target between LOOP_DOMINATOR and the continue note, move
2546 LOOP_NUMBER_CONT_DOMINATOR forward to that label; if a jump's
2547 destination cannot be determined, clear LOOP_NUMBER_CONT_DOMINATOR. */
2550 verify_dominator (loop_number)
2555 if (! loop_number_cont_dominator[loop_number])
2556 /* This can happen for an empty loop, e.g. in
2557 gcc.c-torture/compile/920410-2.c */
2559 if (loop_number_cont_dominator[loop_number] == const0_rtx)
2561 loop_number_cont_dominator[loop_number] = 0;
2564 for (insn = loop_number_loop_starts[loop_number];
2565 insn != loop_number_cont_dominator[loop_number];
2566 insn = NEXT_INSN (insn))
2568 if (GET_CODE (insn) == JUMP_INSN
2569 && GET_CODE (PATTERN (insn)) != RETURN)
2571 rtx label = JUMP_LABEL (insn);
2574 /* If it is not a jump we can easily understand or for
2575 which we do not have jump target information in the JUMP_LABEL
2576 field (consider ADDR_VEC and ADDR_DIFF_VEC insns), then clear
2577 LOOP_NUMBER_CONT_DOMINATOR. */
2578 if ((! condjump_p (insn)
2579 && ! condjump_in_parallel_p (insn))
2580 || label == NULL_RTX)
2582 loop_number_cont_dominator[loop_number] = NULL_RTX;
2586 label_luid = INSN_LUID (label);
2587 if (label_luid < INSN_LUID (loop_number_loop_cont[loop_number])
2589 > INSN_LUID (loop_number_cont_dominator[loop_number])))
2590 loop_number_cont_dominator[loop_number] = label;
2595 /* Scan the function looking for loops. Record the start and end of each loop.
2596 Also mark as invalid loops any loops that contain a setjmp or are branched
2597 to from outside the loop. */
2600 find_and_verify_loops (f)
2604 int current_loop = -1;
2608 compute_luids (f, NULL_RTX, 0);
2610 /* If there are jumps to undefined labels,
2611 treat them as jumps out of any/all loops.
2612 This also avoids writing past end of tables when there are no loops. */
2613 uid_loop_num[0] = -1;
2615 /* Find boundaries of loops, mark which loops are contained within
2616 loops, and invalidate loops that have setjmp. */
2618 for (insn = f; insn; insn = NEXT_INSN (insn))
2620 if (GET_CODE (insn) == NOTE)
2621 switch (NOTE_LINE_NUMBER (insn))
2623 case NOTE_INSN_LOOP_BEG:
2624 loop_number_loop_starts[++next_loop] = insn;
2625 loop_number_loop_ends[next_loop] = 0;
2626 loop_number_loop_cont[next_loop] = 0;
2627 loop_number_cont_dominator[next_loop] = 0;
2628 loop_outer_loop[next_loop] = current_loop;
2629 loop_invalid[next_loop] = 0;
2630 loop_number_exit_labels[next_loop] = 0;
2631 loop_number_exit_count[next_loop] = 0;
2632 current_loop = next_loop;
2635 case NOTE_INSN_SETJMP:
2636 /* In this case, we must invalidate our current loop and any
2638 for (loop = current_loop; loop != -1; loop = loop_outer_loop[loop])
2640 loop_invalid[loop] = 1;
2641 if (loop_dump_stream)
2642 fprintf (loop_dump_stream,
2643 "\nLoop at %d ignored due to setjmp.\n",
2644 INSN_UID (loop_number_loop_starts[loop]));
2648 case NOTE_INSN_LOOP_CONT:
2649 loop_number_loop_cont[current_loop] = insn;
2651 case NOTE_INSN_LOOP_END:
2652 if (current_loop == -1)
2655 loop_number_loop_ends[current_loop] = insn;
2656 verify_dominator (current_loop);
2657 current_loop = loop_outer_loop[current_loop];
2663 /* If for any loop, this is a jump insn between the NOTE_INSN_LOOP_CONT
2664 and NOTE_INSN_LOOP_END notes, update loop_number_loop_dominator. */
2665 else if (GET_CODE (insn) == JUMP_INSN
2666 && GET_CODE (PATTERN (insn)) != RETURN
2667 && current_loop >= 0)
2670 rtx label = JUMP_LABEL (insn);
2672 if (! condjump_p (insn) && ! condjump_in_parallel_p (insn))
2675 this_loop = current_loop;
2678 /* First see if we care about this loop. */
2679 if (loop_number_loop_cont[this_loop]
2680 && loop_number_cont_dominator[this_loop] != const0_rtx)
2682 /* If the jump destination is not known, invalidate
2683 loop_number_const_dominator. */
2685 loop_number_cont_dominator[this_loop] = const0_rtx;
2687 /* Check if the destination is between loop start and
2689 if ((INSN_LUID (label)
2690 < INSN_LUID (loop_number_loop_cont[this_loop]))
2691 && (INSN_LUID (label)
2692 > INSN_LUID (loop_number_loop_starts[this_loop]))
2693 /* And if there is no later destination already
2695 && (! loop_number_cont_dominator[this_loop]
2696 || (INSN_LUID (label)
2697 > INSN_LUID (loop_number_cont_dominator
2699 loop_number_cont_dominator[this_loop] = label;
2701 this_loop = loop_outer_loop[this_loop];
2703 while (this_loop >= 0);
2706 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2707 enclosing loop, but this doesn't matter. */
2708 uid_loop_num[INSN_UID (insn)] = current_loop;
2711 /* Any loop containing a label used in an initializer must be invalidated,
2712 because it can be jumped into from anywhere. */
2714 for (label = forced_labels; label; label = XEXP (label, 1))
2718 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2720 loop_num = loop_outer_loop[loop_num])
2721 loop_invalid[loop_num] = 1;
2724 /* Any loop containing a label used for an exception handler must be
2725 invalidated, because it can be jumped into from anywhere. */
2727 for (label = exception_handler_labels; label; label = XEXP (label, 1))
2731 for (loop_num = uid_loop_num[INSN_UID (XEXP (label, 0))];
2733 loop_num = loop_outer_loop[loop_num])
2734 loop_invalid[loop_num] = 1;
2737 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2738 loop that it is not contained within, that loop is marked invalid.
2739 If any INSN or CALL_INSN uses a label's address, then the loop containing
2740 that label is marked invalid, because it could be jumped into from
2743 Also look for blocks of code ending in an unconditional branch that
2744 exits the loop. If such a block is surrounded by a conditional
2745 branch around the block, move the block elsewhere (see below) and
2746 invert the jump to point to the code block. This may eliminate a
2747 label in our loop and will simplify processing by both us and a
2748 possible second cse pass. */
2750 for (insn = f; insn; insn = NEXT_INSN (insn))
2751 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2753 int this_loop_num = uid_loop_num[INSN_UID (insn)];
2755 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
2757 rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);
2762 for (loop_num = uid_loop_num[INSN_UID (XEXP (note, 0))];
2764 loop_num = loop_outer_loop[loop_num])
2765 loop_invalid[loop_num] = 1;
2769 if (GET_CODE (insn) != JUMP_INSN)
2772 mark_loop_jump (PATTERN (insn), this_loop_num);
2774 /* See if this is an unconditional branch outside the loop. */
2775 if (this_loop_num != -1
2776 && (GET_CODE (PATTERN (insn)) == RETURN
2777 || (simplejump_p (insn)
2778 && (uid_loop_num[INSN_UID (JUMP_LABEL (insn))]
2780 && get_max_uid () < max_uid_for_loop)
2783 rtx our_next = next_real_insn (insn);
2784 rtx last_insn_to_move = NEXT_INSN (insn);
2786 int outer_loop = -1;
2788 /* Go backwards until we reach the start of the loop, a label,
2790 for (p = PREV_INSN (insn);
2791 GET_CODE (p) != CODE_LABEL
2792 && ! (GET_CODE (p) == NOTE
2793 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
2794 && GET_CODE (p) != JUMP_INSN;
2798 /* Check for the case where we have a jump to an inner nested
2799 loop, and do not perform the optimization in that case. */
2801 if (JUMP_LABEL (insn))
2803 dest_loop = uid_loop_num[INSN_UID (JUMP_LABEL (insn))];
2804 if (dest_loop != -1)
2806 for (outer_loop = dest_loop; outer_loop != -1;
2807 outer_loop = loop_outer_loop[outer_loop])
2808 if (outer_loop == this_loop_num)
2813 /* Make sure that the target of P is within the current loop. */
2815 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
2816 && uid_loop_num[INSN_UID (JUMP_LABEL (p))] != this_loop_num)
2817 outer_loop = this_loop_num;
2819 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2820 we have a block of code to try to move.
2822 We look backward and then forward from the target of INSN
2823 to find a BARRIER at the same loop depth as the target.
2824 If we find such a BARRIER, we make a new label for the start
2825 of the block, invert the jump in P and point it to that label,
2826 and move the block of code to the spot we found. */
2828 if (outer_loop == -1
2829 && GET_CODE (p) == JUMP_INSN
2830 && JUMP_LABEL (p) != 0
2831 /* Just ignore jumps to labels that were never emitted.
2832 These always indicate compilation errors. */
2833 && INSN_UID (JUMP_LABEL (p)) != 0
2835 && ! simplejump_p (p)
2836 && next_real_insn (JUMP_LABEL (p)) == our_next
2837 /* If it's not safe to move the sequence, then we
2839 && insns_safe_to_move_p (p, NEXT_INSN (insn),
2840 &last_insn_to_move))
2843 = JUMP_LABEL (insn) ? JUMP_LABEL (insn) : get_last_insn ();
2844 int target_loop_num = uid_loop_num[INSN_UID (target)];
2847 for (loc = target; loc; loc = PREV_INSN (loc))
2848 if (GET_CODE (loc) == BARRIER
2849 /* Don't move things inside a tablejump. */
2850 && ((loc2 = next_nonnote_insn (loc)) == 0
2851 || GET_CODE (loc2) != CODE_LABEL
2852 || (loc2 = next_nonnote_insn (loc2)) == 0
2853 || GET_CODE (loc2) != JUMP_INSN
2854 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2855 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2856 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2860 for (loc = target; loc; loc = NEXT_INSN (loc))
2861 if (GET_CODE (loc) == BARRIER
2862 /* Don't move things inside a tablejump. */
2863 && ((loc2 = next_nonnote_insn (loc)) == 0
2864 || GET_CODE (loc2) != CODE_LABEL
2865 || (loc2 = next_nonnote_insn (loc2)) == 0
2866 || GET_CODE (loc2) != JUMP_INSN
2867 || (GET_CODE (PATTERN (loc2)) != ADDR_VEC
2868 && GET_CODE (PATTERN (loc2)) != ADDR_DIFF_VEC))
2869 && uid_loop_num[INSN_UID (loc)] == target_loop_num)
2874 rtx cond_label = JUMP_LABEL (p);
2875 rtx new_label = get_label_after (p);
2877 /* Ensure our label doesn't go away. */
2878 LABEL_NUSES (cond_label)++;
2880 /* Verify that uid_loop_num is large enough and that
2882 if (invert_jump (p, new_label))
2886 /* If no suitable BARRIER was found, create a suitable
2887 one before TARGET. Since TARGET is a fall through
2888 path, we'll need to insert an jump around our block
2889 and a add a BARRIER before TARGET.
2891 This creates an extra unconditional jump outside
2892 the loop. However, the benefits of removing rarely
2893 executed instructions from inside the loop usually
2894 outweighs the cost of the extra unconditional jump
2895 outside the loop. */
2900 temp = gen_jump (JUMP_LABEL (insn));
2901 temp = emit_jump_insn_before (temp, target);
2902 JUMP_LABEL (temp) = JUMP_LABEL (insn);
2903 LABEL_NUSES (JUMP_LABEL (insn))++;
2904 loc = emit_barrier_before (target);
2907 /* Include the BARRIER after INSN and copy the
2909 new_label = squeeze_notes (new_label,
2911 reorder_insns (new_label, last_insn_to_move, loc);
2913 /* All those insns are now in TARGET_LOOP_NUM. */
2915 q != NEXT_INSN (last_insn_to_move);
2917 uid_loop_num[INSN_UID (q)] = target_loop_num;
2919 /* The label jumped to by INSN is no longer a loop exit.
2920 Unless INSN does not have a label (e.g., it is a
2921 RETURN insn), search loop_number_exit_labels to find
2922 its label_ref, and remove it. Also turn off
2923 LABEL_OUTSIDE_LOOP_P bit. */
2924 if (JUMP_LABEL (insn))
2929 r = loop_number_exit_labels[this_loop_num];
2930 r; q = r, r = LABEL_NEXTREF (r))
2931 if (XEXP (r, 0) == JUMP_LABEL (insn))
2933 LABEL_OUTSIDE_LOOP_P (r) = 0;
2935 LABEL_NEXTREF (q) = LABEL_NEXTREF (r);
2937 loop_number_exit_labels[this_loop_num]
2938 = LABEL_NEXTREF (r);
2942 for (loop_num = this_loop_num;
2943 loop_num != -1 && loop_num != target_loop_num;
2944 loop_num = loop_outer_loop[loop_num])
2945 loop_number_exit_count[loop_num]--;
2947 /* If we didn't find it, then something is wrong. */
2952 /* P is now a jump outside the loop, so it must be put
2953 in loop_number_exit_labels, and marked as such.
2954 The easiest way to do this is to just call
2955 mark_loop_jump again for P. */
2956 mark_loop_jump (PATTERN (p), this_loop_num);
2958 /* If INSN now jumps to the insn after it,
2960 if (JUMP_LABEL (insn) != 0
2961 && (next_real_insn (JUMP_LABEL (insn))
2962 == next_real_insn (insn)))
2966 /* Continue the loop after where the conditional
2967 branch used to jump, since the only branch insn
2968 in the block (if it still remains) is an inter-loop
2969 branch and hence needs no processing. */
2970 insn = NEXT_INSN (cond_label);
2972 if (--LABEL_NUSES (cond_label) == 0)
2973 delete_insn (cond_label);
2975 /* This loop will be continued with NEXT_INSN (insn). */
2976 insn = PREV_INSN (insn);
2983 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2984 loops it is contained in, mark the target loop invalid.
2986 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2989 mark_loop_jump (x, loop_num)
2997 switch (GET_CODE (x))
3010 /* There could be a label reference in here. */
3011 mark_loop_jump (XEXP (x, 0), loop_num);
3017 mark_loop_jump (XEXP (x, 0), loop_num);
3018 mark_loop_jump (XEXP (x, 1), loop_num);
3022 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3023 mark_loop_jump (XEXP (x, 1), loop_num);
3028 mark_loop_jump (XEXP (x, 0), loop_num);
3032 dest_loop = uid_loop_num[INSN_UID (XEXP (x, 0))];
3034 /* Link together all labels that branch outside the loop. This
3035 is used by final_[bg]iv_value and the loop unrolling code. Also
3036 mark this LABEL_REF so we know that this branch should predict
3039 /* A check to make sure the label is not in an inner nested loop,
3040 since this does not count as a loop exit. */
3041 if (dest_loop != -1)
3043 for (outer_loop = dest_loop; outer_loop != -1;
3044 outer_loop = loop_outer_loop[outer_loop])
3045 if (outer_loop == loop_num)
3051 if (loop_num != -1 && outer_loop == -1)
3053 LABEL_OUTSIDE_LOOP_P (x) = 1;
3054 LABEL_NEXTREF (x) = loop_number_exit_labels[loop_num];
3055 loop_number_exit_labels[loop_num] = x;
3057 for (outer_loop = loop_num;
3058 outer_loop != -1 && outer_loop != dest_loop;
3059 outer_loop = loop_outer_loop[outer_loop])
3060 loop_number_exit_count[outer_loop]++;
3063 /* If this is inside a loop, but not in the current loop or one enclosed
3064 by it, it invalidates at least one loop. */
3066 if (dest_loop == -1)
3069 /* We must invalidate every nested loop containing the target of this
3070 label, except those that also contain the jump insn. */
3072 for (; dest_loop != -1; dest_loop = loop_outer_loop[dest_loop])
3074 /* Stop when we reach a loop that also contains the jump insn. */
3075 for (outer_loop = loop_num; outer_loop != -1;
3076 outer_loop = loop_outer_loop[outer_loop])
3077 if (dest_loop == outer_loop)
3080 /* If we get here, we know we need to invalidate a loop. */
3081 if (loop_dump_stream && ! loop_invalid[dest_loop])
3082 fprintf (loop_dump_stream,
3083 "\nLoop at %d ignored due to multiple entry points.\n",
3084 INSN_UID (loop_number_loop_starts[dest_loop]));
3086 loop_invalid[dest_loop] = 1;
3091 /* If this is not setting pc, ignore. */
3092 if (SET_DEST (x) == pc_rtx)
3093 mark_loop_jump (SET_SRC (x), loop_num);
3097 mark_loop_jump (XEXP (x, 1), loop_num);
3098 mark_loop_jump (XEXP (x, 2), loop_num);
3103 for (i = 0; i < XVECLEN (x, 0); i++)
3104 mark_loop_jump (XVECEXP (x, 0, i), loop_num);
3108 for (i = 0; i < XVECLEN (x, 1); i++)
3109 mark_loop_jump (XVECEXP (x, 1, i), loop_num);
3113 /* Strictly speaking this is not a jump into the loop, only a possible
3114 jump out of the loop. However, we have no way to link the destination
3115 of this jump onto the list of exit labels. To be safe we mark this
3116 loop and any containing loops as invalid. */
3119 for (outer_loop = loop_num; outer_loop != -1;
3120 outer_loop = loop_outer_loop[outer_loop])
3122 if (loop_dump_stream && ! loop_invalid[outer_loop])
3123 fprintf (loop_dump_stream,
3124 "\nLoop at %d ignored due to unknown exit jump.\n",
3125 INSN_UID (loop_number_loop_starts[outer_loop]));
3126 loop_invalid[outer_loop] = 1;
3133 /* Return nonzero if there is a label in the range from
3134 insn INSN to and including the insn whose luid is END
3135 INSN must have an assigned luid (i.e., it must not have
3136 been previously created by loop.c). */
3139 labels_in_range_p (insn, end)
3143 while (insn && INSN_LUID (insn) <= end)
3145 if (GET_CODE (insn) == CODE_LABEL)
3147 insn = NEXT_INSN (insn);
3153 /* Record that a memory reference X is being set. */
3156 note_addr_stored (x, y)
3158 rtx y ATTRIBUTE_UNUSED;
3160 if (x == 0 || GET_CODE (x) != MEM)
3163 /* Count number of memory writes.
3164 This affects heuristics in strength_reduce. */
3167 /* BLKmode MEM means all memory is clobbered. */
3168 if (GET_MODE (x) == BLKmode)
3169 unknown_address_altered = 1;
3171 if (unknown_address_altered)
3174 loop_store_mems = gen_rtx_EXPR_LIST (VOIDmode, x, loop_store_mems);
3177 /* X is a value modified by an INSN that references a biv inside a loop
3178 exit test (ie, X is somehow related to the value of the biv). If X
3179 is a pseudo that is used more than once, then the biv is (effectively)
3180 used more than once. */
3183 note_set_pseudo_multiple_uses (x, y)
3185 rtx y ATTRIBUTE_UNUSED;
3190 while (GET_CODE (x) == STRICT_LOW_PART
3191 || GET_CODE (x) == SIGN_EXTRACT
3192 || GET_CODE (x) == ZERO_EXTRACT
3193 || GET_CODE (x) == SUBREG)
3196 if (GET_CODE (x) != REG || REGNO (x) < FIRST_PSEUDO_REGISTER)
3199 /* If we do not have usage information, or if we know the register
3200 is used more than once, note that fact for check_dbra_loop. */
3201 if (REGNO (x) >= max_reg_before_loop
3202 || ! VARRAY_RTX (reg_single_usage, REGNO (x))
3203 || VARRAY_RTX (reg_single_usage, REGNO (x)) == const0_rtx)
3204 note_set_pseudo_multiple_uses_retval = 1;
3207 /* Return nonzero if the rtx X is invariant over the current loop.
3209 The value is 2 if we refer to something only conditionally invariant.
3211 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3212 Otherwise, a memory ref is invariant if it does not conflict with
3213 anything stored in `loop_store_mems'. */
3220 register enum rtx_code code;
3222 int conditional = 0;
3227 code = GET_CODE (x);
3237 /* A LABEL_REF is normally invariant, however, if we are unrolling
3238 loops, and this label is inside the loop, then it isn't invariant.
3239 This is because each unrolled copy of the loop body will have
3240 a copy of this label. If this was invariant, then an insn loading
3241 the address of this label into a register might get moved outside
3242 the loop, and then each loop body would end up using the same label.
3244 We don't know the loop bounds here though, so just fail for all
3246 if (flag_unroll_loops)
3253 case UNSPEC_VOLATILE:
3257 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3258 since the reg might be set by initialization within the loop. */
3260 if ((x == frame_pointer_rtx || x == hard_frame_pointer_rtx
3261 || x == arg_pointer_rtx)
3262 && ! current_function_has_nonlocal_goto)
3266 && REGNO (x) < FIRST_PSEUDO_REGISTER && call_used_regs[REGNO (x)])
3269 if (VARRAY_INT (set_in_loop, REGNO (x)) < 0)
3272 return VARRAY_INT (set_in_loop, REGNO (x)) == 0;
3275 /* Volatile memory references must be rejected. Do this before
3276 checking for read-only items, so that volatile read-only items
3277 will be rejected also. */
3278 if (MEM_VOLATILE_P (x))
3281 /* Read-only items (such as constants in a constant pool) are
3282 invariant if their address is. */
3283 if (RTX_UNCHANGING_P (x))
3286 /* If we had a subroutine call, any location in memory could have been
3288 if (unknown_address_altered)
3291 /* See if there is any dependence between a store and this load. */
3292 mem_list_entry = loop_store_mems;
3293 while (mem_list_entry)
3295 if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
3298 mem_list_entry = XEXP (mem_list_entry, 1);
3301 /* It's not invalidated by a store in memory
3302 but we must still verify the address is invariant. */
3306 /* Don't mess with insns declared volatile. */
3307 if (MEM_VOLATILE_P (x))
3315 fmt = GET_RTX_FORMAT (code);
3316 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3320 int tem = invariant_p (XEXP (x, i));
3326 else if (fmt[i] == 'E')
3329 for (j = 0; j < XVECLEN (x, i); j++)
3331 int tem = invariant_p (XVECEXP (x, i, j));
3341 return 1 + conditional;
3345 /* Return nonzero if all the insns in the loop that set REG
3346 are INSN and the immediately following insns,
3347 and if each of those insns sets REG in an invariant way
3348 (not counting uses of REG in them).
3350 The value is 2 if some of these insns are only conditionally invariant.
3352 We assume that INSN itself is the first set of REG
3353 and that its source is invariant. */
3356 consec_sets_invariant_p (reg, n_sets, insn)
3360 register rtx p = insn;
3361 register int regno = REGNO (reg);
3363 /* Number of sets we have to insist on finding after INSN. */
3364 int count = n_sets - 1;
3365 int old = VARRAY_INT (set_in_loop, regno);
3369 /* If N_SETS hit the limit, we can't rely on its value. */
3373 VARRAY_INT (set_in_loop, regno) = 0;
3377 register enum rtx_code code;
3381 code = GET_CODE (p);
3383 /* If library call, skip to end of it. */
3384 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
3389 && (set = single_set (p))
3390 && GET_CODE (SET_DEST (set)) == REG
3391 && REGNO (SET_DEST (set)) == regno)
3393 this = invariant_p (SET_SRC (set));
3396 else if ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX)))
3398 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3399 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3401 this = (CONSTANT_P (XEXP (temp, 0))
3402 || (find_reg_note (p, REG_RETVAL, NULL_RTX)
3403 && invariant_p (XEXP (temp, 0))));
3410 else if (code != NOTE)
3412 VARRAY_INT (set_in_loop, regno) = old;
3417 VARRAY_INT (set_in_loop, regno) = old;
3418 /* If invariant_p ever returned 2, we return 2. */
3419 return 1 + (value & 2);
3423 /* I don't think this condition is sufficient to allow INSN
3424 to be moved, so we no longer test it. */
3426 /* Return 1 if all insns in the basic block of INSN and following INSN
3427 that set REG are invariant according to TABLE. */
3430 all_sets_invariant_p (reg, insn, table)
3434 register rtx p = insn;
3435 register int regno = REGNO (reg);
3439 register enum rtx_code code;
3441 code = GET_CODE (p);
3442 if (code == CODE_LABEL || code == JUMP_INSN)
3444 if (code == INSN && GET_CODE (PATTERN (p)) == SET
3445 && GET_CODE (SET_DEST (PATTERN (p))) == REG
3446 && REGNO (SET_DEST (PATTERN (p))) == regno)
3448 if (!invariant_p (SET_SRC (PATTERN (p)), table))
3455 /* Look at all uses (not sets) of registers in X. For each, if it is
3456 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3457 a different insn, set USAGE[REGNO] to const0_rtx. */
3460 find_single_use_in_loop (insn, x, usage)
3465 enum rtx_code code = GET_CODE (x);
3466 char *fmt = GET_RTX_FORMAT (code);
3470 VARRAY_RTX (usage, REGNO (x))
3471 = (VARRAY_RTX (usage, REGNO (x)) != 0
3472 && VARRAY_RTX (usage, REGNO (x)) != insn)
3473 ? const0_rtx : insn;
3475 else if (code == SET)
3477 /* Don't count SET_DEST if it is a REG; otherwise count things
3478 in SET_DEST because if a register is partially modified, it won't
3479 show up as a potential movable so we don't care how USAGE is set
3481 if (GET_CODE (SET_DEST (x)) != REG)
3482 find_single_use_in_loop (insn, SET_DEST (x), usage);
3483 find_single_use_in_loop (insn, SET_SRC (x), usage);
3486 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3488 if (fmt[i] == 'e' && XEXP (x, i) != 0)
3489 find_single_use_in_loop (insn, XEXP (x, i), usage);
3490 else if (fmt[i] == 'E')
3491 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3492 find_single_use_in_loop (insn, XVECEXP (x, i, j), usage);
3496 /* Count and record any set in X which is contained in INSN. Update
3497 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3500 count_one_set (insn, x, may_not_move, last_set)
3502 varray_type may_not_move;
3505 if (GET_CODE (x) == CLOBBER && GET_CODE (XEXP (x, 0)) == REG)
3506 /* Don't move a reg that has an explicit clobber.
3507 It's not worth the pain to try to do it correctly. */
3508 VARRAY_CHAR (may_not_move, REGNO (XEXP (x, 0))) = 1;
3510 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
3512 rtx dest = SET_DEST (x);
3513 while (GET_CODE (dest) == SUBREG
3514 || GET_CODE (dest) == ZERO_EXTRACT
3515 || GET_CODE (dest) == SIGN_EXTRACT
3516 || GET_CODE (dest) == STRICT_LOW_PART)
3517 dest = XEXP (dest, 0);
3518 if (GET_CODE (dest) == REG)
3520 register int regno = REGNO (dest);
3521 /* If this is the first setting of this reg
3522 in current basic block, and it was set before,
3523 it must be set in two basic blocks, so it cannot
3524 be moved out of the loop. */
3525 if (VARRAY_INT (set_in_loop, regno) > 0
3526 && last_set[regno] == 0)
3527 VARRAY_CHAR (may_not_move, regno) = 1;
3528 /* If this is not first setting in current basic block,
3529 see if reg was used in between previous one and this.
3530 If so, neither one can be moved. */
3531 if (last_set[regno] != 0
3532 && reg_used_between_p (dest, last_set[regno], insn))
3533 VARRAY_CHAR (may_not_move, regno) = 1;
3534 if (VARRAY_INT (set_in_loop, regno) < 127)
3535 ++VARRAY_INT (set_in_loop, regno);
3536 last_set[regno] = insn;
3541 /* Increment SET_IN_LOOP at the index of each register
3542 that is modified by an insn between FROM and TO.
3543 If the value of an element of SET_IN_LOOP becomes 127 or more,
3544 stop incrementing it, to avoid overflow.
3546 Store in SINGLE_USAGE[I] the single insn in which register I is
3547 used, if it is only used once. Otherwise, it is set to 0 (for no
3548 uses) or const0_rtx for more than one use. This parameter may be zero,
3549 in which case this processing is not done.
3551 Store in *COUNT_PTR the number of actual instruction
3552 in the loop. We use this to decide what is worth moving out. */
3554 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3555 In that case, it is the insn that last set reg n. */
3558 count_loop_regs_set (from, to, may_not_move, single_usage, count_ptr, nregs)
3559 register rtx from, to;
3560 varray_type may_not_move;
3561 varray_type single_usage;
3565 register rtx *last_set = (rtx *) alloca (nregs * sizeof (rtx));
3567 register int count = 0;
3569 bzero ((char *) last_set, nregs * sizeof (rtx));
3570 for (insn = from; insn != to; insn = NEXT_INSN (insn))
3572 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3576 /* Record registers that have exactly one use. */
3577 find_single_use_in_loop (insn, PATTERN (insn), single_usage);
3579 /* Include uses in REG_EQUAL notes. */
3580 if (REG_NOTES (insn))
3581 find_single_use_in_loop (insn, REG_NOTES (insn), single_usage);
3583 if (GET_CODE (PATTERN (insn)) == SET
3584 || GET_CODE (PATTERN (insn)) == CLOBBER)
3585 count_one_set (insn, PATTERN (insn), may_not_move, last_set);
3586 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3589 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
3590 count_one_set (insn, XVECEXP (PATTERN (insn), 0, i),
3591 may_not_move, last_set);
3595 if (GET_CODE (insn) == CODE_LABEL || GET_CODE (insn) == JUMP_INSN)
3596 bzero ((char *) last_set, nregs * sizeof (rtx));
3601 /* Given a loop that is bounded by LOOP_START and LOOP_END
3602 and that is entered at SCAN_START,
3603 return 1 if the register set in SET contained in insn INSN is used by
3604 any insn that precedes INSN in cyclic order starting
3605 from the loop entry point.
3607 We don't want to use INSN_LUID here because if we restrict INSN to those
3608 that have a valid INSN_LUID, it means we cannot move an invariant out
3609 from an inner loop past two loops. */
3612 loop_reg_used_before_p (set, insn, loop_start, scan_start, loop_end)
3613 rtx set, insn, loop_start, scan_start, loop_end;
3615 rtx reg = SET_DEST (set);
3618 /* Scan forward checking for register usage. If we hit INSN, we
3619 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3620 for (p = scan_start; p != insn; p = NEXT_INSN (p))
3622 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
3623 && reg_overlap_mentioned_p (reg, PATTERN (p)))
3633 /* A "basic induction variable" or biv is a pseudo reg that is set
3634 (within this loop) only by incrementing or decrementing it. */
3635 /* A "general induction variable" or giv is a pseudo reg whose
3636 value is a linear function of a biv. */
3638 /* Bivs are recognized by `basic_induction_var';
3639 Givs by `general_induction_var'. */
3641 /* Indexed by register number, indicates whether or not register is an
3642 induction variable, and if so what type. */
3644 varray_type reg_iv_type;
3646 /* Indexed by register number, contains pointer to `struct induction'
3647 if register is an induction variable. This holds general info for
3648 all induction variables. */
3650 varray_type reg_iv_info;
3652 /* Indexed by register number, contains pointer to `struct iv_class'
3653 if register is a basic induction variable. This holds info describing
3654 the class (a related group) of induction variables that the biv belongs
3657 struct iv_class **reg_biv_class;
3659 /* The head of a list which links together (via the next field)
3660 every iv class for the current loop. */
3662 struct iv_class *loop_iv_list;
3664 /* Givs made from biv increments are always splittable for loop unrolling.
3665 Since there is no regscan info for them, we have to keep track of them
3667 int first_increment_giv, last_increment_giv;
3669 /* Communication with routines called via `note_stores'. */
3671 static rtx note_insn;
3673 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3675 static rtx addr_placeholder;
3677 /* ??? Unfinished optimizations, and possible future optimizations,
3678 for the strength reduction code. */
3680 /* ??? The interaction of biv elimination, and recognition of 'constant'
3681 bivs, may cause problems. */
3683 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3684 performance problems.
3686 Perhaps don't eliminate things that can be combined with an addressing
3687 mode. Find all givs that have the same biv, mult_val, and add_val;
3688 then for each giv, check to see if its only use dies in a following
3689 memory address. If so, generate a new memory address and check to see
3690 if it is valid. If it is valid, then store the modified memory address,
3691 otherwise, mark the giv as not done so that it will get its own iv. */
3693 /* ??? Could try to optimize branches when it is known that a biv is always
3696 /* ??? When replace a biv in a compare insn, we should replace with closest
3697 giv so that an optimized branch can still be recognized by the combiner,
3698 e.g. the VAX acb insn. */
3700 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3701 was rerun in loop_optimize whenever a register was added or moved.
3702 Also, some of the optimizations could be a little less conservative. */
3704 /* Perform strength reduction and induction variable elimination.
3706 Pseudo registers created during this function will be beyond the last
3707 valid index in several tables including n_times_set and regno_last_uid.
3708 This does not cause a problem here, because the added registers cannot be
3709 givs outside of their loop, and hence will never be reconsidered.
3710 But scan_loop must check regnos to make sure they are in bounds.
3712 SCAN_START is the first instruction in the loop, as the loop would
3713 actually be executed. END is the NOTE_INSN_LOOP_END. LOOP_TOP is
3714 the first instruction in the loop, as it is layed out in the
3715 instruction stream. LOOP_START is the NOTE_INSN_LOOP_BEG.
3716 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
3719 strength_reduce (scan_start, end, loop_top, insn_count,
3720 loop_start, loop_end, loop_cont, unroll_p, bct_p)
3728 int unroll_p, bct_p ATTRIBUTE_UNUSED;
3736 /* This is 1 if current insn is not executed at least once for every loop
3738 int not_every_iteration = 0;
3739 /* This is 1 if current insn may be executed more than once for every
3741 int maybe_multiple = 0;
3742 /* This is 1 if we have past a branch back to the top of the loop
3743 (aka a loop latch). */
3744 int past_loop_latch = 0;
3745 /* Temporary list pointers for traversing loop_iv_list. */
3746 struct iv_class *bl, **backbl;
3747 /* Ratio of extra register life span we can justify
3748 for saving an instruction. More if loop doesn't call subroutines
3749 since in that case saving an insn makes more difference
3750 and more registers are available. */
3751 /* ??? could set this to last value of threshold in move_movables */
3752 int threshold = (loop_has_call ? 1 : 2) * (3 + n_non_fixed_regs);
3753 /* Map of pseudo-register replacements. */
3758 rtx end_insert_before;
3760 int n_extra_increment;
3761 struct loop_info loop_iteration_info;
3762 struct loop_info *loop_info = &loop_iteration_info;
3764 /* If scan_start points to the loop exit test, we have to be wary of
3765 subversive use of gotos inside expression statements. */
3766 if (prev_nonnote_insn (scan_start) != prev_nonnote_insn (loop_start))
3767 maybe_multiple = back_branch_in_range_p (scan_start, loop_start, loop_end);
3769 VARRAY_INT_INIT (reg_iv_type, max_reg_before_loop, "reg_iv_type");
3770 VARRAY_GENERIC_PTR_INIT (reg_iv_info, max_reg_before_loop, "reg_iv_info");
3771 reg_biv_class = (struct iv_class **)
3772 alloca (max_reg_before_loop * sizeof (struct iv_class *));
3773 bzero ((char *) reg_biv_class, (max_reg_before_loop
3774 * sizeof (struct iv_class *)));
3777 addr_placeholder = gen_reg_rtx (Pmode);
3779 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3780 must be put before this insn, so that they will appear in the right
3781 order (i.e. loop order).
3783 If loop_end is the end of the current function, then emit a
3784 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3786 if (NEXT_INSN (loop_end) != 0)
3787 end_insert_before = NEXT_INSN (loop_end);
3789 end_insert_before = emit_note_after (NOTE_INSN_DELETED, loop_end);
3791 /* Scan through loop to find all possible bivs. */
3793 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
3795 p = next_insn_in_loop (p, scan_start, end, loop_top))
3797 if (GET_CODE (p) == INSN
3798 && (set = single_set (p))
3799 && GET_CODE (SET_DEST (set)) == REG)
3801 dest_reg = SET_DEST (set);
3802 if (REGNO (dest_reg) < max_reg_before_loop
3803 && REGNO (dest_reg) >= FIRST_PSEUDO_REGISTER
3804 && REG_IV_TYPE (REGNO (dest_reg)) != NOT_BASIC_INDUCT)
3806 if (basic_induction_var (SET_SRC (set), GET_MODE (SET_SRC (set)),
3807 dest_reg, p, &inc_val, &mult_val,
3810 /* It is a possible basic induction variable.
3811 Create and initialize an induction structure for it. */
3814 = (struct induction *) alloca (sizeof (struct induction));
3816 record_biv (v, p, dest_reg, inc_val, mult_val, location,
3817 not_every_iteration, maybe_multiple);
3818 REG_IV_TYPE (REGNO (dest_reg)) = BASIC_INDUCT;
3820 else if (REGNO (dest_reg) < max_reg_before_loop)
3821 REG_IV_TYPE (REGNO (dest_reg)) = NOT_BASIC_INDUCT;
3825 /* Past CODE_LABEL, we get to insns that may be executed multiple
3826 times. The only way we can be sure that they can't is if every
3827 jump insn between here and the end of the loop either
3828 returns, exits the loop, is a jump to a location that is still
3829 behind the label, or is a jump to the loop start. */
3831 if (GET_CODE (p) == CODE_LABEL)
3839 insn = NEXT_INSN (insn);
3840 if (insn == scan_start)
3848 if (insn == scan_start)
3852 if (GET_CODE (insn) == JUMP_INSN
3853 && GET_CODE (PATTERN (insn)) != RETURN
3854 && (! condjump_p (insn)
3855 || (JUMP_LABEL (insn) != 0
3856 && JUMP_LABEL (insn) != scan_start
3857 && ! loop_insn_first_p (p, JUMP_LABEL (insn)))))
3865 /* Past a jump, we get to insns for which we can't count
3866 on whether they will be executed during each iteration. */
3867 /* This code appears twice in strength_reduce. There is also similar
3868 code in scan_loop. */
3869 if (GET_CODE (p) == JUMP_INSN
3870 /* If we enter the loop in the middle, and scan around to the
3871 beginning, don't set not_every_iteration for that.
3872 This can be any kind of jump, since we want to know if insns
3873 will be executed if the loop is executed. */
3874 && ! (JUMP_LABEL (p) == loop_top
3875 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
3876 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
3880 /* If this is a jump outside the loop, then it also doesn't
3881 matter. Check to see if the target of this branch is on the
3882 loop_number_exits_labels list. */
3884 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
3886 label = LABEL_NEXTREF (label))
3887 if (XEXP (label, 0) == JUMP_LABEL (p))
3891 not_every_iteration = 1;
3894 else if (GET_CODE (p) == NOTE)
3896 /* At the virtual top of a converted loop, insns are again known to
3897 be executed each iteration: logically, the loop begins here
3898 even though the exit code has been duplicated.
3900 Insns are also again known to be executed each iteration at
3901 the LOOP_CONT note. */
3902 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
3903 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
3905 not_every_iteration = 0;
3906 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
3908 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
3912 /* Note if we pass a loop latch. If we do, then we can not clear
3913 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3914 a loop since a jump before the last CODE_LABEL may have started
3915 a new loop iteration.
3917 Note that LOOP_TOP is only set for rotated loops and we need
3918 this check for all loops, so compare against the CODE_LABEL
3919 which immediately follows LOOP_START. */
3920 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == NEXT_INSN (loop_start))
3921 past_loop_latch = 1;
3923 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3924 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3925 or not an insn is known to be executed each iteration of the
3926 loop, whether or not any iterations are known to occur.
3928 Therefore, if we have just passed a label and have no more labels
3929 between here and the test insn of the loop, and we have not passed
3930 a jump to the top of the loop, then we know these insns will be
3931 executed each iteration. */
3933 if (not_every_iteration
3934 && ! past_loop_latch
3935 && GET_CODE (p) == CODE_LABEL
3936 && no_labels_between_p (p, loop_end)
3937 && loop_insn_first_p (p, loop_cont))
3938 not_every_iteration = 0;
3941 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3942 Make a sanity check against n_times_set. */
3943 for (backbl = &loop_iv_list, bl = *backbl; bl; bl = bl->next)
3945 if (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3946 /* Above happens if register modified by subreg, etc. */
3947 /* Make sure it is not recognized as a basic induction var: */
3948 || VARRAY_INT (n_times_set, bl->regno) != bl->biv_count
3949 /* If never incremented, it is invariant that we decided not to
3950 move. So leave it alone. */
3951 || ! bl->incremented)
3953 if (loop_dump_stream)
3954 fprintf (loop_dump_stream, "Reg %d: biv discarded, %s\n",
3956 (REG_IV_TYPE (bl->regno) != BASIC_INDUCT
3957 ? "not induction variable"
3958 : (! bl->incremented ? "never incremented"
3961 REG_IV_TYPE (bl->regno) = NOT_BASIC_INDUCT;
3968 if (loop_dump_stream)
3969 fprintf (loop_dump_stream, "Reg %d: biv verified\n", bl->regno);
3973 /* Exit if there are no bivs. */
3976 /* Can still unroll the loop anyways, but indicate that there is no
3977 strength reduction info available. */
3979 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
3985 /* Find initial value for each biv by searching backwards from loop_start,
3986 halting at first label. Also record any test condition. */
3989 for (p = loop_start; p && GET_CODE (p) != CODE_LABEL; p = PREV_INSN (p))
3993 if (GET_CODE (p) == CALL_INSN)
3996 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
3997 || GET_CODE (p) == CALL_INSN)
3998 note_stores (PATTERN (p), record_initial);
4000 /* Record any test of a biv that branches around the loop if no store
4001 between it and the start of loop. We only care about tests with
4002 constants and registers and only certain of those. */
4003 if (GET_CODE (p) == JUMP_INSN
4004 && JUMP_LABEL (p) != 0
4005 && next_real_insn (JUMP_LABEL (p)) == next_real_insn (loop_end)
4006 && (test = get_condition_for_loop (p)) != 0
4007 && GET_CODE (XEXP (test, 0)) == REG
4008 && REGNO (XEXP (test, 0)) < max_reg_before_loop
4009 && (bl = reg_biv_class[REGNO (XEXP (test, 0))]) != 0
4010 && valid_initial_value_p (XEXP (test, 1), p, call_seen, loop_start)
4011 && bl->init_insn == 0)
4013 /* If an NE test, we have an initial value! */
4014 if (GET_CODE (test) == NE)
4017 bl->init_set = gen_rtx_SET (VOIDmode,
4018 XEXP (test, 0), XEXP (test, 1));
4021 bl->initial_test = test;
4025 /* Look at the each biv and see if we can say anything better about its
4026 initial value from any initializing insns set up above. (This is done
4027 in two passes to avoid missing SETs in a PARALLEL.) */
4028 for (backbl = &loop_iv_list; (bl = *backbl); backbl = &bl->next)
4033 if (! bl->init_insn)
4036 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4037 is a constant, use the value of that. */
4038 if (((note = find_reg_note (bl->init_insn, REG_EQUAL, 0)) != NULL
4039 && CONSTANT_P (XEXP (note, 0)))
4040 || ((note = find_reg_note (bl->init_insn, REG_EQUIV, 0)) != NULL
4041 && CONSTANT_P (XEXP (note, 0))))
4042 src = XEXP (note, 0);
4044 src = SET_SRC (bl->init_set);
4046 if (loop_dump_stream)
4047 fprintf (loop_dump_stream,
4048 "Biv %d initialized at insn %d: initial value ",
4049 bl->regno, INSN_UID (bl->init_insn));
4051 if ((GET_MODE (src) == GET_MODE (regno_reg_rtx[bl->regno])
4052 || GET_MODE (src) == VOIDmode)
4053 && valid_initial_value_p (src, bl->init_insn, call_seen, loop_start))
4055 bl->initial_value = src;
4057 if (loop_dump_stream)
4059 if (GET_CODE (src) == CONST_INT)
4061 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (src));
4062 fputc ('\n', loop_dump_stream);
4066 print_rtl (loop_dump_stream, src);
4067 fprintf (loop_dump_stream, "\n");
4073 struct iv_class *bl2 = 0;
4076 /* Biv initial value is not a simple move. If it is the sum of
4077 another biv and a constant, check if both bivs are incremented
4078 in lockstep. Then we are actually looking at a giv.
4079 For simplicity, we only handle the case where there is but a
4080 single increment, and the register is not used elsewhere. */
4081 if (bl->biv_count == 1
4082 && bl->regno < max_reg_before_loop
4083 && uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4084 && GET_CODE (src) == PLUS
4085 && GET_CODE (XEXP (src, 0)) == REG
4086 && CONSTANT_P (XEXP (src, 1))
4087 && ((increment = biv_total_increment (bl, loop_start, loop_end))
4090 int regno = REGNO (XEXP (src, 0));
4092 for (bl2 = loop_iv_list; bl2; bl2 = bl2->next)
4093 if (bl2->regno == regno)
4097 /* Now, can we transform this biv into a giv? */
4099 && bl2->biv_count == 1
4100 && rtx_equal_p (increment,
4101 biv_total_increment (bl2, loop_start, loop_end))
4102 /* init_insn is only set to insns that are before loop_start
4103 without any intervening labels. */
4104 && ! reg_set_between_p (bl2->biv->src_reg,
4105 PREV_INSN (bl->init_insn), loop_start)
4106 /* The register from BL2 must be set before the register from
4107 BL is set, or we must be able to move the latter set after
4108 the former set. Currently there can't be any labels
4109 in-between when biv_toal_increment returns nonzero both times
4110 but we test it here in case some day some real cfg analysis
4111 gets used to set always_computable. */
4112 && ((loop_insn_first_p (bl2->biv->insn, bl->biv->insn)
4113 && no_labels_between_p (bl2->biv->insn, bl->biv->insn))
4114 || (! reg_used_between_p (bl->biv->src_reg, bl->biv->insn,
4116 && no_jumps_between_p (bl->biv->insn, bl2->biv->insn)))
4117 && validate_change (bl->biv->insn,
4118 &SET_SRC (single_set (bl->biv->insn)),
4121 int loop_num = uid_loop_num[INSN_UID (loop_start)];
4122 rtx dominator = loop_number_cont_dominator[loop_num];
4123 rtx giv = bl->biv->src_reg;
4124 rtx giv_insn = bl->biv->insn;
4125 rtx after_giv = NEXT_INSN (giv_insn);
4127 if (loop_dump_stream)
4128 fprintf (loop_dump_stream, "is giv of biv %d\n", bl2->regno);
4129 /* Let this giv be discovered by the generic code. */
4130 REG_IV_TYPE (bl->regno) = UNKNOWN_INDUCT;
4131 /* We can get better optimization if we can move the giv setting
4132 before the first giv use. */
4134 && ! loop_insn_first_p (dominator, scan_start)
4135 && ! reg_set_between_p (bl2->biv->src_reg, loop_start,
4137 && ! reg_used_between_p (giv, loop_start, dominator)
4138 && ! reg_used_between_p (giv, giv_insn, loop_end))
4143 for (next = NEXT_INSN (dominator); ; next = NEXT_INSN (next))
4145 if ((GET_RTX_CLASS (GET_CODE (next)) == 'i'
4146 && (reg_mentioned_p (giv, PATTERN (next))
4147 || reg_set_p (bl2->biv->src_reg, next)))
4148 || GET_CODE (next) == JUMP_INSN)
4151 if (GET_RTX_CLASS (GET_CODE (next)) != 'i'
4152 || ! sets_cc0_p (PATTERN (next)))
4156 if (loop_dump_stream)
4157 fprintf (loop_dump_stream, "move after insn %d\n",
4158 INSN_UID (dominator));
4159 /* Avoid problems with luids by actually moving the insn
4160 and adjusting all luids in the range. */
4161 reorder_insns (giv_insn, giv_insn, dominator);
4162 for (p = dominator; INSN_UID (p) >= max_uid_for_loop; )
4164 compute_luids (giv_insn, after_giv, INSN_LUID (p));
4165 /* If the only purpose of the init insn is to initialize
4166 this giv, delete it. */
4167 if (single_set (bl->init_insn)
4168 && ! reg_used_between_p (giv, bl->init_insn, loop_start))
4169 delete_insn (bl->init_insn);
4171 else if (! loop_insn_first_p (bl2->biv->insn, bl->biv->insn))
4173 rtx p = PREV_INSN (giv_insn);
4174 while (INSN_UID (p) >= max_uid_for_loop)
4176 reorder_insns (giv_insn, giv_insn, bl2->biv->insn);
4177 compute_luids (after_giv, NEXT_INSN (giv_insn),
4180 /* Remove this biv from the chain. */
4190 /* If we can't make it a giv,
4191 let biv keep initial value of "itself". */
4192 else if (loop_dump_stream)
4193 fprintf (loop_dump_stream, "is complex\n");
4197 /* If a biv is unconditionally incremented several times in a row, convert
4198 all but the last increment into a giv. */
4200 /* Get an upper bound for the number of registers
4201 we might have after all bivs have been processed. */
4202 first_increment_giv = max_reg_num ();
4203 for (n_extra_increment = 0, bl = loop_iv_list; bl; bl = bl->next)
4204 n_extra_increment += bl->biv_count - 1;
4206 /* If the loop contains volatile memory references do not allow any
4207 replacements to take place, since this could loose the volatile
4210 Disabled for the gcc-2.95 release. There are still some problems with
4211 giv recombination. We have a patch from Joern which should fix those
4212 problems. But the patch is fairly complex and not really suitable for
4213 the gcc-2.95 branch at this stage. */
4214 if (0 && n_extra_increment && ! loop_has_volatile)
4217 int nregs = first_increment_giv + n_extra_increment;
4219 /* Reallocate reg_iv_type and reg_iv_info. */
4220 VARRAY_GROW (reg_iv_type, nregs);
4221 VARRAY_GROW (reg_iv_info, nregs);
4223 for (bl = loop_iv_list; bl; bl = bl->next)
4225 struct induction **vp, *v, *next;
4226 int biv_dead_after_loop = 0;
4228 /* The biv increments lists are in reverse order. Fix this first. */
4229 for (v = bl->biv, bl->biv = 0; v; v = next)
4232 v->next_iv = bl->biv;
4236 /* We must guard against the case that an early exit between v->insn
4237 and next->insn leaves the biv live after the loop, since that
4238 would mean that we'd be missing an increment for the final
4239 value. The following test to set biv_dead_after_loop is like
4240 the first part of the test to set bl->eliminable.
4241 We don't check here if we can calculate the final value, since
4242 this can't succeed if we already know that there is a jump
4243 between v->insn and next->insn, yet next->always_executed is
4244 set and next->maybe_multiple is cleared. Such a combination
4245 implies that the jump destination is outside the loop.
4246 If we want to make this check more sophisticated, we should
4247 check each branch between v->insn and next->insn individually
4248 to see if the biv is dead at its destination. */
4250 if (uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4252 && INSN_UID (bl->init_insn) < max_uid_for_loop
4253 && (uid_luid[REGNO_FIRST_UID (bl->regno)]
4254 >= INSN_LUID (bl->init_insn))
4255 #ifdef HAVE_decrement_and_branch_until_zero
4258 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4259 biv_dead_after_loop = 1;
4261 for (vp = &bl->biv, next = *vp; v = next, next = v->next_iv;)
4263 HOST_WIDE_INT offset;
4264 rtx set, add_val, old_reg, dest_reg, last_use_insn;
4265 int old_regno, new_regno;
4267 if (! v->always_executed
4268 || v->maybe_multiple
4269 || GET_CODE (v->add_val) != CONST_INT
4270 || ! next->always_executed
4271 || next->maybe_multiple
4272 || ! CONSTANT_P (next->add_val)
4273 || v->mult_val != const1_rtx
4274 || next->mult_val != const1_rtx
4275 || ! (biv_dead_after_loop
4276 || no_jumps_between_p (v->insn, next->insn)))
4281 offset = INTVAL (v->add_val);
4282 set = single_set (v->insn);
4283 add_val = plus_constant (next->add_val, offset);
4284 old_reg = v->dest_reg;
4285 dest_reg = gen_reg_rtx (v->mode);
4287 /* Unlike reg_iv_type / reg_iv_info, the other three arrays
4288 have been allocated with some slop space, so we may not
4289 actually need to reallocate them. If we do, the following
4290 if statement will be executed just once in this loop. */
4291 if ((unsigned) max_reg_num () > n_times_set->num_elements)
4293 /* Grow all the remaining arrays. */
4294 VARRAY_GROW (set_in_loop, nregs);
4295 VARRAY_GROW (n_times_set, nregs);
4296 VARRAY_GROW (may_not_optimize, nregs);
4297 VARRAY_GROW (reg_single_usage, nregs);
4300 if (! validate_change (next->insn, next->location, add_val, 0))
4306 /* Here we can try to eliminate the increment by combining
4307 it into the uses. */
4309 /* Set last_use_insn so that we can check against it. */
4311 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4313 p = next_insn_in_loop (p, scan_start, end, loop_top))
4315 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4317 if (reg_mentioned_p (old_reg, PATTERN (p)))
4323 /* If we can't get the LUIDs for the insns, we can't
4324 calculate the lifetime. This is likely from unrolling
4325 of an inner loop, so there is little point in making this
4326 a DEST_REG giv anyways. */
4327 if (INSN_UID (v->insn) >= max_uid_for_loop
4328 || INSN_UID (last_use_insn) >= max_uid_for_loop
4329 || ! validate_change (v->insn, &SET_DEST (set), dest_reg, 0))
4331 /* Change the increment at NEXT back to what it was. */
4332 if (! validate_change (next->insn, next->location,
4338 next->add_val = add_val;
4339 v->dest_reg = dest_reg;
4340 v->giv_type = DEST_REG;
4341 v->location = &SET_SRC (set);
4343 v->combined_with = 0;
4345 v->derive_adjustment = 0;
4351 v->auto_inc_opt = 0;
4354 v->derived_from = 0;
4355 v->always_computable = 1;
4356 v->always_executed = 1;
4358 v->no_const_addval = 0;
4360 old_regno = REGNO (old_reg);
4361 new_regno = REGNO (dest_reg);
4362 VARRAY_INT (set_in_loop, old_regno)--;
4363 VARRAY_INT (set_in_loop, new_regno) = 1;
4364 VARRAY_INT (n_times_set, old_regno)--;
4365 VARRAY_INT (n_times_set, new_regno) = 1;
4366 VARRAY_CHAR (may_not_optimize, new_regno) = 0;
4368 REG_IV_TYPE (new_regno) = GENERAL_INDUCT;
4369 REG_IV_INFO (new_regno) = v;
4371 /* Remove the increment from the list of biv increments,
4372 and record it as a giv. */
4375 v->next_iv = bl->giv;
4378 v->benefit = rtx_cost (SET_SRC (set), SET);
4379 bl->total_benefit += v->benefit;
4381 /* Now replace the biv with DEST_REG in all insns between
4382 the replaced increment and the next increment, and
4383 remember the last insn that needed a replacement. */
4384 for (last_use_insn = v->insn, p = NEXT_INSN (v->insn);
4386 p = next_insn_in_loop (p, scan_start, end, loop_top))
4390 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
4392 if (reg_mentioned_p (old_reg, PATTERN (p)))
4395 if (! validate_replace_rtx (old_reg, dest_reg, p))
4398 for (note = REG_NOTES (p); note; note = XEXP (note, 1))
4400 if (GET_CODE (note) == EXPR_LIST)
4402 = replace_rtx (XEXP (note, 0), old_reg, dest_reg);
4406 v->last_use = last_use_insn;
4407 v->lifetime = INSN_LUID (v->insn) - INSN_LUID (last_use_insn);
4408 /* If the lifetime is zero, it means that this register is really
4409 a dead store. So mark this as a giv that can be ignored.
4410 This will not prevent the biv from being eliminated. */
4411 if (v->lifetime == 0)
4414 if (loop_dump_stream)
4415 fprintf (loop_dump_stream,
4416 "Increment %d of biv %d converted to giv %d.\n\n",
4417 INSN_UID (v->insn), old_regno, new_regno);
4421 last_increment_giv = max_reg_num () - 1;
4423 /* Search the loop for general induction variables. */
4425 /* A register is a giv if: it is only set once, it is a function of a
4426 biv and a constant (or invariant), and it is not a biv. */
4428 not_every_iteration = 0;
4434 /* At end of a straight-in loop, we are done.
4435 At end of a loop entered at the bottom, scan the top. */
4436 if (p == scan_start)
4444 if (p == scan_start)
4448 /* Look for a general induction variable in a register. */
4449 if (GET_CODE (p) == INSN
4450 && (set = single_set (p))
4451 && GET_CODE (SET_DEST (set)) == REG
4452 && ! VARRAY_CHAR (may_not_optimize, REGNO (SET_DEST (set))))
4459 rtx last_consec_insn;
4461 dest_reg = SET_DEST (set);
4462 if (REGNO (dest_reg) < FIRST_PSEUDO_REGISTER)
4465 if (/* SET_SRC is a giv. */
4466 (general_induction_var (SET_SRC (set), &src_reg, &add_val,
4467 &mult_val, 0, &benefit)
4468 /* Equivalent expression is a giv. */
4469 || ((regnote = find_reg_note (p, REG_EQUAL, NULL_RTX))
4470 && general_induction_var (XEXP (regnote, 0), &src_reg,
4471 &add_val, &mult_val, 0,
4473 /* Don't try to handle any regs made by loop optimization.
4474 We have nothing on them in regno_first_uid, etc. */
4475 && REGNO (dest_reg) < max_reg_before_loop
4476 /* Don't recognize a BASIC_INDUCT_VAR here. */
4477 && dest_reg != src_reg
4478 /* This must be the only place where the register is set. */
4479 && (VARRAY_INT (n_times_set, REGNO (dest_reg)) == 1
4480 /* or all sets must be consecutive and make a giv. */
4481 || (benefit = consec_sets_giv (benefit, p,
4483 &add_val, &mult_val,
4484 &last_consec_insn))))
4487 = (struct induction *) alloca (sizeof (struct induction));
4489 /* If this is a library call, increase benefit. */
4490 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
4491 benefit += libcall_benefit (p);
4493 /* Skip the consecutive insns, if there are any. */
4494 if (VARRAY_INT (n_times_set, REGNO (dest_reg)) != 1)
4495 p = last_consec_insn;
4497 record_giv (v, p, src_reg, dest_reg, mult_val, add_val, benefit,
4498 DEST_REG, not_every_iteration, NULL_PTR, loop_start,
4504 #ifndef DONT_REDUCE_ADDR
4505 /* Look for givs which are memory addresses. */
4506 /* This resulted in worse code on a VAX 8600. I wonder if it
4508 if (GET_CODE (p) == INSN)
4509 find_mem_givs (PATTERN (p), p, not_every_iteration, loop_start,
4513 /* Update the status of whether giv can derive other givs. This can
4514 change when we pass a label or an insn that updates a biv. */
4515 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
4516 || GET_CODE (p) == CODE_LABEL)
4517 update_giv_derive (p);
4519 /* Past a jump, we get to insns for which we can't count
4520 on whether they will be executed during each iteration. */
4521 /* This code appears twice in strength_reduce. There is also similar
4522 code in scan_loop. */
4523 if (GET_CODE (p) == JUMP_INSN
4524 /* If we enter the loop in the middle, and scan around to the
4525 beginning, don't set not_every_iteration for that.
4526 This can be any kind of jump, since we want to know if insns
4527 will be executed if the loop is executed. */
4528 && ! (JUMP_LABEL (p) == loop_top
4529 && ((NEXT_INSN (NEXT_INSN (p)) == loop_end && simplejump_p (p))
4530 || (NEXT_INSN (p) == loop_end && condjump_p (p)))))
4534 /* If this is a jump outside the loop, then it also doesn't
4535 matter. Check to see if the target of this branch is on the
4536 loop_number_exits_labels list. */
4538 for (label = loop_number_exit_labels[uid_loop_num[INSN_UID (loop_start)]];
4540 label = LABEL_NEXTREF (label))
4541 if (XEXP (label, 0) == JUMP_LABEL (p))
4545 not_every_iteration = 1;
4548 else if (GET_CODE (p) == NOTE)
4550 /* At the virtual top of a converted loop, insns are again known to
4551 be executed each iteration: logically, the loop begins here
4552 even though the exit code has been duplicated.
4554 Insns are also again known to be executed each iteration at
4555 the LOOP_CONT note. */
4556 if ((NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_VTOP
4557 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_CONT)
4559 not_every_iteration = 0;
4560 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG)
4562 else if (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
4566 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4567 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4568 or not an insn is known to be executed each iteration of the
4569 loop, whether or not any iterations are known to occur.
4571 Therefore, if we have just passed a label and have no more labels
4572 between here and the test insn of the loop, we know these insns
4573 will be executed each iteration. */
4575 if (not_every_iteration && GET_CODE (p) == CODE_LABEL
4576 && no_labels_between_p (p, loop_end)
4577 && loop_insn_first_p (p, loop_cont))
4578 not_every_iteration = 0;
4581 /* Try to calculate and save the number of loop iterations. This is
4582 set to zero if the actual number can not be calculated. This must
4583 be called after all giv's have been identified, since otherwise it may
4584 fail if the iteration variable is a giv. */
4586 loop_iterations (loop_start, loop_end, loop_info);
4588 /* Now for each giv for which we still don't know whether or not it is
4589 replaceable, check to see if it is replaceable because its final value
4590 can be calculated. This must be done after loop_iterations is called,
4591 so that final_giv_value will work correctly. */
4593 for (bl = loop_iv_list; bl; bl = bl->next)
4595 struct induction *v;
4597 for (v = bl->giv; v; v = v->next_iv)
4598 if (! v->replaceable && ! v->not_replaceable)
4599 check_final_value (v, loop_start, loop_end, loop_info->n_iterations);
4602 /* Try to prove that the loop counter variable (if any) is always
4603 nonnegative; if so, record that fact with a REG_NONNEG note
4604 so that "decrement and branch until zero" insn can be used. */
4605 check_dbra_loop (loop_end, insn_count, loop_start, loop_info);
4607 /* Create reg_map to hold substitutions for replaceable giv regs.
4608 Some givs might have been made from biv increments, so look at
4609 reg_iv_type for a suitable size. */
4610 reg_map_size = reg_iv_type->num_elements;
4611 reg_map = (rtx *) alloca (reg_map_size * sizeof (rtx));
4612 bzero ((char *) reg_map, reg_map_size * sizeof (rtx));
4614 /* Examine each iv class for feasibility of strength reduction/induction
4615 variable elimination. */
4617 for (bl = loop_iv_list; bl; bl = bl->next)
4619 struct induction *v;
4622 rtx final_value = 0;
4625 /* Test whether it will be possible to eliminate this biv
4626 provided all givs are reduced. This is possible if either
4627 the reg is not used outside the loop, or we can compute
4628 what its final value will be.
4630 For architectures with a decrement_and_branch_until_zero insn,
4631 don't do this if we put a REG_NONNEG note on the endtest for
4634 /* Compare against bl->init_insn rather than loop_start.
4635 We aren't concerned with any uses of the biv between
4636 init_insn and loop_start since these won't be affected
4637 by the value of the biv elsewhere in the function, so
4638 long as init_insn doesn't use the biv itself.
4639 March 14, 1989 -- self@bayes.arc.nasa.gov */
4641 if ((uid_luid[REGNO_LAST_UID (bl->regno)] < INSN_LUID (loop_end)
4643 && INSN_UID (bl->init_insn) < max_uid_for_loop
4644 && uid_luid[REGNO_FIRST_UID (bl->regno)] >= INSN_LUID (bl->init_insn)
4645 #ifdef HAVE_decrement_and_branch_until_zero
4648 && ! reg_mentioned_p (bl->biv->dest_reg, SET_SRC (bl->init_set)))
4649 || ((final_value = final_biv_value (bl, loop_start, loop_end,
4650 loop_info->n_iterations))
4651 #ifdef HAVE_decrement_and_branch_until_zero
4655 bl->eliminable = maybe_eliminate_biv (bl, loop_start, end, 0,
4656 threshold, insn_count);
4659 if (loop_dump_stream)
4661 fprintf (loop_dump_stream,
4662 "Cannot eliminate biv %d.\n",
4664 fprintf (loop_dump_stream,
4665 "First use: insn %d, last use: insn %d.\n",
4666 REGNO_FIRST_UID (bl->regno),
4667 REGNO_LAST_UID (bl->regno));
4671 /* Combine all giv's for this iv_class. */
4674 /* This will be true at the end, if all givs which depend on this
4675 biv have been strength reduced.
4676 We can't (currently) eliminate the biv unless this is so. */
4679 /* Check each giv in this class to see if we will benefit by reducing
4680 it. Skip giv's combined with others. */
4681 for (v = bl->giv; v; v = v->next_iv)
4683 struct induction *tv;
4685 if (v->ignore || v->same)
4688 benefit = v->benefit;
4690 /* Reduce benefit if not replaceable, since we will insert
4691 a move-insn to replace the insn that calculates this giv.
4692 Don't do this unless the giv is a user variable, since it
4693 will often be marked non-replaceable because of the duplication
4694 of the exit code outside the loop. In such a case, the copies
4695 we insert are dead and will be deleted. So they don't have
4696 a cost. Similar situations exist. */
4697 /* ??? The new final_[bg]iv_value code does a much better job
4698 of finding replaceable giv's, and hence this code may no longer
4700 if (! v->replaceable && ! bl->eliminable
4701 && REG_USERVAR_P (v->dest_reg))
4702 benefit -= copy_cost;
4704 /* Decrease the benefit to count the add-insns that we will
4705 insert to increment the reduced reg for the giv. */
4706 benefit -= add_cost * bl->biv_count;
4708 /* Decide whether to strength-reduce this giv or to leave the code
4709 unchanged (recompute it from the biv each time it is used).
4710 This decision can be made independently for each giv. */
4713 /* Attempt to guess whether autoincrement will handle some of the
4714 new add insns; if so, increase BENEFIT (undo the subtraction of
4715 add_cost that was done above). */
4716 if (v->giv_type == DEST_ADDR
4717 && GET_CODE (v->mult_val) == CONST_INT)
4719 if (HAVE_POST_INCREMENT
4720 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4721 benefit += add_cost * bl->biv_count;
4722 else if (HAVE_PRE_INCREMENT
4723 && INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4724 benefit += add_cost * bl->biv_count;
4725 else if (HAVE_POST_DECREMENT
4726 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4727 benefit += add_cost * bl->biv_count;
4728 else if (HAVE_PRE_DECREMENT
4729 && -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
4730 benefit += add_cost * bl->biv_count;
4734 /* If an insn is not to be strength reduced, then set its ignore
4735 flag, and clear all_reduced. */
4737 /* A giv that depends on a reversed biv must be reduced if it is
4738 used after the loop exit, otherwise, it would have the wrong
4739 value after the loop exit. To make it simple, just reduce all
4740 of such giv's whether or not we know they are used after the loop
4743 if ( ! flag_reduce_all_givs && v->lifetime * threshold * benefit < insn_count
4746 if (loop_dump_stream)
4747 fprintf (loop_dump_stream,
4748 "giv of insn %d not worth while, %d vs %d.\n",
4750 v->lifetime * threshold * benefit, insn_count);
4756 /* Check that we can increment the reduced giv without a
4757 multiply insn. If not, reject it. */
4759 for (tv = bl->biv; tv; tv = tv->next_iv)
4760 if (tv->mult_val == const1_rtx
4761 && ! product_cheap_p (tv->add_val, v->mult_val))
4763 if (loop_dump_stream)
4764 fprintf (loop_dump_stream,
4765 "giv of insn %d: would need a multiply.\n",
4766 INSN_UID (v->insn));
4774 /* Check for givs whose first use is their definition and whose
4775 last use is the definition of another giv. If so, it is likely
4776 dead and should not be used to derive another giv nor to
4778 for (v = bl->giv; v; v = v->next_iv)
4781 || (v->same && v->same->ignore))
4786 struct induction *v1;
4788 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4789 if (v->last_use == v1->insn)
4792 else if (v->giv_type == DEST_REG
4793 && REGNO_FIRST_UID (REGNO (v->dest_reg)) == INSN_UID (v->insn))
4795 struct induction *v1;
4797 for (v1 = bl->giv; v1; v1 = v1->next_iv)
4798 if (REGNO_LAST_UID (REGNO (v->dest_reg)) == INSN_UID (v1->insn))
4803 /* Now that we know which givs will be reduced, try to rearrange the
4804 combinations to reduce register pressure.
4805 recombine_givs calls find_life_end, which needs reg_iv_type and
4806 reg_iv_info to be valid for all pseudos. We do the necessary
4807 reallocation here since it allows to check if there are still
4808 more bivs to process. */
4809 nregs = max_reg_num ();
4810 if (nregs > reg_iv_type->num_elements)
4812 /* If there are still more bivs to process, allocate some slack
4813 space so that we're not constantly reallocating these arrays. */
4816 /* Reallocate reg_iv_type and reg_iv_info. */
4817 VARRAY_GROW (reg_iv_type, nregs);
4818 VARRAY_GROW (reg_iv_info, nregs);
4821 /* Disabled for the gcc-2.95 release. There are still some problems with
4822 giv recombination. We have a patch from Joern which should fix those
4823 problems. But the patch is fairly complex and not really suitable for
4824 the gcc-2.95 branch at this stage. */
4825 recombine_givs (bl, loop_start, loop_end, unroll_p);
4828 /* Reduce each giv that we decided to reduce. */
4830 for (v = bl->giv; v; v = v->next_iv)
4832 struct induction *tv;
4833 if (! v->ignore && v->same == 0)
4835 int auto_inc_opt = 0;
4837 /* If the code for derived givs immediately below has already
4838 allocated a new_reg, we must keep it. */
4840 v->new_reg = gen_reg_rtx (v->mode);
4842 if (v->derived_from)
4844 struct induction *d = v->derived_from;
4846 /* In case d->dest_reg is not replaceable, we have
4847 to replace it in v->insn now. */
4849 d->new_reg = gen_reg_rtx (d->mode);
4851 = replace_rtx (PATTERN (v->insn), d->dest_reg, d->new_reg);
4853 = replace_rtx (PATTERN (v->insn), v->dest_reg, v->new_reg);
4854 if (bl->biv_count != 1)
4856 /* For each place where the biv is incremented, add an
4857 insn to set the new, reduced reg for the giv. */
4858 for (tv = bl->biv; tv; tv = tv->next_iv)
4860 /* We always emit reduced giv increments before the
4861 biv increment when bl->biv_count != 1. So by
4862 emitting the add insns for derived givs after the
4863 biv increment, they pick up the updated value of
4865 emit_insn_after (copy_rtx (PATTERN (v->insn)),
4874 /* If the target has auto-increment addressing modes, and
4875 this is an address giv, then try to put the increment
4876 immediately after its use, so that flow can create an
4877 auto-increment addressing mode. */
4878 if (v->giv_type == DEST_ADDR && bl->biv_count == 1
4879 && bl->biv->always_executed && ! bl->biv->maybe_multiple
4880 /* We don't handle reversed biv's because bl->biv->insn
4881 does not have a valid INSN_LUID. */
4883 && v->always_executed && ! v->maybe_multiple
4884 && INSN_UID (v->insn) < max_uid_for_loop)
4886 /* If other giv's have been combined with this one, then
4887 this will work only if all uses of the other giv's occur
4888 before this giv's insn. This is difficult to check.
4890 We simplify this by looking for the common case where
4891 there is one DEST_REG giv, and this giv's insn is the
4892 last use of the dest_reg of that DEST_REG giv. If the
4893 increment occurs after the address giv, then we can
4894 perform the optimization. (Otherwise, the increment
4895 would have to go before other_giv, and we would not be
4896 able to combine it with the address giv to get an
4897 auto-inc address.) */
4898 if (v->combined_with)
4900 struct induction *other_giv = 0;
4902 for (tv = bl->giv; tv; tv = tv->next_iv)
4910 if (! tv && other_giv
4911 && REGNO (other_giv->dest_reg) < max_reg_before_loop
4912 && (REGNO_LAST_UID (REGNO (other_giv->dest_reg))
4913 == INSN_UID (v->insn))
4914 && INSN_LUID (v->insn) < INSN_LUID (bl->biv->insn))
4917 /* Check for case where increment is before the address
4918 giv. Do this test in "loop order". */
4919 else if ((INSN_LUID (v->insn) > INSN_LUID (bl->biv->insn)
4920 && (INSN_LUID (v->insn) < INSN_LUID (scan_start)
4921 || (INSN_LUID (bl->biv->insn)
4922 > INSN_LUID (scan_start))))
4923 || (INSN_LUID (v->insn) < INSN_LUID (scan_start)
4924 && (INSN_LUID (scan_start)
4925 < INSN_LUID (bl->biv->insn))))
4934 /* We can't put an insn immediately after one setting
4935 cc0, or immediately before one using cc0. */
4936 if ((auto_inc_opt == 1 && sets_cc0_p (PATTERN (v->insn)))
4937 || (auto_inc_opt == -1
4938 && (prev = prev_nonnote_insn (v->insn)) != 0
4939 && GET_RTX_CLASS (GET_CODE (prev)) == 'i'
4940 && sets_cc0_p (PATTERN (prev))))
4946 v->auto_inc_opt = 1;
4950 /* For each place where the biv is incremented, add an insn
4951 to increment the new, reduced reg for the giv. */
4952 for (tv = bl->biv; tv; tv = tv->next_iv)
4957 insert_before = tv->insn;
4958 else if (auto_inc_opt == 1)
4959 insert_before = NEXT_INSN (v->insn);
4961 insert_before = v->insn;
4963 if (tv->mult_val == const1_rtx)
4964 emit_iv_add_mult (tv->add_val, v->mult_val,
4965 v->new_reg, v->new_reg, insert_before);
4966 else /* tv->mult_val == const0_rtx */
4967 /* A multiply is acceptable here
4968 since this is presumed to be seldom executed. */
4969 emit_iv_add_mult (tv->add_val, v->mult_val,
4970 v->add_val, v->new_reg, insert_before);
4973 /* Add code at loop start to initialize giv's reduced reg. */
4975 emit_iv_add_mult (bl->initial_value, v->mult_val,
4976 v->add_val, v->new_reg, loop_start);
4980 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4983 For each giv register that can be reduced now: if replaceable,
4984 substitute reduced reg wherever the old giv occurs;
4985 else add new move insn "giv_reg = reduced_reg". */
4987 for (v = bl->giv; v; v = v->next_iv)
4989 if (v->same && v->same->ignore)
4995 /* Update expression if this was combined, in case other giv was
4998 v->new_reg = replace_rtx (v->new_reg,
4999 v->same->dest_reg, v->same->new_reg);
5001 if (v->giv_type == DEST_ADDR)
5002 /* Store reduced reg as the address in the memref where we found
5004 validate_change (v->insn, v->location, v->new_reg, 0);
5005 else if (v->replaceable)
5007 reg_map[REGNO (v->dest_reg)] = v->new_reg;
5010 /* I can no longer duplicate the original problem. Perhaps
5011 this is unnecessary now? */
5013 /* Replaceable; it isn't strictly necessary to delete the old
5014 insn and emit a new one, because v->dest_reg is now dead.
5016 However, especially when unrolling loops, the special
5017 handling for (set REG0 REG1) in the second cse pass may
5018 make v->dest_reg live again. To avoid this problem, emit
5019 an insn to set the original giv reg from the reduced giv.
5020 We can not delete the original insn, since it may be part
5021 of a LIBCALL, and the code in flow that eliminates dead
5022 libcalls will fail if it is deleted. */
5023 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
5029 /* Not replaceable; emit an insn to set the original giv reg from
5030 the reduced giv, same as above. */
5031 emit_insn_after (gen_move_insn (v->dest_reg, v->new_reg),
5035 /* When a loop is reversed, givs which depend on the reversed
5036 biv, and which are live outside the loop, must be set to their
5037 correct final value. This insn is only needed if the giv is
5038 not replaceable. The correct final value is the same as the
5039 value that the giv starts the reversed loop with. */
5040 if (bl->reversed && ! v->replaceable)
5041 emit_iv_add_mult (bl->initial_value, v->mult_val,
5042 v->add_val, v->dest_reg, end_insert_before);
5043 else if (v->final_value)
5047 /* If the loop has multiple exits, emit the insn before the
5048 loop to ensure that it will always be executed no matter
5049 how the loop exits. Otherwise, emit the insn after the loop,
5050 since this is slightly more efficient. */
5051 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
5052 insert_before = loop_start;
5054 insert_before = end_insert_before;
5055 emit_insn_before (gen_move_insn (v->dest_reg, v->final_value),
5059 /* If the insn to set the final value of the giv was emitted
5060 before the loop, then we must delete the insn inside the loop
5061 that sets it. If this is a LIBCALL, then we must delete
5062 every insn in the libcall. Note, however, that
5063 final_giv_value will only succeed when there are multiple
5064 exits if the giv is dead at each exit, hence it does not
5065 matter that the original insn remains because it is dead
5067 /* Delete the insn inside the loop that sets the giv since
5068 the giv is now set before (or after) the loop. */
5069 delete_insn (v->insn);
5073 if (loop_dump_stream)
5075 fprintf (loop_dump_stream, "giv at %d reduced to ",
5076 INSN_UID (v->insn));
5077 print_rtl (loop_dump_stream, v->new_reg);
5078 fprintf (loop_dump_stream, "\n");
5082 /* All the givs based on the biv bl have been reduced if they
5085 /* For each giv not marked as maybe dead that has been combined with a
5086 second giv, clear any "maybe dead" mark on that second giv.
5087 v->new_reg will either be or refer to the register of the giv it
5090 Doing this clearing avoids problems in biv elimination where a
5091 giv's new_reg is a complex value that can't be put in the insn but
5092 the giv combined with (with a reg as new_reg) is marked maybe_dead.
5093 Since the register will be used in either case, we'd prefer it be
5094 used from the simpler giv. */
5096 for (v = bl->giv; v; v = v->next_iv)
5097 if (! v->maybe_dead && v->same)
5098 v->same->maybe_dead = 0;
5100 /* Try to eliminate the biv, if it is a candidate.
5101 This won't work if ! all_reduced,
5102 since the givs we planned to use might not have been reduced.
5104 We have to be careful that we didn't initially think we could eliminate
5105 this biv because of a giv that we now think may be dead and shouldn't
5106 be used as a biv replacement.
5108 Also, there is the possibility that we may have a giv that looks
5109 like it can be used to eliminate a biv, but the resulting insn
5110 isn't valid. This can happen, for example, on the 88k, where a
5111 JUMP_INSN can compare a register only with zero. Attempts to
5112 replace it with a compare with a constant will fail.
5114 Note that in cases where this call fails, we may have replaced some
5115 of the occurrences of the biv with a giv, but no harm was done in
5116 doing so in the rare cases where it can occur. */
5118 if (all_reduced == 1 && bl->eliminable
5119 && maybe_eliminate_biv (bl, loop_start, end, 1,
5120 threshold, insn_count))
5123 /* ?? If we created a new test to bypass the loop entirely,
5124 or otherwise drop straight in, based on this test, then
5125 we might want to rewrite it also. This way some later
5126 pass has more hope of removing the initialization of this
5129 /* If final_value != 0, then the biv may be used after loop end
5130 and we must emit an insn to set it just in case.
5132 Reversed bivs already have an insn after the loop setting their
5133 value, so we don't need another one. We can't calculate the
5134 proper final value for such a biv here anyways. */
5135 if (final_value != 0 && ! bl->reversed)
5139 /* If the loop has multiple exits, emit the insn before the
5140 loop to ensure that it will always be executed no matter
5141 how the loop exits. Otherwise, emit the insn after the
5142 loop, since this is slightly more efficient. */
5143 if (loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
5144 insert_before = loop_start;
5146 insert_before = end_insert_before;
5148 emit_insn_before (gen_move_insn (bl->biv->dest_reg, final_value),
5153 /* Delete all of the instructions inside the loop which set
5154 the biv, as they are all dead. If is safe to delete them,
5155 because an insn setting a biv will never be part of a libcall. */
5156 /* However, deleting them will invalidate the regno_last_uid info,
5157 so keeping them around is more convenient. Final_biv_value
5158 will only succeed when there are multiple exits if the biv
5159 is dead at each exit, hence it does not matter that the original
5160 insn remains, because it is dead anyways. */
5161 for (v = bl->biv; v; v = v->next_iv)
5162 delete_insn (v->insn);
5165 if (loop_dump_stream)
5166 fprintf (loop_dump_stream, "Reg %d: biv eliminated\n",
5171 /* Go through all the instructions in the loop, making all the
5172 register substitutions scheduled in REG_MAP. */
5174 for (p = loop_start; p != end; p = NEXT_INSN (p))
5175 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5176 || GET_CODE (p) == CALL_INSN)
5178 replace_regs (PATTERN (p), reg_map, reg_map_size, 0);
5179 replace_regs (REG_NOTES (p), reg_map, reg_map_size, 0);
5183 /* Unroll loops from within strength reduction so that we can use the
5184 induction variable information that strength_reduce has already
5188 unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
5191 #ifdef HAVE_decrement_and_branch_on_count
5192 /* Instrument the loop with BCT insn. */
5193 if (HAVE_decrement_and_branch_on_count && bct_p
5194 && flag_branch_on_count_reg)
5195 insert_bct (loop_start, loop_end, loop_info);
5196 #endif /* HAVE_decrement_and_branch_on_count */
5198 if (loop_dump_stream)
5199 fprintf (loop_dump_stream, "\n");
5200 VARRAY_FREE (reg_iv_type);
5201 VARRAY_FREE (reg_iv_info);
5204 /* Return 1 if X is a valid source for an initial value (or as value being
5205 compared against in an initial test).
5207 X must be either a register or constant and must not be clobbered between
5208 the current insn and the start of the loop.
5210 INSN is the insn containing X. */
5213 valid_initial_value_p (x, insn, call_seen, loop_start)
5222 /* Only consider pseudos we know about initialized in insns whose luids
5224 if (GET_CODE (x) != REG
5225 || REGNO (x) >= max_reg_before_loop)
5228 /* Don't use call-clobbered registers across a call which clobbers it. On
5229 some machines, don't use any hard registers at all. */
5230 if (REGNO (x) < FIRST_PSEUDO_REGISTER
5231 && (SMALL_REGISTER_CLASSES
5232 || (call_used_regs[REGNO (x)] && call_seen)))
5235 /* Don't use registers that have been clobbered before the start of the
5237 if (reg_set_between_p (x, insn, loop_start))
5243 /* Scan X for memory refs and check each memory address
5244 as a possible giv. INSN is the insn whose pattern X comes from.
5245 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5246 every loop iteration. */
5249 find_mem_givs (x, insn, not_every_iteration, loop_start, loop_end)
5252 int not_every_iteration;
5253 rtx loop_start, loop_end;
5256 register enum rtx_code code;
5262 code = GET_CODE (x);
5286 /* This code used to disable creating GIVs with mult_val == 1 and
5287 add_val == 0. However, this leads to lost optimizations when
5288 it comes time to combine a set of related DEST_ADDR GIVs, since
5289 this one would not be seen. */
5291 if (general_induction_var (XEXP (x, 0), &src_reg, &add_val,
5292 &mult_val, 1, &benefit))
5294 /* Found one; record it. */
5296 = (struct induction *) oballoc (sizeof (struct induction));
5298 record_giv (v, insn, src_reg, addr_placeholder, mult_val,
5299 add_val, benefit, DEST_ADDR, not_every_iteration,
5300 &XEXP (x, 0), loop_start, loop_end);
5302 v->mem_mode = GET_MODE (x);
5311 /* Recursively scan the subexpressions for other mem refs. */
5313 fmt = GET_RTX_FORMAT (code);
5314 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5316 find_mem_givs (XEXP (x, i), insn, not_every_iteration, loop_start,
5318 else if (fmt[i] == 'E')
5319 for (j = 0; j < XVECLEN (x, i); j++)
5320 find_mem_givs (XVECEXP (x, i, j), insn, not_every_iteration,
5321 loop_start, loop_end);
5324 /* Fill in the data about one biv update.
5325 V is the `struct induction' in which we record the biv. (It is
5326 allocated by the caller, with alloca.)
5327 INSN is the insn that sets it.
5328 DEST_REG is the biv's reg.
5330 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5331 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5332 being set to INC_VAL.
5334 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5335 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5336 can be executed more than once per iteration. If MAYBE_MULTIPLE
5337 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5338 executed exactly once per iteration. */
5341 record_biv (v, insn, dest_reg, inc_val, mult_val, location,
5342 not_every_iteration, maybe_multiple)
5343 struct induction *v;
5349 int not_every_iteration;
5352 struct iv_class *bl;
5355 v->src_reg = dest_reg;
5356 v->dest_reg = dest_reg;
5357 v->mult_val = mult_val;
5358 v->add_val = inc_val;
5359 v->location = location;
5360 v->mode = GET_MODE (dest_reg);
5361 v->always_computable = ! not_every_iteration;
5362 v->always_executed = ! not_every_iteration;
5363 v->maybe_multiple = maybe_multiple;
5365 /* Add this to the reg's iv_class, creating a class
5366 if this is the first incrementation of the reg. */
5368 bl = reg_biv_class[REGNO (dest_reg)];
5371 /* Create and initialize new iv_class. */
5373 bl = (struct iv_class *) oballoc (sizeof (struct iv_class));
5375 bl->regno = REGNO (dest_reg);
5381 /* Set initial value to the reg itself. */
5382 bl->initial_value = dest_reg;
5383 /* We haven't seen the initializing insn yet */
5386 bl->initial_test = 0;
5387 bl->incremented = 0;
5391 bl->total_benefit = 0;
5393 /* Add this class to loop_iv_list. */
5394 bl->next = loop_iv_list;
5397 /* Put it in the array of biv register classes. */
5398 reg_biv_class[REGNO (dest_reg)] = bl;
5401 /* Update IV_CLASS entry for this biv. */
5402 v->next_iv = bl->biv;
5405 if (mult_val == const1_rtx)
5406 bl->incremented = 1;
5408 if (loop_dump_stream)
5410 fprintf (loop_dump_stream,
5411 "Insn %d: possible biv, reg %d,",
5412 INSN_UID (insn), REGNO (dest_reg));
5413 if (GET_CODE (inc_val) == CONST_INT)
5415 fprintf (loop_dump_stream, " const =");
5416 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (inc_val));
5417 fputc ('\n', loop_dump_stream);
5421 fprintf (loop_dump_stream, " const = ");
5422 print_rtl (loop_dump_stream, inc_val);
5423 fprintf (loop_dump_stream, "\n");
5428 /* Fill in the data about one giv.
5429 V is the `struct induction' in which we record the giv. (It is
5430 allocated by the caller, with alloca.)
5431 INSN is the insn that sets it.
5432 BENEFIT estimates the savings from deleting this insn.
5433 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5434 into a register or is used as a memory address.
5436 SRC_REG is the biv reg which the giv is computed from.
5437 DEST_REG is the giv's reg (if the giv is stored in a reg).
5438 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5439 LOCATION points to the place where this giv's value appears in INSN. */
5442 record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit,
5443 type, not_every_iteration, location, loop_start, loop_end)
5444 struct induction *v;
5448 rtx mult_val, add_val;
5451 int not_every_iteration;
5453 rtx loop_start, loop_end;
5455 struct induction *b;
5456 struct iv_class *bl;
5457 rtx set = single_set (insn);
5460 v->src_reg = src_reg;
5462 v->dest_reg = dest_reg;
5463 v->mult_val = mult_val;
5464 v->add_val = add_val;
5465 v->benefit = benefit;
5466 v->location = location;
5468 v->combined_with = 0;
5469 v->maybe_multiple = 0;
5471 v->derive_adjustment = 0;
5477 v->auto_inc_opt = 0;
5480 v->derived_from = 0;
5483 /* The v->always_computable field is used in update_giv_derive, to
5484 determine whether a giv can be used to derive another giv. For a
5485 DEST_REG giv, INSN computes a new value for the giv, so its value
5486 isn't computable if INSN insn't executed every iteration.
5487 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5488 it does not compute a new value. Hence the value is always computable
5489 regardless of whether INSN is executed each iteration. */
5491 if (type == DEST_ADDR)
5492 v->always_computable = 1;
5494 v->always_computable = ! not_every_iteration;
5496 v->always_executed = ! not_every_iteration;
5498 if (type == DEST_ADDR)
5500 v->mode = GET_MODE (*location);
5503 else /* type == DEST_REG */
5505 v->mode = GET_MODE (SET_DEST (set));
5507 v->lifetime = (uid_luid[REGNO_LAST_UID (REGNO (dest_reg))]
5508 - uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))]);
5510 /* If the lifetime is zero, it means that this register is
5511 really a dead store. So mark this as a giv that can be
5512 ignored. This will not prevent the biv from being eliminated. */
5513 if (v->lifetime == 0)
5516 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
5517 REG_IV_INFO (REGNO (dest_reg)) = v;
5520 /* Add the giv to the class of givs computed from one biv. */
5522 bl = reg_biv_class[REGNO (src_reg)];
5525 v->next_iv = bl->giv;
5527 /* Don't count DEST_ADDR. This is supposed to count the number of
5528 insns that calculate givs. */
5529 if (type == DEST_REG)
5531 bl->total_benefit += benefit;
5534 /* Fatal error, biv missing for this giv? */
5537 if (type == DEST_ADDR)
5541 /* The giv can be replaced outright by the reduced register only if all
5542 of the following conditions are true:
5543 - the insn that sets the giv is always executed on any iteration
5544 on which the giv is used at all
5545 (there are two ways to deduce this:
5546 either the insn is executed on every iteration,
5547 or all uses follow that insn in the same basic block),
5548 - the giv is not used outside the loop
5549 - no assignments to the biv occur during the giv's lifetime. */
5551 if (REGNO_FIRST_UID (REGNO (dest_reg)) == INSN_UID (insn)
5552 /* Previous line always fails if INSN was moved by loop opt. */
5553 && uid_luid[REGNO_LAST_UID (REGNO (dest_reg))] < INSN_LUID (loop_end)
5554 && (! not_every_iteration
5555 || last_use_this_basic_block (dest_reg, insn)))
5557 /* Now check that there are no assignments to the biv within the
5558 giv's lifetime. This requires two separate checks. */
5560 /* Check each biv update, and fail if any are between the first
5561 and last use of the giv.
5563 If this loop contains an inner loop that was unrolled, then
5564 the insn modifying the biv may have been emitted by the loop
5565 unrolling code, and hence does not have a valid luid. Just
5566 mark the biv as not replaceable in this case. It is not very
5567 useful as a biv, because it is used in two different loops.
5568 It is very unlikely that we would be able to optimize the giv
5569 using this biv anyways. */
5572 for (b = bl->biv; b; b = b->next_iv)
5574 if (INSN_UID (b->insn) >= max_uid_for_loop
5575 || ((uid_luid[INSN_UID (b->insn)]
5576 >= uid_luid[REGNO_FIRST_UID (REGNO (dest_reg))])
5577 && (uid_luid[INSN_UID (b->insn)]
5578 <= uid_luid[REGNO_LAST_UID (REGNO (dest_reg))])))
5581 v->not_replaceable = 1;
5586 /* If there are any backwards branches that go from after the
5587 biv update to before it, then this giv is not replaceable. */
5589 for (b = bl->biv; b; b = b->next_iv)
5590 if (back_branch_in_range_p (b->insn, loop_start, loop_end))
5593 v->not_replaceable = 1;
5599 /* May still be replaceable, we don't have enough info here to
5602 v->not_replaceable = 0;
5606 /* Record whether the add_val contains a const_int, for later use by
5611 v->no_const_addval = 1;
5612 if (tem == const0_rtx)
5614 else if (GET_CODE (tem) == CONST_INT)
5615 v->no_const_addval = 0;
5616 else if (GET_CODE (tem) == PLUS)
5620 if (GET_CODE (XEXP (tem, 0)) == PLUS)
5621 tem = XEXP (tem, 0);
5622 else if (GET_CODE (XEXP (tem, 1)) == PLUS)
5623 tem = XEXP (tem, 1);
5627 if (GET_CODE (XEXP (tem, 1)) == CONST_INT)
5628 v->no_const_addval = 0;
5632 if (loop_dump_stream)
5634 if (type == DEST_REG)
5635 fprintf (loop_dump_stream, "Insn %d: giv reg %d",
5636 INSN_UID (insn), REGNO (dest_reg));
5638 fprintf (loop_dump_stream, "Insn %d: dest address",
5641 fprintf (loop_dump_stream, " src reg %d benefit %d",
5642 REGNO (src_reg), v->benefit);
5643 fprintf (loop_dump_stream, " lifetime %d",
5647 fprintf (loop_dump_stream, " replaceable");
5649 if (v->no_const_addval)
5650 fprintf (loop_dump_stream, " ncav");
5652 if (GET_CODE (mult_val) == CONST_INT)
5654 fprintf (loop_dump_stream, " mult ");
5655 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (mult_val));
5659 fprintf (loop_dump_stream, " mult ");
5660 print_rtl (loop_dump_stream, mult_val);
5663 if (GET_CODE (add_val) == CONST_INT)
5665 fprintf (loop_dump_stream, " add ");
5666 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC, INTVAL (add_val));
5670 fprintf (loop_dump_stream, " add ");
5671 print_rtl (loop_dump_stream, add_val);
5675 if (loop_dump_stream)
5676 fprintf (loop_dump_stream, "\n");
5681 /* All this does is determine whether a giv can be made replaceable because
5682 its final value can be calculated. This code can not be part of record_giv
5683 above, because final_giv_value requires that the number of loop iterations
5684 be known, and that can not be accurately calculated until after all givs
5685 have been identified. */
5688 check_final_value (v, loop_start, loop_end, n_iterations)
5689 struct induction *v;
5690 rtx loop_start, loop_end;
5691 unsigned HOST_WIDE_INT n_iterations;
5693 struct iv_class *bl;
5694 rtx final_value = 0;
5696 bl = reg_biv_class[REGNO (v->src_reg)];
5698 /* DEST_ADDR givs will never reach here, because they are always marked
5699 replaceable above in record_giv. */
5701 /* The giv can be replaced outright by the reduced register only if all
5702 of the following conditions are true:
5703 - the insn that sets the giv is always executed on any iteration
5704 on which the giv is used at all
5705 (there are two ways to deduce this:
5706 either the insn is executed on every iteration,
5707 or all uses follow that insn in the same basic block),
5708 - its final value can be calculated (this condition is different
5709 than the one above in record_giv)
5710 - it's not used before it's set
5711 - no assignments to the biv occur during the giv's lifetime. */
5714 /* This is only called now when replaceable is known to be false. */
5715 /* Clear replaceable, so that it won't confuse final_giv_value. */
5719 if ((final_value = final_giv_value (v, loop_start, loop_end, n_iterations))
5720 && (v->always_computable || last_use_this_basic_block (v->dest_reg, v->insn)))
5722 int biv_increment_seen = 0, before_giv_insn = 0;
5728 /* When trying to determine whether or not a biv increment occurs
5729 during the lifetime of the giv, we can ignore uses of the variable
5730 outside the loop because final_value is true. Hence we can not
5731 use regno_last_uid and regno_first_uid as above in record_giv. */
5733 /* Search the loop to determine whether any assignments to the
5734 biv occur during the giv's lifetime. Start with the insn
5735 that sets the giv, and search around the loop until we come
5736 back to that insn again.
5738 Also fail if there is a jump within the giv's lifetime that jumps
5739 to somewhere outside the lifetime but still within the loop. This
5740 catches spaghetti code where the execution order is not linear, and
5741 hence the above test fails. Here we assume that the giv lifetime
5742 does not extend from one iteration of the loop to the next, so as
5743 to make the test easier. Since the lifetime isn't known yet,
5744 this requires two loops. See also record_giv above. */
5746 last_giv_use = v->insn;
5753 before_giv_insn = 1;
5754 p = NEXT_INSN (loop_start);
5759 if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
5760 || GET_CODE (p) == CALL_INSN)
5762 /* It is possible for the BIV increment to use the GIV if we
5763 have a cycle. Thus we must be sure to check each insn for
5764 both BIV and GIV uses, and we must check for BIV uses
5767 if (! biv_increment_seen
5768 && reg_set_p (v->src_reg, PATTERN (p)))
5769 biv_increment_seen = 1;
5771 if (reg_mentioned_p (v->dest_reg, PATTERN (p)))
5773 if (biv_increment_seen || before_giv_insn)
5776 v->not_replaceable = 1;
5784 /* Now that the lifetime of the giv is known, check for branches
5785 from within the lifetime to outside the lifetime if it is still
5795 p = NEXT_INSN (loop_start);
5796 if (p == last_giv_use)
5799 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p)
5800 && LABEL_NAME (JUMP_LABEL (p))
5801 && ((loop_insn_first_p (JUMP_LABEL (p), v->insn)
5802 && loop_insn_first_p (loop_start, JUMP_LABEL (p)))
5803 || (loop_insn_first_p (last_giv_use, JUMP_LABEL (p))
5804 && loop_insn_first_p (JUMP_LABEL (p), loop_end))))
5807 v->not_replaceable = 1;
5809 if (loop_dump_stream)
5810 fprintf (loop_dump_stream,
5811 "Found branch outside giv lifetime.\n");
5818 /* If it is replaceable, then save the final value. */
5820 v->final_value = final_value;
5823 if (loop_dump_stream && v->replaceable)
5824 fprintf (loop_dump_stream, "Insn %d: giv reg %d final_value replaceable\n",
5825 INSN_UID (v->insn), REGNO (v->dest_reg));
5828 /* Update the status of whether a giv can derive other givs.
5830 We need to do something special if there is or may be an update to the biv
5831 between the time the giv is defined and the time it is used to derive
5834 In addition, a giv that is only conditionally set is not allowed to
5835 derive another giv once a label has been passed.
5837 The cases we look at are when a label or an update to a biv is passed. */
5840 update_giv_derive (p)
5843 struct iv_class *bl;
5844 struct induction *biv, *giv;
5848 /* Search all IV classes, then all bivs, and finally all givs.
5850 There are three cases we are concerned with. First we have the situation
5851 of a giv that is only updated conditionally. In that case, it may not
5852 derive any givs after a label is passed.
5854 The second case is when a biv update occurs, or may occur, after the
5855 definition of a giv. For certain biv updates (see below) that are
5856 known to occur between the giv definition and use, we can adjust the
5857 giv definition. For others, or when the biv update is conditional,
5858 we must prevent the giv from deriving any other givs. There are two
5859 sub-cases within this case.
5861 If this is a label, we are concerned with any biv update that is done
5862 conditionally, since it may be done after the giv is defined followed by
5863 a branch here (actually, we need to pass both a jump and a label, but
5864 this extra tracking doesn't seem worth it).
5866 If this is a jump, we are concerned about any biv update that may be
5867 executed multiple times. We are actually only concerned about
5868 backward jumps, but it is probably not worth performing the test
5869 on the jump again here.
5871 If this is a biv update, we must adjust the giv status to show that a
5872 subsequent biv update was performed. If this adjustment cannot be done,
5873 the giv cannot derive further givs. */
5875 for (bl = loop_iv_list; bl; bl = bl->next)
5876 for (biv = bl->biv; biv; biv = biv->next_iv)
5877 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
5880 for (giv = bl->giv; giv; giv = giv->next_iv)
5882 /* If cant_derive is already true, there is no point in
5883 checking all of these conditions again. */
5884 if (giv->cant_derive)
5887 /* If this giv is conditionally set and we have passed a label,
5888 it cannot derive anything. */
5889 if (GET_CODE (p) == CODE_LABEL && ! giv->always_computable)
5890 giv->cant_derive = 1;
5892 /* Skip givs that have mult_val == 0, since
5893 they are really invariants. Also skip those that are
5894 replaceable, since we know their lifetime doesn't contain
5896 else if (giv->mult_val == const0_rtx || giv->replaceable)
5899 /* The only way we can allow this giv to derive another
5900 is if this is a biv increment and we can form the product
5901 of biv->add_val and giv->mult_val. In this case, we will
5902 be able to compute a compensation. */
5903 else if (biv->insn == p)
5907 if (biv->mult_val == const1_rtx)
5908 tem = simplify_giv_expr (gen_rtx_MULT (giv->mode,
5913 if (tem && giv->derive_adjustment)
5914 tem = simplify_giv_expr (gen_rtx_PLUS (giv->mode, tem,
5915 giv->derive_adjustment),
5918 giv->derive_adjustment = tem;
5920 giv->cant_derive = 1;
5922 else if ((GET_CODE (p) == CODE_LABEL && ! biv->always_computable)
5923 || (GET_CODE (p) == JUMP_INSN && biv->maybe_multiple))
5924 giv->cant_derive = 1;
5929 /* Check whether an insn is an increment legitimate for a basic induction var.
5930 X is the source of insn P, or a part of it.
5931 MODE is the mode in which X should be interpreted.
5933 DEST_REG is the putative biv, also the destination of the insn.
5934 We accept patterns of these forms:
5935 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5936 REG = INVARIANT + REG
5938 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5939 store the additive term into *INC_VAL, and store the place where
5940 we found the additive term into *LOCATION.
5942 If X is an assignment of an invariant into DEST_REG, we set
5943 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5945 We also want to detect a BIV when it corresponds to a variable
5946 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5947 of the variable may be a PLUS that adds a SUBREG of that variable to
5948 an invariant and then sign- or zero-extends the result of the PLUS
5951 Most GIVs in such cases will be in the promoted mode, since that is the
5952 probably the natural computation mode (and almost certainly the mode
5953 used for addresses) on the machine. So we view the pseudo-reg containing
5954 the variable as the BIV, as if it were simply incremented.
5956 Note that treating the entire pseudo as a BIV will result in making
5957 simple increments to any GIVs based on it. However, if the variable
5958 overflows in its declared mode but not its promoted mode, the result will
5959 be incorrect. This is acceptable if the variable is signed, since
5960 overflows in such cases are undefined, but not if it is unsigned, since
5961 those overflows are defined. So we only check for SIGN_EXTEND and
5964 If we cannot find a biv, we return 0. */
5967 basic_induction_var (x, mode, dest_reg, p, inc_val, mult_val, location)
5969 enum machine_mode mode;
5976 register enum rtx_code code;
5980 code = GET_CODE (x);
5984 if (rtx_equal_p (XEXP (x, 0), dest_reg)
5985 || (GET_CODE (XEXP (x, 0)) == SUBREG
5986 && SUBREG_PROMOTED_VAR_P (XEXP (x, 0))
5987 && SUBREG_REG (XEXP (x, 0)) == dest_reg))
5989 argp = &XEXP (x, 1);
5991 else if (rtx_equal_p (XEXP (x, 1), dest_reg)
5992 || (GET_CODE (XEXP (x, 1)) == SUBREG
5993 && SUBREG_PROMOTED_VAR_P (XEXP (x, 1))
5994 && SUBREG_REG (XEXP (x, 1)) == dest_reg))
5996 argp = &XEXP (x, 0);
6002 if (invariant_p (arg) != 1)
6005 *inc_val = convert_modes (GET_MODE (dest_reg), GET_MODE (x), arg, 0);
6006 *mult_val = const1_rtx;
6011 /* If this is a SUBREG for a promoted variable, check the inner
6013 if (SUBREG_PROMOTED_VAR_P (x))
6014 return basic_induction_var (SUBREG_REG (x), GET_MODE (SUBREG_REG (x)),
6015 dest_reg, p, inc_val, mult_val, location);
6019 /* If this register is assigned in a previous insn, look at its
6020 source, but don't go outside the loop or past a label. */
6027 insn = PREV_INSN (insn);
6028 } while (insn && GET_CODE (insn) == NOTE
6029 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6033 set = single_set (insn);
6037 dest = SET_DEST (set);
6039 || (GET_CODE (dest) == SUBREG
6040 && (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
6041 && (GET_MODE_CLASS (GET_MODE (dest)) == MODE_INT)
6042 && SUBREG_REG (dest) == x))
6043 return basic_induction_var (SET_SRC (set),
6044 (GET_MODE (SET_SRC (set)) == VOIDmode
6046 : GET_MODE (SET_SRC (set))),
6048 inc_val, mult_val, location);
6050 while (GET_CODE (dest) == SIGN_EXTRACT
6051 || GET_CODE (dest) == ZERO_EXTRACT
6052 || GET_CODE (dest) == SUBREG
6053 || GET_CODE (dest) == STRICT_LOW_PART)
6054 dest = XEXP (dest, 0);
6058 /* ... fall through ... */
6060 /* Can accept constant setting of biv only when inside inner most loop.
6061 Otherwise, a biv of an inner loop may be incorrectly recognized
6062 as a biv of the outer loop,
6063 causing code to be moved INTO the inner loop. */
6065 if (invariant_p (x) != 1)
6070 /* convert_modes aborts if we try to convert to or from CCmode, so just
6071 exclude that case. It is very unlikely that a condition code value
6072 would be a useful iterator anyways. */
6073 if (loops_enclosed == 1
6074 && GET_MODE_CLASS (mode) != MODE_CC
6075 && GET_MODE_CLASS (GET_MODE (dest_reg)) != MODE_CC)
6077 /* Possible bug here? Perhaps we don't know the mode of X. */
6078 *inc_val = convert_modes (GET_MODE (dest_reg), mode, x, 0);
6079 *mult_val = const0_rtx;
6086 return basic_induction_var (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
6087 dest_reg, p, inc_val, mult_val, location);
6090 /* Similar, since this can be a sign extension. */
6091 for (insn = PREV_INSN (p);
6092 (insn && GET_CODE (insn) == NOTE
6093 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG);
6094 insn = PREV_INSN (insn))
6098 set = single_set (insn);
6100 if (set && SET_DEST (set) == XEXP (x, 0)
6101 && GET_CODE (XEXP (x, 1)) == CONST_INT
6102 && INTVAL (XEXP (x, 1)) >= 0
6103 && GET_CODE (SET_SRC (set)) == ASHIFT
6104 && XEXP (x, 1) == XEXP (SET_SRC (set), 1))
6105 return basic_induction_var (XEXP (SET_SRC (set), 0),
6106 GET_MODE (XEXP (x, 0)),
6107 dest_reg, insn, inc_val, mult_val,
6116 /* A general induction variable (giv) is any quantity that is a linear
6117 function of a basic induction variable,
6118 i.e. giv = biv * mult_val + add_val.
6119 The coefficients can be any loop invariant quantity.
6120 A giv need not be computed directly from the biv;
6121 it can be computed by way of other givs. */
6123 /* Determine whether X computes a giv.
6124 If it does, return a nonzero value
6125 which is the benefit from eliminating the computation of X;
6126 set *SRC_REG to the register of the biv that it is computed from;
6127 set *ADD_VAL and *MULT_VAL to the coefficients,
6128 such that the value of X is biv * mult + add; */
6131 general_induction_var (x, src_reg, add_val, mult_val, is_addr, pbenefit)
6142 /* If this is an invariant, forget it, it isn't a giv. */
6143 if (invariant_p (x) == 1)
6146 /* See if the expression could be a giv and get its form.
6147 Mark our place on the obstack in case we don't find a giv. */
6148 storage = (char *) oballoc (0);
6150 x = simplify_giv_expr (x, pbenefit);
6157 switch (GET_CODE (x))
6161 /* Since this is now an invariant and wasn't before, it must be a giv
6162 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6164 *src_reg = loop_iv_list->biv->dest_reg;
6165 *mult_val = const0_rtx;
6170 /* This is equivalent to a BIV. */
6172 *mult_val = const1_rtx;
6173 *add_val = const0_rtx;
6177 /* Either (plus (biv) (invar)) or
6178 (plus (mult (biv) (invar_1)) (invar_2)). */
6179 if (GET_CODE (XEXP (x, 0)) == MULT)
6181 *src_reg = XEXP (XEXP (x, 0), 0);
6182 *mult_val = XEXP (XEXP (x, 0), 1);
6186 *src_reg = XEXP (x, 0);
6187 *mult_val = const1_rtx;
6189 *add_val = XEXP (x, 1);
6193 /* ADD_VAL is zero. */
6194 *src_reg = XEXP (x, 0);
6195 *mult_val = XEXP (x, 1);
6196 *add_val = const0_rtx;
6203 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6204 unless they are CONST_INT). */
6205 if (GET_CODE (*add_val) == USE)
6206 *add_val = XEXP (*add_val, 0);
6207 if (GET_CODE (*mult_val) == USE)
6208 *mult_val = XEXP (*mult_val, 0);
6210 #ifndef FRAME_GROWS_DOWNWARD
6211 if (flag_propolice_protection
6212 && GET_CODE (*add_val) == PLUS
6213 && (XEXP (*add_val, 0) == frame_pointer_rtx
6214 || XEXP (*add_val, 1) == frame_pointer_rtx))
6221 *pbenefit += ADDRESS_COST (orig_x) - reg_address_cost;
6223 *pbenefit += rtx_cost (orig_x, MEM) - reg_address_cost;
6227 *pbenefit += rtx_cost (orig_x, SET);
6229 /* Always return true if this is a giv so it will be detected as such,
6230 even if the benefit is zero or negative. This allows elimination
6231 of bivs that might otherwise not be eliminated. */
6235 /* Given an expression, X, try to form it as a linear function of a biv.
6236 We will canonicalize it to be of the form
6237 (plus (mult (BIV) (invar_1))
6239 with possible degeneracies.
6241 The invariant expressions must each be of a form that can be used as a
6242 machine operand. We surround then with a USE rtx (a hack, but localized
6243 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6244 routine; it is the caller's responsibility to strip them.
6246 If no such canonicalization is possible (i.e., two biv's are used or an
6247 expression that is neither invariant nor a biv or giv), this routine
6250 For a non-zero return, the result will have a code of CONST_INT, USE,
6251 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6253 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6255 static rtx sge_plus PROTO ((enum machine_mode, rtx, rtx));
6256 static rtx sge_plus_constant PROTO ((rtx, rtx));
6259 simplify_giv_expr (x, benefit)
6263 enum machine_mode mode = GET_MODE (x);
6267 /* If this is not an integer mode, or if we cannot do arithmetic in this
6268 mode, this can't be a giv. */
6269 if (mode != VOIDmode
6270 && (GET_MODE_CLASS (mode) != MODE_INT
6271 || GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT))
6274 switch (GET_CODE (x))
6277 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6278 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6279 if (arg0 == 0 || arg1 == 0)
6282 /* Put constant last, CONST_INT last if both constant. */
6283 if ((GET_CODE (arg0) == USE
6284 || GET_CODE (arg0) == CONST_INT)
6285 && ! ((GET_CODE (arg0) == USE
6286 && GET_CODE (arg1) == USE)
6287 || GET_CODE (arg1) == CONST_INT))
6288 tem = arg0, arg0 = arg1, arg1 = tem;
6290 /* Handle addition of zero, then addition of an invariant. */
6291 if (arg1 == const0_rtx)
6293 else if (GET_CODE (arg1) == CONST_INT || GET_CODE (arg1) == USE)
6294 switch (GET_CODE (arg0))
6298 /* Adding two invariants must result in an invariant, so enclose
6299 addition operation inside a USE and return it. */
6300 if (GET_CODE (arg0) == USE)
6301 arg0 = XEXP (arg0, 0);
6302 if (GET_CODE (arg1) == USE)
6303 arg1 = XEXP (arg1, 0);
6305 if (GET_CODE (arg0) == CONST_INT)
6306 tem = arg0, arg0 = arg1, arg1 = tem;
6307 if (GET_CODE (arg1) == CONST_INT)
6308 tem = sge_plus_constant (arg0, arg1);
6310 tem = sge_plus (mode, arg0, arg1);
6312 if (GET_CODE (tem) != CONST_INT)
6313 tem = gen_rtx_USE (mode, tem);
6318 /* biv + invar or mult + invar. Return sum. */
6319 return gen_rtx_PLUS (mode, arg0, arg1);
6322 /* (a + invar_1) + invar_2. Associate. */
6323 return simplify_giv_expr (
6324 gen_rtx_PLUS (mode, XEXP (arg0, 0),
6325 gen_rtx_PLUS (mode, XEXP (arg0, 1), arg1)),
6332 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6333 MULT to reduce cases. */
6334 if (GET_CODE (arg0) == REG)
6335 arg0 = gen_rtx_MULT (mode, arg0, const1_rtx);
6336 if (GET_CODE (arg1) == REG)
6337 arg1 = gen_rtx_MULT (mode, arg1, const1_rtx);
6339 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6340 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6341 Recurse to associate the second PLUS. */
6342 if (GET_CODE (arg1) == MULT)
6343 tem = arg0, arg0 = arg1, arg1 = tem;
6345 if (GET_CODE (arg1) == PLUS)
6346 return simplify_giv_expr (gen_rtx_PLUS (mode,
6347 gen_rtx_PLUS (mode, arg0,
6352 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6353 if (GET_CODE (arg0) != MULT || GET_CODE (arg1) != MULT)
6356 if (!rtx_equal_p (arg0, arg1))
6359 return simplify_giv_expr (gen_rtx_MULT (mode,
6367 /* Handle "a - b" as "a + b * (-1)". */
6368 return simplify_giv_expr (gen_rtx_PLUS (mode,
6370 gen_rtx_MULT (mode, XEXP (x, 1),
6375 arg0 = simplify_giv_expr (XEXP (x, 0), benefit);
6376 arg1 = simplify_giv_expr (XEXP (x, 1), benefit);
6377 if (arg0 == 0 || arg1 == 0)
6380 /* Put constant last, CONST_INT last if both constant. */
6381 if ((GET_CODE (arg0) == USE || GET_CODE (arg0) == CONST_INT)
6382 && GET_CODE (arg1) != CONST_INT)
6383 tem = arg0, arg0 = arg1, arg1 = tem;
6385 /* If second argument is not now constant, not giv. */
6386 if (GET_CODE (arg1) != USE && GET_CODE (arg1) != CONST_INT)
6389 /* Handle multiply by 0 or 1. */
6390 if (arg1 == const0_rtx)
6393 else if (arg1 == const1_rtx)
6396 switch (GET_CODE (arg0))
6399 /* biv * invar. Done. */
6400 return gen_rtx_MULT (mode, arg0, arg1);
6403 /* Product of two constants. */
6404 return GEN_INT (INTVAL (arg0) * INTVAL (arg1));
6407 /* invar * invar. It is a giv, but very few of these will
6408 actually pay off, so limit to simple registers. */
6409 if (GET_CODE (arg1) != CONST_INT)
6412 arg0 = XEXP (arg0, 0);
6413 if (GET_CODE (arg0) == REG)
6414 tem = gen_rtx_MULT (mode, arg0, arg1);
6415 else if (GET_CODE (arg0) == MULT
6416 && GET_CODE (XEXP (arg0, 0)) == REG
6417 && GET_CODE (XEXP (arg0, 1)) == CONST_INT)
6419 tem = gen_rtx_MULT (mode, XEXP (arg0, 0),
6420 GEN_INT (INTVAL (XEXP (arg0, 1))
6425 return gen_rtx_USE (mode, tem);
6428 /* (a * invar_1) * invar_2. Associate. */
6429 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (arg0, 0),
6436 /* (a + invar_1) * invar_2. Distribute. */
6437 return simplify_giv_expr (gen_rtx_PLUS (mode,
6451 /* Shift by constant is multiply by power of two. */
6452 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
6455 return simplify_giv_expr (gen_rtx_MULT (mode,
6457 GEN_INT ((HOST_WIDE_INT) 1
6458 << INTVAL (XEXP (x, 1)))),
6462 /* "-a" is "a * (-1)" */
6463 return simplify_giv_expr (gen_rtx_MULT (mode, XEXP (x, 0), constm1_rtx),
6467 /* "~a" is "-a - 1". Silly, but easy. */
6468 return simplify_giv_expr (gen_rtx_MINUS (mode,
6469 gen_rtx_NEG (mode, XEXP (x, 0)),
6474 /* Already in proper form for invariant. */
6478 /* If this is a new register, we can't deal with it. */
6479 if (REGNO (x) >= max_reg_before_loop)
6482 /* Check for biv or giv. */
6483 switch (REG_IV_TYPE (REGNO (x)))
6487 case GENERAL_INDUCT:
6489 struct induction *v = REG_IV_INFO (REGNO (x));
6491 /* Form expression from giv and add benefit. Ensure this giv
6492 can derive another and subtract any needed adjustment if so. */
6493 *benefit += v->benefit;
6497 tem = gen_rtx_PLUS (mode, gen_rtx_MULT (mode, v->src_reg,
6500 if (v->derive_adjustment)
6501 tem = gen_rtx_MINUS (mode, tem, v->derive_adjustment);
6502 return simplify_giv_expr (tem, benefit);
6506 /* If it isn't an induction variable, and it is invariant, we
6507 may be able to simplify things further by looking through
6508 the bits we just moved outside the loop. */
6509 if (invariant_p (x) == 1)
6513 for (m = the_movables; m ; m = m->next)
6514 if (rtx_equal_p (x, m->set_dest))
6516 /* Ok, we found a match. Substitute and simplify. */
6518 /* If we match another movable, we must use that, as
6519 this one is going away. */
6521 return simplify_giv_expr (m->match->set_dest, benefit);
6523 /* If consec is non-zero, this is a member of a group of
6524 instructions that were moved together. We handle this
6525 case only to the point of seeking to the last insn and
6526 looking for a REG_EQUAL. Fail if we don't find one. */
6531 do { tem = NEXT_INSN (tem); } while (--i > 0);
6533 tem = find_reg_note (tem, REG_EQUAL, NULL_RTX);
6535 tem = XEXP (tem, 0);
6539 tem = single_set (m->insn);
6541 tem = SET_SRC (tem);
6546 /* What we are most interested in is pointer
6547 arithmetic on invariants -- only take
6548 patterns we may be able to do something with. */
6549 if (GET_CODE (tem) == PLUS
6550 || GET_CODE (tem) == MULT
6551 || GET_CODE (tem) == ASHIFT
6552 || GET_CODE (tem) == CONST_INT
6553 || GET_CODE (tem) == SYMBOL_REF)
6555 tem = simplify_giv_expr (tem, benefit);
6559 else if (GET_CODE (tem) == CONST
6560 && GET_CODE (XEXP (tem, 0)) == PLUS
6561 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == SYMBOL_REF
6562 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)
6564 tem = simplify_giv_expr (XEXP (tem, 0), benefit);
6575 /* Fall through to general case. */
6577 /* If invariant, return as USE (unless CONST_INT).
6578 Otherwise, not giv. */
6579 if (GET_CODE (x) == USE)
6582 if (invariant_p (x) == 1)
6584 if (GET_CODE (x) == CONST_INT)
6586 if (GET_CODE (x) == CONST
6587 && GET_CODE (XEXP (x, 0)) == PLUS
6588 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
6589 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
6591 return gen_rtx_USE (mode, x);
6598 /* This routine folds invariants such that there is only ever one
6599 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6602 sge_plus_constant (x, c)
6605 if (GET_CODE (x) == CONST_INT)
6606 return GEN_INT (INTVAL (x) + INTVAL (c));
6607 else if (GET_CODE (x) != PLUS)
6608 return gen_rtx_PLUS (GET_MODE (x), x, c);
6609 else if (GET_CODE (XEXP (x, 1)) == CONST_INT)
6611 return gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0),
6612 GEN_INT (INTVAL (XEXP (x, 1)) + INTVAL (c)));
6614 else if (GET_CODE (XEXP (x, 0)) == PLUS
6615 || GET_CODE (XEXP (x, 1)) != PLUS)
6617 return gen_rtx_PLUS (GET_MODE (x),
6618 sge_plus_constant (XEXP (x, 0), c), XEXP (x, 1));
6622 return gen_rtx_PLUS (GET_MODE (x),
6623 sge_plus_constant (XEXP (x, 1), c), XEXP (x, 0));
6628 sge_plus (mode, x, y)
6629 enum machine_mode mode;
6632 while (GET_CODE (y) == PLUS)
6634 rtx a = XEXP (y, 0);
6635 if (GET_CODE (a) == CONST_INT)
6636 x = sge_plus_constant (x, a);
6638 x = gen_rtx_PLUS (mode, x, a);
6641 if (GET_CODE (y) == CONST_INT)
6642 x = sge_plus_constant (x, y);
6644 x = gen_rtx_PLUS (mode, x, y);
6648 /* Help detect a giv that is calculated by several consecutive insns;
6652 The caller has already identified the first insn P as having a giv as dest;
6653 we check that all other insns that set the same register follow
6654 immediately after P, that they alter nothing else,
6655 and that the result of the last is still a giv.
6657 The value is 0 if the reg set in P is not really a giv.
6658 Otherwise, the value is the amount gained by eliminating
6659 all the consecutive insns that compute the value.
6661 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6662 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6664 The coefficients of the ultimate giv value are stored in
6665 *MULT_VAL and *ADD_VAL. */
6668 consec_sets_giv (first_benefit, p, src_reg, dest_reg,
6669 add_val, mult_val, last_consec_insn)
6676 rtx *last_consec_insn;
6684 /* Indicate that this is a giv so that we can update the value produced in
6685 each insn of the multi-insn sequence.
6687 This induction structure will be used only by the call to
6688 general_induction_var below, so we can allocate it on our stack.
6689 If this is a giv, our caller will replace the induct var entry with
6690 a new induction structure. */
6692 = (struct induction *) alloca (sizeof (struct induction));
6693 v->src_reg = src_reg;
6694 v->mult_val = *mult_val;
6695 v->add_val = *add_val;
6696 v->benefit = first_benefit;
6698 v->derive_adjustment = 0;
6700 REG_IV_TYPE (REGNO (dest_reg)) = GENERAL_INDUCT;
6701 REG_IV_INFO (REGNO (dest_reg)) = v;
6703 count = VARRAY_INT (n_times_set, REGNO (dest_reg)) - 1;
6708 code = GET_CODE (p);
6710 /* If libcall, skip to end of call sequence. */
6711 if (code == INSN && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX)))
6715 && (set = single_set (p))
6716 && GET_CODE (SET_DEST (set)) == REG
6717 && SET_DEST (set) == dest_reg
6718 && (general_induction_var (SET_SRC (set), &src_reg,
6719 add_val, mult_val, 0, &benefit)
6720 /* Giv created by equivalent expression. */
6721 || ((temp = find_reg_note (p, REG_EQUAL, NULL_RTX))
6722 && general_induction_var (XEXP (temp, 0), &src_reg,
6723 add_val, mult_val, 0, &benefit)))
6724 && src_reg == v->src_reg)
6726 if (find_reg_note (p, REG_RETVAL, NULL_RTX))
6727 benefit += libcall_benefit (p);
6730 v->mult_val = *mult_val;
6731 v->add_val = *add_val;
6732 v->benefit = benefit;
6734 else if (code != NOTE)
6736 /* Allow insns that set something other than this giv to a
6737 constant. Such insns are needed on machines which cannot
6738 include long constants and should not disqualify a giv. */
6740 && (set = single_set (p))
6741 && SET_DEST (set) != dest_reg
6742 && CONSTANT_P (SET_SRC (set)))
6745 REG_IV_TYPE (REGNO (dest_reg)) = UNKNOWN_INDUCT;
6750 *last_consec_insn = p;
6754 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6755 represented by G1. If no such expression can be found, or it is clear that
6756 it cannot possibly be a valid address, 0 is returned.
6758 To perform the computation, we note that
6761 where `v' is the biv.
6763 So G2 = (y/b) * G1 + (b - a*y/x).
6765 Note that MULT = y/x.
6767 Update: A and B are now allowed to be additive expressions such that
6768 B contains all variables in A. That is, computing B-A will not require
6769 subtracting variables. */
6772 express_from_1 (a, b, mult)
6775 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6777 if (mult == const0_rtx)
6780 /* If MULT is not 1, we cannot handle A with non-constants, since we
6781 would then be required to subtract multiples of the registers in A.
6782 This is theoretically possible, and may even apply to some Fortran
6783 constructs, but it is a lot of work and we do not attempt it here. */
6785 if (mult != const1_rtx && GET_CODE (a) != CONST_INT)
6788 /* In general these structures are sorted top to bottom (down the PLUS
6789 chain), but not left to right across the PLUS. If B is a higher
6790 order giv than A, we can strip one level and recurse. If A is higher
6791 order, we'll eventually bail out, but won't know that until the end.
6792 If they are the same, we'll strip one level around this loop. */
6794 while (GET_CODE (a) == PLUS && GET_CODE (b) == PLUS)
6796 rtx ra, rb, oa, ob, tmp;
6798 ra = XEXP (a, 0), oa = XEXP (a, 1);
6799 if (GET_CODE (ra) == PLUS)
6800 tmp = ra, ra = oa, oa = tmp;
6802 rb = XEXP (b, 0), ob = XEXP (b, 1);
6803 if (GET_CODE (rb) == PLUS)
6804 tmp = rb, rb = ob, ob = tmp;
6806 if (rtx_equal_p (ra, rb))
6807 /* We matched: remove one reg completely. */
6809 else if (GET_CODE (ob) != PLUS && rtx_equal_p (ra, ob))
6810 /* An alternate match. */
6812 else if (GET_CODE (oa) != PLUS && rtx_equal_p (oa, rb))
6813 /* An alternate match. */
6817 /* Indicates an extra register in B. Strip one level from B and
6818 recurse, hoping B was the higher order expression. */
6819 ob = express_from_1 (a, ob, mult);
6822 return gen_rtx_PLUS (GET_MODE (b), rb, ob);
6826 /* Here we are at the last level of A, go through the cases hoping to
6827 get rid of everything but a constant. */
6829 if (GET_CODE (a) == PLUS)
6833 ra = XEXP (a, 0), oa = XEXP (a, 1);
6834 if (rtx_equal_p (oa, b))
6836 else if (!rtx_equal_p (ra, b))
6839 if (GET_CODE (oa) != CONST_INT)
6842 return GEN_INT (-INTVAL (oa) * INTVAL (mult));
6844 else if (GET_CODE (a) == CONST_INT)
6846 return plus_constant (b, -INTVAL (a) * INTVAL (mult));
6848 else if (GET_CODE (b) == PLUS)
6850 if (rtx_equal_p (a, XEXP (b, 0)))
6852 else if (rtx_equal_p (a, XEXP (b, 1)))
6857 else if (rtx_equal_p (a, b))
6864 express_from (g1, g2)
6865 struct induction *g1, *g2;
6869 /* The value that G1 will be multiplied by must be a constant integer. Also,
6870 the only chance we have of getting a valid address is if b*c/a (see above
6871 for notation) is also an integer. */
6872 if (GET_CODE (g1->mult_val) == CONST_INT
6873 && GET_CODE (g2->mult_val) == CONST_INT)
6875 if (g1->mult_val == const0_rtx
6876 || INTVAL (g2->mult_val) % INTVAL (g1->mult_val) != 0)
6878 mult = GEN_INT (INTVAL (g2->mult_val) / INTVAL (g1->mult_val));
6880 else if (rtx_equal_p (g1->mult_val, g2->mult_val))
6884 /* ??? Find out if the one is a multiple of the other? */
6888 add = express_from_1 (g1->add_val, g2->add_val, mult);
6889 if (add == NULL_RTX)
6892 /* Form simplified final result. */
6893 if (mult == const0_rtx)
6895 else if (mult == const1_rtx)
6896 mult = g1->dest_reg;
6898 mult = gen_rtx_MULT (g2->mode, g1->dest_reg, mult);
6900 if (add == const0_rtx)
6904 if (GET_CODE (add) == PLUS
6905 && CONSTANT_P (XEXP (add, 1)))
6907 rtx tem = XEXP (add, 1);
6908 mult = gen_rtx_PLUS (g2->mode, mult, XEXP (add, 0));
6912 return gen_rtx_PLUS (g2->mode, mult, add);
6917 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6918 represented by G1. This indicates that G2 should be combined with G1 and
6919 that G2 can use (either directly or via an address expression) a register
6920 used to represent G1. */
6923 combine_givs_p (g1, g2)
6924 struct induction *g1, *g2;
6926 rtx tem = express_from (g1, g2);
6928 /* If these givs are identical, they can be combined. We use the results
6929 of express_from because the addends are not in a canonical form, so
6930 rtx_equal_p is a weaker test. */
6931 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
6932 combination to be the other way round. */
6933 if (tem == g1->dest_reg
6934 && (g1->giv_type == DEST_REG || g2->giv_type == DEST_ADDR))
6936 return g1->dest_reg;
6939 /* If G2 can be expressed as a function of G1 and that function is valid
6940 as an address and no more expensive than using a register for G2,
6941 the expression of G2 in terms of G1 can be used. */
6943 && g2->giv_type == DEST_ADDR
6944 && memory_address_p (g2->mem_mode, tem)
6945 /* ??? Looses, especially with -fforce-addr, where *g2->location
6946 will always be a register, and so anything more complicated
6950 && ADDRESS_COST (tem) <= ADDRESS_COST (*g2->location)
6952 && rtx_cost (tem, MEM) <= rtx_cost (*g2->location, MEM)
6963 struct combine_givs_stats
6970 cmp_combine_givs_stats (x, y)
6971 struct combine_givs_stats *x, *y;
6974 d = y->total_benefit - x->total_benefit;
6975 /* Stabilize the sort. */
6977 d = x->giv_number - y->giv_number;
6981 /* Check all pairs of givs for iv_class BL and see if any can be combined with
6982 any other. If so, point SAME to the giv combined with and set NEW_REG to
6983 be an expression (in terms of the other giv's DEST_REG) equivalent to the
6984 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
6988 struct iv_class *bl;
6990 /* Additional benefit to add for being combined multiple times. */
6991 const int extra_benefit = 3;
6993 struct induction *g1, *g2, **giv_array;
6994 int i, j, k, giv_count;
6995 struct combine_givs_stats *stats;
6998 /* Count givs, because bl->giv_count is incorrect here. */
7000 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7005 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7007 for (g1 = bl->giv; g1; g1 = g1->next_iv)
7009 giv_array[i++] = g1;
7011 stats = (struct combine_givs_stats *) alloca (giv_count * sizeof (*stats));
7012 bzero ((char *) stats, giv_count * sizeof (*stats));
7014 can_combine = (rtx *) alloca (giv_count * giv_count * sizeof(rtx));
7015 bzero ((char *) can_combine, giv_count * giv_count * sizeof(rtx));
7017 for (i = 0; i < giv_count; i++)
7023 stats[i].giv_number = i;
7025 /* If a DEST_REG GIV is used only once, do not allow it to combine
7026 with anything, for in doing so we will gain nothing that cannot
7027 be had by simply letting the GIV with which we would have combined
7028 to be reduced on its own. The losage shows up in particular with
7029 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7030 be seen elsewhere as well. */
7031 if (g1->giv_type == DEST_REG
7032 && (single_use = VARRAY_RTX (reg_single_usage, REGNO (g1->dest_reg)))
7033 && single_use != const0_rtx)
7036 this_benefit = g1->benefit;
7037 /* Add an additional weight for zero addends. */
7038 if (g1->no_const_addval)
7041 for (j = 0; j < giv_count; j++)
7047 && (this_combine = combine_givs_p (g1, g2)) != NULL_RTX)
7049 can_combine[i*giv_count + j] = this_combine;
7050 this_benefit += g2->benefit + extra_benefit;
7053 stats[i].total_benefit = this_benefit;
7056 /* Iterate, combining until we can't. */
7058 qsort (stats, giv_count, sizeof(*stats), cmp_combine_givs_stats);
7060 if (loop_dump_stream)
7062 fprintf (loop_dump_stream, "Sorted combine statistics:\n");
7063 for (k = 0; k < giv_count; k++)
7065 g1 = giv_array[stats[k].giv_number];
7066 if (!g1->combined_with && !g1->same)
7067 fprintf (loop_dump_stream, " {%d, %d}",
7068 INSN_UID (giv_array[stats[k].giv_number]->insn),
7069 stats[k].total_benefit);
7071 putc ('\n', loop_dump_stream);
7074 for (k = 0; k < giv_count; k++)
7076 int g1_add_benefit = 0;
7078 i = stats[k].giv_number;
7081 /* If it has already been combined, skip. */
7082 if (g1->combined_with || g1->same)
7085 for (j = 0; j < giv_count; j++)
7088 if (g1 != g2 && can_combine[i*giv_count + j]
7089 /* If it has already been combined, skip. */
7090 && ! g2->same && ! g2->combined_with)
7094 g2->new_reg = can_combine[i*giv_count + j];
7096 g1->combined_with++;
7097 g1->lifetime += g2->lifetime;
7099 g1_add_benefit += g2->benefit;
7101 /* ??? The new final_[bg]iv_value code does a much better job
7102 of finding replaceable giv's, and hence this code may no
7103 longer be necessary. */
7104 if (! g2->replaceable && REG_USERVAR_P (g2->dest_reg))
7105 g1_add_benefit -= copy_cost;
7107 /* To help optimize the next set of combinations, remove
7108 this giv from the benefits of other potential mates. */
7109 for (l = 0; l < giv_count; ++l)
7111 int m = stats[l].giv_number;
7112 if (can_combine[m*giv_count + j])
7113 stats[l].total_benefit -= g2->benefit + extra_benefit;
7116 if (loop_dump_stream)
7117 fprintf (loop_dump_stream,
7118 "giv at %d combined with giv at %d\n",
7119 INSN_UID (g2->insn), INSN_UID (g1->insn));
7123 /* To help optimize the next set of combinations, remove
7124 this giv from the benefits of other potential mates. */
7125 if (g1->combined_with)
7127 for (j = 0; j < giv_count; ++j)
7129 int m = stats[j].giv_number;
7130 if (can_combine[m*giv_count + i])
7131 stats[j].total_benefit -= g1->benefit + extra_benefit;
7134 g1->benefit += g1_add_benefit;
7136 /* We've finished with this giv, and everything it touched.
7137 Restart the combination so that proper weights for the
7138 rest of the givs are properly taken into account. */
7139 /* ??? Ideally we would compact the arrays at this point, so
7140 as to not cover old ground. But sanely compacting
7141 can_combine is tricky. */
7147 struct recombine_givs_stats
7150 int start_luid, end_luid;
7153 /* Used below as comparison function for qsort. We want a ascending luid
7154 when scanning the array starting at the end, thus the arguments are
7157 cmp_recombine_givs_stats (x, y)
7158 struct recombine_givs_stats *x, *y;
7161 d = y->start_luid - x->start_luid;
7162 /* Stabilize the sort. */
7164 d = y->giv_number - x->giv_number;
7168 /* Scan X, which is a part of INSN, for the end of life of a giv. Also
7169 look for the start of life of a giv where the start has not been seen
7170 yet to unlock the search for the end of its life.
7171 Only consider givs that belong to BIV.
7172 Return the total number of lifetime ends that have been found. */
7174 find_life_end (x, stats, insn, biv)
7176 struct recombine_givs_stats *stats;
7183 code = GET_CODE (x);
7188 rtx reg = SET_DEST (x);
7189 if (GET_CODE (reg) == REG)
7191 int regno = REGNO (reg);
7192 struct induction *v = REG_IV_INFO (regno);
7194 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7196 && v->src_reg == biv
7197 && stats[v->ix].end_luid <= 0)
7199 /* If we see a 0 here for end_luid, it means that we have
7200 scanned the entire loop without finding any use at all.
7201 We must not predicate this code on a start_luid match
7202 since that would make the test fail for givs that have
7203 been hoisted out of inner loops. */
7204 if (stats[v->ix].end_luid == 0)
7206 stats[v->ix].end_luid = stats[v->ix].start_luid;
7207 return 1 + find_life_end (SET_SRC (x), stats, insn, biv);
7209 else if (stats[v->ix].start_luid == INSN_LUID (insn))
7210 stats[v->ix].end_luid = 0;
7212 return find_life_end (SET_SRC (x), stats, insn, biv);
7218 int regno = REGNO (x);
7219 struct induction *v = REG_IV_INFO (regno);
7221 if (REG_IV_TYPE (regno) == GENERAL_INDUCT
7223 && v->src_reg == biv
7224 && stats[v->ix].end_luid == 0)
7226 while (INSN_UID (insn) >= max_uid_for_loop)
7227 insn = NEXT_INSN (insn);
7228 stats[v->ix].end_luid = INSN_LUID (insn);
7241 fmt = GET_RTX_FORMAT (code);
7243 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7246 retval += find_life_end (XEXP (x, i), stats, insn, biv);
7248 else if (fmt[i] == 'E')
7249 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7250 retval += find_life_end (XVECEXP (x, i, j), stats, insn, biv);
7255 /* For each giv that has been combined with another, look if
7256 we can combine it with the most recently used one instead.
7257 This tends to shorten giv lifetimes, and helps the next step:
7258 try to derive givs from other givs. */
7260 recombine_givs (bl, loop_start, loop_end, unroll_p)
7261 struct iv_class *bl;
7262 rtx loop_start, loop_end;
7265 struct induction *v, **giv_array, *last_giv;
7266 struct recombine_givs_stats *stats;
7269 int ends_need_computing;
7271 for (giv_count = 0, v = bl->giv; v; v = v->next_iv)
7277 = (struct induction **) alloca (giv_count * sizeof (struct induction *));
7278 stats = (struct recombine_givs_stats *) alloca (giv_count * sizeof *stats);
7280 /* Initialize stats and set up the ix field for each giv in stats to name
7281 the corresponding index into stats. */
7282 for (i = 0, v = bl->giv; v; v = v->next_iv)
7289 stats[i].giv_number = i;
7290 /* If this giv has been hoisted out of an inner loop, use the luid of
7291 the previous insn. */
7292 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7294 stats[i].start_luid = INSN_LUID (p);
7299 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7301 /* Do the actual most-recently-used recombination. */
7302 for (last_giv = 0, i = giv_count - 1; i >= 0; i--)
7304 v = giv_array[stats[i].giv_number];
7307 struct induction *old_same = v->same;
7310 /* combine_givs_p actually says if we can make this transformation.
7311 The other tests are here only to avoid keeping a giv alive
7312 that could otherwise be eliminated. */
7314 && ((old_same->maybe_dead && ! old_same->combined_with)
7315 || ! last_giv->maybe_dead
7316 || last_giv->combined_with)
7317 && (new_combine = combine_givs_p (last_giv, v)))
7319 old_same->combined_with--;
7320 v->new_reg = new_combine;
7322 last_giv->combined_with++;
7323 /* No need to update lifetimes / benefits here since we have
7324 already decided what to reduce. */
7326 if (loop_dump_stream)
7328 fprintf (loop_dump_stream,
7329 "giv at %d recombined with giv at %d as ",
7330 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7331 print_rtl (loop_dump_stream, v->new_reg);
7332 putc ('\n', loop_dump_stream);
7338 else if (v->giv_type != DEST_REG)
7341 || (last_giv->maybe_dead && ! last_giv->combined_with)
7343 || v->combined_with)
7347 ends_need_computing = 0;
7348 /* For each DEST_REG giv, compute lifetime starts, and try to compute
7349 lifetime ends from regscan info. */
7350 for (i = 0, v = bl->giv; v; v = v->next_iv)
7354 if (v->giv_type == DEST_ADDR)
7356 /* Loop unrolling of an inner loop can even create new DEST_REG
7359 for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
7361 stats[i].start_luid = stats[i].end_luid = INSN_LUID (p);
7363 stats[i].end_luid++;
7365 else /* v->giv_type == DEST_REG */
7369 stats[i].start_luid = INSN_LUID (v->insn);
7370 stats[i].end_luid = INSN_LUID (v->last_use);
7372 else if (INSN_UID (v->insn) >= max_uid_for_loop)
7375 /* This insn has been created by loop optimization on an inner
7376 loop. We don't have a proper start_luid that will match
7377 when we see the first set. But we do know that there will
7378 be no use before the set, so we can set end_luid to 0 so that
7379 we'll start looking for the last use right away. */
7380 for (p = PREV_INSN (v->insn); INSN_UID (p) >= max_uid_for_loop; )
7382 stats[i].start_luid = INSN_LUID (p);
7383 stats[i].end_luid = 0;
7384 ends_need_computing++;
7388 int regno = REGNO (v->dest_reg);
7389 int count = VARRAY_INT (n_times_set, regno) - 1;
7392 /* Find the first insn that sets the giv, so that we can verify
7393 if this giv's lifetime wraps around the loop. We also need
7394 the luid of the first setting insn in order to detect the
7395 last use properly. */
7398 p = prev_nonnote_insn (p);
7399 if (reg_set_p (v->dest_reg, p))
7403 stats[i].start_luid = INSN_LUID (p);
7404 if (stats[i].start_luid > uid_luid[REGNO_FIRST_UID (regno)])
7406 stats[i].end_luid = -1;
7407 ends_need_computing++;
7411 stats[i].end_luid = uid_luid[REGNO_LAST_UID (regno)];
7412 if (stats[i].end_luid > INSN_LUID (loop_end))
7414 stats[i].end_luid = -1;
7415 ends_need_computing++;
7423 /* If the regscan information was unconclusive for one or more DEST_REG
7424 givs, scan the all insn in the loop to find out lifetime ends. */
7425 if (ends_need_computing)
7427 rtx biv = bl->biv->src_reg;
7432 if (p == loop_start)
7435 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
7437 ends_need_computing -= find_life_end (PATTERN (p), stats, p, biv);
7439 while (ends_need_computing);
7442 /* Set start_luid back to the last insn that sets the giv. This allows
7443 more combinations. */
7444 for (i = 0, v = bl->giv; v; v = v->next_iv)
7448 if (INSN_UID (v->insn) < max_uid_for_loop)
7449 stats[i].start_luid = INSN_LUID (v->insn);
7453 /* Now adjust lifetime ends by taking combined givs into account. */
7454 for (i = 0, v = bl->giv; v; v = v->next_iv)
7461 if (v->same && ! v->same->ignore)
7464 luid = stats[i].start_luid;
7465 /* Use unsigned arithmetic to model loop wrap-around. */
7466 if (luid - stats[j].start_luid
7467 > (unsigned) stats[j].end_luid - stats[j].start_luid)
7468 stats[j].end_luid = luid;
7473 qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
7475 /* Try to derive DEST_REG givs from previous DEST_REG givs with the
7476 same mult_val and non-overlapping lifetime. This reduces register
7478 Once we find a DEST_REG giv that is suitable to derive others from,
7479 we set last_giv to this giv, and try to derive as many other DEST_REG
7480 givs from it without joining overlapping lifetimes. If we then
7481 encounter a DEST_REG giv that we can't derive, we set rescan to the
7482 index for this giv (unless rescan is already set).
7483 When we are finished with the current LAST_GIV (i.e. the inner loop
7484 terminates), we start again with rescan, which then becomes the new
7486 for (i = giv_count - 1; i >= 0; i = rescan)
7488 int life_start, life_end;
7490 for (last_giv = 0, rescan = -1; i >= 0; i--)
7494 v = giv_array[stats[i].giv_number];
7495 if (v->giv_type != DEST_REG || v->derived_from || v->same)
7499 /* Don't use a giv that's likely to be dead to derive
7500 others - that would be likely to keep that giv alive. */
7501 if (! v->maybe_dead || v->combined_with)
7504 life_start = stats[i].start_luid;
7505 life_end = stats[i].end_luid;
7509 /* Use unsigned arithmetic to model loop wrap around. */
7510 if (((unsigned) stats[i].start_luid - life_start
7511 >= (unsigned) life_end - life_start)
7512 && ((unsigned) stats[i].end_luid - life_start
7513 > (unsigned) life_end - life_start)
7514 /* Check that the giv insn we're about to use for deriving
7515 precedes all uses of that giv. Note that initializing the
7516 derived giv would defeat the purpose of reducing register
7518 ??? We could arrange to move the insn. */
7519 && ((unsigned) stats[i].end_luid - INSN_LUID (loop_start)
7520 > (unsigned) stats[i].start_luid - INSN_LUID (loop_start))
7521 && rtx_equal_p (last_giv->mult_val, v->mult_val)
7522 /* ??? Could handle libcalls, but would need more logic. */
7523 && ! find_reg_note (v->insn, REG_RETVAL, NULL_RTX)
7524 /* We would really like to know if for any giv that v
7525 is combined with, v->insn or any intervening biv increment
7526 dominates that combined giv. However, we
7527 don't have this detailed control flow information.
7528 N.B. since last_giv will be reduced, it is valid
7529 anywhere in the loop, so we don't need to check the
7530 validity of last_giv.
7531 We rely here on the fact that v->always_executed implies that
7532 there is no jump to someplace else in the loop before the
7533 giv insn, and hence any insn that is executed before the
7534 giv insn in the loop will have a lower luid. */
7535 && (v->always_executed || ! v->combined_with)
7536 && (sum = express_from (last_giv, v))
7537 /* Make sure we don't make the add more expensive. ADD_COST
7538 doesn't take different costs of registers and constants into
7539 account, so compare the cost of the actual SET_SRCs. */
7540 && (rtx_cost (sum, SET)
7541 <= rtx_cost (SET_SRC (single_set (v->insn)), SET))
7542 /* ??? unroll can't understand anything but reg + const_int
7543 sums. It would be cleaner to fix unroll. */
7544 && ((GET_CODE (sum) == PLUS
7545 && GET_CODE (XEXP (sum, 0)) == REG
7546 && GET_CODE (XEXP (sum, 1)) == CONST_INT)
7548 && validate_change (v->insn, &PATTERN (v->insn),
7549 gen_rtx_SET (VOIDmode, v->dest_reg, sum), 0))
7551 v->derived_from = last_giv;
7552 life_end = stats[i].end_luid;
7554 if (loop_dump_stream)
7556 fprintf (loop_dump_stream,
7557 "giv at %d derived from %d as ",
7558 INSN_UID (v->insn), INSN_UID (last_giv->insn));
7559 print_rtl (loop_dump_stream, sum);
7560 putc ('\n', loop_dump_stream);
7563 else if (rescan < 0)
7569 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7572 emit_iv_add_mult (b, m, a, reg, insert_before)
7573 rtx b; /* initial value of basic induction variable */
7574 rtx m; /* multiplicative constant */
7575 rtx a; /* additive constant */
7576 rtx reg; /* destination register */
7582 /* Prevent unexpected sharing of these rtx. */
7586 /* Increase the lifetime of any invariants moved further in code. */
7587 update_reg_last_use (a, insert_before);
7588 update_reg_last_use (b, insert_before);
7589 update_reg_last_use (m, insert_before);
7592 result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 0);
7594 emit_move_insn (reg, result);
7595 seq = gen_sequence ();
7598 emit_insn_before (seq, insert_before);
7600 /* It is entirely possible that the expansion created lots of new
7601 registers. Iterate over the sequence we just created and
7604 if (GET_CODE (seq) == SEQUENCE)
7607 for (i = 0; i < XVECLEN (seq, 0); ++i)
7609 rtx set = single_set (XVECEXP (seq, 0, i));
7610 if (set && GET_CODE (SET_DEST (set)) == REG)
7611 record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
7614 else if (GET_CODE (seq) == SET
7615 && GET_CODE (SET_DEST (seq)) == REG)
7616 record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
7619 /* Test whether A * B can be computed without
7620 an actual multiply insn. Value is 1 if so. */
7623 product_cheap_p (a, b)
7629 struct obstack *old_rtl_obstack = rtl_obstack;
7630 char *storage = (char *) obstack_alloc (&temp_obstack, 0);
7633 /* If only one is constant, make it B. */
7634 if (GET_CODE (a) == CONST_INT)
7635 tmp = a, a = b, b = tmp;
7637 /* If first constant, both constant, so don't need multiply. */
7638 if (GET_CODE (a) == CONST_INT)
7641 /* If second not constant, neither is constant, so would need multiply. */
7642 if (GET_CODE (b) != CONST_INT)
7645 /* One operand is constant, so might not need multiply insn. Generate the
7646 code for the multiply and see if a call or multiply, or long sequence
7647 of insns is generated. */
7649 rtl_obstack = &temp_obstack;
7651 expand_mult (GET_MODE (a), a, b, NULL_RTX, 0);
7652 tmp = gen_sequence ();
7655 if (GET_CODE (tmp) == SEQUENCE)
7657 if (XVEC (tmp, 0) == 0)
7659 else if (XVECLEN (tmp, 0) > 3)
7662 for (i = 0; i < XVECLEN (tmp, 0); i++)
7664 rtx insn = XVECEXP (tmp, 0, i);
7666 if (GET_CODE (insn) != INSN
7667 || (GET_CODE (PATTERN (insn)) == SET
7668 && GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
7669 || (GET_CODE (PATTERN (insn)) == PARALLEL
7670 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
7671 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
7678 else if (GET_CODE (tmp) == SET
7679 && GET_CODE (SET_SRC (tmp)) == MULT)
7681 else if (GET_CODE (tmp) == PARALLEL
7682 && GET_CODE (XVECEXP (tmp, 0, 0)) == SET
7683 && GET_CODE (SET_SRC (XVECEXP (tmp, 0, 0))) == MULT)
7686 /* Free any storage we obtained in generating this multiply and restore rtl
7687 allocation to its normal obstack. */
7688 obstack_free (&temp_obstack, storage);
7689 rtl_obstack = old_rtl_obstack;
7694 /* Check to see if loop can be terminated by a "decrement and branch until
7695 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7696 Also try reversing an increment loop to a decrement loop
7697 to see if the optimization can be performed.
7698 Value is nonzero if optimization was performed. */
7700 /* This is useful even if the architecture doesn't have such an insn,
7701 because it might change a loops which increments from 0 to n to a loop
7702 which decrements from n to 0. A loop that decrements to zero is usually
7703 faster than one that increments from zero. */
7705 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7706 such as approx_final_value, biv_total_increment, loop_iterations, and
7707 final_[bg]iv_value. */
7710 check_dbra_loop (loop_end, insn_count, loop_start, loop_info)
7714 struct loop_info *loop_info;
7716 struct iv_class *bl;
7723 rtx before_comparison;
7727 int compare_and_branch;
7729 /* If last insn is a conditional branch, and the insn before tests a
7730 register value, try to optimize it. Otherwise, we can't do anything. */
7732 jump = PREV_INSN (loop_end);
7733 comparison = get_condition_for_loop (jump);
7734 if (comparison == 0)
7737 /* Try to compute whether the compare/branch at the loop end is one or
7738 two instructions. */
7739 get_condition (jump, &first_compare);
7740 if (first_compare == jump)
7741 compare_and_branch = 1;
7742 else if (first_compare == prev_nonnote_insn (jump))
7743 compare_and_branch = 2;
7747 /* Check all of the bivs to see if the compare uses one of them.
7748 Skip biv's set more than once because we can't guarantee that
7749 it will be zero on the last iteration. Also skip if the biv is
7750 used between its update and the test insn. */
7752 for (bl = loop_iv_list; bl; bl = bl->next)
7754 if (bl->biv_count == 1
7755 && ! bl->biv->maybe_multiple
7756 && bl->biv->dest_reg == XEXP (comparison, 0)
7757 && ! reg_used_between_p (regno_reg_rtx[bl->regno], bl->biv->insn,
7765 /* Look for the case where the basic induction variable is always
7766 nonnegative, and equals zero on the last iteration.
7767 In this case, add a reg_note REG_NONNEG, which allows the
7768 m68k DBRA instruction to be used. */
7770 if (((GET_CODE (comparison) == GT
7771 && GET_CODE (XEXP (comparison, 1)) == CONST_INT
7772 && INTVAL (XEXP (comparison, 1)) == -1)
7773 || (GET_CODE (comparison) == NE && XEXP (comparison, 1) == const0_rtx))
7774 && GET_CODE (bl->biv->add_val) == CONST_INT
7775 && INTVAL (bl->biv->add_val) < 0)
7777 /* Initial value must be greater than 0,
7778 init_val % -dec_value == 0 to ensure that it equals zero on
7779 the last iteration */
7781 if (GET_CODE (bl->initial_value) == CONST_INT
7782 && INTVAL (bl->initial_value) > 0
7783 && (INTVAL (bl->initial_value)
7784 % (-INTVAL (bl->biv->add_val))) == 0)
7786 /* register always nonnegative, add REG_NOTE to branch */
7787 REG_NOTES (PREV_INSN (loop_end))
7788 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7789 REG_NOTES (PREV_INSN (loop_end)));
7795 /* If the decrement is 1 and the value was tested as >= 0 before
7796 the loop, then we can safely optimize. */
7797 for (p = loop_start; p; p = PREV_INSN (p))
7799 if (GET_CODE (p) == CODE_LABEL)
7801 if (GET_CODE (p) != JUMP_INSN)
7804 before_comparison = get_condition_for_loop (p);
7805 if (before_comparison
7806 && XEXP (before_comparison, 0) == bl->biv->dest_reg
7807 && GET_CODE (before_comparison) == LT
7808 && XEXP (before_comparison, 1) == const0_rtx
7809 && ! reg_set_between_p (bl->biv->dest_reg, p, loop_start)
7810 && INTVAL (bl->biv->add_val) == -1)
7812 REG_NOTES (PREV_INSN (loop_end))
7813 = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
7814 REG_NOTES (PREV_INSN (loop_end)));
7821 else if (GET_CODE (bl->biv->add_val) == CONST_INT
7822 && INTVAL (bl->biv->add_val) > 0)
7824 /* Try to change inc to dec, so can apply above optimization. */
7826 all registers modified are induction variables or invariant,
7827 all memory references have non-overlapping addresses
7828 (obviously true if only one write)
7829 allow 2 insns for the compare/jump at the end of the loop. */
7830 /* Also, we must avoid any instructions which use both the reversed
7831 biv and another biv. Such instructions will fail if the loop is
7832 reversed. We meet this condition by requiring that either
7833 no_use_except_counting is true, or else that there is only
7835 int num_nonfixed_reads = 0;
7836 /* 1 if the iteration var is used only to count iterations. */
7837 int no_use_except_counting = 0;
7838 /* 1 if the loop has no memory store, or it has a single memory store
7839 which is reversible. */
7840 int reversible_mem_store = 1;
7842 if (bl->giv_count == 0
7843 && ! loop_number_exit_count[uid_loop_num[INSN_UID (loop_start)]])
7845 rtx bivreg = regno_reg_rtx[bl->regno];
7847 /* If there are no givs for this biv, and the only exit is the
7848 fall through at the end of the loop, then
7849 see if perhaps there are no uses except to count. */
7850 no_use_except_counting = 1;
7851 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7852 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
7854 rtx set = single_set (p);
7856 if (set && GET_CODE (SET_DEST (set)) == REG
7857 && REGNO (SET_DEST (set)) == bl->regno)
7858 /* An insn that sets the biv is okay. */
7860 else if ((p == prev_nonnote_insn (prev_nonnote_insn (loop_end))
7861 || p == prev_nonnote_insn (loop_end))
7862 && reg_mentioned_p (bivreg, PATTERN (p)))
7864 /* If either of these insns uses the biv and sets a pseudo
7865 that has more than one usage, then the biv has uses
7866 other than counting since it's used to derive a value
7867 that is used more than one time. */
7868 note_set_pseudo_multiple_uses_retval = 0;
7869 note_stores (PATTERN (p), note_set_pseudo_multiple_uses);
7870 if (note_set_pseudo_multiple_uses_retval)
7872 no_use_except_counting = 0;
7876 else if (reg_mentioned_p (bivreg, PATTERN (p)))
7878 no_use_except_counting = 0;
7884 if (no_use_except_counting)
7885 ; /* no need to worry about MEMs. */
7886 else if (num_mem_sets <= 1)
7888 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
7889 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
7890 num_nonfixed_reads += count_nonfixed_reads (PATTERN (p));
7892 /* If the loop has a single store, and the destination address is
7893 invariant, then we can't reverse the loop, because this address
7894 might then have the wrong value at loop exit.
7895 This would work if the source was invariant also, however, in that
7896 case, the insn should have been moved out of the loop. */
7898 if (num_mem_sets == 1)
7900 struct induction *v;
7902 reversible_mem_store
7903 = (! unknown_address_altered
7904 && ! invariant_p (XEXP (XEXP (loop_store_mems, 0), 0)));
7906 /* If the store depends on a register that is set after the
7907 store, it depends on the initial value, and is thus not
7909 for (v = bl->giv; reversible_mem_store && v; v = v->next_iv)
7911 if (v->giv_type == DEST_REG
7912 && reg_mentioned_p (v->dest_reg,
7913 PATTERN (first_loop_store_insn))
7914 && loop_insn_first_p (first_loop_store_insn, v->insn))
7915 reversible_mem_store = 0;
7922 /* This code only acts for innermost loops. Also it simplifies
7923 the memory address check by only reversing loops with
7924 zero or one memory access.
7925 Two memory accesses could involve parts of the same array,
7926 and that can't be reversed.
7927 If the biv is used only for counting, than we don't need to worry
7928 about all these things. */
7930 if ((num_nonfixed_reads <= 1
7932 && !loop_has_volatile
7933 && reversible_mem_store
7934 && (bl->giv_count + bl->biv_count + num_mem_sets
7935 + num_movables + compare_and_branch == insn_count)
7936 && (bl == loop_iv_list && bl->next == 0))
7937 || no_use_except_counting)
7941 /* Loop can be reversed. */
7942 if (loop_dump_stream)
7943 fprintf (loop_dump_stream, "Can reverse loop\n");
7945 /* Now check other conditions:
7947 The increment must be a constant, as must the initial value,
7948 and the comparison code must be LT.
7950 This test can probably be improved since +/- 1 in the constant
7951 can be obtained by changing LT to LE and vice versa; this is
7955 /* for constants, LE gets turned into LT */
7956 && (GET_CODE (comparison) == LT
7957 || (GET_CODE (comparison) == LE
7958 && no_use_except_counting)))
7960 HOST_WIDE_INT add_val, add_adjust, comparison_val;
7961 rtx initial_value, comparison_value;
7963 enum rtx_code cmp_code;
7964 int comparison_const_width;
7965 unsigned HOST_WIDE_INT comparison_sign_mask;
7967 add_val = INTVAL (bl->biv->add_val);
7968 comparison_value = XEXP (comparison, 1);
7969 if (GET_MODE (comparison_value) == VOIDmode)
7970 comparison_const_width
7971 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison, 0)));
7973 comparison_const_width
7974 = GET_MODE_BITSIZE (GET_MODE (comparison_value));
7975 if (comparison_const_width > HOST_BITS_PER_WIDE_INT)
7976 comparison_const_width = HOST_BITS_PER_WIDE_INT;
7977 comparison_sign_mask
7978 = (unsigned HOST_WIDE_INT)1 << (comparison_const_width - 1);
7980 /* If the comparison value is not a loop invariant, then we
7981 can not reverse this loop.
7983 ??? If the insns which initialize the comparison value as
7984 a whole compute an invariant result, then we could move
7985 them out of the loop and proceed with loop reversal. */
7986 if (!invariant_p (comparison_value))
7989 if (GET_CODE (comparison_value) == CONST_INT)
7990 comparison_val = INTVAL (comparison_value);
7991 initial_value = bl->initial_value;
7993 /* Normalize the initial value if it is an integer and
7994 has no other use except as a counter. This will allow
7995 a few more loops to be reversed. */
7996 if (no_use_except_counting
7997 && GET_CODE (comparison_value) == CONST_INT
7998 && GET_CODE (initial_value) == CONST_INT)
8000 comparison_val = comparison_val - INTVAL (bl->initial_value);
8001 /* The code below requires comparison_val to be a multiple
8002 of add_val in order to do the loop reversal, so
8003 round up comparison_val to a multiple of add_val.
8004 Since comparison_value is constant, we know that the
8005 current comparison code is LT. */
8006 comparison_val = comparison_val + add_val - 1;
8008 -= (unsigned HOST_WIDE_INT) comparison_val % add_val;
8009 /* We postpone overflow checks for COMPARISON_VAL here;
8010 even if there is an overflow, we might still be able to
8011 reverse the loop, if converting the loop exit test to
8013 initial_value = const0_rtx;
8016 /* First check if we can do a vanilla loop reversal. */
8017 if (initial_value == const0_rtx
8018 /* If we have a decrement_and_branch_on_count, prefer
8019 the NE test, since this will allow that instruction to
8020 be generated. Note that we must use a vanilla loop
8021 reversal if the biv is used to calculate a giv or has
8022 a non-counting use. */
8023 #if ! defined (HAVE_decrement_and_branch_until_zero) && defined (HAVE_decrement_and_branch_on_count)
8024 && (! (add_val == 1 && loop_info->vtop
8025 && (bl->biv_count == 0
8026 || no_use_except_counting)))
8028 && GET_CODE (comparison_value) == CONST_INT
8029 /* Now do postponed overflow checks on COMPARISON_VAL. */
8030 && ! (((comparison_val - add_val) ^ INTVAL (comparison_value))
8031 & comparison_sign_mask))
8033 /* Register will always be nonnegative, with value
8034 0 on last iteration */
8035 add_adjust = add_val;
8039 else if (add_val == 1 && loop_info->vtop
8040 && (bl->biv_count == 0
8041 || no_use_except_counting))
8049 if (GET_CODE (comparison) == LE)
8050 add_adjust -= add_val;
8052 /* If the initial value is not zero, or if the comparison
8053 value is not an exact multiple of the increment, then we
8054 can not reverse this loop. */
8055 if (initial_value == const0_rtx
8056 && GET_CODE (comparison_value) == CONST_INT)
8058 if (((unsigned HOST_WIDE_INT) comparison_val % add_val) != 0)
8063 if (! no_use_except_counting || add_val != 1)
8067 final_value = comparison_value;
8069 /* Reset these in case we normalized the initial value
8070 and comparison value above. */
8071 if (GET_CODE (comparison_value) == CONST_INT
8072 && GET_CODE (initial_value) == CONST_INT)
8074 comparison_value = GEN_INT (comparison_val);
8076 = GEN_INT (comparison_val + INTVAL (bl->initial_value));
8078 bl->initial_value = initial_value;
8080 /* Save some info needed to produce the new insns. */
8081 reg = bl->biv->dest_reg;
8082 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 1);
8083 if (jump_label == pc_rtx)
8084 jump_label = XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end))), 2);
8085 new_add_val = GEN_INT (- INTVAL (bl->biv->add_val));
8087 /* Set start_value; if this is not a CONST_INT, we need
8089 Initialize biv to start_value before loop start.
8090 The old initializing insn will be deleted as a
8091 dead store by flow.c. */
8092 if (initial_value == const0_rtx
8093 && GET_CODE (comparison_value) == CONST_INT)
8095 start_value = GEN_INT (comparison_val - add_adjust);
8096 emit_insn_before (gen_move_insn (reg, start_value),
8099 else if (GET_CODE (initial_value) == CONST_INT)
8101 rtx offset = GEN_INT (-INTVAL (initial_value) - add_adjust);
8102 enum machine_mode mode = GET_MODE (reg);
8103 enum insn_code icode
8104 = add_optab->handlers[(int) mode].insn_code;
8105 if (! (*insn_operand_predicate[icode][0]) (reg, mode)
8106 || ! ((*insn_operand_predicate[icode][1])
8107 (comparison_value, mode))
8108 || ! (*insn_operand_predicate[icode][2]) (offset, mode))
8111 = gen_rtx_PLUS (mode, comparison_value, offset);
8112 emit_insn_before ((GEN_FCN (icode)
8113 (reg, comparison_value, offset)),
8115 if (GET_CODE (comparison) == LE)
8116 final_value = gen_rtx_PLUS (mode, comparison_value,
8119 else if (! add_adjust)
8121 enum machine_mode mode = GET_MODE (reg);
8122 enum insn_code icode
8123 = sub_optab->handlers[(int) mode].insn_code;
8124 if (! (*insn_operand_predicate[icode][0]) (reg, mode)
8125 || ! ((*insn_operand_predicate[icode][1])
8126 (comparison_value, mode))
8127 || ! ((*insn_operand_predicate[icode][2])
8128 (initial_value, mode)))
8131 = gen_rtx_MINUS (mode, comparison_value, initial_value);
8132 emit_insn_before ((GEN_FCN (icode)
8133 (reg, comparison_value, initial_value)),
8137 /* We could handle the other cases too, but it'll be
8138 better to have a testcase first. */
8141 /* We may not have a single insn which can increment a reg, so
8142 create a sequence to hold all the insns from expand_inc. */
8144 expand_inc (reg, new_add_val);
8145 tem = gen_sequence ();
8148 p = emit_insn_before (tem, bl->biv->insn);
8149 delete_insn (bl->biv->insn);
8151 /* Update biv info to reflect its new status. */
8153 bl->initial_value = start_value;
8154 bl->biv->add_val = new_add_val;
8156 /* Update loop info. */
8157 loop_info->initial_value = reg;
8158 loop_info->initial_equiv_value = reg;
8159 loop_info->final_value = const0_rtx;
8160 loop_info->final_equiv_value = const0_rtx;
8161 loop_info->comparison_value = const0_rtx;
8162 loop_info->comparison_code = cmp_code;
8163 loop_info->increment = new_add_val;
8165 /* Inc LABEL_NUSES so that delete_insn will
8166 not delete the label. */
8167 LABEL_NUSES (XEXP (jump_label, 0)) ++;
8169 /* Emit an insn after the end of the loop to set the biv's
8170 proper exit value if it is used anywhere outside the loop. */
8171 if ((REGNO_LAST_UID (bl->regno) != INSN_UID (first_compare))
8173 || REGNO_FIRST_UID (bl->regno) != INSN_UID (bl->init_insn))
8174 emit_insn_after (gen_move_insn (reg, final_value),
8177 /* Delete compare/branch at end of loop. */
8178 delete_insn (PREV_INSN (loop_end));
8179 if (compare_and_branch == 2)
8180 delete_insn (first_compare);
8182 /* Add new compare/branch insn at end of loop. */
8184 emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
8185 GET_MODE (reg), 0, 0,
8186 XEXP (jump_label, 0));
8187 tem = gen_sequence ();
8189 emit_jump_insn_before (tem, loop_end);
8191 for (tem = PREV_INSN (loop_end);
8192 tem && GET_CODE (tem) != JUMP_INSN;
8193 tem = PREV_INSN (tem))
8197 JUMP_LABEL (tem) = XEXP (jump_label, 0);
8203 /* Increment of LABEL_NUSES done above. */
8204 /* Register is now always nonnegative,
8205 so add REG_NONNEG note to the branch. */
8206 REG_NOTES (tem) = gen_rtx_EXPR_LIST (REG_NONNEG, NULL_RTX,
8212 /* No insn may reference both the reversed and another biv or it
8213 will fail (see comment near the top of the loop reversal
8215 Earlier on, we have verified that the biv has no use except
8216 counting, or it is the only biv in this function.
8217 However, the code that computes no_use_except_counting does
8218 not verify reg notes. It's possible to have an insn that
8219 references another biv, and has a REG_EQUAL note with an
8220 expression based on the reversed biv. To avoid this case,
8221 remove all REG_EQUAL notes based on the reversed biv
8223 for (p = loop_start; p != loop_end; p = NEXT_INSN (p))
8224 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
8227 rtx set = single_set (p);
8228 /* If this is a set of a GIV based on the reversed biv, any
8229 REG_EQUAL notes should still be correct. */
8231 || GET_CODE (SET_DEST (set)) != REG
8232 || (size_t) REGNO (SET_DEST (set)) >= reg_iv_type->num_elements
8233 || REG_IV_TYPE (REGNO (SET_DEST (set))) != GENERAL_INDUCT
8234 || REG_IV_INFO (REGNO (SET_DEST (set)))->src_reg != bl->biv->src_reg)
8235 for (pnote = ®_NOTES (p); *pnote;)
8237 if (REG_NOTE_KIND (*pnote) == REG_EQUAL
8238 && reg_mentioned_p (regno_reg_rtx[bl->regno],
8240 *pnote = XEXP (*pnote, 1);
8242 pnote = &XEXP (*pnote, 1);
8246 /* Mark that this biv has been reversed. Each giv which depends
8247 on this biv, and which is also live past the end of the loop
8248 will have to be fixed up. */
8252 if (loop_dump_stream)
8254 fprintf (loop_dump_stream, "Reversed loop");
8256 fprintf (loop_dump_stream, " and added reg_nonneg\n");
8258 fprintf (loop_dump_stream, "\n");
8269 /* Verify whether the biv BL appears to be eliminable,
8270 based on the insns in the loop that refer to it.
8271 LOOP_START is the first insn of the loop, and END is the end insn.
8273 If ELIMINATE_P is non-zero, actually do the elimination.
8275 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8276 determine whether invariant insns should be placed inside or at the
8277 start of the loop. */
8280 maybe_eliminate_biv (bl, loop_start, end, eliminate_p, threshold, insn_count)
8281 struct iv_class *bl;
8285 int threshold, insn_count;
8287 rtx reg = bl->biv->dest_reg;
8290 /* Scan all insns in the loop, stopping if we find one that uses the
8291 biv in a way that we cannot eliminate. */
8293 for (p = loop_start; p != end; p = NEXT_INSN (p))
8295 enum rtx_code code = GET_CODE (p);
8296 rtx where = threshold >= insn_count ? loop_start : p;
8298 /* If this is a libcall that sets a giv, skip ahead to its end. */
8299 if (GET_RTX_CLASS (code) == 'i')
8301 rtx note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
8305 rtx last = XEXP (note, 0);
8306 rtx set = single_set (last);
8308 if (set && GET_CODE (SET_DEST (set)) == REG)
8310 int regno = REGNO (SET_DEST (set));
8312 if (regno < max_reg_before_loop
8313 && REG_IV_TYPE (regno) == GENERAL_INDUCT
8314 && REG_IV_INFO (regno)->src_reg == bl->biv->src_reg)
8319 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
8320 && reg_mentioned_p (reg, PATTERN (p))
8321 && ! maybe_eliminate_biv_1 (PATTERN (p), p, bl, eliminate_p, where))
8323 if (loop_dump_stream)
8324 fprintf (loop_dump_stream,
8325 "Cannot eliminate biv %d: biv used in insn %d.\n",
8326 bl->regno, INSN_UID (p));
8333 if (loop_dump_stream)
8334 fprintf (loop_dump_stream, "biv %d %s eliminated.\n",
8335 bl->regno, eliminate_p ? "was" : "can be");
8342 /* INSN and REFERENCE are instructions in the same insn chain.
8343 Return non-zero if INSN is first. */
8346 loop_insn_first_p (insn, reference)
8347 rtx insn, reference;
8351 for (p = insn, q = reference; ;)
8353 /* Start with test for not first so that INSN == REFERENCE yields not
8355 if (q == insn || ! p)
8357 if (p == reference || ! q)
8360 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8361 previous insn, hence the <= comparison below does not work if
8363 if (INSN_UID (p) < max_uid_for_loop
8364 && INSN_UID (q) < max_uid_for_loop
8365 && GET_CODE (p) != NOTE)
8366 return INSN_LUID (p) <= INSN_LUID (q);
8368 if (INSN_UID (p) >= max_uid_for_loop
8369 || GET_CODE (p) == NOTE)
8371 if (INSN_UID (q) >= max_uid_for_loop)
8376 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8377 the offset that we have to take into account due to auto-increment /
8378 div derivation is zero. */
8380 biv_elimination_giv_has_0_offset (biv, giv, insn)
8381 struct induction *biv, *giv;
8384 /* If the giv V had the auto-inc address optimization applied
8385 to it, and INSN occurs between the giv insn and the biv
8386 insn, then we'd have to adjust the value used here.
8387 This is rare, so we don't bother to make this possible. */
8388 if (giv->auto_inc_opt
8389 && ((loop_insn_first_p (giv->insn, insn)
8390 && loop_insn_first_p (insn, biv->insn))
8391 || (loop_insn_first_p (biv->insn, insn)
8392 && loop_insn_first_p (insn, giv->insn))))
8395 /* If the giv V was derived from another giv, and INSN does
8396 not occur between the giv insn and the biv insn, then we'd
8397 have to adjust the value used here. This is rare, so we don't
8398 bother to make this possible. */
8399 if (giv->derived_from
8400 && ! (giv->always_executed
8401 && loop_insn_first_p (giv->insn, insn)
8402 && loop_insn_first_p (insn, biv->insn)))
8405 && giv->same->derived_from
8406 && ! (giv->same->always_executed
8407 && loop_insn_first_p (giv->same->insn, insn)
8408 && loop_insn_first_p (insn, biv->insn)))
8414 /* If BL appears in X (part of the pattern of INSN), see if we can
8415 eliminate its use. If so, return 1. If not, return 0.
8417 If BIV does not appear in X, return 1.
8419 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
8420 where extra insns should be added. Depending on how many items have been
8421 moved out of the loop, it will either be before INSN or at the start of
8425 maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where)
8427 struct iv_class *bl;
8431 enum rtx_code code = GET_CODE (x);
8432 rtx reg = bl->biv->dest_reg;
8433 enum machine_mode mode = GET_MODE (reg);
8434 struct induction *v;
8446 /* If we haven't already been able to do something with this BIV,
8447 we can't eliminate it. */
8453 /* If this sets the BIV, it is not a problem. */
8454 if (SET_DEST (x) == reg)
8457 /* If this is an insn that defines a giv, it is also ok because
8458 it will go away when the giv is reduced. */
8459 for (v = bl->giv; v; v = v->next_iv)
8460 if (v->giv_type == DEST_REG && SET_DEST (x) == v->dest_reg)
8464 if (SET_DEST (x) == cc0_rtx && SET_SRC (x) == reg)
8466 /* Can replace with any giv that was reduced and
8467 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8468 Require a constant for MULT_VAL, so we know it's nonzero.
8469 ??? We disable this optimization to avoid potential
8472 for (v = bl->giv; v; v = v->next_iv)
8473 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8474 && v->add_val == const0_rtx
8475 && ! v->ignore && ! v->maybe_dead && v->always_computable
8479 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8485 /* If the giv has the opposite direction of change,
8486 then reverse the comparison. */
8487 if (INTVAL (v->mult_val) < 0)
8488 new = gen_rtx_COMPARE (GET_MODE (v->new_reg),
8489 const0_rtx, v->new_reg);
8493 /* We can probably test that giv's reduced reg. */
8494 if (validate_change (insn, &SET_SRC (x), new, 0))
8498 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8499 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8500 Require a constant for MULT_VAL, so we know it's nonzero.
8501 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8502 overflow problem. */
8504 for (v = bl->giv; v; v = v->next_iv)
8505 if (CONSTANT_P (v->mult_val) && v->mult_val != const0_rtx
8506 && ! v->ignore && ! v->maybe_dead && v->always_computable
8508 && (GET_CODE (v->add_val) == SYMBOL_REF
8509 || GET_CODE (v->add_val) == LABEL_REF
8510 || GET_CODE (v->add_val) == CONST
8511 || (GET_CODE (v->add_val) == REG
8512 && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
8514 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8520 /* If the giv has the opposite direction of change,
8521 then reverse the comparison. */
8522 if (INTVAL (v->mult_val) < 0)
8523 new = gen_rtx_COMPARE (VOIDmode, copy_rtx (v->add_val),
8526 new = gen_rtx_COMPARE (VOIDmode, v->new_reg,
8527 copy_rtx (v->add_val));
8529 /* Replace biv with the giv's reduced register. */
8530 update_reg_last_use (v->add_val, insn);
8531 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8534 /* Insn doesn't support that constant or invariant. Copy it
8535 into a register (it will be a loop invariant.) */
8536 tem = gen_reg_rtx (GET_MODE (v->new_reg));
8538 emit_insn_before (gen_move_insn (tem, copy_rtx (v->add_val)),
8541 /* Substitute the new register for its invariant value in
8542 the compare expression. */
8543 XEXP (new, (INTVAL (v->mult_val) < 0) ? 0 : 1) = tem;
8544 if (validate_change (insn, &SET_SRC (PATTERN (insn)), new, 0))
8553 case GT: case GE: case GTU: case GEU:
8554 case LT: case LE: case LTU: case LEU:
8555 /* See if either argument is the biv. */
8556 if (XEXP (x, 0) == reg)
8557 arg = XEXP (x, 1), arg_operand = 1;
8558 else if (XEXP (x, 1) == reg)
8559 arg = XEXP (x, 0), arg_operand = 0;
8563 if (CONSTANT_P (arg))
8565 /* First try to replace with any giv that has constant positive
8566 mult_val and constant add_val. We might be able to support
8567 negative mult_val, but it seems complex to do it in general. */
8569 for (v = bl->giv; v; v = v->next_iv)
8570 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8571 && (GET_CODE (v->add_val) == SYMBOL_REF
8572 || GET_CODE (v->add_val) == LABEL_REF
8573 || GET_CODE (v->add_val) == CONST
8574 || (GET_CODE (v->add_val) == REG
8575 && REGNO_POINTER_FLAG (REGNO (v->add_val))))
8576 && ! v->ignore && ! v->maybe_dead && v->always_computable
8579 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8585 /* Replace biv with the giv's reduced reg. */
8586 XEXP (x, 1-arg_operand) = v->new_reg;
8588 /* If all constants are actually constant integers and
8589 the derived constant can be directly placed in the COMPARE,
8591 if (GET_CODE (arg) == CONST_INT
8592 && GET_CODE (v->mult_val) == CONST_INT
8593 && GET_CODE (v->add_val) == CONST_INT
8594 && validate_change (insn, &XEXP (x, arg_operand),
8595 GEN_INT (INTVAL (arg)
8596 * INTVAL (v->mult_val)
8597 + INTVAL (v->add_val)), 0))
8600 /* Otherwise, load it into a register. */
8601 tem = gen_reg_rtx (mode);
8602 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8603 if (validate_change (insn, &XEXP (x, arg_operand), tem, 0))
8606 /* If that failed, put back the change we made above. */
8607 XEXP (x, 1-arg_operand) = reg;
8610 /* Look for giv with positive constant mult_val and nonconst add_val.
8611 Insert insns to calculate new compare value.
8612 ??? Turn this off due to possible overflow. */
8614 for (v = bl->giv; v; v = v->next_iv)
8615 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8616 && ! v->ignore && ! v->maybe_dead && v->always_computable
8622 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8628 tem = gen_reg_rtx (mode);
8630 /* Replace biv with giv's reduced register. */
8631 validate_change (insn, &XEXP (x, 1 - arg_operand),
8634 /* Compute value to compare against. */
8635 emit_iv_add_mult (arg, v->mult_val, v->add_val, tem, where);
8636 /* Use it in this insn. */
8637 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8638 if (apply_change_group ())
8642 else if (GET_CODE (arg) == REG || GET_CODE (arg) == MEM)
8644 if (invariant_p (arg) == 1)
8646 /* Look for giv with constant positive mult_val and nonconst
8647 add_val. Insert insns to compute new compare value.
8648 ??? Turn this off due to possible overflow. */
8650 for (v = bl->giv; v; v = v->next_iv)
8651 if (CONSTANT_P (v->mult_val) && INTVAL (v->mult_val) > 0
8652 && ! v->ignore && ! v->maybe_dead && v->always_computable
8658 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8664 tem = gen_reg_rtx (mode);
8666 /* Replace biv with giv's reduced register. */
8667 validate_change (insn, &XEXP (x, 1 - arg_operand),
8670 /* Compute value to compare against. */
8671 emit_iv_add_mult (arg, v->mult_val, v->add_val,
8673 validate_change (insn, &XEXP (x, arg_operand), tem, 1);
8674 if (apply_change_group ())
8679 /* This code has problems. Basically, you can't know when
8680 seeing if we will eliminate BL, whether a particular giv
8681 of ARG will be reduced. If it isn't going to be reduced,
8682 we can't eliminate BL. We can try forcing it to be reduced,
8683 but that can generate poor code.
8685 The problem is that the benefit of reducing TV, below should
8686 be increased if BL can actually be eliminated, but this means
8687 we might have to do a topological sort of the order in which
8688 we try to process biv. It doesn't seem worthwhile to do
8689 this sort of thing now. */
8692 /* Otherwise the reg compared with had better be a biv. */
8693 if (GET_CODE (arg) != REG
8694 || REG_IV_TYPE (REGNO (arg)) != BASIC_INDUCT)
8697 /* Look for a pair of givs, one for each biv,
8698 with identical coefficients. */
8699 for (v = bl->giv; v; v = v->next_iv)
8701 struct induction *tv;
8703 if (v->ignore || v->maybe_dead || v->mode != mode)
8706 for (tv = reg_biv_class[REGNO (arg)]->giv; tv; tv = tv->next_iv)
8707 if (! tv->ignore && ! tv->maybe_dead
8708 && rtx_equal_p (tv->mult_val, v->mult_val)
8709 && rtx_equal_p (tv->add_val, v->add_val)
8710 && tv->mode == mode)
8712 if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
8718 /* Replace biv with its giv's reduced reg. */
8719 XEXP (x, 1-arg_operand) = v->new_reg;
8720 /* Replace other operand with the other giv's
8722 XEXP (x, arg_operand) = tv->new_reg;
8729 /* If we get here, the biv can't be eliminated. */
8733 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8734 biv is used in it, since it will be replaced. */
8735 for (v = bl->giv; v; v = v->next_iv)
8736 if (v->giv_type == DEST_ADDR && v->location == &XEXP (x, 0))
8744 /* See if any subexpression fails elimination. */
8745 fmt = GET_RTX_FORMAT (code);
8746 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8751 if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl,
8752 eliminate_p, where))
8757 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8758 if (! maybe_eliminate_biv_1 (XVECEXP (x, i, j), insn, bl,
8759 eliminate_p, where))
8768 /* Return nonzero if the last use of REG
8769 is in an insn following INSN in the same basic block. */
8772 last_use_this_basic_block (reg, insn)
8778 n && GET_CODE (n) != CODE_LABEL && GET_CODE (n) != JUMP_INSN;
8781 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (n))
8787 /* Called via `note_stores' to record the initial value of a biv. Here we
8788 just record the location of the set and process it later. */
8791 record_initial (dest, set)
8795 struct iv_class *bl;
8797 if (GET_CODE (dest) != REG
8798 || REGNO (dest) >= max_reg_before_loop
8799 || REG_IV_TYPE (REGNO (dest)) != BASIC_INDUCT)
8802 bl = reg_biv_class[REGNO (dest)];
8804 /* If this is the first set found, record it. */
8805 if (bl->init_insn == 0)
8807 bl->init_insn = note_insn;
8812 /* If any of the registers in X are "old" and currently have a last use earlier
8813 than INSN, update them to have a last use of INSN. Their actual last use
8814 will be the previous insn but it will not have a valid uid_luid so we can't
8818 update_reg_last_use (x, insn)
8822 /* Check for the case where INSN does not have a valid luid. In this case,
8823 there is no need to modify the regno_last_uid, as this can only happen
8824 when code is inserted after the loop_end to set a pseudo's final value,
8825 and hence this insn will never be the last use of x. */
8826 if (GET_CODE (x) == REG && REGNO (x) < max_reg_before_loop
8827 && INSN_UID (insn) < max_uid_for_loop
8828 && uid_luid[REGNO_LAST_UID (REGNO (x))] < uid_luid[INSN_UID (insn)])
8829 REGNO_LAST_UID (REGNO (x)) = INSN_UID (insn);
8833 register char *fmt = GET_RTX_FORMAT (GET_CODE (x));
8834 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
8837 update_reg_last_use (XEXP (x, i), insn);
8838 else if (fmt[i] == 'E')
8839 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8840 update_reg_last_use (XVECEXP (x, i, j), insn);
8845 /* Given a jump insn JUMP, return the condition that will cause it to branch
8846 to its JUMP_LABEL. If the condition cannot be understood, or is an
8847 inequality floating-point comparison which needs to be reversed, 0 will
8850 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8851 insn used in locating the condition was found. If a replacement test
8852 of the condition is desired, it should be placed in front of that
8853 insn and we will be sure that the inputs are still valid.
8855 The condition will be returned in a canonical form to simplify testing by
8856 callers. Specifically:
8858 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8859 (2) Both operands will be machine operands; (cc0) will have been replaced.
8860 (3) If an operand is a constant, it will be the second operand.
8861 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8862 for GE, GEU, and LEU. */
8865 get_condition (jump, earliest)
8874 int reverse_code = 0;
8875 int did_reverse_condition = 0;
8876 enum machine_mode mode;
8878 /* If this is not a standard conditional jump, we can't parse it. */
8879 if (GET_CODE (jump) != JUMP_INSN
8880 || ! condjump_p (jump) || simplejump_p (jump))
8883 code = GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 0));
8884 mode = GET_MODE (XEXP (SET_SRC (PATTERN (jump)), 0));
8885 op0 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 0);
8886 op1 = XEXP (XEXP (SET_SRC (PATTERN (jump)), 0), 1);
8891 /* If this branches to JUMP_LABEL when the condition is false, reverse
8893 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump)), 2)) == LABEL_REF
8894 && XEXP (XEXP (SET_SRC (PATTERN (jump)), 2), 0) == JUMP_LABEL (jump))
8895 code = reverse_condition (code), did_reverse_condition ^= 1;
8897 /* If we are comparing a register with zero, see if the register is set
8898 in the previous insn to a COMPARE or a comparison operation. Perform
8899 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
8902 while (GET_RTX_CLASS (code) == '<' && op1 == CONST0_RTX (GET_MODE (op0)))
8904 /* Set non-zero when we find something of interest. */
8908 /* If comparison with cc0, import actual comparison from compare
8912 if ((prev = prev_nonnote_insn (prev)) == 0
8913 || GET_CODE (prev) != INSN
8914 || (set = single_set (prev)) == 0
8915 || SET_DEST (set) != cc0_rtx)
8918 op0 = SET_SRC (set);
8919 op1 = CONST0_RTX (GET_MODE (op0));
8925 /* If this is a COMPARE, pick up the two things being compared. */
8926 if (GET_CODE (op0) == COMPARE)
8928 op1 = XEXP (op0, 1);
8929 op0 = XEXP (op0, 0);
8932 else if (GET_CODE (op0) != REG)
8935 /* Go back to the previous insn. Stop if it is not an INSN. We also
8936 stop if it isn't a single set or if it has a REG_INC note because
8937 we don't want to bother dealing with it. */
8939 if ((prev = prev_nonnote_insn (prev)) == 0
8940 || GET_CODE (prev) != INSN
8941 || FIND_REG_INC_NOTE (prev, 0)
8942 || (set = single_set (prev)) == 0)
8945 /* If this is setting OP0, get what it sets it to if it looks
8947 if (rtx_equal_p (SET_DEST (set), op0))
8949 enum machine_mode inner_mode = GET_MODE (SET_SRC (set));
8951 /* ??? We may not combine comparisons done in a CCmode with
8952 comparisons not done in a CCmode. This is to aid targets
8953 like Alpha that have an IEEE compliant EQ instruction, and
8954 a non-IEEE compliant BEQ instruction. The use of CCmode is
8955 actually artificial, simply to prevent the combination, but
8956 should not affect other platforms.
8958 However, we must allow VOIDmode comparisons to match either
8959 CCmode or non-CCmode comparison, because some ports have
8960 modeless comparisons inside branch patterns.
8962 ??? This mode check should perhaps look more like the mode check
8963 in simplify_comparison in combine. */
8965 if ((GET_CODE (SET_SRC (set)) == COMPARE
8968 && GET_MODE_CLASS (inner_mode) == MODE_INT
8969 && (GET_MODE_BITSIZE (inner_mode)
8970 <= HOST_BITS_PER_WIDE_INT)
8971 && (STORE_FLAG_VALUE
8972 & ((HOST_WIDE_INT) 1
8973 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8974 #ifdef FLOAT_STORE_FLAG_VALUE
8976 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8977 && FLOAT_STORE_FLAG_VALUE < 0)
8980 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
8981 && (((GET_MODE_CLASS (mode) == MODE_CC)
8982 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
8983 || mode == VOIDmode || inner_mode == VOIDmode))
8985 else if (((code == EQ
8987 && (GET_MODE_BITSIZE (inner_mode)
8988 <= HOST_BITS_PER_WIDE_INT)
8989 && GET_MODE_CLASS (inner_mode) == MODE_INT
8990 && (STORE_FLAG_VALUE
8991 & ((HOST_WIDE_INT) 1
8992 << (GET_MODE_BITSIZE (inner_mode) - 1))))
8993 #ifdef FLOAT_STORE_FLAG_VALUE
8995 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
8996 && FLOAT_STORE_FLAG_VALUE < 0)
8999 && GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
9000 && (((GET_MODE_CLASS (mode) == MODE_CC)
9001 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
9002 || mode == VOIDmode || inner_mode == VOIDmode))
9005 /* We might have reversed a LT to get a GE here. But this wasn't
9006 actually the comparison of data, so we don't flag that we
9007 have had to reverse the condition. */
9008 did_reverse_condition ^= 1;
9016 else if (reg_set_p (op0, prev))
9017 /* If this sets OP0, but not directly, we have to give up. */
9022 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
9023 code = GET_CODE (x);
9026 code = reverse_condition (code);
9027 did_reverse_condition ^= 1;
9031 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
9037 /* If constant is first, put it last. */
9038 if (CONSTANT_P (op0))
9039 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
9041 /* If OP0 is the result of a comparison, we weren't able to find what
9042 was really being compared, so fail. */
9043 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
9046 /* Canonicalize any ordered comparison with integers involving equality
9047 if we can do computations in the relevant mode and we do not
9050 if (GET_CODE (op1) == CONST_INT
9051 && GET_MODE (op0) != VOIDmode
9052 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
9054 HOST_WIDE_INT const_val = INTVAL (op1);
9055 unsigned HOST_WIDE_INT uconst_val = const_val;
9056 unsigned HOST_WIDE_INT max_val
9057 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
9062 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
9063 code = LT, op1 = GEN_INT (const_val + 1);
9066 /* When cross-compiling, const_val might be sign-extended from
9067 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9069 if ((HOST_WIDE_INT) (const_val & max_val)
9070 != (((HOST_WIDE_INT) 1
9071 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
9072 code = GT, op1 = GEN_INT (const_val - 1);
9076 if (uconst_val < max_val)
9077 code = LTU, op1 = GEN_INT (uconst_val + 1);
9081 if (uconst_val != 0)
9082 code = GTU, op1 = GEN_INT (uconst_val - 1);
9090 /* If this was floating-point and we reversed anything other than an
9091 EQ or NE, return zero. */
9092 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
9093 && did_reverse_condition && code != NE && code != EQ
9095 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
9099 /* Never return CC0; return zero instead. */
9104 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
9107 /* Similar to above routine, except that we also put an invariant last
9108 unless both operands are invariants. */
9111 get_condition_for_loop (x)
9114 rtx comparison = get_condition (x, NULL_PTR);
9117 || ! invariant_p (XEXP (comparison, 0))
9118 || invariant_p (XEXP (comparison, 1)))
9121 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison)), VOIDmode,
9122 XEXP (comparison, 1), XEXP (comparison, 0));
9125 #ifdef HAVE_decrement_and_branch_on_count
9126 /* Instrument loop for insertion of bct instruction. We distinguish between
9127 loops with compile-time bounds and those with run-time bounds.
9128 Information from loop_iterations() is used to compute compile-time bounds.
9129 Run-time bounds should use loop preconditioning, but currently ignored.
9133 insert_bct (loop_start, loop_end, loop_info)
9134 rtx loop_start, loop_end;
9135 struct loop_info *loop_info;
9138 unsigned HOST_WIDE_INT n_iterations;
9140 int increment_direction, compare_direction;
9142 /* If the loop condition is <= or >=, the number of iteration
9143 is 1 more than the range of the bounds of the loop. */
9144 int add_iteration = 0;
9146 enum machine_mode loop_var_mode = word_mode;
9148 int loop_num = uid_loop_num [INSN_UID (loop_start)];
9150 /* It's impossible to instrument a competely unrolled loop. */
9151 if (loop_info->unroll_number == -1)
9154 /* Make sure that the count register is not in use. */
9155 if (loop_used_count_register [loop_num])
9157 if (loop_dump_stream)
9158 fprintf (loop_dump_stream,
9159 "insert_bct %d: BCT instrumentation failed: count register already in use\n",
9164 /* Make sure that the function has no indirect jumps. */
9165 if (indirect_jump_in_function)
9167 if (loop_dump_stream)
9168 fprintf (loop_dump_stream,
9169 "insert_bct %d: BCT instrumentation failed: indirect jump in function\n",
9174 /* Make sure that the last loop insn is a conditional jump. */
9175 if (GET_CODE (PREV_INSN (loop_end)) != JUMP_INSN
9176 || ! condjump_p (PREV_INSN (loop_end))
9177 || simplejump_p (PREV_INSN (loop_end)))
9179 if (loop_dump_stream)
9180 fprintf (loop_dump_stream,
9181 "insert_bct %d: BCT instrumentation failed: invalid jump at loop end\n",
9186 /* Make sure that the loop does not contain a function call
9187 (the count register might be altered by the called function). */
9190 if (loop_dump_stream)
9191 fprintf (loop_dump_stream,
9192 "insert_bct %d: BCT instrumentation failed: function call in loop\n",
9197 /* Make sure that the loop does not jump via a table.
9198 (the count register might be used to perform the branch on table). */
9199 if (loop_has_tablejump)
9201 if (loop_dump_stream)
9202 fprintf (loop_dump_stream,
9203 "insert_bct %d: BCT instrumentation failed: computed branch in the loop\n",
9208 /* Account for loop unrolling in instrumented iteration count. */
9209 if (loop_info->unroll_number > 1)
9210 n_iterations = loop_info->n_iterations / loop_info->unroll_number;
9212 n_iterations = loop_info->n_iterations;
9214 if (n_iterations != 0 && n_iterations < 3)
9216 /* Allow an enclosing outer loop to benefit if possible. */
9217 if (loop_dump_stream)
9218 fprintf (loop_dump_stream,
9219 "insert_bct %d: Too few iterations to benefit from BCT optimization\n",
9224 /* Try to instrument the loop. */
9226 /* Handle the simpler case, where the bounds are known at compile time. */
9227 if (n_iterations > 0)
9229 /* Mark all enclosing loops that they cannot use count register. */
9230 for (i = loop_num; i != -1; i = loop_outer_loop[i])
9231 loop_used_count_register[i] = 1;
9232 instrument_loop_bct (loop_start, loop_end, GEN_INT (n_iterations));
9236 /* Handle the more complex case, that the bounds are NOT known
9237 at compile time. In this case we generate run_time calculation
9238 of the number of iterations. */
9240 if (loop_info->iteration_var == 0)
9242 if (loop_dump_stream)
9243 fprintf (loop_dump_stream,
9244 "insert_bct %d: BCT Runtime Instrumentation failed: no loop iteration variable found\n",
9249 if (GET_MODE_CLASS (GET_MODE (loop_info->iteration_var)) != MODE_INT
9250 || GET_MODE_SIZE (GET_MODE (loop_info->iteration_var)) != UNITS_PER_WORD)
9252 if (loop_dump_stream)
9253 fprintf (loop_dump_stream,
9254 "insert_bct %d: BCT Runtime Instrumentation failed: loop variable not integer\n",
9259 /* With runtime bounds, if the compare is of the form '!=' we give up */
9260 if (loop_info->comparison_code == NE)
9262 if (loop_dump_stream)
9263 fprintf (loop_dump_stream,
9264 "insert_bct %d: BCT Runtime Instrumentation failed: runtime bounds with != comparison\n",
9268 /* Use common loop preconditioning code instead. */
9272 /* We rely on the existence of run-time guard to ensure that the
9273 loop executes at least once. */
9275 rtx iterations_num_reg;
9277 unsigned HOST_WIDE_INT increment_value_abs
9278 = INTVAL (increment) * increment_direction;
9280 /* make sure that the increment is a power of two, otherwise (an
9281 expensive) divide is needed. */
9282 if (exact_log2 (increment_value_abs) == -1)
9284 if (loop_dump_stream)
9285 fprintf (loop_dump_stream,
9286 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
9290 /* compute the number of iterations */
9295 /* Again, the number of iterations is calculated by:
9297 ; compare-val - initial-val + (increment -1) + additional-iteration
9298 ; num_iterations = -----------------------------------------------------------------
9301 /* ??? Do we have to call copy_rtx here before passing rtx to
9303 if (compare_direction > 0)
9305 /* <, <= :the loop variable is increasing */
9306 temp_reg = expand_binop (loop_var_mode, sub_optab,
9307 comparison_value, initial_value,
9308 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9312 temp_reg = expand_binop (loop_var_mode, sub_optab,
9313 initial_value, comparison_value,
9314 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9317 if (increment_value_abs - 1 + add_iteration != 0)
9318 temp_reg = expand_binop (loop_var_mode, add_optab, temp_reg,
9319 GEN_INT (increment_value_abs - 1
9321 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9323 if (increment_value_abs != 1)
9325 /* ??? This will generate an expensive divide instruction for
9326 most targets. The original authors apparently expected this
9327 to be a shift, since they test for power-of-2 divisors above,
9328 but just naively generating a divide instruction will not give
9329 a shift. It happens to work for the PowerPC target because
9330 the rs6000.md file has a divide pattern that emits shifts.
9331 It will probably not work for any other target. */
9332 iterations_num_reg = expand_binop (loop_var_mode, sdiv_optab,
9334 GEN_INT (increment_value_abs),
9335 NULL_RTX, 0, OPTAB_LIB_WIDEN);
9338 iterations_num_reg = temp_reg;
9340 sequence = gen_sequence ();
9342 emit_insn_before (sequence, loop_start);
9343 instrument_loop_bct (loop_start, loop_end, iterations_num_reg);
9347 #endif /* Complex case */
9350 /* Instrument loop by inserting a bct in it as follows:
9351 1. A new counter register is created.
9352 2. In the head of the loop the new variable is initialized to the value
9353 passed in the loop_num_iterations parameter.
9354 3. At the end of the loop, comparison of the register with 0 is generated.
9355 The created comparison follows the pattern defined for the
9356 decrement_and_branch_on_count insn, so this insn will be generated.
9357 4. The branch on the old variable are deleted. The compare must remain
9358 because it might be used elsewhere. If the loop-variable or condition
9359 register are used elsewhere, they will be eliminated by flow. */
9362 instrument_loop_bct (loop_start, loop_end, loop_num_iterations)
9363 rtx loop_start, loop_end;
9364 rtx loop_num_iterations;
9370 if (HAVE_decrement_and_branch_on_count)
9372 if (loop_dump_stream)
9374 fputs ("instrument_bct: Inserting BCT (", loop_dump_stream);
9375 if (GET_CODE (loop_num_iterations) == CONST_INT)
9376 fprintf (loop_dump_stream, HOST_WIDE_INT_PRINT_DEC,
9377 INTVAL (loop_num_iterations));
9379 fputs ("runtime", loop_dump_stream);
9380 fputs (" iterations)", loop_dump_stream);
9383 /* Discard original jump to continue loop. Original compare result
9384 may still be live, so it cannot be discarded explicitly. */
9385 delete_insn (PREV_INSN (loop_end));
9387 /* Insert the label which will delimit the start of the loop. */
9388 start_label = gen_label_rtx ();
9389 emit_label_after (start_label, loop_start);
9391 /* Insert initialization of the count register into the loop header. */
9393 counter_reg = gen_reg_rtx (word_mode);
9394 emit_insn (gen_move_insn (counter_reg, loop_num_iterations));
9395 sequence = gen_sequence ();
9397 emit_insn_before (sequence, loop_start);
9399 /* Insert new comparison on the count register instead of the
9400 old one, generating the needed BCT pattern (that will be
9401 later recognized by assembly generation phase). */
9402 emit_jump_insn_before (gen_decrement_and_branch_on_count (counter_reg,
9405 JUMP_LABEL (prev_nonnote_insn (loop_end)) = start_label;
9406 LABEL_NUSES (start_label)++;
9410 #endif /* HAVE_decrement_and_branch_on_count */
9412 /* Scan the function and determine whether it has indirect (computed) jumps.
9414 This is taken mostly from flow.c; similar code exists elsewhere
9415 in the compiler. It may be useful to put this into rtlanal.c. */
9417 indirect_jump_in_function_p (start)
9422 for (insn = start; insn; insn = NEXT_INSN (insn))
9423 if (computed_jump_p (insn))
9429 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9430 documentation for LOOP_MEMS for the definition of `appropriate'.
9431 This function is called from prescan_loop via for_each_rtx. */
9434 insert_loop_mem (mem, data)
9436 void *data ATTRIBUTE_UNUSED;
9444 switch (GET_CODE (m))
9450 /* We're not interested in the MEM associated with a
9451 CONST_DOUBLE, so there's no need to traverse into this. */
9455 /* This is not a MEM. */
9459 /* See if we've already seen this MEM. */
9460 for (i = 0; i < loop_mems_idx; ++i)
9461 if (rtx_equal_p (m, loop_mems[i].mem))
9463 if (GET_MODE (m) != GET_MODE (loop_mems[i].mem))
9464 /* The modes of the two memory accesses are different. If
9465 this happens, something tricky is going on, and we just
9466 don't optimize accesses to this MEM. */
9467 loop_mems[i].optimize = 0;
9472 /* Resize the array, if necessary. */
9473 if (loop_mems_idx == loop_mems_allocated)
9475 if (loop_mems_allocated != 0)
9476 loop_mems_allocated *= 2;
9478 loop_mems_allocated = 32;
9480 loop_mems = (loop_mem_info*)
9481 xrealloc (loop_mems,
9482 loop_mems_allocated * sizeof (loop_mem_info));
9485 /* Actually insert the MEM. */
9486 loop_mems[loop_mems_idx].mem = m;
9487 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9488 because we can't put it in a register. We still store it in the
9489 table, though, so that if we see the same address later, but in a
9490 non-BLK mode, we'll not think we can optimize it at that point. */
9491 loop_mems[loop_mems_idx].optimize = (GET_MODE (m) != BLKmode);
9492 loop_mems[loop_mems_idx].reg = NULL_RTX;
9498 /* Like load_mems, but also ensures that SET_IN_LOOP,
9499 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
9500 values after load_mems. */
9503 load_mems_and_recount_loop_regs_set (scan_start, end, loop_top, start,
9511 int nregs = max_reg_num ();
9513 load_mems (scan_start, end, loop_top, start);
9515 /* Recalculate set_in_loop and friends since load_mems may have
9516 created new registers. */
9517 if (max_reg_num () > nregs)
9523 nregs = max_reg_num ();
9525 if ((unsigned) nregs > set_in_loop->num_elements)
9527 /* Grow all the arrays. */
9528 VARRAY_GROW (set_in_loop, nregs);
9529 VARRAY_GROW (n_times_set, nregs);
9530 VARRAY_GROW (may_not_optimize, nregs);
9531 VARRAY_GROW (reg_single_usage, nregs);
9533 /* Clear the arrays */
9534 bzero ((char *) &set_in_loop->data, nregs * sizeof (int));
9535 bzero ((char *) &may_not_optimize->data, nregs * sizeof (char));
9536 bzero ((char *) ®_single_usage->data, nregs * sizeof (rtx));
9538 count_loop_regs_set (loop_top ? loop_top : start, end,
9539 may_not_optimize, reg_single_usage,
9542 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
9544 VARRAY_CHAR (may_not_optimize, i) = 1;
9545 VARRAY_INT (set_in_loop, i) = 1;
9548 #ifdef AVOID_CCMODE_COPIES
9549 /* Don't try to move insns which set CC registers if we should not
9550 create CCmode register copies. */
9551 for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
9552 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx[i])) == MODE_CC)
9553 VARRAY_CHAR (may_not_optimize, i) = 1;
9556 /* Set n_times_set for the new registers. */
9557 bcopy ((char *) (&set_in_loop->data.i[0] + old_nregs),
9558 (char *) (&n_times_set->data.i[0] + old_nregs),
9559 (nregs - old_nregs) * sizeof (int));
9563 /* Move MEMs into registers for the duration of the loop. SCAN_START
9564 is the first instruction in the loop (as it is executed). The
9565 other parameters are as for next_insn_in_loop. */
9568 load_mems (scan_start, end, loop_top, start)
9574 int maybe_never = 0;
9577 rtx label = NULL_RTX;
9580 if (loop_mems_idx > 0)
9582 /* Nonzero if the next instruction may never be executed. */
9583 int next_maybe_never = 0;
9585 /* Check to see if it's possible that some instructions in the
9586 loop are never executed. */
9587 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9588 p != NULL_RTX && !maybe_never;
9589 p = next_insn_in_loop (p, scan_start, end, loop_top))
9591 if (GET_CODE (p) == CODE_LABEL)
9593 else if (GET_CODE (p) == JUMP_INSN
9594 /* If we enter the loop in the middle, and scan
9595 around to the beginning, don't set maybe_never
9596 for that. This must be an unconditional jump,
9597 otherwise the code at the top of the loop might
9598 never be executed. Unconditional jumps are
9599 followed a by barrier then loop end. */
9600 && ! (GET_CODE (p) == JUMP_INSN
9601 && JUMP_LABEL (p) == loop_top
9602 && NEXT_INSN (NEXT_INSN (p)) == end
9603 && simplejump_p (p)))
9605 if (!condjump_p (p))
9606 /* Something complicated. */
9609 /* If there are any more instructions in the loop, they
9610 might not be reached. */
9611 next_maybe_never = 1;
9613 else if (next_maybe_never)
9617 /* Actually move the MEMs. */
9618 for (i = 0; i < loop_mems_idx; ++i)
9622 rtx mem = loop_mems[i].mem;
9625 if (MEM_VOLATILE_P (mem)
9626 || invariant_p (XEXP (mem, 0)) != 1)
9627 /* There's no telling whether or not MEM is modified. */
9628 loop_mems[i].optimize = 0;
9630 /* Go through the MEMs written to in the loop to see if this
9631 one is aliased by one of them. */
9632 mem_list_entry = loop_store_mems;
9633 while (mem_list_entry)
9635 if (rtx_equal_p (mem, XEXP (mem_list_entry, 0)))
9637 else if (true_dependence (XEXP (mem_list_entry, 0), VOIDmode,
9640 /* MEM is indeed aliased by this store. */
9641 loop_mems[i].optimize = 0;
9644 mem_list_entry = XEXP (mem_list_entry, 1);
9647 if (flag_float_store && written
9648 && GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
9649 loop_mems[i].optimize = 0;
9651 /* If this MEM is written to, we must be sure that there
9652 are no reads from another MEM that aliases this one. */
9653 if (loop_mems[i].optimize && written)
9657 for (j = 0; j < loop_mems_idx; ++j)
9661 else if (true_dependence (mem,
9666 /* It's not safe to hoist loop_mems[i] out of
9667 the loop because writes to it might not be
9668 seen by reads from loop_mems[j]. */
9669 loop_mems[i].optimize = 0;
9675 if (maybe_never && may_trap_p (mem))
9676 /* We can't access the MEM outside the loop; it might
9677 cause a trap that wouldn't have happened otherwise. */
9678 loop_mems[i].optimize = 0;
9680 if (!loop_mems[i].optimize)
9681 /* We thought we were going to lift this MEM out of the
9682 loop, but later discovered that we could not. */
9685 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9686 order to keep scan_loop from moving stores to this MEM
9687 out of the loop just because this REG is neither a
9688 user-variable nor used in the loop test. */
9689 reg = gen_reg_rtx (GET_MODE (mem));
9690 REG_USERVAR_P (reg) = 1;
9691 loop_mems[i].reg = reg;
9693 /* Now, replace all references to the MEM with the
9694 corresponding pesudos. */
9695 for (p = next_insn_in_loop (scan_start, scan_start, end, loop_top);
9697 p = next_insn_in_loop (p, scan_start, end, loop_top))
9702 for_each_rtx (&p, replace_loop_mem, &ri);
9705 if (!apply_change_group ())
9706 /* We couldn't replace all occurrences of the MEM. */
9707 loop_mems[i].optimize = 0;
9712 /* Load the memory immediately before START, which is
9713 the NOTE_LOOP_BEG. */
9714 set = gen_move_insn (reg, mem);
9715 emit_insn_before (set, start);
9719 if (label == NULL_RTX)
9721 /* We must compute the former
9722 right-after-the-end label before we insert
9724 end_label = next_label (end);
9725 label = gen_label_rtx ();
9726 emit_label_after (label, end);
9729 /* Store the memory immediately after END, which is
9730 the NOTE_LOOP_END. */
9731 set = gen_move_insn (copy_rtx (mem), reg);
9732 emit_insn_after (set, label);
9735 if (loop_dump_stream)
9737 fprintf (loop_dump_stream, "Hoisted regno %d %s from ",
9738 REGNO (reg), (written ? "r/w" : "r/o"));
9739 print_rtl (loop_dump_stream, mem);
9740 fputc ('\n', loop_dump_stream);
9746 if (label != NULL_RTX)
9748 /* Now, we need to replace all references to the previous exit
9749 label with the new one. */
9754 for (p = start; p != end; p = NEXT_INSN (p))
9756 for_each_rtx (&p, replace_label, &rr);
9758 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9759 field. This is not handled by for_each_rtx because it doesn't
9760 handle unprinted ('0') fields. We need to update JUMP_LABEL
9761 because the immediately following unroll pass will use it.
9762 replace_label would not work anyways, because that only handles
9764 if (GET_CODE (p) == JUMP_INSN && JUMP_LABEL (p) == end_label)
9765 JUMP_LABEL (p) = label;
9770 /* Replace MEM with its associated pseudo register. This function is
9771 called from load_mems via for_each_rtx. DATA is actually an
9772 rtx_and_int * describing the instruction currently being scanned
9773 and the MEM we are currently replacing. */
9776 replace_loop_mem (mem, data)
9788 switch (GET_CODE (m))
9794 /* We're not interested in the MEM associated with a
9795 CONST_DOUBLE, so there's no need to traverse into one. */
9799 /* This is not a MEM. */
9803 ri = (rtx_and_int*) data;
9806 if (!rtx_equal_p (loop_mems[i].mem, m))
9807 /* This is not the MEM we are currently replacing. */
9812 /* Actually replace the MEM. */
9813 validate_change (insn, mem, loop_mems[i].reg, 1);
9818 /* Replace occurrences of the old exit label for the loop with the new
9819 one. DATA is an rtx_pair containing the old and new labels,
9823 replace_label (x, data)
9828 rtx old_label = ((rtx_pair*) data)->r1;
9829 rtx new_label = ((rtx_pair*) data)->r2;
9834 if (GET_CODE (l) != LABEL_REF)
9837 if (XEXP (l, 0) != old_label)
9840 XEXP (l, 0) = new_label;
9841 ++LABEL_NUSES (new_label);
9842 --LABEL_NUSES (old_label);