Add the SiS "7007" OHCI IEEE 1394 controller.
[dragonfly.git] / sys / bus / firewire / fwohcireg.h
index 6e411da..9536c54 100644 (file)
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  * 
- * $FreeBSD: src/sys/dev/firewire/fwohcireg.h,v 1.2.2.6 2003/04/28 03:29:18 simokawa Exp $
- * $DragonFly: src/sys/bus/firewire/fwohcireg.h,v 1.2 2003/06/17 04:28:25 dillon Exp $
+ * $FreeBSD: src/sys/dev/firewire/fwohcireg.h,v 1.15 2004/01/06 14:24:01 simokawa Exp $
+ * $DragonFly: src/sys/bus/firewire/fwohcireg.h,v 1.11 2004/07/16 12:37:02 asmodai Exp $
  *
  */
 #define                PCI_CBMEM               0x10
 
+#define                FW_VENDORID_NATSEMI     0x1000
 #define                FW_VENDORID_NEC         0x1033
+#define                FW_VENDORID_SIS         0x1039
 #define                FW_VENDORID_TI          0x104c
 #define                FW_VENDORID_SONY        0x104d
 #define                FW_VENDORID_VIA         0x1106
 #define                FW_VENDORID_RICOH       0x1180
 #define                FW_VENDORID_APPLE       0x106b
 #define                FW_VENDORID_LUCENT      0x11c1
+#define                FW_VENDORID_INTEL       0x8086
+#define                FW_VENDORID_ADAPTEC     0x9004
 
+#define                FW_DEVICE_CS4210        (0x000f << 16)
 #define                FW_DEVICE_UPD861        (0x0063 << 16)
 #define                FW_DEVICE_UPD871        (0x00ce << 16)
 #define                FW_DEVICE_UPD72870      (0x00cd << 16)
+#define                FW_DEVICE_UPD72873      (0x00e7 << 16)
 #define                FW_DEVICE_UPD72874      (0x00f2 << 16)
 #define                FW_DEVICE_TITSB22       (0x8009 << 16)
 #define                FW_DEVICE_TITSB23       (0x8019 << 16)
@@ -55,6 +61,8 @@
 #define                FW_DEVICE_TITSB43       (0x8021 << 16)
 #define                FW_DEVICE_TITSB43A      (0x8023 << 16)
 #define                FW_DEVICE_TITSB43AB23   (0x8024 << 16)
+#define                FW_DEVICE_TITSB82AA2    (0x8025 << 16)
+#define                FW_DEVICE_TITSB43AB21   (0x8026 << 16)
 #define                FW_DEVICE_TIPCI4410A    (0x8017 << 16)
 #define                FW_DEVICE_TIPCI4450     (0x8011 << 16)
 #define                FW_DEVICE_TIPCI4451     (0x8027 << 16)
 #define                FW_DEVICE_R5C552        (0x0552 << 16)
 #define                FW_DEVICE_PANGEA        (0x0030 << 16)
 #define                FW_DEVICE_UNINORTH      (0x0031 << 16)
+#define                FW_DEVICE_AIC5800       (0x5800 << 16)
 #define                FW_DEVICE_FW322         (0x5811 << 16)
+#define                FW_DEVICE_7007          (0x7007 << 16)
+#define                FW_DEVICE_82372FB       (0x7605 << 16)
 
 #define PCI_INTERFACE_OHCI     0x10
 
@@ -76,7 +87,7 @@
 #define                OHCI_MAX_DMA_CH         (0x4 + OHCI_DMA_ITCH + OHCI_DMA_IRCH)
 
 
-typedef volatile u_int32_t     fwohcireg_t;
+typedef u_int32_t      fwohcireg_t;
 
 /* for PCI */
 #if BYTE_ORDER == BIG_ENDIAN
@@ -94,12 +105,12 @@ typedef volatile u_int32_t         fwohcireg_t;
 struct fwohcidb {
        union {
                struct {
-                       volatile u_int32_t cmd;
-                       volatile u_int32_t addr;
-                       volatile u_int32_t depend;
-                       volatile u_int32_t res;
+                       u_int32_t cmd;
+                       u_int32_t addr;
+                       u_int32_t depend;
+                       u_int32_t res;
                } desc;
-               volatile u_int32_t immed[4];
+               u_int32_t immed[4];
        } db;
 #define OHCI_STATUS_SHIFT      16
 #define OHCI_COUNT_MASK                0xffff
@@ -171,6 +182,40 @@ struct fwohcidb {
 
 #define FWOHCIEV_MASK 0x1f
 
+struct ohci_dma{
+       fwohcireg_t     cntl;
+
+#define        OHCI_CNTL_CYCMATCH_S    (0x1 << 31)
+
+#define        OHCI_CNTL_BUFFIL        (0x1 << 31)
+#define        OHCI_CNTL_ISOHDR        (0x1 << 30)
+#define        OHCI_CNTL_CYCMATCH_R    (0x1 << 29)
+#define        OHCI_CNTL_MULTICH       (0x1 << 28)
+
+#define        OHCI_CNTL_DMA_RUN       (0x1 << 15)
+#define        OHCI_CNTL_DMA_WAKE      (0x1 << 12)
+#define        OHCI_CNTL_DMA_DEAD      (0x1 << 11)
+#define        OHCI_CNTL_DMA_ACTIVE    (0x1 << 10)
+#define        OHCI_CNTL_DMA_BT        (0x1 << 8)
+#define        OHCI_CNTL_DMA_BAD       (0x1 << 7)
+#define        OHCI_CNTL_DMA_STAT      (0xff)
+
+       fwohcireg_t     cntl_clr;
+       fwohcireg_t     dummy0;
+       fwohcireg_t     cmd;
+       fwohcireg_t     match;
+       fwohcireg_t     dummy1;
+       fwohcireg_t     dummy2;
+       fwohcireg_t     dummy3;
+};
+
+struct ohci_itdma{
+       fwohcireg_t     cntl;
+       fwohcireg_t     cntl_clr;
+       fwohcireg_t     dummy0;
+       fwohcireg_t     cmd;
+};
+
 struct ohci_registers {
        fwohcireg_t     ver;            /* Version No. 0x0 */
        fwohcireg_t     guid;           /* GUID_ROM No. 0x4 */
@@ -262,32 +307,6 @@ struct ohci_registers {
 
        fwohcireg_t     dummy7[23];     /* dummy 0x124-0x17c */
        
-       struct ohci_dma{
-               fwohcireg_t     cntl;
-
-#define        OHCI_CNTL_CYCMATCH_S    (0x1 << 31)
-
-#define        OHCI_CNTL_BUFFIL        (0x1 << 31)
-#define        OHCI_CNTL_ISOHDR        (0x1 << 30)
-#define        OHCI_CNTL_CYCMATCH_R    (0x1 << 29)
-#define        OHCI_CNTL_MULTICH       (0x1 << 28)
-
-#define        OHCI_CNTL_DMA_RUN       (0x1 << 15)
-#define        OHCI_CNTL_DMA_WAKE      (0x1 << 12)
-#define        OHCI_CNTL_DMA_DEAD      (0x1 << 11)
-#define        OHCI_CNTL_DMA_ACTIVE    (0x1 << 10)
-#define        OHCI_CNTL_DMA_BT        (0x1 << 8)
-#define        OHCI_CNTL_DMA_BAD       (0x1 << 7)
-#define        OHCI_CNTL_DMA_STAT      (0xff)
-
-               fwohcireg_t     cntl_clr;
-               fwohcireg_t     dummy0;
-               fwohcireg_t     cmd;
-               fwohcireg_t     match;
-               fwohcireg_t     dummy1;
-               fwohcireg_t     dummy2;
-               fwohcireg_t     dummy3;
-       };
        /*       0x180, 0x184, 0x188, 0x18c */
        /*       0x190, 0x194, 0x198, 0x19c */
        /*       0x1a0, 0x1a4, 0x1a8, 0x1ac */
@@ -300,24 +319,17 @@ struct ohci_registers {
 
        /*       0x200, 0x204, 0x208, 0x20c */
        /*       0x210, 0x204, 0x208, 0x20c */
-       struct ohci_itdma{
-               fwohcireg_t     cntl;
-               fwohcireg_t     cntl_clr;
-               fwohcireg_t     dummy0;
-               fwohcireg_t     cmd;
-       };
        struct ohci_itdma dma_itch[0x20];
 
        /*       0x400, 0x404, 0x408, 0x40c */
        /*       0x410, 0x404, 0x408, 0x40c */
-
        struct ohci_dma dma_irch[0x20];
 };
 
 struct fwohcidb_tr{
        STAILQ_ENTRY(fwohcidb_tr) link;
        struct fw_xfer *xfer;
-       volatile struct fwohcidb *db;
+       struct fwohcidb *db;
        bus_dmamap_t dma_map;
        caddr_t buf;
        bus_addr_t bus_addr;
@@ -332,8 +344,7 @@ struct fwohci_txpkthdr{
                u_int32_t ld[4];
                struct {
 #if BYTE_ORDER == BIG_ENDIAN
-                       u_int32_t :13,
-                                 spd:3,
+                       u_int32_t spd:16, /* XXX include reserved field */
                                  :8,
                                  tcode:4,
                                  :4;
@@ -341,8 +352,7 @@ struct fwohci_txpkthdr{
                        u_int32_t :4,
                                  tcode:4,
                                  :8,
-                                 spd:3,
-                                 :13;
+                                 spd:16; /* XXX include reserved fields */
 #endif
                }common;
                struct {