From: Peter Avalos <pavalos@dragonflybsd.org>
Date: Thu, 5 Jul 2007 05:17:39 +0000 (+0000)
Subject: When performing our register test, be careful
X-Git-Tag: v2.0.1~2654
X-Git-Url: https://gitweb.dragonflybsd.org/dragonfly.git/commitdiff_plain/848751dd86f457fdf6702dc6524799f4957cced4

When performing our register test, be careful
to avoid resetting the chip when pausing the
controller.  The test reads the HCNTRL register
and then writes it back with the PAUSE bit
explicitly set.  If the last write to the controller
before our probe is to reset it, the CHIPRST
bit will still be set, so we must mask it off
before the PAUSE operation.  On some chip versions,
we cannot access registers for a few 100us after
a reset, so this inadvertant reset was causing PCI
errors to occur on the read to check for paused
status.

Obtained-from: FreeBSD
---

diff --git a/sys/dev/disk/aic7xxx/aic79xx_pci.c b/sys/dev/disk/aic7xxx/aic79xx_pci.c
index 2bee063865..98a9b66bf9 100644
--- a/sys/dev/disk/aic7xxx/aic79xx_pci.c
+++ b/sys/dev/disk/aic7xxx/aic79xx_pci.c
@@ -38,10 +38,10 @@
  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGES.
  *
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx_pci.c#76 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx_pci.c#80 $
  *
- * $FreeBSD: src/sys/dev/aic7xxx/aic79xx_pci.c,v 1.14 2003/06/28 04:39:49 gibbs Exp $
- * $DragonFly: src/sys/dev/disk/aic7xxx/aic79xx_pci.c,v 1.7 2007/07/04 22:56:30 pavalos Exp $
+ * $FreeBSD: src/sys/dev/aic7xxx/aic79xx_pci.c,v 1.16 2003/09/25 23:36:41 scottl Exp $
+ * $DragonFly: src/sys/dev/disk/aic7xxx/aic79xx_pci.c,v 1.8 2007/07/05 05:17:39 pavalos Exp $
  */
 
 #ifdef __linux__
@@ -450,8 +450,10 @@ ahd_pci_test_register_access(struct ahd_softc *ahd)
 	 * or read prefetching could be initiated by the
 	 * CPU or host bridge.  Our device does not support
 	 * either, so look for data corruption and/or flaged
-	 * PCI errors.
+	 * PCI errors.  First pause without causing another
+	 * chip reset.
 	 */
+	hcntrl &= ~CHIPRST;
 	ahd_outb(ahd, HCNTRL, hcntrl|PAUSE);
 	while (ahd_is_paused(ahd) == 0)
 		;
diff --git a/sys/dev/disk/aic7xxx/aic7xxx_pci.c b/sys/dev/disk/aic7xxx/aic7xxx_pci.c
index fdfaa3240c..b74a594de3 100644
--- a/sys/dev/disk/aic7xxx/aic7xxx_pci.c
+++ b/sys/dev/disk/aic7xxx/aic7xxx_pci.c
@@ -39,10 +39,10 @@
  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGES.
  *
- * $Id: //depot/aic7xxx/aic7xxx/aic7xxx_pci.c#69 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic7xxx_pci.c#72 $
  *
- * $FreeBSD: src/sys/dev/aic7xxx/aic7xxx_pci.c,v 1.30 2003/09/02 17:30:34 jhb Exp $
- * $DragonFly: src/sys/dev/disk/aic7xxx/aic7xxx_pci.c,v 1.8 2007/07/05 05:08:32 pavalos Exp $
+ * $FreeBSD: src/sys/dev/aic7xxx/aic7xxx_pci.c,v 1.31 2003/09/25 23:36:41 scottl Exp $
+ * $DragonFly: src/sys/dev/disk/aic7xxx/aic7xxx_pci.c,v 1.9 2007/07/05 05:17:39 pavalos Exp $
  */
 
 #ifdef __linux__
@@ -1284,8 +1284,10 @@ ahc_pci_test_register_access(struct ahc_softc *ahc)
 	 * or read prefetching could be initiated by the
 	 * CPU or host bridge.  Our device does not support
 	 * either, so look for data corruption and/or flagged
-	 * PCI errors.
+	 * PCI errors.  First pause without causing another
+	 * chip reset.
 	 */
+	hcntrl &= ~CHIPRST;
 	ahc_outb(ahc, HCNTRL, hcntrl|PAUSE);
 	while (ahc_is_paused(ahc) == 0)
 		;