From 37e7efecc3391ce9c2d1d5bcb67d4d545304b1ba Mon Sep 17 00:00:00 2001
From: Matthew Dillon <dillon@dragonflybsd.org>
Date: Wed, 2 Nov 2005 18:42:11 +0000
Subject: [PATCH] ICU/APIC cleanup part 5/many.

Start migrating the ICU and APIC interrupt interfaces to a new machine
level interrupt ABI.  This ABI will eventually be tied into the BUS
architecture.

Move INTRDIS/INTREN to the new API: machintr_intrdis(irq) and
machintr_intren(irq).

Get rid of ithread_unmask().  Have the interrupt thread code call
machintr_intrdis(irq) directly.
---
 sys/conf/files                                |   3 +-
 sys/i386/apic/apic_abi.c                      | 121 +++++++++++++++++-
 sys/i386/apic/apic_ipl.s                      |   6 +-
 sys/i386/i386/autoconf.c                      |  28 +---
 sys/i386/i386/mp_machdep.c                    |  44 +------
 sys/i386/icu/icu.h                            |   9 +-
 sys/i386/icu/icu_abi.c                        |  47 ++++++-
 sys/i386/icu/icu_ipl.s                        |   6 +-
 sys/i386/include/smp.h                        |   4 +-
 sys/i386/isa/clock.c                          |  18 +--
 sys/i386/isa/intr_machdep.c                   |  48 +------
 sys/kern/kern_intr.c                          |   5 +-
 .../apic/apic_abi.c => kern/kern_machintr.c}  |  23 +++-
 sys/platform/pc32/apic/apic_abi.c             | 121 +++++++++++++++++-
 sys/platform/pc32/apic/apic_ipl.s             |   6 +-
 sys/platform/pc32/i386/autoconf.c             |  28 +---
 sys/platform/pc32/i386/mp_machdep.c           |  44 +------
 sys/platform/pc32/icu/icu.h                   |   9 +-
 sys/platform/pc32/icu/icu_abi.c               |  47 ++++++-
 sys/platform/pc32/icu/icu_ipl.s               |   6 +-
 sys/platform/pc32/include/smp.h               |   4 +-
 sys/platform/pc32/isa/clock.c                 |  18 +--
 sys/platform/pc32/isa/intr_machdep.c          |  48 +------
 sys/sys/interrupt.h                           |   3 +-
 .../pc32/apic/apic_abi.c => sys/machintr.h}   |  33 ++++-
 25 files changed, 450 insertions(+), 279 deletions(-)
 copy sys/{platform/pc32/apic/apic_abi.c => kern/kern_machintr.c} (68%)
 copy sys/{platform/pc32/apic/apic_abi.c => sys/machintr.h} (65%)

diff --git a/sys/conf/files b/sys/conf/files
index bc12e9a7e6..3bac80164e 100644
--- a/sys/conf/files
+++ b/sys/conf/files
@@ -1,5 +1,5 @@
 # $FreeBSD: src/sys/conf/files,v 1.340.2.137 2003/06/04 17:10:30 sam Exp $
-# $DragonFly: src/sys/conf/files,v 1.109 2005/10/24 16:45:10 dillon Exp $
+# $DragonFly: src/sys/conf/files,v 1.110 2005/11/02 18:41:50 dillon Exp $
 #
 # The long compile-with and dependency lines are required because of
 # limitations in config: backslash-newline doesn't work in strings, and
@@ -473,6 +473,7 @@ kern/init_main.c	standard
 kern/init_sysent.c	standard
 kern/kern_checkpoint.c	standard
 kern/kern_intr.c	standard
+kern/kern_machintr.c	standard
 kern/kern_varsym.c	standard
 kern/kern_module.c	standard
 kern/kern_linker.c	standard
diff --git a/sys/i386/apic/apic_abi.c b/sys/i386/apic/apic_abi.c
index aaf04d01db..775d16ab23 100644
--- a/sys/i386/apic/apic_abi.c
+++ b/sys/i386/apic/apic_abi.c
@@ -30,7 +30,126 @@
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
+ * All code starting at the apic_finalize() procedure definition is:
+ *
+ * Copyright (c) 1996, by Steve Passe
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. The name of the developer may NOT be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
  * 
- * $DragonFly: src/sys/i386/apic/Attic/apic_abi.c,v 1.1 2005/11/02 17:19:59 dillon Exp $
+ * $DragonFly: src/sys/i386/apic/Attic/apic_abi.c,v 1.2 2005/11/02 18:41:59 dillon Exp $
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/machintr.h>
+#include <machine/smp.h>
+
+#ifdef APIC_IO
+
+extern void APIC_INTREN(int);
+extern void APIC_INTRDIS(int);
+
+static int apic_setvar(int, const void *);
+static int apic_getvar(int, void *);
+static void apic_finalize(void);
+
+static int picmode;
+
+struct machintr_abi MachIntrABI = {
+	MACHINTR_APIC,
+	APIC_INTRDIS,
+	APIC_INTREN,
+	apic_setvar,
+	apic_getvar,
+	apic_finalize
+};
+
+static int
+apic_setvar(int varid, const void *buf)
+{
+    int error = 0;
+
+    switch(varid) {
+    case MACHINTR_VAR_PICMODE:
+	picmode = *(const int *)buf;
+	break;
+    default:
+	error = ENOENT;
+	break;
+    }
+    return (error);
+}
+
+static int
+apic_getvar(int varid, void *buf)
+{
+    int error = 0;
+
+    switch(varid) {
+    case MACHINTR_VAR_PICMODE:
+	*(int *)buf = picmode;
+	break;
+    default:
+	error = ENOENT;
+	break;
+    }
+    return (error);
+}
+
+/*
+ * Final configuration of the BSP's local APIC:
+ *  - disable 'pic mode'.
+ *  - disable 'virtual wire mode'.
+ *  - enable NMI.
  */
+static void
+apic_finalize(void)
+{
+    u_char		byte;
+    u_int32_t	temp;
+
+    /* leave 'pic mode' if necessary */
+    if (picmode) {
+	outb(0x22, 0x70);	/* select IMCR */
+	byte = inb(0x23);	/* current contents */
+	byte |= 0x01;		/* mask external INTR */
+	outb(0x23, byte);	/* disconnect 8259s/NMI */
+    }
+
+    /* mask lint0 (the 8259 'virtual wire' connection) */
+    temp = lapic.lvt_lint0;
+    temp |= APIC_LVT_M;		/* set the mask */
+    lapic.lvt_lint0 = temp;
+
+    /* setup lint1 to handle NMI */
+    temp = lapic.lvt_lint1;
+    temp &= ~APIC_LVT_M;		/* clear the mask */
+    lapic.lvt_lint1 = temp;
+
+    if (bootverbose)
+	apic_dump("bsp_apic_configure()");
+}
+
+#endif
 
diff --git a/sys/i386/apic/apic_ipl.s b/sys/i386/apic/apic_ipl.s
index fded7cbb27..0ab30c4b3b 100644
--- a/sys/i386/apic/apic_ipl.s
+++ b/sys/i386/apic/apic_ipl.s
@@ -54,7 +54,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/isa/apic_ipl.s,v 1.27.2.2 2000/09/30 02:49:35 ps Exp $
- * $DragonFly: src/sys/i386/apic/Attic/apic_ipl.s,v 1.12 2005/11/02 17:47:29 dillon Exp $
+ * $DragonFly: src/sys/i386/apic/Attic/apic_ipl.s,v 1.13 2005/11/02 18:41:59 dillon Exp $
  */
 
 #include "use_npx.h"
@@ -94,7 +94,7 @@ apic_imen:
 	 * Functions to enable and disable a hardware interrupt.  The
 	 * IRQ number is passed as an argument.
 	 */
-ENTRY(INTRDIS)
+ENTRY(APIC_INTRDIS)
 	IMASK_LOCK			/* enter critical reg */
 	movl	4(%esp),%eax
 1:
@@ -110,7 +110,7 @@ ENTRY(INTRDIS)
 	IMASK_UNLOCK			/* exit critical reg */
 	ret
 
-ENTRY(INTREN)
+ENTRY(APIC_INTREN)
 	IMASK_LOCK			/* enter critical reg */
 	movl	4(%esp), %eax		/* mask into %eax */
 1:
diff --git a/sys/i386/i386/autoconf.c b/sys/i386/i386/autoconf.c
index 2e371f366e..d17f1519a1 100644
--- a/sys/i386/i386/autoconf.c
+++ b/sys/i386/i386/autoconf.c
@@ -35,7 +35,7 @@
  *
  *	from: @(#)autoconf.c	7.1 (Berkeley) 5/9/91
  * $FreeBSD: src/sys/i386/i386/autoconf.c,v 1.146.2.2 2001/06/07 06:05:58 dd Exp $
- * $DragonFly: src/sys/i386/i386/Attic/autoconf.c,v 1.21 2005/11/02 17:47:30 dillon Exp $
+ * $DragonFly: src/sys/i386/i386/Attic/autoconf.c,v 1.22 2005/11/02 18:42:01 dillon Exp $
  */
 
 /*
@@ -70,6 +70,7 @@
 #include <sys/cons.h>
 #include <sys/thread.h>
 #include <sys/device.h>
+#include <sys/machintr.h>
 
 #include <machine/bootinfo.h>
 #include <machine/ipl.h>
@@ -127,30 +128,11 @@ static void
 configure(dummy)
 	void *dummy;
 {
-
-	/*
-	 * Activate the ICU's.  Note that we are explicitly at splhigh()
-	 * at present as we have no way to disable stray PCI level triggered
-	 * interrupts until the devices have had a driver attached.  This
-	 * is particularly a problem when the interrupts are shared.  For
-	 * example, if IRQ 10 is shared between a disk and network device
-	 * and the disk device generates an interrupt, if we "activate"
-	 * IRQ 10 when the network driver is set up, then we will get
-	 * recursive interrupt 10's as nothing will know how to turn off
-	 * the disk device's interrupt.
-	 *
-	 * Having the ICU's active means we can probe interrupt routing to
-	 * see if a device causes the corresponding pending bit to be set.
-	 *
-	 * This is all rather inconvenient.
+        /*
+	 * Final interrupt support acviation, then enable hardware interrupts.
 	 */
-#ifdef APIC_IO
-	bsp_apic_configure();
+	MachIntrABI.finalize();
 	cpu_enable_intr();
-#else
-	cpu_enable_intr();
-	INTREN(ICU_IRQ_SLAVE);
-#endif /* APIC_IO */
 
 	/*
 	 * This will configure all devices, generally starting with the
diff --git a/sys/i386/i386/mp_machdep.c b/sys/i386/i386/mp_machdep.c
index 989f3729c5..f729b6e188 100644
--- a/sys/i386/i386/mp_machdep.c
+++ b/sys/i386/i386/mp_machdep.c
@@ -23,7 +23,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/i386/mp_machdep.c,v 1.115.2.15 2003/03/14 21:22:35 jhb Exp $
- * $DragonFly: src/sys/i386/i386/Attic/mp_machdep.c,v 1.41 2005/11/02 08:33:25 dillon Exp $
+ * $DragonFly: src/sys/i386/i386/Attic/mp_machdep.c,v 1.42 2005/11/02 18:42:01 dillon Exp $
  */
 
 #include "opt_cpu.h"
@@ -35,6 +35,7 @@
 #include <sys/malloc.h>
 #include <sys/memrange.h>
 #include <sys/cons.h>	/* cngetc() */
+#include <sys/machintr.h>
 
 #include <vm/vm.h>
 #include <vm/vm_param.h>
@@ -280,7 +281,6 @@ static u_int	boot_address;
 static u_int	base_memory;
 static int	mp_finish;
 
-static int	picmode;		/* 0: virtual wire mode, 1: PIC mode */
 static mpfps_t	mpfps;
 static int	search_for_sig(u_int32_t target, int count);
 static void	mp_enable(u_int boot_addr);
@@ -481,44 +481,6 @@ init_secondary(void)
 	enable_sse();
 }
 
-
-#if defined(APIC_IO)
-/*
- * Final configuration of the BSP's local APIC:
- *  - disable 'pic mode'.
- *  - disable 'virtual wire mode'.
- *  - enable NMI.
- */
-void
-bsp_apic_configure(void)
-{
-	u_char		byte;
-	u_int32_t	temp;
-
-	/* leave 'pic mode' if necessary */
-	if (picmode) {
-		outb(0x22, 0x70);	/* select IMCR */
-		byte = inb(0x23);	/* current contents */
-		byte |= 0x01;		/* mask external INTR */
-		outb(0x23, byte);	/* disconnect 8259s/NMI */
-	}
-
-	/* mask lint0 (the 8259 'virtual wire' connection) */
-	temp = lapic.lvt_lint0;
-	temp |= APIC_LVT_M;		/* set the mask */
-	lapic.lvt_lint0 = temp;
-
-        /* setup lint1 to handle NMI */
-        temp = lapic.lvt_lint1;
-        temp &= ~APIC_LVT_M;		/* clear the mask */
-        lapic.lvt_lint1 = temp;
-
-	if (bootverbose)
-		apic_dump("bsp_apic_configure()");
-}
-#endif  /* APIC_IO */
-
-
 /*******************************************************************
  * local functions and data
  */
@@ -842,6 +804,7 @@ mptable_pass2(void)
 	int     count;
 	int     type;
 	int     apic, bus, cpu, intr;
+	int	picmode;
 	int	i, j;
 	int	pgeflag;
 
@@ -909,6 +872,7 @@ mptable_pass2(void)
 
 	/* record whether PIC or virtual-wire mode */
 	picmode = (mpfps->mpfb2 & 0x80) ? 1 : 0;
+	machintr_setvar_simple(MACHINTR_VAR_PICMODE, picmode);
 
 	/* check for use of 'default' configuration */
 	if (MPFPS_MPFB1 != 0)
diff --git a/sys/i386/icu/icu.h b/sys/i386/icu/icu.h
index 1d60adb80c..2895e024de 100644
--- a/sys/i386/icu/icu.h
+++ b/sys/i386/icu/icu.h
@@ -35,7 +35,7 @@
  *
  *	from: @(#)icu.h	5.6 (Berkeley) 5/9/91
  * $FreeBSD: src/sys/i386/isa/icu.h,v 1.18 1999/12/26 12:43:47 bde Exp $
- * $DragonFly: src/sys/i386/icu/Attic/icu.h,v 1.7 2005/11/02 17:47:31 dillon Exp $
+ * $DragonFly: src/sys/i386/icu/Attic/icu.h,v 1.8 2005/11/02 18:42:03 dillon Exp $
  */
 
 /*
@@ -46,13 +46,6 @@
 #ifndef _I386_ISA_ICU_H_
 #define	_I386_ISA_ICU_H_
 
-#ifndef LOCORE
-
-void   INTREN(int);
-void   INTRDIS(int);
-
-#endif
-
 /*
  * Note: The APIC uses different values for IRQxxx.
  *	 Unfortunately many drivers use the 8259 values as indexes
diff --git a/sys/i386/icu/icu_abi.c b/sys/i386/icu/icu_abi.c
index 44c6d39c3e..0ae0a5f175 100644
--- a/sys/i386/icu/icu_abi.c
+++ b/sys/i386/icu/icu_abi.c
@@ -31,6 +31,51 @@
  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  * 
- * $DragonFly: src/sys/i386/icu/Attic/icu_abi.c,v 1.1 2005/11/02 17:20:00 dillon Exp $
+ * $DragonFly: src/sys/i386/icu/Attic/icu_abi.c,v 1.2 2005/11/02 18:42:03 dillon Exp $
  */
 
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/machintr.h>
+#include "icu.h"
+
+#ifndef APIC_IO
+
+extern void ICU_INTREN(int);
+extern void ICU_INTRDIS(int);
+
+static int icu_setvar(int, const void *);
+static int icu_getvar(int, void *);
+static void icu_finalize(void);
+
+struct machintr_abi MachIntrABI = {
+    MACHINTR_ICU,
+    ICU_INTRDIS,
+    ICU_INTREN,
+    icu_setvar,
+    icu_getvar,
+    icu_finalize
+};
+
+static 
+int
+icu_setvar(int varid __unused, const void *buf __unused)
+{
+    return (ENOENT);
+}
+
+static
+int
+icu_getvar(int varid __unused, void *buf __unused)
+{
+    return (ENOENT);
+}
+
+static void
+icu_finalize(void)
+{
+    machintr_intren(ICU_IRQ_SLAVE);
+}
+
+#endif
diff --git a/sys/i386/icu/icu_ipl.s b/sys/i386/icu/icu_ipl.s
index 5d0e13a566..5b9a26b2f8 100644
--- a/sys/i386/icu/icu_ipl.s
+++ b/sys/i386/icu/icu_ipl.s
@@ -67,7 +67,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/isa/icu_ipl.s,v 1.6 1999/08/28 00:44:42 peter Exp $
- * $DragonFly: src/sys/i386/icu/Attic/icu_ipl.s,v 1.11 2005/11/02 17:47:31 dillon Exp $
+ * $DragonFly: src/sys/i386/icu/Attic/icu_ipl.s,v 1.12 2005/11/02 18:42:03 dillon Exp $
  */
 
 #include "use_npx.h"
@@ -108,7 +108,7 @@ icu_imen:
 	 * INTREN(irq)
 	 * INTDIS(irq)
 	 */
-ENTRY(INTRDIS)
+ENTRY(ICU_INTRDIS)
 	movl	4(%esp),%eax
 	btsl	%eax,icu_imen
 	pushfl
@@ -120,7 +120,7 @@ ENTRY(INTRDIS)
 	popfl
 	ret
 
-ENTRY(INTREN)
+ENTRY(ICU_INTREN)
 	movl	4(%esp),%eax
 	btrl	%eax,icu_imen
 	pushfl
diff --git a/sys/i386/include/smp.h b/sys/i386/include/smp.h
index 921a4afc41..90ade8638e 100644
--- a/sys/i386/include/smp.h
+++ b/sys/i386/include/smp.h
@@ -7,7 +7,7 @@
  * ----------------------------------------------------------------------------
  *
  * $FreeBSD: src/sys/i386/include/smp.h,v 1.50.2.5 2001/02/13 22:32:45 tegge Exp $
- * $DragonFly: src/sys/i386/include/Attic/smp.h,v 1.14 2005/11/02 08:33:27 dillon Exp $
+ * $DragonFly: src/sys/i386/include/Attic/smp.h,v 1.15 2005/11/02 18:42:06 dillon Exp $
  *
  */
 
@@ -64,7 +64,6 @@ extern int			bsp_apic_ready;
 extern int			mp_naps;
 extern int			mp_nbusses;
 extern int			mp_napics;
-extern int			mp_picmode;
 extern int			boot_cpu_id;
 extern vm_offset_t		cpu_apic_address;
 extern vm_offset_t		io_apic_address[];
@@ -103,7 +102,6 @@ int	apic_trigger		(int, int);
 int	apic_polarity		(int, int);
 void	assign_apic_irq		(int apic, int intpin, int irq);
 void	revoke_apic_irq		(int irq);
-void	bsp_apic_configure	(void);
 void	init_secondary		(void);
 int	stop_cpus		(u_int);
 void	ap_init			(void);
diff --git a/sys/i386/isa/clock.c b/sys/i386/isa/clock.c
index ccbc85f99c..b6dbc1b5ce 100644
--- a/sys/i386/isa/clock.c
+++ b/sys/i386/isa/clock.c
@@ -35,7 +35,7 @@
  *
  *	from: @(#)clock.c	7.2 (Berkeley) 5/12/91
  * $FreeBSD: src/sys/i386/isa/clock.c,v 1.149.2.6 2002/11/02 04:41:50 iwasaki Exp $
- * $DragonFly: src/sys/i386/isa/Attic/clock.c,v 1.38 2005/11/02 17:47:33 dillon Exp $
+ * $DragonFly: src/sys/i386/isa/Attic/clock.c,v 1.39 2005/11/02 18:42:08 dillon Exp $
  */
 
 /*
@@ -67,6 +67,7 @@
 #include <sys/globaldata.h>
 #include <sys/thread2.h>
 #include <sys/systimer.h>
+#include <sys/machintr.h>
 
 #include <machine/clock.h>
 #ifdef CLK_CALIBRATION_LOOP
@@ -994,13 +995,13 @@ cpu_initclocks()
 
 	clkdesc = inthand_add("clk", apic_8254_intr, clkintr,
 			      NULL, INTR_EXCL | INTR_FAST | INTR_NOPOLL, NULL);
-	INTREN(apic_8254_intr);
+	machintr_intren(apic_8254_intr);
 	
 #else /* APIC_IO */
 
 	inthand_add("clk", 0, clkintr, NULL,
 		    INTR_EXCL | INTR_FAST | INTR_NOPOLL, NULL);
-	INTREN(ICU_IRQ0);
+	machintr_intren(ICU_IRQ0);
 
 #endif /* APIC_IO */
 
@@ -1020,12 +1021,7 @@ cpu_initclocks()
 
 		inthand_add("rtc", 8, (inthand2_t *)rtcintr, NULL,
 			    INTR_EXCL | INTR_FAST | INTR_NOPOLL, NULL);
-
-#ifdef APIC_IO
-		INTREN(APIC_IRQ8);
-#else
-		INTREN(ICU_IRQ8);
-#endif /* APIC_IO */
+		machintr_intren(8);
 
 		writertc(RTC_STATUSB, rtc_statusb);
 	}
@@ -1054,7 +1050,7 @@ cpu_initclocks()
 			 * on the IO APIC.
 			 * Workaround: Limited variant of mixed mode.
 			 */
-			INTRDIS(apic_8254_intr);
+			machintr_intrdis(apic_8254_intr);
 			inthand_remove(clkdesc);
 			printf("APIC_IO: Broken MP table detected: "
 			       "8254 is not connected to "
@@ -1078,7 +1074,7 @@ cpu_initclocks()
 				    clkintr,
 				    NULL,
 				    INTR_EXCL | INTR_FAST | INTR_NOPOLL, NULL);
-			INTREN(apic_8254_intr);
+			machintr_intren(apic_8254_intr);
 		}
 		
 	}
diff --git a/sys/i386/isa/intr_machdep.c b/sys/i386/isa/intr_machdep.c
index 03e980828a..02d516972e 100644
--- a/sys/i386/isa/intr_machdep.c
+++ b/sys/i386/isa/intr_machdep.c
@@ -35,7 +35,7 @@
  *
  *	from: @(#)isa.c	7.2 (Berkeley) 5/13/91
  * $FreeBSD: src/sys/i386/isa/intr_machdep.c,v 1.29.2.5 2001/10/14 06:54:27 luigi Exp $
- * $DragonFly: src/sys/i386/isa/Attic/intr_machdep.c,v 1.36 2005/11/02 17:47:33 dillon Exp $
+ * $DragonFly: src/sys/i386/isa/Attic/intr_machdep.c,v 1.37 2005/11/02 18:42:08 dillon Exp $
  */
 /*
  * This file contains an aggregated module marked:
@@ -63,6 +63,7 @@
 #include <machine/globaldata.h>
 #include <sys/proc.h>
 #include <sys/thread2.h>
+#include <sys/machintr.h>
 
 #include <machine/smptests.h>			/** FAST_HI */
 #include <machine/smp.h>
@@ -225,7 +226,7 @@ icu_reinit()
 	init_i8259();
 	for (i = 0; i < ICU_LEN; ++i) {
 		if (count_registered_ints(i))
-			INTREN(i);
+			machintr_intren(i);
 	}
 }
 
@@ -354,7 +355,7 @@ icu_setup(int intr, int flags)
 	       flags & INTR_FAST ? fastintr[intr] : slowintr[intr],
 	       SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
 #endif /* FAST_HI && APIC_IO */
-	INTREN(intr);
+	machintr_intren(intr);
 	write_eflags(ef);
 	return (0);
 }
@@ -365,7 +366,7 @@ icu_unset(int intr)
 	u_long	ef;
 
 	KKASSERT((u_int)intr < ICU_LEN);
-	INTRDIS(intr);
+	machintr_intrdis(intr);
 	ef = read_eflags();
 	cpu_disable_intr();	/* YYY */
 #ifdef FAST_HI_XXX
@@ -501,45 +502,6 @@ inthand_remove(void *id)
 	return (0);
 }
 
-/*
- * ithread_done()
- *
- *	This function is called by an interrupt thread when it has completed
- *	processing a loop.  We re-enable interrupts and interlock with
- *	ipending.
- *
- *	See kern/kern_intr.c for more information.
- */
-void
-ithread_unmask(int irq)
-{
-    INTREN(irq);
-}
-
-#if 0
-
-void
-ithread_done(int irq)
-{
-    struct mdglobaldata *gd = mdcpu;
-    thread_t td;
-
-    td = gd->mi.gd_curthread;
-
-    KKASSERT(td->td_pri >= TDPRI_CRIT);
-    lwkt_deschedule_self(td);
-    INTREN(irq);
-    if (gd->gd_ipending & (1 << irq)) {
-	atomic_clear_int_nonlocked(&gd->gd_ipending, (1 << irq));
-	INTRDIS(irq);
-	lwkt_schedule_self(td);
-    } else {
-	lwkt_switch();
-    }
-}
-
-#endif
-
 #ifdef SMP
 /*
  * forward_fast_remote()
diff --git a/sys/kern/kern_intr.c b/sys/kern/kern_intr.c
index 5b96d85654..eec96dad11 100644
--- a/sys/kern/kern_intr.c
+++ b/sys/kern/kern_intr.c
@@ -24,7 +24,7 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/kern/kern_intr.c,v 1.24.2.1 2001/10/14 20:05:50 luigi Exp $
- * $DragonFly: src/sys/kern/kern_intr.c,v 1.29 2005/10/26 01:16:04 dillon Exp $
+ * $DragonFly: src/sys/kern/kern_intr.c,v 1.30 2005/11/02 18:42:09 dillon Exp $
  *
  */
 
@@ -39,6 +39,7 @@
 #include <sys/random.h>
 #include <sys/serialize.h>
 #include <sys/bus.h>
+#include <sys/machintr.h>
 
 #include <machine/ipl.h>
 #include <machine/frame.h>
@@ -664,7 +665,7 @@ ithread_handler(void *arg)
 	 * interrupt on close (the parallel bus being a good example).
 	 */
 	if (*list)
-	    ithread_unmask(intr);
+	    machintr_intren(intr);
 
 	/*
 	 * Do a quick exit/enter to catch any higher-priority interrupt
diff --git a/sys/platform/pc32/apic/apic_abi.c b/sys/kern/kern_machintr.c
similarity index 68%
copy from sys/platform/pc32/apic/apic_abi.c
copy to sys/kern/kern_machintr.c
index 838165d1e6..510983b05f 100644
--- a/sys/platform/pc32/apic/apic_abi.c
+++ b/sys/kern/kern_machintr.c
@@ -31,6 +31,27 @@
  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  * 
- * $DragonFly: src/sys/platform/pc32/apic/apic_abi.c,v 1.1 2005/11/02 17:19:59 dillon Exp $
+ * $DragonFly: src/sys/kern/kern_machintr.c,v 1.1 2005/11/02 18:42:10 dillon Exp $
  */
+/*
+ * This code provides an ABI for managing machine-level interrupts.  The
+ * machine independant code abstracts an interrupt source into an
+ * IRQ number.  At the MI level the number of IRQs is typically limited
+ * to 256, but may be more severely limited by the installed machine-layer.
+ *
+ * machintr structures are manipulated by the BUS and other code and may
+ * contain additional opaque reference info.  MI code is only allowed to
+ * access the irq field.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/machintr.h>
+
+int
+machintr_setvar_simple(int varid, int value)
+{
+    KKASSERT((varid & MACHINTR_VAR_SIZEMASK) == sizeof(int));
+    return (MachIntrABI.setvar(varid, &value));
+}
 
diff --git a/sys/platform/pc32/apic/apic_abi.c b/sys/platform/pc32/apic/apic_abi.c
index 838165d1e6..bf7f194a2f 100644
--- a/sys/platform/pc32/apic/apic_abi.c
+++ b/sys/platform/pc32/apic/apic_abi.c
@@ -30,7 +30,126 @@
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
+ * All code starting at the apic_finalize() procedure definition is:
+ *
+ * Copyright (c) 1996, by Steve Passe
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. The name of the developer may NOT be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
  * 
- * $DragonFly: src/sys/platform/pc32/apic/apic_abi.c,v 1.1 2005/11/02 17:19:59 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/apic/apic_abi.c,v 1.2 2005/11/02 18:41:59 dillon Exp $
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/machintr.h>
+#include <machine/smp.h>
+
+#ifdef APIC_IO
+
+extern void APIC_INTREN(int);
+extern void APIC_INTRDIS(int);
+
+static int apic_setvar(int, const void *);
+static int apic_getvar(int, void *);
+static void apic_finalize(void);
+
+static int picmode;
+
+struct machintr_abi MachIntrABI = {
+	MACHINTR_APIC,
+	APIC_INTRDIS,
+	APIC_INTREN,
+	apic_setvar,
+	apic_getvar,
+	apic_finalize
+};
+
+static int
+apic_setvar(int varid, const void *buf)
+{
+    int error = 0;
+
+    switch(varid) {
+    case MACHINTR_VAR_PICMODE:
+	picmode = *(const int *)buf;
+	break;
+    default:
+	error = ENOENT;
+	break;
+    }
+    return (error);
+}
+
+static int
+apic_getvar(int varid, void *buf)
+{
+    int error = 0;
+
+    switch(varid) {
+    case MACHINTR_VAR_PICMODE:
+	*(int *)buf = picmode;
+	break;
+    default:
+	error = ENOENT;
+	break;
+    }
+    return (error);
+}
+
+/*
+ * Final configuration of the BSP's local APIC:
+ *  - disable 'pic mode'.
+ *  - disable 'virtual wire mode'.
+ *  - enable NMI.
  */
+static void
+apic_finalize(void)
+{
+    u_char		byte;
+    u_int32_t	temp;
+
+    /* leave 'pic mode' if necessary */
+    if (picmode) {
+	outb(0x22, 0x70);	/* select IMCR */
+	byte = inb(0x23);	/* current contents */
+	byte |= 0x01;		/* mask external INTR */
+	outb(0x23, byte);	/* disconnect 8259s/NMI */
+    }
+
+    /* mask lint0 (the 8259 'virtual wire' connection) */
+    temp = lapic.lvt_lint0;
+    temp |= APIC_LVT_M;		/* set the mask */
+    lapic.lvt_lint0 = temp;
+
+    /* setup lint1 to handle NMI */
+    temp = lapic.lvt_lint1;
+    temp &= ~APIC_LVT_M;		/* clear the mask */
+    lapic.lvt_lint1 = temp;
+
+    if (bootverbose)
+	apic_dump("bsp_apic_configure()");
+}
+
+#endif
 
diff --git a/sys/platform/pc32/apic/apic_ipl.s b/sys/platform/pc32/apic/apic_ipl.s
index 66e06576d8..be13c4fe5d 100644
--- a/sys/platform/pc32/apic/apic_ipl.s
+++ b/sys/platform/pc32/apic/apic_ipl.s
@@ -54,7 +54,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/isa/apic_ipl.s,v 1.27.2.2 2000/09/30 02:49:35 ps Exp $
- * $DragonFly: src/sys/platform/pc32/apic/apic_ipl.s,v 1.12 2005/11/02 17:47:29 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/apic/apic_ipl.s,v 1.13 2005/11/02 18:41:59 dillon Exp $
  */
 
 #include "use_npx.h"
@@ -94,7 +94,7 @@ apic_imen:
 	 * Functions to enable and disable a hardware interrupt.  The
 	 * IRQ number is passed as an argument.
 	 */
-ENTRY(INTRDIS)
+ENTRY(APIC_INTRDIS)
 	IMASK_LOCK			/* enter critical reg */
 	movl	4(%esp),%eax
 1:
@@ -110,7 +110,7 @@ ENTRY(INTRDIS)
 	IMASK_UNLOCK			/* exit critical reg */
 	ret
 
-ENTRY(INTREN)
+ENTRY(APIC_INTREN)
 	IMASK_LOCK			/* enter critical reg */
 	movl	4(%esp), %eax		/* mask into %eax */
 1:
diff --git a/sys/platform/pc32/i386/autoconf.c b/sys/platform/pc32/i386/autoconf.c
index bb9cb254d6..8802801c19 100644
--- a/sys/platform/pc32/i386/autoconf.c
+++ b/sys/platform/pc32/i386/autoconf.c
@@ -35,7 +35,7 @@
  *
  *	from: @(#)autoconf.c	7.1 (Berkeley) 5/9/91
  * $FreeBSD: src/sys/i386/i386/autoconf.c,v 1.146.2.2 2001/06/07 06:05:58 dd Exp $
- * $DragonFly: src/sys/platform/pc32/i386/autoconf.c,v 1.21 2005/11/02 17:47:30 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/i386/autoconf.c,v 1.22 2005/11/02 18:42:01 dillon Exp $
  */
 
 /*
@@ -70,6 +70,7 @@
 #include <sys/cons.h>
 #include <sys/thread.h>
 #include <sys/device.h>
+#include <sys/machintr.h>
 
 #include <machine/bootinfo.h>
 #include <machine/ipl.h>
@@ -127,30 +128,11 @@ static void
 configure(dummy)
 	void *dummy;
 {
-
-	/*
-	 * Activate the ICU's.  Note that we are explicitly at splhigh()
-	 * at present as we have no way to disable stray PCI level triggered
-	 * interrupts until the devices have had a driver attached.  This
-	 * is particularly a problem when the interrupts are shared.  For
-	 * example, if IRQ 10 is shared between a disk and network device
-	 * and the disk device generates an interrupt, if we "activate"
-	 * IRQ 10 when the network driver is set up, then we will get
-	 * recursive interrupt 10's as nothing will know how to turn off
-	 * the disk device's interrupt.
-	 *
-	 * Having the ICU's active means we can probe interrupt routing to
-	 * see if a device causes the corresponding pending bit to be set.
-	 *
-	 * This is all rather inconvenient.
+        /*
+	 * Final interrupt support acviation, then enable hardware interrupts.
 	 */
-#ifdef APIC_IO
-	bsp_apic_configure();
+	MachIntrABI.finalize();
 	cpu_enable_intr();
-#else
-	cpu_enable_intr();
-	INTREN(ICU_IRQ_SLAVE);
-#endif /* APIC_IO */
 
 	/*
 	 * This will configure all devices, generally starting with the
diff --git a/sys/platform/pc32/i386/mp_machdep.c b/sys/platform/pc32/i386/mp_machdep.c
index 39aa48da0b..d21e5b4ec6 100644
--- a/sys/platform/pc32/i386/mp_machdep.c
+++ b/sys/platform/pc32/i386/mp_machdep.c
@@ -23,7 +23,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/i386/mp_machdep.c,v 1.115.2.15 2003/03/14 21:22:35 jhb Exp $
- * $DragonFly: src/sys/platform/pc32/i386/mp_machdep.c,v 1.41 2005/11/02 08:33:25 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/i386/mp_machdep.c,v 1.42 2005/11/02 18:42:01 dillon Exp $
  */
 
 #include "opt_cpu.h"
@@ -35,6 +35,7 @@
 #include <sys/malloc.h>
 #include <sys/memrange.h>
 #include <sys/cons.h>	/* cngetc() */
+#include <sys/machintr.h>
 
 #include <vm/vm.h>
 #include <vm/vm_param.h>
@@ -280,7 +281,6 @@ static u_int	boot_address;
 static u_int	base_memory;
 static int	mp_finish;
 
-static int	picmode;		/* 0: virtual wire mode, 1: PIC mode */
 static mpfps_t	mpfps;
 static int	search_for_sig(u_int32_t target, int count);
 static void	mp_enable(u_int boot_addr);
@@ -481,44 +481,6 @@ init_secondary(void)
 	enable_sse();
 }
 
-
-#if defined(APIC_IO)
-/*
- * Final configuration of the BSP's local APIC:
- *  - disable 'pic mode'.
- *  - disable 'virtual wire mode'.
- *  - enable NMI.
- */
-void
-bsp_apic_configure(void)
-{
-	u_char		byte;
-	u_int32_t	temp;
-
-	/* leave 'pic mode' if necessary */
-	if (picmode) {
-		outb(0x22, 0x70);	/* select IMCR */
-		byte = inb(0x23);	/* current contents */
-		byte |= 0x01;		/* mask external INTR */
-		outb(0x23, byte);	/* disconnect 8259s/NMI */
-	}
-
-	/* mask lint0 (the 8259 'virtual wire' connection) */
-	temp = lapic.lvt_lint0;
-	temp |= APIC_LVT_M;		/* set the mask */
-	lapic.lvt_lint0 = temp;
-
-        /* setup lint1 to handle NMI */
-        temp = lapic.lvt_lint1;
-        temp &= ~APIC_LVT_M;		/* clear the mask */
-        lapic.lvt_lint1 = temp;
-
-	if (bootverbose)
-		apic_dump("bsp_apic_configure()");
-}
-#endif  /* APIC_IO */
-
-
 /*******************************************************************
  * local functions and data
  */
@@ -842,6 +804,7 @@ mptable_pass2(void)
 	int     count;
 	int     type;
 	int     apic, bus, cpu, intr;
+	int	picmode;
 	int	i, j;
 	int	pgeflag;
 
@@ -909,6 +872,7 @@ mptable_pass2(void)
 
 	/* record whether PIC or virtual-wire mode */
 	picmode = (mpfps->mpfb2 & 0x80) ? 1 : 0;
+	machintr_setvar_simple(MACHINTR_VAR_PICMODE, picmode);
 
 	/* check for use of 'default' configuration */
 	if (MPFPS_MPFB1 != 0)
diff --git a/sys/platform/pc32/icu/icu.h b/sys/platform/pc32/icu/icu.h
index 395afa7024..effacc9b8b 100644
--- a/sys/platform/pc32/icu/icu.h
+++ b/sys/platform/pc32/icu/icu.h
@@ -35,7 +35,7 @@
  *
  *	from: @(#)icu.h	5.6 (Berkeley) 5/9/91
  * $FreeBSD: src/sys/i386/isa/icu.h,v 1.18 1999/12/26 12:43:47 bde Exp $
- * $DragonFly: src/sys/platform/pc32/icu/icu.h,v 1.7 2005/11/02 17:47:31 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/icu/icu.h,v 1.8 2005/11/02 18:42:03 dillon Exp $
  */
 
 /*
@@ -46,13 +46,6 @@
 #ifndef _I386_ISA_ICU_H_
 #define	_I386_ISA_ICU_H_
 
-#ifndef LOCORE
-
-void   INTREN(int);
-void   INTRDIS(int);
-
-#endif
-
 /*
  * Note: The APIC uses different values for IRQxxx.
  *	 Unfortunately many drivers use the 8259 values as indexes
diff --git a/sys/platform/pc32/icu/icu_abi.c b/sys/platform/pc32/icu/icu_abi.c
index 3705b9c23b..e5fb8c612b 100644
--- a/sys/platform/pc32/icu/icu_abi.c
+++ b/sys/platform/pc32/icu/icu_abi.c
@@ -31,6 +31,51 @@
  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  * 
- * $DragonFly: src/sys/platform/pc32/icu/icu_abi.c,v 1.1 2005/11/02 17:20:00 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/icu/icu_abi.c,v 1.2 2005/11/02 18:42:03 dillon Exp $
  */
 
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/machintr.h>
+#include "icu.h"
+
+#ifndef APIC_IO
+
+extern void ICU_INTREN(int);
+extern void ICU_INTRDIS(int);
+
+static int icu_setvar(int, const void *);
+static int icu_getvar(int, void *);
+static void icu_finalize(void);
+
+struct machintr_abi MachIntrABI = {
+    MACHINTR_ICU,
+    ICU_INTRDIS,
+    ICU_INTREN,
+    icu_setvar,
+    icu_getvar,
+    icu_finalize
+};
+
+static 
+int
+icu_setvar(int varid __unused, const void *buf __unused)
+{
+    return (ENOENT);
+}
+
+static
+int
+icu_getvar(int varid __unused, void *buf __unused)
+{
+    return (ENOENT);
+}
+
+static void
+icu_finalize(void)
+{
+    machintr_intren(ICU_IRQ_SLAVE);
+}
+
+#endif
diff --git a/sys/platform/pc32/icu/icu_ipl.s b/sys/platform/pc32/icu/icu_ipl.s
index 3ad327a5a4..98aed5b528 100644
--- a/sys/platform/pc32/icu/icu_ipl.s
+++ b/sys/platform/pc32/icu/icu_ipl.s
@@ -67,7 +67,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/isa/icu_ipl.s,v 1.6 1999/08/28 00:44:42 peter Exp $
- * $DragonFly: src/sys/platform/pc32/icu/icu_ipl.s,v 1.11 2005/11/02 17:47:31 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/icu/icu_ipl.s,v 1.12 2005/11/02 18:42:03 dillon Exp $
  */
 
 #include "use_npx.h"
@@ -108,7 +108,7 @@ icu_imen:
 	 * INTREN(irq)
 	 * INTDIS(irq)
 	 */
-ENTRY(INTRDIS)
+ENTRY(ICU_INTRDIS)
 	movl	4(%esp),%eax
 	btsl	%eax,icu_imen
 	pushfl
@@ -120,7 +120,7 @@ ENTRY(INTRDIS)
 	popfl
 	ret
 
-ENTRY(INTREN)
+ENTRY(ICU_INTREN)
 	movl	4(%esp),%eax
 	btrl	%eax,icu_imen
 	pushfl
diff --git a/sys/platform/pc32/include/smp.h b/sys/platform/pc32/include/smp.h
index 5571c8ebb1..ab072d6aba 100644
--- a/sys/platform/pc32/include/smp.h
+++ b/sys/platform/pc32/include/smp.h
@@ -7,7 +7,7 @@
  * ----------------------------------------------------------------------------
  *
  * $FreeBSD: src/sys/i386/include/smp.h,v 1.50.2.5 2001/02/13 22:32:45 tegge Exp $
- * $DragonFly: src/sys/platform/pc32/include/smp.h,v 1.14 2005/11/02 08:33:27 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/include/smp.h,v 1.15 2005/11/02 18:42:06 dillon Exp $
  *
  */
 
@@ -64,7 +64,6 @@ extern int			bsp_apic_ready;
 extern int			mp_naps;
 extern int			mp_nbusses;
 extern int			mp_napics;
-extern int			mp_picmode;
 extern int			boot_cpu_id;
 extern vm_offset_t		cpu_apic_address;
 extern vm_offset_t		io_apic_address[];
@@ -103,7 +102,6 @@ int	apic_trigger		(int, int);
 int	apic_polarity		(int, int);
 void	assign_apic_irq		(int apic, int intpin, int irq);
 void	revoke_apic_irq		(int irq);
-void	bsp_apic_configure	(void);
 void	init_secondary		(void);
 int	stop_cpus		(u_int);
 void	ap_init			(void);
diff --git a/sys/platform/pc32/isa/clock.c b/sys/platform/pc32/isa/clock.c
index ec5bd4f904..f41b90e254 100644
--- a/sys/platform/pc32/isa/clock.c
+++ b/sys/platform/pc32/isa/clock.c
@@ -35,7 +35,7 @@
  *
  *	from: @(#)clock.c	7.2 (Berkeley) 5/12/91
  * $FreeBSD: src/sys/i386/isa/clock.c,v 1.149.2.6 2002/11/02 04:41:50 iwasaki Exp $
- * $DragonFly: src/sys/platform/pc32/isa/clock.c,v 1.38 2005/11/02 17:47:33 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/isa/clock.c,v 1.39 2005/11/02 18:42:08 dillon Exp $
  */
 
 /*
@@ -67,6 +67,7 @@
 #include <sys/globaldata.h>
 #include <sys/thread2.h>
 #include <sys/systimer.h>
+#include <sys/machintr.h>
 
 #include <machine/clock.h>
 #ifdef CLK_CALIBRATION_LOOP
@@ -994,13 +995,13 @@ cpu_initclocks()
 
 	clkdesc = inthand_add("clk", apic_8254_intr, clkintr,
 			      NULL, INTR_EXCL | INTR_FAST | INTR_NOPOLL, NULL);
-	INTREN(apic_8254_intr);
+	machintr_intren(apic_8254_intr);
 	
 #else /* APIC_IO */
 
 	inthand_add("clk", 0, clkintr, NULL,
 		    INTR_EXCL | INTR_FAST | INTR_NOPOLL, NULL);
-	INTREN(ICU_IRQ0);
+	machintr_intren(ICU_IRQ0);
 
 #endif /* APIC_IO */
 
@@ -1020,12 +1021,7 @@ cpu_initclocks()
 
 		inthand_add("rtc", 8, (inthand2_t *)rtcintr, NULL,
 			    INTR_EXCL | INTR_FAST | INTR_NOPOLL, NULL);
-
-#ifdef APIC_IO
-		INTREN(APIC_IRQ8);
-#else
-		INTREN(ICU_IRQ8);
-#endif /* APIC_IO */
+		machintr_intren(8);
 
 		writertc(RTC_STATUSB, rtc_statusb);
 	}
@@ -1054,7 +1050,7 @@ cpu_initclocks()
 			 * on the IO APIC.
 			 * Workaround: Limited variant of mixed mode.
 			 */
-			INTRDIS(apic_8254_intr);
+			machintr_intrdis(apic_8254_intr);
 			inthand_remove(clkdesc);
 			printf("APIC_IO: Broken MP table detected: "
 			       "8254 is not connected to "
@@ -1078,7 +1074,7 @@ cpu_initclocks()
 				    clkintr,
 				    NULL,
 				    INTR_EXCL | INTR_FAST | INTR_NOPOLL, NULL);
-			INTREN(apic_8254_intr);
+			machintr_intren(apic_8254_intr);
 		}
 		
 	}
diff --git a/sys/platform/pc32/isa/intr_machdep.c b/sys/platform/pc32/isa/intr_machdep.c
index 37d22b2ce1..2fffef9946 100644
--- a/sys/platform/pc32/isa/intr_machdep.c
+++ b/sys/platform/pc32/isa/intr_machdep.c
@@ -35,7 +35,7 @@
  *
  *	from: @(#)isa.c	7.2 (Berkeley) 5/13/91
  * $FreeBSD: src/sys/i386/isa/intr_machdep.c,v 1.29.2.5 2001/10/14 06:54:27 luigi Exp $
- * $DragonFly: src/sys/platform/pc32/isa/intr_machdep.c,v 1.36 2005/11/02 17:47:33 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/isa/intr_machdep.c,v 1.37 2005/11/02 18:42:08 dillon Exp $
  */
 /*
  * This file contains an aggregated module marked:
@@ -63,6 +63,7 @@
 #include <machine/globaldata.h>
 #include <sys/proc.h>
 #include <sys/thread2.h>
+#include <sys/machintr.h>
 
 #include <machine/smptests.h>			/** FAST_HI */
 #include <machine/smp.h>
@@ -225,7 +226,7 @@ icu_reinit()
 	init_i8259();
 	for (i = 0; i < ICU_LEN; ++i) {
 		if (count_registered_ints(i))
-			INTREN(i);
+			machintr_intren(i);
 	}
 }
 
@@ -354,7 +355,7 @@ icu_setup(int intr, int flags)
 	       flags & INTR_FAST ? fastintr[intr] : slowintr[intr],
 	       SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
 #endif /* FAST_HI && APIC_IO */
-	INTREN(intr);
+	machintr_intren(intr);
 	write_eflags(ef);
 	return (0);
 }
@@ -365,7 +366,7 @@ icu_unset(int intr)
 	u_long	ef;
 
 	KKASSERT((u_int)intr < ICU_LEN);
-	INTRDIS(intr);
+	machintr_intrdis(intr);
 	ef = read_eflags();
 	cpu_disable_intr();	/* YYY */
 #ifdef FAST_HI_XXX
@@ -501,45 +502,6 @@ inthand_remove(void *id)
 	return (0);
 }
 
-/*
- * ithread_done()
- *
- *	This function is called by an interrupt thread when it has completed
- *	processing a loop.  We re-enable interrupts and interlock with
- *	ipending.
- *
- *	See kern/kern_intr.c for more information.
- */
-void
-ithread_unmask(int irq)
-{
-    INTREN(irq);
-}
-
-#if 0
-
-void
-ithread_done(int irq)
-{
-    struct mdglobaldata *gd = mdcpu;
-    thread_t td;
-
-    td = gd->mi.gd_curthread;
-
-    KKASSERT(td->td_pri >= TDPRI_CRIT);
-    lwkt_deschedule_self(td);
-    INTREN(irq);
-    if (gd->gd_ipending & (1 << irq)) {
-	atomic_clear_int_nonlocked(&gd->gd_ipending, (1 << irq));
-	INTRDIS(irq);
-	lwkt_schedule_self(td);
-    } else {
-	lwkt_switch();
-    }
-}
-
-#endif
-
 #ifdef SMP
 /*
  * forward_fast_remote()
diff --git a/sys/sys/interrupt.h b/sys/sys/interrupt.h
index b2e54d4a1f..d5697f1b95 100644
--- a/sys/sys/interrupt.h
+++ b/sys/sys/interrupt.h
@@ -24,7 +24,7 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/sys/interrupt.h,v 1.9.2.1 2001/10/14 20:05:50 luigi Exp $
- * $DragonFly: src/sys/sys/interrupt.h,v 1.12 2005/10/26 00:55:20 dillon Exp $
+ * $DragonFly: src/sys/sys/interrupt.h,v 1.13 2005/11/02 18:42:11 dillon Exp $
  */
 
 #ifndef _SYS_INTERRUPT_H_
@@ -56,7 +56,6 @@ void swi_setpriority(int intr, int pri);
 int unregister_swi(void *id);
 int unregister_int(void *id);
 void unregister_randintr(int intr);
-void ithread_unmask(int intr);	/* procedure defined in MD */
 void sched_ithd(int intr);	/* procedure called from MD */
 
 extern char	eintrnames[];	/* end of intrnames[] */
diff --git a/sys/platform/pc32/apic/apic_abi.c b/sys/sys/machintr.h
similarity index 65%
copy from sys/platform/pc32/apic/apic_abi.c
copy to sys/sys/machintr.h
index 838165d1e6..662f5febdb 100644
--- a/sys/platform/pc32/apic/apic_abi.c
+++ b/sys/sys/machintr.h
@@ -31,6 +31,37 @@
  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  * 
- * $DragonFly: src/sys/platform/pc32/apic/apic_abi.c,v 1.1 2005/11/02 17:19:59 dillon Exp $
+ * $DragonFly: src/sys/sys/machintr.h,v 1.1 2005/11/02 18:42:11 dillon Exp $
  */
 
+#ifndef _SYS_QUEUE_H_
+#include <sys/queue.h>
+#endif
+
+enum machintr_type { MACHINTR_ICU, MACHINTR_APIC };
+
+#define MACHINTR_VAR_SIZEMASK	0xFFFF
+
+#define MACHINTR_VAR_PICMODE	(0x00010000|sizeof(int))
+
+/*
+ * Machine interrupt ABIs - registered at boot-time
+ */
+struct machintr_abi {
+    enum machintr_type type;
+    void	(*intrdis)(int);		/* hardware disable irq */
+    void	(*intren)(int);			/* hardware enable irq */
+    int		(*setvar)(int, const void *);	/* set miscellanious info */
+    int		(*getvar)(int, void *);		/* get miscellanious info */
+    void	(*finalize)(void);		/* final before ints enabled */
+};
+
+#define machintr_intren(irq)	MachIntrABI.intren(irq)
+#define machintr_intrdis(irq)	MachIntrABI.intrdis(irq)
+
+#ifdef _KERNEL
+
+extern struct machintr_abi MachIntrABI;
+extern int machintr_setvar_simple(int, int);
+
+#endif
-- 
2.41.0