From 38787eefffeaf458d09931320eab5597b7f4e64a Mon Sep 17 00:00:00 2001
From: Matthew Dillon <dillon@dragonflybsd.org>
Date: Thu, 16 Jun 2005 21:12:49 +0000
Subject: [PATCH] Remove all remaining SPL code.  Replace the mtd_cpl field in
 the machine dependant thread structure and the CPL field in the interrupt
 stack frame with dummies (so structural sizes do not change, yet).  Remove
 all interrupt handler SPL mask and mask pointer code.  Remove all spl*()
 functions except for splz().

Note that doreti uses a temporary CPL mask internally to accumulate a bitmap
of FAST interrupts which could not be executed due to not being able to get
the BGL.  This mask has no outside visibility.

Note that gd_fpending and gd_ipending still exist to support critical section
interrupt deferment.
---
 sys/amd64/amd64/genassym.c           |   4 +-
 sys/bus/cam/cam_xpt.c                |   6 +-
 sys/bus/pci/pci_compat.c             |  17 +---
 sys/bus/pci/pcivar.h                 |   7 +-
 sys/contrib/dev/oltr/if_oltr.c       |   4 +-
 sys/dev/atm/hea/eni.c                |   4 +-
 sys/dev/atm/hfa/fore_load.c          |   4 +-
 sys/dev/disk/sym/sym_hipd.c          |   4 +-
 sys/dev/netif/en_pci/if_en_pci.c     |   4 +-
 sys/dev/netif/fpa/if_fpa.c           |   4 +-
 sys/dev/raid/asr/asr.c               |   3 +-
 sys/dev/serial/cy/cy.c               |   4 +-
 sys/dev/serial/cy/cy_pci.c           |   6 +-
 sys/dev/serial/rc/rc.c               |   4 +-
 sys/dev/serial/sio/sio.c             |   4 +-
 sys/dev/serial/stl/stallion.c        |   4 +-
 sys/dev/video/meteor/meteor.c        |   4 +-
 sys/i386/apic/apic_vector.s          |  49 ++-------
 sys/i386/i386/autoconf.c             |   8 +-
 sys/i386/i386/exception.s            |  11 +-
 sys/i386/i386/genassym.c             |   3 +-
 sys/i386/i386/machdep.c              |   3 +-
 sys/i386/i386/nexus.c                |  34 +------
 sys/i386/i386/trap.c                 |  13 +--
 sys/i386/i386/vm86bios.s             |   4 +-
 sys/i386/i386/vm_machdep.c           |   4 +-
 sys/i386/icu/icu_vector.s            |  16 +--
 sys/i386/include/ipl.h               |  43 +-------
 sys/i386/include/thread.h            |   5 +-
 sys/i386/isa/apic_vector.s           |  49 ++-------
 sys/i386/isa/clock.c                 |  13 +--
 sys/i386/isa/icu_vector.s            |  16 +--
 sys/i386/isa/intr_machdep.c          | 146 ++++-----------------------
 sys/i386/isa/intr_machdep.h          |  10 +-
 sys/i386/isa/ipl.s                   |  62 +++++-------
 sys/i386/isa/ipl_funcs.c             | 111 +-------------------
 sys/i386/isa/npx.c                   |   4 +-
 sys/kern/kern_intr.c                 |  18 +---
 sys/kern/subr_taskqueue.c            |   4 +-
 sys/netgraph/tty/ng_tty.c            |  16 +--
 sys/opencrypto/crypto.c              |   4 +-
 sys/platform/pc32/apic/apic_vector.s |  49 ++-------
 sys/platform/pc32/i386/autoconf.c    |   8 +-
 sys/platform/pc32/i386/exception.s   |  11 +-
 sys/platform/pc32/i386/genassym.c    |   3 +-
 sys/platform/pc32/i386/machdep.c     |   3 +-
 sys/platform/pc32/i386/nexus.c       |  34 +------
 sys/platform/pc32/i386/trap.c        |  13 +--
 sys/platform/pc32/i386/vm86bios.s    |   4 +-
 sys/platform/pc32/i386/vm_machdep.c  |   4 +-
 sys/platform/pc32/icu/icu_vector.s   |  16 +--
 sys/platform/pc32/include/ipl.h      |  43 +-------
 sys/platform/pc32/include/thread.h   |   5 +-
 sys/platform/pc32/isa/apic_vector.s  |  49 ++-------
 sys/platform/pc32/isa/clock.c        |  13 +--
 sys/platform/pc32/isa/icu_vector.s   |  16 +--
 sys/platform/pc32/isa/intr_machdep.c | 146 ++++-----------------------
 sys/platform/pc32/isa/intr_machdep.h |  10 +-
 sys/platform/pc32/isa/ipl.s          |  62 +++++-------
 sys/platform/pc32/isa/ipl_funcs.c    | 111 +-------------------
 sys/platform/pc32/isa/npx.c          |   4 +-
 sys/platform/vkernel/i386/genassym.c |   3 +-
 sys/sys/interrupt.h                  |   6 +-
 sys/sys/systm.h                      |  59 +----------
 64 files changed, 231 insertions(+), 1174 deletions(-)

diff --git a/sys/amd64/amd64/genassym.c b/sys/amd64/amd64/genassym.c
index 061ed9851a..55afa75229 100644
--- a/sys/amd64/amd64/genassym.c
+++ b/sys/amd64/amd64/genassym.c
@@ -35,7 +35,7 @@
  *
  *	from: @(#)genassym.c	5.11 (Berkeley) 5/10/91
  * $FreeBSD: src/sys/i386/i386/genassym.c,v 1.86.2.3 2002/03/03 05:42:49 nyan Exp $
- * $DragonFly: src/sys/amd64/amd64/Attic/genassym.c,v 1.4 2004/03/30 19:14:15 dillon Exp $
+ * $DragonFly: src/sys/amd64/amd64/Attic/genassym.c,v 1.5 2005/06/16 21:12:22 dillon Exp $
  */
 
 #include <sys/param.h>
@@ -95,8 +95,6 @@ ASSYM(MP_FREE_LOCK, MP_FREE_LOCK);
 
 ASSYM(RW_OWNER, offsetof(struct lwkt_rwlock, rw_owner));
 
-ASSYM(TD_CPL, offsetof(struct thread, td_mach) + offsetof(struct md_thread, mtd_cpl));
-
 ASSYM(TDPRI_CRIT, TDPRI_CRIT);
 ASSYM(TDPRI_INT_SUPPORT, TDPRI_INT_SUPPORT);
 
diff --git a/sys/bus/cam/cam_xpt.c b/sys/bus/cam/cam_xpt.c
index b6b9493f3e..21fcb2c626 100644
--- a/sys/bus/cam/cam_xpt.c
+++ b/sys/bus/cam/cam_xpt.c
@@ -27,7 +27,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/cam/cam_xpt.c,v 1.80.2.18 2002/12/09 17:31:55 gibbs Exp $
- * $DragonFly: src/sys/bus/cam/cam_xpt.c,v 1.24 2005/06/02 20:40:29 dillon Exp $
+ * $DragonFly: src/sys/bus/cam/cam_xpt.c,v 1.25 2005/06/16 21:12:23 dillon Exp $
  */
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -1368,8 +1368,8 @@ xpt_init(dummy)
 	}
 
 	/* Install our software interrupt handlers */
-	register_swi(SWI_CAMNET, swi_camnet, NULL, "swi_camnet", NULL);
-	register_swi(SWI_CAMBIO, swi_cambio, NULL, "swi_cambio", NULL);
+	register_swi(SWI_CAMNET, swi_camnet, NULL, "swi_camnet");
+	register_swi(SWI_CAMBIO, swi_cambio, NULL, "swi_cambio");
 }
 
 static cam_status
diff --git a/sys/bus/pci/pci_compat.c b/sys/bus/pci/pci_compat.c
index 3bedac2208..66c1e16fc1 100644
--- a/sys/bus/pci/pci_compat.c
+++ b/sys/bus/pci/pci_compat.c
@@ -24,7 +24,7 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/pci/pci_compat.c,v 1.35.2.1 2001/10/14 21:14:14 luigi Exp $
- * $DragonFly: src/sys/bus/pci/pci_compat.c,v 1.8 2005/05/24 20:58:52 dillon Exp $
+ * $DragonFly: src/sys/bus/pci/pci_compat.c,v 1.9 2005/06/16 21:12:25 dillon Exp $
  *
  */
 
@@ -107,14 +107,13 @@ pci_map_mem(pcici_t cfg, u_long reg, vm_offset_t* va, vm_offset_t* pa)
 }
 
 int
-pci_map_int(pcici_t cfg, pci_inthand_t *handler, void *arg, intrmask_t *maskptr)
+pci_map_int(pcici_t cfg, pci_inthand_t *handler, void *arg)
 {
-	return (pci_map_int_right(cfg, handler, arg, maskptr, 0));
+	return (pci_map_int_right(cfg, handler, arg, 0));
 }
 
 int
-pci_map_int_right(pcici_t cfg, pci_inthand_t *handler, void *arg,
-		  intrmask_t *maskptr, u_int intflags)
+pci_map_int_right(pcici_t cfg, pci_inthand_t *handler, void *arg, u_int intflags)
 {
 	int error;
 #ifdef APIC_IO
@@ -143,14 +142,6 @@ pci_map_int_right(pcici_t cfg, pci_inthand_t *handler, void *arg,
 		/*
 		 * This is ugly. Translate the mask into an interrupt type.
 		 */
-		if (maskptr == &tty_imask)
-			flags |= INTR_TYPE_TTY;
-		else if (maskptr == &bio_imask)
-			flags |= INTR_TYPE_BIO;
-		else if (maskptr == &net_imask)
-			flags |= INTR_TYPE_NET;
-		else if (maskptr == &cam_imask)
-			flags |= INTR_TYPE_CAM;
 
 		error = BUS_SETUP_INTR(device_get_parent(cfg->dev), cfg->dev,
 				       res, flags, handler, arg, &ih, NULL);
diff --git a/sys/bus/pci/pcivar.h b/sys/bus/pci/pcivar.h
index d5c224c8c1..00db93d4e6 100644
--- a/sys/bus/pci/pcivar.h
+++ b/sys/bus/pci/pcivar.h
@@ -24,7 +24,7 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/pci/pcivar.h,v 1.48 2000/09/28 00:37:32 peter Exp $
- * $DragonFly: src/sys/bus/pci/pcivar.h,v 1.8 2005/04/30 23:04:21 swildner Exp $
+ * $DragonFly: src/sys/bus/pci/pcivar.h,v 1.9 2005/06/16 21:12:25 dillon Exp $
  *
  */
 
@@ -376,10 +376,9 @@ u_long pci_conf_read (pcici_t tag, u_long reg);
 void pci_conf_write (pcici_t tag, u_long reg, u_long data);
 int pci_map_port (pcici_t tag, u_long reg, pci_port_t* pa);
 int pci_map_mem (pcici_t tag, u_long reg, vm_offset_t* va, vm_offset_t* pa);
-int pci_map_int (pcici_t tag, pci_inthand_t *handler, void *arg,
-		 intrmask_t *maskptr);
+int pci_map_int (pcici_t tag, pci_inthand_t *handler, void *arg);
 int pci_map_int_right(pcici_t cfg, pci_inthand_t *handler, void *arg,
-		      intrmask_t *maskptr, u_int flags);
+		      u_int flags);
 int pci_unmap_int (pcici_t tag);
 
 pcici_t pci_get_parent_from_tag(pcici_t tag);
diff --git a/sys/contrib/dev/oltr/if_oltr.c b/sys/contrib/dev/oltr/if_oltr.c
index b8e0ee59ea..0cbd882e9f 100644
--- a/sys/contrib/dev/oltr/if_oltr.c
+++ b/sys/contrib/dev/oltr/if_oltr.c
@@ -31,7 +31,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/contrib/dev/oltr/if_oltr.c,v 1.11.2.5 2001/10/20 04:15:21 mdodd Exp $
- * $DragonFly: src/sys/contrib/dev/oltr/Attic/if_oltr.c,v 1.19 2005/06/09 20:47:37 swildner Exp $
+ * $DragonFly: src/sys/contrib/dev/oltr/Attic/if_oltr.c,v 1.20 2005/06/16 21:12:26 dillon Exp $
  */
 
 #include <sys/param.h>
@@ -608,7 +608,7 @@ oltr_pci_attach(pcici_t config_id, int unit)
 	/*
 	 * Allocate interrupt and DMA channel
 	 */
-	if (!pci_map_int(config_id, oltr_intr, sc, &net_imask)) {
+	if (!pci_map_int(config_id, oltr_intr, sc)) {
 		printf("oltr%d: couldn't setup interrupt\n", unit);
 		goto config_failed;
 	}
diff --git a/sys/dev/atm/hea/eni.c b/sys/dev/atm/hea/eni.c
index 640ecc2037..583f9dc324 100644
--- a/sys/dev/atm/hea/eni.c
+++ b/sys/dev/atm/hea/eni.c
@@ -24,7 +24,7 @@
  * notice must be reproduced on all copies.
  *
  *	@(#) $FreeBSD: src/sys/dev/hea/eni.c,v 1.10 1999/08/28 00:41:42 peter Exp $
- *	@(#) $DragonFly: src/sys/dev/atm/hea/eni.c,v 1.7 2005/02/01 00:51:49 joerg Exp $
+ *	@(#) $DragonFly: src/sys/dev/atm/hea/eni.c,v 1.8 2005/06/16 21:12:27 dillon Exp $
  */
 
 /*
@@ -460,7 +460,7 @@ eni_pci_attach ( pcici_t config_id, int unit )
 	/*
 	 * Map interrupt in
 	 */
-	if ( !pci_map_int ( config_id, eni_intr, (void *)eup, &net_imask ) )
+	if ( !pci_map_int ( config_id, eni_intr, (void *)eup) )
 	{
 		log(LOG_ERR, "%s%d: unable to map interrupt\n", 
 			ENI_DEV_NAME, unit);
diff --git a/sys/dev/atm/hfa/fore_load.c b/sys/dev/atm/hfa/fore_load.c
index 3331cacce8..ff7e8befff 100644
--- a/sys/dev/atm/hfa/fore_load.c
+++ b/sys/dev/atm/hfa/fore_load.c
@@ -24,7 +24,7 @@
  * notice must be reproduced on all copies.
  *
  *	@(#) $FreeBSD: src/sys/dev/hfa/fore_load.c,v 1.13 1999/09/25 18:23:49 phk Exp $
- *	@(#) $DragonFly: src/sys/dev/atm/hfa/fore_load.c,v 1.11 2005/06/02 21:36:09 dillon Exp $
+ *	@(#) $DragonFly: src/sys/dev/atm/hfa/fore_load.c,v 1.12 2005/06/16 21:12:29 dillon Exp $
  */
 
 /*
@@ -270,7 +270,7 @@ fore_pci_attach(config_id, unit)
 	/*
 	 * Map interrupt in
 	 */
-	if ( !pci_map_int( config_id, fore_intr, fup, &net_imask ) ) {
+	if ( !pci_map_int( config_id, fore_intr, fup) ) {
 		log(LOG_ERR, "%s%d: unable to map interrupt\n", 
 			FORE_DEV_NAME, unit);
 		goto failed;
diff --git a/sys/dev/disk/sym/sym_hipd.c b/sys/dev/disk/sym/sym_hipd.c
index 8ab1bf3d93..b479189e43 100644
--- a/sys/dev/disk/sym/sym_hipd.c
+++ b/sys/dev/disk/sym/sym_hipd.c
@@ -56,7 +56,7 @@
  */
 
 /* $FreeBSD: src/sys/dev/sym/sym_hipd.c,v 1.6.2.12 2001/12/02 19:01:10 groudier Exp $ */
-/* $DragonFly: src/sys/dev/disk/sym/sym_hipd.c,v 1.14 2005/06/06 21:48:16 eirikn Exp $ */
+/* $DragonFly: src/sys/dev/disk/sym/sym_hipd.c,v 1.15 2005/06/16 21:12:30 dillon Exp $ */
 
 #define SYM_DRIVER_NAME	"sym-1.6.5-20000902"
 
@@ -9614,7 +9614,7 @@ int sym_cam_attach(hcb_p np)
 	}
 #else
 	err = 0;
-	if (!pci_map_int (np->pci_tag, sym_intr, np, &cam_imask)) {
+	if (!pci_map_int (np->pci_tag, sym_intr, np)) {
 		printf("%s: failed to map interrupt\n", sym_name(np));
 		goto fail;
 	}
diff --git a/sys/dev/netif/en_pci/if_en_pci.c b/sys/dev/netif/en_pci/if_en_pci.c
index f699bb704b..ac4b9ef563 100644
--- a/sys/dev/netif/en_pci/if_en_pci.c
+++ b/sys/dev/netif/en_pci/if_en_pci.c
@@ -32,7 +32,7 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/pci/if_en_pci.c,v 1.12 1999/08/21 22:10:49 msmith Exp $
- * $DragonFly: src/sys/dev/netif/en_pci/if_en_pci.c,v 1.9 2004/04/07 05:45:27 dillon Exp $
+ * $DragonFly: src/sys/dev/netif/en_pci/if_en_pci.c,v 1.10 2005/06/16 21:12:31 dillon Exp $
  */
 
 /*
@@ -269,7 +269,7 @@ int unit;
   EVENTHANDLER_REGISTER(shutdown_post_sync, en_pci_shutdown, scp,
 			SHUTDOWN_PRI_DEFAULT);
 
-  if (!pci_map_int(config_id, en_intr, (void *) sc, &net_imask)) {
+  if (!pci_map_int(config_id, en_intr, (void *) sc)) {
     printf("%s: couldn't establish interrupt\n", sc->sc_dev.dv_xname);
     return;
   }
diff --git a/sys/dev/netif/fpa/if_fpa.c b/sys/dev/netif/fpa/if_fpa.c
index a01db9ed90..c7c2cdfe5c 100644
--- a/sys/dev/netif/fpa/if_fpa.c
+++ b/sys/dev/netif/fpa/if_fpa.c
@@ -22,7 +22,7 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/dev/pdq/if_fpa.c,v 1.13 1999/08/28 00:50:50 peter Exp $
- * $DragonFly: src/sys/dev/netif/fpa/Attic/if_fpa.c,v 1.9 2005/02/21 18:40:36 joerg Exp $
+ * $DragonFly: src/sys/dev/netif/fpa/Attic/if_fpa.c,v 1.10 2005/06/16 21:12:34 dillon Exp $
  */
 
 /*
@@ -187,7 +187,7 @@ pdq_pci_attach(
     bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, sc->sc_ac.ac_enaddr, 6);
     pdqs_pci[unit] = sc;
     pdq_ifattach(sc, pdq_pci_ifwatchdog);
-    pci_map_int(config_id, pdq_pci_ifintr, (void*) sc, &net_imask);
+    pci_map_int(config_id, pdq_pci_ifintr, (void*) sc);
     EVENTHANDLER_REGISTER(shutdown_post_sync, pdq_pci_shutdown, sc,
 			  SHUTDOWN_PRI_DEFAULT);
 
diff --git a/sys/dev/raid/asr/asr.c b/sys/dev/raid/asr/asr.c
index 188adb5f9d..f4ef8b3b70 100644
--- a/sys/dev/raid/asr/asr.c
+++ b/sys/dev/raid/asr/asr.c
@@ -1,5 +1,5 @@
 /* $FreeBSD: src/sys/dev/asr/asr.c,v 1.3.2.2 2001/08/23 05:21:29 scottl Exp $ */
-/* $DragonFly: src/sys/dev/raid/asr/asr.c,v 1.20 2005/06/09 20:55:05 swildner Exp $ */
+/* $DragonFly: src/sys/dev/raid/asr/asr.c,v 1.21 2005/06/16 21:12:38 dillon Exp $ */
 /*
  * Copyright (c) 1996-2000 Distributed Processing Technology Corporation
  * Copyright (c) 2000-2001 Adaptec Corporation
@@ -81,7 +81,6 @@
  *              - Performance affected by TID caching reallocing.
  *              - Made suggested changes by Justin_Gibbs@adaptec.com
  *                      - use splcam instead of splbio.
- *                      - use cam_imask instead of bio_imask.
  *                      - use u_int8_t instead of u_char.
  *                      - use u_int16_t instead of u_short.
  *                      - use u_int32_t instead of u_long where appropriate.
diff --git a/sys/dev/serial/cy/cy.c b/sys/dev/serial/cy/cy.c
index 36fbe4b471..a64a8fd4a2 100644
--- a/sys/dev/serial/cy/cy.c
+++ b/sys/dev/serial/cy/cy.c
@@ -28,7 +28,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/isa/cy.c,v 1.97.2.2 2001/08/22 13:04:58 bde Exp $
- * $DragonFly: src/sys/dev/serial/cy/cy.c,v 1.16 2005/06/08 08:25:50 okumoto Exp $
+ * $DragonFly: src/sys/dev/serial/cy/cy.c,v 1.17 2005/06/16 21:12:39 dillon Exp $
  */
 
 #include "opt_compat.h"
@@ -620,7 +620,7 @@ cyattach_common(cy_iobase, cy_align)
 
 	if (!sio_registered) {
 		callout_init(&sio_timeout_handle);
-		register_swi(SWI_TTY, siopoll, NULL, "cy", NULL);
+		register_swi(SWI_TTY, siopoll, NULL, "cy");
 		sio_registered = TRUE;
 	}
 	minorbase = UNIT_TO_MINOR(unit);
diff --git a/sys/dev/serial/cy/cy_pci.c b/sys/dev/serial/cy/cy_pci.c
index 6068797a1c..a6fc36d9b5 100644
--- a/sys/dev/serial/cy/cy_pci.c
+++ b/sys/dev/serial/cy/cy_pci.c
@@ -25,7 +25,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/pci/cy_pci.c,v 1.17.2.1 2002/03/17 04:14:18 bde Exp $
- * $DragonFly: src/sys/dev/serial/cy/cy_pci.c,v 1.5 2004/02/21 17:35:35 dillon Exp $
+ * $DragonFly: src/sys/dev/serial/cy/cy_pci.c,v 1.6 2005/06/16 21:12:39 dillon Exp $
  */
 
 /*
@@ -119,11 +119,11 @@ cy_attach(config_id, unit)
 	if (
 #ifdef CY_PCI_FASTINTR
 	    !pci_map_int_right(config_id, (pci_inthand_t *)cyintr,
-			       (void *)adapter, &tty_imask,
+			       (void *)adapter,
 			       INTR_EXCL | INTR_FAST) &&
 #endif
 	    !pci_map_int_right(config_id, (pci_inthand_t *)cyintr,
-			       (void *)adapter, &tty_imask, 0)) {
+			       (void *)adapter, 0)) {
 		printf("cy%d: couldn't map interrupt\n", unit);
 		goto fail;
 	}
diff --git a/sys/dev/serial/rc/rc.c b/sys/dev/serial/rc/rc.c
index 710e258780..702f867d8f 100644
--- a/sys/dev/serial/rc/rc.c
+++ b/sys/dev/serial/rc/rc.c
@@ -25,7 +25,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/isa/rc.c,v 1.53.2.1 2001/02/26 04:23:10 jlemon Exp $
- * $DragonFly: src/sys/dev/serial/rc/rc.c,v 1.14 2005/06/08 08:25:50 okumoto Exp $
+ * $DragonFly: src/sys/dev/serial/rc/rc.c,v 1.15 2005/06/16 21:12:40 dillon Exp $
  *
  */
 
@@ -271,7 +271,7 @@ rcattach(dvp)
 	rcb->rcb_probed = RC_ATTACHED;
 	if (!rc_started) {
 		cdevsw_add(&rc_cdevsw, -1, rcb->rcb_unit);
-		register_swi(SWI_TTY, rcpoll, NULL, "rcpoll", NULL);
+		register_swi(SWI_TTY, rcpoll, NULL, "rcpoll");
 		callout_init(&rc_wakeup_ch);
 		rc_wakeup(NULL);
 		rc_started = 1;
diff --git a/sys/dev/serial/sio/sio.c b/sys/dev/serial/sio/sio.c
index 6492d58c65..07a1ed88fa 100644
--- a/sys/dev/serial/sio/sio.c
+++ b/sys/dev/serial/sio/sio.c
@@ -31,7 +31,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/isa/sio.c,v 1.291.2.35 2003/05/18 08:51:15 murray Exp $
- * $DragonFly: src/sys/dev/serial/sio/sio.c,v 1.27 2005/06/10 15:29:17 swildner Exp $
+ * $DragonFly: src/sys/dev/serial/sio/sio.c,v 1.28 2005/06/16 21:12:41 dillon Exp $
  *	from: @(#)com.c	7.5 (Berkeley) 5/16/91
  *	from: i386/isa sio.c,v 1.234
  */
@@ -1199,7 +1199,7 @@ determined_type: ;
 	printf("\n");
 
 	if (!sio_registered) {
-		register_swi(SWI_TTY, siopoll, NULL ,"swi_siopoll", NULL);
+		register_swi(SWI_TTY, siopoll, NULL ,"swi_siopoll");
 		sio_registered = TRUE;
 	}
 	minorbase = UNIT_TO_MINOR(unit);
diff --git a/sys/dev/serial/stl/stallion.c b/sys/dev/serial/stl/stallion.c
index 2465ed9117..0952a65f3c 100644
--- a/sys/dev/serial/stl/stallion.c
+++ b/sys/dev/serial/stl/stallion.c
@@ -34,7 +34,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/isa/stallion.c,v 1.39.2.2 2001/08/30 12:29:57 murray Exp $
- * $DragonFly: src/sys/dev/serial/stl/stallion.c,v 1.13 2005/06/08 08:25:50 okumoto Exp $
+ * $DragonFly: src/sys/dev/serial/stl/stallion.c,v 1.14 2005/06/16 21:12:42 dillon Exp $
  */
 
 /*****************************************************************************/
@@ -1087,7 +1087,7 @@ void stlpciattach(pcici_t tag, int unit)
         brdp->unitid = brdp->brdnr; /* PCI units auto-assigned */
         brdp->irq = ((int) pci_conf_read(tag, 0x3c)) & 0xff;
         brdp->irqtype = 0;
-        if (pci_map_int(tag, stlpciintr, (void *) NULL, &tty_imask) == 0) {
+        if (pci_map_int(tag, stlpciintr, (void *) NULL) == 0) {
                 printf("STALLION: failed to map interrupt irq=%d for unit=%d\n",
                         brdp->irq, brdp->brdnr);
                 return;
diff --git a/sys/dev/video/meteor/meteor.c b/sys/dev/video/meteor/meteor.c
index 8969f0a51b..4d990d66cb 100644
--- a/sys/dev/video/meteor/meteor.c
+++ b/sys/dev/video/meteor/meteor.c
@@ -29,7 +29,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/pci/meteor.c,v 1.49 1999/09/25 18:24:41 phk Exp $
- * $DragonFly: src/sys/dev/video/meteor/meteor.c,v 1.14 2004/07/23 14:09:31 joerg Exp $
+ * $DragonFly: src/sys/dev/video/meteor/meteor.c,v 1.15 2005/06/16 21:12:43 dillon Exp $
  */
 
 /*		Change History:
@@ -1056,7 +1056,7 @@ met_attach(pcici_t tag, int unit)
 		unit, (old_irq & 0xff), (new_irq & 0xff));
 #endif /* METEOR_IRQ */
 				/* setup the interrupt handling routine */
-	pci_map_int(tag, meteor_intr, (void*) mtr, &net_imask); 
+	pci_map_int(tag, meteor_intr, (void*) mtr); 
 
 /*
  * PCI latency timer.  32 is a good value for 4 bus mastering slots, if
diff --git a/sys/i386/apic/apic_vector.s b/sys/i386/apic/apic_vector.s
index 43b1247779..6d2aea93da 100644
--- a/sys/i386/apic/apic_vector.s
+++ b/sys/i386/apic/apic_vector.s
@@ -1,7 +1,7 @@
 /*
  *	from: vector.s, 386BSD 0.1 unknown origin
  * $FreeBSD: src/sys/i386/isa/apic_vector.s,v 1.47.2.5 2001/09/01 22:33:38 tegge Exp $
- * $DragonFly: src/sys/i386/apic/Attic/apic_vector.s,v 1.18 2004/02/21 06:37:08 dillon Exp $
+ * $DragonFly: src/sys/i386/apic/Attic/apic_vector.s,v 1.19 2005/06/16 21:12:47 dillon Exp $
  */
 
 
@@ -153,12 +153,10 @@ IDTVEC(vec_name) ;							\
 	MASK_LEVEL_IRQ(irq_num) ;					\
 	EOI_IRQ(irq_num) ;						\
 	movl	PCPU(curthread),%ebx ;					\
-	movl	TD_CPL(%ebx),%eax ;					\
+	movl	$0,%eax ;	/* CURRENT CPL IN FRAME (REMOVED) */	\
 	pushl	%eax ;							\
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) ;				\
-	jge	1f ;							\
-	testl	$IRQ_LBIT(irq_num), %eax ;				\
-	jz	2f ;							\
+	jl	2f ;							\
 1: ;									\
 	/* in critical section, make interrupt pending */		\
 	/* set the pending bit and return, leave interrupt masked */	\
@@ -266,12 +264,10 @@ IDTVEC(vec_name) ;							\
 	MASK_LEVEL_IRQ(irq_num) ;					\
 	EOI_IRQ(irq_num) ;						\
 	movl	PCPU(curthread),%ebx ;					\
-	movl	TD_CPL(%ebx),%eax ;					\
+	movl	$0,%eax ;	/* CURRENT CPL IN FRAME (REMOVED) */	\
 	pushl	%eax ;		/* cpl do restore */			\
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) ;				\
-	jge	1f ;							\
-	testl	$IRQ_LBIT(irq_num),%eax ;				\
-	jz	2f ;							\
+	jl	2f ;							\
 1: ;									\
 	/* set the pending bit and return, leave the interrupt masked */ \
 	orl	$IRQ_LBIT(irq_num), PCPU(ipending) ;			\
@@ -428,7 +424,7 @@ Xipiq:
 	subl	$TDPRI_CRIT,TD_PRI(%ebx)
 	decl	PCPU(intr_nesting_level)
 	addl	$8,%esp
-	pushl	TD_CPL(%ebx)
+	pushl	$0			/* CPL for frame (REMOVED) */
 	MEXITCOUNT
 	jmp	doreti
 1:
@@ -541,39 +537,6 @@ Xrendezvous:
 	
 	.data
 
-#if 0
-/*
- * Addresses of interrupt handlers.
- *  XresumeNN: Resumption addresses for HWIs.
- */
-	.globl _ihandlers
-_ihandlers:
-/*
- * used by:
- *  ipl.s:	doreti_unpend
- */
-	.long	Xresume0,  Xresume1,  Xresume2,  Xresume3 
-	.long	Xresume4,  Xresume5,  Xresume6,  Xresume7
-	.long	Xresume8,  Xresume9,  Xresume10, Xresume11
-	.long	Xresume12, Xresume13, Xresume14, Xresume15 
-	.long	Xresume16, Xresume17, Xresume18, Xresume19
-	.long	Xresume20, Xresume21, Xresume22, Xresume23
-/*
- * used by:
- *  ipl.s:	doreti_unpend
- *  apic_ipl.s:	splz_unpend
- */
-	.long	_swi_null, swi_net, _swi_null, _swi_null
-	.long	_swi_vm, _swi_null, _softclock
-
-imasks:				/* masks for interrupt handlers */
-	.space	NHWI*4		/* padding; HWI masks are elsewhere */
-
-	.long	SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
-	.long	SWI_VM_MASK, SWI_TQ_MASK, SWI_CLOCK_MASK
-#endif	/* 0 */
-
-
 #ifdef COUNT_XINVLTLB_HITS
 	.globl	xhits
 xhits:
diff --git a/sys/i386/i386/autoconf.c b/sys/i386/i386/autoconf.c
index 19d7e98633..0879988b5c 100644
--- a/sys/i386/i386/autoconf.c
+++ b/sys/i386/i386/autoconf.c
@@ -35,7 +35,7 @@
  *
  *	from: @(#)autoconf.c	7.1 (Berkeley) 5/9/91
  * $FreeBSD: src/sys/i386/i386/autoconf.c,v 1.146.2.2 2001/06/07 06:05:58 dd Exp $
- * $DragonFly: src/sys/i386/i386/Attic/autoconf.c,v 1.16 2005/06/06 15:02:26 dillon Exp $
+ * $DragonFly: src/sys/i386/i386/Attic/autoconf.c,v 1.17 2005/06/16 21:12:44 dillon Exp $
  */
 
 /*
@@ -169,12 +169,6 @@ configure(dummy)
 		isa_probe_children(isa_bus_device);
 #endif
 
-	/*
-	 * Now we're ready to handle (pending) interrupts.
-	 * XXX this is slightly misplaced.
-	 */
-	spl0();
-
 	/*
 	 * Allow lowering of the ipl to the lowest kernel level if we
 	 * panic (or call tsleep() before clearing `cold').  No level is
diff --git a/sys/i386/i386/exception.s b/sys/i386/i386/exception.s
index df76ac2ed1..c5dc716c49 100644
--- a/sys/i386/i386/exception.s
+++ b/sys/i386/i386/exception.s
@@ -31,7 +31,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/i386/exception.s,v 1.65.2.3 2001/08/15 01:23:49 peter Exp $
- * $DragonFly: src/sys/i386/i386/Attic/exception.s,v 1.23 2004/08/12 19:59:30 eirikn Exp $
+ * $DragonFly: src/sys/i386/i386/Attic/exception.s,v 1.24 2005/06/16 21:12:44 dillon Exp $
  */
 
 #include "use_npx.h"
@@ -721,8 +721,6 @@ IDTVEC(fpu)
 	mov	%ax,%fs
 	FAKE_MCOUNT(13*4(%esp))
 
-	movl	PCPU(curthread),%ebx		/* save original cpl */
-	movl	TD_CPL(%ebx), %ebx
 	incl	PCPU(cnt)+V_TRAP
 
 	/* additional dummy pushes to fake an interrupt frame */
@@ -734,7 +732,7 @@ IDTVEC(fpu)
 
 	/* convert back to a trapframe for doreti */
 	addl	$4,%esp
-	movl	%ebx,(%esp)
+	movl	$0,(%esp)		/* DUMMY CPL FOR DORETI */
 	MEXITCOUNT
 	jmp	doreti
 #else	/* NNPX > 0 */
@@ -774,8 +772,6 @@ alltraps_with_regs_pushed:
 calltrap:
 	FAKE_MCOUNT(btrap)		/* init "from" _btrap -> calltrap */
 	incl	PCPU(cnt)+V_TRAP
-	movl	PCPU(curthread),%eax	/* keep orig cpl here during call */
-	movl	TD_CPL(%eax),%ebx
 	/* warning, trap frame dummy arg, no extra reg pushes */
 	call	trap
 
@@ -783,7 +779,7 @@ calltrap:
 	 * Return via doreti to handle ASTs.  Have to change trap frame
 	 * to interrupt frame.
 	 */
-	pushl	%ebx			/* cpl to restore */
+	pushl	$0			/* DUMMY CPL FOR DORETI */
 	MEXITCOUNT
 	jmp	doreti
 
@@ -956,7 +952,6 @@ ENTRY(fork_trampoline)
 	/* cut from syscall */
 
 	sti
-	call	spl0
 	call	splz
 
 #if defined(INVARIANTS) && defined(SMP)
diff --git a/sys/i386/i386/genassym.c b/sys/i386/i386/genassym.c
index 660f97d191..f115c7c78a 100644
--- a/sys/i386/i386/genassym.c
+++ b/sys/i386/i386/genassym.c
@@ -35,7 +35,7 @@
  *
  *	from: @(#)genassym.c	5.11 (Berkeley) 5/10/91
  * $FreeBSD: src/sys/i386/i386/genassym.c,v 1.86.2.3 2002/03/03 05:42:49 nyan Exp $
- * $DragonFly: src/sys/i386/i386/Attic/genassym.c,v 1.41 2005/02/27 10:57:24 swildner Exp $
+ * $DragonFly: src/sys/i386/i386/Attic/genassym.c,v 1.42 2005/06/16 21:12:44 dillon Exp $
  */
 
 #include <sys/param.h>
@@ -96,7 +96,6 @@ ASSYM(MP_FREE_LOCK, MP_FREE_LOCK);
 
 ASSYM(RW_OWNER, offsetof(struct lwkt_rwlock, rw_owner));
 
-ASSYM(TD_CPL, offsetof(struct thread, td_mach) + offsetof(struct md_thread, mtd_cpl));
 ASSYM(TD_SAVEFPU, offsetof(struct thread, td_mach) + offsetof(struct md_thread, mtd_savefpu));
 
 ASSYM(TDPRI_CRIT, TDPRI_CRIT);
diff --git a/sys/i386/i386/machdep.c b/sys/i386/i386/machdep.c
index 7c595aead7..1522e2c51c 100644
--- a/sys/i386/i386/machdep.c
+++ b/sys/i386/i386/machdep.c
@@ -36,7 +36,7 @@
  *
  *	from: @(#)machdep.c	7.4 (Berkeley) 6/3/91
  * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
- * $DragonFly: src/sys/i386/i386/Attic/machdep.c,v 1.73 2005/06/06 15:02:26 dillon Exp $
+ * $DragonFly: src/sys/i386/i386/Attic/machdep.c,v 1.74 2005/06/16 21:12:44 dillon Exp $
  */
 
 #include "use_apm.h"
@@ -1872,7 +1872,6 @@ init386(int first)
 	thread0.td_flags |= TDF_RUNNING;
 	thread0.td_proc = &proc0;
 	thread0.td_switch = cpu_heavy_switch;	/* YYY eventually LWKT */
-	thread0.td_cpl = 0;			/* crit section protects us */
 	safepri = TDPRI_MAX;
 
 	/* make ldt memory segments */
diff --git a/sys/i386/i386/nexus.c b/sys/i386/i386/nexus.c
index e676e5aa42..08a6b68afc 100644
--- a/sys/i386/i386/nexus.c
+++ b/sys/i386/i386/nexus.c
@@ -27,7 +27,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/i386/nexus.c,v 1.26.2.10 2003/02/22 13:16:45 imp Exp $
- * $DragonFly: src/sys/i386/i386/Attic/nexus.c,v 1.16 2005/06/11 09:03:49 swildner Exp $
+ * $DragonFly: src/sys/i386/i386/Attic/nexus.c,v 1.17 2005/06/16 21:12:44 dillon Exp $
  */
 
 /*
@@ -498,7 +498,6 @@ nexus_setup_intr(device_t bus, device_t child, struct resource *irq,
 		 int flags, void (*ihand)(void *), void *arg,
 		 void **cookiep, lwkt_serialize_t serializer)
 {
-	intrmask_t	*mask;
 	driver_t	*driver;
 	int	error, icflags;
 
@@ -513,34 +512,7 @@ nexus_setup_intr(device_t bus, device_t child, struct resource *irq,
 		icflags = INTR_EXCL;
 
 	driver = device_get_driver(child);
-	switch (flags & INTR_TYPE_MASK) {
-	case INTR_TYPE_AV:
-	case INTR_TYPE_TTY:
-		mask = &tty_imask;
-		break;
-	case INTR_TYPE_BIO:
-		mask = &bio_imask;
-		break;
-	case INTR_TYPE_NET:
-		mask = &net_imask;
-		break;
-	case INTR_TYPE_CAM:
-		mask = &cam_imask;
-		break;
-	case INTR_TYPE_CLK:
-		mask = NULL;
-		printf("nexus: Warning: do not know what imask to use for INTR_TYPE_CLK\n");
-		break;
-	case INTR_TYPE_MISC:
-		mask = NULL;
-		break;
-	default:
-		panic("still using grody create_intr interface");
-	}
-	if (serializer && mask != NULL) {
-		device_printf(child, "nexus_setup_intr: Warning, driver must set interrupt type to INTR_TYPE_MISC when using a serializer.\n");
-		mask = NULL;
-	}
+
 	if (flags & INTR_FAST)
 		icflags |= INTR_FAST;
 
@@ -552,7 +524,7 @@ nexus_setup_intr(device_t bus, device_t child, struct resource *irq,
 		return (error);
 
 	*cookiep = inthand_add(device_get_nameunit(child), irq->r_start,
-	    ihand, arg, mask, icflags, serializer);
+	    ihand, arg, icflags, serializer);
 	if (*cookiep == NULL)
 		error = EINVAL;	/* XXX ??? */
 
diff --git a/sys/i386/i386/trap.c b/sys/i386/i386/trap.c
index bddaf3a9c2..a73b1826d3 100644
--- a/sys/i386/i386/trap.c
+++ b/sys/i386/i386/trap.c
@@ -36,7 +36,7 @@
  *
  *	from: @(#)trap.c	7.4 (Berkeley) 5/13/91
  * $FreeBSD: src/sys/i386/i386/trap.c,v 1.147.2.11 2003/02/27 19:09:59 luoqi Exp $
- * $DragonFly: src/sys/i386/i386/Attic/trap.c,v 1.56 2005/05/24 21:18:26 dillon Exp $
+ * $DragonFly: src/sys/i386/i386/Attic/trap.c,v 1.57 2005/06/16 21:12:44 dillon Exp $
  */
 
 /*
@@ -1099,17 +1099,6 @@ trap_fatal(frame, eva)
 	if (curthread->td_pri >= TDPRI_CRIT)
 		printf("(CRIT)");
 	printf("\n");
-	printf("interrupt mask		= ");
-	if ((curthread->td_cpl & net_imask) == net_imask)
-		printf("net ");
-	if ((curthread->td_cpl & tty_imask) == tty_imask)
-		printf("tty ");
-	if ((curthread->td_cpl & bio_imask) == bio_imask)
-		printf("bio ");
-	if ((curthread->td_cpl & cam_imask) == cam_imask)
-		printf("cam ");
-	if (curthread->td_cpl == 0)
-		printf("none");
 #ifdef SMP
 /**
  *  XXX FIXME:
diff --git a/sys/i386/i386/vm86bios.s b/sys/i386/i386/vm86bios.s
index b5f7d95842..566a63674a 100644
--- a/sys/i386/i386/vm86bios.s
+++ b/sys/i386/i386/vm86bios.s
@@ -24,7 +24,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/i386/vm86bios.s,v 1.15.2.1 2000/05/16 06:58:07 dillon Exp $
- * $DragonFly: src/sys/i386/i386/Attic/vm86bios.s,v 1.12 2004/04/30 00:59:52 dillon Exp $
+ * $DragonFly: src/sys/i386/i386/Attic/vm86bios.s,v 1.13 2005/06/16 21:12:44 dillon Exp $
  */
 
 #include <machine/asmacros.h>		/* miscellaneous asm macros */
@@ -138,7 +138,7 @@ ENTRY(vm86_bioscall)
 	 * Return via _doreti, restore the same cpl as our current cpl
 	 */
 	movl	PCPU(curthread),%eax
-	pushl	TD_CPL(%eax)
+	pushl	$0			/* DUMMY CPL FOR DORETI */
 	MEXITCOUNT
 	jmp	doreti
 
diff --git a/sys/i386/i386/vm_machdep.c b/sys/i386/i386/vm_machdep.c
index f75772e5b9..4d42046f87 100644
--- a/sys/i386/i386/vm_machdep.c
+++ b/sys/i386/i386/vm_machdep.c
@@ -39,7 +39,7 @@
  *	from: @(#)vm_machdep.c	7.3 (Berkeley) 5/13/91
  *	Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
  * $FreeBSD: src/sys/i386/i386/vm_machdep.c,v 1.132.2.9 2003/01/25 19:02:23 dillon Exp $
- * $DragonFly: src/sys/i386/i386/Attic/vm_machdep.c,v 1.35 2005/05/02 23:20:38 dillon Exp $
+ * $DragonFly: src/sys/i386/i386/Attic/vm_machdep.c,v 1.36 2005/06/16 21:12:44 dillon Exp $
  */
 
 #include "use_npx.h"
@@ -585,7 +585,7 @@ swi_vm(void *arg)
 static void
 swi_vm_setup(void *arg)
 {
-	register_swi(SWI_VM, swi_vm, NULL, "swi_vm", NULL);
+	register_swi(SWI_VM, swi_vm, NULL, "swi_vm");
 }
 
 SYSINIT(vm_setup, SI_SUB_CPU, SI_ORDER_ANY, swi_vm_setup, NULL);
diff --git a/sys/i386/icu/icu_vector.s b/sys/i386/icu/icu_vector.s
index 6fe74d0548..97526487d9 100644
--- a/sys/i386/icu/icu_vector.s
+++ b/sys/i386/icu/icu_vector.s
@@ -1,7 +1,7 @@
 /*
  *	from: vector.s, 386BSD 0.1 unknown origin
  * $FreeBSD: src/sys/i386/isa/icu_vector.s,v 1.14.2.2 2000/07/18 21:12:42 dfr Exp $
- * $DragonFly: src/sys/i386/icu/Attic/icu_vector.s,v 1.17 2005/02/27 12:44:43 asmodai Exp $
+ * $DragonFly: src/sys/i386/icu/Attic/icu_vector.s,v 1.18 2005/06/16 21:12:47 dillon Exp $
  */
 
 #define ICU_IMR_OFFSET		1	/* IO_ICU{1,2} + 1 */
@@ -113,12 +113,9 @@ IDTVEC(vec_name) ; 							\
 	MASK_IRQ(icu, irq_num) ;					\
 	enable_icus ;							\
 	movl	PCPU(curthread),%ebx ;					\
-	movl	TD_CPL(%ebx),%eax ;	/* save the cpl for doreti */	\
-	pushl	%eax ;							\
+	pushl	$0 ;			/* DUMMY CPL FOR DORETI */	\
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) ;				\
-	jge	1f ;							\
-	testl	$IRQ_LBIT(irq_num), %eax ;				\
-	jz	2f ;							\
+	jl	2f ;							\
 1: ;									\
 	/* set pending bit and return, leave interrupt masked */	\
 	orl	$IRQ_LBIT(irq_num),PCPU(fpending) ;			\
@@ -207,12 +204,9 @@ IDTVEC(vec_name) ; 							\
 	MASK_IRQ(icu, irq_num) ;					\
 	enable_icus ;							\
 	movl	PCPU(curthread),%ebx ;					\
-	movl	TD_CPL(%ebx), %eax ;					\
-	pushl	%eax ;		/* push CPL for doreti */		\
+	pushl	$0 ;			/* DUMMY CPL FOR DORETI */	\
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) ;				\
-	jge	1f ;							\
-	testl	$IRQ_LBIT(irq_num), %eax ;				\
-	jz	2f ;							\
+	jl	2f ;							\
 1: ;									\
 	/* set the pending bit and return, leave interrupt masked */	\
 	orl	$IRQ_LBIT(irq_num), PCPU(ipending) ;			\
diff --git a/sys/i386/include/ipl.h b/sys/i386/include/ipl.h
index c6827f735a..301e2ee8cf 100644
--- a/sys/i386/include/ipl.h
+++ b/sys/i386/include/ipl.h
@@ -31,7 +31,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/include/ipl.h,v 1.17.2.3 2002/12/17 18:04:02 sam Exp $
- * $DragonFly: src/sys/i386/include/Attic/ipl.h,v 1.5 2003/07/12 17:54:34 dillon Exp $
+ * $DragonFly: src/sys/i386/include/Attic/ipl.h,v 1.6 2005/06/16 21:12:46 dillon Exp $
  */
 
 #ifndef _MACHINE_IPL_H_
@@ -70,49 +70,8 @@
 #define	SWI_TQ_PENDING		(1 << SWI_TQ)
 #define	SWI_CLOCK_PENDING	(1 << SWI_CLOCK)
 
-/*
- * Corresponding interrupt-disable masks for cpl.  The ordering is now by
- * inclusion (where each mask is considered as a set of bits).  Everything
- * except SWI_CLOCK_MASK includes SWI_LOW_MASK so that softclock() and low
- * priority swi's don't run while other swi handlers are running and timeout
- * routines can call swi handlers.  SWI_TTY_MASK includes SWI_NET_MASK in
- * case tty interrupts are processed at splsofttty() for a tty that is in
- * SLIP or PPP line discipline (this is weaker than merging net_imask with
- * tty_imask in isa.c - splimp() must mask hard and soft tty interrupts, but
- * spltty() apparently only needs to mask soft net interrupts).
- */
-#define	SWI_TTY_MASK	(SWI_TTY_PENDING | SWI_LOW_MASK | SWI_NET_MASK)
-#define	SWI_CAMNET_MASK	(SWI_CAMNET_PENDING | SWI_LOW_MASK)
-#define	SWI_CRYPTO_MASK	SWI_CAMNET_MASK
-#define	SWI_CAMBIO_MASK	(SWI_CAMBIO_PENDING | SWI_LOW_MASK)
-#define	SWI_NET_MASK	(SWI_NET_PENDING | SWI_LOW_MASK)
-#define	SWI_VM_MASK	(SWI_VM_PENDING | SWI_LOW_MASK)
-#define	SWI_TQ_MASK	(SWI_TQ_PENDING | SWI_LOW_MASK)
-#define	SWI_CLOCK_MASK	SWI_CLOCK_PENDING
-#define	SWI_LOW_MASK	(SWI_TQ_PENDING | SWI_CLOCK_MASK)
-#define	SWI_MASK	(~HWI_MASK)
-
 #ifndef	LOCORE
 
-/*
- * cpl is preserved by interrupt handlers so it is effectively nonvolatile.
- * ipending and idelayed are changed by interrupt handlers so they are
- * volatile.
- */
-#ifdef notyet /* in <sys/interrupt.h> until pci drivers stop hacking on them */
-extern	unsigned bio_imask;	/* group of interrupts masked with splbio() */
-#endif
-#ifdef SMP
-extern	unsigned cil;		/* current INTerrupt level mask */
-#endif
-extern	volatile unsigned idelayed;	/* interrupts to become pending */
-extern	volatile unsigned ipending;	/* active interrupts masked by cpl */
-#ifdef notyet /* in <sys/systm.h> until pci drivers stop hacking on them */
-extern	unsigned net_imask;	/* group of interrupts masked with splimp() */
-extern	unsigned stat_imask;	/* interrupts masked with splstatclock() */
-extern	unsigned tty_imask;	/* group of interrupts masked with spltty() */
-#endif
-
 #endif /* !LOCORE */
 
 #endif /* !_MACHINE_IPL_H_ */
diff --git a/sys/i386/include/thread.h b/sys/i386/include/thread.h
index b59fb0f887..e7d42399bc 100644
--- a/sys/i386/include/thread.h
+++ b/sys/i386/include/thread.h
@@ -33,7 +33,7 @@
  * 
  *	Machine independant code should not directly include this file.
  *
- * $DragonFly: src/sys/i386/include/Attic/thread.h,v 1.12 2005/04/11 11:00:40 hmp Exp $
+ * $DragonFly: src/sys/i386/include/Attic/thread.h,v 1.13 2005/06/16 21:12:46 dillon Exp $
  */
 
 #ifndef	_MACHINE_THREAD_H_
@@ -44,14 +44,13 @@
 union savefpu;
 
 struct md_thread {
-    unsigned int	mtd_cpl;
+    unsigned int	mtd_unused;	/* used to be mtd_cpl */
     union savefpu	*mtd_savefpu;
     struct segment_descriptor mtd_tls[NGTLS];
 };
 
 #ifdef _KERNEL
 
-#define td_cpl		td_mach.mtd_cpl
 #define td_savefpu	td_mach.mtd_savefpu
 #define td_tls		td_mach.mtd_tls
 
diff --git a/sys/i386/isa/apic_vector.s b/sys/i386/isa/apic_vector.s
index 714ca04ddc..e5099bd69a 100644
--- a/sys/i386/isa/apic_vector.s
+++ b/sys/i386/isa/apic_vector.s
@@ -1,7 +1,7 @@
 /*
  *	from: vector.s, 386BSD 0.1 unknown origin
  * $FreeBSD: src/sys/i386/isa/apic_vector.s,v 1.47.2.5 2001/09/01 22:33:38 tegge Exp $
- * $DragonFly: src/sys/i386/isa/Attic/apic_vector.s,v 1.18 2004/02/21 06:37:08 dillon Exp $
+ * $DragonFly: src/sys/i386/isa/Attic/apic_vector.s,v 1.19 2005/06/16 21:12:47 dillon Exp $
  */
 
 
@@ -153,12 +153,10 @@ IDTVEC(vec_name) ;							\
 	MASK_LEVEL_IRQ(irq_num) ;					\
 	EOI_IRQ(irq_num) ;						\
 	movl	PCPU(curthread),%ebx ;					\
-	movl	TD_CPL(%ebx),%eax ;					\
+	movl	$0,%eax ;	/* CURRENT CPL IN FRAME (REMOVED) */	\
 	pushl	%eax ;							\
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) ;				\
-	jge	1f ;							\
-	testl	$IRQ_LBIT(irq_num), %eax ;				\
-	jz	2f ;							\
+	jl	2f ;							\
 1: ;									\
 	/* in critical section, make interrupt pending */		\
 	/* set the pending bit and return, leave interrupt masked */	\
@@ -266,12 +264,10 @@ IDTVEC(vec_name) ;							\
 	MASK_LEVEL_IRQ(irq_num) ;					\
 	EOI_IRQ(irq_num) ;						\
 	movl	PCPU(curthread),%ebx ;					\
-	movl	TD_CPL(%ebx),%eax ;					\
+	movl	$0,%eax ;	/* CURRENT CPL IN FRAME (REMOVED) */	\
 	pushl	%eax ;		/* cpl do restore */			\
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) ;				\
-	jge	1f ;							\
-	testl	$IRQ_LBIT(irq_num),%eax ;				\
-	jz	2f ;							\
+	jl	2f ;							\
 1: ;									\
 	/* set the pending bit and return, leave the interrupt masked */ \
 	orl	$IRQ_LBIT(irq_num), PCPU(ipending) ;			\
@@ -428,7 +424,7 @@ Xipiq:
 	subl	$TDPRI_CRIT,TD_PRI(%ebx)
 	decl	PCPU(intr_nesting_level)
 	addl	$8,%esp
-	pushl	TD_CPL(%ebx)
+	pushl	$0			/* CPL for frame (REMOVED) */
 	MEXITCOUNT
 	jmp	doreti
 1:
@@ -541,39 +537,6 @@ Xrendezvous:
 	
 	.data
 
-#if 0
-/*
- * Addresses of interrupt handlers.
- *  XresumeNN: Resumption addresses for HWIs.
- */
-	.globl _ihandlers
-_ihandlers:
-/*
- * used by:
- *  ipl.s:	doreti_unpend
- */
-	.long	Xresume0,  Xresume1,  Xresume2,  Xresume3 
-	.long	Xresume4,  Xresume5,  Xresume6,  Xresume7
-	.long	Xresume8,  Xresume9,  Xresume10, Xresume11
-	.long	Xresume12, Xresume13, Xresume14, Xresume15 
-	.long	Xresume16, Xresume17, Xresume18, Xresume19
-	.long	Xresume20, Xresume21, Xresume22, Xresume23
-/*
- * used by:
- *  ipl.s:	doreti_unpend
- *  apic_ipl.s:	splz_unpend
- */
-	.long	_swi_null, swi_net, _swi_null, _swi_null
-	.long	_swi_vm, _swi_null, _softclock
-
-imasks:				/* masks for interrupt handlers */
-	.space	NHWI*4		/* padding; HWI masks are elsewhere */
-
-	.long	SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
-	.long	SWI_VM_MASK, SWI_TQ_MASK, SWI_CLOCK_MASK
-#endif	/* 0 */
-
-
 #ifdef COUNT_XINVLTLB_HITS
 	.globl	xhits
 xhits:
diff --git a/sys/i386/isa/clock.c b/sys/i386/isa/clock.c
index 924016a71c..3155b50d2f 100644
--- a/sys/i386/isa/clock.c
+++ b/sys/i386/isa/clock.c
@@ -35,7 +35,7 @@
  *
  *	from: @(#)clock.c	7.2 (Berkeley) 5/12/91
  * $FreeBSD: src/sys/i386/isa/clock.c,v 1.149.2.6 2002/11/02 04:41:50 iwasaki Exp $
- * $DragonFly: src/sys/i386/isa/Attic/clock.c,v 1.30 2005/06/11 09:03:49 swildner Exp $
+ * $DragonFly: src/sys/i386/isa/Attic/clock.c,v 1.31 2005/06/16 21:12:47 dillon Exp $
  */
 
 /*
@@ -118,7 +118,6 @@ int	adjkerntz;		/* local offset from GMT in seconds */
 int	disable_rtc_set;	/* disable resettodr() if != 0 */
 volatile u_int	idelayed;
 int	statclock_disable = 1;	/* we don't use the statclock right now */
-u_int	stat_imask = SWI_CLOCK_MASK;
 u_int	tsc_freq;
 int	tsc_is_broken;
 int	wall_cmos_clock;	/* wall CMOS clock assumed if != 0 */
@@ -129,7 +128,6 @@ enum tstate timer1_state;
 enum tstate timer2_state;
 
 static	int	beeping = 0;
-static	u_int	clk_imask = HWI_MASK | SWI_MASK;
 static	const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
 static	u_char	rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
 static	u_char	rtc_statusb = RTCSB_24HR | RTCSB_PINTR;
@@ -945,7 +943,6 @@ cpu_initclocks()
 		 * flag which would normally cause the RTC to generate
 		 * interrupts.
 		 */
-		stat_imask = HWI_MASK | SWI_MASK;
 		rtc_statusb = RTCSB_24HR;
 	} else {
 	        /* Setting stathz to nonzero early helps avoid races. */
@@ -971,12 +968,12 @@ cpu_initclocks()
 	}
 
 	clkdesc = inthand_add("clk", apic_8254_intr, (inthand2_t *)clkintr,
-			      NULL, &clk_imask, INTR_EXCL | INTR_FAST, NULL);
+			      NULL, INTR_EXCL | INTR_FAST, NULL);
 	INTREN(1 << apic_8254_intr);
 	
 #else /* APIC_IO */
 
-	inthand_add("clk", 0, (inthand2_t *)clkintr, NULL, &clk_imask,
+	inthand_add("clk", 0, (inthand2_t *)clkintr, NULL,
 		    INTR_EXCL | INTR_FAST, NULL);
 	INTREN(IRQ0);
 
@@ -996,7 +993,7 @@ cpu_initclocks()
 			panic("APIC RTC != 8");
 #endif /* APIC_IO */
 
-		inthand_add("rtc", 8, (inthand2_t *)rtcintr, NULL, &stat_imask,
+		inthand_add("rtc", 8, (inthand2_t *)rtcintr, NULL,
 			    INTR_EXCL | INTR_FAST, NULL);
 
 #ifdef APIC_IO
@@ -1052,7 +1049,7 @@ cpu_initclocks()
 			setup_8254_mixed_mode();
 			inthand_add("clk", apic_8254_intr,
 				    (inthand2_t *)clkintr,
-				    NULL, &clk_imask, 
+				    NULL,
 				    INTR_EXCL | INTR_FAST, NULL);
 			INTREN(1 << apic_8254_intr);
 		}
diff --git a/sys/i386/isa/icu_vector.s b/sys/i386/isa/icu_vector.s
index 42faff77ef..cb777295be 100644
--- a/sys/i386/isa/icu_vector.s
+++ b/sys/i386/isa/icu_vector.s
@@ -1,7 +1,7 @@
 /*
  *	from: vector.s, 386BSD 0.1 unknown origin
  * $FreeBSD: src/sys/i386/isa/icu_vector.s,v 1.14.2.2 2000/07/18 21:12:42 dfr Exp $
- * $DragonFly: src/sys/i386/isa/Attic/icu_vector.s,v 1.17 2005/02/27 12:44:43 asmodai Exp $
+ * $DragonFly: src/sys/i386/isa/Attic/icu_vector.s,v 1.18 2005/06/16 21:12:47 dillon Exp $
  */
 
 #define ICU_IMR_OFFSET		1	/* IO_ICU{1,2} + 1 */
@@ -113,12 +113,9 @@ IDTVEC(vec_name) ; 							\
 	MASK_IRQ(icu, irq_num) ;					\
 	enable_icus ;							\
 	movl	PCPU(curthread),%ebx ;					\
-	movl	TD_CPL(%ebx),%eax ;	/* save the cpl for doreti */	\
-	pushl	%eax ;							\
+	pushl	$0 ;			/* DUMMY CPL FOR DORETI */	\
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) ;				\
-	jge	1f ;							\
-	testl	$IRQ_LBIT(irq_num), %eax ;				\
-	jz	2f ;							\
+	jl	2f ;							\
 1: ;									\
 	/* set pending bit and return, leave interrupt masked */	\
 	orl	$IRQ_LBIT(irq_num),PCPU(fpending) ;			\
@@ -207,12 +204,9 @@ IDTVEC(vec_name) ; 							\
 	MASK_IRQ(icu, irq_num) ;					\
 	enable_icus ;							\
 	movl	PCPU(curthread),%ebx ;					\
-	movl	TD_CPL(%ebx), %eax ;					\
-	pushl	%eax ;		/* push CPL for doreti */		\
+	pushl	$0 ;			/* DUMMY CPL FOR DORETI */	\
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) ;				\
-	jge	1f ;							\
-	testl	$IRQ_LBIT(irq_num), %eax ;				\
-	jz	2f ;							\
+	jl	2f ;							\
 1: ;									\
 	/* set the pending bit and return, leave interrupt masked */	\
 	orl	$IRQ_LBIT(irq_num), PCPU(ipending) ;			\
diff --git a/sys/i386/isa/intr_machdep.c b/sys/i386/isa/intr_machdep.c
index b2d2b10e00..0b5c8cd8ad 100644
--- a/sys/i386/isa/intr_machdep.c
+++ b/sys/i386/isa/intr_machdep.c
@@ -35,7 +35,7 @@
  *
  *	from: @(#)isa.c	7.2 (Berkeley) 5/13/91
  * $FreeBSD: src/sys/i386/isa/intr_machdep.c,v 1.29.2.5 2001/10/14 06:54:27 luigi Exp $
- * $DragonFly: src/sys/i386/isa/Attic/intr_machdep.c,v 1.30 2005/06/11 09:03:49 swildner Exp $
+ * $DragonFly: src/sys/i386/isa/Attic/intr_machdep.c,v 1.31 2005/06/16 21:12:47 dillon Exp $
  */
 /*
  * This file contains an aggregated module marked:
@@ -115,9 +115,7 @@ inthand2_t *intr_handler[ICU_LEN*2] = {
 
 static struct md_intr_info {
     int		irq;
-    u_int	mask;
     int		mihandler_installed;
-    u_int	*maskp;
 } intr_info[ICU_LEN*2];
 
 static inthand_t *fastintr[ICU_LEN] = {
@@ -357,36 +355,6 @@ isa_irq_pending(void)
 }
 #endif
 
-int
-update_intr_masks(void)
-{
-	int intr, n=0;
-	u_int mask,*maskptr;
-
-	for (intr=0; intr < ICU_LEN; intr ++) {
-#if defined(APIC_IO)
-		/* no 8259 SLAVE to ignore */
-#else
-		if (intr==ICU_SLAVEID) continue;	/* ignore 8259 SLAVE output */
-#endif /* APIC_IO */
-		maskptr = intr_info[intr].maskp;
-		if (!maskptr)
-			continue;
-		*maskptr |= SWI_CLOCK_MASK | (1 << intr);
-		mask = *maskptr;
-		if (mask != intr_info[intr].mask) {
-#if 0
-			printf ("intr_mask[%2d] old=%08x new=%08x ptr=%p.\n",
-				intr, intr_info[intr].mask, mask, maskptr);
-#endif
-			intr_info[intr].mask = mask;
-			n++;
-		}
-
-	}
-	return (n);
-}
-
 static void
 update_intrname(int intr, char *name)
 {
@@ -441,7 +409,7 @@ found:
  * code ignores it for normal interrupts.
  */
 int
-icu_setup(int intr, inthand2_t *handler, void *arg, u_int *maskptr, int flags)
+icu_setup(int intr, inthand2_t *handler, void *arg, int flags)
 {
 #if defined(FAST_HI) && defined(APIC_IO)
 	int		select;		/* the select register is 8 bits */
@@ -449,7 +417,6 @@ icu_setup(int intr, inthand2_t *handler, void *arg, u_int *maskptr, int flags)
 	u_int32_t	value;		/* the window register is 32 bits */
 #endif /* FAST_HI */
 	u_long	ef;
-	u_int	mask = (maskptr ? *maskptr : 0);
 
 #if defined(APIC_IO)
 	if ((u_int)intr >= ICU_LEN)	/* no 8259 SLAVE to ignore */
@@ -464,8 +431,6 @@ icu_setup(int intr, inthand2_t *handler, void *arg, u_int *maskptr, int flags)
 	cpu_disable_intr();	/* YYY */
 	intr_handler[intr] = handler;
 	intr_unit[intr] = arg;
-	intr_info[intr].maskp = maskptr;
-	intr_info[intr].mask = mask | SWI_CLOCK_MASK | (1 << intr);
 #if 0
 	/* YYY  fast ints supported and mp protected but ... */
 	flags &= ~INTR_FAST;
@@ -538,8 +503,6 @@ icu_unset(intr, handler)
 	cpu_disable_intr();	/* YYY */
 	intr_countp[intr] = &intrcnt[1 + intr];
 	intr_handler[intr] = isa_strayintr;
-	intr_info[intr].maskp = NULL;
-	intr_info[intr].mask = HWI_MASK | SWI_MASK;
 	intr_unit[intr] = &intr_unit[intr];
 #ifdef FAST_HI_XXX
 	/* XXX how do I re-create dvp here? */
@@ -589,13 +552,11 @@ icu_unset(intr, handler)
  */
 
 typedef struct intrec {
-	intrmask_t      mask;
 	inthand2_t      *handler;
 	void            *argument;
 	struct intrec   *next;
 	char            *name;
 	int             intr;
-	intrmask_t      *maskptr;
 	int             flags;
 	lwkt_serialize_t serializer;
 	volatile int	in_handler;
@@ -641,69 +602,6 @@ intr_mux(void *arg)
 	}
 }
 
-static intrec*
-find_idesc(unsigned *maskptr, int irq)
-{
-	intrec *p = intreclist_head[irq];
-
-	while (p && p->maskptr != maskptr)
-		p = p->next;
-
-	return (p);
-}
-
-/*
- * Both the low level handler and the shared interrupt multiplexer
- * block out further interrupts as set in the handlers "mask", while
- * the handler is running. In fact *maskptr should be used for this
- * purpose, but since this requires one more pointer dereference on
- * each interrupt, we rather bother update "mask" whenever *maskptr
- * changes. The function "update_masks" should be called **after**
- * all manipulation of the linked list of interrupt handlers hung
- * off of intrdec_head[irq] is complete, since the chain of handlers
- * will both determine the *maskptr values and the instances of mask
- * that are fixed. This function should be called with the irq for
- * which a new handler has been add blocked, since the masks may not
- * yet know about the use of this irq for a device of a certain class.
- */
-
-static void
-update_mux_masks(void)
-{
-	int irq;
-	for (irq = 0; irq < ICU_LEN; irq++) {
-		intrec *idesc = intreclist_head[irq];
-		while (idesc != NULL) {
-			if (idesc->maskptr != NULL) {
-				/* our copy of *maskptr may be stale, refresh */
-				idesc->mask = *idesc->maskptr;
-			}
-			idesc = idesc->next;
-		}
-	}
-}
-
-static void
-update_masks(intrmask_t *maskptr, int irq)
-{
-	intrmask_t mask = 1 << irq;
-
-	if (maskptr == NULL)
-		return;
-
-	if (find_idesc(maskptr, irq) == NULL) {
-		/* no reference to this maskptr was found in this irq's chain */
-		*maskptr &= ~mask;
-	} else {
-		/* a reference to this maskptr was found in this irq's chain */
-		*maskptr |= mask;
-	}
-	/* we need to update all values in the intr_mask[irq] array */
-	update_intr_masks();
-	/* update mask in chains of the interrupt multiplex handler as well */
-	update_mux_masks();
-}
-
 /*
  * Add an interrupt handler to the linked list hung off of intreclist_head[irq]
  * and install a shared interrupt multiplex handler.  Install an interrupt
@@ -714,16 +612,17 @@ update_masks(intrmask_t *maskptr, int irq)
  *
  * The interrupt thread has already been put on the run queue, so if we cannot
  * preempt we should force a reschedule.
+ *
+ * This preemption check routine is currently empty, but will be used in the
+ * future to pre-check interrupts for preemptability to avoid the
+ * inefficiencies of having to instantly block.  We used to do a CPL check
+ * here (otherwise the interrupt thread could preempt even when it wasn't
+ * supposed to), but with CPLs gone we no longer have to do this.
  */
 static void
 cpu_intr_preempt(struct thread *td, int critpri)
 {
-	struct md_intr_info *info = td->td_info.intdata;
-
-	if ((curthread->td_cpl & (1 << info->irq)) == 0)
-		lwkt_preempt(td, critpri);
-	else
-		need_lwkt_resched(); /* XXX may not be required */
+	lwkt_preempt(td, critpri);
 }
 
 static int
@@ -746,7 +645,7 @@ add_intrdesc(intrec *idesc)
 
 		intr_info[irq].mihandler_installed = 1;
 		intr_info[irq].irq = irq;
-		td = register_int(irq, intr_mux, &intreclist_head[irq], idesc->name, idesc->maskptr);
+		td = register_int(irq, intr_mux, &intreclist_head[irq], idesc->name);
 		td->td_info.intdata = &intr_info[irq];
 		td->td_preemptable = cpu_intr_preempt;
 		printf("installed MI handler for int %d\n", irq);
@@ -775,12 +674,12 @@ add_intrdesc(intrec *idesc)
 	 * individual enablement on handlers.
 	 */
 	if (head == NULL) {
-		if (icu_setup(irq, idesc->handler, idesc->argument, idesc->maskptr, idesc->flags) != 0)
+		if (icu_setup(irq, idesc->handler, idesc->argument, idesc->flags) != 0)
 			return (-1);
 		update_intrname(irq, idesc->name);
 	} else if (head->next == NULL) {
 		icu_unset(irq, head->handler);
-		if (icu_setup(irq, intr_mux, &intreclist_head[irq], 0, 0) != 0)
+		if (icu_setup(irq, intr_mux, &intreclist_head[irq], 0) != 0)
 			return (-1);
 		if (bootverbose && head->next == NULL)
 			printf("\tusing shared irq%d.\n", irq);
@@ -788,13 +687,12 @@ add_intrdesc(intrec *idesc)
 	}
 
 	/*
-	 * Append to the end of the chain and update our SPL masks.
+	 * Append to the end of the chain.
 	 */
 	while (*headp != NULL)
 		headp = &(*headp)->next;
 	*headp = idesc;
 
-	update_masks(idesc->maskptr, irq);
 	return (0);
 }
 
@@ -810,8 +708,7 @@ add_intrdesc(intrec *idesc)
  * device interrupt rates (->update_intrlabels).
  *
  * Add the interrupt handler descriptor data structure created by an
- * earlier call of create_intr() to the linked list for its irq and
- * adjust the interrupt masks if necessary.
+ * earlier call of create_intr() to the linked list for its irq.
  *
  * WARNING: This is an internal function and not to be used by device
  * drivers.  It is subject to change without notice.
@@ -819,16 +716,11 @@ add_intrdesc(intrec *idesc)
 
 intrec *
 inthand_add(const char *name, int irq, inthand2_t handler, void *arg,
-	     intrmask_t *maskptr, int flags, lwkt_serialize_t serializer)
+	     int flags, lwkt_serialize_t serializer)
 {
 	intrec *idesc;
 	int errcode = -1;
 
-	if (ICU_LEN > 8 * sizeof *maskptr) {
-		printf("create_intr: ICU_LEN of %d too high for %d bit intrmask\n",
-		       ICU_LEN, 8 * sizeof *maskptr);
-		return (NULL);
-	}
 	if ((unsigned)irq >= ICU_LEN) {
 		printf("create_intr: requested irq%d too high, limit is %d\n",
 		       irq, ICU_LEN -1);
@@ -850,12 +742,10 @@ inthand_add(const char *name, int irq, inthand2_t handler, void *arg,
 
 	idesc->handler  = handler;
 	idesc->argument = arg;
-	idesc->maskptr  = maskptr;
 	idesc->intr     = irq;
 	idesc->flags    = flags;
 	idesc->serializer = serializer;
 
-	/* add irq to class selected by maskptr */
 	crit_enter();
 	errcode = add_intrdesc(idesc);
 	crit_exit();
@@ -874,8 +764,7 @@ inthand_add(const char *name, int irq, inthand2_t handler, void *arg,
 
 /*
  * Deactivate and remove the interrupt handler descriptor data connected
- * created by an earlier call of intr_connect() from the linked list and
- * adjust theinterrupt masks if necessary.
+ * created by an earlier call of intr_connect() from the linked list.
  *
  * Return the memory held by the interrupt handler descriptor data structure
  * to the system. Make sure, the handler is not actively used anymore, before.
@@ -926,10 +815,9 @@ inthand_remove(intrec *idesc)
 		 * This irq is no longer shared
 		 */
 		icu_unset(irq, intr_mux);
-		icu_setup(irq, head->handler, head->argument, head->maskptr, head->flags);
+		icu_setup(irq, head->handler, head->argument, head->flags);
 		update_intrname(irq, head->name);
 	}
-	update_masks(idesc->maskptr, irq);
 	crit_exit();
 	free(idesc, M_DEVBUF);
 
diff --git a/sys/i386/isa/intr_machdep.h b/sys/i386/isa/intr_machdep.h
index b6231a451d..fd1858d75b 100644
--- a/sys/i386/isa/intr_machdep.h
+++ b/sys/i386/isa/intr_machdep.h
@@ -31,7 +31,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/isa/intr_machdep.h,v 1.19.2.2 2001/10/14 20:05:50 luigi Exp $
- * $DragonFly: src/sys/i386/isa/Attic/intr_machdep.h,v 1.14 2005/05/24 20:59:05 dillon Exp $
+ * $DragonFly: src/sys/i386/isa/Attic/intr_machdep.h,v 1.15 2005/06/16 21:12:47 dillon Exp $
  */
 
 #ifndef _I386_ISA_INTR_MACHDEP_H_
@@ -149,7 +149,6 @@ typedef void unpendhand_t(void);
 
 extern u_long *intr_countp[];	/* pointers into intrcnt[] */
 extern inthand2_t *intr_handler[];	/* C entry points for FAST ints */
-extern u_int intr_mask[];	/* sets of intrs masked during handling of 1 */
 extern void *intr_unit[];	/* cookies to pass to intr handlers */
 
 inthand_t
@@ -212,19 +211,16 @@ inthand_t
 void	call_fast_unpend(int irq);
 void	isa_defaultirq (void);
 int	isa_nmi (int cd);
-int	icu_setup (int intr, inthand2_t *func, void *arg, 
-		       u_int *maskptr, int flags);
+int	icu_setup (int intr, inthand2_t *func, void *arg, int flags);
 int	icu_unset (int intr, inthand2_t *handler);
 void	icu_reinit (void);
-int	update_intr_masks (void);
 
 /*
  * WARNING: These are internal functions and not to be used by device drivers!
  * They are subject to change without notice. 
  */
 struct intrec *inthand_add(const char *name, int irq, inthand2_t handler,
-			   void *arg, intrmask_t *maskptr, int flags,
-			   lwkt_serialize_t serializer);
+			   void *arg, int flags, lwkt_serialize_t serializer);
 
 int inthand_remove(struct intrec *idesc);
 void forward_fastint_remote(void *arg);
diff --git a/sys/i386/isa/ipl.s b/sys/i386/isa/ipl.s
index 851c15f673..2283eb6f8c 100644
--- a/sys/i386/isa/ipl.s
+++ b/sys/i386/isa/ipl.s
@@ -37,7 +37,7 @@
  *	@(#)ipl.s
  *
  * $FreeBSD: src/sys/i386/isa/ipl.s,v 1.32.2.3 2002/05/16 16:03:56 bde Exp $
- * $DragonFly: src/sys/i386/isa/Attic/ipl.s,v 1.17 2004/03/30 19:14:08 dillon Exp $
+ * $DragonFly: src/sys/i386/isa/Attic/ipl.s,v 1.18 2005/06/16 21:12:47 dillon Exp $
  */
 
 
@@ -45,30 +45,9 @@
  * AT/386
  * Vector interrupt control section
  *
- *  *_imask	- Interrupt masks for various spl*() functions
  *  ipending	- Pending interrupts (set when a masked interrupt occurs)
  */
 
-	.data
-	ALIGN_DATA
-
-/* current priority (all off) */
-
-	.globl	tty_imask
-tty_imask:	.long	SWI_TTY_MASK
-	.globl	bio_imask
-bio_imask:	.long	SWI_CLOCK_MASK | SWI_CAMBIO_MASK
-	.globl	net_imask
-net_imask:	.long	SWI_NET_MASK | SWI_CAMNET_MASK
-	.globl	cam_imask
-cam_imask:	.long	SWI_CAMBIO_MASK | SWI_CAMNET_MASK
-	.globl	soft_imask
-soft_imask:	.long	SWI_MASK
-	.globl	softnet_imask
-softnet_imask:	.long	SWI_NET_MASK
-	.globl	softtty_imask
-softtty_imask:	.long	SWI_TTY_MASK
-
 	.text
 	/*
 	 * GENERAL NOTES
@@ -101,23 +80,27 @@ softtty_imask:	.long	SWI_TTY_MASK
 	 * If we are in a critical section we cannot run any pending ints
 	 * nor can be play with mp_lock.
 	 *
+	 * NOTE: Since SPLs no longer exist, all callers of this function
+	 * push $0 for the CPL.  HOWEVER, we *STILL* use the cpl mask within
+	 * this function to mark fast interrupts which could not be dispatched
+	 * do to the unavailability of the BGL.
 	 */
 	SUPERALIGN_TEXT
 	.type	doreti,@function
 doreti:
 	FAKE_MCOUNT(bintr)		/* init "from" bintr -> doreti */
-	popl	%eax			/* cpl to restore */
+	popl	%eax			/* cpl to restore XXX */
+	movl	$0,%eax			/* irq mask unavailable due to BGL */
 	movl	PCPU(curthread),%ebx
 	cli				/* interlock with TDPRI_CRIT */
 	cmpl	$0,PCPU(reqflags)	/* short cut if nothing to do */
 	je	5f
-	movl	%eax,TD_CPL(%ebx)	/* save cpl being restored */
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) /* can't unpend if in critical sec */
 	jge	5f
 	addl	$TDPRI_CRIT,TD_PRI(%ebx) /* force all ints to pending */
 doreti_next:
 	sti				/* allow new interrupts */
-	movl	%eax,%ecx		/* cpl being restored */
+	movl	%eax,%ecx		/* irq mask unavailable due to BGL */
 	notl	%ecx
 	cli				/* disallow YYY remove */
 #ifdef SMP
@@ -143,11 +126,9 @@ doreti_next:
 2:
 	/*
 	 * Nothing left to do, finish up.  Interrupts are still disabled.
-	 * If our temporary cpl mask is 0 then we have processed all pending
-	 * fast and normal ints including those requiring the MP lock,
-	 * and we have processed as many of the reqflags as possible based
-	 * on whether we came from user mode or not.   So if %eax is 0 we
-	 * can clear the interrupt-related reqflags.
+	 * %eax contains the mask of IRQ's that are not available due to
+	 * BGL requirements.  We can only clear RQF_INTPEND if *ALL* pending
+	 * interrupts have been processed.
 	 */
 	subl	$TDPRI_CRIT,TD_PRI(%ebx)	/* interlocked with cli */
 	testl	%eax,%eax
@@ -191,7 +172,8 @@ doreti_popl_fs_fault:
 	jmp	alltraps_with_regs_pushed
 
 	/*
-	 * FAST interrupt pending
+	 * FAST interrupt pending.  NOTE: stack context holds frame structure
+	 * for fast interrupt procedure, do not do random pushes or pops!
 	 */
 	ALIGN_TEXT
 doreti_fast:
@@ -199,7 +181,8 @@ doreti_fast:
 	bsfl	%ecx, %ecx		/* locate the next dispatchable int */
 	btrl	%ecx, PCPU(fpending)	/* is it really still pending? */
 	jnc	doreti_next
-	pushl	%eax			/* YYY cpl (expected by frame) */
+	pushl	%eax			/* save IRQ mask unavailable for BGL */
+					/* NOTE: is also CPL in frame */
 #ifdef SMP
 	pushl	%ecx			/* save ecx */
 	call	try_mplock
@@ -272,13 +255,14 @@ doreti_ast:
 	 * IPIQ message pending.  We clear RQF_IPIQ automatically.
 	 */
 doreti_ipiq:
+	movl	%eax,%esi		/* save cpl (can't use stack) */
 	incl	PCPU(intr_nesting_level)
 	andl	$~RQF_IPIQ,PCPU(reqflags)
 	subl	$8,%esp			/* add dummy vec and ppl */
 	call	lwkt_process_ipiq_frame
 	addl	$8,%esp
 	decl	PCPU(intr_nesting_level)
-	movl	TD_CPL(%ebx),%eax	/* retrieve cpl again for loop */
+	movl	%esi,%eax		/* restore cpl for loop */
 	jmp	doreti_next
 
 #endif
@@ -288,8 +272,8 @@ doreti_ipiq:
 	 *	  interrupts regardless of critical section nesting.  ASTs
 	 *	  are not dispatched.
 	 *
-	 *	YYY at the moment I leave us in a critical section so as
-	 *	not to have to mess with the cpls which will soon be obsolete.
+	 * 	  Use %eax to track those IRQs that could not be processed
+	 *	  due to BGL requirements.
 	 */
 	SUPERALIGN_TEXT
 
@@ -297,8 +281,8 @@ ENTRY(splz)
 	pushfl
 	pushl	%ebx
 	movl	PCPU(curthread),%ebx
-	movl	TD_CPL(%ebx),%eax
 	addl	$TDPRI_CRIT,TD_PRI(%ebx)
+	movl	$0,%eax
 
 splz_next:
 	cli
@@ -318,9 +302,9 @@ splz_next:
 
 	/*
 	 * Nothing left to do, finish up.  Interrupts are still disabled.
-	 * If our temporary cpl mask is 0 then we have processed everything
-	 * (including any pending fast ints requiring the MP lock), and
-	 * we can clear RQF_INTPEND.
+	 * If our mask of IRQs we couldn't process due to BGL requirements
+	 * is 0 then there are no pending interrupt sources left and we
+	 * can clear RQF_INTPEND.
 	 */
 	testl	%eax,%eax
 	jnz	5f
diff --git a/sys/i386/isa/ipl_funcs.c b/sys/i386/isa/ipl_funcs.c
index c04c849c6d..731f9bb792 100644
--- a/sys/i386/isa/ipl_funcs.c
+++ b/sys/i386/isa/ipl_funcs.c
@@ -24,7 +24,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/isa/ipl_funcs.c,v 1.32.2.5 2002/12/17 18:04:02 sam Exp $
- * $DragonFly: src/sys/i386/isa/Attic/ipl_funcs.c,v 1.9 2005/06/10 23:59:28 dillon Exp $
+ * $DragonFly: src/sys/i386/isa/Attic/ipl_funcs.c,v 1.10 2005/06/16 21:12:47 dillon Exp $
  */
 
 #include <sys/param.h>
@@ -77,112 +77,3 @@ softclockpending(void)
 	return ((mdcpu->gd_ipending | mdcpu->gd_fpending) & SWI_CLOCK_PENDING);
 }
 
-/*
- * Support for SPL assertions.
- */
-
-/************************************************************************
- *			GENERAL SPL CODE				*
- ************************************************************************
- *
- *  Implement splXXX(), spl0(), splx(), and splq().  splXXX() disables a
- *  set of interrupts (e.g. splbio() disables interrupts relating to 
- *  device I/O) and returns the previous interrupt mask.  splx() restores
- *  the previous interrupt mask, spl0() is a special case which enables
- *  all interrupts and is typically used inside i386/i386 swtch.s and
- *  fork_trampoline.  splq() is a generic version of splXXX().
- *
- *  The SPL routines mess around with the 'cpl' global, which masks 
- *  interrupts.  Interrupts are not *actually* masked.  What happens is 
- *  that if an interrupt masked by the cpl occurs, the appropriate bit
- *  in '*pending' is set and the interrupt is defered.  When we clear
- *  bits in the cpl we must check to see if any *pending interrupts have
- *  been unmasked and issue the synchronously, which is what the splz()
- *  call does.
- *
- *  Because the cpl is often saved and restored in a nested fashion, cpl
- *  modifications are only allowed in the SMP case when the MP lock is held
- *  to prevent multiple processes from tripping over each other's masks.
- *  The cpl is saved when you do a context switch (mi_switch()) and restored
- *  when your process gets cpu again.
- *
- *  An interrupt routine is allowed to modify the cpl as long as it restores
- *  it prior to returning (thus the interrupted mainline code doesn't notice
- *  anything amiss).  For the SMP case, the interrupt routine must hold 
- *  the MP lock for any cpl manipulation.
- *
- *  Likewise, due to the deterministic nature of cpl modifications, we do
- *  NOT need to use locked instructions to modify it.
- */
-
-#define	GENSPL(NAME, OP, MODIFIER, PC)		\
-unsigned NAME(void)				\
-{						\
-	unsigned x;				\
-	struct thread *td = curthread;		\
-						\
-	x = td->td_cpl;				\
-	td->td_cpl OP MODIFIER;			\
-	return (x);				\
-}
-
-/*
- * Note: we do not have to check td->td_nest_count in these functions, only
- * whether we are in a critical section or not.
- */
-void
-spl0(void)
-{
-	struct mdglobaldata *gd = mdcpu;
-	struct thread *td = gd->mi.gd_curthread;
-
-	td->td_cpl = 0;
-	if ((gd->gd_ipending || gd->gd_fpending) && td->td_pri < TDPRI_CRIT)
-		splz();
-}
-
-void
-splx(unsigned ipl)
-{
-	struct mdglobaldata *gd = mdcpu;
-	struct thread *td = gd->mi.gd_curthread;
-
-	td->td_cpl = ipl;
-	if (((gd->gd_ipending | gd->gd_fpending) & ~ipl) &&
-	    td->td_pri < TDPRI_CRIT) {
-		splz();
-	}
-}
-
-intrmask_t
-splq(intrmask_t mask)
-{ 
-	struct mdglobaldata *gd = mdcpu;
-	struct thread *td = gd->mi.gd_curthread;
-	intrmask_t tmp;
-
-	tmp = td->td_cpl;
-	td->td_cpl |= mask;
-	return (tmp);
-}       
-
-/* Finally, generate the actual spl*() functions */
-
-/*    NAME:            OP:     MODIFIER:				PC: */
-GENSPL(splbio,		|=,	bio_imask,				2)
-GENSPL(splcam,		|=,	cam_imask,				7)
-GENSPL(splclock,	 =,	HWI_MASK | SWI_MASK,			3)
-GENSPL(splhigh,		 =,	HWI_MASK | SWI_MASK,			4)
-GENSPL(splimp,		|=,	net_imask,				5)
-GENSPL(splnet,		|=,	SWI_NET_MASK,				6)
-GENSPL(splsoftcam,	|=,	SWI_CAMBIO_MASK | SWI_CAMNET_MASK,	8)
-GENSPL(splsoftcambio,	|=,	SWI_CAMBIO_MASK,			9)
-GENSPL(splsoftcamnet, 	|=,	SWI_CAMNET_MASK,			10)
-GENSPL(splsoftclock,	 =,	SWI_CLOCK_MASK,				11)
-GENSPL(splsofttty,	|=,	SWI_TTY_MASK,				12)
-GENSPL(splsoftvm,	|=,	SWI_VM_MASK,				16)
-GENSPL(splsofttq,	|=,	SWI_TQ_MASK,				17)
-GENSPL(splstatclock,	|=,	stat_imask,				13)
-GENSPL(spltty,		|=,	tty_imask,				14)
-GENSPL(splvm,		|=,	net_imask | bio_imask | cam_imask,	15)
-GENSPL(splcrypto,	|=,	net_imask | SWI_NET_MASK | SWI_CRYPTO_MASK,16)
diff --git a/sys/i386/isa/npx.c b/sys/i386/isa/npx.c
index fbe48418cc..2ac3143b6d 100644
--- a/sys/i386/isa/npx.c
+++ b/sys/i386/isa/npx.c
@@ -33,7 +33,7 @@
  *
  *	from: @(#)npx.c	7.2 (Berkeley) 5/12/91
  * $FreeBSD: src/sys/i386/isa/npx.c,v 1.80.2.3 2001/10/20 19:04:38 tegge Exp $
- * $DragonFly: src/sys/i386/isa/Attic/npx.c,v 1.23 2005/05/24 20:59:05 dillon Exp $
+ * $DragonFly: src/sys/i386/isa/Attic/npx.c,v 1.24 2005/06/16 21:12:47 dillon Exp $
  */
 
 #include "opt_cpu.h"
@@ -160,7 +160,7 @@ SYSCTL_INT(_kern, OID_AUTO, mmxopt, CTLFLAG_RD, &mmxopt, 0,
 #endif
 
 #ifndef SMP
-static	u_int			npx0_imask = SWI_CLOCK_MASK;
+static	u_int			npx0_imask;
 static	struct gate_descriptor	npx_idt_probeintr;
 static	int			npx_intrno;
 static	volatile u_int		npx_intrs_while_probing;
diff --git a/sys/kern/kern_intr.c b/sys/kern/kern_intr.c
index 40b3998079..cf03b1655e 100644
--- a/sys/kern/kern_intr.c
+++ b/sys/kern/kern_intr.c
@@ -24,7 +24,7 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/kern/kern_intr.c,v 1.24.2.1 2001/10/14 20:05:50 luigi Exp $
- * $DragonFly: src/sys/kern/kern_intr.c,v 1.21 2005/06/06 15:02:27 dillon Exp $
+ * $DragonFly: src/sys/kern/kern_intr.c,v 1.22 2005/06/16 21:12:19 dillon Exp $
  *
  */
 
@@ -45,7 +45,6 @@
 typedef struct intrec {
     struct intrec *next;
     inthand2_t	*handler;
-    intrmask_t	*maskptr;	/* LEGACY */
     void	*argument;
     const char	*name;
     int		intr;
@@ -62,7 +61,6 @@ static u_int ill_delta[NHWI+NSWI];	/* track elapsed to calculate freq */
 static int ill_state[NHWI+NSWI];	/* current state */
 static struct systimer ill_timer[NHWI+NSWI];	/* enforced freq. timer */
 static struct systimer ill_rtimer[NHWI+NSWI];	/* recovery timer */
-static intrmask_t dummy_intr_mask;
 
 #define LIVELOCK_NONE		0
 #define LIVELOCK_LIMITED	1
@@ -78,22 +76,17 @@ static void ithread_handler(void *arg);
 
 /*
  * Register an SWI or INTerrupt handler.
- *
- * Note that maskptr exists to support legacy spl handling and is not intended
- * to be permanent (because spls are not compatible with BGL removal).
  */
 thread_t
-register_swi(int intr, inthand2_t *handler, void *arg, const char *name,
-	intrmask_t *maskptr)
+register_swi(int intr, inthand2_t *handler, void *arg, const char *name)
 {
     if (intr < NHWI || intr >= NHWI + NSWI)
 	panic("register_swi: bad intr %d", intr);
-    return(register_int(intr, handler, arg, name, maskptr));
+    return(register_int(intr, handler, arg, name));
 }
 
 thread_t
-register_int(int intr, inthand2_t *handler, void *arg, const char *name,
-	intrmask_t *maskptr)
+register_int(int intr, inthand2_t *handler, void *arg, const char *name)
 {
     intrec_t **list;
     intrec_t *rec;
@@ -101,14 +94,11 @@ register_int(int intr, inthand2_t *handler, void *arg, const char *name,
 
     if (intr < 0 || intr >= NHWI + NSWI)
 	panic("register_int: bad intr %d", intr);
-    if (maskptr == NULL)
-	maskptr = &dummy_intr_mask;
 
     rec = malloc(sizeof(intrec_t), M_DEVBUF, M_NOWAIT);
     if (rec == NULL)
 	panic("register_swi: malloc failed");
     rec->handler = handler;
-    rec->maskptr = maskptr;
     rec->argument = arg;
     rec->name = name;
     rec->intr = intr;
diff --git a/sys/kern/subr_taskqueue.c b/sys/kern/subr_taskqueue.c
index 76f574faaa..2dc60195bc 100644
--- a/sys/kern/subr_taskqueue.c
+++ b/sys/kern/subr_taskqueue.c
@@ -24,7 +24,7 @@
  * SUCH DAMAGE.
  *
  *	 $FreeBSD: src/sys/kern/subr_taskqueue.c,v 1.1.2.3 2003/09/10 00:40:39 ken Exp $
- *	$DragonFly: src/sys/kern/subr_taskqueue.c,v 1.6 2005/06/06 15:02:28 dillon Exp $
+ *	$DragonFly: src/sys/kern/subr_taskqueue.c,v 1.7 2005/06/16 21:12:19 dillon Exp $
  */
 
 #include <sys/param.h>
@@ -221,7 +221,7 @@ taskqueue_thread_enqueue(void *context)
 }
 
 TASKQUEUE_DEFINE(swi, taskqueue_swi_enqueue, 0,
-		 register_swi(SWI_TQ, taskqueue_swi_run, NULL, "swi_taskq", NULL));
+		 register_swi(SWI_TQ, taskqueue_swi_run, NULL, "swi_taskq"));
 TASKQUEUE_DEFINE(thread, taskqueue_thread_enqueue, 0,
 		 kthread_create(taskqueue_kthread, NULL,
 		 &taskqueue_thread_td, "taskqueue"));
diff --git a/sys/netgraph/tty/ng_tty.c b/sys/netgraph/tty/ng_tty.c
index 48efc1f582..e9ceb7da35 100644
--- a/sys/netgraph/tty/ng_tty.c
+++ b/sys/netgraph/tty/ng_tty.c
@@ -37,7 +37,7 @@
  * Author: Archie Cobbs <archie@freebsd.org>
  *
  * $FreeBSD: src/sys/netgraph/ng_tty.c,v 1.7.2.3 2002/02/13 00:43:12 dillon Exp $
- * $DragonFly: src/sys/netgraph/tty/ng_tty.c,v 1.10 2005/06/02 22:11:46 swildner Exp $
+ * $DragonFly: src/sys/netgraph/tty/ng_tty.c,v 1.11 2005/06/16 21:12:48 dillon Exp $
  * $Whistle: ng_tty.c,v 1.21 1999/11/01 09:24:52 julian Exp $
  */
 
@@ -654,20 +654,6 @@ ngt_mod_event(module_t mod, int event, void *data)
 
 	switch (event) {
 	case MOD_LOAD:
-#ifdef __i386__
-		/* Insure the soft net "engine" can't run during spltty code */
-		crit_enter();
-		tty_imask |= softnet_imask; /* spltty() block spl[soft]net() */
-		net_imask |= softtty_imask; /* splimp() block splsofttty() */
-		net_imask |= tty_imask;	    /* splimp() block spltty() */
-		update_intr_masks();
-		crit_exit();
-
-		if (bootverbose)
-			log(LOG_DEBUG, "new masks: bio %x, tty %x, net %x\n",
-			    bio_imask, tty_imask, net_imask);
-#endif
-
 		/* Register line discipline */
 		crit_enter();
 		if ((ngt_ldisc = ldisc_register(NETGRAPHDISC, &ngt_disc)) < 0) {
diff --git a/sys/opencrypto/crypto.c b/sys/opencrypto/crypto.c
index dc3145d103..c6cad1a549 100644
--- a/sys/opencrypto/crypto.c
+++ b/sys/opencrypto/crypto.c
@@ -1,5 +1,5 @@
 /*	$FreeBSD: src/sys/opencrypto/crypto.c,v 1.4.2.7 2003/06/03 00:09:02 sam Exp $	*/
-/*	$DragonFly: src/sys/opencrypto/crypto.c,v 1.8 2005/06/10 22:16:05 dillon Exp $	*/
+/*	$DragonFly: src/sys/opencrypto/crypto.c,v 1.9 2005/06/16 21:12:49 dillon Exp $	*/
 /*	$OpenBSD: crypto.c,v 1.38 2002/06/11 11:14:29 beck Exp $	*/
 /*
  * The author of this code is Angelos D. Keromytis (angelos@cis.upenn.edu)
@@ -156,7 +156,7 @@ crypto_init(void)
 	TAILQ_INIT(&crp_ret_q);
 	TAILQ_INIT(&crp_ret_kq);
 
-	register_swi(SWI_CRYPTO, cryptointr, NULL, "swi_crypto", NULL);
+	register_swi(SWI_CRYPTO, cryptointr, NULL, "swi_crypto");
 	error = kthread_create((void (*)(void *)) cryptoret, NULL,
 		    &cryptothread, "cryptoret");
 	if (error) {
diff --git a/sys/platform/pc32/apic/apic_vector.s b/sys/platform/pc32/apic/apic_vector.s
index 7230a2fb45..d5a52ef574 100644
--- a/sys/platform/pc32/apic/apic_vector.s
+++ b/sys/platform/pc32/apic/apic_vector.s
@@ -1,7 +1,7 @@
 /*
  *	from: vector.s, 386BSD 0.1 unknown origin
  * $FreeBSD: src/sys/i386/isa/apic_vector.s,v 1.47.2.5 2001/09/01 22:33:38 tegge Exp $
- * $DragonFly: src/sys/platform/pc32/apic/apic_vector.s,v 1.18 2004/02/21 06:37:08 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/apic/apic_vector.s,v 1.19 2005/06/16 21:12:47 dillon Exp $
  */
 
 
@@ -153,12 +153,10 @@ IDTVEC(vec_name) ;							\
 	MASK_LEVEL_IRQ(irq_num) ;					\
 	EOI_IRQ(irq_num) ;						\
 	movl	PCPU(curthread),%ebx ;					\
-	movl	TD_CPL(%ebx),%eax ;					\
+	movl	$0,%eax ;	/* CURRENT CPL IN FRAME (REMOVED) */	\
 	pushl	%eax ;							\
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) ;				\
-	jge	1f ;							\
-	testl	$IRQ_LBIT(irq_num), %eax ;				\
-	jz	2f ;							\
+	jl	2f ;							\
 1: ;									\
 	/* in critical section, make interrupt pending */		\
 	/* set the pending bit and return, leave interrupt masked */	\
@@ -266,12 +264,10 @@ IDTVEC(vec_name) ;							\
 	MASK_LEVEL_IRQ(irq_num) ;					\
 	EOI_IRQ(irq_num) ;						\
 	movl	PCPU(curthread),%ebx ;					\
-	movl	TD_CPL(%ebx),%eax ;					\
+	movl	$0,%eax ;	/* CURRENT CPL IN FRAME (REMOVED) */	\
 	pushl	%eax ;		/* cpl do restore */			\
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) ;				\
-	jge	1f ;							\
-	testl	$IRQ_LBIT(irq_num),%eax ;				\
-	jz	2f ;							\
+	jl	2f ;							\
 1: ;									\
 	/* set the pending bit and return, leave the interrupt masked */ \
 	orl	$IRQ_LBIT(irq_num), PCPU(ipending) ;			\
@@ -428,7 +424,7 @@ Xipiq:
 	subl	$TDPRI_CRIT,TD_PRI(%ebx)
 	decl	PCPU(intr_nesting_level)
 	addl	$8,%esp
-	pushl	TD_CPL(%ebx)
+	pushl	$0			/* CPL for frame (REMOVED) */
 	MEXITCOUNT
 	jmp	doreti
 1:
@@ -541,39 +537,6 @@ Xrendezvous:
 	
 	.data
 
-#if 0
-/*
- * Addresses of interrupt handlers.
- *  XresumeNN: Resumption addresses for HWIs.
- */
-	.globl _ihandlers
-_ihandlers:
-/*
- * used by:
- *  ipl.s:	doreti_unpend
- */
-	.long	Xresume0,  Xresume1,  Xresume2,  Xresume3 
-	.long	Xresume4,  Xresume5,  Xresume6,  Xresume7
-	.long	Xresume8,  Xresume9,  Xresume10, Xresume11
-	.long	Xresume12, Xresume13, Xresume14, Xresume15 
-	.long	Xresume16, Xresume17, Xresume18, Xresume19
-	.long	Xresume20, Xresume21, Xresume22, Xresume23
-/*
- * used by:
- *  ipl.s:	doreti_unpend
- *  apic_ipl.s:	splz_unpend
- */
-	.long	_swi_null, swi_net, _swi_null, _swi_null
-	.long	_swi_vm, _swi_null, _softclock
-
-imasks:				/* masks for interrupt handlers */
-	.space	NHWI*4		/* padding; HWI masks are elsewhere */
-
-	.long	SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
-	.long	SWI_VM_MASK, SWI_TQ_MASK, SWI_CLOCK_MASK
-#endif	/* 0 */
-
-
 #ifdef COUNT_XINVLTLB_HITS
 	.globl	xhits
 xhits:
diff --git a/sys/platform/pc32/i386/autoconf.c b/sys/platform/pc32/i386/autoconf.c
index c625ed4bf9..18fd706011 100644
--- a/sys/platform/pc32/i386/autoconf.c
+++ b/sys/platform/pc32/i386/autoconf.c
@@ -35,7 +35,7 @@
  *
  *	from: @(#)autoconf.c	7.1 (Berkeley) 5/9/91
  * $FreeBSD: src/sys/i386/i386/autoconf.c,v 1.146.2.2 2001/06/07 06:05:58 dd Exp $
- * $DragonFly: src/sys/platform/pc32/i386/autoconf.c,v 1.16 2005/06/06 15:02:26 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/i386/autoconf.c,v 1.17 2005/06/16 21:12:44 dillon Exp $
  */
 
 /*
@@ -169,12 +169,6 @@ configure(dummy)
 		isa_probe_children(isa_bus_device);
 #endif
 
-	/*
-	 * Now we're ready to handle (pending) interrupts.
-	 * XXX this is slightly misplaced.
-	 */
-	spl0();
-
 	/*
 	 * Allow lowering of the ipl to the lowest kernel level if we
 	 * panic (or call tsleep() before clearing `cold').  No level is
diff --git a/sys/platform/pc32/i386/exception.s b/sys/platform/pc32/i386/exception.s
index ceeba40a5e..6c03d3f902 100644
--- a/sys/platform/pc32/i386/exception.s
+++ b/sys/platform/pc32/i386/exception.s
@@ -31,7 +31,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/i386/exception.s,v 1.65.2.3 2001/08/15 01:23:49 peter Exp $
- * $DragonFly: src/sys/platform/pc32/i386/exception.s,v 1.23 2004/08/12 19:59:30 eirikn Exp $
+ * $DragonFly: src/sys/platform/pc32/i386/exception.s,v 1.24 2005/06/16 21:12:44 dillon Exp $
  */
 
 #include "use_npx.h"
@@ -721,8 +721,6 @@ IDTVEC(fpu)
 	mov	%ax,%fs
 	FAKE_MCOUNT(13*4(%esp))
 
-	movl	PCPU(curthread),%ebx		/* save original cpl */
-	movl	TD_CPL(%ebx), %ebx
 	incl	PCPU(cnt)+V_TRAP
 
 	/* additional dummy pushes to fake an interrupt frame */
@@ -734,7 +732,7 @@ IDTVEC(fpu)
 
 	/* convert back to a trapframe for doreti */
 	addl	$4,%esp
-	movl	%ebx,(%esp)
+	movl	$0,(%esp)		/* DUMMY CPL FOR DORETI */
 	MEXITCOUNT
 	jmp	doreti
 #else	/* NNPX > 0 */
@@ -774,8 +772,6 @@ alltraps_with_regs_pushed:
 calltrap:
 	FAKE_MCOUNT(btrap)		/* init "from" _btrap -> calltrap */
 	incl	PCPU(cnt)+V_TRAP
-	movl	PCPU(curthread),%eax	/* keep orig cpl here during call */
-	movl	TD_CPL(%eax),%ebx
 	/* warning, trap frame dummy arg, no extra reg pushes */
 	call	trap
 
@@ -783,7 +779,7 @@ calltrap:
 	 * Return via doreti to handle ASTs.  Have to change trap frame
 	 * to interrupt frame.
 	 */
-	pushl	%ebx			/* cpl to restore */
+	pushl	$0			/* DUMMY CPL FOR DORETI */
 	MEXITCOUNT
 	jmp	doreti
 
@@ -956,7 +952,6 @@ ENTRY(fork_trampoline)
 	/* cut from syscall */
 
 	sti
-	call	spl0
 	call	splz
 
 #if defined(INVARIANTS) && defined(SMP)
diff --git a/sys/platform/pc32/i386/genassym.c b/sys/platform/pc32/i386/genassym.c
index 4ce3b890e4..a489dc5134 100644
--- a/sys/platform/pc32/i386/genassym.c
+++ b/sys/platform/pc32/i386/genassym.c
@@ -35,7 +35,7 @@
  *
  *	from: @(#)genassym.c	5.11 (Berkeley) 5/10/91
  * $FreeBSD: src/sys/i386/i386/genassym.c,v 1.86.2.3 2002/03/03 05:42:49 nyan Exp $
- * $DragonFly: src/sys/platform/pc32/i386/genassym.c,v 1.41 2005/02/27 10:57:24 swildner Exp $
+ * $DragonFly: src/sys/platform/pc32/i386/genassym.c,v 1.42 2005/06/16 21:12:44 dillon Exp $
  */
 
 #include <sys/param.h>
@@ -96,7 +96,6 @@ ASSYM(MP_FREE_LOCK, MP_FREE_LOCK);
 
 ASSYM(RW_OWNER, offsetof(struct lwkt_rwlock, rw_owner));
 
-ASSYM(TD_CPL, offsetof(struct thread, td_mach) + offsetof(struct md_thread, mtd_cpl));
 ASSYM(TD_SAVEFPU, offsetof(struct thread, td_mach) + offsetof(struct md_thread, mtd_savefpu));
 
 ASSYM(TDPRI_CRIT, TDPRI_CRIT);
diff --git a/sys/platform/pc32/i386/machdep.c b/sys/platform/pc32/i386/machdep.c
index 1fa4e1c075..b3b1763376 100644
--- a/sys/platform/pc32/i386/machdep.c
+++ b/sys/platform/pc32/i386/machdep.c
@@ -36,7 +36,7 @@
  *
  *	from: @(#)machdep.c	7.4 (Berkeley) 6/3/91
  * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
- * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.73 2005/06/06 15:02:26 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.74 2005/06/16 21:12:44 dillon Exp $
  */
 
 #include "use_apm.h"
@@ -1872,7 +1872,6 @@ init386(int first)
 	thread0.td_flags |= TDF_RUNNING;
 	thread0.td_proc = &proc0;
 	thread0.td_switch = cpu_heavy_switch;	/* YYY eventually LWKT */
-	thread0.td_cpl = 0;			/* crit section protects us */
 	safepri = TDPRI_MAX;
 
 	/* make ldt memory segments */
diff --git a/sys/platform/pc32/i386/nexus.c b/sys/platform/pc32/i386/nexus.c
index 7fa0bb2350..5f60e2dc17 100644
--- a/sys/platform/pc32/i386/nexus.c
+++ b/sys/platform/pc32/i386/nexus.c
@@ -27,7 +27,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/i386/nexus.c,v 1.26.2.10 2003/02/22 13:16:45 imp Exp $
- * $DragonFly: src/sys/platform/pc32/i386/nexus.c,v 1.16 2005/06/11 09:03:49 swildner Exp $
+ * $DragonFly: src/sys/platform/pc32/i386/nexus.c,v 1.17 2005/06/16 21:12:44 dillon Exp $
  */
 
 /*
@@ -498,7 +498,6 @@ nexus_setup_intr(device_t bus, device_t child, struct resource *irq,
 		 int flags, void (*ihand)(void *), void *arg,
 		 void **cookiep, lwkt_serialize_t serializer)
 {
-	intrmask_t	*mask;
 	driver_t	*driver;
 	int	error, icflags;
 
@@ -513,34 +512,7 @@ nexus_setup_intr(device_t bus, device_t child, struct resource *irq,
 		icflags = INTR_EXCL;
 
 	driver = device_get_driver(child);
-	switch (flags & INTR_TYPE_MASK) {
-	case INTR_TYPE_AV:
-	case INTR_TYPE_TTY:
-		mask = &tty_imask;
-		break;
-	case INTR_TYPE_BIO:
-		mask = &bio_imask;
-		break;
-	case INTR_TYPE_NET:
-		mask = &net_imask;
-		break;
-	case INTR_TYPE_CAM:
-		mask = &cam_imask;
-		break;
-	case INTR_TYPE_CLK:
-		mask = NULL;
-		printf("nexus: Warning: do not know what imask to use for INTR_TYPE_CLK\n");
-		break;
-	case INTR_TYPE_MISC:
-		mask = NULL;
-		break;
-	default:
-		panic("still using grody create_intr interface");
-	}
-	if (serializer && mask != NULL) {
-		device_printf(child, "nexus_setup_intr: Warning, driver must set interrupt type to INTR_TYPE_MISC when using a serializer.\n");
-		mask = NULL;
-	}
+
 	if (flags & INTR_FAST)
 		icflags |= INTR_FAST;
 
@@ -552,7 +524,7 @@ nexus_setup_intr(device_t bus, device_t child, struct resource *irq,
 		return (error);
 
 	*cookiep = inthand_add(device_get_nameunit(child), irq->r_start,
-	    ihand, arg, mask, icflags, serializer);
+	    ihand, arg, icflags, serializer);
 	if (*cookiep == NULL)
 		error = EINVAL;	/* XXX ??? */
 
diff --git a/sys/platform/pc32/i386/trap.c b/sys/platform/pc32/i386/trap.c
index c4a29411ad..0dd6adbe41 100644
--- a/sys/platform/pc32/i386/trap.c
+++ b/sys/platform/pc32/i386/trap.c
@@ -36,7 +36,7 @@
  *
  *	from: @(#)trap.c	7.4 (Berkeley) 5/13/91
  * $FreeBSD: src/sys/i386/i386/trap.c,v 1.147.2.11 2003/02/27 19:09:59 luoqi Exp $
- * $DragonFly: src/sys/platform/pc32/i386/trap.c,v 1.56 2005/05/24 21:18:26 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/i386/trap.c,v 1.57 2005/06/16 21:12:44 dillon Exp $
  */
 
 /*
@@ -1099,17 +1099,6 @@ trap_fatal(frame, eva)
 	if (curthread->td_pri >= TDPRI_CRIT)
 		printf("(CRIT)");
 	printf("\n");
-	printf("interrupt mask		= ");
-	if ((curthread->td_cpl & net_imask) == net_imask)
-		printf("net ");
-	if ((curthread->td_cpl & tty_imask) == tty_imask)
-		printf("tty ");
-	if ((curthread->td_cpl & bio_imask) == bio_imask)
-		printf("bio ");
-	if ((curthread->td_cpl & cam_imask) == cam_imask)
-		printf("cam ");
-	if (curthread->td_cpl == 0)
-		printf("none");
 #ifdef SMP
 /**
  *  XXX FIXME:
diff --git a/sys/platform/pc32/i386/vm86bios.s b/sys/platform/pc32/i386/vm86bios.s
index 2811327003..f11df67d2f 100644
--- a/sys/platform/pc32/i386/vm86bios.s
+++ b/sys/platform/pc32/i386/vm86bios.s
@@ -24,7 +24,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/i386/vm86bios.s,v 1.15.2.1 2000/05/16 06:58:07 dillon Exp $
- * $DragonFly: src/sys/platform/pc32/i386/vm86bios.s,v 1.12 2004/04/30 00:59:52 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/i386/vm86bios.s,v 1.13 2005/06/16 21:12:44 dillon Exp $
  */
 
 #include <machine/asmacros.h>		/* miscellaneous asm macros */
@@ -138,7 +138,7 @@ ENTRY(vm86_bioscall)
 	 * Return via _doreti, restore the same cpl as our current cpl
 	 */
 	movl	PCPU(curthread),%eax
-	pushl	TD_CPL(%eax)
+	pushl	$0			/* DUMMY CPL FOR DORETI */
 	MEXITCOUNT
 	jmp	doreti
 
diff --git a/sys/platform/pc32/i386/vm_machdep.c b/sys/platform/pc32/i386/vm_machdep.c
index 3f48dd0716..21062c4f7f 100644
--- a/sys/platform/pc32/i386/vm_machdep.c
+++ b/sys/platform/pc32/i386/vm_machdep.c
@@ -39,7 +39,7 @@
  *	from: @(#)vm_machdep.c	7.3 (Berkeley) 5/13/91
  *	Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
  * $FreeBSD: src/sys/i386/i386/vm_machdep.c,v 1.132.2.9 2003/01/25 19:02:23 dillon Exp $
- * $DragonFly: src/sys/platform/pc32/i386/vm_machdep.c,v 1.35 2005/05/02 23:20:38 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/i386/vm_machdep.c,v 1.36 2005/06/16 21:12:44 dillon Exp $
  */
 
 #include "use_npx.h"
@@ -585,7 +585,7 @@ swi_vm(void *arg)
 static void
 swi_vm_setup(void *arg)
 {
-	register_swi(SWI_VM, swi_vm, NULL, "swi_vm", NULL);
+	register_swi(SWI_VM, swi_vm, NULL, "swi_vm");
 }
 
 SYSINIT(vm_setup, SI_SUB_CPU, SI_ORDER_ANY, swi_vm_setup, NULL);
diff --git a/sys/platform/pc32/icu/icu_vector.s b/sys/platform/pc32/icu/icu_vector.s
index c6306e371d..3341e19a5f 100644
--- a/sys/platform/pc32/icu/icu_vector.s
+++ b/sys/platform/pc32/icu/icu_vector.s
@@ -1,7 +1,7 @@
 /*
  *	from: vector.s, 386BSD 0.1 unknown origin
  * $FreeBSD: src/sys/i386/isa/icu_vector.s,v 1.14.2.2 2000/07/18 21:12:42 dfr Exp $
- * $DragonFly: src/sys/platform/pc32/icu/icu_vector.s,v 1.17 2005/02/27 12:44:43 asmodai Exp $
+ * $DragonFly: src/sys/platform/pc32/icu/icu_vector.s,v 1.18 2005/06/16 21:12:47 dillon Exp $
  */
 
 #define ICU_IMR_OFFSET		1	/* IO_ICU{1,2} + 1 */
@@ -113,12 +113,9 @@ IDTVEC(vec_name) ; 							\
 	MASK_IRQ(icu, irq_num) ;					\
 	enable_icus ;							\
 	movl	PCPU(curthread),%ebx ;					\
-	movl	TD_CPL(%ebx),%eax ;	/* save the cpl for doreti */	\
-	pushl	%eax ;							\
+	pushl	$0 ;			/* DUMMY CPL FOR DORETI */	\
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) ;				\
-	jge	1f ;							\
-	testl	$IRQ_LBIT(irq_num), %eax ;				\
-	jz	2f ;							\
+	jl	2f ;							\
 1: ;									\
 	/* set pending bit and return, leave interrupt masked */	\
 	orl	$IRQ_LBIT(irq_num),PCPU(fpending) ;			\
@@ -207,12 +204,9 @@ IDTVEC(vec_name) ; 							\
 	MASK_IRQ(icu, irq_num) ;					\
 	enable_icus ;							\
 	movl	PCPU(curthread),%ebx ;					\
-	movl	TD_CPL(%ebx), %eax ;					\
-	pushl	%eax ;		/* push CPL for doreti */		\
+	pushl	$0 ;			/* DUMMY CPL FOR DORETI */	\
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) ;				\
-	jge	1f ;							\
-	testl	$IRQ_LBIT(irq_num), %eax ;				\
-	jz	2f ;							\
+	jl	2f ;							\
 1: ;									\
 	/* set the pending bit and return, leave interrupt masked */	\
 	orl	$IRQ_LBIT(irq_num), PCPU(ipending) ;			\
diff --git a/sys/platform/pc32/include/ipl.h b/sys/platform/pc32/include/ipl.h
index 5b39b64028..edc1e401c9 100644
--- a/sys/platform/pc32/include/ipl.h
+++ b/sys/platform/pc32/include/ipl.h
@@ -31,7 +31,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/include/ipl.h,v 1.17.2.3 2002/12/17 18:04:02 sam Exp $
- * $DragonFly: src/sys/platform/pc32/include/ipl.h,v 1.5 2003/07/12 17:54:34 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/include/ipl.h,v 1.6 2005/06/16 21:12:46 dillon Exp $
  */
 
 #ifndef _MACHINE_IPL_H_
@@ -70,49 +70,8 @@
 #define	SWI_TQ_PENDING		(1 << SWI_TQ)
 #define	SWI_CLOCK_PENDING	(1 << SWI_CLOCK)
 
-/*
- * Corresponding interrupt-disable masks for cpl.  The ordering is now by
- * inclusion (where each mask is considered as a set of bits).  Everything
- * except SWI_CLOCK_MASK includes SWI_LOW_MASK so that softclock() and low
- * priority swi's don't run while other swi handlers are running and timeout
- * routines can call swi handlers.  SWI_TTY_MASK includes SWI_NET_MASK in
- * case tty interrupts are processed at splsofttty() for a tty that is in
- * SLIP or PPP line discipline (this is weaker than merging net_imask with
- * tty_imask in isa.c - splimp() must mask hard and soft tty interrupts, but
- * spltty() apparently only needs to mask soft net interrupts).
- */
-#define	SWI_TTY_MASK	(SWI_TTY_PENDING | SWI_LOW_MASK | SWI_NET_MASK)
-#define	SWI_CAMNET_MASK	(SWI_CAMNET_PENDING | SWI_LOW_MASK)
-#define	SWI_CRYPTO_MASK	SWI_CAMNET_MASK
-#define	SWI_CAMBIO_MASK	(SWI_CAMBIO_PENDING | SWI_LOW_MASK)
-#define	SWI_NET_MASK	(SWI_NET_PENDING | SWI_LOW_MASK)
-#define	SWI_VM_MASK	(SWI_VM_PENDING | SWI_LOW_MASK)
-#define	SWI_TQ_MASK	(SWI_TQ_PENDING | SWI_LOW_MASK)
-#define	SWI_CLOCK_MASK	SWI_CLOCK_PENDING
-#define	SWI_LOW_MASK	(SWI_TQ_PENDING | SWI_CLOCK_MASK)
-#define	SWI_MASK	(~HWI_MASK)
-
 #ifndef	LOCORE
 
-/*
- * cpl is preserved by interrupt handlers so it is effectively nonvolatile.
- * ipending and idelayed are changed by interrupt handlers so they are
- * volatile.
- */
-#ifdef notyet /* in <sys/interrupt.h> until pci drivers stop hacking on them */
-extern	unsigned bio_imask;	/* group of interrupts masked with splbio() */
-#endif
-#ifdef SMP
-extern	unsigned cil;		/* current INTerrupt level mask */
-#endif
-extern	volatile unsigned idelayed;	/* interrupts to become pending */
-extern	volatile unsigned ipending;	/* active interrupts masked by cpl */
-#ifdef notyet /* in <sys/systm.h> until pci drivers stop hacking on them */
-extern	unsigned net_imask;	/* group of interrupts masked with splimp() */
-extern	unsigned stat_imask;	/* interrupts masked with splstatclock() */
-extern	unsigned tty_imask;	/* group of interrupts masked with spltty() */
-#endif
-
 #endif /* !LOCORE */
 
 #endif /* !_MACHINE_IPL_H_ */
diff --git a/sys/platform/pc32/include/thread.h b/sys/platform/pc32/include/thread.h
index fa2d0c8b6e..c7e5b3be74 100644
--- a/sys/platform/pc32/include/thread.h
+++ b/sys/platform/pc32/include/thread.h
@@ -33,7 +33,7 @@
  * 
  *	Machine independant code should not directly include this file.
  *
- * $DragonFly: src/sys/platform/pc32/include/thread.h,v 1.12 2005/04/11 11:00:40 hmp Exp $
+ * $DragonFly: src/sys/platform/pc32/include/thread.h,v 1.13 2005/06/16 21:12:46 dillon Exp $
  */
 
 #ifndef	_MACHINE_THREAD_H_
@@ -44,14 +44,13 @@
 union savefpu;
 
 struct md_thread {
-    unsigned int	mtd_cpl;
+    unsigned int	mtd_unused;	/* used to be mtd_cpl */
     union savefpu	*mtd_savefpu;
     struct segment_descriptor mtd_tls[NGTLS];
 };
 
 #ifdef _KERNEL
 
-#define td_cpl		td_mach.mtd_cpl
 #define td_savefpu	td_mach.mtd_savefpu
 #define td_tls		td_mach.mtd_tls
 
diff --git a/sys/platform/pc32/isa/apic_vector.s b/sys/platform/pc32/isa/apic_vector.s
index 7bba24bd54..6da8c5eb01 100644
--- a/sys/platform/pc32/isa/apic_vector.s
+++ b/sys/platform/pc32/isa/apic_vector.s
@@ -1,7 +1,7 @@
 /*
  *	from: vector.s, 386BSD 0.1 unknown origin
  * $FreeBSD: src/sys/i386/isa/apic_vector.s,v 1.47.2.5 2001/09/01 22:33:38 tegge Exp $
- * $DragonFly: src/sys/platform/pc32/isa/Attic/apic_vector.s,v 1.18 2004/02/21 06:37:08 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/isa/Attic/apic_vector.s,v 1.19 2005/06/16 21:12:47 dillon Exp $
  */
 
 
@@ -153,12 +153,10 @@ IDTVEC(vec_name) ;							\
 	MASK_LEVEL_IRQ(irq_num) ;					\
 	EOI_IRQ(irq_num) ;						\
 	movl	PCPU(curthread),%ebx ;					\
-	movl	TD_CPL(%ebx),%eax ;					\
+	movl	$0,%eax ;	/* CURRENT CPL IN FRAME (REMOVED) */	\
 	pushl	%eax ;							\
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) ;				\
-	jge	1f ;							\
-	testl	$IRQ_LBIT(irq_num), %eax ;				\
-	jz	2f ;							\
+	jl	2f ;							\
 1: ;									\
 	/* in critical section, make interrupt pending */		\
 	/* set the pending bit and return, leave interrupt masked */	\
@@ -266,12 +264,10 @@ IDTVEC(vec_name) ;							\
 	MASK_LEVEL_IRQ(irq_num) ;					\
 	EOI_IRQ(irq_num) ;						\
 	movl	PCPU(curthread),%ebx ;					\
-	movl	TD_CPL(%ebx),%eax ;					\
+	movl	$0,%eax ;	/* CURRENT CPL IN FRAME (REMOVED) */	\
 	pushl	%eax ;		/* cpl do restore */			\
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) ;				\
-	jge	1f ;							\
-	testl	$IRQ_LBIT(irq_num),%eax ;				\
-	jz	2f ;							\
+	jl	2f ;							\
 1: ;									\
 	/* set the pending bit and return, leave the interrupt masked */ \
 	orl	$IRQ_LBIT(irq_num), PCPU(ipending) ;			\
@@ -428,7 +424,7 @@ Xipiq:
 	subl	$TDPRI_CRIT,TD_PRI(%ebx)
 	decl	PCPU(intr_nesting_level)
 	addl	$8,%esp
-	pushl	TD_CPL(%ebx)
+	pushl	$0			/* CPL for frame (REMOVED) */
 	MEXITCOUNT
 	jmp	doreti
 1:
@@ -541,39 +537,6 @@ Xrendezvous:
 	
 	.data
 
-#if 0
-/*
- * Addresses of interrupt handlers.
- *  XresumeNN: Resumption addresses for HWIs.
- */
-	.globl _ihandlers
-_ihandlers:
-/*
- * used by:
- *  ipl.s:	doreti_unpend
- */
-	.long	Xresume0,  Xresume1,  Xresume2,  Xresume3 
-	.long	Xresume4,  Xresume5,  Xresume6,  Xresume7
-	.long	Xresume8,  Xresume9,  Xresume10, Xresume11
-	.long	Xresume12, Xresume13, Xresume14, Xresume15 
-	.long	Xresume16, Xresume17, Xresume18, Xresume19
-	.long	Xresume20, Xresume21, Xresume22, Xresume23
-/*
- * used by:
- *  ipl.s:	doreti_unpend
- *  apic_ipl.s:	splz_unpend
- */
-	.long	_swi_null, swi_net, _swi_null, _swi_null
-	.long	_swi_vm, _swi_null, _softclock
-
-imasks:				/* masks for interrupt handlers */
-	.space	NHWI*4		/* padding; HWI masks are elsewhere */
-
-	.long	SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
-	.long	SWI_VM_MASK, SWI_TQ_MASK, SWI_CLOCK_MASK
-#endif	/* 0 */
-
-
 #ifdef COUNT_XINVLTLB_HITS
 	.globl	xhits
 xhits:
diff --git a/sys/platform/pc32/isa/clock.c b/sys/platform/pc32/isa/clock.c
index 126df83b0f..dfa32b89aa 100644
--- a/sys/platform/pc32/isa/clock.c
+++ b/sys/platform/pc32/isa/clock.c
@@ -35,7 +35,7 @@
  *
  *	from: @(#)clock.c	7.2 (Berkeley) 5/12/91
  * $FreeBSD: src/sys/i386/isa/clock.c,v 1.149.2.6 2002/11/02 04:41:50 iwasaki Exp $
- * $DragonFly: src/sys/platform/pc32/isa/clock.c,v 1.30 2005/06/11 09:03:49 swildner Exp $
+ * $DragonFly: src/sys/platform/pc32/isa/clock.c,v 1.31 2005/06/16 21:12:47 dillon Exp $
  */
 
 /*
@@ -118,7 +118,6 @@ int	adjkerntz;		/* local offset from GMT in seconds */
 int	disable_rtc_set;	/* disable resettodr() if != 0 */
 volatile u_int	idelayed;
 int	statclock_disable = 1;	/* we don't use the statclock right now */
-u_int	stat_imask = SWI_CLOCK_MASK;
 u_int	tsc_freq;
 int	tsc_is_broken;
 int	wall_cmos_clock;	/* wall CMOS clock assumed if != 0 */
@@ -129,7 +128,6 @@ enum tstate timer1_state;
 enum tstate timer2_state;
 
 static	int	beeping = 0;
-static	u_int	clk_imask = HWI_MASK | SWI_MASK;
 static	const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
 static	u_char	rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
 static	u_char	rtc_statusb = RTCSB_24HR | RTCSB_PINTR;
@@ -945,7 +943,6 @@ cpu_initclocks()
 		 * flag which would normally cause the RTC to generate
 		 * interrupts.
 		 */
-		stat_imask = HWI_MASK | SWI_MASK;
 		rtc_statusb = RTCSB_24HR;
 	} else {
 	        /* Setting stathz to nonzero early helps avoid races. */
@@ -971,12 +968,12 @@ cpu_initclocks()
 	}
 
 	clkdesc = inthand_add("clk", apic_8254_intr, (inthand2_t *)clkintr,
-			      NULL, &clk_imask, INTR_EXCL | INTR_FAST, NULL);
+			      NULL, INTR_EXCL | INTR_FAST, NULL);
 	INTREN(1 << apic_8254_intr);
 	
 #else /* APIC_IO */
 
-	inthand_add("clk", 0, (inthand2_t *)clkintr, NULL, &clk_imask,
+	inthand_add("clk", 0, (inthand2_t *)clkintr, NULL,
 		    INTR_EXCL | INTR_FAST, NULL);
 	INTREN(IRQ0);
 
@@ -996,7 +993,7 @@ cpu_initclocks()
 			panic("APIC RTC != 8");
 #endif /* APIC_IO */
 
-		inthand_add("rtc", 8, (inthand2_t *)rtcintr, NULL, &stat_imask,
+		inthand_add("rtc", 8, (inthand2_t *)rtcintr, NULL,
 			    INTR_EXCL | INTR_FAST, NULL);
 
 #ifdef APIC_IO
@@ -1052,7 +1049,7 @@ cpu_initclocks()
 			setup_8254_mixed_mode();
 			inthand_add("clk", apic_8254_intr,
 				    (inthand2_t *)clkintr,
-				    NULL, &clk_imask, 
+				    NULL,
 				    INTR_EXCL | INTR_FAST, NULL);
 			INTREN(1 << apic_8254_intr);
 		}
diff --git a/sys/platform/pc32/isa/icu_vector.s b/sys/platform/pc32/isa/icu_vector.s
index 1551a72ab2..a59725551e 100644
--- a/sys/platform/pc32/isa/icu_vector.s
+++ b/sys/platform/pc32/isa/icu_vector.s
@@ -1,7 +1,7 @@
 /*
  *	from: vector.s, 386BSD 0.1 unknown origin
  * $FreeBSD: src/sys/i386/isa/icu_vector.s,v 1.14.2.2 2000/07/18 21:12:42 dfr Exp $
- * $DragonFly: src/sys/platform/pc32/isa/Attic/icu_vector.s,v 1.17 2005/02/27 12:44:43 asmodai Exp $
+ * $DragonFly: src/sys/platform/pc32/isa/Attic/icu_vector.s,v 1.18 2005/06/16 21:12:47 dillon Exp $
  */
 
 #define ICU_IMR_OFFSET		1	/* IO_ICU{1,2} + 1 */
@@ -113,12 +113,9 @@ IDTVEC(vec_name) ; 							\
 	MASK_IRQ(icu, irq_num) ;					\
 	enable_icus ;							\
 	movl	PCPU(curthread),%ebx ;					\
-	movl	TD_CPL(%ebx),%eax ;	/* save the cpl for doreti */	\
-	pushl	%eax ;							\
+	pushl	$0 ;			/* DUMMY CPL FOR DORETI */	\
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) ;				\
-	jge	1f ;							\
-	testl	$IRQ_LBIT(irq_num), %eax ;				\
-	jz	2f ;							\
+	jl	2f ;							\
 1: ;									\
 	/* set pending bit and return, leave interrupt masked */	\
 	orl	$IRQ_LBIT(irq_num),PCPU(fpending) ;			\
@@ -207,12 +204,9 @@ IDTVEC(vec_name) ; 							\
 	MASK_IRQ(icu, irq_num) ;					\
 	enable_icus ;							\
 	movl	PCPU(curthread),%ebx ;					\
-	movl	TD_CPL(%ebx), %eax ;					\
-	pushl	%eax ;		/* push CPL for doreti */		\
+	pushl	$0 ;			/* DUMMY CPL FOR DORETI */	\
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) ;				\
-	jge	1f ;							\
-	testl	$IRQ_LBIT(irq_num), %eax ;				\
-	jz	2f ;							\
+	jl	2f ;							\
 1: ;									\
 	/* set the pending bit and return, leave interrupt masked */	\
 	orl	$IRQ_LBIT(irq_num), PCPU(ipending) ;			\
diff --git a/sys/platform/pc32/isa/intr_machdep.c b/sys/platform/pc32/isa/intr_machdep.c
index 2ff5df4f3f..2320141b73 100644
--- a/sys/platform/pc32/isa/intr_machdep.c
+++ b/sys/platform/pc32/isa/intr_machdep.c
@@ -35,7 +35,7 @@
  *
  *	from: @(#)isa.c	7.2 (Berkeley) 5/13/91
  * $FreeBSD: src/sys/i386/isa/intr_machdep.c,v 1.29.2.5 2001/10/14 06:54:27 luigi Exp $
- * $DragonFly: src/sys/platform/pc32/isa/intr_machdep.c,v 1.30 2005/06/11 09:03:49 swildner Exp $
+ * $DragonFly: src/sys/platform/pc32/isa/intr_machdep.c,v 1.31 2005/06/16 21:12:47 dillon Exp $
  */
 /*
  * This file contains an aggregated module marked:
@@ -115,9 +115,7 @@ inthand2_t *intr_handler[ICU_LEN*2] = {
 
 static struct md_intr_info {
     int		irq;
-    u_int	mask;
     int		mihandler_installed;
-    u_int	*maskp;
 } intr_info[ICU_LEN*2];
 
 static inthand_t *fastintr[ICU_LEN] = {
@@ -357,36 +355,6 @@ isa_irq_pending(void)
 }
 #endif
 
-int
-update_intr_masks(void)
-{
-	int intr, n=0;
-	u_int mask,*maskptr;
-
-	for (intr=0; intr < ICU_LEN; intr ++) {
-#if defined(APIC_IO)
-		/* no 8259 SLAVE to ignore */
-#else
-		if (intr==ICU_SLAVEID) continue;	/* ignore 8259 SLAVE output */
-#endif /* APIC_IO */
-		maskptr = intr_info[intr].maskp;
-		if (!maskptr)
-			continue;
-		*maskptr |= SWI_CLOCK_MASK | (1 << intr);
-		mask = *maskptr;
-		if (mask != intr_info[intr].mask) {
-#if 0
-			printf ("intr_mask[%2d] old=%08x new=%08x ptr=%p.\n",
-				intr, intr_info[intr].mask, mask, maskptr);
-#endif
-			intr_info[intr].mask = mask;
-			n++;
-		}
-
-	}
-	return (n);
-}
-
 static void
 update_intrname(int intr, char *name)
 {
@@ -441,7 +409,7 @@ found:
  * code ignores it for normal interrupts.
  */
 int
-icu_setup(int intr, inthand2_t *handler, void *arg, u_int *maskptr, int flags)
+icu_setup(int intr, inthand2_t *handler, void *arg, int flags)
 {
 #if defined(FAST_HI) && defined(APIC_IO)
 	int		select;		/* the select register is 8 bits */
@@ -449,7 +417,6 @@ icu_setup(int intr, inthand2_t *handler, void *arg, u_int *maskptr, int flags)
 	u_int32_t	value;		/* the window register is 32 bits */
 #endif /* FAST_HI */
 	u_long	ef;
-	u_int	mask = (maskptr ? *maskptr : 0);
 
 #if defined(APIC_IO)
 	if ((u_int)intr >= ICU_LEN)	/* no 8259 SLAVE to ignore */
@@ -464,8 +431,6 @@ icu_setup(int intr, inthand2_t *handler, void *arg, u_int *maskptr, int flags)
 	cpu_disable_intr();	/* YYY */
 	intr_handler[intr] = handler;
 	intr_unit[intr] = arg;
-	intr_info[intr].maskp = maskptr;
-	intr_info[intr].mask = mask | SWI_CLOCK_MASK | (1 << intr);
 #if 0
 	/* YYY  fast ints supported and mp protected but ... */
 	flags &= ~INTR_FAST;
@@ -538,8 +503,6 @@ icu_unset(intr, handler)
 	cpu_disable_intr();	/* YYY */
 	intr_countp[intr] = &intrcnt[1 + intr];
 	intr_handler[intr] = isa_strayintr;
-	intr_info[intr].maskp = NULL;
-	intr_info[intr].mask = HWI_MASK | SWI_MASK;
 	intr_unit[intr] = &intr_unit[intr];
 #ifdef FAST_HI_XXX
 	/* XXX how do I re-create dvp here? */
@@ -589,13 +552,11 @@ icu_unset(intr, handler)
  */
 
 typedef struct intrec {
-	intrmask_t      mask;
 	inthand2_t      *handler;
 	void            *argument;
 	struct intrec   *next;
 	char            *name;
 	int             intr;
-	intrmask_t      *maskptr;
 	int             flags;
 	lwkt_serialize_t serializer;
 	volatile int	in_handler;
@@ -641,69 +602,6 @@ intr_mux(void *arg)
 	}
 }
 
-static intrec*
-find_idesc(unsigned *maskptr, int irq)
-{
-	intrec *p = intreclist_head[irq];
-
-	while (p && p->maskptr != maskptr)
-		p = p->next;
-
-	return (p);
-}
-
-/*
- * Both the low level handler and the shared interrupt multiplexer
- * block out further interrupts as set in the handlers "mask", while
- * the handler is running. In fact *maskptr should be used for this
- * purpose, but since this requires one more pointer dereference on
- * each interrupt, we rather bother update "mask" whenever *maskptr
- * changes. The function "update_masks" should be called **after**
- * all manipulation of the linked list of interrupt handlers hung
- * off of intrdec_head[irq] is complete, since the chain of handlers
- * will both determine the *maskptr values and the instances of mask
- * that are fixed. This function should be called with the irq for
- * which a new handler has been add blocked, since the masks may not
- * yet know about the use of this irq for a device of a certain class.
- */
-
-static void
-update_mux_masks(void)
-{
-	int irq;
-	for (irq = 0; irq < ICU_LEN; irq++) {
-		intrec *idesc = intreclist_head[irq];
-		while (idesc != NULL) {
-			if (idesc->maskptr != NULL) {
-				/* our copy of *maskptr may be stale, refresh */
-				idesc->mask = *idesc->maskptr;
-			}
-			idesc = idesc->next;
-		}
-	}
-}
-
-static void
-update_masks(intrmask_t *maskptr, int irq)
-{
-	intrmask_t mask = 1 << irq;
-
-	if (maskptr == NULL)
-		return;
-
-	if (find_idesc(maskptr, irq) == NULL) {
-		/* no reference to this maskptr was found in this irq's chain */
-		*maskptr &= ~mask;
-	} else {
-		/* a reference to this maskptr was found in this irq's chain */
-		*maskptr |= mask;
-	}
-	/* we need to update all values in the intr_mask[irq] array */
-	update_intr_masks();
-	/* update mask in chains of the interrupt multiplex handler as well */
-	update_mux_masks();
-}
-
 /*
  * Add an interrupt handler to the linked list hung off of intreclist_head[irq]
  * and install a shared interrupt multiplex handler.  Install an interrupt
@@ -714,16 +612,17 @@ update_masks(intrmask_t *maskptr, int irq)
  *
  * The interrupt thread has already been put on the run queue, so if we cannot
  * preempt we should force a reschedule.
+ *
+ * This preemption check routine is currently empty, but will be used in the
+ * future to pre-check interrupts for preemptability to avoid the
+ * inefficiencies of having to instantly block.  We used to do a CPL check
+ * here (otherwise the interrupt thread could preempt even when it wasn't
+ * supposed to), but with CPLs gone we no longer have to do this.
  */
 static void
 cpu_intr_preempt(struct thread *td, int critpri)
 {
-	struct md_intr_info *info = td->td_info.intdata;
-
-	if ((curthread->td_cpl & (1 << info->irq)) == 0)
-		lwkt_preempt(td, critpri);
-	else
-		need_lwkt_resched(); /* XXX may not be required */
+	lwkt_preempt(td, critpri);
 }
 
 static int
@@ -746,7 +645,7 @@ add_intrdesc(intrec *idesc)
 
 		intr_info[irq].mihandler_installed = 1;
 		intr_info[irq].irq = irq;
-		td = register_int(irq, intr_mux, &intreclist_head[irq], idesc->name, idesc->maskptr);
+		td = register_int(irq, intr_mux, &intreclist_head[irq], idesc->name);
 		td->td_info.intdata = &intr_info[irq];
 		td->td_preemptable = cpu_intr_preempt;
 		printf("installed MI handler for int %d\n", irq);
@@ -775,12 +674,12 @@ add_intrdesc(intrec *idesc)
 	 * individual enablement on handlers.
 	 */
 	if (head == NULL) {
-		if (icu_setup(irq, idesc->handler, idesc->argument, idesc->maskptr, idesc->flags) != 0)
+		if (icu_setup(irq, idesc->handler, idesc->argument, idesc->flags) != 0)
 			return (-1);
 		update_intrname(irq, idesc->name);
 	} else if (head->next == NULL) {
 		icu_unset(irq, head->handler);
-		if (icu_setup(irq, intr_mux, &intreclist_head[irq], 0, 0) != 0)
+		if (icu_setup(irq, intr_mux, &intreclist_head[irq], 0) != 0)
 			return (-1);
 		if (bootverbose && head->next == NULL)
 			printf("\tusing shared irq%d.\n", irq);
@@ -788,13 +687,12 @@ add_intrdesc(intrec *idesc)
 	}
 
 	/*
-	 * Append to the end of the chain and update our SPL masks.
+	 * Append to the end of the chain.
 	 */
 	while (*headp != NULL)
 		headp = &(*headp)->next;
 	*headp = idesc;
 
-	update_masks(idesc->maskptr, irq);
 	return (0);
 }
 
@@ -810,8 +708,7 @@ add_intrdesc(intrec *idesc)
  * device interrupt rates (->update_intrlabels).
  *
  * Add the interrupt handler descriptor data structure created by an
- * earlier call of create_intr() to the linked list for its irq and
- * adjust the interrupt masks if necessary.
+ * earlier call of create_intr() to the linked list for its irq.
  *
  * WARNING: This is an internal function and not to be used by device
  * drivers.  It is subject to change without notice.
@@ -819,16 +716,11 @@ add_intrdesc(intrec *idesc)
 
 intrec *
 inthand_add(const char *name, int irq, inthand2_t handler, void *arg,
-	     intrmask_t *maskptr, int flags, lwkt_serialize_t serializer)
+	     int flags, lwkt_serialize_t serializer)
 {
 	intrec *idesc;
 	int errcode = -1;
 
-	if (ICU_LEN > 8 * sizeof *maskptr) {
-		printf("create_intr: ICU_LEN of %d too high for %d bit intrmask\n",
-		       ICU_LEN, 8 * sizeof *maskptr);
-		return (NULL);
-	}
 	if ((unsigned)irq >= ICU_LEN) {
 		printf("create_intr: requested irq%d too high, limit is %d\n",
 		       irq, ICU_LEN -1);
@@ -850,12 +742,10 @@ inthand_add(const char *name, int irq, inthand2_t handler, void *arg,
 
 	idesc->handler  = handler;
 	idesc->argument = arg;
-	idesc->maskptr  = maskptr;
 	idesc->intr     = irq;
 	idesc->flags    = flags;
 	idesc->serializer = serializer;
 
-	/* add irq to class selected by maskptr */
 	crit_enter();
 	errcode = add_intrdesc(idesc);
 	crit_exit();
@@ -874,8 +764,7 @@ inthand_add(const char *name, int irq, inthand2_t handler, void *arg,
 
 /*
  * Deactivate and remove the interrupt handler descriptor data connected
- * created by an earlier call of intr_connect() from the linked list and
- * adjust theinterrupt masks if necessary.
+ * created by an earlier call of intr_connect() from the linked list.
  *
  * Return the memory held by the interrupt handler descriptor data structure
  * to the system. Make sure, the handler is not actively used anymore, before.
@@ -926,10 +815,9 @@ inthand_remove(intrec *idesc)
 		 * This irq is no longer shared
 		 */
 		icu_unset(irq, intr_mux);
-		icu_setup(irq, head->handler, head->argument, head->maskptr, head->flags);
+		icu_setup(irq, head->handler, head->argument, head->flags);
 		update_intrname(irq, head->name);
 	}
-	update_masks(idesc->maskptr, irq);
 	crit_exit();
 	free(idesc, M_DEVBUF);
 
diff --git a/sys/platform/pc32/isa/intr_machdep.h b/sys/platform/pc32/isa/intr_machdep.h
index 7a5eef078f..2325e73b22 100644
--- a/sys/platform/pc32/isa/intr_machdep.h
+++ b/sys/platform/pc32/isa/intr_machdep.h
@@ -31,7 +31,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/isa/intr_machdep.h,v 1.19.2.2 2001/10/14 20:05:50 luigi Exp $
- * $DragonFly: src/sys/platform/pc32/isa/intr_machdep.h,v 1.14 2005/05/24 20:59:05 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/isa/intr_machdep.h,v 1.15 2005/06/16 21:12:47 dillon Exp $
  */
 
 #ifndef _I386_ISA_INTR_MACHDEP_H_
@@ -149,7 +149,6 @@ typedef void unpendhand_t(void);
 
 extern u_long *intr_countp[];	/* pointers into intrcnt[] */
 extern inthand2_t *intr_handler[];	/* C entry points for FAST ints */
-extern u_int intr_mask[];	/* sets of intrs masked during handling of 1 */
 extern void *intr_unit[];	/* cookies to pass to intr handlers */
 
 inthand_t
@@ -212,19 +211,16 @@ inthand_t
 void	call_fast_unpend(int irq);
 void	isa_defaultirq (void);
 int	isa_nmi (int cd);
-int	icu_setup (int intr, inthand2_t *func, void *arg, 
-		       u_int *maskptr, int flags);
+int	icu_setup (int intr, inthand2_t *func, void *arg, int flags);
 int	icu_unset (int intr, inthand2_t *handler);
 void	icu_reinit (void);
-int	update_intr_masks (void);
 
 /*
  * WARNING: These are internal functions and not to be used by device drivers!
  * They are subject to change without notice. 
  */
 struct intrec *inthand_add(const char *name, int irq, inthand2_t handler,
-			   void *arg, intrmask_t *maskptr, int flags,
-			   lwkt_serialize_t serializer);
+			   void *arg, int flags, lwkt_serialize_t serializer);
 
 int inthand_remove(struct intrec *idesc);
 void forward_fastint_remote(void *arg);
diff --git a/sys/platform/pc32/isa/ipl.s b/sys/platform/pc32/isa/ipl.s
index 2be0bcd304..655350d888 100644
--- a/sys/platform/pc32/isa/ipl.s
+++ b/sys/platform/pc32/isa/ipl.s
@@ -37,7 +37,7 @@
  *	@(#)ipl.s
  *
  * $FreeBSD: src/sys/i386/isa/ipl.s,v 1.32.2.3 2002/05/16 16:03:56 bde Exp $
- * $DragonFly: src/sys/platform/pc32/isa/ipl.s,v 1.17 2004/03/30 19:14:08 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/isa/ipl.s,v 1.18 2005/06/16 21:12:47 dillon Exp $
  */
 
 
@@ -45,30 +45,9 @@
  * AT/386
  * Vector interrupt control section
  *
- *  *_imask	- Interrupt masks for various spl*() functions
  *  ipending	- Pending interrupts (set when a masked interrupt occurs)
  */
 
-	.data
-	ALIGN_DATA
-
-/* current priority (all off) */
-
-	.globl	tty_imask
-tty_imask:	.long	SWI_TTY_MASK
-	.globl	bio_imask
-bio_imask:	.long	SWI_CLOCK_MASK | SWI_CAMBIO_MASK
-	.globl	net_imask
-net_imask:	.long	SWI_NET_MASK | SWI_CAMNET_MASK
-	.globl	cam_imask
-cam_imask:	.long	SWI_CAMBIO_MASK | SWI_CAMNET_MASK
-	.globl	soft_imask
-soft_imask:	.long	SWI_MASK
-	.globl	softnet_imask
-softnet_imask:	.long	SWI_NET_MASK
-	.globl	softtty_imask
-softtty_imask:	.long	SWI_TTY_MASK
-
 	.text
 	/*
 	 * GENERAL NOTES
@@ -101,23 +80,27 @@ softtty_imask:	.long	SWI_TTY_MASK
 	 * If we are in a critical section we cannot run any pending ints
 	 * nor can be play with mp_lock.
 	 *
+	 * NOTE: Since SPLs no longer exist, all callers of this function
+	 * push $0 for the CPL.  HOWEVER, we *STILL* use the cpl mask within
+	 * this function to mark fast interrupts which could not be dispatched
+	 * do to the unavailability of the BGL.
 	 */
 	SUPERALIGN_TEXT
 	.type	doreti,@function
 doreti:
 	FAKE_MCOUNT(bintr)		/* init "from" bintr -> doreti */
-	popl	%eax			/* cpl to restore */
+	popl	%eax			/* cpl to restore XXX */
+	movl	$0,%eax			/* irq mask unavailable due to BGL */
 	movl	PCPU(curthread),%ebx
 	cli				/* interlock with TDPRI_CRIT */
 	cmpl	$0,PCPU(reqflags)	/* short cut if nothing to do */
 	je	5f
-	movl	%eax,TD_CPL(%ebx)	/* save cpl being restored */
 	cmpl	$TDPRI_CRIT,TD_PRI(%ebx) /* can't unpend if in critical sec */
 	jge	5f
 	addl	$TDPRI_CRIT,TD_PRI(%ebx) /* force all ints to pending */
 doreti_next:
 	sti				/* allow new interrupts */
-	movl	%eax,%ecx		/* cpl being restored */
+	movl	%eax,%ecx		/* irq mask unavailable due to BGL */
 	notl	%ecx
 	cli				/* disallow YYY remove */
 #ifdef SMP
@@ -143,11 +126,9 @@ doreti_next:
 2:
 	/*
 	 * Nothing left to do, finish up.  Interrupts are still disabled.
-	 * If our temporary cpl mask is 0 then we have processed all pending
-	 * fast and normal ints including those requiring the MP lock,
-	 * and we have processed as many of the reqflags as possible based
-	 * on whether we came from user mode or not.   So if %eax is 0 we
-	 * can clear the interrupt-related reqflags.
+	 * %eax contains the mask of IRQ's that are not available due to
+	 * BGL requirements.  We can only clear RQF_INTPEND if *ALL* pending
+	 * interrupts have been processed.
 	 */
 	subl	$TDPRI_CRIT,TD_PRI(%ebx)	/* interlocked with cli */
 	testl	%eax,%eax
@@ -191,7 +172,8 @@ doreti_popl_fs_fault:
 	jmp	alltraps_with_regs_pushed
 
 	/*
-	 * FAST interrupt pending
+	 * FAST interrupt pending.  NOTE: stack context holds frame structure
+	 * for fast interrupt procedure, do not do random pushes or pops!
 	 */
 	ALIGN_TEXT
 doreti_fast:
@@ -199,7 +181,8 @@ doreti_fast:
 	bsfl	%ecx, %ecx		/* locate the next dispatchable int */
 	btrl	%ecx, PCPU(fpending)	/* is it really still pending? */
 	jnc	doreti_next
-	pushl	%eax			/* YYY cpl (expected by frame) */
+	pushl	%eax			/* save IRQ mask unavailable for BGL */
+					/* NOTE: is also CPL in frame */
 #ifdef SMP
 	pushl	%ecx			/* save ecx */
 	call	try_mplock
@@ -272,13 +255,14 @@ doreti_ast:
 	 * IPIQ message pending.  We clear RQF_IPIQ automatically.
 	 */
 doreti_ipiq:
+	movl	%eax,%esi		/* save cpl (can't use stack) */
 	incl	PCPU(intr_nesting_level)
 	andl	$~RQF_IPIQ,PCPU(reqflags)
 	subl	$8,%esp			/* add dummy vec and ppl */
 	call	lwkt_process_ipiq_frame
 	addl	$8,%esp
 	decl	PCPU(intr_nesting_level)
-	movl	TD_CPL(%ebx),%eax	/* retrieve cpl again for loop */
+	movl	%esi,%eax		/* restore cpl for loop */
 	jmp	doreti_next
 
 #endif
@@ -288,8 +272,8 @@ doreti_ipiq:
 	 *	  interrupts regardless of critical section nesting.  ASTs
 	 *	  are not dispatched.
 	 *
-	 *	YYY at the moment I leave us in a critical section so as
-	 *	not to have to mess with the cpls which will soon be obsolete.
+	 * 	  Use %eax to track those IRQs that could not be processed
+	 *	  due to BGL requirements.
 	 */
 	SUPERALIGN_TEXT
 
@@ -297,8 +281,8 @@ ENTRY(splz)
 	pushfl
 	pushl	%ebx
 	movl	PCPU(curthread),%ebx
-	movl	TD_CPL(%ebx),%eax
 	addl	$TDPRI_CRIT,TD_PRI(%ebx)
+	movl	$0,%eax
 
 splz_next:
 	cli
@@ -318,9 +302,9 @@ splz_next:
 
 	/*
 	 * Nothing left to do, finish up.  Interrupts are still disabled.
-	 * If our temporary cpl mask is 0 then we have processed everything
-	 * (including any pending fast ints requiring the MP lock), and
-	 * we can clear RQF_INTPEND.
+	 * If our mask of IRQs we couldn't process due to BGL requirements
+	 * is 0 then there are no pending interrupt sources left and we
+	 * can clear RQF_INTPEND.
 	 */
 	testl	%eax,%eax
 	jnz	5f
diff --git a/sys/platform/pc32/isa/ipl_funcs.c b/sys/platform/pc32/isa/ipl_funcs.c
index bcc445ed19..0ee2ebd55f 100644
--- a/sys/platform/pc32/isa/ipl_funcs.c
+++ b/sys/platform/pc32/isa/ipl_funcs.c
@@ -24,7 +24,7 @@
  * SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/i386/isa/ipl_funcs.c,v 1.32.2.5 2002/12/17 18:04:02 sam Exp $
- * $DragonFly: src/sys/platform/pc32/isa/ipl_funcs.c,v 1.9 2005/06/10 23:59:28 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/isa/ipl_funcs.c,v 1.10 2005/06/16 21:12:47 dillon Exp $
  */
 
 #include <sys/param.h>
@@ -77,112 +77,3 @@ softclockpending(void)
 	return ((mdcpu->gd_ipending | mdcpu->gd_fpending) & SWI_CLOCK_PENDING);
 }
 
-/*
- * Support for SPL assertions.
- */
-
-/************************************************************************
- *			GENERAL SPL CODE				*
- ************************************************************************
- *
- *  Implement splXXX(), spl0(), splx(), and splq().  splXXX() disables a
- *  set of interrupts (e.g. splbio() disables interrupts relating to 
- *  device I/O) and returns the previous interrupt mask.  splx() restores
- *  the previous interrupt mask, spl0() is a special case which enables
- *  all interrupts and is typically used inside i386/i386 swtch.s and
- *  fork_trampoline.  splq() is a generic version of splXXX().
- *
- *  The SPL routines mess around with the 'cpl' global, which masks 
- *  interrupts.  Interrupts are not *actually* masked.  What happens is 
- *  that if an interrupt masked by the cpl occurs, the appropriate bit
- *  in '*pending' is set and the interrupt is defered.  When we clear
- *  bits in the cpl we must check to see if any *pending interrupts have
- *  been unmasked and issue the synchronously, which is what the splz()
- *  call does.
- *
- *  Because the cpl is often saved and restored in a nested fashion, cpl
- *  modifications are only allowed in the SMP case when the MP lock is held
- *  to prevent multiple processes from tripping over each other's masks.
- *  The cpl is saved when you do a context switch (mi_switch()) and restored
- *  when your process gets cpu again.
- *
- *  An interrupt routine is allowed to modify the cpl as long as it restores
- *  it prior to returning (thus the interrupted mainline code doesn't notice
- *  anything amiss).  For the SMP case, the interrupt routine must hold 
- *  the MP lock for any cpl manipulation.
- *
- *  Likewise, due to the deterministic nature of cpl modifications, we do
- *  NOT need to use locked instructions to modify it.
- */
-
-#define	GENSPL(NAME, OP, MODIFIER, PC)		\
-unsigned NAME(void)				\
-{						\
-	unsigned x;				\
-	struct thread *td = curthread;		\
-						\
-	x = td->td_cpl;				\
-	td->td_cpl OP MODIFIER;			\
-	return (x);				\
-}
-
-/*
- * Note: we do not have to check td->td_nest_count in these functions, only
- * whether we are in a critical section or not.
- */
-void
-spl0(void)
-{
-	struct mdglobaldata *gd = mdcpu;
-	struct thread *td = gd->mi.gd_curthread;
-
-	td->td_cpl = 0;
-	if ((gd->gd_ipending || gd->gd_fpending) && td->td_pri < TDPRI_CRIT)
-		splz();
-}
-
-void
-splx(unsigned ipl)
-{
-	struct mdglobaldata *gd = mdcpu;
-	struct thread *td = gd->mi.gd_curthread;
-
-	td->td_cpl = ipl;
-	if (((gd->gd_ipending | gd->gd_fpending) & ~ipl) &&
-	    td->td_pri < TDPRI_CRIT) {
-		splz();
-	}
-}
-
-intrmask_t
-splq(intrmask_t mask)
-{ 
-	struct mdglobaldata *gd = mdcpu;
-	struct thread *td = gd->mi.gd_curthread;
-	intrmask_t tmp;
-
-	tmp = td->td_cpl;
-	td->td_cpl |= mask;
-	return (tmp);
-}       
-
-/* Finally, generate the actual spl*() functions */
-
-/*    NAME:            OP:     MODIFIER:				PC: */
-GENSPL(splbio,		|=,	bio_imask,				2)
-GENSPL(splcam,		|=,	cam_imask,				7)
-GENSPL(splclock,	 =,	HWI_MASK | SWI_MASK,			3)
-GENSPL(splhigh,		 =,	HWI_MASK | SWI_MASK,			4)
-GENSPL(splimp,		|=,	net_imask,				5)
-GENSPL(splnet,		|=,	SWI_NET_MASK,				6)
-GENSPL(splsoftcam,	|=,	SWI_CAMBIO_MASK | SWI_CAMNET_MASK,	8)
-GENSPL(splsoftcambio,	|=,	SWI_CAMBIO_MASK,			9)
-GENSPL(splsoftcamnet, 	|=,	SWI_CAMNET_MASK,			10)
-GENSPL(splsoftclock,	 =,	SWI_CLOCK_MASK,				11)
-GENSPL(splsofttty,	|=,	SWI_TTY_MASK,				12)
-GENSPL(splsoftvm,	|=,	SWI_VM_MASK,				16)
-GENSPL(splsofttq,	|=,	SWI_TQ_MASK,				17)
-GENSPL(splstatclock,	|=,	stat_imask,				13)
-GENSPL(spltty,		|=,	tty_imask,				14)
-GENSPL(splvm,		|=,	net_imask | bio_imask | cam_imask,	15)
-GENSPL(splcrypto,	|=,	net_imask | SWI_NET_MASK | SWI_CRYPTO_MASK,16)
diff --git a/sys/platform/pc32/isa/npx.c b/sys/platform/pc32/isa/npx.c
index 1b603cdf53..1d43f69882 100644
--- a/sys/platform/pc32/isa/npx.c
+++ b/sys/platform/pc32/isa/npx.c
@@ -33,7 +33,7 @@
  *
  *	from: @(#)npx.c	7.2 (Berkeley) 5/12/91
  * $FreeBSD: src/sys/i386/isa/npx.c,v 1.80.2.3 2001/10/20 19:04:38 tegge Exp $
- * $DragonFly: src/sys/platform/pc32/isa/npx.c,v 1.23 2005/05/24 20:59:05 dillon Exp $
+ * $DragonFly: src/sys/platform/pc32/isa/npx.c,v 1.24 2005/06/16 21:12:47 dillon Exp $
  */
 
 #include "opt_cpu.h"
@@ -160,7 +160,7 @@ SYSCTL_INT(_kern, OID_AUTO, mmxopt, CTLFLAG_RD, &mmxopt, 0,
 #endif
 
 #ifndef SMP
-static	u_int			npx0_imask = SWI_CLOCK_MASK;
+static	u_int			npx0_imask;
 static	struct gate_descriptor	npx_idt_probeintr;
 static	int			npx_intrno;
 static	volatile u_int		npx_intrs_while_probing;
diff --git a/sys/platform/vkernel/i386/genassym.c b/sys/platform/vkernel/i386/genassym.c
index d117750256..6a6517492b 100644
--- a/sys/platform/vkernel/i386/genassym.c
+++ b/sys/platform/vkernel/i386/genassym.c
@@ -35,7 +35,7 @@
  *
  *	from: @(#)genassym.c	5.11 (Berkeley) 5/10/91
  * $FreeBSD: src/sys/i386/i386/genassym.c,v 1.86.2.3 2002/03/03 05:42:49 nyan Exp $
- * $DragonFly: src/sys/platform/vkernel/i386/genassym.c,v 1.41 2005/02/27 10:57:24 swildner Exp $
+ * $DragonFly: src/sys/platform/vkernel/i386/genassym.c,v 1.42 2005/06/16 21:12:44 dillon Exp $
  */
 
 #include <sys/param.h>
@@ -96,7 +96,6 @@ ASSYM(MP_FREE_LOCK, MP_FREE_LOCK);
 
 ASSYM(RW_OWNER, offsetof(struct lwkt_rwlock, rw_owner));
 
-ASSYM(TD_CPL, offsetof(struct thread, td_mach) + offsetof(struct md_thread, mtd_cpl));
 ASSYM(TD_SAVEFPU, offsetof(struct thread, td_mach) + offsetof(struct md_thread, mtd_savefpu));
 
 ASSYM(TDPRI_CRIT, TDPRI_CRIT);
diff --git a/sys/sys/interrupt.h b/sys/sys/interrupt.h
index 8f72e4346b..ffe9b6bffc 100644
--- a/sys/sys/interrupt.h
+++ b/sys/sys/interrupt.h
@@ -24,7 +24,7 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/sys/interrupt.h,v 1.9.2.1 2001/10/14 20:05:50 luigi Exp $
- * $DragonFly: src/sys/sys/interrupt.h,v 1.9 2005/02/01 22:41:31 dillon Exp $
+ * $DragonFly: src/sys/sys/interrupt.h,v 1.10 2005/06/16 21:12:21 dillon Exp $
  */
 
 #ifndef _SYS_INTERRUPT_H_
@@ -39,9 +39,9 @@ typedef void ointhand2_t (int);
 
 struct thread;
 struct thread *register_swi(int intr, inthand2_t *handler, void *arg,
-			    const char *name, intrmask_t *maskptr);
+			    const char *name);
 struct thread *register_int(int intr, inthand2_t *handler, void *arg,
-			    const char *name, intrmask_t *maskptr);
+			    const char *name);
 void register_randintr(int intr);
 
 void swi_setpriority(int intr, int pri);
diff --git a/sys/sys/systm.h b/sys/sys/systm.h
index 3570e34d9c..8a52921c3a 100644
--- a/sys/sys/systm.h
+++ b/sys/sys/systm.h
@@ -37,7 +37,7 @@
  *
  *	@(#)systm.h	8.7 (Berkeley) 3/29/95
  * $FreeBSD: src/sys/sys/systm.h,v 1.111.2.18 2002/12/17 18:04:02 sam Exp $
- * $DragonFly: src/sys/sys/systm.h,v 1.30 2005/06/10 23:59:33 dillon Exp $
+ * $DragonFly: src/sys/sys/systm.h,v 1.31 2005/06/16 21:12:21 dillon Exp $
  */
 
 #ifndef _SYS_SYSTM_H_
@@ -261,66 +261,9 @@ void		schedsofttty (void);
 void		schedsoftvm (void);
 void		schedsofttq (void);
 intrmask_t	softclockpending (void);
-void		spl0 (void);
-intrmask_t	splbio (void);
-intrmask_t	splcam (void);
-intrmask_t	splclock (void);
-intrmask_t	splcrypto (void);
-intrmask_t	splhigh (void);
-intrmask_t	splimp (void);
-intrmask_t	splnet (void);
-intrmask_t	splsoftcam (void);
-intrmask_t	splsoftcambio (void);
-intrmask_t	splsoftcamnet (void);
-intrmask_t	splsoftclock (void);
-intrmask_t	splsofttty (void);
-intrmask_t	splsoftvm (void);
-intrmask_t	splsofttq (void);
-intrmask_t	splstatclock (void);
-intrmask_t	spltty (void);
-intrmask_t	splvm (void);
-void		splx (intrmask_t);
-intrmask_t	splq (intrmask_t);
 void		splz (void);
 #endif /* __i386__ */
 
-#ifdef INVARIANT_SUPPORT
-void	splbioassert (const char *msg);
-void	splcamassert (const char *msg);
-void	splclockassert (const char *msg);
-void	splcryptoassert (const char *msg);
-void	splhighassert (const char *msg);
-void	splimpassert (const char *msg);
-void	splnetassert (const char *msg);
-void	splsoftcamassert (const char *msg);
-void	splsoftcambioassert (const char *msg);
-void	splsoftcamnetassert (const char *msg);
-void	splsoftclockassert (const char *msg);
-void	splsoftttyassert (const char *msg);
-void	splsoftvmassert (const char *msg);
-void	splsofttqassert (const char *msg);
-void	splstatclockassert (const char *msg);
-void	splttyassert (const char *msg);
-void	splvmassert (const char *msg);
-#endif /* INVARIANT_SUPPORT */
-
-/*
- * XXX It's not clear how "machine independent" these will be yet, but
- * they are used all over the place especially in pci drivers.  We would
- * have to modify lots of drivers since <machine/cpufunc.h> no longer
- * implicitly causes these to be defined when it #included <machine/spl.h>
- */
-extern intrmask_t bio_imask;	/* group of interrupts masked with splbio() */
-extern intrmask_t cam_imask;	/* group of interrupts masked with splcam() */
-extern intrmask_t net_imask;	/* group of interrupts masked with splimp() */
-extern intrmask_t stat_imask;	/* interrupts masked with splstatclock() */
-extern intrmask_t tty_imask;	/* group of interrupts masked with spltty() */
-
-/* Read only */
-extern const intrmask_t soft_imask;    /* interrupts masked with splsoft*() */
-extern const intrmask_t softnet_imask; /* interrupt masked with splnet() */
-extern const intrmask_t softtty_imask; /* interrupt masked with splsofttty() */
-
 /*
  * Various callout lists.
  */
-- 
2.41.0