arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/sched/isolation.h>
  58 #include <linux/mem_encrypt.h>
  59 #include <linux/entry-kvm.h>
  60 #include <linux/suspend.h>
  61
  62 #include <trace/events/kvm.h>
  63
  64 #include <asm/debugreg.h>
  65 #include <asm/msr.h>
  66 #include <asm/desc.h>
  67 #include <asm/mce.h>
  68 #include <asm/pkru.h>
  69 #include <linux/kernel_stat.h>
  70 #include <asm/fpu/api.h>
  71 #include <asm/fpu/xcr.h>
  72 #include <asm/fpu/xstate.h>
  73 #include <asm/pvclock.h>
  74 #include <asm/div64.h>
  75 #include <asm/irq_remapping.h>
  76 #include <asm/mshyperv.h>
  77 #include <asm/hypervisor.h>
  78 #include <asm/tlbflush.h>
  79 #include <asm/intel_pt.h>
  80 #include <asm/emulate_prefix.h>
  81 #include <asm/sgx.h>
  82 #include <clocksource/hyperv_timer.h>
  83
  84 #define CREATE_TRACE_POINTS
  85 #include "trace.h"
  86
  87 #define MAX_IO_MSRS 256
  88 #define KVM_MAX_MCE_BANKS 32
  89
  90 struct kvm_caps kvm_caps __read_mostly = {
  91         .supported_mce_cap = MCG_CTL_P | MCG_SER_P,
  92 };
  93 EXPORT_SYMBOL_GPL(kvm_caps);
  94
  95 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
  96
  97 #define emul_to_vcpu(ctxt) \
  98         ((struct kvm_vcpu *)(ctxt)->vcpu)
  99
 100 /* EFER defaults:
 101  * - enable syscall per default because its emulated by KVM
 102  * - enable LME and LMA per default on 64 bit KVM
 103  */
 104 #ifdef CONFIG_X86_64
 105 static
 106 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 107 #else
 108 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 109 #endif
 110
 111 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 112
 113 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 114
 115 #define KVM_CAP_PMU_VALID_MASK KVM_PMU_CAP_DISABLE
 116
 117 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 118                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 119
 120 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 121 static void process_nmi(struct kvm_vcpu *vcpu);
 122 static void process_smi(struct kvm_vcpu *vcpu);
 123 static void enter_smm(struct kvm_vcpu *vcpu);
 124 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 125 static void store_regs(struct kvm_vcpu *vcpu);
 126 static int sync_regs(struct kvm_vcpu *vcpu);
 127 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu);
 128
 129 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 130 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 131
 132 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 133
 134 #define KVM_X86_OP(func)                                             \
 135         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 136                                 *(((struct kvm_x86_ops *)0)->func));
 137 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
 138 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
 139 #include <asm/kvm-x86-ops.h>
 140 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 141 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 142
 143 static bool __read_mostly ignore_msrs = 0;
 144 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 145
 146 bool __read_mostly report_ignored_msrs = true;
 147 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 148 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 149
 150 unsigned int min_timer_period_us = 200;
 151 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 152
 153 static bool __read_mostly kvmclock_periodic_sync = true;
 154 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 155
 156 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 157 static u32 __read_mostly tsc_tolerance_ppm = 250;
 158 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 159
 160 /*
 161  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 162  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 163  * advancement entirely.  Any other value is used as-is and disables adaptive
 164  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 165  */
 166 static int __read_mostly lapic_timer_advance_ns = -1;
 167 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 168
 169 static bool __read_mostly vector_hashing = true;
 170 module_param(vector_hashing, bool, S_IRUGO);
 171
 172 bool __read_mostly enable_vmware_backdoor = false;
 173 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 174 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 175
 176 static bool __read_mostly force_emulation_prefix = false;
 177 module_param(force_emulation_prefix, bool, S_IRUGO);
 178
 179 int __read_mostly pi_inject_timer = -1;
 180 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 181
 182 /* Enable/disable PMU virtualization */
 183 bool __read_mostly enable_pmu = true;
 184 EXPORT_SYMBOL_GPL(enable_pmu);
 185 module_param(enable_pmu, bool, 0444);
 186
 187 bool __read_mostly eager_page_split = true;
 188 module_param(eager_page_split, bool, 0644);
 189
 190 /*
 191  * Restoring the host value for MSRs that are only consumed when running in
 192  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 193  * returns to userspace, i.e. the kernel can run with the guest's value.
 194  */
 195 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 196
 197 struct kvm_user_return_msrs {
 198         struct user_return_notifier urn;
 199         bool registered;
 200         struct kvm_user_return_msr_values {
 201                 u64 host;
 202                 u64 curr;
 203         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 204 };
 205
 206 u32 __read_mostly kvm_nr_uret_msrs;
 207 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 208 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 209 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 210
 211 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 212                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 213                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 214                                 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
 215
 216 u64 __read_mostly host_efer;
 217 EXPORT_SYMBOL_GPL(host_efer);
 218
 219 bool __read_mostly allow_smaller_maxphyaddr = 0;
 220 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 221
 222 bool __read_mostly enable_apicv = true;
 223 EXPORT_SYMBOL_GPL(enable_apicv);
 224
 225 u64 __read_mostly host_xss;
 226 EXPORT_SYMBOL_GPL(host_xss);
 227
 228 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 229         KVM_GENERIC_VM_STATS(),
 230         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 231         STATS_DESC_COUNTER(VM, mmu_pte_write),
 232         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 233         STATS_DESC_COUNTER(VM, mmu_flooded),
 234         STATS_DESC_COUNTER(VM, mmu_recycled),
 235         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 236         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 237         STATS_DESC_ICOUNTER(VM, pages_4k),
 238         STATS_DESC_ICOUNTER(VM, pages_2m),
 239         STATS_DESC_ICOUNTER(VM, pages_1g),
 240         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 241         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 242         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 243 };
 244
 245 const struct kvm_stats_header kvm_vm_stats_header = {
 246         .name_size = KVM_STATS_NAME_SIZE,
 247         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 248         .id_offset = sizeof(struct kvm_stats_header),
 249         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 250         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 251                        sizeof(kvm_vm_stats_desc),
 252 };
 253
 254 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 255         KVM_GENERIC_VCPU_STATS(),
 256         STATS_DESC_COUNTER(VCPU, pf_taken),
 257         STATS_DESC_COUNTER(VCPU, pf_fixed),
 258         STATS_DESC_COUNTER(VCPU, pf_emulate),
 259         STATS_DESC_COUNTER(VCPU, pf_spurious),
 260         STATS_DESC_COUNTER(VCPU, pf_fast),
 261         STATS_DESC_COUNTER(VCPU, pf_mmio_spte_created),
 262         STATS_DESC_COUNTER(VCPU, pf_guest),
 263         STATS_DESC_COUNTER(VCPU, tlb_flush),
 264         STATS_DESC_COUNTER(VCPU, invlpg),
 265         STATS_DESC_COUNTER(VCPU, exits),
 266         STATS_DESC_COUNTER(VCPU, io_exits),
 267         STATS_DESC_COUNTER(VCPU, mmio_exits),
 268         STATS_DESC_COUNTER(VCPU, signal_exits),
 269         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 270         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 271         STATS_DESC_COUNTER(VCPU, l1d_flush),
 272         STATS_DESC_COUNTER(VCPU, halt_exits),
 273         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 274         STATS_DESC_COUNTER(VCPU, irq_exits),
 275         STATS_DESC_COUNTER(VCPU, host_state_reload),
 276         STATS_DESC_COUNTER(VCPU, fpu_reload),
 277         STATS_DESC_COUNTER(VCPU, insn_emulation),
 278         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 279         STATS_DESC_COUNTER(VCPU, hypercalls),
 280         STATS_DESC_COUNTER(VCPU, irq_injections),
 281         STATS_DESC_COUNTER(VCPU, nmi_injections),
 282         STATS_DESC_COUNTER(VCPU, req_event),
 283         STATS_DESC_COUNTER(VCPU, nested_run),
 284         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 285         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 286         STATS_DESC_COUNTER(VCPU, preemption_reported),
 287         STATS_DESC_COUNTER(VCPU, preemption_other),
 288         STATS_DESC_IBOOLEAN(VCPU, guest_mode),
 289         STATS_DESC_COUNTER(VCPU, notify_window_exits),
 290 };
 291
 292 const struct kvm_stats_header kvm_vcpu_stats_header = {
 293         .name_size = KVM_STATS_NAME_SIZE,
 294         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 295         .id_offset = sizeof(struct kvm_stats_header),
 296         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 297         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 298                        sizeof(kvm_vcpu_stats_desc),
 299 };
 300
 301 u64 __read_mostly host_xcr0;
 302
 303 static struct kmem_cache *x86_emulator_cache;
 304
 305 /*
 306  * When called, it means the previous get/set msr reached an invalid msr.
 307  * Return true if we want to ignore/silent this failed msr access.
 308  */
 309 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 310 {
 311         const char *op = write ? "wrmsr" : "rdmsr";
 312
 313         if (ignore_msrs) {
 314                 if (report_ignored_msrs)
 315                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 316                                       op, msr, data);
 317                 /* Mask the error */
 318                 return true;
 319         } else {
 320                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 321                                       op, msr, data);
 322                 return false;
 323         }
 324 }
 325
 326 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 327 {
 328         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 329         unsigned int size = sizeof(struct x86_emulate_ctxt);
 330
 331         return kmem_cache_create_usercopy("x86_emulator", size,
 332                                           __alignof__(struct x86_emulate_ctxt),
 333                                           SLAB_ACCOUNT, useroffset,
 334                                           size - useroffset, NULL);
 335 }
 336
 337 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 338
 339 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 340 {
 341         int i;
 342         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 343                 vcpu->arch.apf.gfns[i] = ~0;
 344 }
 345
 346 static void kvm_on_user_return(struct user_return_notifier *urn)
 347 {
 348         unsigned slot;
 349         struct kvm_user_return_msrs *msrs
 350                 = container_of(urn, struct kvm_user_return_msrs, urn);
 351         struct kvm_user_return_msr_values *values;
 352         unsigned long flags;
 353
 354         /*
 355          * Disabling irqs at this point since the following code could be
 356          * interrupted and executed through kvm_arch_hardware_disable()
 357          */
 358         local_irq_save(flags);
 359         if (msrs->registered) {
 360                 msrs->registered = false;
 361                 user_return_notifier_unregister(urn);
 362         }
 363         local_irq_restore(flags);
 364         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 365                 values = &msrs->values[slot];
 366                 if (values->host != values->curr) {
 367                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 368                         values->curr = values->host;
 369                 }
 370         }
 371 }
 372
 373 static int kvm_probe_user_return_msr(u32 msr)
 374 {
 375         u64 val;
 376         int ret;
 377
 378         preempt_disable();
 379         ret = rdmsrl_safe(msr, &val);
 380         if (ret)
 381                 goto out;
 382         ret = wrmsrl_safe(msr, val);
 383 out:
 384         preempt_enable();
 385         return ret;
 386 }
 387
 388 int kvm_add_user_return_msr(u32 msr)
 389 {
 390         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 391
 392         if (kvm_probe_user_return_msr(msr))
 393                 return -1;
 394
 395         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 396         return kvm_nr_uret_msrs++;
 397 }
 398 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 399
 400 int kvm_find_user_return_msr(u32 msr)
 401 {
 402         int i;
 403
 404         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 405                 if (kvm_uret_msrs_list[i] == msr)
 406                         return i;
 407         }
 408         return -1;
 409 }
 410 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 411
 412 static void kvm_user_return_msr_cpu_online(void)
 413 {
 414         unsigned int cpu = smp_processor_id();
 415         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 416         u64 value;
 417         int i;
 418
 419         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 420                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 421                 msrs->values[i].host = value;
 422                 msrs->values[i].curr = value;
 423         }
 424 }
 425
 426 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 427 {
 428         unsigned int cpu = smp_processor_id();
 429         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 430         int err;
 431
 432         value = (value & mask) | (msrs->values[slot].host & ~mask);
 433         if (value == msrs->values[slot].curr)
 434                 return 0;
 435         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 436         if (err)
 437                 return 1;
 438
 439         msrs->values[slot].curr = value;
 440         if (!msrs->registered) {
 441                 msrs->urn.on_user_return = kvm_on_user_return;
 442                 user_return_notifier_register(&msrs->urn);
 443                 msrs->registered = true;
 444         }
 445         return 0;
 446 }
 447 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 448
 449 static void drop_user_return_notifiers(void)
 450 {
 451         unsigned int cpu = smp_processor_id();
 452         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 453
 454         if (msrs->registered)
 455                 kvm_on_user_return(&msrs->urn);
 456 }
 457
 458 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 459 {
 460         return vcpu->arch.apic_base;
 461 }
 462 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 463
 464 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 465 {
 466         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 467 }
 468 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 469
 470 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 471 {
 472         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 473         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 474         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 475                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 476
 477         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 478                 return 1;
 479         if (!msr_info->host_initiated) {
 480                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 481                         return 1;
 482                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 483                         return 1;
 484         }
 485
 486         kvm_lapic_set_base(vcpu, msr_info->data);
 487         kvm_recalculate_apic_map(vcpu->kvm);
 488         return 0;
 489 }
 490 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 491
 492 /*
 493  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 494  *
 495  * Hardware virtualization extension instructions may fault if a reboot turns
 496  * off virtualization while processes are running.  Usually after catching the
 497  * fault we just panic; during reboot instead the instruction is ignored.
 498  */
 499 noinstr void kvm_spurious_fault(void)
 500 {
 501         /* Fault while not rebooting.  We want the trace. */
 502         BUG_ON(!kvm_rebooting);
 503 }
 504 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 505
 506 #define EXCPT_BENIGN            0
 507 #define EXCPT_CONTRIBUTORY      1
 508 #define EXCPT_PF                2
 509
 510 static int exception_class(int vector)
 511 {
 512         switch (vector) {
 513         case PF_VECTOR:
 514                 return EXCPT_PF;
 515         case DE_VECTOR:
 516         case TS_VECTOR:
 517         case NP_VECTOR:
 518         case SS_VECTOR:
 519         case GP_VECTOR:
 520                 return EXCPT_CONTRIBUTORY;
 521         default:
 522                 break;
 523         }
 524         return EXCPT_BENIGN;
 525 }
 526
 527 #define EXCPT_FAULT             0
 528 #define EXCPT_TRAP              1
 529 #define EXCPT_ABORT             2
 530 #define EXCPT_INTERRUPT         3
 531
 532 static int exception_type(int vector)
 533 {
 534         unsigned int mask;
 535
 536         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 537                 return EXCPT_INTERRUPT;
 538
 539         mask = 1 << vector;
 540
 541         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 542         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 543                 return EXCPT_TRAP;
 544
 545         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 546                 return EXCPT_ABORT;
 547
 548         /* Reserved exceptions will result in fault */
 549         return EXCPT_FAULT;
 550 }
 551
 552 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 553 {
 554         unsigned nr = vcpu->arch.exception.nr;
 555         bool has_payload = vcpu->arch.exception.has_payload;
 556         unsigned long payload = vcpu->arch.exception.payload;
 557
 558         if (!has_payload)
 559                 return;
 560
 561         switch (nr) {
 562         case DB_VECTOR:
 563                 /*
 564                  * "Certain debug exceptions may clear bit 0-3.  The
 565                  * remaining contents of the DR6 register are never
 566                  * cleared by the processor".
 567                  */
 568                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 569                 /*
 570                  * In order to reflect the #DB exception payload in guest
 571                  * dr6, three components need to be considered: active low
 572                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 573                  * DR6_BS and DR6_BT)
 574                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 575                  * In the target guest dr6:
 576                  * FIXED_1 bits should always be set.
 577                  * Active low bits should be cleared if 1-setting in payload.
 578                  * Active high bits should be set if 1-setting in payload.
 579                  *
 580                  * Note, the payload is compatible with the pending debug
 581                  * exceptions/exit qualification under VMX, that active_low bits
 582                  * are active high in payload.
 583                  * So they need to be flipped for DR6.
 584                  */
 585                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 586                 vcpu->arch.dr6 |= payload;
 587                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 588
 589                 /*
 590                  * The #DB payload is defined as compatible with the 'pending
 591                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 592                  * defined in the 'pending debug exceptions' field (enabled
 593                  * breakpoint), it is reserved and must be zero in DR6.
 594                  */
 595                 vcpu->arch.dr6 &= ~BIT(12);
 596                 break;
 597         case PF_VECTOR:
 598                 vcpu->arch.cr2 = payload;
 599                 break;
 600         }
 601
 602         vcpu->arch.exception.has_payload = false;
 603         vcpu->arch.exception.payload = 0;
 604 }
 605 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 606
 607 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 608                 unsigned nr, bool has_error, u32 error_code,
 609                 bool has_payload, unsigned long payload, bool reinject)
 610 {
 611         u32 prev_nr;
 612         int class1, class2;
 613
 614         kvm_make_request(KVM_REQ_EVENT, vcpu);
 615
 616         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 617         queue:
 618                 if (reinject) {
 619                         /*
 620                          * On vmentry, vcpu->arch.exception.pending is only
 621                          * true if an event injection was blocked by
 622                          * nested_run_pending.  In that case, however,
 623                          * vcpu_enter_guest requests an immediate exit,
 624                          * and the guest shouldn't proceed far enough to
 625                          * need reinjection.
 626                          */
 627                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 628                         vcpu->arch.exception.injected = true;
 629                         if (WARN_ON_ONCE(has_payload)) {
 630                                 /*
 631                                  * A reinjected event has already
 632                                  * delivered its payload.
 633                                  */
 634                                 has_payload = false;
 635                                 payload = 0;
 636                         }
 637                 } else {
 638                         vcpu->arch.exception.pending = true;
 639                         vcpu->arch.exception.injected = false;
 640                 }
 641                 vcpu->arch.exception.has_error_code = has_error;
 642                 vcpu->arch.exception.nr = nr;
 643                 vcpu->arch.exception.error_code = error_code;
 644                 vcpu->arch.exception.has_payload = has_payload;
 645                 vcpu->arch.exception.payload = payload;
 646                 if (!is_guest_mode(vcpu))
 647                         kvm_deliver_exception_payload(vcpu);
 648                 return;
 649         }
 650
 651         /* to check exception */
 652         prev_nr = vcpu->arch.exception.nr;
 653         if (prev_nr == DF_VECTOR) {
 654                 /* triple fault -> shutdown */
 655                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 656                 return;
 657         }
 658         class1 = exception_class(prev_nr);
 659         class2 = exception_class(nr);
 660         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 661                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 662                 /*
 663                  * Generate double fault per SDM Table 5-5.  Set
 664                  * exception.pending = true so that the double fault
 665                  * can trigger a nested vmexit.
 666                  */
 667                 vcpu->arch.exception.pending = true;
 668                 vcpu->arch.exception.injected = false;
 669                 vcpu->arch.exception.has_error_code = true;
 670                 vcpu->arch.exception.nr = DF_VECTOR;
 671                 vcpu->arch.exception.error_code = 0;
 672                 vcpu->arch.exception.has_payload = false;
 673                 vcpu->arch.exception.payload = 0;
 674         } else
 675                 /* replace previous exception with a new one in a hope
 676                    that instruction re-execution will regenerate lost
 677                    exception */
 678                 goto queue;
 679 }
 680
 681 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 682 {
 683         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 684 }
 685 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 686
 687 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 688 {
 689         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 690 }
 691 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 692
 693 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 694                            unsigned long payload)
 695 {
 696         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 697 }
 698 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 699
 700 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 701                                     u32 error_code, unsigned long payload)
 702 {
 703         kvm_multiple_exception(vcpu, nr, true, error_code,
 704                                true, payload, false);
 705 }
 706
 707 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 708 {
 709         if (err)
 710                 kvm_inject_gp(vcpu, 0);
 711         else
 712                 return kvm_skip_emulated_instruction(vcpu);
 713
 714         return 1;
 715 }
 716 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 717
 718 static int complete_emulated_insn_gp(struct kvm_vcpu *vcpu, int err)
 719 {
 720         if (err) {
 721                 kvm_inject_gp(vcpu, 0);
 722                 return 1;
 723         }
 724
 725         return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE | EMULTYPE_SKIP |
 726                                        EMULTYPE_COMPLETE_USER_EXIT);
 727 }
 728
 729 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 730 {
 731         ++vcpu->stat.pf_guest;
 732         vcpu->arch.exception.nested_apf =
 733                 is_guest_mode(vcpu) && fault->async_page_fault;
 734         if (vcpu->arch.exception.nested_apf) {
 735                 vcpu->arch.apf.nested_apf_token = fault->address;
 736                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 737         } else {
 738                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 739                                         fault->address);
 740         }
 741 }
 742 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 743
 744 /* Returns true if the page fault was immediately morphed into a VM-Exit. */
 745 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 746                                     struct x86_exception *fault)
 747 {
 748         struct kvm_mmu *fault_mmu;
 749         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 750
 751         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 752                                                vcpu->arch.walk_mmu;
 753
 754         /*
 755          * Invalidate the TLB entry for the faulting address, if it exists,
 756          * else the access will fault indefinitely (and to emulate hardware).
 757          */
 758         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 759             !(fault->error_code & PFERR_RSVD_MASK))
 760                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 761                                        fault_mmu->root.hpa);
 762
 763         /*
 764          * A workaround for KVM's bad exception handling.  If KVM injected an
 765          * exception into L2, and L2 encountered a #PF while vectoring the
 766          * injected exception, manually check to see if L1 wants to intercept
 767          * #PF, otherwise queuing the #PF will lead to #DF or a lost exception.
 768          * In all other cases, defer the check to nested_ops->check_events(),
 769          * which will correctly handle priority (this does not).  Note, other
 770          * exceptions, e.g. #GP, are theoretically affected, #PF is simply the
 771          * most problematic, e.g. when L0 and L1 are both intercepting #PF for
 772          * shadow paging.
 773          *
 774          * TODO: Rewrite exception handling to track injected and pending
 775          *       (VM-Exit) exceptions separately.
 776          */
 777         if (unlikely(vcpu->arch.exception.injected && is_guest_mode(vcpu)) &&
 778             kvm_x86_ops.nested_ops->handle_page_fault_workaround(vcpu, fault))
 779                 return true;
 780
 781         fault_mmu->inject_page_fault(vcpu, fault);
 782         return false;
 783 }
 784 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 785
 786 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 787 {
 788         atomic_inc(&vcpu->arch.nmi_queued);
 789         kvm_make_request(KVM_REQ_NMI, vcpu);
 790 }
 791 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 792
 793 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 794 {
 795         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 796 }
 797 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 798
 799 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 800 {
 801         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 802 }
 803 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 804
 805 /*
 806  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 807  * a #GP and return false.
 808  */
 809 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 810 {
 811         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 812                 return true;
 813         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 814         return false;
 815 }
 816 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 817
 818 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 819 {
 820         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 821                 return true;
 822
 823         kvm_queue_exception(vcpu, UD_VECTOR);
 824         return false;
 825 }
 826 EXPORT_SYMBOL_GPL(kvm_require_dr);
 827
 828 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 829 {
 830         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 831 }
 832
 833 /*
 834  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 835  */
 836 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 837 {
 838         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
 839         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 840         gpa_t real_gpa;
 841         int i;
 842         int ret;
 843         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 844
 845         /*
 846          * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
 847          * to an L1 GPA.
 848          */
 849         real_gpa = kvm_translate_gpa(vcpu, mmu, gfn_to_gpa(pdpt_gfn),
 850                                      PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
 851         if (real_gpa == INVALID_GPA)
 852                 return 0;
 853
 854         /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
 855         ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
 856                                        cr3 & GENMASK(11, 5), sizeof(pdpte));
 857         if (ret < 0)
 858                 return 0;
 859
 860         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 861                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 862                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 863                         return 0;
 864                 }
 865         }
 866
 867         /*
 868          * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
 869          * Shadow page roots need to be reconstructed instead.
 870          */
 871         if (!tdp_enabled && memcmp(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs)))
 872                 kvm_mmu_free_roots(vcpu->kvm, mmu, KVM_MMU_ROOT_CURRENT);
 873
 874         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 875         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 876         kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
 877         vcpu->arch.pdptrs_from_userspace = false;
 878
 879         return 1;
 880 }
 881 EXPORT_SYMBOL_GPL(load_pdptrs);
 882
 883 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 884 {
 885         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 886                 kvm_clear_async_pf_completion_queue(vcpu);
 887                 kvm_async_pf_hash_reset(vcpu);
 888
 889                 /*
 890                  * Clearing CR0.PG is defined to flush the TLB from the guest's
 891                  * perspective.
 892                  */
 893                 if (!(cr0 & X86_CR0_PG))
 894                         kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
 895         }
 896
 897         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 898                 kvm_mmu_reset_context(vcpu);
 899
 900         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 901             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 902             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 903                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 904 }
 905 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 906
 907 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 908 {
 909         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 910
 911         cr0 |= X86_CR0_ET;
 912
 913 #ifdef CONFIG_X86_64
 914         if (cr0 & 0xffffffff00000000UL)
 915                 return 1;
 916 #endif
 917
 918         cr0 &= ~CR0_RESERVED_BITS;
 919
 920         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 921                 return 1;
 922
 923         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 924                 return 1;
 925
 926 #ifdef CONFIG_X86_64
 927         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 928             (cr0 & X86_CR0_PG)) {
 929                 int cs_db, cs_l;
 930
 931                 if (!is_pae(vcpu))
 932                         return 1;
 933                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 934                 if (cs_l)
 935                         return 1;
 936         }
 937 #endif
 938         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 939             is_pae(vcpu) && ((cr0 ^ old_cr0) & X86_CR0_PDPTR_BITS) &&
 940             !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
 941                 return 1;
 942
 943         if (!(cr0 & X86_CR0_PG) &&
 944             (is_64_bit_mode(vcpu) || kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)))
 945                 return 1;
 946
 947         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 948
 949         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 950
 951         return 0;
 952 }
 953 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 954
 955 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 956 {
 957         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 958 }
 959 EXPORT_SYMBOL_GPL(kvm_lmsw);
 960
 961 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 962 {
 963         if (vcpu->arch.guest_state_protected)
 964                 return;
 965
 966         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 967
 968                 if (vcpu->arch.xcr0 != host_xcr0)
 969                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 970
 971                 if (vcpu->arch.xsaves_enabled &&
 972                     vcpu->arch.ia32_xss != host_xss)
 973                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 974         }
 975
 976 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
 977         if (static_cpu_has(X86_FEATURE_PKU) &&
 978             vcpu->arch.pkru != vcpu->arch.host_pkru &&
 979             ((vcpu->arch.xcr0 & XFEATURE_MASK_PKRU) ||
 980              kvm_read_cr4_bits(vcpu, X86_CR4_PKE)))
 981                 write_pkru(vcpu->arch.pkru);
 982 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
 983 }
 984 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 985
 986 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 987 {
 988         if (vcpu->arch.guest_state_protected)
 989                 return;
 990
 991 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
 992         if (static_cpu_has(X86_FEATURE_PKU) &&
 993             ((vcpu->arch.xcr0 & XFEATURE_MASK_PKRU) ||
 994              kvm_read_cr4_bits(vcpu, X86_CR4_PKE))) {
 995                 vcpu->arch.pkru = rdpkru();
 996                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 997                         write_pkru(vcpu->arch.host_pkru);
 998         }
 999 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
1000
1001         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
1002
1003                 if (vcpu->arch.xcr0 != host_xcr0)
1004                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
1005
1006                 if (vcpu->arch.xsaves_enabled &&
1007                     vcpu->arch.ia32_xss != host_xss)
1008                         wrmsrl(MSR_IA32_XSS, host_xss);
1009         }
1010
1011 }
1012 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
1013
1014 static inline u64 kvm_guest_supported_xcr0(struct kvm_vcpu *vcpu)
1015 {
1016         return vcpu->arch.guest_fpu.fpstate->user_xfeatures;
1017 }
1018
1019 #ifdef CONFIG_X86_64
1020 static inline u64 kvm_guest_supported_xfd(struct kvm_vcpu *vcpu)
1021 {
1022         return kvm_guest_supported_xcr0(vcpu) & XFEATURE_MASK_USER_DYNAMIC;
1023 }
1024 #endif
1025
1026 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
1027 {
1028         u64 xcr0 = xcr;
1029         u64 old_xcr0 = vcpu->arch.xcr0;
1030         u64 valid_bits;
1031
1032         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
1033         if (index != XCR_XFEATURE_ENABLED_MASK)
1034                 return 1;
1035         if (!(xcr0 & XFEATURE_MASK_FP))
1036                 return 1;
1037         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
1038                 return 1;
1039
1040         /*
1041          * Do not allow the guest to set bits that we do not support
1042          * saving.  However, xcr0 bit 0 is always set, even if the
1043          * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1044          */
1045         valid_bits = kvm_guest_supported_xcr0(vcpu) | XFEATURE_MASK_FP;
1046         if (xcr0 & ~valid_bits)
1047                 return 1;
1048
1049         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1050             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1051                 return 1;
1052
1053         if (xcr0 & XFEATURE_MASK_AVX512) {
1054                 if (!(xcr0 & XFEATURE_MASK_YMM))
1055                         return 1;
1056                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1057                         return 1;
1058         }
1059
1060         if ((xcr0 & XFEATURE_MASK_XTILE) &&
1061             ((xcr0 & XFEATURE_MASK_XTILE) != XFEATURE_MASK_XTILE))
1062                 return 1;
1063
1064         vcpu->arch.xcr0 = xcr0;
1065
1066         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1067                 kvm_update_cpuid_runtime(vcpu);
1068         return 0;
1069 }
1070
1071 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1072 {
1073         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1074             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1075                 kvm_inject_gp(vcpu, 0);
1076                 return 1;
1077         }
1078
1079         return kvm_skip_emulated_instruction(vcpu);
1080 }
1081 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1082
1083 bool __kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1084 {
1085         if (cr4 & cr4_reserved_bits)
1086                 return false;
1087
1088         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1089                 return false;
1090
1091         return true;
1092 }
1093 EXPORT_SYMBOL_GPL(__kvm_is_valid_cr4);
1094
1095 static bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1096 {
1097         return __kvm_is_valid_cr4(vcpu, cr4) &&
1098                static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1099 }
1100
1101 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1102 {
1103         if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
1104                 kvm_mmu_reset_context(vcpu);
1105
1106         /*
1107          * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1108          * according to the SDM; however, stale prev_roots could be reused
1109          * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1110          * free them all.  This is *not* a superset of KVM_REQ_TLB_FLUSH_GUEST
1111          * or KVM_REQ_TLB_FLUSH_CURRENT, because the hardware TLB is not flushed,
1112          * so fall through.
1113          */
1114         if (!tdp_enabled &&
1115             (cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE))
1116                 kvm_mmu_unload(vcpu);
1117
1118         /*
1119          * The TLB has to be flushed for all PCIDs if any of the following
1120          * (architecturally required) changes happen:
1121          * - CR4.PCIDE is changed from 1 to 0
1122          * - CR4.PGE is toggled
1123          *
1124          * This is a superset of KVM_REQ_TLB_FLUSH_CURRENT.
1125          */
1126         if (((cr4 ^ old_cr4) & X86_CR4_PGE) ||
1127             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1128                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1129
1130         /*
1131          * The TLB has to be flushed for the current PCID if any of the
1132          * following (architecturally required) changes happen:
1133          * - CR4.SMEP is changed from 0 to 1
1134          * - CR4.PAE is toggled
1135          */
1136         else if (((cr4 ^ old_cr4) & X86_CR4_PAE) ||
1137                  ((cr4 & X86_CR4_SMEP) && !(old_cr4 & X86_CR4_SMEP)))
1138                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1139
1140 }
1141 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1142
1143 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1144 {
1145         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1146
1147         if (!kvm_is_valid_cr4(vcpu, cr4))
1148                 return 1;
1149
1150         if (is_long_mode(vcpu)) {
1151                 if (!(cr4 & X86_CR4_PAE))
1152                         return 1;
1153                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1154                         return 1;
1155         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1156                    && ((cr4 ^ old_cr4) & X86_CR4_PDPTR_BITS)
1157                    && !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
1158                 return 1;
1159
1160         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1161                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1162                         return 1;
1163
1164                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1165                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1166                         return 1;
1167         }
1168
1169         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1170
1171         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1172
1173         return 0;
1174 }
1175 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1176
1177 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1178 {
1179         struct kvm_mmu *mmu = vcpu->arch.mmu;
1180         unsigned long roots_to_free = 0;
1181         int i;
1182
1183         /*
1184          * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1185          * this is reachable when running EPT=1 and unrestricted_guest=0,  and
1186          * also via the emulator.  KVM's TDP page tables are not in the scope of
1187          * the invalidation, but the guest's TLB entries need to be flushed as
1188          * the CPU may have cached entries in its TLB for the target PCID.
1189          */
1190         if (unlikely(tdp_enabled)) {
1191                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1192                 return;
1193         }
1194
1195         /*
1196          * If neither the current CR3 nor any of the prev_roots use the given
1197          * PCID, then nothing needs to be done here because a resync will
1198          * happen anyway before switching to any other CR3.
1199          */
1200         if (kvm_get_active_pcid(vcpu) == pcid) {
1201                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1202                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1203         }
1204
1205         /*
1206          * If PCID is disabled, there is no need to free prev_roots even if the
1207          * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1208          * with PCIDE=0.
1209          */
1210         if (!kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
1211                 return;
1212
1213         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1214                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1215                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1216
1217         kvm_mmu_free_roots(vcpu->kvm, mmu, roots_to_free);
1218 }
1219
1220 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1221 {
1222         bool skip_tlb_flush = false;
1223         unsigned long pcid = 0;
1224 #ifdef CONFIG_X86_64
1225         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1226
1227         if (pcid_enabled) {
1228                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1229                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1230                 pcid = cr3 & X86_CR3_PCID_MASK;
1231         }
1232 #endif
1233
1234         /* PDPTRs are always reloaded for PAE paging. */
1235         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1236                 goto handle_tlb_flush;
1237
1238         /*
1239          * Do not condition the GPA check on long mode, this helper is used to
1240          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1241          * the current vCPU mode is accurate.
1242          */
1243         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1244                 return 1;
1245
1246         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, cr3))
1247                 return 1;
1248
1249         if (cr3 != kvm_read_cr3(vcpu))
1250                 kvm_mmu_new_pgd(vcpu, cr3);
1251
1252         vcpu->arch.cr3 = cr3;
1253         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
1254         /* Do not call post_set_cr3, we do not get here for confidential guests.  */
1255
1256 handle_tlb_flush:
1257         /*
1258          * A load of CR3 that flushes the TLB flushes only the current PCID,
1259          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1260          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1261          * and it's impossible to use a non-zero PCID when PCID is disabled,
1262          * i.e. only PCID=0 can be relevant.
1263          */
1264         if (!skip_tlb_flush)
1265                 kvm_invalidate_pcid(vcpu, pcid);
1266
1267         return 0;
1268 }
1269 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1270
1271 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1272 {
1273         if (cr8 & CR8_RESERVED_BITS)
1274                 return 1;
1275         if (lapic_in_kernel(vcpu))
1276                 kvm_lapic_set_tpr(vcpu, cr8);
1277         else
1278                 vcpu->arch.cr8 = cr8;
1279         return 0;
1280 }
1281 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1282
1283 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1284 {
1285         if (lapic_in_kernel(vcpu))
1286                 return kvm_lapic_get_cr8(vcpu);
1287         else
1288                 return vcpu->arch.cr8;
1289 }
1290 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1291
1292 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1293 {
1294         int i;
1295
1296         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1297                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1298                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1299         }
1300 }
1301
1302 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1303 {
1304         unsigned long dr7;
1305
1306         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1307                 dr7 = vcpu->arch.guest_debug_dr7;
1308         else
1309                 dr7 = vcpu->arch.dr7;
1310         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1311         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1312         if (dr7 & DR7_BP_EN_MASK)
1313                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1314 }
1315 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1316
1317 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1318 {
1319         u64 fixed = DR6_FIXED_1;
1320
1321         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1322                 fixed |= DR6_RTM;
1323
1324         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1325                 fixed |= DR6_BUS_LOCK;
1326         return fixed;
1327 }
1328
1329 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1330 {
1331         size_t size = ARRAY_SIZE(vcpu->arch.db);
1332
1333         switch (dr) {
1334         case 0 ... 3:
1335                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1336                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1337                         vcpu->arch.eff_db[dr] = val;
1338                 break;
1339         case 4:
1340         case 6:
1341                 if (!kvm_dr6_valid(val))
1342                         return 1; /* #GP */
1343                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1344                 break;
1345         case 5:
1346         default: /* 7 */
1347                 if (!kvm_dr7_valid(val))
1348                         return 1; /* #GP */
1349                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1350                 kvm_update_dr7(vcpu);
1351                 break;
1352         }
1353
1354         return 0;
1355 }
1356 EXPORT_SYMBOL_GPL(kvm_set_dr);
1357
1358 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1359 {
1360         size_t size = ARRAY_SIZE(vcpu->arch.db);
1361
1362         switch (dr) {
1363         case 0 ... 3:
1364                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1365                 break;
1366         case 4:
1367         case 6:
1368                 *val = vcpu->arch.dr6;
1369                 break;
1370         case 5:
1371         default: /* 7 */
1372                 *val = vcpu->arch.dr7;
1373                 break;
1374         }
1375 }
1376 EXPORT_SYMBOL_GPL(kvm_get_dr);
1377
1378 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1379 {
1380         u32 ecx = kvm_rcx_read(vcpu);
1381         u64 data;
1382
1383         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1384                 kvm_inject_gp(vcpu, 0);
1385                 return 1;
1386         }
1387
1388         kvm_rax_write(vcpu, (u32)data);
1389         kvm_rdx_write(vcpu, data >> 32);
1390         return kvm_skip_emulated_instruction(vcpu);
1391 }
1392 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1393
1394 /*
1395  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1396  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1397  *
1398  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1399  * extract the supported MSRs from the related const lists.
1400  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1401  * capabilities of the host cpu. This capabilities test skips MSRs that are
1402  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1403  * may depend on host virtualization features rather than host cpu features.
1404  */
1405
1406 static const u32 msrs_to_save_all[] = {
1407         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1408         MSR_STAR,
1409 #ifdef CONFIG_X86_64
1410         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1411 #endif
1412         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1413         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1414         MSR_IA32_SPEC_CTRL,
1415         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1416         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1417         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1418         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1419         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1420         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1421         MSR_IA32_UMWAIT_CONTROL,
1422
1423         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1424         MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1425         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1426         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1427         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1428         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1429         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1430         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1431         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1432         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1433         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1434         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1435         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1436         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1437         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1438         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1439         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1440         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1441         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1442         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1443         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1444         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1445         MSR_IA32_PEBS_ENABLE, MSR_IA32_DS_AREA, MSR_PEBS_DATA_CFG,
1446
1447         MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1448         MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1449         MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1450         MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1451         MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1452         MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1453         MSR_IA32_XFD, MSR_IA32_XFD_ERR,
1454 };
1455
1456 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1457 static unsigned num_msrs_to_save;
1458
1459 static const u32 emulated_msrs_all[] = {
1460         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1461         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1462         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1463         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1464         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1465         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1466         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1467         HV_X64_MSR_RESET,
1468         HV_X64_MSR_VP_INDEX,
1469         HV_X64_MSR_VP_RUNTIME,
1470         HV_X64_MSR_SCONTROL,
1471         HV_X64_MSR_STIMER0_CONFIG,
1472         HV_X64_MSR_VP_ASSIST_PAGE,
1473         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1474         HV_X64_MSR_TSC_EMULATION_STATUS,
1475         HV_X64_MSR_SYNDBG_OPTIONS,
1476         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1477         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1478         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1479
1480         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1481         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1482
1483         MSR_IA32_TSC_ADJUST,
1484         MSR_IA32_TSC_DEADLINE,
1485         MSR_IA32_ARCH_CAPABILITIES,
1486         MSR_IA32_PERF_CAPABILITIES,
1487         MSR_IA32_MISC_ENABLE,
1488         MSR_IA32_MCG_STATUS,
1489         MSR_IA32_MCG_CTL,
1490         MSR_IA32_MCG_EXT_CTL,
1491         MSR_IA32_SMBASE,
1492         MSR_SMI_COUNT,
1493         MSR_PLATFORM_INFO,
1494         MSR_MISC_FEATURES_ENABLES,
1495         MSR_AMD64_VIRT_SPEC_CTRL,
1496         MSR_AMD64_TSC_RATIO,
1497         MSR_IA32_POWER_CTL,
1498         MSR_IA32_UCODE_REV,
1499
1500         /*
1501          * The following list leaves out MSRs whose values are determined
1502          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1503          * We always support the "true" VMX control MSRs, even if the host
1504          * processor does not, so I am putting these registers here rather
1505          * than in msrs_to_save_all.
1506          */
1507         MSR_IA32_VMX_BASIC,
1508         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1509         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1510         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1511         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1512         MSR_IA32_VMX_MISC,
1513         MSR_IA32_VMX_CR0_FIXED0,
1514         MSR_IA32_VMX_CR4_FIXED0,
1515         MSR_IA32_VMX_VMCS_ENUM,
1516         MSR_IA32_VMX_PROCBASED_CTLS2,
1517         MSR_IA32_VMX_EPT_VPID_CAP,
1518         MSR_IA32_VMX_VMFUNC,
1519
1520         MSR_K7_HWCR,
1521         MSR_KVM_POLL_CONTROL,
1522 };
1523
1524 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1525 static unsigned num_emulated_msrs;
1526
1527 /*
1528  * List of msr numbers which are used to expose MSR-based features that
1529  * can be used by a hypervisor to validate requested CPU features.
1530  */
1531 static const u32 msr_based_features_all[] = {
1532         MSR_IA32_VMX_BASIC,
1533         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1534         MSR_IA32_VMX_PINBASED_CTLS,
1535         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1536         MSR_IA32_VMX_PROCBASED_CTLS,
1537         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1538         MSR_IA32_VMX_EXIT_CTLS,
1539         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1540         MSR_IA32_VMX_ENTRY_CTLS,
1541         MSR_IA32_VMX_MISC,
1542         MSR_IA32_VMX_CR0_FIXED0,
1543         MSR_IA32_VMX_CR0_FIXED1,
1544         MSR_IA32_VMX_CR4_FIXED0,
1545         MSR_IA32_VMX_CR4_FIXED1,
1546         MSR_IA32_VMX_VMCS_ENUM,
1547         MSR_IA32_VMX_PROCBASED_CTLS2,
1548         MSR_IA32_VMX_EPT_VPID_CAP,
1549         MSR_IA32_VMX_VMFUNC,
1550
1551         MSR_F10H_DECFG,
1552         MSR_IA32_UCODE_REV,
1553         MSR_IA32_ARCH_CAPABILITIES,
1554         MSR_IA32_PERF_CAPABILITIES,
1555 };
1556
1557 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1558 static unsigned int num_msr_based_features;
1559
1560 static u64 kvm_get_arch_capabilities(void)
1561 {
1562         u64 data = 0;
1563
1564         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1565                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1566
1567         /*
1568          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1569          * the nested hypervisor runs with NX huge pages.  If it is not,
1570          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1571          * L1 guests, so it need not worry about its own (L2) guests.
1572          */
1573         data |= ARCH_CAP_PSCHANGE_MC_NO;
1574
1575         /*
1576          * If we're doing cache flushes (either "always" or "cond")
1577          * we will do one whenever the guest does a vmlaunch/vmresume.
1578          * If an outer hypervisor is doing the cache flush for us
1579          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1580          * capability to the guest too, and if EPT is disabled we're not
1581          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1582          * require a nested hypervisor to do a flush of its own.
1583          */
1584         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1585                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1586
1587         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1588                 data |= ARCH_CAP_RDCL_NO;
1589         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1590                 data |= ARCH_CAP_SSB_NO;
1591         if (!boot_cpu_has_bug(X86_BUG_MDS))
1592                 data |= ARCH_CAP_MDS_NO;
1593
1594         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1595                 /*
1596                  * If RTM=0 because the kernel has disabled TSX, the host might
1597                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1598                  * and therefore knows that there cannot be TAA) but keep
1599                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1600                  * and we want to allow migrating those guests to tsx=off hosts.
1601                  */
1602                 data &= ~ARCH_CAP_TAA_NO;
1603         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1604                 data |= ARCH_CAP_TAA_NO;
1605         } else {
1606                 /*
1607                  * Nothing to do here; we emulate TSX_CTRL if present on the
1608                  * host so the guest can choose between disabling TSX or
1609                  * using VERW to clear CPU buffers.
1610                  */
1611         }
1612
1613         /* Guests don't need to know "Fill buffer clear control" exists */
1614         data &= ~ARCH_CAP_FB_CLEAR_CTRL;
1615
1616         return data;
1617 }
1618
1619 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1620 {
1621         switch (msr->index) {
1622         case MSR_IA32_ARCH_CAPABILITIES:
1623                 msr->data = kvm_get_arch_capabilities();
1624                 break;
1625         case MSR_IA32_UCODE_REV:
1626                 rdmsrl_safe(msr->index, &msr->data);
1627                 break;
1628         default:
1629                 return static_call(kvm_x86_get_msr_feature)(msr);
1630         }
1631         return 0;
1632 }
1633
1634 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1635 {
1636         struct kvm_msr_entry msr;
1637         int r;
1638
1639         msr.index = index;
1640         r = kvm_get_msr_feature(&msr);
1641
1642         if (r == KVM_MSR_RET_INVALID) {
1643                 /* Unconditionally clear the output for simplicity */
1644                 *data = 0;
1645                 if (kvm_msr_ignored_check(index, 0, false))
1646                         r = 0;
1647         }
1648
1649         if (r)
1650                 return r;
1651
1652         *data = msr.data;
1653
1654         return 0;
1655 }
1656
1657 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1658 {
1659         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1660                 return false;
1661
1662         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1663                 return false;
1664
1665         if (efer & (EFER_LME | EFER_LMA) &&
1666             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1667                 return false;
1668
1669         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1670                 return false;
1671
1672         return true;
1673
1674 }
1675 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1676 {
1677         if (efer & efer_reserved_bits)
1678                 return false;
1679
1680         return __kvm_valid_efer(vcpu, efer);
1681 }
1682 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1683
1684 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1685 {
1686         u64 old_efer = vcpu->arch.efer;
1687         u64 efer = msr_info->data;
1688         int r;
1689
1690         if (efer & efer_reserved_bits)
1691                 return 1;
1692
1693         if (!msr_info->host_initiated) {
1694                 if (!__kvm_valid_efer(vcpu, efer))
1695                         return 1;
1696
1697                 if (is_paging(vcpu) &&
1698                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1699                         return 1;
1700         }
1701
1702         efer &= ~EFER_LMA;
1703         efer |= vcpu->arch.efer & EFER_LMA;
1704
1705         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1706         if (r) {
1707                 WARN_ON(r > 0);
1708                 return r;
1709         }
1710
1711         if ((efer ^ old_efer) & KVM_MMU_EFER_ROLE_BITS)
1712                 kvm_mmu_reset_context(vcpu);
1713
1714         return 0;
1715 }
1716
1717 void kvm_enable_efer_bits(u64 mask)
1718 {
1719        efer_reserved_bits &= ~mask;
1720 }
1721 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1722
1723 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1724 {
1725         struct kvm_x86_msr_filter *msr_filter;
1726         struct msr_bitmap_range *ranges;
1727         struct kvm *kvm = vcpu->kvm;
1728         bool allowed;
1729         int idx;
1730         u32 i;
1731
1732         /* x2APIC MSRs do not support filtering. */
1733         if (index >= 0x800 && index <= 0x8ff)
1734                 return true;
1735
1736         idx = srcu_read_lock(&kvm->srcu);
1737
1738         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1739         if (!msr_filter) {
1740                 allowed = true;
1741                 goto out;
1742         }
1743
1744         allowed = msr_filter->default_allow;
1745         ranges = msr_filter->ranges;
1746
1747         for (i = 0; i < msr_filter->count; i++) {
1748                 u32 start = ranges[i].base;
1749                 u32 end = start + ranges[i].nmsrs;
1750                 u32 flags = ranges[i].flags;
1751                 unsigned long *bitmap = ranges[i].bitmap;
1752
1753                 if ((index >= start) && (index < end) && (flags & type)) {
1754                         allowed = !!test_bit(index - start, bitmap);
1755                         break;
1756                 }
1757         }
1758
1759 out:
1760         srcu_read_unlock(&kvm->srcu, idx);
1761
1762         return allowed;
1763 }
1764 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1765
1766 /*
1767  * Write @data into the MSR specified by @index.  Select MSR specific fault
1768  * checks are bypassed if @host_initiated is %true.
1769  * Returns 0 on success, non-0 otherwise.
1770  * Assumes vcpu_load() was already called.
1771  */
1772 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1773                          bool host_initiated)
1774 {
1775         struct msr_data msr;
1776
1777         switch (index) {
1778         case MSR_FS_BASE:
1779         case MSR_GS_BASE:
1780         case MSR_KERNEL_GS_BASE:
1781         case MSR_CSTAR:
1782         case MSR_LSTAR:
1783                 if (is_noncanonical_address(data, vcpu))
1784                         return 1;
1785                 break;
1786         case MSR_IA32_SYSENTER_EIP:
1787         case MSR_IA32_SYSENTER_ESP:
1788                 /*
1789                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1790                  * non-canonical address is written on Intel but not on
1791                  * AMD (which ignores the top 32-bits, because it does
1792                  * not implement 64-bit SYSENTER).
1793                  *
1794                  * 64-bit code should hence be able to write a non-canonical
1795                  * value on AMD.  Making the address canonical ensures that
1796                  * vmentry does not fail on Intel after writing a non-canonical
1797                  * value, and that something deterministic happens if the guest
1798                  * invokes 64-bit SYSENTER.
1799                  */
1800                 data = __canonical_address(data, vcpu_virt_addr_bits(vcpu));
1801                 break;
1802         case MSR_TSC_AUX:
1803                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1804                         return 1;
1805
1806                 if (!host_initiated &&
1807                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1808                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1809                         return 1;
1810
1811                 /*
1812                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1813                  * incomplete and conflicting architectural behavior.  Current
1814                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1815                  * reserved and always read as zeros.  Enforce Intel's reserved
1816                  * bits check if and only if the guest CPU is Intel, and clear
1817                  * the bits in all other cases.  This ensures cross-vendor
1818                  * migration will provide consistent behavior for the guest.
1819                  */
1820                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1821                         return 1;
1822
1823                 data = (u32)data;
1824                 break;
1825         }
1826
1827         msr.data = data;
1828         msr.index = index;
1829         msr.host_initiated = host_initiated;
1830
1831         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1832 }
1833
1834 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1835                                      u32 index, u64 data, bool host_initiated)
1836 {
1837         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1838
1839         if (ret == KVM_MSR_RET_INVALID)
1840                 if (kvm_msr_ignored_check(index, data, true))
1841                         ret = 0;
1842
1843         return ret;
1844 }
1845
1846 /*
1847  * Read the MSR specified by @index into @data.  Select MSR specific fault
1848  * checks are bypassed if @host_initiated is %true.
1849  * Returns 0 on success, non-0 otherwise.
1850  * Assumes vcpu_load() was already called.
1851  */
1852 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1853                   bool host_initiated)
1854 {
1855         struct msr_data msr;
1856         int ret;
1857
1858         switch (index) {
1859         case MSR_TSC_AUX:
1860                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1861                         return 1;
1862
1863                 if (!host_initiated &&
1864                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1865                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1866                         return 1;
1867                 break;
1868         }
1869
1870         msr.index = index;
1871         msr.host_initiated = host_initiated;
1872
1873         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1874         if (!ret)
1875                 *data = msr.data;
1876         return ret;
1877 }
1878
1879 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1880                                      u32 index, u64 *data, bool host_initiated)
1881 {
1882         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1883
1884         if (ret == KVM_MSR_RET_INVALID) {
1885                 /* Unconditionally clear *data for simplicity */
1886                 *data = 0;
1887                 if (kvm_msr_ignored_check(index, 0, false))
1888                         ret = 0;
1889         }
1890
1891         return ret;
1892 }
1893
1894 static int kvm_get_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1895 {
1896         if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1897                 return KVM_MSR_RET_FILTERED;
1898         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1899 }
1900
1901 static int kvm_set_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 data)
1902 {
1903         if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1904                 return KVM_MSR_RET_FILTERED;
1905         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1906 }
1907
1908 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1909 {
1910         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1911 }
1912 EXPORT_SYMBOL_GPL(kvm_get_msr);
1913
1914 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1915 {
1916         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1917 }
1918 EXPORT_SYMBOL_GPL(kvm_set_msr);
1919
1920 static void complete_userspace_rdmsr(struct kvm_vcpu *vcpu)
1921 {
1922         if (!vcpu->run->msr.error) {
1923                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1924                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1925         }
1926 }
1927
1928 static int complete_emulated_msr_access(struct kvm_vcpu *vcpu)
1929 {
1930         return complete_emulated_insn_gp(vcpu, vcpu->run->msr.error);
1931 }
1932
1933 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1934 {
1935         complete_userspace_rdmsr(vcpu);
1936         return complete_emulated_msr_access(vcpu);
1937 }
1938
1939 static int complete_fast_msr_access(struct kvm_vcpu *vcpu)
1940 {
1941         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1942 }
1943
1944 static int complete_fast_rdmsr(struct kvm_vcpu *vcpu)
1945 {
1946         complete_userspace_rdmsr(vcpu);
1947         return complete_fast_msr_access(vcpu);
1948 }
1949
1950 static u64 kvm_msr_reason(int r)
1951 {
1952         switch (r) {
1953         case KVM_MSR_RET_INVALID:
1954                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1955         case KVM_MSR_RET_FILTERED:
1956                 return KVM_MSR_EXIT_REASON_FILTER;
1957         default:
1958                 return KVM_MSR_EXIT_REASON_INVAL;
1959         }
1960 }
1961
1962 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1963                               u32 exit_reason, u64 data,
1964                               int (*completion)(struct kvm_vcpu *vcpu),
1965                               int r)
1966 {
1967         u64 msr_reason = kvm_msr_reason(r);
1968
1969         /* Check if the user wanted to know about this MSR fault */
1970         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1971                 return 0;
1972
1973         vcpu->run->exit_reason = exit_reason;
1974         vcpu->run->msr.error = 0;
1975         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1976         vcpu->run->msr.reason = msr_reason;
1977         vcpu->run->msr.index = index;
1978         vcpu->run->msr.data = data;
1979         vcpu->arch.complete_userspace_io = completion;
1980
1981         return 1;
1982 }
1983
1984 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1985 {
1986         u32 ecx = kvm_rcx_read(vcpu);
1987         u64 data;
1988         int r;
1989
1990         r = kvm_get_msr_with_filter(vcpu, ecx, &data);
1991
1992         if (!r) {
1993                 trace_kvm_msr_read(ecx, data);
1994
1995                 kvm_rax_write(vcpu, data & -1u);
1996                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1997         } else {
1998                 /* MSR read failed? See if we should ask user space */
1999                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_RDMSR, 0,
2000                                        complete_fast_rdmsr, r))
2001                         return 0;
2002                 trace_kvm_msr_read_ex(ecx);
2003         }
2004
2005         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
2006 }
2007 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
2008
2009 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
2010 {
2011         u32 ecx = kvm_rcx_read(vcpu);
2012         u64 data = kvm_read_edx_eax(vcpu);
2013         int r;
2014
2015         r = kvm_set_msr_with_filter(vcpu, ecx, data);
2016
2017         if (!r) {
2018                 trace_kvm_msr_write(ecx, data);
2019         } else {
2020                 /* MSR write failed? See if we should ask user space */
2021                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_WRMSR, data,
2022                                        complete_fast_msr_access, r))
2023                         return 0;
2024                 /* Signal all other negative errors to userspace */
2025                 if (r < 0)
2026                         return r;
2027                 trace_kvm_msr_write_ex(ecx, data);
2028         }
2029
2030         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
2031 }
2032 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
2033
2034 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
2035 {
2036         return kvm_skip_emulated_instruction(vcpu);
2037 }
2038 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
2039
2040 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
2041 {
2042         /* Treat an INVD instruction as a NOP and just skip it. */
2043         return kvm_emulate_as_nop(vcpu);
2044 }
2045 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
2046
2047 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
2048 {
2049         kvm_queue_exception(vcpu, UD_VECTOR);
2050         return 1;
2051 }
2052 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
2053
2054
2055 static int kvm_emulate_monitor_mwait(struct kvm_vcpu *vcpu, const char *insn)
2056 {
2057         if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS) &&
2058             !guest_cpuid_has(vcpu, X86_FEATURE_MWAIT))
2059                 return kvm_handle_invalid_op(vcpu);
2060
2061         pr_warn_once("kvm: %s instruction emulated as NOP!\n", insn);
2062         return kvm_emulate_as_nop(vcpu);
2063 }
2064 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
2065 {
2066         return kvm_emulate_monitor_mwait(vcpu, "MWAIT");
2067 }
2068 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
2069
2070 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
2071 {
2072         return kvm_emulate_monitor_mwait(vcpu, "MONITOR");
2073 }
2074 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
2075
2076 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
2077 {
2078         xfer_to_guest_mode_prepare();
2079         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
2080                 xfer_to_guest_mode_work_pending();
2081 }
2082
2083 /*
2084  * The fast path for frequent and performance sensitive wrmsr emulation,
2085  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2086  * the latency of virtual IPI by avoiding the expensive bits of transitioning
2087  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2088  * other cases which must be called after interrupts are enabled on the host.
2089  */
2090 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2091 {
2092         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2093                 return 1;
2094
2095         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2096             ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2097             ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2098             ((u32)(data >> 32) != X2APIC_BROADCAST))
2099                 return kvm_x2apic_icr_write(vcpu->arch.apic, data);
2100
2101         return 1;
2102 }
2103
2104 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2105 {
2106         if (!kvm_can_use_hv_timer(vcpu))
2107                 return 1;
2108
2109         kvm_set_lapic_tscdeadline_msr(vcpu, data);
2110         return 0;
2111 }
2112
2113 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2114 {
2115         u32 msr = kvm_rcx_read(vcpu);
2116         u64 data;
2117         fastpath_t ret = EXIT_FASTPATH_NONE;
2118
2119         switch (msr) {
2120         case APIC_BASE_MSR + (APIC_ICR >> 4):
2121                 data = kvm_read_edx_eax(vcpu);
2122                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2123                         kvm_skip_emulated_instruction(vcpu);
2124                         ret = EXIT_FASTPATH_EXIT_HANDLED;
2125                 }
2126                 break;
2127         case MSR_IA32_TSC_DEADLINE:
2128                 data = kvm_read_edx_eax(vcpu);
2129                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2130                         kvm_skip_emulated_instruction(vcpu);
2131                         ret = EXIT_FASTPATH_REENTER_GUEST;
2132                 }
2133                 break;
2134         default:
2135                 break;
2136         }
2137
2138         if (ret != EXIT_FASTPATH_NONE)
2139                 trace_kvm_msr_write(msr, data);
2140
2141         return ret;
2142 }
2143 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2144
2145 /*
2146  * Adapt set_msr() to msr_io()'s calling convention
2147  */
2148 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2149 {
2150         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2151 }
2152
2153 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2154 {
2155         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2156 }
2157
2158 #ifdef CONFIG_X86_64
2159 struct pvclock_clock {
2160         int vclock_mode;
2161         u64 cycle_last;
2162         u64 mask;
2163         u32 mult;
2164         u32 shift;
2165         u64 base_cycles;
2166         u64 offset;
2167 };
2168
2169 struct pvclock_gtod_data {
2170         seqcount_t      seq;
2171
2172         struct pvclock_clock clock; /* extract of a clocksource struct */
2173         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2174
2175         ktime_t         offs_boot;
2176         u64             wall_time_sec;
2177 };
2178
2179 static struct pvclock_gtod_data pvclock_gtod_data;
2180
2181 static void update_pvclock_gtod(struct timekeeper *tk)
2182 {
2183         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2184
2185         write_seqcount_begin(&vdata->seq);
2186
2187         /* copy pvclock gtod data */
2188         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2189         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2190         vdata->clock.mask               = tk->tkr_mono.mask;
2191         vdata->clock.mult               = tk->tkr_mono.mult;
2192         vdata->clock.shift              = tk->tkr_mono.shift;
2193         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2194         vdata->clock.offset             = tk->tkr_mono.base;
2195
2196         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2197         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2198         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2199         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2200         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2201         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2202         vdata->raw_clock.offset         = tk->tkr_raw.base;
2203
2204         vdata->wall_time_sec            = tk->xtime_sec;
2205
2206         vdata->offs_boot                = tk->offs_boot;
2207
2208         write_seqcount_end(&vdata->seq);
2209 }
2210
2211 static s64 get_kvmclock_base_ns(void)
2212 {
2213         /* Count up from boot time, but with the frequency of the raw clock.  */
2214         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2215 }
2216 #else
2217 static s64 get_kvmclock_base_ns(void)
2218 {
2219         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2220         return ktime_get_boottime_ns();
2221 }
2222 #endif
2223
2224 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2225 {
2226         int version;
2227         int r;
2228         struct pvclock_wall_clock wc;
2229         u32 wc_sec_hi;
2230         u64 wall_nsec;
2231
2232         if (!wall_clock)
2233                 return;
2234
2235         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2236         if (r)
2237                 return;
2238
2239         if (version & 1)
2240                 ++version;  /* first time write, random junk */
2241
2242         ++version;
2243
2244         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2245                 return;
2246
2247         /*
2248          * The guest calculates current wall clock time by adding
2249          * system time (updated by kvm_guest_time_update below) to the
2250          * wall clock specified here.  We do the reverse here.
2251          */
2252         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2253
2254         wc.nsec = do_div(wall_nsec, 1000000000);
2255         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2256         wc.version = version;
2257
2258         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2259
2260         if (sec_hi_ofs) {
2261                 wc_sec_hi = wall_nsec >> 32;
2262                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2263                                 &wc_sec_hi, sizeof(wc_sec_hi));
2264         }
2265
2266         version++;
2267         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2268 }
2269
2270 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2271                                   bool old_msr, bool host_initiated)
2272 {
2273         struct kvm_arch *ka = &vcpu->kvm->arch;
2274
2275         if (vcpu->vcpu_id == 0 && !host_initiated) {
2276                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2277                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2278
2279                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2280         }
2281
2282         vcpu->arch.time = system_time;
2283         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2284
2285         /* we verify if the enable bit is set... */
2286         if (system_time & 1) {
2287                 kvm_gfn_to_pfn_cache_init(vcpu->kvm, &vcpu->arch.pv_time, vcpu,
2288                                           KVM_HOST_USES_PFN, system_time & ~1ULL,
2289                                           sizeof(struct pvclock_vcpu_time_info));
2290         } else {
2291                 kvm_gfn_to_pfn_cache_destroy(vcpu->kvm, &vcpu->arch.pv_time);
2292         }
2293
2294         return;
2295 }
2296
2297 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2298 {
2299         do_shl32_div32(dividend, divisor);
2300         return dividend;
2301 }
2302
2303 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2304                                s8 *pshift, u32 *pmultiplier)
2305 {
2306         uint64_t scaled64;
2307         int32_t  shift = 0;
2308         uint64_t tps64;
2309         uint32_t tps32;
2310
2311         tps64 = base_hz;
2312         scaled64 = scaled_hz;
2313         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2314                 tps64 >>= 1;
2315                 shift--;
2316         }
2317
2318         tps32 = (uint32_t)tps64;
2319         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2320                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2321                         scaled64 >>= 1;
2322                 else
2323                         tps32 <<= 1;
2324                 shift++;
2325         }
2326
2327         *pshift = shift;
2328         *pmultiplier = div_frac(scaled64, tps32);
2329 }
2330
2331 #ifdef CONFIG_X86_64
2332 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2333 #endif
2334
2335 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2336 static unsigned long max_tsc_khz;
2337
2338 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2339 {
2340         u64 v = (u64)khz * (1000000 + ppm);
2341         do_div(v, 1000000);
2342         return v;
2343 }
2344
2345 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2346
2347 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2348 {
2349         u64 ratio;
2350
2351         /* Guest TSC same frequency as host TSC? */
2352         if (!scale) {
2353                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_caps.default_tsc_scaling_ratio);
2354                 return 0;
2355         }
2356
2357         /* TSC scaling supported? */
2358         if (!kvm_caps.has_tsc_control) {
2359                 if (user_tsc_khz > tsc_khz) {
2360                         vcpu->arch.tsc_catchup = 1;
2361                         vcpu->arch.tsc_always_catchup = 1;
2362                         return 0;
2363                 } else {
2364                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2365                         return -1;
2366                 }
2367         }
2368
2369         /* TSC scaling required  - calculate ratio */
2370         ratio = mul_u64_u32_div(1ULL << kvm_caps.tsc_scaling_ratio_frac_bits,
2371                                 user_tsc_khz, tsc_khz);
2372
2373         if (ratio == 0 || ratio >= kvm_caps.max_tsc_scaling_ratio) {
2374                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2375                                     user_tsc_khz);
2376                 return -1;
2377         }
2378
2379         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2380         return 0;
2381 }
2382
2383 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2384 {
2385         u32 thresh_lo, thresh_hi;
2386         int use_scaling = 0;
2387
2388         /* tsc_khz can be zero if TSC calibration fails */
2389         if (user_tsc_khz == 0) {
2390                 /* set tsc_scaling_ratio to a safe value */
2391                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_caps.default_tsc_scaling_ratio);
2392                 return -1;
2393         }
2394
2395         /* Compute a scale to convert nanoseconds in TSC cycles */
2396         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2397                            &vcpu->arch.virtual_tsc_shift,
2398                            &vcpu->arch.virtual_tsc_mult);
2399         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2400
2401         /*
2402          * Compute the variation in TSC rate which is acceptable
2403          * within the range of tolerance and decide if the
2404          * rate being applied is within that bounds of the hardware
2405          * rate.  If so, no scaling or compensation need be done.
2406          */
2407         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2408         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2409         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2410                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2411                 use_scaling = 1;
2412         }
2413         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2414 }
2415
2416 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2417 {
2418         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2419                                       vcpu->arch.virtual_tsc_mult,
2420                                       vcpu->arch.virtual_tsc_shift);
2421         tsc += vcpu->arch.this_tsc_write;
2422         return tsc;
2423 }
2424
2425 #ifdef CONFIG_X86_64
2426 static inline int gtod_is_based_on_tsc(int mode)
2427 {
2428         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2429 }
2430 #endif
2431
2432 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2433 {
2434 #ifdef CONFIG_X86_64
2435         bool vcpus_matched;
2436         struct kvm_arch *ka = &vcpu->kvm->arch;
2437         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2438
2439         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2440                          atomic_read(&vcpu->kvm->online_vcpus));
2441
2442         /*
2443          * Once the masterclock is enabled, always perform request in
2444          * order to update it.
2445          *
2446          * In order to enable masterclock, the host clocksource must be TSC
2447          * and the vcpus need to have matched TSCs.  When that happens,
2448          * perform request to enable masterclock.
2449          */
2450         if (ka->use_master_clock ||
2451             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2452                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2453
2454         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2455                             atomic_read(&vcpu->kvm->online_vcpus),
2456                             ka->use_master_clock, gtod->clock.vclock_mode);
2457 #endif
2458 }
2459
2460 /*
2461  * Multiply tsc by a fixed point number represented by ratio.
2462  *
2463  * The most significant 64-N bits (mult) of ratio represent the
2464  * integral part of the fixed point number; the remaining N bits
2465  * (frac) represent the fractional part, ie. ratio represents a fixed
2466  * point number (mult + frac * 2^(-N)).
2467  *
2468  * N equals to kvm_caps.tsc_scaling_ratio_frac_bits.
2469  */
2470 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2471 {
2472         return mul_u64_u64_shr(tsc, ratio, kvm_caps.tsc_scaling_ratio_frac_bits);
2473 }
2474
2475 u64 kvm_scale_tsc(u64 tsc, u64 ratio)
2476 {
2477         u64 _tsc = tsc;
2478
2479         if (ratio != kvm_caps.default_tsc_scaling_ratio)
2480                 _tsc = __scale_tsc(ratio, tsc);
2481
2482         return _tsc;
2483 }
2484 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2485
2486 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2487 {
2488         u64 tsc;
2489
2490         tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2491
2492         return target_tsc - tsc;
2493 }
2494
2495 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2496 {
2497         return vcpu->arch.l1_tsc_offset +
2498                 kvm_scale_tsc(host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2499 }
2500 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2501
2502 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2503 {
2504         u64 nested_offset;
2505
2506         if (l2_multiplier == kvm_caps.default_tsc_scaling_ratio)
2507                 nested_offset = l1_offset;
2508         else
2509                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2510                                                 kvm_caps.tsc_scaling_ratio_frac_bits);
2511
2512         nested_offset += l2_offset;
2513         return nested_offset;
2514 }
2515 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2516
2517 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2518 {
2519         if (l2_multiplier != kvm_caps.default_tsc_scaling_ratio)
2520                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2521                                        kvm_caps.tsc_scaling_ratio_frac_bits);
2522
2523         return l1_multiplier;
2524 }
2525 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2526
2527 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2528 {
2529         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2530                                    vcpu->arch.l1_tsc_offset,
2531                                    l1_offset);
2532
2533         vcpu->arch.l1_tsc_offset = l1_offset;
2534
2535         /*
2536          * If we are here because L1 chose not to trap WRMSR to TSC then
2537          * according to the spec this should set L1's TSC (as opposed to
2538          * setting L1's offset for L2).
2539          */
2540         if (is_guest_mode(vcpu))
2541                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2542                         l1_offset,
2543                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2544                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2545         else
2546                 vcpu->arch.tsc_offset = l1_offset;
2547
2548         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2549 }
2550
2551 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2552 {
2553         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2554
2555         /* Userspace is changing the multiplier while L2 is active */
2556         if (is_guest_mode(vcpu))
2557                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2558                         l1_multiplier,
2559                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2560         else
2561                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2562
2563         if (kvm_caps.has_tsc_control)
2564                 static_call(kvm_x86_write_tsc_multiplier)(
2565                         vcpu, vcpu->arch.tsc_scaling_ratio);
2566 }
2567
2568 static inline bool kvm_check_tsc_unstable(void)
2569 {
2570 #ifdef CONFIG_X86_64
2571         /*
2572          * TSC is marked unstable when we're running on Hyper-V,
2573          * 'TSC page' clocksource is good.
2574          */
2575         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2576                 return false;
2577 #endif
2578         return check_tsc_unstable();
2579 }
2580
2581 /*
2582  * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2583  * offset for the vcpu and tracks the TSC matching generation that the vcpu
2584  * participates in.
2585  */
2586 static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc,
2587                                   u64 ns, bool matched)
2588 {
2589         struct kvm *kvm = vcpu->kvm;
2590
2591         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2592
2593         /*
2594          * We also track th most recent recorded KHZ, write and time to
2595          * allow the matching interval to be extended at each write.
2596          */
2597         kvm->arch.last_tsc_nsec = ns;
2598         kvm->arch.last_tsc_write = tsc;
2599         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2600         kvm->arch.last_tsc_offset = offset;
2601
2602         vcpu->arch.last_guest_tsc = tsc;
2603
2604         kvm_vcpu_write_tsc_offset(vcpu, offset);
2605
2606         if (!matched) {
2607                 /*
2608                  * We split periods of matched TSC writes into generations.
2609                  * For each generation, we track the original measured
2610                  * nanosecond time, offset, and write, so if TSCs are in
2611                  * sync, we can match exact offset, and if not, we can match
2612                  * exact software computation in compute_guest_tsc()
2613                  *
2614                  * These values are tracked in kvm->arch.cur_xxx variables.
2615                  */
2616                 kvm->arch.cur_tsc_generation++;
2617                 kvm->arch.cur_tsc_nsec = ns;
2618                 kvm->arch.cur_tsc_write = tsc;
2619                 kvm->arch.cur_tsc_offset = offset;
2620                 kvm->arch.nr_vcpus_matched_tsc = 0;
2621         } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) {
2622                 kvm->arch.nr_vcpus_matched_tsc++;
2623         }
2624
2625         /* Keep track of which generation this VCPU has synchronized to */
2626         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2627         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2628         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2629
2630         kvm_track_tsc_matching(vcpu);
2631 }
2632
2633 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2634 {
2635         struct kvm *kvm = vcpu->kvm;
2636         u64 offset, ns, elapsed;
2637         unsigned long flags;
2638         bool matched = false;
2639         bool synchronizing = false;
2640
2641         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2642         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2643         ns = get_kvmclock_base_ns();
2644         elapsed = ns - kvm->arch.last_tsc_nsec;
2645
2646         if (vcpu->arch.virtual_tsc_khz) {
2647                 if (data == 0) {
2648                         /*
2649                          * detection of vcpu initialization -- need to sync
2650                          * with other vCPUs. This particularly helps to keep
2651                          * kvm_clock stable after CPU hotplug
2652                          */
2653                         synchronizing = true;
2654                 } else {
2655                         u64 tsc_exp = kvm->arch.last_tsc_write +
2656                                                 nsec_to_cycles(vcpu, elapsed);
2657                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2658                         /*
2659                          * Special case: TSC write with a small delta (1 second)
2660                          * of virtual cycle time against real time is
2661                          * interpreted as an attempt to synchronize the CPU.
2662                          */
2663                         synchronizing = data < tsc_exp + tsc_hz &&
2664                                         data + tsc_hz > tsc_exp;
2665                 }
2666         }
2667
2668         /*
2669          * For a reliable TSC, we can match TSC offsets, and for an unstable
2670          * TSC, we add elapsed time in this computation.  We could let the
2671          * compensation code attempt to catch up if we fall behind, but
2672          * it's better to try to match offsets from the beginning.
2673          */
2674         if (synchronizing &&
2675             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2676                 if (!kvm_check_tsc_unstable()) {
2677                         offset = kvm->arch.cur_tsc_offset;
2678                 } else {
2679                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2680                         data += delta;
2681                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2682                 }
2683                 matched = true;
2684         }
2685
2686         __kvm_synchronize_tsc(vcpu, offset, data, ns, matched);
2687         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2688 }
2689
2690 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2691                                            s64 adjustment)
2692 {
2693         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2694         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2695 }
2696
2697 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2698 {
2699         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_caps.default_tsc_scaling_ratio)
2700                 WARN_ON(adjustment < 0);
2701         adjustment = kvm_scale_tsc((u64) adjustment,
2702                                    vcpu->arch.l1_tsc_scaling_ratio);
2703         adjust_tsc_offset_guest(vcpu, adjustment);
2704 }
2705
2706 #ifdef CONFIG_X86_64
2707
2708 static u64 read_tsc(void)
2709 {
2710         u64 ret = (u64)rdtsc_ordered();
2711         u64 last = pvclock_gtod_data.clock.cycle_last;
2712
2713         if (likely(ret >= last))
2714                 return ret;
2715
2716         /*
2717          * GCC likes to generate cmov here, but this branch is extremely
2718          * predictable (it's just a function of time and the likely is
2719          * very likely) and there's a data dependence, so force GCC
2720          * to generate a branch instead.  I don't barrier() because
2721          * we don't actually need a barrier, and if this function
2722          * ever gets inlined it will generate worse code.
2723          */
2724         asm volatile ("");
2725         return last;
2726 }
2727
2728 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2729                           int *mode)
2730 {
2731         long v;
2732         u64 tsc_pg_val;
2733
2734         switch (clock->vclock_mode) {
2735         case VDSO_CLOCKMODE_HVCLOCK:
2736                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2737                                                   tsc_timestamp);
2738                 if (tsc_pg_val != U64_MAX) {
2739                         /* TSC page valid */
2740                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2741                         v = (tsc_pg_val - clock->cycle_last) &
2742                                 clock->mask;
2743                 } else {
2744                         /* TSC page invalid */
2745                         *mode = VDSO_CLOCKMODE_NONE;
2746                 }
2747                 break;
2748         case VDSO_CLOCKMODE_TSC:
2749                 *mode = VDSO_CLOCKMODE_TSC;
2750                 *tsc_timestamp = read_tsc();
2751                 v = (*tsc_timestamp - clock->cycle_last) &
2752                         clock->mask;
2753                 break;
2754         default:
2755                 *mode = VDSO_CLOCKMODE_NONE;
2756         }
2757
2758         if (*mode == VDSO_CLOCKMODE_NONE)
2759                 *tsc_timestamp = v = 0;
2760
2761         return v * clock->mult;
2762 }
2763
2764 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2765 {
2766         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2767         unsigned long seq;
2768         int mode;
2769         u64 ns;
2770
2771         do {
2772                 seq = read_seqcount_begin(&gtod->seq);
2773                 ns = gtod->raw_clock.base_cycles;
2774                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2775                 ns >>= gtod->raw_clock.shift;
2776                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2777         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2778         *t = ns;
2779
2780         return mode;
2781 }
2782
2783 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2784 {
2785         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2786         unsigned long seq;
2787         int mode;
2788         u64 ns;
2789
2790         do {
2791                 seq = read_seqcount_begin(&gtod->seq);
2792                 ts->tv_sec = gtod->wall_time_sec;
2793                 ns = gtod->clock.base_cycles;
2794                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2795                 ns >>= gtod->clock.shift;
2796         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2797
2798         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2799         ts->tv_nsec = ns;
2800
2801         return mode;
2802 }
2803
2804 /* returns true if host is using TSC based clocksource */
2805 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2806 {
2807         /* checked again under seqlock below */
2808         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2809                 return false;
2810
2811         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2812                                                       tsc_timestamp));
2813 }
2814
2815 /* returns true if host is using TSC based clocksource */
2816 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2817                                            u64 *tsc_timestamp)
2818 {
2819         /* checked again under seqlock below */
2820         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2821                 return false;
2822
2823         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2824 }
2825 #endif
2826
2827 /*
2828  *
2829  * Assuming a stable TSC across physical CPUS, and a stable TSC
2830  * across virtual CPUs, the following condition is possible.
2831  * Each numbered line represents an event visible to both
2832  * CPUs at the next numbered event.
2833  *
2834  * "timespecX" represents host monotonic time. "tscX" represents
2835  * RDTSC value.
2836  *
2837  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2838  *
2839  * 1.  read timespec0,tsc0
2840  * 2.                                   | timespec1 = timespec0 + N
2841  *                                      | tsc1 = tsc0 + M
2842  * 3. transition to guest               | transition to guest
2843  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2844  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2845  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2846  *
2847  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2848  *
2849  *      - ret0 < ret1
2850  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2851  *              ...
2852  *      - 0 < N - M => M < N
2853  *
2854  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2855  * always the case (the difference between two distinct xtime instances
2856  * might be smaller then the difference between corresponding TSC reads,
2857  * when updating guest vcpus pvclock areas).
2858  *
2859  * To avoid that problem, do not allow visibility of distinct
2860  * system_timestamp/tsc_timestamp values simultaneously: use a master
2861  * copy of host monotonic time values. Update that master copy
2862  * in lockstep.
2863  *
2864  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2865  *
2866  */
2867
2868 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2869 {
2870 #ifdef CONFIG_X86_64
2871         struct kvm_arch *ka = &kvm->arch;
2872         int vclock_mode;
2873         bool host_tsc_clocksource, vcpus_matched;
2874
2875         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2876         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2877                         atomic_read(&kvm->online_vcpus));
2878
2879         /*
2880          * If the host uses TSC clock, then passthrough TSC as stable
2881          * to the guest.
2882          */
2883         host_tsc_clocksource = kvm_get_time_and_clockread(
2884                                         &ka->master_kernel_ns,
2885                                         &ka->master_cycle_now);
2886
2887         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2888                                 && !ka->backwards_tsc_observed
2889                                 && !ka->boot_vcpu_runs_old_kvmclock;
2890
2891         if (ka->use_master_clock)
2892                 atomic_set(&kvm_guest_has_master_clock, 1);
2893
2894         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2895         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2896                                         vcpus_matched);
2897 #endif
2898 }
2899
2900 static void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2901 {
2902         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2903 }
2904
2905 static void __kvm_start_pvclock_update(struct kvm *kvm)
2906 {
2907         raw_spin_lock_irq(&kvm->arch.tsc_write_lock);
2908         write_seqcount_begin(&kvm->arch.pvclock_sc);
2909 }
2910
2911 static void kvm_start_pvclock_update(struct kvm *kvm)
2912 {
2913         kvm_make_mclock_inprogress_request(kvm);
2914
2915         /* no guest entries from this point */
2916         __kvm_start_pvclock_update(kvm);
2917 }
2918
2919 static void kvm_end_pvclock_update(struct kvm *kvm)
2920 {
2921         struct kvm_arch *ka = &kvm->arch;
2922         struct kvm_vcpu *vcpu;
2923         unsigned long i;
2924
2925         write_seqcount_end(&ka->pvclock_sc);
2926         raw_spin_unlock_irq(&ka->tsc_write_lock);
2927         kvm_for_each_vcpu(i, vcpu, kvm)
2928                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2929
2930         /* guest entries allowed */
2931         kvm_for_each_vcpu(i, vcpu, kvm)
2932                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2933 }
2934
2935 static void kvm_update_masterclock(struct kvm *kvm)
2936 {
2937         kvm_hv_request_tsc_page_update(kvm);
2938         kvm_start_pvclock_update(kvm);
2939         pvclock_update_vm_gtod_copy(kvm);
2940         kvm_end_pvclock_update(kvm);
2941 }
2942
2943 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc.  */
2944 static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2945 {
2946         struct kvm_arch *ka = &kvm->arch;
2947         struct pvclock_vcpu_time_info hv_clock;
2948
2949         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2950         get_cpu();
2951
2952         data->flags = 0;
2953         if (ka->use_master_clock && __this_cpu_read(cpu_tsc_khz)) {
2954 #ifdef CONFIG_X86_64
2955                 struct timespec64 ts;
2956
2957                 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) {
2958                         data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec;
2959                         data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC;
2960                 } else
2961 #endif
2962                 data->host_tsc = rdtsc();
2963
2964                 data->flags |= KVM_CLOCK_TSC_STABLE;
2965                 hv_clock.tsc_timestamp = ka->master_cycle_now;
2966                 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2967                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2968                                    &hv_clock.tsc_shift,
2969                                    &hv_clock.tsc_to_system_mul);
2970                 data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);
2971         } else {
2972                 data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;
2973         }
2974
2975         put_cpu();
2976 }
2977
2978 static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2979 {
2980         struct kvm_arch *ka = &kvm->arch;
2981         unsigned seq;
2982
2983         do {
2984                 seq = read_seqcount_begin(&ka->pvclock_sc);
2985                 __get_kvmclock(kvm, data);
2986         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2987 }
2988
2989 u64 get_kvmclock_ns(struct kvm *kvm)
2990 {
2991         struct kvm_clock_data data;
2992
2993         get_kvmclock(kvm, &data);
2994         return data.clock;
2995 }
2996
2997 static void kvm_setup_guest_pvclock(struct kvm_vcpu *v,
2998                                     struct gfn_to_pfn_cache *gpc,
2999                                     unsigned int offset)
3000 {
3001         struct kvm_vcpu_arch *vcpu = &v->arch;
3002         struct pvclock_vcpu_time_info *guest_hv_clock;
3003         unsigned long flags;
3004
3005         read_lock_irqsave(&gpc->lock, flags);
3006         while (!kvm_gfn_to_pfn_cache_check(v->kvm, gpc, gpc->gpa,
3007                                            offset + sizeof(*guest_hv_clock))) {
3008                 read_unlock_irqrestore(&gpc->lock, flags);
3009
3010                 if (kvm_gfn_to_pfn_cache_refresh(v->kvm, gpc, gpc->gpa,
3011                                                  offset + sizeof(*guest_hv_clock)))
3012                         return;
3013
3014                 read_lock_irqsave(&gpc->lock, flags);
3015         }
3016
3017         guest_hv_clock = (void *)(gpc->khva + offset);
3018
3019         /*
3020          * This VCPU is paused, but it's legal for a guest to read another
3021          * VCPU's kvmclock, so we really have to follow the specification where
3022          * it says that version is odd if data is being modified, and even after
3023          * it is consistent.
3024          */
3025
3026         guest_hv_clock->version = vcpu->hv_clock.version = (guest_hv_clock->version + 1) | 1;
3027         smp_wmb();
3028
3029         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
3030         vcpu->hv_clock.flags |= (guest_hv_clock->flags & PVCLOCK_GUEST_STOPPED);
3031
3032         if (vcpu->pvclock_set_guest_stopped_request) {
3033                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
3034                 vcpu->pvclock_set_guest_stopped_request = false;
3035         }
3036
3037         memcpy(guest_hv_clock, &vcpu->hv_clock, sizeof(*guest_hv_clock));
3038         smp_wmb();
3039
3040         guest_hv_clock->version = ++vcpu->hv_clock.version;
3041
3042         mark_page_dirty_in_slot(v->kvm, gpc->memslot, gpc->gpa >> PAGE_SHIFT);
3043         read_unlock_irqrestore(&gpc->lock, flags);
3044
3045         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
3046 }
3047
3048 static int kvm_guest_time_update(struct kvm_vcpu *v)
3049 {
3050         unsigned long flags, tgt_tsc_khz;
3051         unsigned seq;
3052         struct kvm_vcpu_arch *vcpu = &v->arch;
3053         struct kvm_arch *ka = &v->kvm->arch;
3054         s64 kernel_ns;
3055         u64 tsc_timestamp, host_tsc;
3056         u8 pvclock_flags;
3057         bool use_master_clock;
3058
3059         kernel_ns = 0;
3060         host_tsc = 0;
3061
3062         /*
3063          * If the host uses TSC clock, then passthrough TSC as stable
3064          * to the guest.
3065          */
3066         do {
3067                 seq = read_seqcount_begin(&ka->pvclock_sc);
3068                 use_master_clock = ka->use_master_clock;
3069                 if (use_master_clock) {
3070                         host_tsc = ka->master_cycle_now;
3071                         kernel_ns = ka->master_kernel_ns;
3072                 }
3073         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
3074
3075         /* Keep irq disabled to prevent changes to the clock */
3076         local_irq_save(flags);
3077         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
3078         if (unlikely(tgt_tsc_khz == 0)) {
3079                 local_irq_restore(flags);
3080                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3081                 return 1;
3082         }
3083         if (!use_master_clock) {
3084                 host_tsc = rdtsc();
3085                 kernel_ns = get_kvmclock_base_ns();
3086         }
3087
3088         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
3089
3090         /*
3091          * We may have to catch up the TSC to match elapsed wall clock
3092          * time for two reasons, even if kvmclock is used.
3093          *   1) CPU could have been running below the maximum TSC rate
3094          *   2) Broken TSC compensation resets the base at each VCPU
3095          *      entry to avoid unknown leaps of TSC even when running
3096          *      again on the same CPU.  This may cause apparent elapsed
3097          *      time to disappear, and the guest to stand still or run
3098          *      very slowly.
3099          */
3100         if (vcpu->tsc_catchup) {
3101                 u64 tsc = compute_guest_tsc(v, kernel_ns);
3102                 if (tsc > tsc_timestamp) {
3103                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3104                         tsc_timestamp = tsc;
3105                 }
3106         }
3107
3108         local_irq_restore(flags);
3109
3110         /* With all the info we got, fill in the values */
3111
3112         if (kvm_caps.has_tsc_control)
3113                 tgt_tsc_khz = kvm_scale_tsc(tgt_tsc_khz,
3114                                             v->arch.l1_tsc_scaling_ratio);
3115
3116         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3117                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3118                                    &vcpu->hv_clock.tsc_shift,
3119                                    &vcpu->hv_clock.tsc_to_system_mul);
3120                 vcpu->hw_tsc_khz = tgt_tsc_khz;
3121         }
3122
3123         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3124         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3125         vcpu->last_guest_tsc = tsc_timestamp;
3126
3127         /* If the host uses TSC clocksource, then it is stable */
3128         pvclock_flags = 0;
3129         if (use_master_clock)
3130                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3131
3132         vcpu->hv_clock.flags = pvclock_flags;
3133
3134         if (vcpu->pv_time.active)
3135                 kvm_setup_guest_pvclock(v, &vcpu->pv_time, 0);
3136         if (vcpu->xen.vcpu_info_cache.active)
3137                 kvm_setup_guest_pvclock(v, &vcpu->xen.vcpu_info_cache,
3138                                         offsetof(struct compat_vcpu_info, time));
3139         if (vcpu->xen.vcpu_time_info_cache.active)
3140                 kvm_setup_guest_pvclock(v, &vcpu->xen.vcpu_time_info_cache, 0);
3141         kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3142         return 0;
3143 }
3144
3145 /*
3146  * kvmclock updates which are isolated to a given vcpu, such as
3147  * vcpu->cpu migration, should not allow system_timestamp from
3148  * the rest of the vcpus to remain static. Otherwise ntp frequency
3149  * correction applies to one vcpu's system_timestamp but not
3150  * the others.
3151  *
3152  * So in those cases, request a kvmclock update for all vcpus.
3153  * We need to rate-limit these requests though, as they can
3154  * considerably slow guests that have a large number of vcpus.
3155  * The time for a remote vcpu to update its kvmclock is bound
3156  * by the delay we use to rate-limit the updates.
3157  */
3158
3159 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3160
3161 static void kvmclock_update_fn(struct work_struct *work)
3162 {
3163         unsigned long i;
3164         struct delayed_work *dwork = to_delayed_work(work);
3165         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3166                                            kvmclock_update_work);
3167         struct kvm *kvm = container_of(ka, struct kvm, arch);
3168         struct kvm_vcpu *vcpu;
3169
3170         kvm_for_each_vcpu(i, vcpu, kvm) {
3171                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3172                 kvm_vcpu_kick(vcpu);
3173         }
3174 }
3175
3176 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3177 {
3178         struct kvm *kvm = v->kvm;
3179
3180         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3181         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3182                                         KVMCLOCK_UPDATE_DELAY);
3183 }
3184
3185 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3186
3187 static void kvmclock_sync_fn(struct work_struct *work)
3188 {
3189         struct delayed_work *dwork = to_delayed_work(work);
3190         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3191                                            kvmclock_sync_work);
3192         struct kvm *kvm = container_of(ka, struct kvm, arch);
3193
3194         if (!kvmclock_periodic_sync)
3195                 return;
3196
3197         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3198         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3199                                         KVMCLOCK_SYNC_PERIOD);
3200 }
3201
3202 /* These helpers are safe iff @msr is known to be an MCx bank MSR. */
3203 static bool is_mci_control_msr(u32 msr)
3204 {
3205         return (msr & 3) == 0;
3206 }
3207 static bool is_mci_status_msr(u32 msr)
3208 {
3209         return (msr & 3) == 1;
3210 }
3211
3212 /*
3213  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3214  */
3215 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3216 {
3217         /* McStatusWrEn enabled? */
3218         if (guest_cpuid_is_amd_or_hygon(vcpu))
3219                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3220
3221         return false;
3222 }
3223
3224 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3225 {
3226         u64 mcg_cap = vcpu->arch.mcg_cap;
3227         unsigned bank_num = mcg_cap & 0xff;
3228         u32 msr = msr_info->index;
3229         u64 data = msr_info->data;
3230         u32 offset, last_msr;
3231
3232         switch (msr) {
3233         case MSR_IA32_MCG_STATUS:
3234                 vcpu->arch.mcg_status = data;
3235                 break;
3236         case MSR_IA32_MCG_CTL:
3237                 if (!(mcg_cap & MCG_CTL_P) &&
3238                     (data || !msr_info->host_initiated))
3239                         return 1;
3240                 if (data != 0 && data != ~(u64)0)
3241                         return 1;
3242                 vcpu->arch.mcg_ctl = data;
3243                 break;
3244         case MSR_IA32_MC0_CTL2 ... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) - 1:
3245                 last_msr = MSR_IA32_MCx_CTL2(bank_num) - 1;
3246                 if (msr > last_msr)
3247                         return 1;
3248
3249                 if (!(mcg_cap & MCG_CMCI_P) && (data || !msr_info->host_initiated))
3250                         return 1;
3251                 /* An attempt to write a 1 to a reserved bit raises #GP */
3252                 if (data & ~(MCI_CTL2_CMCI_EN | MCI_CTL2_CMCI_THRESHOLD_MASK))
3253                         return 1;
3254                 offset = array_index_nospec(msr - MSR_IA32_MC0_CTL2,
3255                                             last_msr + 1 - MSR_IA32_MC0_CTL2);
3256                 vcpu->arch.mci_ctl2_banks[offset] = data;
3257                 break;
3258         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3259                 last_msr = MSR_IA32_MCx_CTL(bank_num) - 1;
3260                 if (msr > last_msr)
3261                         return 1;
3262
3263                 /*
3264                  * Only 0 or all 1s can be written to IA32_MCi_CTL, all other
3265                  * values are architecturally undefined.  But, some Linux
3266                  * kernels clear bit 10 in bank 4 to workaround a BIOS/GART TLB
3267                  * issue on AMD K8s, allow bit 10 to be clear when setting all
3268                  * other bits in order to avoid an uncaught #GP in the guest.
3269                  *
3270                  * UNIXWARE clears bit 0 of MC1_CTL to ignore correctable,
3271                  * single-bit ECC data errors.
3272                  */
3273                 if (is_mci_control_msr(msr) &&
3274                     data != 0 && (data | (1 << 10) | 1) != ~(u64)0)
3275                         return 1;
3276
3277                 /*
3278                  * All CPUs allow writing 0 to MCi_STATUS MSRs to clear the MSR.
3279                  * AMD-based CPUs allow non-zero values, but if and only if
3280                  * HWCR[McStatusWrEn] is set.
3281                  */
3282                 if (!msr_info->host_initiated && is_mci_status_msr(msr) &&
3283                     data != 0 && !can_set_mci_status(vcpu))
3284                         return 1;
3285
3286                 offset = array_index_nospec(msr - MSR_IA32_MC0_CTL,
3287                                             last_msr + 1 - MSR_IA32_MC0_CTL);
3288                 vcpu->arch.mce_banks[offset] = data;
3289                 break;
3290         default:
3291                 return 1;
3292         }
3293         return 0;
3294 }
3295
3296 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3297 {
3298         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3299
3300         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3301 }
3302
3303 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3304 {
3305         gpa_t gpa = data & ~0x3f;
3306
3307         /* Bits 4:5 are reserved, Should be zero */
3308         if (data & 0x30)
3309                 return 1;
3310
3311         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3312             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3313                 return 1;
3314
3315         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3316             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3317                 return 1;
3318
3319         if (!lapic_in_kernel(vcpu))
3320                 return data ? 1 : 0;
3321
3322         vcpu->arch.apf.msr_en_val = data;
3323
3324         if (!kvm_pv_async_pf_enabled(vcpu)) {
3325                 kvm_clear_async_pf_completion_queue(vcpu);
3326                 kvm_async_pf_hash_reset(vcpu);
3327                 return 0;
3328         }
3329
3330         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3331                                         sizeof(u64)))
3332                 return 1;
3333
3334         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3335         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3336
3337         kvm_async_pf_wakeup_all(vcpu);
3338
3339         return 0;
3340 }
3341
3342 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3343 {
3344         /* Bits 8-63 are reserved */
3345         if (data >> 8)
3346                 return 1;
3347
3348         if (!lapic_in_kernel(vcpu))
3349                 return 1;
3350
3351         vcpu->arch.apf.msr_int_val = data;
3352
3353         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3354
3355         return 0;
3356 }
3357
3358 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3359 {
3360         kvm_gfn_to_pfn_cache_destroy(vcpu->kvm, &vcpu->arch.pv_time);
3361         vcpu->arch.time = 0;
3362 }
3363
3364 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3365 {
3366         ++vcpu->stat.tlb_flush;
3367         static_call(kvm_x86_flush_tlb_all)(vcpu);
3368 }
3369
3370 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3371 {
3372         ++vcpu->stat.tlb_flush;
3373
3374         if (!tdp_enabled) {
3375                 /*
3376                  * A TLB flush on behalf of the guest is equivalent to
3377                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3378                  * a forced sync of the shadow page tables.  Ensure all the
3379                  * roots are synced and the guest TLB in hardware is clean.
3380                  */
3381                 kvm_mmu_sync_roots(vcpu);
3382                 kvm_mmu_sync_prev_roots(vcpu);
3383         }
3384
3385         static_call(kvm_x86_flush_tlb_guest)(vcpu);
3386 }
3387
3388
3389 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3390 {
3391         ++vcpu->stat.tlb_flush;
3392         static_call(kvm_x86_flush_tlb_current)(vcpu);
3393 }
3394
3395 /*
3396  * Service "local" TLB flush requests, which are specific to the current MMU
3397  * context.  In addition to the generic event handling in vcpu_enter_guest(),
3398  * TLB flushes that are targeted at an MMU context also need to be serviced
3399  * prior before nested VM-Enter/VM-Exit.
3400  */
3401 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3402 {
3403         if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3404                 kvm_vcpu_flush_tlb_current(vcpu);
3405
3406         if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3407                 kvm_vcpu_flush_tlb_guest(vcpu);
3408 }
3409 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3410
3411 static void record_steal_time(struct kvm_vcpu *vcpu)
3412 {
3413         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3414         struct kvm_steal_time __user *st;
3415         struct kvm_memslots *slots;
3416         u64 steal;
3417         u32 version;
3418
3419         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3420                 kvm_xen_runstate_set_running(vcpu);
3421                 return;
3422         }
3423
3424         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3425                 return;
3426
3427         if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3428                 return;
3429
3430         slots = kvm_memslots(vcpu->kvm);
3431
3432         if (unlikely(slots->generation != ghc->generation ||
3433                      kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3434                 gfn_t gfn = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3435
3436                 /* We rely on the fact that it fits in a single page. */
3437                 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3438
3439                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gfn, sizeof(*st)) ||
3440                     kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3441                         return;
3442         }
3443
3444         st = (struct kvm_steal_time __user *)ghc->hva;
3445         /*
3446          * Doing a TLB flush here, on the guest's behalf, can avoid
3447          * expensive IPIs.
3448          */
3449         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3450                 u8 st_preempted = 0;
3451                 int err = -EFAULT;
3452
3453                 if (!user_access_begin(st, sizeof(*st)))
3454                         return;
3455
3456                 asm volatile("1: xchgb %0, %2\n"
3457                              "xor %1, %1\n"
3458                              "2:\n"
3459                              _ASM_EXTABLE_UA(1b, 2b)
3460                              : "+q" (st_preempted),
3461                                "+&r" (err),
3462                                "+m" (st->preempted));
3463                 if (err)
3464                         goto out;
3465
3466                 user_access_end();
3467
3468                 vcpu->arch.st.preempted = 0;
3469
3470                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3471                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3472                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3473                         kvm_vcpu_flush_tlb_guest(vcpu);
3474
3475                 if (!user_access_begin(st, sizeof(*st)))
3476                         goto dirty;
3477         } else {
3478                 if (!user_access_begin(st, sizeof(*st)))
3479                         return;
3480
3481                 unsafe_put_user(0, &st->preempted, out);
3482                 vcpu->arch.st.preempted = 0;
3483         }
3484
3485         unsafe_get_user(version, &st->version, out);
3486         if (version & 1)
3487                 version += 1;  /* first time write, random junk */
3488
3489         version += 1;
3490         unsafe_put_user(version, &st->version, out);
3491
3492         smp_wmb();
3493
3494         unsafe_get_user(steal, &st->steal, out);
3495         steal += current->sched_info.run_delay -
3496                 vcpu->arch.st.last_steal;
3497         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3498         unsafe_put_user(steal, &st->steal, out);
3499
3500         version += 1;
3501         unsafe_put_user(version, &st->version, out);
3502
3503  out:
3504         user_access_end();
3505  dirty:
3506         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3507 }
3508
3509 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3510 {
3511         bool pr = false;
3512         u32 msr = msr_info->index;
3513         u64 data = msr_info->data;
3514
3515         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3516                 return kvm_xen_write_hypercall_page(vcpu, data);
3517
3518         switch (msr) {
3519         case MSR_AMD64_NB_CFG:
3520         case MSR_IA32_UCODE_WRITE:
3521         case MSR_VM_HSAVE_PA:
3522         case MSR_AMD64_PATCH_LOADER:
3523         case MSR_AMD64_BU_CFG2:
3524         case MSR_AMD64_DC_CFG:
3525         case MSR_F15H_EX_CFG:
3526                 break;
3527
3528         case MSR_IA32_UCODE_REV:
3529                 if (msr_info->host_initiated)
3530                         vcpu->arch.microcode_version = data;
3531                 break;
3532         case MSR_IA32_ARCH_CAPABILITIES:
3533                 if (!msr_info->host_initiated)
3534                         return 1;
3535                 vcpu->arch.arch_capabilities = data;
3536                 break;
3537         case MSR_IA32_PERF_CAPABILITIES: {
3538                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3539
3540                 if (!msr_info->host_initiated)
3541                         return 1;
3542                 if (kvm_get_msr_feature(&msr_ent))
3543                         return 1;
3544                 if (data & ~msr_ent.data)
3545                         return 1;
3546
3547                 vcpu->arch.perf_capabilities = data;
3548
3549                 return 0;
3550                 }
3551         case MSR_EFER:
3552                 return set_efer(vcpu, msr_info);
3553         case MSR_K7_HWCR:
3554                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3555                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3556                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3557
3558                 /* Handle McStatusWrEn */
3559                 if (data == BIT_ULL(18)) {
3560                         vcpu->arch.msr_hwcr = data;
3561                 } else if (data != 0) {
3562                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3563                                     data);
3564                         return 1;
3565                 }
3566                 break;
3567         case MSR_FAM10H_MMIO_CONF_BASE:
3568                 if (data != 0) {
3569                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3570                                     "0x%llx\n", data);
3571                         return 1;
3572                 }
3573                 break;
3574         case 0x200 ... MSR_IA32_MC0_CTL2 - 1:
3575         case MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) ... 0x2ff:
3576                 return kvm_mtrr_set_msr(vcpu, msr, data);
3577         case MSR_IA32_APICBASE:
3578                 return kvm_set_apic_base(vcpu, msr_info);
3579         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3580                 return kvm_x2apic_msr_write(vcpu, msr, data);
3581         case MSR_IA32_TSC_DEADLINE:
3582                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3583                 break;
3584         case MSR_IA32_TSC_ADJUST:
3585                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3586                         if (!msr_info->host_initiated) {
3587                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3588                                 adjust_tsc_offset_guest(vcpu, adj);
3589                                 /* Before back to guest, tsc_timestamp must be adjusted
3590                                  * as well, otherwise guest's percpu pvclock time could jump.
3591                                  */
3592                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3593                         }
3594                         vcpu->arch.ia32_tsc_adjust_msr = data;
3595                 }
3596                 break;
3597         case MSR_IA32_MISC_ENABLE: {
3598                 u64 old_val = vcpu->arch.ia32_misc_enable_msr;
3599
3600                 if (!msr_info->host_initiated) {
3601                         /* RO bits */
3602                         if ((old_val ^ data) & MSR_IA32_MISC_ENABLE_PMU_RO_MASK)
3603                                 return 1;
3604
3605                         /* R bits, i.e. writes are ignored, but don't fault. */
3606                         data = data & ~MSR_IA32_MISC_ENABLE_EMON;
3607                         data |= old_val & MSR_IA32_MISC_ENABLE_EMON;
3608                 }
3609
3610                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3611                     ((old_val ^ data)  & MSR_IA32_MISC_ENABLE_MWAIT)) {
3612                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3613                                 return 1;
3614                         vcpu->arch.ia32_misc_enable_msr = data;
3615                         kvm_update_cpuid_runtime(vcpu);
3616                 } else {
3617                         vcpu->arch.ia32_misc_enable_msr = data;
3618                 }
3619                 break;
3620         }
3621         case MSR_IA32_SMBASE:
3622                 if (!msr_info->host_initiated)
3623                         return 1;
3624                 vcpu->arch.smbase = data;
3625                 break;
3626         case MSR_IA32_POWER_CTL:
3627                 vcpu->arch.msr_ia32_power_ctl = data;
3628                 break;
3629         case MSR_IA32_TSC:
3630                 if (msr_info->host_initiated) {
3631                         kvm_synchronize_tsc(vcpu, data);
3632                 } else {
3633                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3634                         adjust_tsc_offset_guest(vcpu, adj);
3635                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3636                 }
3637                 break;
3638         case MSR_IA32_XSS:
3639                 if (!msr_info->host_initiated &&
3640                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3641                         return 1;
3642                 /*
3643                  * KVM supports exposing PT to the guest, but does not support
3644                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3645                  * XSAVES/XRSTORS to save/restore PT MSRs.
3646                  */
3647                 if (data & ~kvm_caps.supported_xss)
3648                         return 1;
3649                 vcpu->arch.ia32_xss = data;
3650                 kvm_update_cpuid_runtime(vcpu);
3651                 break;
3652         case MSR_SMI_COUNT:
3653                 if (!msr_info->host_initiated)
3654                         return 1;
3655                 vcpu->arch.smi_count = data;
3656                 break;
3657         case MSR_KVM_WALL_CLOCK_NEW:
3658                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3659                         return 1;
3660
3661                 vcpu->kvm->arch.wall_clock = data;
3662                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3663                 break;
3664         case MSR_KVM_WALL_CLOCK:
3665                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3666                         return 1;
3667
3668                 vcpu->kvm->arch.wall_clock = data;
3669                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3670                 break;
3671         case MSR_KVM_SYSTEM_TIME_NEW:
3672                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3673                         return 1;
3674
3675                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3676                 break;
3677         case MSR_KVM_SYSTEM_TIME:
3678                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3679                         return 1;
3680
3681                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3682                 break;
3683         case MSR_KVM_ASYNC_PF_EN:
3684                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3685                         return 1;
3686
3687                 if (kvm_pv_enable_async_pf(vcpu, data))
3688                         return 1;
3689                 break;
3690         case MSR_KVM_ASYNC_PF_INT:
3691                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3692                         return 1;
3693
3694                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3695                         return 1;
3696                 break;
3697         case MSR_KVM_ASYNC_PF_ACK:
3698                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3699                         return 1;
3700                 if (data & 0x1) {
3701                         vcpu->arch.apf.pageready_pending = false;
3702                         kvm_check_async_pf_completion(vcpu);
3703                 }
3704                 break;
3705         case MSR_KVM_STEAL_TIME:
3706                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3707                         return 1;
3708
3709                 if (unlikely(!sched_info_on()))
3710                         return 1;
3711
3712                 if (data & KVM_STEAL_RESERVED_MASK)
3713                         return 1;
3714
3715                 vcpu->arch.st.msr_val = data;
3716
3717                 if (!(data & KVM_MSR_ENABLED))
3718                         break;
3719
3720                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3721
3722                 break;
3723         case MSR_KVM_PV_EOI_EN:
3724                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3725                         return 1;
3726
3727                 if (kvm_lapic_set_pv_eoi(vcpu, data, sizeof(u8)))
3728                         return 1;
3729                 break;
3730
3731         case MSR_KVM_POLL_CONTROL:
3732                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3733                         return 1;
3734
3735                 /* only enable bit supported */
3736                 if (data & (-1ULL << 1))
3737                         return 1;
3738
3739                 vcpu->arch.msr_kvm_poll_control = data;
3740                 break;
3741
3742         case MSR_IA32_MCG_CTL:
3743         case MSR_IA32_MCG_STATUS:
3744         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3745         case MSR_IA32_MC0_CTL2 ... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) - 1:
3746                 return set_msr_mce(vcpu, msr_info);
3747
3748         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3749         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3750                 pr = true;
3751                 fallthrough;
3752         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3753         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3754                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3755                         return kvm_pmu_set_msr(vcpu, msr_info);
3756
3757                 if (pr || data != 0)
3758                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3759                                     "0x%x data 0x%llx\n", msr, data);
3760                 break;
3761         case MSR_K7_CLK_CTL:
3762                 /*
3763                  * Ignore all writes to this no longer documented MSR.
3764                  * Writes are only relevant for old K7 processors,
3765                  * all pre-dating SVM, but a recommended workaround from
3766                  * AMD for these chips. It is possible to specify the
3767                  * affected processor models on the command line, hence
3768                  * the need to ignore the workaround.
3769                  */
3770                 break;
3771         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3772         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3773         case HV_X64_MSR_SYNDBG_OPTIONS:
3774         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3775         case HV_X64_MSR_CRASH_CTL:
3776         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3777         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3778         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3779         case HV_X64_MSR_TSC_EMULATION_STATUS:
3780                 return kvm_hv_set_msr_common(vcpu, msr, data,
3781                                              msr_info->host_initiated);
3782         case MSR_IA32_BBL_CR_CTL3:
3783                 /* Drop writes to this legacy MSR -- see rdmsr
3784                  * counterpart for further detail.
3785                  */
3786                 if (report_ignored_msrs)
3787                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3788                                 msr, data);
3789                 break;
3790         case MSR_AMD64_OSVW_ID_LENGTH:
3791                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3792                         return 1;
3793                 vcpu->arch.osvw.length = data;
3794                 break;
3795         case MSR_AMD64_OSVW_STATUS:
3796                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3797                         return 1;
3798                 vcpu->arch.osvw.status = data;
3799                 break;
3800         case MSR_PLATFORM_INFO:
3801                 if (!msr_info->host_initiated ||
3802                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3803                      cpuid_fault_enabled(vcpu)))
3804                         return 1;
3805                 vcpu->arch.msr_platform_info = data;
3806                 break;
3807         case MSR_MISC_FEATURES_ENABLES:
3808                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3809                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3810                      !supports_cpuid_fault(vcpu)))
3811                         return 1;
3812                 vcpu->arch.msr_misc_features_enables = data;
3813                 break;
3814 #ifdef CONFIG_X86_64
3815         case MSR_IA32_XFD:
3816                 if (!msr_info->host_initiated &&
3817                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3818                         return 1;
3819
3820                 if (data & ~kvm_guest_supported_xfd(vcpu))
3821                         return 1;
3822
3823                 fpu_update_guest_xfd(&vcpu->arch.guest_fpu, data);
3824                 break;
3825         case MSR_IA32_XFD_ERR:
3826                 if (!msr_info->host_initiated &&
3827                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3828                         return 1;
3829
3830                 if (data & ~kvm_guest_supported_xfd(vcpu))
3831                         return 1;
3832
3833                 vcpu->arch.guest_fpu.xfd_err = data;
3834                 break;
3835 #endif
3836         case MSR_IA32_PEBS_ENABLE:
3837         case MSR_IA32_DS_AREA:
3838         case MSR_PEBS_DATA_CFG:
3839         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3840                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3841                         return kvm_pmu_set_msr(vcpu, msr_info);
3842                 /*
3843                  * Userspace is allowed to write '0' to MSRs that KVM reports
3844                  * as to-be-saved, even if an MSRs isn't fully supported.
3845                  */
3846                 return !msr_info->host_initiated || data;
3847         default:
3848                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3849                         return kvm_pmu_set_msr(vcpu, msr_info);
3850                 return KVM_MSR_RET_INVALID;
3851         }
3852         return 0;
3853 }
3854 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3855
3856 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3857 {
3858         u64 data;
3859         u64 mcg_cap = vcpu->arch.mcg_cap;
3860         unsigned bank_num = mcg_cap & 0xff;
3861         u32 offset, last_msr;
3862
3863         switch (msr) {
3864         case MSR_IA32_P5_MC_ADDR:
3865         case MSR_IA32_P5_MC_TYPE:
3866                 data = 0;
3867                 break;
3868         case MSR_IA32_MCG_CAP:
3869                 data = vcpu->arch.mcg_cap;
3870                 break;
3871         case MSR_IA32_MCG_CTL:
3872                 if (!(mcg_cap & MCG_CTL_P) && !host)
3873                         return 1;
3874                 data = vcpu->arch.mcg_ctl;
3875                 break;
3876         case MSR_IA32_MCG_STATUS:
3877                 data = vcpu->arch.mcg_status;
3878                 break;
3879         case MSR_IA32_MC0_CTL2 ... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) - 1:
3880                 last_msr = MSR_IA32_MCx_CTL2(bank_num) - 1;
3881                 if (msr > last_msr)
3882                         return 1;
3883
3884                 if (!(mcg_cap & MCG_CMCI_P) && !host)
3885                         return 1;
3886                 offset = array_index_nospec(msr - MSR_IA32_MC0_CTL2,
3887                                             last_msr + 1 - MSR_IA32_MC0_CTL2);
3888                 data = vcpu->arch.mci_ctl2_banks[offset];
3889                 break;
3890         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3891                 last_msr = MSR_IA32_MCx_CTL(bank_num) - 1;
3892                 if (msr > last_msr)
3893                         return 1;
3894
3895                 offset = array_index_nospec(msr - MSR_IA32_MC0_CTL,
3896                                             last_msr + 1 - MSR_IA32_MC0_CTL);
3897                 data = vcpu->arch.mce_banks[offset];
3898                 break;
3899         default:
3900                 return 1;
3901         }
3902         *pdata = data;
3903         return 0;
3904 }
3905
3906 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3907 {
3908         switch (msr_info->index) {
3909         case MSR_IA32_PLATFORM_ID:
3910         case MSR_IA32_EBL_CR_POWERON:
3911         case MSR_IA32_LASTBRANCHFROMIP:
3912         case MSR_IA32_LASTBRANCHTOIP:
3913         case MSR_IA32_LASTINTFROMIP:
3914         case MSR_IA32_LASTINTTOIP:
3915         case MSR_AMD64_SYSCFG:
3916         case MSR_K8_TSEG_ADDR:
3917         case MSR_K8_TSEG_MASK:
3918         case MSR_VM_HSAVE_PA:
3919         case MSR_K8_INT_PENDING_MSG:
3920         case MSR_AMD64_NB_CFG:
3921         case MSR_FAM10H_MMIO_CONF_BASE:
3922         case MSR_AMD64_BU_CFG2:
3923         case MSR_IA32_PERF_CTL:
3924         case MSR_AMD64_DC_CFG:
3925         case MSR_F15H_EX_CFG:
3926         /*
3927          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3928          * limit) MSRs. Just return 0, as we do not want to expose the host
3929          * data here. Do not conditionalize this on CPUID, as KVM does not do
3930          * so for existing CPU-specific MSRs.
3931          */
3932         case MSR_RAPL_POWER_UNIT:
3933         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3934         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3935         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3936         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3937                 msr_info->data = 0;
3938                 break;
3939         case MSR_IA32_PEBS_ENABLE:
3940         case MSR_IA32_DS_AREA:
3941         case MSR_PEBS_DATA_CFG:
3942         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3943                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3944                         return kvm_pmu_get_msr(vcpu, msr_info);
3945                 /*
3946                  * Userspace is allowed to read MSRs that KVM reports as
3947                  * to-be-saved, even if an MSR isn't fully supported.
3948                  */
3949                 if (!msr_info->host_initiated)
3950                         return 1;
3951                 msr_info->data = 0;
3952                 break;
3953         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3954         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3955         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3956         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3957                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3958                         return kvm_pmu_get_msr(vcpu, msr_info);
3959                 msr_info->data = 0;
3960                 break;
3961         case MSR_IA32_UCODE_REV:
3962                 msr_info->data = vcpu->arch.microcode_version;
3963                 break;
3964         case MSR_IA32_ARCH_CAPABILITIES:
3965                 if (!msr_info->host_initiated &&
3966                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3967                         return 1;
3968                 msr_info->data = vcpu->arch.arch_capabilities;
3969                 break;
3970         case MSR_IA32_PERF_CAPABILITIES:
3971                 if (!msr_info->host_initiated &&
3972                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3973                         return 1;
3974                 msr_info->data = vcpu->arch.perf_capabilities;
3975                 break;
3976         case MSR_IA32_POWER_CTL:
3977                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3978                 break;
3979         case MSR_IA32_TSC: {
3980                 /*
3981                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3982                  * even when not intercepted. AMD manual doesn't explicitly
3983                  * state this but appears to behave the same.
3984                  *
3985                  * On userspace reads and writes, however, we unconditionally
3986                  * return L1's TSC value to ensure backwards-compatible
3987                  * behavior for migration.
3988                  */
3989                 u64 offset, ratio;
3990
3991                 if (msr_info->host_initiated) {
3992                         offset = vcpu->arch.l1_tsc_offset;
3993                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3994                 } else {
3995                         offset = vcpu->arch.tsc_offset;
3996                         ratio = vcpu->arch.tsc_scaling_ratio;
3997                 }
3998
3999                 msr_info->data = kvm_scale_tsc(rdtsc(), ratio) + offset;
4000                 break;
4001         }
4002         case MSR_MTRRcap:
4003         case 0x200 ... MSR_IA32_MC0_CTL2 - 1:
4004         case MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) ... 0x2ff:
4005                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
4006         case 0xcd: /* fsb frequency */
4007                 msr_info->data = 3;
4008                 break;
4009                 /*
4010                  * MSR_EBC_FREQUENCY_ID
4011                  * Conservative value valid for even the basic CPU models.
4012                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
4013                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
4014                  * and 266MHz for model 3, or 4. Set Core Clock
4015                  * Frequency to System Bus Frequency Ratio to 1 (bits
4016                  * 31:24) even though these are only valid for CPU
4017                  * models > 2, however guests may end up dividing or
4018                  * multiplying by zero otherwise.
4019                  */
4020         case MSR_EBC_FREQUENCY_ID:
4021                 msr_info->data = 1 << 24;
4022                 break;
4023         case MSR_IA32_APICBASE:
4024                 msr_info->data = kvm_get_apic_base(vcpu);
4025                 break;
4026         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
4027                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
4028         case MSR_IA32_TSC_DEADLINE:
4029                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
4030                 break;
4031         case MSR_IA32_TSC_ADJUST:
4032                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
4033                 break;
4034         case MSR_IA32_MISC_ENABLE:
4035                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
4036                 break;
4037         case MSR_IA32_SMBASE:
4038                 if (!msr_info->host_initiated)
4039                         return 1;
4040                 msr_info->data = vcpu->arch.smbase;
4041                 break;
4042         case MSR_SMI_COUNT:
4043                 msr_info->data = vcpu->arch.smi_count;
4044                 break;
4045         case MSR_IA32_PERF_STATUS:
4046                 /* TSC increment by tick */
4047                 msr_info->data = 1000ULL;
4048                 /* CPU multiplier */
4049                 msr_info->data |= (((uint64_t)4ULL) << 40);
4050                 break;
4051         case MSR_EFER:
4052                 msr_info->data = vcpu->arch.efer;
4053                 break;
4054         case MSR_KVM_WALL_CLOCK:
4055                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
4056                         return 1;
4057
4058                 msr_info->data = vcpu->kvm->arch.wall_clock;
4059                 break;
4060         case MSR_KVM_WALL_CLOCK_NEW:
4061                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
4062                         return 1;
4063
4064                 msr_info->data = vcpu->kvm->arch.wall_clock;
4065                 break;
4066         case MSR_KVM_SYSTEM_TIME:
4067                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
4068                         return 1;
4069
4070                 msr_info->data = vcpu->arch.time;
4071                 break;
4072         case MSR_KVM_SYSTEM_TIME_NEW:
4073                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
4074                         return 1;
4075
4076                 msr_info->data = vcpu->arch.time;
4077                 break;
4078         case MSR_KVM_ASYNC_PF_EN:
4079                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
4080                         return 1;
4081
4082                 msr_info->data = vcpu->arch.apf.msr_en_val;
4083                 break;
4084         case MSR_KVM_ASYNC_PF_INT:
4085                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
4086                         return 1;
4087
4088                 msr_info->data = vcpu->arch.apf.msr_int_val;
4089                 break;
4090         case MSR_KVM_ASYNC_PF_ACK:
4091                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
4092                         return 1;
4093
4094                 msr_info->data = 0;
4095                 break;
4096         case MSR_KVM_STEAL_TIME:
4097                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
4098                         return 1;
4099
4100                 msr_info->data = vcpu->arch.st.msr_val;
4101                 break;
4102         case MSR_KVM_PV_EOI_EN:
4103                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
4104                         return 1;
4105
4106                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
4107                 break;
4108         case MSR_KVM_POLL_CONTROL:
4109                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
4110                         return 1;
4111
4112                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
4113                 break;
4114         case MSR_IA32_P5_MC_ADDR:
4115         case MSR_IA32_P5_MC_TYPE:
4116         case MSR_IA32_MCG_CAP:
4117         case MSR_IA32_MCG_CTL:
4118         case MSR_IA32_MCG_STATUS:
4119         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
4120         case MSR_IA32_MC0_CTL2 ... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) - 1:
4121                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
4122                                    msr_info->host_initiated);
4123         case MSR_IA32_XSS:
4124                 if (!msr_info->host_initiated &&
4125                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
4126                         return 1;
4127                 msr_info->data = vcpu->arch.ia32_xss;
4128                 break;
4129         case MSR_K7_CLK_CTL:
4130                 /*
4131                  * Provide expected ramp-up count for K7. All other
4132                  * are set to zero, indicating minimum divisors for
4133                  * every field.
4134                  *
4135                  * This prevents guest kernels on AMD host with CPU
4136                  * type 6, model 8 and higher from exploding due to
4137                  * the rdmsr failing.
4138                  */
4139                 msr_info->data = 0x20000000;
4140                 break;
4141         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
4142         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
4143         case HV_X64_MSR_SYNDBG_OPTIONS:
4144         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
4145         case HV_X64_MSR_CRASH_CTL:
4146         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
4147         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
4148         case HV_X64_MSR_TSC_EMULATION_CONTROL:
4149         case HV_X64_MSR_TSC_EMULATION_STATUS:
4150                 return kvm_hv_get_msr_common(vcpu,
4151                                              msr_info->index, &msr_info->data,
4152                                              msr_info->host_initiated);
4153         case MSR_IA32_BBL_CR_CTL3:
4154                 /* This legacy MSR exists but isn't fully documented in current
4155                  * silicon.  It is however accessed by winxp in very narrow
4156                  * scenarios where it sets bit #19, itself documented as
4157                  * a "reserved" bit.  Best effort attempt to source coherent
4158                  * read data here should the balance of the register be
4159                  * interpreted by the guest:
4160                  *
4161                  * L2 cache control register 3: 64GB range, 256KB size,
4162                  * enabled, latency 0x1, configured
4163                  */
4164                 msr_info->data = 0xbe702111;
4165                 break;
4166         case MSR_AMD64_OSVW_ID_LENGTH:
4167                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4168                         return 1;
4169                 msr_info->data = vcpu->arch.osvw.length;
4170                 break;
4171         case MSR_AMD64_OSVW_STATUS:
4172                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4173                         return 1;
4174                 msr_info->data = vcpu->arch.osvw.status;
4175                 break;
4176         case MSR_PLATFORM_INFO:
4177                 if (!msr_info->host_initiated &&
4178                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
4179                         return 1;
4180                 msr_info->data = vcpu->arch.msr_platform_info;
4181                 break;
4182         case MSR_MISC_FEATURES_ENABLES:
4183                 msr_info->data = vcpu->arch.msr_misc_features_enables;
4184                 break;
4185         case MSR_K7_HWCR:
4186                 msr_info->data = vcpu->arch.msr_hwcr;
4187                 break;
4188 #ifdef CONFIG_X86_64
4189         case MSR_IA32_XFD:
4190                 if (!msr_info->host_initiated &&
4191                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4192                         return 1;
4193
4194                 msr_info->data = vcpu->arch.guest_fpu.fpstate->xfd;
4195                 break;
4196         case MSR_IA32_XFD_ERR:
4197                 if (!msr_info->host_initiated &&
4198                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4199                         return 1;
4200
4201                 msr_info->data = vcpu->arch.guest_fpu.xfd_err;
4202                 break;
4203 #endif
4204         default:
4205                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
4206                         return kvm_pmu_get_msr(vcpu, msr_info);
4207                 return KVM_MSR_RET_INVALID;
4208         }
4209         return 0;
4210 }
4211 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
4212
4213 /*
4214  * Read or write a bunch of msrs. All parameters are kernel addresses.
4215  *
4216  * @return number of msrs set successfully.
4217  */
4218 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
4219                     struct kvm_msr_entry *entries,
4220                     int (*do_msr)(struct kvm_vcpu *vcpu,
4221                                   unsigned index, u64 *data))
4222 {
4223         int i;
4224
4225         for (i = 0; i < msrs->nmsrs; ++i)
4226                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4227                         break;
4228
4229         return i;
4230 }
4231
4232 /*
4233  * Read or write a bunch of msrs. Parameters are user addresses.
4234  *
4235  * @return number of msrs set successfully.
4236  */
4237 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4238                   int (*do_msr)(struct kvm_vcpu *vcpu,
4239                                 unsigned index, u64 *data),
4240                   int writeback)
4241 {
4242         struct kvm_msrs msrs;
4243         struct kvm_msr_entry *entries;
4244         int r, n;
4245         unsigned size;
4246
4247         r = -EFAULT;
4248         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4249                 goto out;
4250
4251         r = -E2BIG;
4252         if (msrs.nmsrs >= MAX_IO_MSRS)
4253                 goto out;
4254
4255         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4256         entries = memdup_user(user_msrs->entries, size);
4257         if (IS_ERR(entries)) {
4258                 r = PTR_ERR(entries);
4259                 goto out;
4260         }
4261
4262         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4263         if (r < 0)
4264                 goto out_free;
4265
4266         r = -EFAULT;
4267         if (writeback && copy_to_user(user_msrs->entries, entries, size))
4268                 goto out_free;
4269
4270         r = n;
4271
4272 out_free:
4273         kfree(entries);
4274 out:
4275         return r;
4276 }
4277
4278 static inline bool kvm_can_mwait_in_guest(void)
4279 {
4280         return boot_cpu_has(X86_FEATURE_MWAIT) &&
4281                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4282                 boot_cpu_has(X86_FEATURE_ARAT);
4283 }
4284
4285 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4286                                             struct kvm_cpuid2 __user *cpuid_arg)
4287 {
4288         struct kvm_cpuid2 cpuid;
4289         int r;
4290
4291         r = -EFAULT;
4292         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4293                 return r;
4294
4295         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4296         if (r)
4297                 return r;
4298
4299         r = -EFAULT;
4300         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4301                 return r;
4302
4303         return 0;
4304 }
4305
4306 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4307 {
4308         int r = 0;
4309
4310         switch (ext) {
4311         case KVM_CAP_IRQCHIP:
4312         case KVM_CAP_HLT:
4313         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4314         case KVM_CAP_SET_TSS_ADDR:
4315         case KVM_CAP_EXT_CPUID:
4316         case KVM_CAP_EXT_EMUL_CPUID:
4317         case KVM_CAP_CLOCKSOURCE:
4318         case KVM_CAP_PIT:
4319         case KVM_CAP_NOP_IO_DELAY:
4320         case KVM_CAP_MP_STATE:
4321         case KVM_CAP_SYNC_MMU:
4322         case KVM_CAP_USER_NMI:
4323         case KVM_CAP_REINJECT_CONTROL:
4324         case KVM_CAP_IRQ_INJECT_STATUS:
4325         case KVM_CAP_IOEVENTFD:
4326         case KVM_CAP_IOEVENTFD_NO_LENGTH:
4327         case KVM_CAP_PIT2:
4328         case KVM_CAP_PIT_STATE2:
4329         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4330         case KVM_CAP_VCPU_EVENTS:
4331         case KVM_CAP_HYPERV:
4332         case KVM_CAP_HYPERV_VAPIC:
4333         case KVM_CAP_HYPERV_SPIN:
4334         case KVM_CAP_HYPERV_SYNIC:
4335         case KVM_CAP_HYPERV_SYNIC2:
4336         case KVM_CAP_HYPERV_VP_INDEX:
4337         case KVM_CAP_HYPERV_EVENTFD:
4338         case KVM_CAP_HYPERV_TLBFLUSH:
4339         case KVM_CAP_HYPERV_SEND_IPI:
4340         case KVM_CAP_HYPERV_CPUID:
4341         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4342         case KVM_CAP_SYS_HYPERV_CPUID:
4343         case KVM_CAP_PCI_SEGMENT:
4344         case KVM_CAP_DEBUGREGS:
4345         case KVM_CAP_X86_ROBUST_SINGLESTEP:
4346         case KVM_CAP_XSAVE:
4347         case KVM_CAP_ASYNC_PF:
4348         case KVM_CAP_ASYNC_PF_INT:
4349         case KVM_CAP_GET_TSC_KHZ:
4350         case KVM_CAP_KVMCLOCK_CTRL:
4351         case KVM_CAP_READONLY_MEM:
4352         case KVM_CAP_HYPERV_TIME:
4353         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4354         case KVM_CAP_TSC_DEADLINE_TIMER:
4355         case KVM_CAP_DISABLE_QUIRKS:
4356         case KVM_CAP_SET_BOOT_CPU_ID:
4357         case KVM_CAP_SPLIT_IRQCHIP:
4358         case KVM_CAP_IMMEDIATE_EXIT:
4359         case KVM_CAP_PMU_EVENT_FILTER:
4360         case KVM_CAP_GET_MSR_FEATURES:
4361         case KVM_CAP_MSR_PLATFORM_INFO:
4362         case KVM_CAP_EXCEPTION_PAYLOAD:
4363         case KVM_CAP_X86_TRIPLE_FAULT_EVENT:
4364         case KVM_CAP_SET_GUEST_DEBUG:
4365         case KVM_CAP_LAST_CPU:
4366         case KVM_CAP_X86_USER_SPACE_MSR:
4367         case KVM_CAP_X86_MSR_FILTER:
4368         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4369 #ifdef CONFIG_X86_SGX_KVM
4370         case KVM_CAP_SGX_ATTRIBUTE:
4371 #endif
4372         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4373         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
4374         case KVM_CAP_SREGS2:
4375         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4376         case KVM_CAP_VCPU_ATTRIBUTES:
4377         case KVM_CAP_SYS_ATTRIBUTES:
4378         case KVM_CAP_VAPIC:
4379         case KVM_CAP_ENABLE_CAP:
4380         case KVM_CAP_VM_DISABLE_NX_HUGE_PAGES:
4381                 r = 1;
4382                 break;
4383         case KVM_CAP_EXIT_HYPERCALL:
4384                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4385                 break;
4386         case KVM_CAP_SET_GUEST_DEBUG2:
4387                 return KVM_GUESTDBG_VALID_MASK;
4388 #ifdef CONFIG_KVM_XEN
4389         case KVM_CAP_XEN_HVM:
4390                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4391                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4392                     KVM_XEN_HVM_CONFIG_SHARED_INFO |
4393                     KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL |
4394                     KVM_XEN_HVM_CONFIG_EVTCHN_SEND;
4395                 if (sched_info_on())
4396                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4397                 break;
4398 #endif
4399         case KVM_CAP_SYNC_REGS:
4400                 r = KVM_SYNC_X86_VALID_FIELDS;
4401                 break;
4402         case KVM_CAP_ADJUST_CLOCK:
4403                 r = KVM_CLOCK_VALID_FLAGS;
4404                 break;
4405         case KVM_CAP_X86_DISABLE_EXITS:
4406                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4407                       KVM_X86_DISABLE_EXITS_CSTATE;
4408                 if(kvm_can_mwait_in_guest())
4409                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4410                 break;
4411         case KVM_CAP_X86_SMM:
4412                 /* SMBASE is usually relocated above 1M on modern chipsets,
4413                  * and SMM handlers might indeed rely on 4G segment limits,
4414                  * so do not report SMM to be available if real mode is
4415                  * emulated via vm86 mode.  Still, do not go to great lengths
4416                  * to avoid userspace's usage of the feature, because it is a
4417                  * fringe case that is not enabled except via specific settings
4418                  * of the module parameters.
4419                  */
4420                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4421                 break;
4422         case KVM_CAP_NR_VCPUS:
4423                 r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS);
4424                 break;
4425         case KVM_CAP_MAX_VCPUS:
4426                 r = KVM_MAX_VCPUS;
4427                 break;
4428         case KVM_CAP_MAX_VCPU_ID:
4429                 r = KVM_MAX_VCPU_IDS;
4430                 break;
4431         case KVM_CAP_PV_MMU:    /* obsolete */
4432                 r = 0;
4433                 break;
4434         case KVM_CAP_MCE:
4435                 r = KVM_MAX_MCE_BANKS;
4436                 break;
4437         case KVM_CAP_XCRS:
4438                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4439                 break;
4440         case KVM_CAP_TSC_CONTROL:
4441         case KVM_CAP_VM_TSC_CONTROL:
4442                 r = kvm_caps.has_tsc_control;
4443                 break;
4444         case KVM_CAP_X2APIC_API:
4445                 r = KVM_X2APIC_API_VALID_FLAGS;
4446                 break;
4447         case KVM_CAP_NESTED_STATE:
4448                 r = kvm_x86_ops.nested_ops->get_state ?
4449                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4450                 break;
4451         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4452                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4453                 break;
4454         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4455                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4456                 break;
4457         case KVM_CAP_SMALLER_MAXPHYADDR:
4458                 r = (int) allow_smaller_maxphyaddr;
4459                 break;
4460         case KVM_CAP_STEAL_TIME:
4461                 r = sched_info_on();
4462                 break;
4463         case KVM_CAP_X86_BUS_LOCK_EXIT:
4464                 if (kvm_caps.has_bus_lock_exit)
4465                         r = KVM_BUS_LOCK_DETECTION_OFF |
4466                             KVM_BUS_LOCK_DETECTION_EXIT;
4467                 else
4468                         r = 0;
4469                 break;
4470         case KVM_CAP_XSAVE2: {
4471                 u64 guest_perm = xstate_get_guest_group_perm();
4472
4473                 r = xstate_required_size(kvm_caps.supported_xcr0 & guest_perm, false);
4474                 if (r < sizeof(struct kvm_xsave))
4475                         r = sizeof(struct kvm_xsave);
4476                 break;
4477         }
4478         case KVM_CAP_PMU_CAPABILITY:
4479                 r = enable_pmu ? KVM_CAP_PMU_VALID_MASK : 0;
4480                 break;
4481         case KVM_CAP_DISABLE_QUIRKS2:
4482                 r = KVM_X86_VALID_QUIRKS;
4483                 break;
4484         case KVM_CAP_X86_NOTIFY_VMEXIT:
4485                 r = kvm_caps.has_notify_vmexit;
4486                 break;
4487         default:
4488                 break;
4489         }
4490         return r;
4491 }
4492
4493 static inline void __user *kvm_get_attr_addr(struct kvm_device_attr *attr)
4494 {
4495         void __user *uaddr = (void __user*)(unsigned long)attr->addr;
4496
4497         if ((u64)(unsigned long)uaddr != attr->addr)
4498                 return ERR_PTR_USR(-EFAULT);
4499         return uaddr;
4500 }
4501
4502 static int kvm_x86_dev_get_attr(struct kvm_device_attr *attr)
4503 {
4504         u64 __user *uaddr = kvm_get_attr_addr(attr);
4505
4506         if (attr->group)
4507                 return -ENXIO;
4508
4509         if (IS_ERR(uaddr))
4510                 return PTR_ERR(uaddr);
4511
4512         switch (attr->attr) {
4513         case KVM_X86_XCOMP_GUEST_SUPP:
4514                 if (put_user(kvm_caps.supported_xcr0, uaddr))
4515                         return -EFAULT;
4516                 return 0;
4517         default:
4518                 return -ENXIO;
4519                 break;
4520         }
4521 }
4522
4523 static int kvm_x86_dev_has_attr(struct kvm_device_attr *attr)
4524 {
4525         if (attr->group)
4526                 return -ENXIO;
4527
4528         switch (attr->attr) {
4529         case KVM_X86_XCOMP_GUEST_SUPP:
4530                 return 0;
4531         default:
4532                 return -ENXIO;
4533         }
4534 }
4535
4536 long kvm_arch_dev_ioctl(struct file *filp,
4537                         unsigned int ioctl, unsigned long arg)
4538 {
4539         void __user *argp = (void __user *)arg;
4540         long r;
4541
4542         switch (ioctl) {
4543         case KVM_GET_MSR_INDEX_LIST: {
4544                 struct kvm_msr_list __user *user_msr_list = argp;
4545                 struct kvm_msr_list msr_list;
4546                 unsigned n;
4547
4548                 r = -EFAULT;
4549                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4550                         goto out;
4551                 n = msr_list.nmsrs;
4552                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4553                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4554                         goto out;
4555                 r = -E2BIG;
4556                 if (n < msr_list.nmsrs)
4557                         goto out;
4558                 r = -EFAULT;
4559                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4560                                  num_msrs_to_save * sizeof(u32)))
4561                         goto out;
4562                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4563                                  &emulated_msrs,
4564                                  num_emulated_msrs * sizeof(u32)))
4565                         goto out;
4566                 r = 0;
4567                 break;
4568         }
4569         case KVM_GET_SUPPORTED_CPUID:
4570         case KVM_GET_EMULATED_CPUID: {
4571                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4572                 struct kvm_cpuid2 cpuid;
4573
4574                 r = -EFAULT;
4575                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4576                         goto out;
4577
4578                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4579                                             ioctl);
4580                 if (r)
4581                         goto out;
4582
4583                 r = -EFAULT;
4584                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4585                         goto out;
4586                 r = 0;
4587                 break;
4588         }
4589         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4590                 r = -EFAULT;
4591                 if (copy_to_user(argp, &kvm_caps.supported_mce_cap,
4592                                  sizeof(kvm_caps.supported_mce_cap)))
4593                         goto out;
4594                 r = 0;
4595                 break;
4596         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4597                 struct kvm_msr_list __user *user_msr_list = argp;
4598                 struct kvm_msr_list msr_list;
4599                 unsigned int n;
4600
4601                 r = -EFAULT;
4602                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4603                         goto out;
4604                 n = msr_list.nmsrs;
4605                 msr_list.nmsrs = num_msr_based_features;
4606                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4607                         goto out;
4608                 r = -E2BIG;
4609                 if (n < msr_list.nmsrs)
4610                         goto out;
4611                 r = -EFAULT;
4612                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4613                                  num_msr_based_features * sizeof(u32)))
4614                         goto out;
4615                 r = 0;
4616                 break;
4617         }
4618         case KVM_GET_MSRS:
4619                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4620                 break;
4621         case KVM_GET_SUPPORTED_HV_CPUID:
4622                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4623                 break;
4624         case KVM_GET_DEVICE_ATTR: {
4625                 struct kvm_device_attr attr;
4626                 r = -EFAULT;
4627                 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4628                         break;
4629                 r = kvm_x86_dev_get_attr(&attr);
4630                 break;
4631         }
4632         case KVM_HAS_DEVICE_ATTR: {
4633                 struct kvm_device_attr attr;
4634                 r = -EFAULT;
4635                 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4636                         break;
4637                 r = kvm_x86_dev_has_attr(&attr);
4638                 break;
4639         }
4640         default:
4641                 r = -EINVAL;
4642                 break;
4643         }
4644 out:
4645         return r;
4646 }
4647
4648 static void wbinvd_ipi(void *garbage)
4649 {
4650         wbinvd();
4651 }
4652
4653 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4654 {
4655         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4656 }
4657
4658 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4659 {
4660         /* Address WBINVD may be executed by guest */
4661         if (need_emulate_wbinvd(vcpu)) {
4662                 if (static_call(kvm_x86_has_wbinvd_exit)())
4663                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4664                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4665                         smp_call_function_single(vcpu->cpu,
4666                                         wbinvd_ipi, NULL, 1);
4667         }
4668
4669         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4670
4671         /* Save host pkru register if supported */
4672         vcpu->arch.host_pkru = read_pkru();
4673
4674         /* Apply any externally detected TSC adjustments (due to suspend) */
4675         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4676                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4677                 vcpu->arch.tsc_offset_adjustment = 0;
4678                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4679         }
4680
4681         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4682                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4683                                 rdtsc() - vcpu->arch.last_host_tsc;
4684                 if (tsc_delta < 0)
4685                         mark_tsc_unstable("KVM discovered backwards TSC");
4686
4687                 if (kvm_check_tsc_unstable()) {
4688                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4689                                                 vcpu->arch.last_guest_tsc);
4690                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4691                         vcpu->arch.tsc_catchup = 1;
4692                 }
4693
4694                 if (kvm_lapic_hv_timer_in_use(vcpu))
4695                         kvm_lapic_restart_hv_timer(vcpu);
4696
4697                 /*
4698                  * On a host with synchronized TSC, there is no need to update
4699                  * kvmclock on vcpu->cpu migration
4700                  */
4701                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4702                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4703                 if (vcpu->cpu != cpu)
4704                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4705                 vcpu->cpu = cpu;
4706         }
4707
4708         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4709 }
4710
4711 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4712 {
4713         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4714         struct kvm_steal_time __user *st;
4715         struct kvm_memslots *slots;
4716         static const u8 preempted = KVM_VCPU_PREEMPTED;
4717
4718         /*
4719          * The vCPU can be marked preempted if and only if the VM-Exit was on
4720          * an instruction boundary and will not trigger guest emulation of any
4721          * kind (see vcpu_run).  Vendor specific code controls (conservatively)
4722          * when this is true, for example allowing the vCPU to be marked
4723          * preempted if and only if the VM-Exit was due to a host interrupt.
4724          */
4725         if (!vcpu->arch.at_instruction_boundary) {
4726                 vcpu->stat.preemption_other++;
4727                 return;
4728         }
4729
4730         vcpu->stat.preemption_reported++;
4731         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4732                 return;
4733
4734         if (vcpu->arch.st.preempted)
4735                 return;
4736
4737         /* This happens on process exit */
4738         if (unlikely(current->mm != vcpu->kvm->mm))
4739                 return;
4740
4741         slots = kvm_memslots(vcpu->kvm);
4742
4743         if (unlikely(slots->generation != ghc->generation ||
4744                      kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4745                 return;
4746
4747         st = (struct kvm_steal_time __user *)ghc->hva;
4748         BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4749
4750         if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4751                 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4752
4753         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4754 }
4755
4756 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4757 {
4758         int idx;
4759
4760         if (vcpu->preempted) {
4761                 if (!vcpu->arch.guest_state_protected)
4762                         vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4763
4764                 /*
4765                  * Take the srcu lock as memslots will be accessed to check the gfn
4766                  * cache generation against the memslots generation.
4767                  */
4768                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4769                 if (kvm_xen_msr_enabled(vcpu->kvm))
4770                         kvm_xen_runstate_set_preempted(vcpu);
4771                 else
4772                         kvm_steal_time_set_preempted(vcpu);
4773                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4774         }
4775
4776         static_call(kvm_x86_vcpu_put)(vcpu);
4777         vcpu->arch.last_host_tsc = rdtsc();
4778 }
4779
4780 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4781                                     struct kvm_lapic_state *s)
4782 {
4783         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4784
4785         return kvm_apic_get_state(vcpu, s);
4786 }
4787
4788 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4789                                     struct kvm_lapic_state *s)
4790 {
4791         int r;
4792
4793         r = kvm_apic_set_state(vcpu, s);
4794         if (r)
4795                 return r;
4796         update_cr8_intercept(vcpu);
4797
4798         return 0;
4799 }
4800
4801 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4802 {
4803         /*
4804          * We can accept userspace's request for interrupt injection
4805          * as long as we have a place to store the interrupt number.
4806          * The actual injection will happen when the CPU is able to
4807          * deliver the interrupt.
4808          */
4809         if (kvm_cpu_has_extint(vcpu))
4810                 return false;
4811
4812         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4813         return (!lapic_in_kernel(vcpu) ||
4814                 kvm_apic_accept_pic_intr(vcpu));
4815 }
4816
4817 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4818 {
4819         /*
4820          * Do not cause an interrupt window exit if an exception
4821          * is pending or an event needs reinjection; userspace
4822          * might want to inject the interrupt manually using KVM_SET_REGS
4823          * or KVM_SET_SREGS.  For that to work, we must be at an
4824          * instruction boundary and with no events half-injected.
4825          */
4826         return (kvm_arch_interrupt_allowed(vcpu) &&
4827                 kvm_cpu_accept_dm_intr(vcpu) &&
4828                 !kvm_event_needs_reinjection(vcpu) &&
4829                 !vcpu->arch.exception.pending);
4830 }
4831
4832 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4833                                     struct kvm_interrupt *irq)
4834 {
4835         if (irq->irq >= KVM_NR_INTERRUPTS)
4836                 return -EINVAL;
4837
4838         if (!irqchip_in_kernel(vcpu->kvm)) {
4839                 kvm_queue_interrupt(vcpu, irq->irq, false);
4840                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4841                 return 0;
4842         }
4843
4844         /*
4845          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4846          * fail for in-kernel 8259.
4847          */
4848         if (pic_in_kernel(vcpu->kvm))
4849                 return -ENXIO;
4850
4851         if (vcpu->arch.pending_external_vector != -1)
4852                 return -EEXIST;
4853
4854         vcpu->arch.pending_external_vector = irq->irq;
4855         kvm_make_request(KVM_REQ_EVENT, vcpu);
4856         return 0;
4857 }
4858
4859 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4860 {
4861         kvm_inject_nmi(vcpu);
4862
4863         return 0;
4864 }
4865
4866 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4867 {
4868         kvm_make_request(KVM_REQ_SMI, vcpu);
4869
4870         return 0;
4871 }
4872
4873 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4874                                            struct kvm_tpr_access_ctl *tac)
4875 {
4876         if (tac->flags)
4877                 return -EINVAL;
4878         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4879         return 0;
4880 }
4881
4882 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4883                                         u64 mcg_cap)
4884 {
4885         int r;
4886         unsigned bank_num = mcg_cap & 0xff, bank;
4887
4888         r = -EINVAL;
4889         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4890                 goto out;
4891         if (mcg_cap & ~(kvm_caps.supported_mce_cap | 0xff | 0xff0000))
4892                 goto out;
4893         r = 0;
4894         vcpu->arch.mcg_cap = mcg_cap;
4895         /* Init IA32_MCG_CTL to all 1s */
4896         if (mcg_cap & MCG_CTL_P)
4897                 vcpu->arch.mcg_ctl = ~(u64)0;
4898         /* Init IA32_MCi_CTL to all 1s, IA32_MCi_CTL2 to all 0s */
4899         for (bank = 0; bank < bank_num; bank++) {
4900                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4901                 if (mcg_cap & MCG_CMCI_P)
4902                         vcpu->arch.mci_ctl2_banks[bank] = 0;
4903         }
4904
4905         kvm_apic_after_set_mcg_cap(vcpu);
4906
4907         static_call(kvm_x86_setup_mce)(vcpu);
4908 out:
4909         return r;
4910 }
4911
4912 /*
4913  * Validate this is an UCNA (uncorrectable no action) error by checking the
4914  * MCG_STATUS and MCi_STATUS registers:
4915  * - none of the bits for Machine Check Exceptions are set
4916  * - both the VAL (valid) and UC (uncorrectable) bits are set
4917  * MCI_STATUS_PCC - Processor Context Corrupted
4918  * MCI_STATUS_S - Signaled as a Machine Check Exception
4919  * MCI_STATUS_AR - Software recoverable Action Required
4920  */
4921 static bool is_ucna(struct kvm_x86_mce *mce)
4922 {
4923         return  !mce->mcg_status &&
4924                 !(mce->status & (MCI_STATUS_PCC | MCI_STATUS_S | MCI_STATUS_AR)) &&
4925                 (mce->status & MCI_STATUS_VAL) &&
4926                 (mce->status & MCI_STATUS_UC);
4927 }
4928
4929 static int kvm_vcpu_x86_set_ucna(struct kvm_vcpu *vcpu, struct kvm_x86_mce *mce, u64* banks)
4930 {
4931         u64 mcg_cap = vcpu->arch.mcg_cap;
4932
4933         banks[1] = mce->status;
4934         banks[2] = mce->addr;
4935         banks[3] = mce->misc;
4936         vcpu->arch.mcg_status = mce->mcg_status;
4937
4938         if (!(mcg_cap & MCG_CMCI_P) ||
4939             !(vcpu->arch.mci_ctl2_banks[mce->bank] & MCI_CTL2_CMCI_EN))
4940                 return 0;
4941
4942         if (lapic_in_kernel(vcpu))
4943                 kvm_apic_local_deliver(vcpu->arch.apic, APIC_LVTCMCI);
4944
4945         return 0;
4946 }
4947
4948 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4949                                       struct kvm_x86_mce *mce)
4950 {
4951         u64 mcg_cap = vcpu->arch.mcg_cap;
4952         unsigned bank_num = mcg_cap & 0xff;
4953         u64 *banks = vcpu->arch.mce_banks;
4954
4955         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4956                 return -EINVAL;
4957
4958         banks += array_index_nospec(4 * mce->bank, 4 * bank_num);
4959
4960         if (is_ucna(mce))
4961                 return kvm_vcpu_x86_set_ucna(vcpu, mce, banks);
4962
4963         /*
4964          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4965          * reporting is disabled
4966          */
4967         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4968             vcpu->arch.mcg_ctl != ~(u64)0)
4969                 return 0;
4970         /*
4971          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4972          * reporting is disabled for the bank
4973          */
4974         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4975                 return 0;
4976         if (mce->status & MCI_STATUS_UC) {
4977                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4978                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4979                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4980                         return 0;
4981                 }
4982                 if (banks[1] & MCI_STATUS_VAL)
4983                         mce->status |= MCI_STATUS_OVER;
4984                 banks[2] = mce->addr;
4985                 banks[3] = mce->misc;
4986                 vcpu->arch.mcg_status = mce->mcg_status;
4987                 banks[1] = mce->status;
4988                 kvm_queue_exception(vcpu, MC_VECTOR);
4989         } else if (!(banks[1] & MCI_STATUS_VAL)
4990                    || !(banks[1] & MCI_STATUS_UC)) {
4991                 if (banks[1] & MCI_STATUS_VAL)
4992                         mce->status |= MCI_STATUS_OVER;
4993                 banks[2] = mce->addr;
4994                 banks[3] = mce->misc;
4995                 banks[1] = mce->status;
4996         } else
4997                 banks[1] |= MCI_STATUS_OVER;
4998         return 0;
4999 }
5000
5001 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
5002                                                struct kvm_vcpu_events *events)
5003 {
5004         process_nmi(vcpu);
5005
5006         if (kvm_check_request(KVM_REQ_SMI, vcpu))
5007                 process_smi(vcpu);
5008
5009         /*
5010          * In guest mode, payload delivery should be deferred,
5011          * so that the L1 hypervisor can intercept #PF before
5012          * CR2 is modified (or intercept #DB before DR6 is
5013          * modified under nVMX). Unless the per-VM capability,
5014          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
5015          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
5016          * opportunistically defer the exception payload, deliver it if the
5017          * capability hasn't been requested before processing a
5018          * KVM_GET_VCPU_EVENTS.
5019          */
5020         if (!vcpu->kvm->arch.exception_payload_enabled &&
5021             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
5022                 kvm_deliver_exception_payload(vcpu);
5023
5024         /*
5025          * The API doesn't provide the instruction length for software
5026          * exceptions, so don't report them. As long as the guest RIP
5027          * isn't advanced, we should expect to encounter the exception
5028          * again.
5029          */
5030         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
5031                 events->exception.injected = 0;
5032                 events->exception.pending = 0;
5033         } else {
5034                 events->exception.injected = vcpu->arch.exception.injected;
5035                 events->exception.pending = vcpu->arch.exception.pending;
5036                 /*
5037                  * For ABI compatibility, deliberately conflate
5038                  * pending and injected exceptions when
5039                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
5040                  */
5041                 if (!vcpu->kvm->arch.exception_payload_enabled)
5042                         events->exception.injected |=
5043                                 vcpu->arch.exception.pending;
5044         }
5045         events->exception.nr = vcpu->arch.exception.nr;
5046         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
5047         events->exception.error_code = vcpu->arch.exception.error_code;
5048         events->exception_has_payload = vcpu->arch.exception.has_payload;
5049         events->exception_payload = vcpu->arch.exception.payload;
5050
5051         events->interrupt.injected =
5052                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
5053         events->interrupt.nr = vcpu->arch.interrupt.nr;
5054         events->interrupt.soft = 0;
5055         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
5056
5057         events->nmi.injected = vcpu->arch.nmi_injected;
5058         events->nmi.pending = vcpu->arch.nmi_pending != 0;
5059         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
5060         events->nmi.pad = 0;
5061
5062         events->sipi_vector = 0; /* never valid when reporting to user space */
5063
5064         events->smi.smm = is_smm(vcpu);
5065         events->smi.pending = vcpu->arch.smi_pending;
5066         events->smi.smm_inside_nmi =
5067                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
5068         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
5069
5070         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
5071                          | KVM_VCPUEVENT_VALID_SHADOW
5072                          | KVM_VCPUEVENT_VALID_SMM);
5073         if (vcpu->kvm->arch.exception_payload_enabled)
5074                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
5075         if (vcpu->kvm->arch.triple_fault_event) {
5076                 events->triple_fault.pending = kvm_test_request(KVM_REQ_TRIPLE_FAULT, vcpu);
5077                 events->flags |= KVM_VCPUEVENT_VALID_TRIPLE_FAULT;
5078         }
5079
5080         memset(&events->reserved, 0, sizeof(events->reserved));
5081 }
5082
5083 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
5084
5085 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
5086                                               struct kvm_vcpu_events *events)
5087 {
5088         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
5089                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
5090                               | KVM_VCPUEVENT_VALID_SHADOW
5091                               | KVM_VCPUEVENT_VALID_SMM
5092                               | KVM_VCPUEVENT_VALID_PAYLOAD
5093                               | KVM_VCPUEVENT_VALID_TRIPLE_FAULT))
5094                 return -EINVAL;
5095
5096         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
5097                 if (!vcpu->kvm->arch.exception_payload_enabled)
5098                         return -EINVAL;
5099                 if (events->exception.pending)
5100                         events->exception.injected = 0;
5101                 else
5102                         events->exception_has_payload = 0;
5103         } else {
5104                 events->exception.pending = 0;
5105                 events->exception_has_payload = 0;
5106         }
5107
5108         if ((events->exception.injected || events->exception.pending) &&
5109             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
5110                 return -EINVAL;
5111
5112         /* INITs are latched while in SMM */
5113         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
5114             (events->smi.smm || events->smi.pending) &&
5115             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
5116                 return -EINVAL;
5117
5118         process_nmi(vcpu);
5119         vcpu->arch.exception.injected = events->exception.injected;
5120         vcpu->arch.exception.pending = events->exception.pending;
5121         vcpu->arch.exception.nr = events->exception.nr;
5122         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
5123         vcpu->arch.exception.error_code = events->exception.error_code;
5124         vcpu->arch.exception.has_payload = events->exception_has_payload;
5125         vcpu->arch.exception.payload = events->exception_payload;
5126
5127         vcpu->arch.interrupt.injected = events->interrupt.injected;
5128         vcpu->arch.interrupt.nr = events->interrupt.nr;
5129         vcpu->arch.interrupt.soft = events->interrupt.soft;
5130         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
5131                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
5132                                                 events->interrupt.shadow);
5133
5134         vcpu->arch.nmi_injected = events->nmi.injected;
5135         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
5136                 vcpu->arch.nmi_pending = events->nmi.pending;
5137         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
5138
5139         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
5140             lapic_in_kernel(vcpu))
5141                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
5142
5143         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
5144                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
5145                         kvm_x86_ops.nested_ops->leave_nested(vcpu);
5146                         kvm_smm_changed(vcpu, events->smi.smm);
5147                 }
5148
5149                 vcpu->arch.smi_pending = events->smi.pending;
5150
5151                 if (events->smi.smm) {
5152                         if (events->smi.smm_inside_nmi)
5153                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
5154                         else
5155                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
5156                 }
5157
5158                 if (lapic_in_kernel(vcpu)) {
5159                         if (events->smi.latched_init)
5160                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
5161                         else
5162                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
5163                 }
5164         }
5165
5166         if (events->flags & KVM_VCPUEVENT_VALID_TRIPLE_FAULT) {
5167                 if (!vcpu->kvm->arch.triple_fault_event)
5168                         return -EINVAL;
5169                 if (events->triple_fault.pending)
5170                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
5171                 else
5172                         kvm_clear_request(KVM_REQ_TRIPLE_FAULT, vcpu);
5173         }
5174
5175         kvm_make_request(KVM_REQ_EVENT, vcpu);
5176
5177         return 0;
5178 }
5179
5180 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
5181                                              struct kvm_debugregs *dbgregs)
5182 {
5183         unsigned long val;
5184
5185         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
5186         kvm_get_dr(vcpu, 6, &val);
5187         dbgregs->dr6 = val;
5188         dbgregs->dr7 = vcpu->arch.dr7;
5189         dbgregs->flags = 0;
5190         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
5191 }
5192
5193 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
5194                                             struct kvm_debugregs *dbgregs)
5195 {
5196         if (dbgregs->flags)
5197                 return -EINVAL;
5198
5199         if (!kvm_dr6_valid(dbgregs->dr6))
5200                 return -EINVAL;
5201         if (!kvm_dr7_valid(dbgregs->dr7))
5202                 return -EINVAL;
5203
5204         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
5205         kvm_update_dr0123(vcpu);
5206         vcpu->arch.dr6 = dbgregs->dr6;
5207         vcpu->arch.dr7 = dbgregs->dr7;
5208         kvm_update_dr7(vcpu);
5209
5210         return 0;
5211 }
5212
5213 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
5214                                          struct kvm_xsave *guest_xsave)
5215 {
5216         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5217                 return;
5218
5219         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5220                                        guest_xsave->region,
5221                                        sizeof(guest_xsave->region),
5222                                        vcpu->arch.pkru);
5223 }
5224
5225 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu *vcpu,
5226                                           u8 *state, unsigned int size)
5227 {
5228         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5229                 return;
5230
5231         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5232                                        state, size, vcpu->arch.pkru);
5233 }
5234
5235 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
5236                                         struct kvm_xsave *guest_xsave)
5237 {
5238         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5239                 return 0;
5240
5241         return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu,
5242                                               guest_xsave->region,
5243                                               kvm_caps.supported_xcr0,
5244                                               &vcpu->arch.pkru);
5245 }
5246
5247 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
5248                                         struct kvm_xcrs *guest_xcrs)
5249 {
5250         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
5251                 guest_xcrs->nr_xcrs = 0;
5252                 return;
5253         }
5254
5255         guest_xcrs->nr_xcrs = 1;
5256         guest_xcrs->flags = 0;
5257         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
5258         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
5259 }
5260
5261 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
5262                                        struct kvm_xcrs *guest_xcrs)
5263 {
5264         int i, r = 0;
5265
5266         if (!boot_cpu_has(X86_FEATURE_XSAVE))
5267                 return -EINVAL;
5268
5269         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
5270                 return -EINVAL;
5271
5272         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
5273                 /* Only support XCR0 currently */
5274                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
5275                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
5276                                 guest_xcrs->xcrs[i].value);
5277                         break;
5278                 }
5279         if (r)
5280                 r = -EINVAL;
5281         return r;
5282 }
5283
5284 /*
5285  * kvm_set_guest_paused() indicates to the guest kernel that it has been
5286  * stopped by the hypervisor.  This function will be called from the host only.
5287  * EINVAL is returned when the host attempts to set the flag for a guest that
5288  * does not support pv clocks.
5289  */
5290 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
5291 {
5292         if (!vcpu->arch.pv_time.active)
5293                 return -EINVAL;
5294         vcpu->arch.pvclock_set_guest_stopped_request = true;
5295         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5296         return 0;
5297 }
5298
5299 static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu,
5300                                  struct kvm_device_attr *attr)
5301 {
5302         int r;
5303
5304         switch (attr->attr) {
5305         case KVM_VCPU_TSC_OFFSET:
5306                 r = 0;
5307                 break;
5308         default:
5309                 r = -ENXIO;
5310         }
5311
5312         return r;
5313 }
5314
5315 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
5316                                  struct kvm_device_attr *attr)
5317 {
5318         u64 __user *uaddr = kvm_get_attr_addr(attr);
5319         int r;
5320
5321         if (IS_ERR(uaddr))
5322                 return PTR_ERR(uaddr);
5323
5324         switch (attr->attr) {
5325         case KVM_VCPU_TSC_OFFSET:
5326                 r = -EFAULT;
5327                 if (put_user(vcpu->arch.l1_tsc_offset, uaddr))
5328                         break;
5329                 r = 0;
5330                 break;
5331         default:
5332                 r = -ENXIO;
5333         }
5334
5335         return r;
5336 }
5337
5338 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
5339                                  struct kvm_device_attr *attr)
5340 {
5341         u64 __user *uaddr = kvm_get_attr_addr(attr);
5342         struct kvm *kvm = vcpu->kvm;
5343         int r;
5344
5345         if (IS_ERR(uaddr))
5346                 return PTR_ERR(uaddr);
5347
5348         switch (attr->attr) {
5349         case KVM_VCPU_TSC_OFFSET: {
5350                 u64 offset, tsc, ns;
5351                 unsigned long flags;
5352                 bool matched;
5353
5354                 r = -EFAULT;
5355                 if (get_user(offset, uaddr))
5356                         break;
5357
5358                 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
5359
5360                 matched = (vcpu->arch.virtual_tsc_khz &&
5361                            kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz &&
5362                            kvm->arch.last_tsc_offset == offset);
5363
5364                 tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset;
5365                 ns = get_kvmclock_base_ns();
5366
5367                 __kvm_synchronize_tsc(vcpu, offset, tsc, ns, matched);
5368                 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
5369
5370                 r = 0;
5371                 break;
5372         }
5373         default:
5374                 r = -ENXIO;
5375         }
5376
5377         return r;
5378 }
5379
5380 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu *vcpu,
5381                                       unsigned int ioctl,
5382                                       void __user *argp)
5383 {
5384         struct kvm_device_attr attr;
5385         int r;
5386
5387         if (copy_from_user(&attr, argp, sizeof(attr)))
5388                 return -EFAULT;
5389
5390         if (attr.group != KVM_VCPU_TSC_CTRL)
5391                 return -ENXIO;
5392
5393         switch (ioctl) {
5394         case KVM_HAS_DEVICE_ATTR:
5395                 r = kvm_arch_tsc_has_attr(vcpu, &attr);
5396                 break;
5397         case KVM_GET_DEVICE_ATTR:
5398                 r = kvm_arch_tsc_get_attr(vcpu, &attr);
5399                 break;
5400         case KVM_SET_DEVICE_ATTR:
5401                 r = kvm_arch_tsc_set_attr(vcpu, &attr);
5402                 break;
5403         }
5404
5405         return r;
5406 }
5407
5408 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5409                                      struct kvm_enable_cap *cap)
5410 {
5411         int r;
5412         uint16_t vmcs_version;
5413         void __user *user_ptr;
5414
5415         if (cap->flags)
5416                 return -EINVAL;
5417
5418         switch (cap->cap) {
5419         case KVM_CAP_HYPERV_SYNIC2:
5420                 if (cap->args[0])
5421                         return -EINVAL;
5422                 fallthrough;
5423
5424         case KVM_CAP_HYPERV_SYNIC:
5425                 if (!irqchip_in_kernel(vcpu->kvm))
5426                         return -EINVAL;
5427                 return kvm_hv_activate_synic(vcpu, cap->cap ==
5428                                              KVM_CAP_HYPERV_SYNIC2);
5429         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5430                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5431                         return -ENOTTY;
5432                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5433                 if (!r) {
5434                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
5435                         if (copy_to_user(user_ptr, &vmcs_version,
5436                                          sizeof(vmcs_version)))
5437                                 r = -EFAULT;
5438                 }
5439                 return r;
5440         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5441                 if (!kvm_x86_ops.enable_direct_tlbflush)
5442                         return -ENOTTY;
5443
5444                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5445
5446         case KVM_CAP_HYPERV_ENFORCE_CPUID:
5447                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5448
5449         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5450                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5451                 if (vcpu->arch.pv_cpuid.enforce)
5452                         kvm_update_pv_runtime(vcpu);
5453
5454                 return 0;
5455         default:
5456                 return -EINVAL;
5457         }
5458 }
5459
5460 long kvm_arch_vcpu_ioctl(struct file *filp,
5461                          unsigned int ioctl, unsigned long arg)
5462 {
5463         struct kvm_vcpu *vcpu = filp->private_data;
5464         void __user *argp = (void __user *)arg;
5465         int r;
5466         union {
5467                 struct kvm_sregs2 *sregs2;
5468                 struct kvm_lapic_state *lapic;
5469                 struct kvm_xsave *xsave;
5470                 struct kvm_xcrs *xcrs;
5471                 void *buffer;
5472         } u;
5473
5474         vcpu_load(vcpu);
5475
5476         u.buffer = NULL;
5477         switch (ioctl) {
5478         case KVM_GET_LAPIC: {
5479                 r = -EINVAL;
5480                 if (!lapic_in_kernel(vcpu))
5481                         goto out;
5482                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5483                                 GFP_KERNEL_ACCOUNT);
5484
5485                 r = -ENOMEM;
5486                 if (!u.lapic)
5487                         goto out;
5488                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5489                 if (r)
5490                         goto out;
5491                 r = -EFAULT;
5492                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5493                         goto out;
5494                 r = 0;
5495                 break;
5496         }
5497         case KVM_SET_LAPIC: {
5498                 r = -EINVAL;
5499                 if (!lapic_in_kernel(vcpu))
5500                         goto out;
5501                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5502                 if (IS_ERR(u.lapic)) {
5503                         r = PTR_ERR(u.lapic);
5504                         goto out_nofree;
5505                 }
5506
5507                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5508                 break;
5509         }
5510         case KVM_INTERRUPT: {
5511                 struct kvm_interrupt irq;
5512
5513                 r = -EFAULT;
5514                 if (copy_from_user(&irq, argp, sizeof(irq)))
5515                         goto out;
5516                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5517                 break;
5518         }
5519         case KVM_NMI: {
5520                 r = kvm_vcpu_ioctl_nmi(vcpu);
5521                 break;
5522         }
5523         case KVM_SMI: {
5524                 r = kvm_vcpu_ioctl_smi(vcpu);
5525                 break;
5526         }
5527         case KVM_SET_CPUID: {
5528                 struct kvm_cpuid __user *cpuid_arg = argp;
5529                 struct kvm_cpuid cpuid;
5530
5531                 r = -EFAULT;
5532                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5533                         goto out;
5534                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5535                 break;
5536         }
5537         case KVM_SET_CPUID2: {
5538                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5539                 struct kvm_cpuid2 cpuid;
5540
5541                 r = -EFAULT;
5542                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5543                         goto out;
5544                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5545                                               cpuid_arg->entries);
5546                 break;
5547         }
5548         case KVM_GET_CPUID2: {
5549                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5550                 struct kvm_cpuid2 cpuid;
5551
5552                 r = -EFAULT;
5553                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5554                         goto out;
5555                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5556                                               cpuid_arg->entries);
5557                 if (r)
5558                         goto out;
5559                 r = -EFAULT;
5560                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5561                         goto out;
5562                 r = 0;
5563                 break;
5564         }
5565         case KVM_GET_MSRS: {
5566                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5567                 r = msr_io(vcpu, argp, do_get_msr, 1);
5568                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5569                 break;
5570         }
5571         case KVM_SET_MSRS: {
5572                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5573                 r = msr_io(vcpu, argp, do_set_msr, 0);
5574                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5575                 break;
5576         }
5577         case KVM_TPR_ACCESS_REPORTING: {
5578                 struct kvm_tpr_access_ctl tac;
5579
5580                 r = -EFAULT;
5581                 if (copy_from_user(&tac, argp, sizeof(tac)))
5582                         goto out;
5583                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5584                 if (r)
5585                         goto out;
5586                 r = -EFAULT;
5587                 if (copy_to_user(argp, &tac, sizeof(tac)))
5588                         goto out;
5589                 r = 0;
5590                 break;
5591         };
5592         case KVM_SET_VAPIC_ADDR: {
5593                 struct kvm_vapic_addr va;
5594                 int idx;
5595
5596                 r = -EINVAL;
5597                 if (!lapic_in_kernel(vcpu))
5598                         goto out;
5599                 r = -EFAULT;
5600                 if (copy_from_user(&va, argp, sizeof(va)))
5601                         goto out;
5602                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5603                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5604                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5605                 break;
5606         }
5607         case KVM_X86_SETUP_MCE: {
5608                 u64 mcg_cap;
5609
5610                 r = -EFAULT;
5611                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5612                         goto out;
5613                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5614                 break;
5615         }
5616         case KVM_X86_SET_MCE: {
5617                 struct kvm_x86_mce mce;
5618
5619                 r = -EFAULT;
5620                 if (copy_from_user(&mce, argp, sizeof(mce)))
5621                         goto out;
5622                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5623                 break;
5624         }
5625         case KVM_GET_VCPU_EVENTS: {
5626                 struct kvm_vcpu_events events;
5627
5628                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5629
5630                 r = -EFAULT;
5631                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5632                         break;
5633                 r = 0;
5634                 break;
5635         }
5636         case KVM_SET_VCPU_EVENTS: {
5637                 struct kvm_vcpu_events events;
5638
5639                 r = -EFAULT;
5640                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5641                         break;
5642
5643                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5644                 break;
5645         }
5646         case KVM_GET_DEBUGREGS: {
5647                 struct kvm_debugregs dbgregs;
5648
5649                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5650
5651                 r = -EFAULT;
5652                 if (copy_to_user(argp, &dbgregs,
5653                                  sizeof(struct kvm_debugregs)))
5654                         break;
5655                 r = 0;
5656                 break;
5657         }
5658         case KVM_SET_DEBUGREGS: {
5659                 struct kvm_debugregs dbgregs;
5660
5661                 r = -EFAULT;
5662                 if (copy_from_user(&dbgregs, argp,
5663                                    sizeof(struct kvm_debugregs)))
5664                         break;
5665
5666                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5667                 break;
5668         }
5669         case KVM_GET_XSAVE: {
5670                 r = -EINVAL;
5671                 if (vcpu->arch.guest_fpu.uabi_size > sizeof(struct kvm_xsave))
5672                         break;
5673
5674                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5675                 r = -ENOMEM;
5676                 if (!u.xsave)
5677                         break;
5678
5679                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5680
5681                 r = -EFAULT;
5682                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5683                         break;
5684                 r = 0;
5685                 break;
5686         }
5687         case KVM_SET_XSAVE: {
5688                 int size = vcpu->arch.guest_fpu.uabi_size;
5689
5690                 u.xsave = memdup_user(argp, size);
5691                 if (IS_ERR(u.xsave)) {
5692                         r = PTR_ERR(u.xsave);
5693                         goto out_nofree;
5694                 }
5695
5696                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5697                 break;
5698         }
5699
5700         case KVM_GET_XSAVE2: {
5701                 int size = vcpu->arch.guest_fpu.uabi_size;
5702
5703                 u.xsave = kzalloc(size, GFP_KERNEL_ACCOUNT);
5704                 r = -ENOMEM;
5705                 if (!u.xsave)
5706                         break;
5707
5708                 kvm_vcpu_ioctl_x86_get_xsave2(vcpu, u.buffer, size);
5709
5710                 r = -EFAULT;
5711                 if (copy_to_user(argp, u.xsave, size))
5712                         break;
5713
5714                 r = 0;
5715                 break;
5716         }
5717
5718         case KVM_GET_XCRS: {
5719                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5720                 r = -ENOMEM;
5721                 if (!u.xcrs)
5722                         break;
5723
5724                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5725
5726                 r = -EFAULT;
5727                 if (copy_to_user(argp, u.xcrs,
5728                                  sizeof(struct kvm_xcrs)))
5729                         break;
5730                 r = 0;
5731                 break;
5732         }
5733         case KVM_SET_XCRS: {
5734                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5735                 if (IS_ERR(u.xcrs)) {
5736                         r = PTR_ERR(u.xcrs);
5737                         goto out_nofree;
5738                 }
5739
5740                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5741                 break;
5742         }
5743         case KVM_SET_TSC_KHZ: {
5744                 u32 user_tsc_khz;
5745
5746                 r = -EINVAL;
5747                 user_tsc_khz = (u32)arg;
5748
5749                 if (kvm_caps.has_tsc_control &&
5750                     user_tsc_khz >= kvm_caps.max_guest_tsc_khz)
5751                         goto out;
5752
5753                 if (user_tsc_khz == 0)
5754                         user_tsc_khz = tsc_khz;
5755
5756                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5757                         r = 0;
5758
5759                 goto out;
5760         }
5761         case KVM_GET_TSC_KHZ: {
5762                 r = vcpu->arch.virtual_tsc_khz;
5763                 goto out;
5764         }
5765         case KVM_KVMCLOCK_CTRL: {
5766                 r = kvm_set_guest_paused(vcpu);
5767                 goto out;
5768         }
5769         case KVM_ENABLE_CAP: {
5770                 struct kvm_enable_cap cap;
5771
5772                 r = -EFAULT;
5773                 if (copy_from_user(&cap, argp, sizeof(cap)))
5774                         goto out;
5775                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5776                 break;
5777         }
5778         case KVM_GET_NESTED_STATE: {
5779                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5780                 u32 user_data_size;
5781
5782                 r = -EINVAL;
5783                 if (!kvm_x86_ops.nested_ops->get_state)
5784                         break;
5785
5786                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5787                 r = -EFAULT;
5788                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5789                         break;
5790
5791                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5792                                                      user_data_size);
5793                 if (r < 0)
5794                         break;
5795
5796                 if (r > user_data_size) {
5797                         if (put_user(r, &user_kvm_nested_state->size))
5798                                 r = -EFAULT;
5799                         else
5800                                 r = -E2BIG;
5801                         break;
5802                 }
5803
5804                 r = 0;
5805                 break;
5806         }
5807         case KVM_SET_NESTED_STATE: {
5808                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5809                 struct kvm_nested_state kvm_state;
5810                 int idx;
5811
5812                 r = -EINVAL;
5813                 if (!kvm_x86_ops.nested_ops->set_state)
5814                         break;
5815
5816                 r = -EFAULT;
5817                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5818                         break;
5819
5820                 r = -EINVAL;
5821                 if (kvm_state.size < sizeof(kvm_state))
5822                         break;
5823
5824                 if (kvm_state.flags &
5825                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5826                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5827                       | KVM_STATE_NESTED_GIF_SET))
5828                         break;
5829
5830                 /* nested_run_pending implies guest_mode.  */
5831                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5832                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5833                         break;
5834
5835                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5836                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5837                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5838                 break;
5839         }
5840         case KVM_GET_SUPPORTED_HV_CPUID:
5841                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5842                 break;
5843 #ifdef CONFIG_KVM_XEN
5844         case KVM_XEN_VCPU_GET_ATTR: {
5845                 struct kvm_xen_vcpu_attr xva;
5846
5847                 r = -EFAULT;
5848                 if (copy_from_user(&xva, argp, sizeof(xva)))
5849                         goto out;
5850                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5851                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5852                         r = -EFAULT;
5853                 break;
5854         }
5855         case KVM_XEN_VCPU_SET_ATTR: {
5856                 struct kvm_xen_vcpu_attr xva;
5857
5858                 r = -EFAULT;
5859                 if (copy_from_user(&xva, argp, sizeof(xva)))
5860                         goto out;
5861                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5862                 break;
5863         }
5864 #endif
5865         case KVM_GET_SREGS2: {
5866                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5867                 r = -ENOMEM;
5868                 if (!u.sregs2)
5869                         goto out;
5870                 __get_sregs2(vcpu, u.sregs2);
5871                 r = -EFAULT;
5872                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5873                         goto out;
5874                 r = 0;
5875                 break;
5876         }
5877         case KVM_SET_SREGS2: {
5878                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5879                 if (IS_ERR(u.sregs2)) {
5880                         r = PTR_ERR(u.sregs2);
5881                         u.sregs2 = NULL;
5882                         goto out;
5883                 }
5884                 r = __set_sregs2(vcpu, u.sregs2);
5885                 break;
5886         }
5887         case KVM_HAS_DEVICE_ATTR:
5888         case KVM_GET_DEVICE_ATTR:
5889         case KVM_SET_DEVICE_ATTR:
5890                 r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);
5891                 break;
5892         default:
5893                 r = -EINVAL;
5894         }
5895 out:
5896         kfree(u.buffer);
5897 out_nofree:
5898         vcpu_put(vcpu);
5899         return r;
5900 }
5901
5902 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5903 {
5904         return VM_FAULT_SIGBUS;
5905 }
5906
5907 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5908 {
5909         int ret;
5910
5911         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5912                 return -EINVAL;
5913         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5914         return ret;
5915 }
5916
5917 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5918                                               u64 ident_addr)
5919 {
5920         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5921 }
5922
5923 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5924                                          unsigned long kvm_nr_mmu_pages)
5925 {
5926         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5927                 return -EINVAL;
5928
5929         mutex_lock(&kvm->slots_lock);
5930
5931         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5932         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5933
5934         mutex_unlock(&kvm->slots_lock);
5935         return 0;
5936 }
5937
5938 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5939 {
5940         return kvm->arch.n_max_mmu_pages;
5941 }
5942
5943 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5944 {
5945         struct kvm_pic *pic = kvm->arch.vpic;
5946         int r;
5947
5948         r = 0;
5949         switch (chip->chip_id) {
5950         case KVM_IRQCHIP_PIC_MASTER:
5951                 memcpy(&chip->chip.pic, &pic->pics[0],
5952                         sizeof(struct kvm_pic_state));
5953                 break;
5954         case KVM_IRQCHIP_PIC_SLAVE:
5955                 memcpy(&chip->chip.pic, &pic->pics[1],
5956                         sizeof(struct kvm_pic_state));
5957                 break;
5958         case KVM_IRQCHIP_IOAPIC:
5959                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5960                 break;
5961         default:
5962                 r = -EINVAL;
5963                 break;
5964         }
5965         return r;
5966 }
5967
5968 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5969 {
5970         struct kvm_pic *pic = kvm->arch.vpic;
5971         int r;
5972
5973         r = 0;
5974         switch (chip->chip_id) {
5975         case KVM_IRQCHIP_PIC_MASTER:
5976                 spin_lock(&pic->lock);
5977                 memcpy(&pic->pics[0], &chip->chip.pic,
5978                         sizeof(struct kvm_pic_state));
5979                 spin_unlock(&pic->lock);
5980                 break;
5981         case KVM_IRQCHIP_PIC_SLAVE:
5982                 spin_lock(&pic->lock);
5983                 memcpy(&pic->pics[1], &chip->chip.pic,
5984                         sizeof(struct kvm_pic_state));
5985                 spin_unlock(&pic->lock);
5986                 break;
5987         case KVM_IRQCHIP_IOAPIC:
5988                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5989                 break;
5990         default:
5991                 r = -EINVAL;
5992                 break;
5993         }
5994         kvm_pic_update_irq(pic);
5995         return r;
5996 }
5997
5998 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5999 {
6000         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
6001
6002         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
6003
6004         mutex_lock(&kps->lock);
6005         memcpy(ps, &kps->channels, sizeof(*ps));
6006         mutex_unlock(&kps->lock);
6007         return 0;
6008 }
6009
6010 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
6011 {
6012         int i;
6013         struct kvm_pit *pit = kvm->arch.vpit;
6014
6015         mutex_lock(&pit->pit_state.lock);
6016         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
6017         for (i = 0; i < 3; i++)
6018                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
6019         mutex_unlock(&pit->pit_state.lock);
6020         return 0;
6021 }
6022
6023 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
6024 {
6025         mutex_lock(&kvm->arch.vpit->pit_state.lock);
6026         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
6027                 sizeof(ps->channels));
6028         ps->flags = kvm->arch.vpit->pit_state.flags;
6029         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
6030         memset(&ps->reserved, 0, sizeof(ps->reserved));
6031         return 0;
6032 }
6033
6034 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
6035 {
6036         int start = 0;
6037         int i;
6038         u32 prev_legacy, cur_legacy;
6039         struct kvm_pit *pit = kvm->arch.vpit;
6040
6041         mutex_lock(&pit->pit_state.lock);
6042         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
6043         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
6044         if (!prev_legacy && cur_legacy)
6045                 start = 1;
6046         memcpy(&pit->pit_state.channels, &ps->channels,
6047                sizeof(pit->pit_state.channels));
6048         pit->pit_state.flags = ps->flags;
6049         for (i = 0; i < 3; i++)
6050                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
6051                                    start && i == 0);
6052         mutex_unlock(&pit->pit_state.lock);
6053         return 0;
6054 }
6055
6056 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
6057                                  struct kvm_reinject_control *control)
6058 {
6059         struct kvm_pit *pit = kvm->arch.vpit;
6060
6061         /* pit->pit_state.lock was overloaded to prevent userspace from getting
6062          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
6063          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
6064          */
6065         mutex_lock(&pit->pit_state.lock);
6066         kvm_pit_set_reinject(pit, control->pit_reinject);
6067         mutex_unlock(&pit->pit_state.lock);
6068
6069         return 0;
6070 }
6071
6072 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
6073 {
6074
6075         /*
6076          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
6077          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
6078          * on all VM-Exits, thus we only need to kick running vCPUs to force a
6079          * VM-Exit.
6080          */
6081         struct kvm_vcpu *vcpu;
6082         unsigned long i;
6083
6084         kvm_for_each_vcpu(i, vcpu, kvm)
6085                 kvm_vcpu_kick(vcpu);
6086 }
6087
6088 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
6089                         bool line_status)
6090 {
6091         if (!irqchip_in_kernel(kvm))
6092                 return -ENXIO;
6093
6094         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
6095                                         irq_event->irq, irq_event->level,
6096                                         line_status);
6097         return 0;
6098 }
6099
6100 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
6101                             struct kvm_enable_cap *cap)
6102 {
6103         int r;
6104
6105         if (cap->flags)
6106                 return -EINVAL;
6107
6108         switch (cap->cap) {
6109         case KVM_CAP_DISABLE_QUIRKS2:
6110                 r = -EINVAL;
6111                 if (cap->args[0] & ~KVM_X86_VALID_QUIRKS)
6112                         break;
6113                 fallthrough;
6114         case KVM_CAP_DISABLE_QUIRKS:
6115                 kvm->arch.disabled_quirks = cap->args[0];
6116                 r = 0;
6117                 break;
6118         case KVM_CAP_SPLIT_IRQCHIP: {
6119                 mutex_lock(&kvm->lock);
6120                 r = -EINVAL;
6121                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
6122                         goto split_irqchip_unlock;
6123                 r = -EEXIST;
6124                 if (irqchip_in_kernel(kvm))
6125                         goto split_irqchip_unlock;
6126                 if (kvm->created_vcpus)
6127                         goto split_irqchip_unlock;
6128                 r = kvm_setup_empty_irq_routing(kvm);
6129                 if (r)
6130                         goto split_irqchip_unlock;
6131                 /* Pairs with irqchip_in_kernel. */
6132                 smp_wmb();
6133                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
6134                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
6135                 kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_ABSENT);
6136                 r = 0;
6137 split_irqchip_unlock:
6138                 mutex_unlock(&kvm->lock);
6139                 break;
6140         }
6141         case KVM_CAP_X2APIC_API:
6142                 r = -EINVAL;
6143                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
6144                         break;
6145
6146                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
6147                         kvm->arch.x2apic_format = true;
6148                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
6149                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
6150
6151                 r = 0;
6152                 break;
6153         case KVM_CAP_X86_DISABLE_EXITS:
6154                 r = -EINVAL;
6155                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
6156                         break;
6157
6158                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
6159                         kvm_can_mwait_in_guest())
6160                         kvm->arch.mwait_in_guest = true;
6161                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
6162                         kvm->arch.hlt_in_guest = true;
6163                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
6164                         kvm->arch.pause_in_guest = true;
6165                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
6166                         kvm->arch.cstate_in_guest = true;
6167                 r = 0;
6168                 break;
6169         case KVM_CAP_MSR_PLATFORM_INFO:
6170                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
6171                 r = 0;
6172                 break;
6173         case KVM_CAP_EXCEPTION_PAYLOAD:
6174                 kvm->arch.exception_payload_enabled = cap->args[0];
6175                 r = 0;
6176                 break;
6177         case KVM_CAP_X86_TRIPLE_FAULT_EVENT:
6178                 kvm->arch.triple_fault_event = cap->args[0];
6179                 r = 0;
6180                 break;
6181         case KVM_CAP_X86_USER_SPACE_MSR:
6182                 r = -EINVAL;
6183                 if (cap->args[0] & ~(KVM_MSR_EXIT_REASON_INVAL |
6184                                      KVM_MSR_EXIT_REASON_UNKNOWN |
6185                                      KVM_MSR_EXIT_REASON_FILTER))
6186                         break;
6187                 kvm->arch.user_space_msr_mask = cap->args[0];
6188                 r = 0;
6189                 break;
6190         case KVM_CAP_X86_BUS_LOCK_EXIT:
6191                 r = -EINVAL;
6192                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
6193                         break;
6194
6195                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
6196                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
6197                         break;
6198
6199                 if (kvm_caps.has_bus_lock_exit &&
6200                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
6201                         kvm->arch.bus_lock_detection_enabled = true;
6202                 r = 0;
6203                 break;
6204 #ifdef CONFIG_X86_SGX_KVM
6205         case KVM_CAP_SGX_ATTRIBUTE: {
6206                 unsigned long allowed_attributes = 0;
6207
6208                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
6209                 if (r)
6210                         break;
6211
6212                 /* KVM only supports the PROVISIONKEY privileged attribute. */
6213                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
6214                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
6215                         kvm->arch.sgx_provisioning_allowed = true;
6216                 else
6217                         r = -EINVAL;
6218                 break;
6219         }
6220 #endif
6221         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
6222                 r = -EINVAL;
6223                 if (!kvm_x86_ops.vm_copy_enc_context_from)
6224                         break;
6225
6226                 r = static_call(kvm_x86_vm_copy_enc_context_from)(kvm, cap->args[0]);
6227                 break;
6228         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
6229                 r = -EINVAL;
6230                 if (!kvm_x86_ops.vm_move_enc_context_from)
6231                         break;
6232
6233                 r = static_call(kvm_x86_vm_move_enc_context_from)(kvm, cap->args[0]);
6234                 break;
6235         case KVM_CAP_EXIT_HYPERCALL:
6236                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
6237                         r = -EINVAL;
6238                         break;
6239                 }
6240                 kvm->arch.hypercall_exit_enabled = cap->args[0];
6241                 r = 0;
6242                 break;
6243         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
6244                 r = -EINVAL;
6245                 if (cap->args[0] & ~1)
6246                         break;
6247                 kvm->arch.exit_on_emulation_error = cap->args[0];
6248                 r = 0;
6249                 break;
6250         case KVM_CAP_PMU_CAPABILITY:
6251                 r = -EINVAL;
6252                 if (!enable_pmu || (cap->args[0] & ~KVM_CAP_PMU_VALID_MASK))
6253                         break;
6254
6255                 mutex_lock(&kvm->lock);
6256                 if (!kvm->created_vcpus) {
6257                         kvm->arch.enable_pmu = !(cap->args[0] & KVM_PMU_CAP_DISABLE);
6258                         r = 0;
6259                 }
6260                 mutex_unlock(&kvm->lock);
6261                 break;
6262         case KVM_CAP_MAX_VCPU_ID:
6263                 r = -EINVAL;
6264                 if (cap->args[0] > KVM_MAX_VCPU_IDS)
6265                         break;
6266
6267                 mutex_lock(&kvm->lock);
6268                 if (kvm->arch.max_vcpu_ids == cap->args[0]) {
6269                         r = 0;
6270                 } else if (!kvm->arch.max_vcpu_ids) {
6271                         kvm->arch.max_vcpu_ids = cap->args[0];
6272                         r = 0;
6273                 }
6274                 mutex_unlock(&kvm->lock);
6275                 break;
6276         case KVM_CAP_X86_NOTIFY_VMEXIT:
6277                 r = -EINVAL;
6278                 if ((u32)cap->args[0] & ~KVM_X86_NOTIFY_VMEXIT_VALID_BITS)
6279                         break;
6280                 if (!kvm_caps.has_notify_vmexit)
6281                         break;
6282                 if (!((u32)cap->args[0] & KVM_X86_NOTIFY_VMEXIT_ENABLED))
6283                         break;
6284                 mutex_lock(&kvm->lock);
6285                 if (!kvm->created_vcpus) {
6286                         kvm->arch.notify_window = cap->args[0] >> 32;
6287                         kvm->arch.notify_vmexit_flags = (u32)cap->args[0];
6288                         r = 0;
6289                 }
6290                 mutex_unlock(&kvm->lock);
6291                 break;
6292         case KVM_CAP_VM_DISABLE_NX_HUGE_PAGES:
6293                 r = -EINVAL;
6294
6295                 /*
6296                  * Since the risk of disabling NX hugepages is a guest crashing
6297                  * the system, ensure the userspace process has permission to
6298                  * reboot the system.
6299                  *
6300                  * Note that unlike the reboot() syscall, the process must have
6301                  * this capability in the root namespace because exposing
6302                  * /dev/kvm into a container does not limit the scope of the
6303                  * iTLB multihit bug to that container. In other words,
6304                  * this must use capable(), not ns_capable().
6305                  */
6306                 if (!capable(CAP_SYS_BOOT)) {
6307                         r = -EPERM;
6308                         break;
6309                 }
6310
6311                 if (cap->args[0])
6312                         break;
6313
6314                 mutex_lock(&kvm->lock);
6315                 if (!kvm->created_vcpus) {
6316                         kvm->arch.disable_nx_huge_pages = true;
6317                         r = 0;
6318                 }
6319                 mutex_unlock(&kvm->lock);
6320                 break;
6321         default:
6322                 r = -EINVAL;
6323                 break;
6324         }
6325         return r;
6326 }
6327
6328 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
6329 {
6330         struct kvm_x86_msr_filter *msr_filter;
6331
6332         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
6333         if (!msr_filter)
6334                 return NULL;
6335
6336         msr_filter->default_allow = default_allow;
6337         return msr_filter;
6338 }
6339
6340 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
6341 {
6342         u32 i;
6343
6344         if (!msr_filter)
6345                 return;
6346
6347         for (i = 0; i < msr_filter->count; i++)
6348                 kfree(msr_filter->ranges[i].bitmap);
6349
6350         kfree(msr_filter);
6351 }
6352
6353 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
6354                               struct kvm_msr_filter_range *user_range)
6355 {
6356         unsigned long *bitmap = NULL;
6357         size_t bitmap_size;
6358
6359         if (!user_range->nmsrs)
6360                 return 0;
6361
6362         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
6363                 return -EINVAL;
6364
6365         if (!user_range->flags)
6366                 return -EINVAL;
6367
6368         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
6369         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
6370                 return -EINVAL;
6371
6372         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
6373         if (IS_ERR(bitmap))
6374                 return PTR_ERR(bitmap);
6375
6376         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
6377                 .flags = user_range->flags,
6378                 .base = user_range->base,
6379                 .nmsrs = user_range->nmsrs,
6380                 .bitmap = bitmap,
6381         };
6382
6383         msr_filter->count++;
6384         return 0;
6385 }
6386
6387 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
6388 {
6389         struct kvm_msr_filter __user *user_msr_filter = argp;
6390         struct kvm_x86_msr_filter *new_filter, *old_filter;
6391         struct kvm_msr_filter filter;
6392         bool default_allow;
6393         bool empty = true;
6394         int r = 0;
6395         u32 i;
6396
6397         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
6398                 return -EFAULT;
6399
6400         if (filter.flags & ~KVM_MSR_FILTER_DEFAULT_DENY)
6401                 return -EINVAL;
6402
6403         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
6404                 empty &= !filter.ranges[i].nmsrs;
6405
6406         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
6407         if (empty && !default_allow)
6408                 return -EINVAL;
6409
6410         new_filter = kvm_alloc_msr_filter(default_allow);
6411         if (!new_filter)
6412                 return -ENOMEM;
6413
6414         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
6415                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
6416                 if (r) {
6417                         kvm_free_msr_filter(new_filter);
6418                         return r;
6419                 }
6420         }
6421
6422         mutex_lock(&kvm->lock);
6423
6424         /* The per-VM filter is protected by kvm->lock... */
6425         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
6426
6427         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
6428         synchronize_srcu(&kvm->srcu);
6429
6430         kvm_free_msr_filter(old_filter);
6431
6432         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
6433         mutex_unlock(&kvm->lock);
6434
6435         return 0;
6436 }
6437
6438 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6439 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6440 {
6441         struct kvm_vcpu *vcpu;
6442         unsigned long i;
6443         int ret = 0;
6444
6445         mutex_lock(&kvm->lock);
6446         kvm_for_each_vcpu(i, vcpu, kvm) {
6447                 if (!vcpu->arch.pv_time.active)
6448                         continue;
6449
6450                 ret = kvm_set_guest_paused(vcpu);
6451                 if (ret) {
6452                         kvm_err("Failed to pause guest VCPU%d: %d\n",
6453                                 vcpu->vcpu_id, ret);
6454                         break;
6455                 }
6456         }
6457         mutex_unlock(&kvm->lock);
6458
6459         return ret ? NOTIFY_BAD : NOTIFY_DONE;
6460 }
6461
6462 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6463 {
6464         switch (state) {
6465         case PM_HIBERNATION_PREPARE:
6466         case PM_SUSPEND_PREPARE:
6467                 return kvm_arch_suspend_notifier(kvm);
6468         }
6469
6470         return NOTIFY_DONE;
6471 }
6472 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6473
6474 static int kvm_vm_ioctl_get_clock(struct kvm *kvm, void __user *argp)
6475 {
6476         struct kvm_clock_data data = { 0 };
6477
6478         get_kvmclock(kvm, &data);
6479         if (copy_to_user(argp, &data, sizeof(data)))
6480                 return -EFAULT;
6481
6482         return 0;
6483 }
6484
6485 static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp)
6486 {
6487         struct kvm_arch *ka = &kvm->arch;
6488         struct kvm_clock_data data;
6489         u64 now_raw_ns;
6490
6491         if (copy_from_user(&data, argp, sizeof(data)))
6492                 return -EFAULT;
6493
6494         /*
6495          * Only KVM_CLOCK_REALTIME is used, but allow passing the
6496          * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6497          */
6498         if (data.flags & ~KVM_CLOCK_VALID_FLAGS)
6499                 return -EINVAL;
6500
6501         kvm_hv_request_tsc_page_update(kvm);
6502         kvm_start_pvclock_update(kvm);
6503         pvclock_update_vm_gtod_copy(kvm);
6504
6505         /*
6506          * This pairs with kvm_guest_time_update(): when masterclock is
6507          * in use, we use master_kernel_ns + kvmclock_offset to set
6508          * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6509          * is slightly ahead) here we risk going negative on unsigned
6510          * 'system_time' when 'data.clock' is very small.
6511          */
6512         if (data.flags & KVM_CLOCK_REALTIME) {
6513                 u64 now_real_ns = ktime_get_real_ns();
6514
6515                 /*
6516                  * Avoid stepping the kvmclock backwards.
6517                  */
6518                 if (now_real_ns > data.realtime)
6519                         data.clock += now_real_ns - data.realtime;
6520         }
6521
6522         if (ka->use_master_clock)
6523                 now_raw_ns = ka->master_kernel_ns;
6524         else
6525                 now_raw_ns = get_kvmclock_base_ns();
6526         ka->kvmclock_offset = data.clock - now_raw_ns;
6527         kvm_end_pvclock_update(kvm);
6528         return 0;
6529 }
6530
6531 long kvm_arch_vm_ioctl(struct file *filp,
6532                        unsigned int ioctl, unsigned long arg)
6533 {
6534         struct kvm *kvm = filp->private_data;
6535         void __user *argp = (void __user *)arg;
6536         int r = -ENOTTY;
6537         /*
6538          * This union makes it completely explicit to gcc-3.x
6539          * that these two variables' stack usage should be
6540          * combined, not added together.
6541          */
6542         union {
6543                 struct kvm_pit_state ps;
6544                 struct kvm_pit_state2 ps2;
6545                 struct kvm_pit_config pit_config;
6546         } u;
6547
6548         switch (ioctl) {
6549         case KVM_SET_TSS_ADDR:
6550                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6551                 break;
6552         case KVM_SET_IDENTITY_MAP_ADDR: {
6553                 u64 ident_addr;
6554
6555                 mutex_lock(&kvm->lock);
6556                 r = -EINVAL;
6557                 if (kvm->created_vcpus)
6558                         goto set_identity_unlock;
6559                 r = -EFAULT;
6560                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6561                         goto set_identity_unlock;
6562                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6563 set_identity_unlock:
6564                 mutex_unlock(&kvm->lock);
6565                 break;
6566         }
6567         case KVM_SET_NR_MMU_PAGES:
6568                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6569                 break;
6570         case KVM_GET_NR_MMU_PAGES:
6571                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6572                 break;
6573         case KVM_CREATE_IRQCHIP: {
6574                 mutex_lock(&kvm->lock);
6575
6576                 r = -EEXIST;
6577                 if (irqchip_in_kernel(kvm))
6578                         goto create_irqchip_unlock;
6579
6580                 r = -EINVAL;
6581                 if (kvm->created_vcpus)
6582                         goto create_irqchip_unlock;
6583
6584                 r = kvm_pic_init(kvm);
6585                 if (r)
6586                         goto create_irqchip_unlock;
6587
6588                 r = kvm_ioapic_init(kvm);
6589                 if (r) {
6590                         kvm_pic_destroy(kvm);
6591                         goto create_irqchip_unlock;
6592                 }
6593
6594                 r = kvm_setup_default_irq_routing(kvm);
6595                 if (r) {
6596                         kvm_ioapic_destroy(kvm);
6597                         kvm_pic_destroy(kvm);
6598                         goto create_irqchip_unlock;
6599                 }
6600                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6601                 smp_wmb();
6602                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6603                 kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_ABSENT);
6604         create_irqchip_unlock:
6605                 mutex_unlock(&kvm->lock);
6606                 break;
6607         }
6608         case KVM_CREATE_PIT:
6609                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6610                 goto create_pit;
6611         case KVM_CREATE_PIT2:
6612                 r = -EFAULT;
6613                 if (copy_from_user(&u.pit_config, argp,
6614                                    sizeof(struct kvm_pit_config)))
6615                         goto out;
6616         create_pit:
6617                 mutex_lock(&kvm->lock);
6618                 r = -EEXIST;
6619                 if (kvm->arch.vpit)
6620                         goto create_pit_unlock;
6621                 r = -ENOMEM;
6622                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6623                 if (kvm->arch.vpit)
6624                         r = 0;
6625         create_pit_unlock:
6626                 mutex_unlock(&kvm->lock);
6627                 break;
6628         case KVM_GET_IRQCHIP: {
6629                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6630                 struct kvm_irqchip *chip;
6631
6632                 chip = memdup_user(argp, sizeof(*chip));
6633                 if (IS_ERR(chip)) {
6634                         r = PTR_ERR(chip);
6635                         goto out;
6636                 }
6637
6638                 r = -ENXIO;
6639                 if (!irqchip_kernel(kvm))
6640                         goto get_irqchip_out;
6641                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6642                 if (r)
6643                         goto get_irqchip_out;
6644                 r = -EFAULT;
6645                 if (copy_to_user(argp, chip, sizeof(*chip)))
6646                         goto get_irqchip_out;
6647                 r = 0;
6648         get_irqchip_out:
6649                 kfree(chip);
6650                 break;
6651         }
6652         case KVM_SET_IRQCHIP: {
6653                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6654                 struct kvm_irqchip *chip;
6655
6656                 chip = memdup_user(argp, sizeof(*chip));
6657                 if (IS_ERR(chip)) {
6658                         r = PTR_ERR(chip);
6659                         goto out;
6660                 }
6661
6662                 r = -ENXIO;
6663                 if (!irqchip_kernel(kvm))
6664                         goto set_irqchip_out;
6665                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6666         set_irqchip_out:
6667                 kfree(chip);
6668                 break;
6669         }
6670         case KVM_GET_PIT: {
6671                 r = -EFAULT;
6672                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6673                         goto out;
6674                 r = -ENXIO;
6675                 if (!kvm->arch.vpit)
6676                         goto out;
6677                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6678                 if (r)
6679                         goto out;
6680                 r = -EFAULT;
6681                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6682                         goto out;
6683                 r = 0;
6684                 break;
6685         }
6686         case KVM_SET_PIT: {
6687                 r = -EFAULT;
6688                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6689                         goto out;
6690                 mutex_lock(&kvm->lock);
6691                 r = -ENXIO;
6692                 if (!kvm->arch.vpit)
6693                         goto set_pit_out;
6694                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6695 set_pit_out:
6696                 mutex_unlock(&kvm->lock);
6697                 break;
6698         }
6699         case KVM_GET_PIT2: {
6700                 r = -ENXIO;
6701                 if (!kvm->arch.vpit)
6702                         goto out;
6703                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6704                 if (r)
6705                         goto out;
6706                 r = -EFAULT;
6707                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6708                         goto out;
6709                 r = 0;
6710                 break;
6711         }
6712         case KVM_SET_PIT2: {
6713                 r = -EFAULT;
6714                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6715                         goto out;
6716                 mutex_lock(&kvm->lock);
6717                 r = -ENXIO;
6718                 if (!kvm->arch.vpit)
6719                         goto set_pit2_out;
6720                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6721 set_pit2_out:
6722                 mutex_unlock(&kvm->lock);
6723                 break;
6724         }
6725         case KVM_REINJECT_CONTROL: {
6726                 struct kvm_reinject_control control;
6727                 r =  -EFAULT;
6728                 if (copy_from_user(&control, argp, sizeof(control)))
6729                         goto out;
6730                 r = -ENXIO;
6731                 if (!kvm->arch.vpit)
6732                         goto out;
6733                 r = kvm_vm_ioctl_reinject(kvm, &control);
6734                 break;
6735         }
6736         case KVM_SET_BOOT_CPU_ID:
6737                 r = 0;
6738                 mutex_lock(&kvm->lock);
6739                 if (kvm->created_vcpus)
6740                         r = -EBUSY;
6741                 else
6742                         kvm->arch.bsp_vcpu_id = arg;
6743                 mutex_unlock(&kvm->lock);
6744                 break;
6745 #ifdef CONFIG_KVM_XEN
6746         case KVM_XEN_HVM_CONFIG: {
6747                 struct kvm_xen_hvm_config xhc;
6748                 r = -EFAULT;
6749                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6750                         goto out;
6751                 r = kvm_xen_hvm_config(kvm, &xhc);
6752                 break;
6753         }
6754         case KVM_XEN_HVM_GET_ATTR: {
6755                 struct kvm_xen_hvm_attr xha;
6756
6757                 r = -EFAULT;
6758                 if (copy_from_user(&xha, argp, sizeof(xha)))
6759                         goto out;
6760                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6761                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6762                         r = -EFAULT;
6763                 break;
6764         }
6765         case KVM_XEN_HVM_SET_ATTR: {
6766                 struct kvm_xen_hvm_attr xha;
6767
6768                 r = -EFAULT;
6769                 if (copy_from_user(&xha, argp, sizeof(xha)))
6770                         goto out;
6771                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6772                 break;
6773         }
6774         case KVM_XEN_HVM_EVTCHN_SEND: {
6775                 struct kvm_irq_routing_xen_evtchn uxe;
6776
6777                 r = -EFAULT;
6778                 if (copy_from_user(&uxe, argp, sizeof(uxe)))
6779                         goto out;
6780                 r = kvm_xen_hvm_evtchn_send(kvm, &uxe);
6781                 break;
6782         }
6783 #endif
6784         case KVM_SET_CLOCK:
6785                 r = kvm_vm_ioctl_set_clock(kvm, argp);
6786                 break;
6787         case KVM_GET_CLOCK:
6788                 r = kvm_vm_ioctl_get_clock(kvm, argp);
6789                 break;
6790         case KVM_SET_TSC_KHZ: {
6791                 u32 user_tsc_khz;
6792
6793                 r = -EINVAL;
6794                 user_tsc_khz = (u32)arg;
6795
6796                 if (kvm_caps.has_tsc_control &&
6797                     user_tsc_khz >= kvm_caps.max_guest_tsc_khz)
6798                         goto out;
6799
6800                 if (user_tsc_khz == 0)
6801                         user_tsc_khz = tsc_khz;
6802
6803                 WRITE_ONCE(kvm->arch.default_tsc_khz, user_tsc_khz);
6804                 r = 0;
6805
6806                 goto out;
6807         }
6808         case KVM_GET_TSC_KHZ: {
6809                 r = READ_ONCE(kvm->arch.default_tsc_khz);
6810                 goto out;
6811         }
6812         case KVM_MEMORY_ENCRYPT_OP: {
6813                 r = -ENOTTY;
6814                 if (!kvm_x86_ops.mem_enc_ioctl)
6815                         goto out;
6816
6817                 r = static_call(kvm_x86_mem_enc_ioctl)(kvm, argp);
6818                 break;
6819         }
6820         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6821                 struct kvm_enc_region region;
6822
6823                 r = -EFAULT;
6824                 if (copy_from_user(&region, argp, sizeof(region)))
6825                         goto out;
6826
6827                 r = -ENOTTY;
6828                 if (!kvm_x86_ops.mem_enc_register_region)
6829                         goto out;
6830
6831                 r = static_call(kvm_x86_mem_enc_register_region)(kvm, &region);
6832                 break;
6833         }
6834         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6835                 struct kvm_enc_region region;
6836
6837                 r = -EFAULT;
6838                 if (copy_from_user(&region, argp, sizeof(region)))
6839                         goto out;
6840
6841                 r = -ENOTTY;
6842                 if (!kvm_x86_ops.mem_enc_unregister_region)
6843                         goto out;
6844
6845                 r = static_call(kvm_x86_mem_enc_unregister_region)(kvm, &region);
6846                 break;
6847         }
6848         case KVM_HYPERV_EVENTFD: {
6849                 struct kvm_hyperv_eventfd hvevfd;
6850
6851                 r = -EFAULT;
6852                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6853                         goto out;
6854                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6855                 break;
6856         }
6857         case KVM_SET_PMU_EVENT_FILTER:
6858                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6859                 break;
6860         case KVM_X86_SET_MSR_FILTER:
6861                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6862                 break;
6863         default:
6864                 r = -ENOTTY;
6865         }
6866 out:
6867         return r;
6868 }
6869
6870 static void kvm_init_msr_list(void)
6871 {
6872         u32 dummy[2];
6873         unsigned i;
6874
6875         BUILD_BUG_ON_MSG(KVM_PMC_MAX_FIXED != 3,
6876                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6877
6878         num_msrs_to_save = 0;
6879         num_emulated_msrs = 0;
6880         num_msr_based_features = 0;
6881
6882         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6883                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6884                         continue;
6885
6886                 /*
6887                  * Even MSRs that are valid in the host may not be exposed
6888                  * to the guests in some cases.
6889                  */
6890                 switch (msrs_to_save_all[i]) {
6891                 case MSR_IA32_BNDCFGS:
6892                         if (!kvm_mpx_supported())
6893                                 continue;
6894                         break;
6895                 case MSR_TSC_AUX:
6896                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6897                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6898                                 continue;
6899                         break;
6900                 case MSR_IA32_UMWAIT_CONTROL:
6901                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6902                                 continue;
6903                         break;
6904                 case MSR_IA32_RTIT_CTL:
6905                 case MSR_IA32_RTIT_STATUS:
6906                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6907                                 continue;
6908                         break;
6909                 case MSR_IA32_RTIT_CR3_MATCH:
6910                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6911                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6912                                 continue;
6913                         break;
6914                 case MSR_IA32_RTIT_OUTPUT_BASE:
6915                 case MSR_IA32_RTIT_OUTPUT_MASK:
6916                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6917                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6918                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6919                                 continue;
6920                         break;
6921                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6922                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6923                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6924                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6925                                 continue;
6926                         break;
6927                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6928                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6929                             min(INTEL_PMC_MAX_GENERIC, kvm_pmu_cap.num_counters_gp))
6930                                 continue;
6931                         break;
6932                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6933                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6934                             min(INTEL_PMC_MAX_GENERIC, kvm_pmu_cap.num_counters_gp))
6935                                 continue;
6936                         break;
6937                 case MSR_IA32_XFD:
6938                 case MSR_IA32_XFD_ERR:
6939                         if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
6940                                 continue;
6941                         break;
6942                 default:
6943                         break;
6944                 }
6945
6946                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6947         }
6948
6949         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6950                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6951                         continue;
6952
6953                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6954         }
6955
6956         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6957                 struct kvm_msr_entry msr;
6958
6959                 msr.index = msr_based_features_all[i];
6960                 if (kvm_get_msr_feature(&msr))
6961                         continue;
6962
6963                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6964         }
6965 }
6966
6967 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6968                            const void *v)
6969 {
6970         int handled = 0;
6971         int n;
6972
6973         do {
6974                 n = min(len, 8);
6975                 if (!(lapic_in_kernel(vcpu) &&
6976                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6977                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6978                         break;
6979                 handled += n;
6980                 addr += n;
6981                 len -= n;
6982                 v += n;
6983         } while (len);
6984
6985         return handled;
6986 }
6987
6988 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6989 {
6990         int handled = 0;
6991         int n;
6992
6993         do {
6994                 n = min(len, 8);
6995                 if (!(lapic_in_kernel(vcpu) &&
6996                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6997                                          addr, n, v))
6998                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6999                         break;
7000                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
7001                 handled += n;
7002                 addr += n;
7003                 len -= n;
7004                 v += n;
7005         } while (len);
7006
7007         return handled;
7008 }
7009
7010 static void kvm_set_segment(struct kvm_vcpu *vcpu,
7011                         struct kvm_segment *var, int seg)
7012 {
7013         static_call(kvm_x86_set_segment)(vcpu, var, seg);
7014 }
7015
7016 void kvm_get_segment(struct kvm_vcpu *vcpu,
7017                      struct kvm_segment *var, int seg)
7018 {
7019         static_call(kvm_x86_get_segment)(vcpu, var, seg);
7020 }
7021
7022 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u64 access,
7023                            struct x86_exception *exception)
7024 {
7025         struct kvm_mmu *mmu = vcpu->arch.mmu;
7026         gpa_t t_gpa;
7027
7028         BUG_ON(!mmu_is_nested(vcpu));
7029
7030         /* NPT walks are always user-walks */
7031         access |= PFERR_USER_MASK;
7032         t_gpa  = mmu->gva_to_gpa(vcpu, mmu, gpa, access, exception);
7033
7034         return t_gpa;
7035 }
7036
7037 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
7038                               struct x86_exception *exception)
7039 {
7040         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7041
7042         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
7043         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
7044 }
7045 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
7046
7047  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
7048                                 struct x86_exception *exception)
7049 {
7050         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7051
7052         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
7053         access |= PFERR_FETCH_MASK;
7054         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
7055 }
7056
7057 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
7058                                struct x86_exception *exception)
7059 {
7060         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7061
7062         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
7063         access |= PFERR_WRITE_MASK;
7064         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
7065 }
7066 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
7067
7068 /* uses this to access any guest's mapped memory without checking CPL */
7069 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
7070                                 struct x86_exception *exception)
7071 {
7072         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7073
7074         return mmu->gva_to_gpa(vcpu, mmu, gva, 0, exception);
7075 }
7076
7077 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
7078                                       struct kvm_vcpu *vcpu, u64 access,
7079                                       struct x86_exception *exception)
7080 {
7081         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7082         void *data = val;
7083         int r = X86EMUL_CONTINUE;
7084
7085         while (bytes) {
7086                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
7087                 unsigned offset = addr & (PAGE_SIZE-1);
7088                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
7089                 int ret;
7090
7091                 if (gpa == INVALID_GPA)
7092                         return X86EMUL_PROPAGATE_FAULT;
7093                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
7094                                                offset, toread);
7095                 if (ret < 0) {
7096                         r = X86EMUL_IO_NEEDED;
7097                         goto out;
7098                 }
7099
7100                 bytes -= toread;
7101                 data += toread;
7102                 addr += toread;
7103         }
7104 out:
7105         return r;
7106 }
7107
7108 /* used for instruction fetching */
7109 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
7110                                 gva_t addr, void *val, unsigned int bytes,
7111                                 struct x86_exception *exception)
7112 {
7113         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7114         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7115         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
7116         unsigned offset;
7117         int ret;
7118
7119         /* Inline kvm_read_guest_virt_helper for speed.  */
7120         gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access|PFERR_FETCH_MASK,
7121                                     exception);
7122         if (unlikely(gpa == INVALID_GPA))
7123                 return X86EMUL_PROPAGATE_FAULT;
7124
7125         offset = addr & (PAGE_SIZE-1);
7126         if (WARN_ON(offset + bytes > PAGE_SIZE))
7127                 bytes = (unsigned)PAGE_SIZE - offset;
7128         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
7129                                        offset, bytes);
7130         if (unlikely(ret < 0))
7131                 return X86EMUL_IO_NEEDED;
7132
7133         return X86EMUL_CONTINUE;
7134 }
7135
7136 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
7137                                gva_t addr, void *val, unsigned int bytes,
7138                                struct x86_exception *exception)
7139 {
7140         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
7141
7142         /*
7143          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
7144          * is returned, but our callers are not ready for that and they blindly
7145          * call kvm_inject_page_fault.  Ensure that they at least do not leak
7146          * uninitialized kernel stack memory into cr2 and error code.
7147          */
7148         memset(exception, 0, sizeof(*exception));
7149         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
7150                                           exception);
7151 }
7152 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
7153
7154 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
7155                              gva_t addr, void *val, unsigned int bytes,
7156                              struct x86_exception *exception, bool system)
7157 {
7158         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7159         u64 access = 0;
7160
7161         if (system)
7162                 access |= PFERR_IMPLICIT_ACCESS;
7163         else if (static_call(kvm_x86_get_cpl)(vcpu) == 3)
7164                 access |= PFERR_USER_MASK;
7165
7166         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
7167 }
7168
7169 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
7170                 unsigned long addr, void *val, unsigned int bytes)
7171 {
7172         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7173         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
7174
7175         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
7176 }
7177
7178 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
7179                                       struct kvm_vcpu *vcpu, u64 access,
7180                                       struct x86_exception *exception)
7181 {
7182         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7183         void *data = val;
7184         int r = X86EMUL_CONTINUE;
7185
7186         while (bytes) {
7187                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
7188                 unsigned offset = addr & (PAGE_SIZE-1);
7189                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
7190                 int ret;
7191
7192                 if (gpa == INVALID_GPA)
7193                         return X86EMUL_PROPAGATE_FAULT;
7194                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
7195                 if (ret < 0) {
7196                         r = X86EMUL_IO_NEEDED;
7197                         goto out;
7198                 }
7199
7200                 bytes -= towrite;
7201                 data += towrite;
7202                 addr += towrite;
7203         }
7204 out:
7205         return r;
7206 }
7207
7208 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
7209                               unsigned int bytes, struct x86_exception *exception,
7210                               bool system)
7211 {
7212         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7213         u64 access = PFERR_WRITE_MASK;
7214
7215         if (system)
7216                 access |= PFERR_IMPLICIT_ACCESS;
7217         else if (static_call(kvm_x86_get_cpl)(vcpu) == 3)
7218                 access |= PFERR_USER_MASK;
7219
7220         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
7221                                            access, exception);
7222 }
7223
7224 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
7225                                 unsigned int bytes, struct x86_exception *exception)
7226 {
7227         /* kvm_write_guest_virt_system can pull in tons of pages. */
7228         vcpu->arch.l1tf_flush_l1d = true;
7229
7230         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
7231                                            PFERR_WRITE_MASK, exception);
7232 }
7233 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
7234
7235 static int kvm_can_emulate_insn(struct kvm_vcpu *vcpu, int emul_type,
7236                                 void *insn, int insn_len)
7237 {
7238         return static_call(kvm_x86_can_emulate_instruction)(vcpu, emul_type,
7239                                                             insn, insn_len);
7240 }
7241
7242 int handle_ud(struct kvm_vcpu *vcpu)
7243 {
7244         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
7245         int emul_type = EMULTYPE_TRAP_UD;
7246         char sig[5]; /* ud2; .ascii "kvm" */
7247         struct x86_exception e;
7248
7249         if (unlikely(!kvm_can_emulate_insn(vcpu, emul_type, NULL, 0)))
7250                 return 1;
7251
7252         if (force_emulation_prefix &&
7253             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
7254                                 sig, sizeof(sig), &e) == 0 &&
7255             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
7256                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
7257                 emul_type = EMULTYPE_TRAP_UD_FORCED;
7258         }
7259
7260         return kvm_emulate_instruction(vcpu, emul_type);
7261 }
7262 EXPORT_SYMBOL_GPL(handle_ud);
7263
7264 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
7265                             gpa_t gpa, bool write)
7266 {
7267         /* For APIC access vmexit */
7268         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7269                 return 1;
7270
7271         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
7272                 trace_vcpu_match_mmio(gva, gpa, write, true);
7273                 return 1;
7274         }
7275
7276         return 0;
7277 }
7278
7279 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
7280                                 gpa_t *gpa, struct x86_exception *exception,
7281                                 bool write)
7282 {
7283         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7284         u64 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
7285                 | (write ? PFERR_WRITE_MASK : 0);
7286
7287         /*
7288          * currently PKRU is only applied to ept enabled guest so
7289          * there is no pkey in EPT page table for L1 guest or EPT
7290          * shadow page table for L2 guest.
7291          */
7292         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
7293             !permission_fault(vcpu, vcpu->arch.walk_mmu,
7294                               vcpu->arch.mmio_access, 0, access))) {
7295                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
7296                                         (gva & (PAGE_SIZE - 1));
7297                 trace_vcpu_match_mmio(gva, *gpa, write, false);
7298                 return 1;
7299         }
7300
7301         *gpa = mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
7302
7303         if (*gpa == INVALID_GPA)
7304                 return -1;
7305
7306         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
7307 }
7308
7309 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
7310                         const void *val, int bytes)
7311 {
7312         int ret;
7313
7314         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
7315         if (ret < 0)
7316                 return 0;
7317         kvm_page_track_write(vcpu, gpa, val, bytes);
7318         return 1;
7319 }
7320
7321 struct read_write_emulator_ops {
7322         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
7323                                   int bytes);
7324         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
7325                                   void *val, int bytes);
7326         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
7327                                int bytes, void *val);
7328         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
7329                                     void *val, int bytes);
7330         bool write;
7331 };
7332
7333 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
7334 {
7335         if (vcpu->mmio_read_completed) {
7336                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
7337                                vcpu->mmio_fragments[0].gpa, val);
7338                 vcpu->mmio_read_completed = 0;
7339                 return 1;
7340         }
7341
7342         return 0;
7343 }
7344
7345 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7346                         void *val, int bytes)
7347 {
7348         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
7349 }
7350
7351 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7352                          void *val, int bytes)
7353 {
7354         return emulator_write_phys(vcpu, gpa, val, bytes);
7355 }
7356
7357 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
7358 {
7359         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
7360         return vcpu_mmio_write(vcpu, gpa, bytes, val);
7361 }
7362
7363 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7364                           void *val, int bytes)
7365 {
7366         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
7367         return X86EMUL_IO_NEEDED;
7368 }
7369
7370 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7371                            void *val, int bytes)
7372 {
7373         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
7374
7375         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
7376         return X86EMUL_CONTINUE;
7377 }
7378
7379 static const struct read_write_emulator_ops read_emultor = {
7380         .read_write_prepare = read_prepare,
7381         .read_write_emulate = read_emulate,
7382         .read_write_mmio = vcpu_mmio_read,
7383         .read_write_exit_mmio = read_exit_mmio,
7384 };
7385
7386 static const struct read_write_emulator_ops write_emultor = {
7387         .read_write_emulate = write_emulate,
7388         .read_write_mmio = write_mmio,
7389         .read_write_exit_mmio = write_exit_mmio,
7390         .write = true,
7391 };
7392
7393 static int emulator_read_write_onepage(unsigned long addr, void *val,
7394                                        unsigned int bytes,
7395                                        struct x86_exception *exception,
7396                                        struct kvm_vcpu *vcpu,
7397                                        const struct read_write_emulator_ops *ops)
7398 {
7399         gpa_t gpa;
7400         int handled, ret;
7401         bool write = ops->write;
7402         struct kvm_mmio_fragment *frag;
7403         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7404
7405         /*
7406          * If the exit was due to a NPF we may already have a GPA.
7407          * If the GPA is present, use it to avoid the GVA to GPA table walk.
7408          * Note, this cannot be used on string operations since string
7409          * operation using rep will only have the initial GPA from the NPF
7410          * occurred.
7411          */
7412         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
7413             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
7414                 gpa = ctxt->gpa_val;
7415                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
7416         } else {
7417                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
7418                 if (ret < 0)
7419                         return X86EMUL_PROPAGATE_FAULT;
7420         }
7421
7422         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
7423                 return X86EMUL_CONTINUE;
7424
7425         /*
7426          * Is this MMIO handled locally?
7427          */
7428         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
7429         if (handled == bytes)
7430                 return X86EMUL_CONTINUE;
7431
7432         gpa += handled;
7433         bytes -= handled;
7434         val += handled;
7435
7436         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
7437         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
7438         frag->gpa = gpa;
7439         frag->data = val;
7440         frag->len = bytes;
7441         return X86EMUL_CONTINUE;
7442 }
7443
7444 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
7445                         unsigned long addr,
7446                         void *val, unsigned int bytes,
7447                         struct x86_exception *exception,
7448                         const struct read_write_emulator_ops *ops)
7449 {
7450         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7451         gpa_t gpa;
7452         int rc;
7453
7454         if (ops->read_write_prepare &&
7455                   ops->read_write_prepare(vcpu, val, bytes))
7456                 return X86EMUL_CONTINUE;
7457
7458         vcpu->mmio_nr_fragments = 0;
7459
7460         /* Crossing a page boundary? */
7461         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
7462                 int now;
7463
7464                 now = -addr & ~PAGE_MASK;
7465                 rc = emulator_read_write_onepage(addr, val, now, exception,
7466                                                  vcpu, ops);
7467
7468                 if (rc != X86EMUL_CONTINUE)
7469                         return rc;
7470                 addr += now;
7471                 if (ctxt->mode != X86EMUL_MODE_PROT64)
7472                         addr = (u32)addr;
7473                 val += now;
7474                 bytes -= now;
7475         }
7476
7477         rc = emulator_read_write_onepage(addr, val, bytes, exception,
7478                                          vcpu, ops);
7479         if (rc != X86EMUL_CONTINUE)
7480                 return rc;
7481
7482         if (!vcpu->mmio_nr_fragments)
7483                 return rc;
7484
7485         gpa = vcpu->mmio_fragments[0].gpa;
7486
7487         vcpu->mmio_needed = 1;
7488         vcpu->mmio_cur_fragment = 0;
7489
7490         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
7491         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
7492         vcpu->run->exit_reason = KVM_EXIT_MMIO;
7493         vcpu->run->mmio.phys_addr = gpa;
7494
7495         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
7496 }
7497
7498 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
7499                                   unsigned long addr,
7500                                   void *val,
7501                                   unsigned int bytes,
7502                                   struct x86_exception *exception)
7503 {
7504         return emulator_read_write(ctxt, addr, val, bytes,
7505                                    exception, &read_emultor);
7506 }
7507
7508 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7509                             unsigned long addr,
7510                             const void *val,
7511                             unsigned int bytes,
7512                             struct x86_exception *exception)
7513 {
7514         return emulator_read_write(ctxt, addr, (void *)val, bytes,
7515                                    exception, &write_emultor);
7516 }
7517
7518 #define emulator_try_cmpxchg_user(t, ptr, old, new) \
7519         (__try_cmpxchg_user((t __user *)(ptr), (t *)(old), *(t *)(new), efault ## t))
7520
7521 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7522                                      unsigned long addr,
7523                                      const void *old,
7524                                      const void *new,
7525                                      unsigned int bytes,
7526                                      struct x86_exception *exception)
7527 {
7528         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7529         u64 page_line_mask;
7530         unsigned long hva;
7531         gpa_t gpa;
7532         int r;
7533
7534         /* guests cmpxchg8b have to be emulated atomically */
7535         if (bytes > 8 || (bytes & (bytes - 1)))
7536                 goto emul_write;
7537
7538         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7539
7540         if (gpa == INVALID_GPA ||
7541             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7542                 goto emul_write;
7543
7544         /*
7545          * Emulate the atomic as a straight write to avoid #AC if SLD is
7546          * enabled in the host and the access splits a cache line.
7547          */
7548         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7549                 page_line_mask = ~(cache_line_size() - 1);
7550         else
7551                 page_line_mask = PAGE_MASK;
7552
7553         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7554                 goto emul_write;
7555
7556         hva = kvm_vcpu_gfn_to_hva(vcpu, gpa_to_gfn(gpa));
7557         if (kvm_is_error_hva(hva))
7558                 goto emul_write;
7559
7560         hva += offset_in_page(gpa);
7561
7562         switch (bytes) {
7563         case 1:
7564                 r = emulator_try_cmpxchg_user(u8, hva, old, new);
7565                 break;
7566         case 2:
7567                 r = emulator_try_cmpxchg_user(u16, hva, old, new);
7568                 break;
7569         case 4:
7570                 r = emulator_try_cmpxchg_user(u32, hva, old, new);
7571                 break;
7572         case 8:
7573                 r = emulator_try_cmpxchg_user(u64, hva, old, new);
7574                 break;
7575         default:
7576                 BUG();
7577         }
7578
7579         if (r < 0)
7580                 return X86EMUL_UNHANDLEABLE;
7581         if (r)
7582                 return X86EMUL_CMPXCHG_FAILED;
7583
7584         kvm_page_track_write(vcpu, gpa, new, bytes);
7585
7586         return X86EMUL_CONTINUE;
7587
7588 emul_write:
7589         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
7590
7591         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7592 }
7593
7594 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7595                                unsigned short port, void *data,
7596                                unsigned int count, bool in)
7597 {
7598         unsigned i;
7599         int r;
7600
7601         WARN_ON_ONCE(vcpu->arch.pio.count);
7602         for (i = 0; i < count; i++) {
7603                 if (in)
7604                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, port, size, data);
7605                 else
7606                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS, port, size, data);
7607
7608                 if (r) {
7609                         if (i == 0)
7610                                 goto userspace_io;
7611
7612                         /*
7613                          * Userspace must have unregistered the device while PIO
7614                          * was running.  Drop writes / read as 0.
7615                          */
7616                         if (in)
7617                                 memset(data, 0, size * (count - i));
7618                         break;
7619                 }
7620
7621                 data += size;
7622         }
7623         return 1;
7624
7625 userspace_io:
7626         vcpu->arch.pio.port = port;
7627         vcpu->arch.pio.in = in;
7628         vcpu->arch.pio.count = count;
7629         vcpu->arch.pio.size = size;
7630
7631         if (in)
7632                 memset(vcpu->arch.pio_data, 0, size * count);
7633         else
7634                 memcpy(vcpu->arch.pio_data, data, size * count);
7635
7636         vcpu->run->exit_reason = KVM_EXIT_IO;
7637         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7638         vcpu->run->io.size = size;
7639         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7640         vcpu->run->io.count = count;
7641         vcpu->run->io.port = port;
7642         return 0;
7643 }
7644
7645 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7646                            unsigned short port, void *val, unsigned int count)
7647 {
7648         int r = emulator_pio_in_out(vcpu, size, port, val, count, true);
7649         if (r)
7650                 trace_kvm_pio(KVM_PIO_IN, port, size, count, val);
7651
7652         return r;
7653 }
7654
7655 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7656 {
7657         int size = vcpu->arch.pio.size;
7658         unsigned int count = vcpu->arch.pio.count;
7659         memcpy(val, vcpu->arch.pio_data, size * count);
7660         trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7661         vcpu->arch.pio.count = 0;
7662 }
7663
7664 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7665                                     int size, unsigned short port, void *val,
7666                                     unsigned int count)
7667 {
7668         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7669         if (vcpu->arch.pio.count) {
7670                 /*
7671                  * Complete a previous iteration that required userspace I/O.
7672                  * Note, @count isn't guaranteed to match pio.count as userspace
7673                  * can modify ECX before rerunning the vCPU.  Ignore any such
7674                  * shenanigans as KVM doesn't support modifying the rep count,
7675                  * and the emulator ensures @count doesn't overflow the buffer.
7676                  */
7677                 complete_emulator_pio_in(vcpu, val);
7678                 return 1;
7679         }
7680
7681         return emulator_pio_in(vcpu, size, port, val, count);
7682 }
7683
7684 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7685                             unsigned short port, const void *val,
7686                             unsigned int count)
7687 {
7688         trace_kvm_pio(KVM_PIO_OUT, port, size, count, val);
7689         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
7690 }
7691
7692 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7693                                      int size, unsigned short port,
7694                                      const void *val, unsigned int count)
7695 {
7696         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7697 }
7698
7699 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7700 {
7701         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7702 }
7703
7704 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7705 {
7706         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7707 }
7708
7709 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7710 {
7711         if (!need_emulate_wbinvd(vcpu))
7712                 return X86EMUL_CONTINUE;
7713
7714         if (static_call(kvm_x86_has_wbinvd_exit)()) {
7715                 int cpu = get_cpu();
7716
7717                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7718                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7719                                 wbinvd_ipi, NULL, 1);
7720                 put_cpu();
7721                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7722         } else
7723                 wbinvd();
7724         return X86EMUL_CONTINUE;
7725 }
7726
7727 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7728 {
7729         kvm_emulate_wbinvd_noskip(vcpu);
7730         return kvm_skip_emulated_instruction(vcpu);
7731 }
7732 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7733
7734
7735
7736 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7737 {
7738         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7739 }
7740
7741 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7742                             unsigned long *dest)
7743 {
7744         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7745 }
7746
7747 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7748                            unsigned long value)
7749 {
7750
7751         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7752 }
7753
7754 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7755 {
7756         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7757 }
7758
7759 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7760 {
7761         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7762         unsigned long value;
7763
7764         switch (cr) {
7765         case 0:
7766                 value = kvm_read_cr0(vcpu);
7767                 break;
7768         case 2:
7769                 value = vcpu->arch.cr2;
7770                 break;
7771         case 3:
7772                 value = kvm_read_cr3(vcpu);
7773                 break;
7774         case 4:
7775                 value = kvm_read_cr4(vcpu);
7776                 break;
7777         case 8:
7778                 value = kvm_get_cr8(vcpu);
7779                 break;
7780         default:
7781                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7782                 return 0;
7783         }
7784
7785         return value;
7786 }
7787
7788 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7789 {
7790         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7791         int res = 0;
7792
7793         switch (cr) {
7794         case 0:
7795                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7796                 break;
7797         case 2:
7798                 vcpu->arch.cr2 = val;
7799                 break;
7800         case 3:
7801                 res = kvm_set_cr3(vcpu, val);
7802                 break;
7803         case 4:
7804                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7805                 break;
7806         case 8:
7807                 res = kvm_set_cr8(vcpu, val);
7808                 break;
7809         default:
7810                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7811                 res = -1;
7812         }
7813
7814         return res;
7815 }
7816
7817 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7818 {
7819         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7820 }
7821
7822 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7823 {
7824         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7825 }
7826
7827 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7828 {
7829         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7830 }
7831
7832 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7833 {
7834         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7835 }
7836
7837 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7838 {
7839         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7840 }
7841
7842 static unsigned long emulator_get_cached_segment_base(
7843         struct x86_emulate_ctxt *ctxt, int seg)
7844 {
7845         return get_segment_base(emul_to_vcpu(ctxt), seg);
7846 }
7847
7848 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7849                                  struct desc_struct *desc, u32 *base3,
7850                                  int seg)
7851 {
7852         struct kvm_segment var;
7853
7854         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7855         *selector = var.selector;
7856
7857         if (var.unusable) {
7858                 memset(desc, 0, sizeof(*desc));
7859                 if (base3)
7860                         *base3 = 0;
7861                 return false;
7862         }
7863
7864         if (var.g)
7865                 var.limit >>= 12;
7866         set_desc_limit(desc, var.limit);
7867         set_desc_base(desc, (unsigned long)var.base);
7868 #ifdef CONFIG_X86_64
7869         if (base3)
7870                 *base3 = var.base >> 32;
7871 #endif
7872         desc->type = var.type;
7873         desc->s = var.s;
7874         desc->dpl = var.dpl;
7875         desc->p = var.present;
7876         desc->avl = var.avl;
7877         desc->l = var.l;
7878         desc->d = var.db;
7879         desc->g = var.g;
7880
7881         return true;
7882 }
7883
7884 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7885                                  struct desc_struct *desc, u32 base3,
7886                                  int seg)
7887 {
7888         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7889         struct kvm_segment var;
7890
7891         var.selector = selector;
7892         var.base = get_desc_base(desc);
7893 #ifdef CONFIG_X86_64
7894         var.base |= ((u64)base3) << 32;
7895 #endif
7896         var.limit = get_desc_limit(desc);
7897         if (desc->g)
7898                 var.limit = (var.limit << 12) | 0xfff;
7899         var.type = desc->type;
7900         var.dpl = desc->dpl;
7901         var.db = desc->d;
7902         var.s = desc->s;
7903         var.l = desc->l;
7904         var.g = desc->g;
7905         var.avl = desc->avl;
7906         var.present = desc->p;
7907         var.unusable = !var.present;
7908         var.padding = 0;
7909
7910         kvm_set_segment(vcpu, &var, seg);
7911         return;
7912 }
7913
7914 static int emulator_get_msr_with_filter(struct x86_emulate_ctxt *ctxt,
7915                                         u32 msr_index, u64 *pdata)
7916 {
7917         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7918         int r;
7919
7920         r = kvm_get_msr_with_filter(vcpu, msr_index, pdata);
7921
7922         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_RDMSR, 0,
7923                                     complete_emulated_rdmsr, r)) {
7924                 /* Bounce to user space */
7925                 return X86EMUL_IO_NEEDED;
7926         }
7927
7928         return r;
7929 }
7930
7931 static int emulator_set_msr_with_filter(struct x86_emulate_ctxt *ctxt,
7932                                         u32 msr_index, u64 data)
7933 {
7934         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7935         int r;
7936
7937         r = kvm_set_msr_with_filter(vcpu, msr_index, data);
7938
7939         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_WRMSR, data,
7940                                     complete_emulated_msr_access, r)) {
7941                 /* Bounce to user space */
7942                 return X86EMUL_IO_NEEDED;
7943         }
7944
7945         return r;
7946 }
7947
7948 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7949                             u32 msr_index, u64 *pdata)
7950 {
7951         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
7952 }
7953
7954 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7955                             u32 msr_index, u64 data)
7956 {
7957         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
7958 }
7959
7960 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7961 {
7962         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7963
7964         return vcpu->arch.smbase;
7965 }
7966
7967 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7968 {
7969         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7970
7971         vcpu->arch.smbase = smbase;
7972 }
7973
7974 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7975                               u32 pmc)
7976 {
7977         if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc))
7978                 return 0;
7979         return -EINVAL;
7980 }
7981
7982 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7983                              u32 pmc, u64 *pdata)
7984 {
7985         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7986 }
7987
7988 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7989 {
7990         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7991 }
7992
7993 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7994                               struct x86_instruction_info *info,
7995                               enum x86_intercept_stage stage)
7996 {
7997         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7998                                             &ctxt->exception);
7999 }
8000
8001 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
8002                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
8003                               bool exact_only)
8004 {
8005         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
8006 }
8007
8008 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
8009 {
8010         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
8011 }
8012
8013 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
8014 {
8015         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
8016 }
8017
8018 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
8019 {
8020         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
8021 }
8022
8023 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt *ctxt)
8024 {
8025         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_RDPID);
8026 }
8027
8028 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
8029 {
8030         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
8031 }
8032
8033 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
8034 {
8035         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
8036 }
8037
8038 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
8039 {
8040         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
8041 }
8042
8043 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
8044 {
8045         return emul_to_vcpu(ctxt)->arch.hflags;
8046 }
8047
8048 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
8049 {
8050         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8051
8052         kvm_smm_changed(vcpu, false);
8053 }
8054
8055 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
8056                                   const char *smstate)
8057 {
8058         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
8059 }
8060
8061 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
8062 {
8063         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
8064 }
8065
8066 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
8067 {
8068         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
8069 }
8070
8071 static void emulator_vm_bugged(struct x86_emulate_ctxt *ctxt)
8072 {
8073         struct kvm *kvm = emul_to_vcpu(ctxt)->kvm;
8074
8075         if (!kvm->vm_bugged)
8076                 kvm_vm_bugged(kvm);
8077 }
8078
8079 static const struct x86_emulate_ops emulate_ops = {
8080         .vm_bugged           = emulator_vm_bugged,
8081         .read_gpr            = emulator_read_gpr,
8082         .write_gpr           = emulator_write_gpr,
8083         .read_std            = emulator_read_std,
8084         .write_std           = emulator_write_std,
8085         .read_phys           = kvm_read_guest_phys_system,
8086         .fetch               = kvm_fetch_guest_virt,
8087         .read_emulated       = emulator_read_emulated,
8088         .write_emulated      = emulator_write_emulated,
8089         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
8090         .invlpg              = emulator_invlpg,
8091         .pio_in_emulated     = emulator_pio_in_emulated,
8092         .pio_out_emulated    = emulator_pio_out_emulated,
8093         .get_segment         = emulator_get_segment,
8094         .set_segment         = emulator_set_segment,
8095         .get_cached_segment_base = emulator_get_cached_segment_base,
8096         .get_gdt             = emulator_get_gdt,
8097         .get_idt             = emulator_get_idt,
8098         .set_gdt             = emulator_set_gdt,
8099         .set_idt             = emulator_set_idt,
8100         .get_cr              = emulator_get_cr,
8101         .set_cr              = emulator_set_cr,
8102         .cpl                 = emulator_get_cpl,
8103         .get_dr              = emulator_get_dr,
8104         .set_dr              = emulator_set_dr,
8105         .get_smbase          = emulator_get_smbase,
8106         .set_smbase          = emulator_set_smbase,
8107         .set_msr_with_filter = emulator_set_msr_with_filter,
8108         .get_msr_with_filter = emulator_get_msr_with_filter,
8109         .set_msr             = emulator_set_msr,
8110         .get_msr             = emulator_get_msr,
8111         .check_pmc           = emulator_check_pmc,
8112         .read_pmc            = emulator_read_pmc,
8113         .halt                = emulator_halt,
8114         .wbinvd              = emulator_wbinvd,
8115         .fix_hypercall       = emulator_fix_hypercall,
8116         .intercept           = emulator_intercept,
8117         .get_cpuid           = emulator_get_cpuid,
8118         .guest_has_long_mode = emulator_guest_has_long_mode,
8119         .guest_has_movbe     = emulator_guest_has_movbe,
8120         .guest_has_fxsr      = emulator_guest_has_fxsr,
8121         .guest_has_rdpid     = emulator_guest_has_rdpid,
8122         .set_nmi_mask        = emulator_set_nmi_mask,
8123         .get_hflags          = emulator_get_hflags,
8124         .exiting_smm         = emulator_exiting_smm,
8125         .leave_smm           = emulator_leave_smm,
8126         .triple_fault        = emulator_triple_fault,
8127         .set_xcr             = emulator_set_xcr,
8128 };
8129
8130 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
8131 {
8132         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
8133         /*
8134          * an sti; sti; sequence only disable interrupts for the first
8135          * instruction. So, if the last instruction, be it emulated or
8136          * not, left the system with the INT_STI flag enabled, it
8137          * means that the last instruction is an sti. We should not
8138          * leave the flag on in this case. The same goes for mov ss
8139          */
8140         if (int_shadow & mask)
8141                 mask = 0;
8142         if (unlikely(int_shadow || mask)) {
8143                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
8144                 if (!mask)
8145                         kvm_make_request(KVM_REQ_EVENT, vcpu);
8146         }
8147 }
8148
8149 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
8150 {
8151         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8152         if (ctxt->exception.vector == PF_VECTOR)
8153                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
8154
8155         if (ctxt->exception.error_code_valid)
8156                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
8157                                       ctxt->exception.error_code);
8158         else
8159                 kvm_queue_exception(vcpu, ctxt->exception.vector);
8160         return false;
8161 }
8162
8163 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
8164 {
8165         struct x86_emulate_ctxt *ctxt;
8166
8167         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
8168         if (!ctxt) {
8169                 pr_err("kvm: failed to allocate vcpu's emulator\n");
8170                 return NULL;
8171         }
8172
8173         ctxt->vcpu = vcpu;
8174         ctxt->ops = &emulate_ops;
8175         vcpu->arch.emulate_ctxt = ctxt;
8176
8177         return ctxt;
8178 }
8179
8180 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
8181 {
8182         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8183         int cs_db, cs_l;
8184
8185         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
8186
8187         ctxt->gpa_available = false;
8188         ctxt->eflags = kvm_get_rflags(vcpu);
8189         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
8190
8191         ctxt->eip = kvm_rip_read(vcpu);
8192         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
8193                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
8194                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
8195                      cs_db                              ? X86EMUL_MODE_PROT32 :
8196                                                           X86EMUL_MODE_PROT16;
8197         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
8198         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
8199         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
8200
8201         ctxt->interruptibility = 0;
8202         ctxt->have_exception = false;
8203         ctxt->exception.vector = -1;
8204         ctxt->perm_ok = false;
8205
8206         init_decode_cache(ctxt);
8207         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8208 }
8209
8210 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
8211 {
8212         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8213         int ret;
8214
8215         init_emulate_ctxt(vcpu);
8216
8217         ctxt->op_bytes = 2;
8218         ctxt->ad_bytes = 2;
8219         ctxt->_eip = ctxt->eip + inc_eip;
8220         ret = emulate_int_real(ctxt, irq);
8221
8222         if (ret != X86EMUL_CONTINUE) {
8223                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
8224         } else {
8225                 ctxt->eip = ctxt->_eip;
8226                 kvm_rip_write(vcpu, ctxt->eip);
8227                 kvm_set_rflags(vcpu, ctxt->eflags);
8228         }
8229 }
8230 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
8231
8232 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
8233                                            u8 ndata, u8 *insn_bytes, u8 insn_size)
8234 {
8235         struct kvm_run *run = vcpu->run;
8236         u64 info[5];
8237         u8 info_start;
8238
8239         /*
8240          * Zero the whole array used to retrieve the exit info, as casting to
8241          * u32 for select entries will leave some chunks uninitialized.
8242          */
8243         memset(&info, 0, sizeof(info));
8244
8245         static_call(kvm_x86_get_exit_info)(vcpu, (u32 *)&info[0], &info[1],
8246                                            &info[2], (u32 *)&info[3],
8247                                            (u32 *)&info[4]);
8248
8249         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
8250         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
8251
8252         /*
8253          * There's currently space for 13 entries, but 5 are used for the exit
8254          * reason and info.  Restrict to 4 to reduce the maintenance burden
8255          * when expanding kvm_run.emulation_failure in the future.
8256          */
8257         if (WARN_ON_ONCE(ndata > 4))
8258                 ndata = 4;
8259
8260         /* Always include the flags as a 'data' entry. */
8261         info_start = 1;
8262         run->emulation_failure.flags = 0;
8263
8264         if (insn_size) {
8265                 BUILD_BUG_ON((sizeof(run->emulation_failure.insn_size) +
8266                               sizeof(run->emulation_failure.insn_bytes) != 16));
8267                 info_start += 2;
8268                 run->emulation_failure.flags |=
8269                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
8270                 run->emulation_failure.insn_size = insn_size;
8271                 memset(run->emulation_failure.insn_bytes, 0x90,
8272                        sizeof(run->emulation_failure.insn_bytes));
8273                 memcpy(run->emulation_failure.insn_bytes, insn_bytes, insn_size);
8274         }
8275
8276         memcpy(&run->internal.data[info_start], info, sizeof(info));
8277         memcpy(&run->internal.data[info_start + ARRAY_SIZE(info)], data,
8278                ndata * sizeof(data[0]));
8279
8280         run->emulation_failure.ndata = info_start + ARRAY_SIZE(info) + ndata;
8281 }
8282
8283 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu *vcpu)
8284 {
8285         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8286
8287         prepare_emulation_failure_exit(vcpu, NULL, 0, ctxt->fetch.data,
8288                                        ctxt->fetch.end - ctxt->fetch.data);
8289 }
8290
8291 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
8292                                           u8 ndata)
8293 {
8294         prepare_emulation_failure_exit(vcpu, data, ndata, NULL, 0);
8295 }
8296 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit);
8297
8298 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
8299 {
8300         __kvm_prepare_emulation_failure_exit(vcpu, NULL, 0);
8301 }
8302 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);
8303
8304 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
8305 {
8306         struct kvm *kvm = vcpu->kvm;
8307
8308         ++vcpu->stat.insn_emulation_fail;
8309         trace_kvm_emulate_insn_failed(vcpu);
8310
8311         if (emulation_type & EMULTYPE_VMWARE_GP) {
8312                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8313                 return 1;
8314         }
8315
8316         if (kvm->arch.exit_on_emulation_error ||
8317             (emulation_type & EMULTYPE_SKIP)) {
8318                 prepare_emulation_ctxt_failure_exit(vcpu);
8319                 return 0;
8320         }
8321
8322         kvm_queue_exception(vcpu, UD_VECTOR);
8323
8324         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
8325                 prepare_emulation_ctxt_failure_exit(vcpu);
8326                 return 0;
8327         }
8328
8329         return 1;
8330 }
8331
8332 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8333                                   bool write_fault_to_shadow_pgtable,
8334                                   int emulation_type)
8335 {
8336         gpa_t gpa = cr2_or_gpa;
8337         kvm_pfn_t pfn;
8338
8339         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8340                 return false;
8341
8342         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8343             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8344                 return false;
8345
8346         if (!vcpu->arch.mmu->root_role.direct) {
8347                 /*
8348                  * Write permission should be allowed since only
8349                  * write access need to be emulated.
8350                  */
8351                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8352
8353                 /*
8354                  * If the mapping is invalid in guest, let cpu retry
8355                  * it to generate fault.
8356                  */
8357                 if (gpa == INVALID_GPA)
8358                         return true;
8359         }
8360
8361         /*
8362          * Do not retry the unhandleable instruction if it faults on the
8363          * readonly host memory, otherwise it will goto a infinite loop:
8364          * retry instruction -> write #PF -> emulation fail -> retry
8365          * instruction -> ...
8366          */
8367         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
8368
8369         /*
8370          * If the instruction failed on the error pfn, it can not be fixed,
8371          * report the error to userspace.
8372          */
8373         if (is_error_noslot_pfn(pfn))
8374                 return false;
8375
8376         kvm_release_pfn_clean(pfn);
8377
8378         /* The instructions are well-emulated on direct mmu. */
8379         if (vcpu->arch.mmu->root_role.direct) {
8380                 unsigned int indirect_shadow_pages;
8381
8382                 write_lock(&vcpu->kvm->mmu_lock);
8383                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
8384                 write_unlock(&vcpu->kvm->mmu_lock);
8385
8386                 if (indirect_shadow_pages)
8387                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8388
8389                 return true;
8390         }
8391
8392         /*
8393          * if emulation was due to access to shadowed page table
8394          * and it failed try to unshadow page and re-enter the
8395          * guest to let CPU execute the instruction.
8396          */
8397         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8398
8399         /*
8400          * If the access faults on its page table, it can not
8401          * be fixed by unprotecting shadow page and it should
8402          * be reported to userspace.
8403          */
8404         return !write_fault_to_shadow_pgtable;
8405 }
8406
8407 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
8408                               gpa_t cr2_or_gpa,  int emulation_type)
8409 {
8410         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8411         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
8412
8413         last_retry_eip = vcpu->arch.last_retry_eip;
8414         last_retry_addr = vcpu->arch.last_retry_addr;
8415
8416         /*
8417          * If the emulation is caused by #PF and it is non-page_table
8418          * writing instruction, it means the VM-EXIT is caused by shadow
8419          * page protected, we can zap the shadow page and retry this
8420          * instruction directly.
8421          *
8422          * Note: if the guest uses a non-page-table modifying instruction
8423          * on the PDE that points to the instruction, then we will unmap
8424          * the instruction and go to an infinite loop. So, we cache the
8425          * last retried eip and the last fault address, if we meet the eip
8426          * and the address again, we can break out of the potential infinite
8427          * loop.
8428          */
8429         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
8430
8431         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8432                 return false;
8433
8434         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8435             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8436                 return false;
8437
8438         if (x86_page_table_writing_insn(ctxt))
8439                 return false;
8440
8441         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
8442                 return false;
8443
8444         vcpu->arch.last_retry_eip = ctxt->eip;
8445         vcpu->arch.last_retry_addr = cr2_or_gpa;
8446
8447         if (!vcpu->arch.mmu->root_role.direct)
8448                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8449
8450         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8451
8452         return true;
8453 }
8454
8455 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
8456 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
8457
8458 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
8459 {
8460         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
8461
8462         if (entering_smm) {
8463                 vcpu->arch.hflags |= HF_SMM_MASK;
8464         } else {
8465                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
8466
8467                 /* Process a latched INIT or SMI, if any.  */
8468                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8469
8470                 /*
8471                  * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
8472                  * on SMM exit we still need to reload them from
8473                  * guest memory
8474                  */
8475                 vcpu->arch.pdptrs_from_userspace = false;
8476         }
8477
8478         kvm_mmu_reset_context(vcpu);
8479 }
8480
8481 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
8482                                 unsigned long *db)
8483 {
8484         u32 dr6 = 0;
8485         int i;
8486         u32 enable, rwlen;
8487
8488         enable = dr7;
8489         rwlen = dr7 >> 16;
8490         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
8491                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
8492                         dr6 |= (1 << i);
8493         return dr6;
8494 }
8495
8496 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
8497 {
8498         struct kvm_run *kvm_run = vcpu->run;
8499
8500         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
8501                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
8502                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
8503                 kvm_run->debug.arch.exception = DB_VECTOR;
8504                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8505                 return 0;
8506         }
8507         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
8508         return 1;
8509 }
8510
8511 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
8512 {
8513         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8514         int r;
8515
8516         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
8517         if (unlikely(!r))
8518                 return 0;
8519
8520         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8521
8522         /*
8523          * rflags is the old, "raw" value of the flags.  The new value has
8524          * not been saved yet.
8525          *
8526          * This is correct even for TF set by the guest, because "the
8527          * processor will not generate this exception after the instruction
8528          * that sets the TF flag".
8529          */
8530         if (unlikely(rflags & X86_EFLAGS_TF))
8531                 r = kvm_vcpu_do_singlestep(vcpu);
8532         return r;
8533 }
8534 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
8535
8536 static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu *vcpu, int *r)
8537 {
8538         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
8539             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
8540                 struct kvm_run *kvm_run = vcpu->run;
8541                 unsigned long eip = kvm_get_linear_rip(vcpu);
8542                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8543                                            vcpu->arch.guest_debug_dr7,
8544                                            vcpu->arch.eff_db);
8545
8546                 if (dr6 != 0) {
8547                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
8548                         kvm_run->debug.arch.pc = eip;
8549                         kvm_run->debug.arch.exception = DB_VECTOR;
8550                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
8551                         *r = 0;
8552                         return true;
8553                 }
8554         }
8555
8556         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
8557             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
8558                 unsigned long eip = kvm_get_linear_rip(vcpu);
8559                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8560                                            vcpu->arch.dr7,
8561                                            vcpu->arch.db);
8562
8563                 if (dr6 != 0) {
8564                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8565                         *r = 1;
8566                         return true;
8567                 }
8568         }
8569
8570         return false;
8571 }
8572
8573 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8574 {
8575         switch (ctxt->opcode_len) {
8576         case 1:
8577                 switch (ctxt->b) {
8578                 case 0xe4:      /* IN */
8579                 case 0xe5:
8580                 case 0xec:
8581                 case 0xed:
8582                 case 0xe6:      /* OUT */
8583                 case 0xe7:
8584                 case 0xee:
8585                 case 0xef:
8586                 case 0x6c:      /* INS */
8587                 case 0x6d:
8588                 case 0x6e:      /* OUTS */
8589                 case 0x6f:
8590                         return true;
8591                 }
8592                 break;
8593         case 2:
8594                 switch (ctxt->b) {
8595                 case 0x33:      /* RDPMC */
8596                         return true;
8597                 }
8598                 break;
8599         }
8600
8601         return false;
8602 }
8603
8604 /*
8605  * Decode an instruction for emulation.  The caller is responsible for handling
8606  * code breakpoints.  Note, manually detecting code breakpoints is unnecessary
8607  * (and wrong) when emulating on an intercepted fault-like exception[*], as
8608  * code breakpoints have higher priority and thus have already been done by
8609  * hardware.
8610  *
8611  * [*] Except #MC, which is higher priority, but KVM should never emulate in
8612  *     response to a machine check.
8613  */
8614 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8615                                     void *insn, int insn_len)
8616 {
8617         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8618         int r;
8619
8620         init_emulate_ctxt(vcpu);
8621
8622         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8623
8624         trace_kvm_emulate_insn_start(vcpu);
8625         ++vcpu->stat.insn_emulation;
8626
8627         return r;
8628 }
8629 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8630
8631 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8632                             int emulation_type, void *insn, int insn_len)
8633 {
8634         int r;
8635         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8636         bool writeback = true;
8637         bool write_fault_to_spt;
8638
8639         if (unlikely(!kvm_can_emulate_insn(vcpu, emulation_type, insn, insn_len)))
8640                 return 1;
8641
8642         vcpu->arch.l1tf_flush_l1d = true;
8643
8644         /*
8645          * Clear write_fault_to_shadow_pgtable here to ensure it is
8646          * never reused.
8647          */
8648         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8649         vcpu->arch.write_fault_to_shadow_pgtable = false;
8650
8651         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8652                 kvm_clear_exception_queue(vcpu);
8653
8654                 /*
8655                  * Return immediately if RIP hits a code breakpoint, such #DBs
8656                  * are fault-like and are higher priority than any faults on
8657                  * the code fetch itself.
8658                  */
8659                 if (!(emulation_type & EMULTYPE_SKIP) &&
8660                     kvm_vcpu_check_code_breakpoint(vcpu, &r))
8661                         return r;
8662
8663                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8664                                                     insn, insn_len);
8665                 if (r != EMULATION_OK)  {
8666                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
8667                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8668                                 kvm_queue_exception(vcpu, UD_VECTOR);
8669                                 return 1;
8670                         }
8671                         if (reexecute_instruction(vcpu, cr2_or_gpa,
8672                                                   write_fault_to_spt,
8673                                                   emulation_type))
8674                                 return 1;
8675                         if (ctxt->have_exception) {
8676                                 /*
8677                                  * #UD should result in just EMULATION_FAILED, and trap-like
8678                                  * exception should not be encountered during decode.
8679                                  */
8680                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8681                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8682                                 inject_emulated_exception(vcpu);
8683                                 return 1;
8684                         }
8685                         return handle_emulation_failure(vcpu, emulation_type);
8686                 }
8687         }
8688
8689         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8690             !is_vmware_backdoor_opcode(ctxt)) {
8691                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8692                 return 1;
8693         }
8694
8695         /*
8696          * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
8697          * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
8698          * The caller is responsible for updating interruptibility state and
8699          * injecting single-step #DBs.
8700          */
8701         if (emulation_type & EMULTYPE_SKIP) {
8702                 if (ctxt->mode != X86EMUL_MODE_PROT64)
8703                         ctxt->eip = (u32)ctxt->_eip;
8704                 else
8705                         ctxt->eip = ctxt->_eip;
8706
8707                 if (emulation_type & EMULTYPE_COMPLETE_USER_EXIT) {
8708                         r = 1;
8709                         goto writeback;
8710                 }
8711
8712                 kvm_rip_write(vcpu, ctxt->eip);
8713                 if (ctxt->eflags & X86_EFLAGS_RF)
8714                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8715                 return 1;
8716         }
8717
8718         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8719                 return 1;
8720
8721         /* this is needed for vmware backdoor interface to work since it
8722            changes registers values  during IO operation */
8723         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8724                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8725                 emulator_invalidate_register_cache(ctxt);
8726         }
8727
8728 restart:
8729         if (emulation_type & EMULTYPE_PF) {
8730                 /* Save the faulting GPA (cr2) in the address field */
8731                 ctxt->exception.address = cr2_or_gpa;
8732
8733                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8734                 if (vcpu->arch.mmu->root_role.direct) {
8735                         ctxt->gpa_available = true;
8736                         ctxt->gpa_val = cr2_or_gpa;
8737                 }
8738         } else {
8739                 /* Sanitize the address out of an abundance of paranoia. */
8740                 ctxt->exception.address = 0;
8741         }
8742
8743         r = x86_emulate_insn(ctxt);
8744
8745         if (r == EMULATION_INTERCEPTED)
8746                 return 1;
8747
8748         if (r == EMULATION_FAILED) {
8749                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8750                                         emulation_type))
8751                         return 1;
8752
8753                 return handle_emulation_failure(vcpu, emulation_type);
8754         }
8755
8756         if (ctxt->have_exception) {
8757                 r = 1;
8758                 if (inject_emulated_exception(vcpu))
8759                         return r;
8760         } else if (vcpu->arch.pio.count) {
8761                 if (!vcpu->arch.pio.in) {
8762                         /* FIXME: return into emulator if single-stepping.  */
8763                         vcpu->arch.pio.count = 0;
8764                 } else {
8765                         writeback = false;
8766                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
8767                 }
8768                 r = 0;
8769         } else if (vcpu->mmio_needed) {
8770                 ++vcpu->stat.mmio_exits;
8771
8772                 if (!vcpu->mmio_is_write)
8773                         writeback = false;
8774                 r = 0;
8775                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8776         } else if (vcpu->arch.complete_userspace_io) {
8777                 writeback = false;
8778                 r = 0;
8779         } else if (r == EMULATION_RESTART)
8780                 goto restart;
8781         else
8782                 r = 1;
8783
8784 writeback:
8785         if (writeback) {
8786                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8787                 toggle_interruptibility(vcpu, ctxt->interruptibility);
8788                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8789                 if (!ctxt->have_exception ||
8790                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8791                         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8792                         if (ctxt->is_branch)
8793                                 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
8794                         kvm_rip_write(vcpu, ctxt->eip);
8795                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8796                                 r = kvm_vcpu_do_singlestep(vcpu);
8797                         static_call_cond(kvm_x86_update_emulated_instruction)(vcpu);
8798                         __kvm_set_rflags(vcpu, ctxt->eflags);
8799                 }
8800
8801                 /*
8802                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8803                  * do nothing, and it will be requested again as soon as
8804                  * the shadow expires.  But we still need to check here,
8805                  * because POPF has no interrupt shadow.
8806                  */
8807                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8808                         kvm_make_request(KVM_REQ_EVENT, vcpu);
8809         } else
8810                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8811
8812         return r;
8813 }
8814
8815 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8816 {
8817         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8818 }
8819 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8820
8821 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8822                                         void *insn, int insn_len)
8823 {
8824         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8825 }
8826 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8827
8828 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8829 {
8830         vcpu->arch.pio.count = 0;
8831         return 1;
8832 }
8833
8834 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8835 {
8836         vcpu->arch.pio.count = 0;
8837
8838         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8839                 return 1;
8840
8841         return kvm_skip_emulated_instruction(vcpu);
8842 }
8843
8844 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8845                             unsigned short port)
8846 {
8847         unsigned long val = kvm_rax_read(vcpu);
8848         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8849
8850         if (ret)
8851                 return ret;
8852
8853         /*
8854          * Workaround userspace that relies on old KVM behavior of %rip being
8855          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8856          */
8857         if (port == 0x7e &&
8858             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8859                 vcpu->arch.complete_userspace_io =
8860                         complete_fast_pio_out_port_0x7e;
8861                 kvm_skip_emulated_instruction(vcpu);
8862         } else {
8863                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8864                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8865         }
8866         return 0;
8867 }
8868
8869 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8870 {
8871         unsigned long val;
8872
8873         /* We should only ever be called with arch.pio.count equal to 1 */
8874         BUG_ON(vcpu->arch.pio.count != 1);
8875
8876         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8877                 vcpu->arch.pio.count = 0;
8878                 return 1;
8879         }
8880
8881         /* For size less than 4 we merge, else we zero extend */
8882         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8883
8884         complete_emulator_pio_in(vcpu, &val);
8885         kvm_rax_write(vcpu, val);
8886
8887         return kvm_skip_emulated_instruction(vcpu);
8888 }
8889
8890 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8891                            unsigned short port)
8892 {
8893         unsigned long val;
8894         int ret;
8895
8896         /* For size less than 4 we merge, else we zero extend */
8897         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8898
8899         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8900         if (ret) {
8901                 kvm_rax_write(vcpu, val);
8902                 return ret;
8903         }
8904
8905         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8906         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8907
8908         return 0;
8909 }
8910
8911 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8912 {
8913         int ret;
8914
8915         if (in)
8916                 ret = kvm_fast_pio_in(vcpu, size, port);
8917         else
8918                 ret = kvm_fast_pio_out(vcpu, size, port);
8919         return ret && kvm_skip_emulated_instruction(vcpu);
8920 }
8921 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8922
8923 static int kvmclock_cpu_down_prep(unsigned int cpu)
8924 {
8925         __this_cpu_write(cpu_tsc_khz, 0);
8926         return 0;
8927 }
8928
8929 static void tsc_khz_changed(void *data)
8930 {
8931         struct cpufreq_freqs *freq = data;
8932         unsigned long khz = 0;
8933
8934         if (data)
8935                 khz = freq->new;
8936         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8937                 khz = cpufreq_quick_get(raw_smp_processor_id());
8938         if (!khz)
8939                 khz = tsc_khz;
8940         __this_cpu_write(cpu_tsc_khz, khz);
8941 }
8942
8943 #ifdef CONFIG_X86_64
8944 static void kvm_hyperv_tsc_notifier(void)
8945 {
8946         struct kvm *kvm;
8947         int cpu;
8948
8949         mutex_lock(&kvm_lock);
8950         list_for_each_entry(kvm, &vm_list, vm_list)
8951                 kvm_make_mclock_inprogress_request(kvm);
8952
8953         /* no guest entries from this point */
8954         hyperv_stop_tsc_emulation();
8955
8956         /* TSC frequency always matches when on Hyper-V */
8957         for_each_present_cpu(cpu)
8958                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8959         kvm_caps.max_guest_tsc_khz = tsc_khz;
8960
8961         list_for_each_entry(kvm, &vm_list, vm_list) {
8962                 __kvm_start_pvclock_update(kvm);
8963                 pvclock_update_vm_gtod_copy(kvm);
8964                 kvm_end_pvclock_update(kvm);
8965         }
8966
8967         mutex_unlock(&kvm_lock);
8968 }
8969 #endif
8970
8971 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8972 {
8973         struct kvm *kvm;
8974         struct kvm_vcpu *vcpu;
8975         int send_ipi = 0;
8976         unsigned long i;
8977
8978         /*
8979          * We allow guests to temporarily run on slowing clocks,
8980          * provided we notify them after, or to run on accelerating
8981          * clocks, provided we notify them before.  Thus time never
8982          * goes backwards.
8983          *
8984          * However, we have a problem.  We can't atomically update
8985          * the frequency of a given CPU from this function; it is
8986          * merely a notifier, which can be called from any CPU.
8987          * Changing the TSC frequency at arbitrary points in time
8988          * requires a recomputation of local variables related to
8989          * the TSC for each VCPU.  We must flag these local variables
8990          * to be updated and be sure the update takes place with the
8991          * new frequency before any guests proceed.
8992          *
8993          * Unfortunately, the combination of hotplug CPU and frequency
8994          * change creates an intractable locking scenario; the order
8995          * of when these callouts happen is undefined with respect to
8996          * CPU hotplug, and they can race with each other.  As such,
8997          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8998          * undefined; you can actually have a CPU frequency change take
8999          * place in between the computation of X and the setting of the
9000          * variable.  To protect against this problem, all updates of
9001          * the per_cpu tsc_khz variable are done in an interrupt
9002          * protected IPI, and all callers wishing to update the value
9003          * must wait for a synchronous IPI to complete (which is trivial
9004          * if the caller is on the CPU already).  This establishes the
9005          * necessary total order on variable updates.
9006          *
9007          * Note that because a guest time update may take place
9008          * anytime after the setting of the VCPU's request bit, the
9009          * correct TSC value must be set before the request.  However,
9010          * to ensure the update actually makes it to any guest which
9011          * starts running in hardware virtualization between the set
9012          * and the acquisition of the spinlock, we must also ping the
9013          * CPU after setting the request bit.
9014          *
9015          */
9016
9017         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
9018
9019         mutex_lock(&kvm_lock);
9020         list_for_each_entry(kvm, &vm_list, vm_list) {
9021                 kvm_for_each_vcpu(i, vcpu, kvm) {
9022                         if (vcpu->cpu != cpu)
9023                                 continue;
9024                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9025                         if (vcpu->cpu != raw_smp_processor_id())
9026                                 send_ipi = 1;
9027                 }
9028         }
9029         mutex_unlock(&kvm_lock);
9030
9031         if (freq->old < freq->new && send_ipi) {
9032                 /*
9033                  * We upscale the frequency.  Must make the guest
9034                  * doesn't see old kvmclock values while running with
9035                  * the new frequency, otherwise we risk the guest sees
9036                  * time go backwards.
9037                  *
9038                  * In case we update the frequency for another cpu
9039                  * (which might be in guest context) send an interrupt
9040                  * to kick the cpu out of guest context.  Next time
9041                  * guest context is entered kvmclock will be updated,
9042                  * so the guest will not see stale values.
9043                  */
9044                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
9045         }
9046 }
9047
9048 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
9049                                      void *data)
9050 {
9051         struct cpufreq_freqs *freq = data;
9052         int cpu;
9053
9054         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
9055                 return 0;
9056         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
9057                 return 0;
9058
9059         for_each_cpu(cpu, freq->policy->cpus)
9060                 __kvmclock_cpufreq_notifier(freq, cpu);
9061
9062         return 0;
9063 }
9064
9065 static struct notifier_block kvmclock_cpufreq_notifier_block = {
9066         .notifier_call  = kvmclock_cpufreq_notifier
9067 };
9068
9069 static int kvmclock_cpu_online(unsigned int cpu)
9070 {
9071         tsc_khz_changed(NULL);
9072         return 0;
9073 }
9074
9075 static void kvm_timer_init(void)
9076 {
9077         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
9078                 max_tsc_khz = tsc_khz;
9079
9080                 if (IS_ENABLED(CONFIG_CPU_FREQ)) {
9081                         struct cpufreq_policy *policy;
9082                         int cpu;
9083
9084                         cpu = get_cpu();
9085                         policy = cpufreq_cpu_get(cpu);
9086                         if (policy) {
9087                                 if (policy->cpuinfo.max_freq)
9088                                         max_tsc_khz = policy->cpuinfo.max_freq;
9089                                 cpufreq_cpu_put(policy);
9090                         }
9091                         put_cpu();
9092                 }
9093                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
9094                                           CPUFREQ_TRANSITION_NOTIFIER);
9095         }
9096
9097         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
9098                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
9099 }
9100
9101 #ifdef CONFIG_X86_64
9102 static void pvclock_gtod_update_fn(struct work_struct *work)
9103 {
9104         struct kvm *kvm;
9105         struct kvm_vcpu *vcpu;
9106         unsigned long i;
9107
9108         mutex_lock(&kvm_lock);
9109         list_for_each_entry(kvm, &vm_list, vm_list)
9110                 kvm_for_each_vcpu(i, vcpu, kvm)
9111                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9112         atomic_set(&kvm_guest_has_master_clock, 0);
9113         mutex_unlock(&kvm_lock);
9114 }
9115
9116 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
9117
9118 /*
9119  * Indirection to move queue_work() out of the tk_core.seq write held
9120  * region to prevent possible deadlocks against time accessors which
9121  * are invoked with work related locks held.
9122  */
9123 static void pvclock_irq_work_fn(struct irq_work *w)
9124 {
9125         queue_work(system_long_wq, &pvclock_gtod_work);
9126 }
9127
9128 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
9129
9130 /*
9131  * Notification about pvclock gtod data update.
9132  */
9133 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
9134                                void *priv)
9135 {
9136         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
9137         struct timekeeper *tk = priv;
9138
9139         update_pvclock_gtod(tk);
9140
9141         /*
9142          * Disable master clock if host does not trust, or does not use,
9143          * TSC based clocksource. Delegate queue_work() to irq_work as
9144          * this is invoked with tk_core.seq write held.
9145          */
9146         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
9147             atomic_read(&kvm_guest_has_master_clock) != 0)
9148                 irq_work_queue(&pvclock_irq_work);
9149         return 0;
9150 }
9151
9152 static struct notifier_block pvclock_gtod_notifier = {
9153         .notifier_call = pvclock_gtod_notify,
9154 };
9155 #endif
9156
9157 int kvm_arch_init(void *opaque)
9158 {
9159         struct kvm_x86_init_ops *ops = opaque;
9160         u64 host_pat;
9161         int r;
9162
9163         if (kvm_x86_ops.hardware_enable) {
9164                 pr_err("kvm: already loaded vendor module '%s'\n", kvm_x86_ops.name);
9165                 return -EEXIST;
9166         }
9167
9168         if (!ops->cpu_has_kvm_support()) {
9169                 pr_err_ratelimited("kvm: no hardware support for '%s'\n",
9170                                    ops->runtime_ops->name);
9171                 return -EOPNOTSUPP;
9172         }
9173         if (ops->disabled_by_bios()) {
9174                 pr_err_ratelimited("kvm: support for '%s' disabled by bios\n",
9175                                    ops->runtime_ops->name);
9176                 return -EOPNOTSUPP;
9177         }
9178
9179         /*
9180          * KVM explicitly assumes that the guest has an FPU and
9181          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
9182          * vCPU's FPU state as a fxregs_state struct.
9183          */
9184         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
9185                 printk(KERN_ERR "kvm: inadequate fpu\n");
9186                 return -EOPNOTSUPP;
9187         }
9188
9189         if (IS_ENABLED(CONFIG_PREEMPT_RT) && !boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
9190                 pr_err("RT requires X86_FEATURE_CONSTANT_TSC\n");
9191                 return -EOPNOTSUPP;
9192         }
9193
9194         /*
9195          * KVM assumes that PAT entry '0' encodes WB memtype and simply zeroes
9196          * the PAT bits in SPTEs.  Bail if PAT[0] is programmed to something
9197          * other than WB.  Note, EPT doesn't utilize the PAT, but don't bother
9198          * with an exception.  PAT[0] is set to WB on RESET and also by the
9199          * kernel, i.e. failure indicates a kernel bug or broken firmware.
9200          */
9201         if (rdmsrl_safe(MSR_IA32_CR_PAT, &host_pat) ||
9202             (host_pat & GENMASK(2, 0)) != 6) {
9203                 pr_err("kvm: host PAT[0] is not WB\n");
9204                 return -EIO;
9205         }
9206
9207         x86_emulator_cache = kvm_alloc_emulator_cache();
9208         if (!x86_emulator_cache) {
9209                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
9210                 return -ENOMEM;
9211         }
9212
9213         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
9214         if (!user_return_msrs) {
9215                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
9216                 r = -ENOMEM;
9217                 goto out_free_x86_emulator_cache;
9218         }
9219         kvm_nr_uret_msrs = 0;
9220
9221         r = kvm_mmu_vendor_module_init();
9222         if (r)
9223                 goto out_free_percpu;
9224
9225         kvm_timer_init();
9226
9227         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
9228                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
9229                 kvm_caps.supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
9230         }
9231
9232         if (pi_inject_timer == -1)
9233                 pi_inject_timer = housekeeping_enabled(HK_TYPE_TIMER);
9234 #ifdef CONFIG_X86_64
9235         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
9236
9237         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
9238                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
9239 #endif
9240
9241         return 0;
9242
9243 out_free_percpu:
9244         free_percpu(user_return_msrs);
9245 out_free_x86_emulator_cache:
9246         kmem_cache_destroy(x86_emulator_cache);
9247         return r;
9248 }
9249
9250 void kvm_arch_exit(void)
9251 {
9252 #ifdef CONFIG_X86_64
9253         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
9254                 clear_hv_tscchange_cb();
9255 #endif
9256         kvm_lapic_exit();
9257
9258         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
9259                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
9260                                             CPUFREQ_TRANSITION_NOTIFIER);
9261         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
9262 #ifdef CONFIG_X86_64
9263         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
9264         irq_work_sync(&pvclock_irq_work);
9265         cancel_work_sync(&pvclock_gtod_work);
9266 #endif
9267         kvm_x86_ops.hardware_enable = NULL;
9268         kvm_mmu_vendor_module_exit();
9269         free_percpu(user_return_msrs);
9270         kmem_cache_destroy(x86_emulator_cache);
9271 #ifdef CONFIG_KVM_XEN
9272         static_key_deferred_flush(&kvm_xen_enabled);
9273         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
9274 #endif
9275 }
9276
9277 static int __kvm_emulate_halt(struct kvm_vcpu *vcpu, int state, int reason)
9278 {
9279         /*
9280          * The vCPU has halted, e.g. executed HLT.  Update the run state if the
9281          * local APIC is in-kernel, the run loop will detect the non-runnable
9282          * state and halt the vCPU.  Exit to userspace if the local APIC is
9283          * managed by userspace, in which case userspace is responsible for
9284          * handling wake events.
9285          */
9286         ++vcpu->stat.halt_exits;
9287         if (lapic_in_kernel(vcpu)) {
9288                 vcpu->arch.mp_state = state;
9289                 return 1;
9290         } else {
9291                 vcpu->run->exit_reason = reason;
9292                 return 0;
9293         }
9294 }
9295
9296 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu)
9297 {
9298         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
9299 }
9300 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip);
9301
9302 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
9303 {
9304         int ret = kvm_skip_emulated_instruction(vcpu);
9305         /*
9306          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
9307          * KVM_EXIT_DEBUG here.
9308          */
9309         return kvm_emulate_halt_noskip(vcpu) && ret;
9310 }
9311 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
9312
9313 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
9314 {
9315         int ret = kvm_skip_emulated_instruction(vcpu);
9316
9317         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD,
9318                                         KVM_EXIT_AP_RESET_HOLD) && ret;
9319 }
9320 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
9321
9322 #ifdef CONFIG_X86_64
9323 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
9324                                 unsigned long clock_type)
9325 {
9326         struct kvm_clock_pairing clock_pairing;
9327         struct timespec64 ts;
9328         u64 cycle;
9329         int ret;
9330
9331         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
9332                 return -KVM_EOPNOTSUPP;
9333
9334         /*
9335          * When tsc is in permanent catchup mode guests won't be able to use
9336          * pvclock_read_retry loop to get consistent view of pvclock
9337          */
9338         if (vcpu->arch.tsc_always_catchup)
9339                 return -KVM_EOPNOTSUPP;
9340
9341         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
9342                 return -KVM_EOPNOTSUPP;
9343
9344         clock_pairing.sec = ts.tv_sec;
9345         clock_pairing.nsec = ts.tv_nsec;
9346         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
9347         clock_pairing.flags = 0;
9348         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
9349
9350         ret = 0;
9351         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
9352                             sizeof(struct kvm_clock_pairing)))
9353                 ret = -KVM_EFAULT;
9354
9355         return ret;
9356 }
9357 #endif
9358
9359 /*
9360  * kvm_pv_kick_cpu_op:  Kick a vcpu.
9361  *
9362  * @apicid - apicid of vcpu to be kicked.
9363  */
9364 static void kvm_pv_kick_cpu_op(struct kvm *kvm, int apicid)
9365 {
9366         /*
9367          * All other fields are unused for APIC_DM_REMRD, but may be consumed by
9368          * common code, e.g. for tracing. Defer initialization to the compiler.
9369          */
9370         struct kvm_lapic_irq lapic_irq = {
9371                 .delivery_mode = APIC_DM_REMRD,
9372                 .dest_mode = APIC_DEST_PHYSICAL,
9373                 .shorthand = APIC_DEST_NOSHORT,
9374                 .dest_id = apicid,
9375         };
9376
9377         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
9378 }
9379
9380 bool kvm_apicv_activated(struct kvm *kvm)
9381 {
9382         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
9383 }
9384 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
9385
9386 bool kvm_vcpu_apicv_activated(struct kvm_vcpu *vcpu)
9387 {
9388         ulong vm_reasons = READ_ONCE(vcpu->kvm->arch.apicv_inhibit_reasons);
9389         ulong vcpu_reasons = static_call(kvm_x86_vcpu_get_apicv_inhibit_reasons)(vcpu);
9390
9391         return (vm_reasons | vcpu_reasons) == 0;
9392 }
9393 EXPORT_SYMBOL_GPL(kvm_vcpu_apicv_activated);
9394
9395 static void set_or_clear_apicv_inhibit(unsigned long *inhibits,
9396                                        enum kvm_apicv_inhibit reason, bool set)
9397 {
9398         if (set)
9399                 __set_bit(reason, inhibits);
9400         else
9401                 __clear_bit(reason, inhibits);
9402
9403         trace_kvm_apicv_inhibit_changed(reason, set, *inhibits);
9404 }
9405
9406 static void kvm_apicv_init(struct kvm *kvm)
9407 {
9408         unsigned long *inhibits = &kvm->arch.apicv_inhibit_reasons;
9409
9410         init_rwsem(&kvm->arch.apicv_update_lock);
9411
9412         set_or_clear_apicv_inhibit(inhibits, APICV_INHIBIT_REASON_ABSENT, true);
9413
9414         if (!enable_apicv)
9415                 set_or_clear_apicv_inhibit(inhibits,
9416                                            APICV_INHIBIT_REASON_DISABLE, true);
9417 }
9418
9419 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
9420 {
9421         struct kvm_vcpu *target = NULL;
9422         struct kvm_apic_map *map;
9423
9424         vcpu->stat.directed_yield_attempted++;
9425
9426         if (single_task_running())
9427                 goto no_yield;
9428
9429         rcu_read_lock();
9430         map = rcu_dereference(vcpu->kvm->arch.apic_map);
9431
9432         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
9433                 target = map->phys_map[dest_id]->vcpu;
9434
9435         rcu_read_unlock();
9436
9437         if (!target || !READ_ONCE(target->ready))
9438                 goto no_yield;
9439
9440         /* Ignore requests to yield to self */
9441         if (vcpu == target)
9442                 goto no_yield;
9443
9444         if (kvm_vcpu_yield_to(target) <= 0)
9445                 goto no_yield;
9446
9447         vcpu->stat.directed_yield_successful++;
9448
9449 no_yield:
9450         return;
9451 }
9452
9453 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
9454 {
9455         u64 ret = vcpu->run->hypercall.ret;
9456
9457         if (!is_64_bit_mode(vcpu))
9458                 ret = (u32)ret;
9459         kvm_rax_write(vcpu, ret);
9460         ++vcpu->stat.hypercalls;
9461         return kvm_skip_emulated_instruction(vcpu);
9462 }
9463
9464 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
9465 {
9466         unsigned long nr, a0, a1, a2, a3, ret;
9467         int op_64_bit;
9468
9469         if (kvm_xen_hypercall_enabled(vcpu->kvm))
9470                 return kvm_xen_hypercall(vcpu);
9471
9472         if (kvm_hv_hypercall_enabled(vcpu))
9473                 return kvm_hv_hypercall(vcpu);
9474
9475         nr = kvm_rax_read(vcpu);
9476         a0 = kvm_rbx_read(vcpu);
9477         a1 = kvm_rcx_read(vcpu);
9478         a2 = kvm_rdx_read(vcpu);
9479         a3 = kvm_rsi_read(vcpu);
9480
9481         trace_kvm_hypercall(nr, a0, a1, a2, a3);
9482
9483         op_64_bit = is_64_bit_hypercall(vcpu);
9484         if (!op_64_bit) {
9485                 nr &= 0xFFFFFFFF;
9486                 a0 &= 0xFFFFFFFF;
9487                 a1 &= 0xFFFFFFFF;
9488                 a2 &= 0xFFFFFFFF;
9489                 a3 &= 0xFFFFFFFF;
9490         }
9491
9492         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
9493                 ret = -KVM_EPERM;
9494                 goto out;
9495         }
9496
9497         ret = -KVM_ENOSYS;
9498
9499         switch (nr) {
9500         case KVM_HC_VAPIC_POLL_IRQ:
9501                 ret = 0;
9502                 break;
9503         case KVM_HC_KICK_CPU:
9504                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
9505                         break;
9506
9507                 kvm_pv_kick_cpu_op(vcpu->kvm, a1);
9508                 kvm_sched_yield(vcpu, a1);
9509                 ret = 0;
9510                 break;
9511 #ifdef CONFIG_X86_64
9512         case KVM_HC_CLOCK_PAIRING:
9513                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
9514                 break;
9515 #endif
9516         case KVM_HC_SEND_IPI:
9517                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
9518                         break;
9519
9520                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
9521                 break;
9522         case KVM_HC_SCHED_YIELD:
9523                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
9524                         break;
9525
9526                 kvm_sched_yield(vcpu, a0);
9527                 ret = 0;
9528                 break;
9529         case KVM_HC_MAP_GPA_RANGE: {
9530                 u64 gpa = a0, npages = a1, attrs = a2;
9531
9532                 ret = -KVM_ENOSYS;
9533                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
9534                         break;
9535
9536                 if (!PAGE_ALIGNED(gpa) || !npages ||
9537                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
9538                         ret = -KVM_EINVAL;
9539                         break;
9540                 }
9541
9542                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
9543                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
9544                 vcpu->run->hypercall.args[0]  = gpa;
9545                 vcpu->run->hypercall.args[1]  = npages;
9546                 vcpu->run->hypercall.args[2]  = attrs;
9547                 vcpu->run->hypercall.longmode = op_64_bit;
9548                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9549                 return 0;
9550         }
9551         default:
9552                 ret = -KVM_ENOSYS;
9553                 break;
9554         }
9555 out:
9556         if (!op_64_bit)
9557                 ret = (u32)ret;
9558         kvm_rax_write(vcpu, ret);
9559
9560         ++vcpu->stat.hypercalls;
9561         return kvm_skip_emulated_instruction(vcpu);
9562 }
9563 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9564
9565 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9566 {
9567         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9568         char instruction[3];
9569         unsigned long rip = kvm_rip_read(vcpu);
9570
9571         /*
9572          * If the quirk is disabled, synthesize a #UD and let the guest pick up
9573          * the pieces.
9574          */
9575         if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_FIX_HYPERCALL_INSN)) {
9576                 ctxt->exception.error_code_valid = false;
9577                 ctxt->exception.vector = UD_VECTOR;
9578                 ctxt->have_exception = true;
9579                 return X86EMUL_PROPAGATE_FAULT;
9580         }
9581
9582         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9583
9584         return emulator_write_emulated(ctxt, rip, instruction, 3,
9585                 &ctxt->exception);
9586 }
9587
9588 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9589 {
9590         return vcpu->run->request_interrupt_window &&
9591                 likely(!pic_in_kernel(vcpu->kvm));
9592 }
9593
9594 /* Called within kvm->srcu read side.  */
9595 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9596 {
9597         struct kvm_run *kvm_run = vcpu->run;
9598
9599         kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9600         kvm_run->cr8 = kvm_get_cr8(vcpu);
9601         kvm_run->apic_base = kvm_get_apic_base(vcpu);
9602
9603         kvm_run->ready_for_interrupt_injection =
9604                 pic_in_kernel(vcpu->kvm) ||
9605                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9606
9607         if (is_smm(vcpu))
9608                 kvm_run->flags |= KVM_RUN_X86_SMM;
9609 }
9610
9611 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9612 {
9613         int max_irr, tpr;
9614
9615         if (!kvm_x86_ops.update_cr8_intercept)
9616                 return;
9617
9618         if (!lapic_in_kernel(vcpu))
9619                 return;
9620
9621         if (vcpu->arch.apic->apicv_active)
9622                 return;
9623
9624         if (!vcpu->arch.apic->vapic_addr)
9625                 max_irr = kvm_lapic_find_highest_irr(vcpu);
9626         else
9627                 max_irr = -1;
9628
9629         if (max_irr != -1)
9630                 max_irr >>= 4;
9631
9632         tpr = kvm_lapic_get_cr8(vcpu);
9633
9634         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9635 }
9636
9637
9638 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9639 {
9640         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9641                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9642                 return 1;
9643         }
9644
9645         return kvm_x86_ops.nested_ops->check_events(vcpu);
9646 }
9647
9648 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9649 {
9650         trace_kvm_inj_exception(vcpu->arch.exception.nr,
9651                                 vcpu->arch.exception.has_error_code,
9652                                 vcpu->arch.exception.error_code,
9653                                 vcpu->arch.exception.injected);
9654
9655         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9656                 vcpu->arch.exception.error_code = false;
9657         static_call(kvm_x86_queue_exception)(vcpu);
9658 }
9659
9660 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
9661 {
9662         int r;
9663         bool can_inject = true;
9664
9665         /* try to reinject previous events if any */
9666
9667         if (vcpu->arch.exception.injected) {
9668                 kvm_inject_exception(vcpu);
9669                 can_inject = false;
9670         }
9671         /*
9672          * Do not inject an NMI or interrupt if there is a pending
9673          * exception.  Exceptions and interrupts are recognized at
9674          * instruction boundaries, i.e. the start of an instruction.
9675          * Trap-like exceptions, e.g. #DB, have higher priority than
9676          * NMIs and interrupts, i.e. traps are recognized before an
9677          * NMI/interrupt that's pending on the same instruction.
9678          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9679          * priority, but are only generated (pended) during instruction
9680          * execution, i.e. a pending fault-like exception means the
9681          * fault occurred on the *previous* instruction and must be
9682          * serviced prior to recognizing any new events in order to
9683          * fully complete the previous instruction.
9684          */
9685         else if (!vcpu->arch.exception.pending) {
9686                 if (vcpu->arch.nmi_injected) {
9687                         static_call(kvm_x86_inject_nmi)(vcpu);
9688                         can_inject = false;
9689                 } else if (vcpu->arch.interrupt.injected) {
9690                         static_call(kvm_x86_inject_irq)(vcpu, true);
9691                         can_inject = false;
9692                 }
9693         }
9694
9695         WARN_ON_ONCE(vcpu->arch.exception.injected &&
9696                      vcpu->arch.exception.pending);
9697
9698         /*
9699          * Call check_nested_events() even if we reinjected a previous event
9700          * in order for caller to determine if it should require immediate-exit
9701          * from L2 to L1 due to pending L1 events which require exit
9702          * from L2 to L1.
9703          */
9704         if (is_guest_mode(vcpu)) {
9705                 r = kvm_check_nested_events(vcpu);
9706                 if (r < 0)
9707                         goto out;
9708         }
9709
9710         /* try to inject new event if pending */
9711         if (vcpu->arch.exception.pending) {
9712                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9713                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9714                                              X86_EFLAGS_RF);
9715
9716                 if (vcpu->arch.exception.nr == DB_VECTOR) {
9717                         kvm_deliver_exception_payload(vcpu);
9718                         if (vcpu->arch.dr7 & DR7_GD) {
9719                                 vcpu->arch.dr7 &= ~DR7_GD;
9720                                 kvm_update_dr7(vcpu);
9721                         }
9722                 }
9723
9724                 kvm_inject_exception(vcpu);
9725
9726                 vcpu->arch.exception.pending = false;
9727                 vcpu->arch.exception.injected = true;
9728
9729                 can_inject = false;
9730         }
9731
9732         /* Don't inject interrupts if the user asked to avoid doing so */
9733         if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9734                 return 0;
9735
9736         /*
9737          * Finally, inject interrupt events.  If an event cannot be injected
9738          * due to architectural conditions (e.g. IF=0) a window-open exit
9739          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
9740          * and can architecturally be injected, but we cannot do it right now:
9741          * an interrupt could have arrived just now and we have to inject it
9742          * as a vmexit, or there could already an event in the queue, which is
9743          * indicated by can_inject.  In that case we request an immediate exit
9744          * in order to make progress and get back here for another iteration.
9745          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9746          */
9747         if (vcpu->arch.smi_pending) {
9748                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9749                 if (r < 0)
9750                         goto out;
9751                 if (r) {
9752                         vcpu->arch.smi_pending = false;
9753                         ++vcpu->arch.smi_count;
9754                         enter_smm(vcpu);
9755                         can_inject = false;
9756                 } else
9757                         static_call(kvm_x86_enable_smi_window)(vcpu);
9758         }
9759
9760         if (vcpu->arch.nmi_pending) {
9761                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9762                 if (r < 0)
9763                         goto out;
9764                 if (r) {
9765                         --vcpu->arch.nmi_pending;
9766                         vcpu->arch.nmi_injected = true;
9767                         static_call(kvm_x86_inject_nmi)(vcpu);
9768                         can_inject = false;
9769                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9770                 }
9771                 if (vcpu->arch.nmi_pending)
9772                         static_call(kvm_x86_enable_nmi_window)(vcpu);
9773         }
9774
9775         if (kvm_cpu_has_injectable_intr(vcpu)) {
9776                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9777                 if (r < 0)
9778                         goto out;
9779                 if (r) {
9780                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9781                         static_call(kvm_x86_inject_irq)(vcpu, false);
9782                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9783                 }
9784                 if (kvm_cpu_has_injectable_intr(vcpu))
9785                         static_call(kvm_x86_enable_irq_window)(vcpu);
9786         }
9787
9788         if (is_guest_mode(vcpu) &&
9789             kvm_x86_ops.nested_ops->hv_timer_pending &&
9790             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9791                 *req_immediate_exit = true;
9792
9793         WARN_ON(vcpu->arch.exception.pending);
9794         return 0;
9795
9796 out:
9797         if (r == -EBUSY) {
9798                 *req_immediate_exit = true;
9799                 r = 0;
9800         }
9801         return r;
9802 }
9803
9804 static void process_nmi(struct kvm_vcpu *vcpu)
9805 {
9806         unsigned limit = 2;
9807
9808         /*
9809          * x86 is limited to one NMI running, and one NMI pending after it.
9810          * If an NMI is already in progress, limit further NMIs to just one.
9811          * Otherwise, allow two (and we'll inject the first one immediately).
9812          */
9813         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9814                 limit = 1;
9815
9816         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9817         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9818         kvm_make_request(KVM_REQ_EVENT, vcpu);
9819 }
9820
9821 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9822 {
9823         u32 flags = 0;
9824         flags |= seg->g       << 23;
9825         flags |= seg->db      << 22;
9826         flags |= seg->l       << 21;
9827         flags |= seg->avl     << 20;
9828         flags |= seg->present << 15;
9829         flags |= seg->dpl     << 13;
9830         flags |= seg->s       << 12;
9831         flags |= seg->type    << 8;
9832         return flags;
9833 }
9834
9835 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9836 {
9837         struct kvm_segment seg;
9838         int offset;
9839
9840         kvm_get_segment(vcpu, &seg, n);
9841         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9842
9843         if (n < 3)
9844                 offset = 0x7f84 + n * 12;
9845         else
9846                 offset = 0x7f2c + (n - 3) * 12;
9847
9848         put_smstate(u32, buf, offset + 8, seg.base);
9849         put_smstate(u32, buf, offset + 4, seg.limit);
9850         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9851 }
9852
9853 #ifdef CONFIG_X86_64
9854 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9855 {
9856         struct kvm_segment seg;
9857         int offset;
9858         u16 flags;
9859
9860         kvm_get_segment(vcpu, &seg, n);
9861         offset = 0x7e00 + n * 16;
9862
9863         flags = enter_smm_get_segment_flags(&seg) >> 8;
9864         put_smstate(u16, buf, offset, seg.selector);
9865         put_smstate(u16, buf, offset + 2, flags);
9866         put_smstate(u32, buf, offset + 4, seg.limit);
9867         put_smstate(u64, buf, offset + 8, seg.base);
9868 }
9869 #endif
9870
9871 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9872 {
9873         struct desc_ptr dt;
9874         struct kvm_segment seg;
9875         unsigned long val;
9876         int i;
9877
9878         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9879         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9880         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9881         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9882
9883         for (i = 0; i < 8; i++)
9884                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9885
9886         kvm_get_dr(vcpu, 6, &val);
9887         put_smstate(u32, buf, 0x7fcc, (u32)val);
9888         kvm_get_dr(vcpu, 7, &val);
9889         put_smstate(u32, buf, 0x7fc8, (u32)val);
9890
9891         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9892         put_smstate(u32, buf, 0x7fc4, seg.selector);
9893         put_smstate(u32, buf, 0x7f64, seg.base);
9894         put_smstate(u32, buf, 0x7f60, seg.limit);
9895         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9896
9897         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9898         put_smstate(u32, buf, 0x7fc0, seg.selector);
9899         put_smstate(u32, buf, 0x7f80, seg.base);
9900         put_smstate(u32, buf, 0x7f7c, seg.limit);
9901         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9902
9903         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9904         put_smstate(u32, buf, 0x7f74, dt.address);
9905         put_smstate(u32, buf, 0x7f70, dt.size);
9906
9907         static_call(kvm_x86_get_idt)(vcpu, &dt);
9908         put_smstate(u32, buf, 0x7f58, dt.address);
9909         put_smstate(u32, buf, 0x7f54, dt.size);
9910
9911         for (i = 0; i < 6; i++)
9912                 enter_smm_save_seg_32(vcpu, buf, i);
9913
9914         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9915
9916         /* revision id */
9917         put_smstate(u32, buf, 0x7efc, 0x00020000);
9918         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9919 }
9920
9921 #ifdef CONFIG_X86_64
9922 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9923 {
9924         struct desc_ptr dt;
9925         struct kvm_segment seg;
9926         unsigned long val;
9927         int i;
9928
9929         for (i = 0; i < 16; i++)
9930                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9931
9932         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9933         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9934
9935         kvm_get_dr(vcpu, 6, &val);
9936         put_smstate(u64, buf, 0x7f68, val);
9937         kvm_get_dr(vcpu, 7, &val);
9938         put_smstate(u64, buf, 0x7f60, val);
9939
9940         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9941         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9942         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9943
9944         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9945
9946         /* revision id */
9947         put_smstate(u32, buf, 0x7efc, 0x00020064);
9948
9949         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9950
9951         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9952         put_smstate(u16, buf, 0x7e90, seg.selector);
9953         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9954         put_smstate(u32, buf, 0x7e94, seg.limit);
9955         put_smstate(u64, buf, 0x7e98, seg.base);
9956
9957         static_call(kvm_x86_get_idt)(vcpu, &dt);
9958         put_smstate(u32, buf, 0x7e84, dt.size);
9959         put_smstate(u64, buf, 0x7e88, dt.address);
9960
9961         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9962         put_smstate(u16, buf, 0x7e70, seg.selector);
9963         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9964         put_smstate(u32, buf, 0x7e74, seg.limit);
9965         put_smstate(u64, buf, 0x7e78, seg.base);
9966
9967         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9968         put_smstate(u32, buf, 0x7e64, dt.size);
9969         put_smstate(u64, buf, 0x7e68, dt.address);
9970
9971         for (i = 0; i < 6; i++)
9972                 enter_smm_save_seg_64(vcpu, buf, i);
9973 }
9974 #endif
9975
9976 static void enter_smm(struct kvm_vcpu *vcpu)
9977 {
9978         struct kvm_segment cs, ds;
9979         struct desc_ptr dt;
9980         unsigned long cr0;
9981         char buf[512];
9982
9983         memset(buf, 0, 512);
9984 #ifdef CONFIG_X86_64
9985         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9986                 enter_smm_save_state_64(vcpu, buf);
9987         else
9988 #endif
9989                 enter_smm_save_state_32(vcpu, buf);
9990
9991         /*
9992          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9993          * state (e.g. leave guest mode) after we've saved the state into the
9994          * SMM state-save area.
9995          */
9996         static_call(kvm_x86_enter_smm)(vcpu, buf);
9997
9998         kvm_smm_changed(vcpu, true);
9999         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
10000
10001         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
10002                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
10003         else
10004                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
10005
10006         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
10007         kvm_rip_write(vcpu, 0x8000);
10008
10009         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
10010         static_call(kvm_x86_set_cr0)(vcpu, cr0);
10011         vcpu->arch.cr0 = cr0;
10012
10013         static_call(kvm_x86_set_cr4)(vcpu, 0);
10014
10015         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
10016         dt.address = dt.size = 0;
10017         static_call(kvm_x86_set_idt)(vcpu, &dt);
10018
10019         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
10020
10021         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
10022         cs.base = vcpu->arch.smbase;
10023
10024         ds.selector = 0;
10025         ds.base = 0;
10026
10027         cs.limit    = ds.limit = 0xffffffff;
10028         cs.type     = ds.type = 0x3;
10029         cs.dpl      = ds.dpl = 0;
10030         cs.db       = ds.db = 0;
10031         cs.s        = ds.s = 1;
10032         cs.l        = ds.l = 0;
10033         cs.g        = ds.g = 1;
10034         cs.avl      = ds.avl = 0;
10035         cs.present  = ds.present = 1;
10036         cs.unusable = ds.unusable = 0;
10037         cs.padding  = ds.padding = 0;
10038
10039         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10040         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
10041         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
10042         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
10043         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
10044         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
10045
10046 #ifdef CONFIG_X86_64
10047         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
10048                 static_call(kvm_x86_set_efer)(vcpu, 0);
10049 #endif
10050
10051         kvm_update_cpuid_runtime(vcpu);
10052         kvm_mmu_reset_context(vcpu);
10053 }
10054
10055 static void process_smi(struct kvm_vcpu *vcpu)
10056 {
10057         vcpu->arch.smi_pending = true;
10058         kvm_make_request(KVM_REQ_EVENT, vcpu);
10059 }
10060
10061 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
10062                                        unsigned long *vcpu_bitmap)
10063 {
10064         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
10065 }
10066
10067 void kvm_make_scan_ioapic_request(struct kvm *kvm)
10068 {
10069         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
10070 }
10071
10072 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
10073 {
10074         struct kvm_lapic *apic = vcpu->arch.apic;
10075         bool activate;
10076
10077         if (!lapic_in_kernel(vcpu))
10078                 return;
10079
10080         down_read(&vcpu->kvm->arch.apicv_update_lock);
10081         preempt_disable();
10082
10083         /* Do not activate APICV when APIC is disabled */
10084         activate = kvm_vcpu_apicv_activated(vcpu) &&
10085                    (kvm_get_apic_mode(vcpu) != LAPIC_MODE_DISABLED);
10086
10087         if (apic->apicv_active == activate)
10088                 goto out;
10089
10090         apic->apicv_active = activate;
10091         kvm_apic_update_apicv(vcpu);
10092         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
10093
10094         /*
10095          * When APICv gets disabled, we may still have injected interrupts
10096          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
10097          * still active when the interrupt got accepted. Make sure
10098          * inject_pending_event() is called to check for that.
10099          */
10100         if (!apic->apicv_active)
10101                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10102
10103 out:
10104         preempt_enable();
10105         up_read(&vcpu->kvm->arch.apicv_update_lock);
10106 }
10107 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
10108
10109 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
10110                                       enum kvm_apicv_inhibit reason, bool set)
10111 {
10112         unsigned long old, new;
10113
10114         lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
10115
10116         if (!static_call(kvm_x86_check_apicv_inhibit_reasons)(reason))
10117                 return;
10118
10119         old = new = kvm->arch.apicv_inhibit_reasons;
10120
10121         set_or_clear_apicv_inhibit(&new, reason, set);
10122
10123         if (!!old != !!new) {
10124                 /*
10125                  * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
10126                  * false positives in the sanity check WARN in svm_vcpu_run().
10127                  * This task will wait for all vCPUs to ack the kick IRQ before
10128                  * updating apicv_inhibit_reasons, and all other vCPUs will
10129                  * block on acquiring apicv_update_lock so that vCPUs can't
10130                  * redo svm_vcpu_run() without seeing the new inhibit state.
10131                  *
10132                  * Note, holding apicv_update_lock and taking it in the read
10133                  * side (handling the request) also prevents other vCPUs from
10134                  * servicing the request with a stale apicv_inhibit_reasons.
10135                  */
10136                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
10137                 kvm->arch.apicv_inhibit_reasons = new;
10138                 if (new) {
10139                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
10140                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
10141                 }
10142         } else {
10143                 kvm->arch.apicv_inhibit_reasons = new;
10144         }
10145 }
10146
10147 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
10148                                     enum kvm_apicv_inhibit reason, bool set)
10149 {
10150         if (!enable_apicv)
10151                 return;
10152
10153         down_write(&kvm->arch.apicv_update_lock);
10154         __kvm_set_or_clear_apicv_inhibit(kvm, reason, set);
10155         up_write(&kvm->arch.apicv_update_lock);
10156 }
10157 EXPORT_SYMBOL_GPL(kvm_set_or_clear_apicv_inhibit);
10158
10159 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
10160 {
10161         if (!kvm_apic_present(vcpu))
10162                 return;
10163
10164         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
10165
10166         if (irqchip_split(vcpu->kvm))
10167                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
10168         else {
10169                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10170                 if (ioapic_in_kernel(vcpu->kvm))
10171                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
10172         }
10173
10174         if (is_guest_mode(vcpu))
10175                 vcpu->arch.load_eoi_exitmap_pending = true;
10176         else
10177                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
10178 }
10179
10180 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
10181 {
10182         u64 eoi_exit_bitmap[4];
10183
10184         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
10185                 return;
10186
10187         if (to_hv_vcpu(vcpu)) {
10188                 bitmap_or((ulong *)eoi_exit_bitmap,
10189                           vcpu->arch.ioapic_handled_vectors,
10190                           to_hv_synic(vcpu)->vec_bitmap, 256);
10191                 static_call_cond(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
10192                 return;
10193         }
10194
10195         static_call_cond(kvm_x86_load_eoi_exitmap)(
10196                 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
10197 }
10198
10199 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
10200                                             unsigned long start, unsigned long end)
10201 {
10202         unsigned long apic_address;
10203
10204         /*
10205          * The physical address of apic access page is stored in the VMCS.
10206          * Update it when it becomes invalid.
10207          */
10208         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
10209         if (start <= apic_address && apic_address < end)
10210                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
10211 }
10212
10213 void kvm_arch_guest_memory_reclaimed(struct kvm *kvm)
10214 {
10215         static_call_cond(kvm_x86_guest_memory_reclaimed)(kvm);
10216 }
10217
10218 static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
10219 {
10220         if (!lapic_in_kernel(vcpu))
10221                 return;
10222
10223         static_call_cond(kvm_x86_set_apic_access_page_addr)(vcpu);
10224 }
10225
10226 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
10227 {
10228         smp_send_reschedule(vcpu->cpu);
10229 }
10230 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
10231
10232 /*
10233  * Called within kvm->srcu read side.
10234  * Returns 1 to let vcpu_run() continue the guest execution loop without
10235  * exiting to the userspace.  Otherwise, the value will be returned to the
10236  * userspace.
10237  */
10238 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
10239 {
10240         int r;
10241         bool req_int_win =
10242                 dm_request_for_irq_injection(vcpu) &&
10243                 kvm_cpu_accept_dm_intr(vcpu);
10244         fastpath_t exit_fastpath;
10245
10246         bool req_immediate_exit = false;
10247
10248         /* Forbid vmenter if vcpu dirty ring is soft-full */
10249         if (unlikely(vcpu->kvm->dirty_ring_size &&
10250                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
10251                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
10252                 trace_kvm_dirty_ring_exit(vcpu);
10253                 r = 0;
10254                 goto out;
10255         }
10256
10257         if (kvm_request_pending(vcpu)) {
10258                 if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) {
10259                         r = -EIO;
10260                         goto out;
10261                 }
10262                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
10263                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
10264                                 r = 0;
10265                                 goto out;
10266                         }
10267                 }
10268                 if (kvm_check_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS, vcpu))
10269                         kvm_mmu_free_obsolete_roots(vcpu);
10270                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
10271                         __kvm_migrate_timers(vcpu);
10272                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
10273                         kvm_update_masterclock(vcpu->kvm);
10274                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
10275                         kvm_gen_kvmclock_update(vcpu);
10276                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
10277                         r = kvm_guest_time_update(vcpu);
10278                         if (unlikely(r))
10279                                 goto out;
10280                 }
10281                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
10282                         kvm_mmu_sync_roots(vcpu);
10283                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
10284                         kvm_mmu_load_pgd(vcpu);
10285                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
10286                         kvm_vcpu_flush_tlb_all(vcpu);
10287
10288                         /* Flushing all ASIDs flushes the current ASID... */
10289                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
10290                 }
10291                 kvm_service_local_tlb_flush_requests(vcpu);
10292
10293                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
10294                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
10295                         r = 0;
10296                         goto out;
10297                 }
10298                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
10299                         if (is_guest_mode(vcpu)) {
10300                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
10301                         } else {
10302                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
10303                                 vcpu->mmio_needed = 0;
10304                                 r = 0;
10305                                 goto out;
10306                         }
10307                 }
10308                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
10309                         /* Page is swapped out. Do synthetic halt */
10310                         vcpu->arch.apf.halted = true;
10311                         r = 1;
10312                         goto out;
10313                 }
10314                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
10315                         record_steal_time(vcpu);
10316                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
10317                         process_smi(vcpu);
10318                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
10319                         process_nmi(vcpu);
10320                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
10321                         kvm_pmu_handle_event(vcpu);
10322                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
10323                         kvm_pmu_deliver_pmi(vcpu);
10324                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
10325                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
10326                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
10327                                      vcpu->arch.ioapic_handled_vectors)) {
10328                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
10329                                 vcpu->run->eoi.vector =
10330                                                 vcpu->arch.pending_ioapic_eoi;
10331                                 r = 0;
10332                                 goto out;
10333                         }
10334                 }
10335                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
10336                         vcpu_scan_ioapic(vcpu);
10337                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
10338                         vcpu_load_eoi_exitmap(vcpu);
10339                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
10340                         kvm_vcpu_reload_apic_access_page(vcpu);
10341                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
10342                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
10343                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
10344                         vcpu->run->system_event.ndata = 0;
10345                         r = 0;
10346                         goto out;
10347                 }
10348                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
10349                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
10350                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
10351                         vcpu->run->system_event.ndata = 0;
10352                         r = 0;
10353                         goto out;
10354                 }
10355                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
10356                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
10357
10358                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
10359                         vcpu->run->hyperv = hv_vcpu->exit;
10360                         r = 0;
10361                         goto out;
10362                 }
10363
10364                 /*
10365                  * KVM_REQ_HV_STIMER has to be processed after
10366                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
10367                  * depend on the guest clock being up-to-date
10368                  */
10369                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
10370                         kvm_hv_process_stimers(vcpu);
10371                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
10372                         kvm_vcpu_update_apicv(vcpu);
10373                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
10374                         kvm_check_async_pf_completion(vcpu);
10375                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
10376                         static_call(kvm_x86_msr_filter_changed)(vcpu);
10377
10378                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
10379                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
10380         }
10381
10382         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
10383             kvm_xen_has_interrupt(vcpu)) {
10384                 ++vcpu->stat.req_event;
10385                 r = kvm_apic_accept_events(vcpu);
10386                 if (r < 0) {
10387                         r = 0;
10388                         goto out;
10389                 }
10390                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
10391                         r = 1;
10392                         goto out;
10393                 }
10394
10395                 r = inject_pending_event(vcpu, &req_immediate_exit);
10396                 if (r < 0) {
10397                         r = 0;
10398                         goto out;
10399                 }
10400                 if (req_int_win)
10401                         static_call(kvm_x86_enable_irq_window)(vcpu);
10402
10403                 if (kvm_lapic_enabled(vcpu)) {
10404                         update_cr8_intercept(vcpu);
10405                         kvm_lapic_sync_to_vapic(vcpu);
10406                 }
10407         }
10408
10409         r = kvm_mmu_reload(vcpu);
10410         if (unlikely(r)) {
10411                 goto cancel_injection;
10412         }
10413
10414         preempt_disable();
10415
10416         static_call(kvm_x86_prepare_switch_to_guest)(vcpu);
10417
10418         /*
10419          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
10420          * IPI are then delayed after guest entry, which ensures that they
10421          * result in virtual interrupt delivery.
10422          */
10423         local_irq_disable();
10424
10425         /* Store vcpu->apicv_active before vcpu->mode.  */
10426         smp_store_release(&vcpu->mode, IN_GUEST_MODE);
10427
10428         kvm_vcpu_srcu_read_unlock(vcpu);
10429
10430         /*
10431          * 1) We should set ->mode before checking ->requests.  Please see
10432          * the comment in kvm_vcpu_exiting_guest_mode().
10433          *
10434          * 2) For APICv, we should set ->mode before checking PID.ON. This
10435          * pairs with the memory barrier implicit in pi_test_and_set_on
10436          * (see vmx_deliver_posted_interrupt).
10437          *
10438          * 3) This also orders the write to mode from any reads to the page
10439          * tables done while the VCPU is running.  Please see the comment
10440          * in kvm_flush_remote_tlbs.
10441          */
10442         smp_mb__after_srcu_read_unlock();
10443
10444         /*
10445          * Process pending posted interrupts to handle the case where the
10446          * notification IRQ arrived in the host, or was never sent (because the
10447          * target vCPU wasn't running).  Do this regardless of the vCPU's APICv
10448          * status, KVM doesn't update assigned devices when APICv is inhibited,
10449          * i.e. they can post interrupts even if APICv is temporarily disabled.
10450          */
10451         if (kvm_lapic_enabled(vcpu))
10452                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10453
10454         if (kvm_vcpu_exit_request(vcpu)) {
10455                 vcpu->mode = OUTSIDE_GUEST_MODE;
10456                 smp_wmb();
10457                 local_irq_enable();
10458                 preempt_enable();
10459                 kvm_vcpu_srcu_read_lock(vcpu);
10460                 r = 1;
10461                 goto cancel_injection;
10462         }
10463
10464         if (req_immediate_exit) {
10465                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10466                 static_call(kvm_x86_request_immediate_exit)(vcpu);
10467         }
10468
10469         fpregs_assert_state_consistent();
10470         if (test_thread_flag(TIF_NEED_FPU_LOAD))
10471                 switch_fpu_return();
10472
10473         if (vcpu->arch.guest_fpu.xfd_err)
10474                 wrmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
10475
10476         if (unlikely(vcpu->arch.switch_db_regs)) {
10477                 set_debugreg(0, 7);
10478                 set_debugreg(vcpu->arch.eff_db[0], 0);
10479                 set_debugreg(vcpu->arch.eff_db[1], 1);
10480                 set_debugreg(vcpu->arch.eff_db[2], 2);
10481                 set_debugreg(vcpu->arch.eff_db[3], 3);
10482         } else if (unlikely(hw_breakpoint_active())) {
10483                 set_debugreg(0, 7);
10484         }
10485
10486         guest_timing_enter_irqoff();
10487
10488         for (;;) {
10489                 /*
10490                  * Assert that vCPU vs. VM APICv state is consistent.  An APICv
10491                  * update must kick and wait for all vCPUs before toggling the
10492                  * per-VM state, and responsing vCPUs must wait for the update
10493                  * to complete before servicing KVM_REQ_APICV_UPDATE.
10494                  */
10495                 WARN_ON_ONCE((kvm_vcpu_apicv_activated(vcpu) != kvm_vcpu_apicv_active(vcpu)) &&
10496                              (kvm_get_apic_mode(vcpu) != LAPIC_MODE_DISABLED));
10497
10498                 exit_fastpath = static_call(kvm_x86_vcpu_run)(vcpu);
10499                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
10500                         break;
10501
10502                 if (kvm_lapic_enabled(vcpu))
10503                         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10504
10505                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
10506                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
10507                         break;
10508                 }
10509         }
10510
10511         /*
10512          * Do this here before restoring debug registers on the host.  And
10513          * since we do this before handling the vmexit, a DR access vmexit
10514          * can (a) read the correct value of the debug registers, (b) set
10515          * KVM_DEBUGREG_WONT_EXIT again.
10516          */
10517         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
10518                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
10519                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
10520                 kvm_update_dr0123(vcpu);
10521                 kvm_update_dr7(vcpu);
10522         }
10523
10524         /*
10525          * If the guest has used debug registers, at least dr7
10526          * will be disabled while returning to the host.
10527          * If we don't have active breakpoints in the host, we don't
10528          * care about the messed up debug address registers. But if
10529          * we have some of them active, restore the old state.
10530          */
10531         if (hw_breakpoint_active())
10532                 hw_breakpoint_restore();
10533
10534         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
10535         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
10536
10537         vcpu->mode = OUTSIDE_GUEST_MODE;
10538         smp_wmb();
10539
10540         /*
10541          * Sync xfd before calling handle_exit_irqoff() which may
10542          * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
10543          * in #NM irqoff handler).
10544          */
10545         if (vcpu->arch.xfd_no_write_intercept)
10546                 fpu_sync_guest_vmexit_xfd_state();
10547
10548         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
10549
10550         if (vcpu->arch.guest_fpu.xfd_err)
10551                 wrmsrl(MSR_IA32_XFD_ERR, 0);
10552
10553         /*
10554          * Consume any pending interrupts, including the possible source of
10555          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10556          * An instruction is required after local_irq_enable() to fully unblock
10557          * interrupts on processors that implement an interrupt shadow, the
10558          * stat.exits increment will do nicely.
10559          */
10560         kvm_before_interrupt(vcpu, KVM_HANDLING_IRQ);
10561         local_irq_enable();
10562         ++vcpu->stat.exits;
10563         local_irq_disable();
10564         kvm_after_interrupt(vcpu);
10565
10566         /*
10567          * Wait until after servicing IRQs to account guest time so that any
10568          * ticks that occurred while running the guest are properly accounted
10569          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
10570          * of accounting via context tracking, but the loss of accuracy is
10571          * acceptable for all known use cases.
10572          */
10573         guest_timing_exit_irqoff();
10574
10575         local_irq_enable();
10576         preempt_enable();
10577
10578         kvm_vcpu_srcu_read_lock(vcpu);
10579
10580         /*
10581          * Profile KVM exit RIPs:
10582          */
10583         if (unlikely(prof_on == KVM_PROFILING)) {
10584                 unsigned long rip = kvm_rip_read(vcpu);
10585                 profile_hit(KVM_PROFILING, (void *)rip);
10586         }
10587
10588         if (unlikely(vcpu->arch.tsc_always_catchup))
10589                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10590
10591         if (vcpu->arch.apic_attention)
10592                 kvm_lapic_sync_from_vapic(vcpu);
10593
10594         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10595         return r;
10596
10597 cancel_injection:
10598         if (req_immediate_exit)
10599                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10600         static_call(kvm_x86_cancel_injection)(vcpu);
10601         if (unlikely(vcpu->arch.apic_attention))
10602                 kvm_lapic_sync_from_vapic(vcpu);
10603 out:
10604         return r;
10605 }
10606
10607 /* Called within kvm->srcu read side.  */
10608 static inline int vcpu_block(struct kvm_vcpu *vcpu)
10609 {
10610         bool hv_timer;
10611
10612         if (!kvm_arch_vcpu_runnable(vcpu)) {
10613                 /*
10614                  * Switch to the software timer before halt-polling/blocking as
10615                  * the guest's timer may be a break event for the vCPU, and the
10616                  * hypervisor timer runs only when the CPU is in guest mode.
10617                  * Switch before halt-polling so that KVM recognizes an expired
10618                  * timer before blocking.
10619                  */
10620                 hv_timer = kvm_lapic_hv_timer_in_use(vcpu);
10621                 if (hv_timer)
10622                         kvm_lapic_switch_to_sw_timer(vcpu);
10623
10624                 kvm_vcpu_srcu_read_unlock(vcpu);
10625                 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
10626                         kvm_vcpu_halt(vcpu);
10627                 else
10628                         kvm_vcpu_block(vcpu);
10629                 kvm_vcpu_srcu_read_lock(vcpu);
10630
10631                 if (hv_timer)
10632                         kvm_lapic_switch_to_hv_timer(vcpu);
10633
10634                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
10635                         return 1;
10636         }
10637
10638         if (kvm_apic_accept_events(vcpu) < 0)
10639                 return 0;
10640         switch(vcpu->arch.mp_state) {
10641         case KVM_MP_STATE_HALTED:
10642         case KVM_MP_STATE_AP_RESET_HOLD:
10643                 vcpu->arch.pv.pv_unhalted = false;
10644                 vcpu->arch.mp_state =
10645                         KVM_MP_STATE_RUNNABLE;
10646                 fallthrough;
10647         case KVM_MP_STATE_RUNNABLE:
10648                 vcpu->arch.apf.halted = false;
10649                 break;
10650         case KVM_MP_STATE_INIT_RECEIVED:
10651                 break;
10652         default:
10653                 return -EINTR;
10654         }
10655         return 1;
10656 }
10657
10658 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10659 {
10660         if (is_guest_mode(vcpu))
10661                 kvm_check_nested_events(vcpu);
10662
10663         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10664                 !vcpu->arch.apf.halted);
10665 }
10666
10667 /* Called within kvm->srcu read side.  */
10668 static int vcpu_run(struct kvm_vcpu *vcpu)
10669 {
10670         int r;
10671
10672         vcpu->arch.l1tf_flush_l1d = true;
10673
10674         for (;;) {
10675                 /*
10676                  * If another guest vCPU requests a PV TLB flush in the middle
10677                  * of instruction emulation, the rest of the emulation could
10678                  * use a stale page translation. Assume that any code after
10679                  * this point can start executing an instruction.
10680                  */
10681                 vcpu->arch.at_instruction_boundary = false;
10682                 if (kvm_vcpu_running(vcpu)) {
10683                         r = vcpu_enter_guest(vcpu);
10684                 } else {
10685                         r = vcpu_block(vcpu);
10686                 }
10687
10688                 if (r <= 0)
10689                         break;
10690
10691                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10692                 if (kvm_xen_has_pending_events(vcpu))
10693                         kvm_xen_inject_pending_events(vcpu);
10694
10695                 if (kvm_cpu_has_pending_timer(vcpu))
10696                         kvm_inject_pending_timer_irqs(vcpu);
10697
10698                 if (dm_request_for_irq_injection(vcpu) &&
10699                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10700                         r = 0;
10701                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10702                         ++vcpu->stat.request_irq_exits;
10703                         break;
10704                 }
10705
10706                 if (__xfer_to_guest_mode_work_pending()) {
10707                         kvm_vcpu_srcu_read_unlock(vcpu);
10708                         r = xfer_to_guest_mode_handle_work(vcpu);
10709                         kvm_vcpu_srcu_read_lock(vcpu);
10710                         if (r)
10711                                 return r;
10712                 }
10713         }
10714
10715         return r;
10716 }
10717
10718 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10719 {
10720         return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10721 }
10722
10723 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10724 {
10725         BUG_ON(!vcpu->arch.pio.count);
10726
10727         return complete_emulated_io(vcpu);
10728 }
10729
10730 /*
10731  * Implements the following, as a state machine:
10732  *
10733  * read:
10734  *   for each fragment
10735  *     for each mmio piece in the fragment
10736  *       write gpa, len
10737  *       exit
10738  *       copy data
10739  *   execute insn
10740  *
10741  * write:
10742  *   for each fragment
10743  *     for each mmio piece in the fragment
10744  *       write gpa, len
10745  *       copy data
10746  *       exit
10747  */
10748 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10749 {
10750         struct kvm_run *run = vcpu->run;
10751         struct kvm_mmio_fragment *frag;
10752         unsigned len;
10753
10754         BUG_ON(!vcpu->mmio_needed);
10755
10756         /* Complete previous fragment */
10757         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10758         len = min(8u, frag->len);
10759         if (!vcpu->mmio_is_write)
10760                 memcpy(frag->data, run->mmio.data, len);
10761
10762         if (frag->len <= 8) {
10763                 /* Switch to the next fragment. */
10764                 frag++;
10765                 vcpu->mmio_cur_fragment++;
10766         } else {
10767                 /* Go forward to the next mmio piece. */
10768                 frag->data += len;
10769                 frag->gpa += len;
10770                 frag->len -= len;
10771         }
10772
10773         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10774                 vcpu->mmio_needed = 0;
10775
10776                 /* FIXME: return into emulator if single-stepping.  */
10777                 if (vcpu->mmio_is_write)
10778                         return 1;
10779                 vcpu->mmio_read_completed = 1;
10780                 return complete_emulated_io(vcpu);
10781         }
10782
10783         run->exit_reason = KVM_EXIT_MMIO;
10784         run->mmio.phys_addr = frag->gpa;
10785         if (vcpu->mmio_is_write)
10786                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10787         run->mmio.len = min(8u, frag->len);
10788         run->mmio.is_write = vcpu->mmio_is_write;
10789         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10790         return 0;
10791 }
10792
10793 /* Swap (qemu) user FPU context for the guest FPU context. */
10794 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10795 {
10796         /* Exclude PKRU, it's restored separately immediately after VM-Exit. */
10797         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, true);
10798         trace_kvm_fpu(1);
10799 }
10800
10801 /* When vcpu_run ends, restore user space FPU context. */
10802 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10803 {
10804         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, false);
10805         ++vcpu->stat.fpu_reload;
10806         trace_kvm_fpu(0);
10807 }
10808
10809 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10810 {
10811         struct kvm_run *kvm_run = vcpu->run;
10812         int r;
10813
10814         vcpu_load(vcpu);
10815         kvm_sigset_activate(vcpu);
10816         kvm_run->flags = 0;
10817         kvm_load_guest_fpu(vcpu);
10818
10819         kvm_vcpu_srcu_read_lock(vcpu);
10820         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10821                 if (kvm_run->immediate_exit) {
10822                         r = -EINTR;
10823                         goto out;
10824                 }
10825                 /*
10826                  * It should be impossible for the hypervisor timer to be in
10827                  * use before KVM has ever run the vCPU.
10828                  */
10829                 WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu));
10830
10831                 kvm_vcpu_srcu_read_unlock(vcpu);
10832                 kvm_vcpu_block(vcpu);
10833                 kvm_vcpu_srcu_read_lock(vcpu);
10834
10835                 if (kvm_apic_accept_events(vcpu) < 0) {
10836                         r = 0;
10837                         goto out;
10838                 }
10839                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10840                 r = -EAGAIN;
10841                 if (signal_pending(current)) {
10842                         r = -EINTR;
10843                         kvm_run->exit_reason = KVM_EXIT_INTR;
10844                         ++vcpu->stat.signal_exits;
10845                 }
10846                 goto out;
10847         }
10848
10849         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10850             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10851                 r = -EINVAL;
10852                 goto out;
10853         }
10854
10855         if (kvm_run->kvm_dirty_regs) {
10856                 r = sync_regs(vcpu);
10857                 if (r != 0)
10858                         goto out;
10859         }
10860
10861         /* re-sync apic's tpr */
10862         if (!lapic_in_kernel(vcpu)) {
10863                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10864                         r = -EINVAL;
10865                         goto out;
10866                 }
10867         }
10868
10869         if (unlikely(vcpu->arch.complete_userspace_io)) {
10870                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10871                 vcpu->arch.complete_userspace_io = NULL;
10872                 r = cui(vcpu);
10873                 if (r <= 0)
10874                         goto out;
10875         } else {
10876                 WARN_ON_ONCE(vcpu->arch.pio.count);
10877                 WARN_ON_ONCE(vcpu->mmio_needed);
10878         }
10879
10880         if (kvm_run->immediate_exit) {
10881                 r = -EINTR;
10882                 goto out;
10883         }
10884
10885         r = static_call(kvm_x86_vcpu_pre_run)(vcpu);
10886         if (r <= 0)
10887                 goto out;
10888
10889         r = vcpu_run(vcpu);
10890
10891 out:
10892         kvm_put_guest_fpu(vcpu);
10893         if (kvm_run->kvm_valid_regs)
10894                 store_regs(vcpu);
10895         post_kvm_run_save(vcpu);
10896         kvm_vcpu_srcu_read_unlock(vcpu);
10897
10898         kvm_sigset_deactivate(vcpu);
10899         vcpu_put(vcpu);
10900         return r;
10901 }
10902
10903 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10904 {
10905         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10906                 /*
10907                  * We are here if userspace calls get_regs() in the middle of
10908                  * instruction emulation. Registers state needs to be copied
10909                  * back from emulation context to vcpu. Userspace shouldn't do
10910                  * that usually, but some bad designed PV devices (vmware
10911                  * backdoor interface) need this to work
10912                  */
10913                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10914                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10915         }
10916         regs->rax = kvm_rax_read(vcpu);
10917         regs->rbx = kvm_rbx_read(vcpu);
10918         regs->rcx = kvm_rcx_read(vcpu);
10919         regs->rdx = kvm_rdx_read(vcpu);
10920         regs->rsi = kvm_rsi_read(vcpu);
10921         regs->rdi = kvm_rdi_read(vcpu);
10922         regs->rsp = kvm_rsp_read(vcpu);
10923         regs->rbp = kvm_rbp_read(vcpu);
10924 #ifdef CONFIG_X86_64
10925         regs->r8 = kvm_r8_read(vcpu);
10926         regs->r9 = kvm_r9_read(vcpu);
10927         regs->r10 = kvm_r10_read(vcpu);
10928         regs->r11 = kvm_r11_read(vcpu);
10929         regs->r12 = kvm_r12_read(vcpu);
10930         regs->r13 = kvm_r13_read(vcpu);
10931         regs->r14 = kvm_r14_read(vcpu);
10932         regs->r15 = kvm_r15_read(vcpu);
10933 #endif
10934
10935         regs->rip = kvm_rip_read(vcpu);
10936         regs->rflags = kvm_get_rflags(vcpu);
10937 }
10938
10939 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10940 {
10941         vcpu_load(vcpu);
10942         __get_regs(vcpu, regs);
10943         vcpu_put(vcpu);
10944         return 0;
10945 }
10946
10947 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10948 {
10949         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10950         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10951
10952         kvm_rax_write(vcpu, regs->rax);
10953         kvm_rbx_write(vcpu, regs->rbx);
10954         kvm_rcx_write(vcpu, regs->rcx);
10955         kvm_rdx_write(vcpu, regs->rdx);
10956         kvm_rsi_write(vcpu, regs->rsi);
10957         kvm_rdi_write(vcpu, regs->rdi);
10958         kvm_rsp_write(vcpu, regs->rsp);
10959         kvm_rbp_write(vcpu, regs->rbp);
10960 #ifdef CONFIG_X86_64
10961         kvm_r8_write(vcpu, regs->r8);
10962         kvm_r9_write(vcpu, regs->r9);
10963         kvm_r10_write(vcpu, regs->r10);
10964         kvm_r11_write(vcpu, regs->r11);
10965         kvm_r12_write(vcpu, regs->r12);
10966         kvm_r13_write(vcpu, regs->r13);
10967         kvm_r14_write(vcpu, regs->r14);
10968         kvm_r15_write(vcpu, regs->r15);
10969 #endif
10970
10971         kvm_rip_write(vcpu, regs->rip);
10972         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10973
10974         vcpu->arch.exception.pending = false;
10975
10976         kvm_make_request(KVM_REQ_EVENT, vcpu);
10977 }
10978
10979 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10980 {
10981         vcpu_load(vcpu);
10982         __set_regs(vcpu, regs);
10983         vcpu_put(vcpu);
10984         return 0;
10985 }
10986
10987 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10988 {
10989         struct desc_ptr dt;
10990
10991         if (vcpu->arch.guest_state_protected)
10992                 goto skip_protected_regs;
10993
10994         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10995         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10996         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10997         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10998         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10999         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
11000
11001         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
11002         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
11003
11004         static_call(kvm_x86_get_idt)(vcpu, &dt);
11005         sregs->idt.limit = dt.size;
11006         sregs->idt.base = dt.address;
11007         static_call(kvm_x86_get_gdt)(vcpu, &dt);
11008         sregs->gdt.limit = dt.size;
11009         sregs->gdt.base = dt.address;
11010
11011         sregs->cr2 = vcpu->arch.cr2;
11012         sregs->cr3 = kvm_read_cr3(vcpu);
11013
11014 skip_protected_regs:
11015         sregs->cr0 = kvm_read_cr0(vcpu);
11016         sregs->cr4 = kvm_read_cr4(vcpu);
11017         sregs->cr8 = kvm_get_cr8(vcpu);
11018         sregs->efer = vcpu->arch.efer;
11019         sregs->apic_base = kvm_get_apic_base(vcpu);
11020 }
11021
11022 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
11023 {
11024         __get_sregs_common(vcpu, sregs);
11025
11026         if (vcpu->arch.guest_state_protected)
11027                 return;
11028
11029         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
11030                 set_bit(vcpu->arch.interrupt.nr,
11031                         (unsigned long *)sregs->interrupt_bitmap);
11032 }
11033
11034 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
11035 {
11036         int i;
11037
11038         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
11039
11040         if (vcpu->arch.guest_state_protected)
11041                 return;
11042
11043         if (is_pae_paging(vcpu)) {
11044                 for (i = 0 ; i < 4 ; i++)
11045                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
11046                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
11047         }
11048 }
11049
11050 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
11051                                   struct kvm_sregs *sregs)
11052 {
11053         vcpu_load(vcpu);
11054         __get_sregs(vcpu, sregs);
11055         vcpu_put(vcpu);
11056         return 0;
11057 }
11058
11059 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
11060                                     struct kvm_mp_state *mp_state)
11061 {
11062         int r;
11063
11064         vcpu_load(vcpu);
11065         if (kvm_mpx_supported())
11066                 kvm_load_guest_fpu(vcpu);
11067
11068         r = kvm_apic_accept_events(vcpu);
11069         if (r < 0)
11070                 goto out;
11071         r = 0;
11072
11073         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
11074              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
11075             vcpu->arch.pv.pv_unhalted)
11076                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
11077         else
11078                 mp_state->mp_state = vcpu->arch.mp_state;
11079
11080 out:
11081         if (kvm_mpx_supported())
11082                 kvm_put_guest_fpu(vcpu);
11083         vcpu_put(vcpu);
11084         return r;
11085 }
11086
11087 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
11088                                     struct kvm_mp_state *mp_state)
11089 {
11090         int ret = -EINVAL;
11091
11092         vcpu_load(vcpu);
11093
11094         if (!lapic_in_kernel(vcpu) &&
11095             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
11096                 goto out;
11097
11098         /*
11099          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
11100          * INIT state; latched init should be reported using
11101          * KVM_SET_VCPU_EVENTS, so reject it here.
11102          */
11103         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
11104             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
11105              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
11106                 goto out;
11107
11108         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
11109                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
11110                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
11111         } else
11112                 vcpu->arch.mp_state = mp_state->mp_state;
11113         kvm_make_request(KVM_REQ_EVENT, vcpu);
11114
11115         ret = 0;
11116 out:
11117         vcpu_put(vcpu);
11118         return ret;
11119 }
11120
11121 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
11122                     int reason, bool has_error_code, u32 error_code)
11123 {
11124         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
11125         int ret;
11126
11127         init_emulate_ctxt(vcpu);
11128
11129         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
11130                                    has_error_code, error_code);
11131         if (ret) {
11132                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11133                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11134                 vcpu->run->internal.ndata = 0;
11135                 return 0;
11136         }
11137
11138         kvm_rip_write(vcpu, ctxt->eip);
11139         kvm_set_rflags(vcpu, ctxt->eflags);
11140         return 1;
11141 }
11142 EXPORT_SYMBOL_GPL(kvm_task_switch);
11143
11144 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
11145 {
11146         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
11147                 /*
11148                  * When EFER.LME and CR0.PG are set, the processor is in
11149                  * 64-bit mode (though maybe in a 32-bit code segment).
11150                  * CR4.PAE and EFER.LMA must be set.
11151                  */
11152                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
11153                         return false;
11154                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
11155                         return false;
11156         } else {
11157                 /*
11158                  * Not in 64-bit mode: EFER.LMA is clear and the code
11159                  * segment cannot be 64-bit.
11160                  */
11161                 if (sregs->efer & EFER_LMA || sregs->cs.l)
11162                         return false;
11163         }
11164
11165         return kvm_is_valid_cr4(vcpu, sregs->cr4);
11166 }
11167
11168 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
11169                 int *mmu_reset_needed, bool update_pdptrs)
11170 {
11171         struct msr_data apic_base_msr;
11172         int idx;
11173         struct desc_ptr dt;
11174
11175         if (!kvm_is_valid_sregs(vcpu, sregs))
11176                 return -EINVAL;
11177
11178         apic_base_msr.data = sregs->apic_base;
11179         apic_base_msr.host_initiated = true;
11180         if (kvm_set_apic_base(vcpu, &apic_base_msr))
11181                 return -EINVAL;
11182
11183         if (vcpu->arch.guest_state_protected)
11184                 return 0;
11185
11186         dt.size = sregs->idt.limit;
11187         dt.address = sregs->idt.base;
11188         static_call(kvm_x86_set_idt)(vcpu, &dt);
11189         dt.size = sregs->gdt.limit;
11190         dt.address = sregs->gdt.base;
11191         static_call(kvm_x86_set_gdt)(vcpu, &dt);
11192
11193         vcpu->arch.cr2 = sregs->cr2;
11194         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
11195         vcpu->arch.cr3 = sregs->cr3;
11196         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11197         static_call_cond(kvm_x86_post_set_cr3)(vcpu, sregs->cr3);
11198
11199         kvm_set_cr8(vcpu, sregs->cr8);
11200
11201         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
11202         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
11203
11204         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
11205         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
11206         vcpu->arch.cr0 = sregs->cr0;
11207
11208         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
11209         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
11210
11211         if (update_pdptrs) {
11212                 idx = srcu_read_lock(&vcpu->kvm->srcu);
11213                 if (is_pae_paging(vcpu)) {
11214                         load_pdptrs(vcpu, kvm_read_cr3(vcpu));
11215                         *mmu_reset_needed = 1;
11216                 }
11217                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
11218         }
11219
11220         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
11221         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
11222         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
11223         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
11224         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
11225         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
11226
11227         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
11228         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
11229
11230         update_cr8_intercept(vcpu);
11231
11232         /* Older userspace won't unhalt the vcpu on reset. */
11233         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
11234             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
11235             !is_protmode(vcpu))
11236                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11237
11238         return 0;
11239 }
11240
11241 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
11242 {
11243         int pending_vec, max_bits;
11244         int mmu_reset_needed = 0;
11245         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
11246
11247         if (ret)
11248                 return ret;
11249
11250         if (mmu_reset_needed)
11251                 kvm_mmu_reset_context(vcpu);
11252
11253         max_bits = KVM_NR_INTERRUPTS;
11254         pending_vec = find_first_bit(
11255                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
11256
11257         if (pending_vec < max_bits) {
11258                 kvm_queue_interrupt(vcpu, pending_vec, false);
11259                 pr_debug("Set back pending irq %d\n", pending_vec);
11260                 kvm_make_request(KVM_REQ_EVENT, vcpu);
11261         }
11262         return 0;
11263 }
11264
11265 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
11266 {
11267         int mmu_reset_needed = 0;
11268         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
11269         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
11270                 !(sregs2->efer & EFER_LMA);
11271         int i, ret;
11272
11273         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
11274                 return -EINVAL;
11275
11276         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
11277                 return -EINVAL;
11278
11279         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
11280                                  &mmu_reset_needed, !valid_pdptrs);
11281         if (ret)
11282                 return ret;
11283
11284         if (valid_pdptrs) {
11285                 for (i = 0; i < 4 ; i++)
11286                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
11287
11288                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
11289                 mmu_reset_needed = 1;
11290                 vcpu->arch.pdptrs_from_userspace = true;
11291         }
11292         if (mmu_reset_needed)
11293                 kvm_mmu_reset_context(vcpu);
11294         return 0;
11295 }
11296
11297 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
11298                                   struct kvm_sregs *sregs)
11299 {
11300         int ret;
11301
11302         vcpu_load(vcpu);
11303         ret = __set_sregs(vcpu, sregs);
11304         vcpu_put(vcpu);
11305         return ret;
11306 }
11307
11308 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm *kvm)
11309 {
11310         bool set = false;
11311         struct kvm_vcpu *vcpu;
11312         unsigned long i;
11313
11314         if (!enable_apicv)
11315                 return;
11316
11317         down_write(&kvm->arch.apicv_update_lock);
11318
11319         kvm_for_each_vcpu(i, vcpu, kvm) {
11320                 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ) {
11321                         set = true;
11322                         break;
11323                 }
11324         }
11325         __kvm_set_or_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_BLOCKIRQ, set);
11326         up_write(&kvm->arch.apicv_update_lock);
11327 }
11328
11329 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
11330                                         struct kvm_guest_debug *dbg)
11331 {
11332         unsigned long rflags;
11333         int i, r;
11334
11335         if (vcpu->arch.guest_state_protected)
11336                 return -EINVAL;
11337
11338         vcpu_load(vcpu);
11339
11340         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
11341                 r = -EBUSY;
11342                 if (vcpu->arch.exception.pending)
11343                         goto out;
11344                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
11345                         kvm_queue_exception(vcpu, DB_VECTOR);
11346                 else
11347                         kvm_queue_exception(vcpu, BP_VECTOR);
11348         }
11349
11350         /*
11351          * Read rflags as long as potentially injected trace flags are still
11352          * filtered out.
11353          */
11354         rflags = kvm_get_rflags(vcpu);
11355
11356         vcpu->guest_debug = dbg->control;
11357         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
11358                 vcpu->guest_debug = 0;
11359
11360         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
11361                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
11362                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
11363                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
11364         } else {
11365                 for (i = 0; i < KVM_NR_DB_REGS; i++)
11366                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
11367         }
11368         kvm_update_dr7(vcpu);
11369
11370         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11371                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
11372
11373         /*
11374          * Trigger an rflags update that will inject or remove the trace
11375          * flags.
11376          */
11377         kvm_set_rflags(vcpu, rflags);
11378
11379         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11380
11381         kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu->kvm);
11382
11383         r = 0;
11384
11385 out:
11386         vcpu_put(vcpu);
11387         return r;
11388 }
11389
11390 /*
11391  * Translate a guest virtual address to a guest physical address.
11392  */
11393 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
11394                                     struct kvm_translation *tr)
11395 {
11396         unsigned long vaddr = tr->linear_address;
11397         gpa_t gpa;
11398         int idx;
11399
11400         vcpu_load(vcpu);
11401
11402         idx = srcu_read_lock(&vcpu->kvm->srcu);
11403         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
11404         srcu_read_unlock(&vcpu->kvm->srcu, idx);
11405         tr->physical_address = gpa;
11406         tr->valid = gpa != INVALID_GPA;
11407         tr->writeable = 1;
11408         tr->usermode = 0;
11409
11410         vcpu_put(vcpu);
11411         return 0;
11412 }
11413
11414 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11415 {
11416         struct fxregs_state *fxsave;
11417
11418         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11419                 return 0;
11420
11421         vcpu_load(vcpu);
11422
11423         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11424         memcpy(fpu->fpr, fxsave->st_space, 128);
11425         fpu->fcw = fxsave->cwd;
11426         fpu->fsw = fxsave->swd;
11427         fpu->ftwx = fxsave->twd;
11428         fpu->last_opcode = fxsave->fop;
11429         fpu->last_ip = fxsave->rip;
11430         fpu->last_dp = fxsave->rdp;
11431         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
11432
11433         vcpu_put(vcpu);
11434         return 0;
11435 }
11436
11437 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11438 {
11439         struct fxregs_state *fxsave;
11440
11441         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11442                 return 0;
11443
11444         vcpu_load(vcpu);
11445
11446         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11447
11448         memcpy(fxsave->st_space, fpu->fpr, 128);
11449         fxsave->cwd = fpu->fcw;
11450         fxsave->swd = fpu->fsw;
11451         fxsave->twd = fpu->ftwx;
11452         fxsave->fop = fpu->last_opcode;
11453         fxsave->rip = fpu->last_ip;
11454         fxsave->rdp = fpu->last_dp;
11455         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
11456
11457         vcpu_put(vcpu);
11458         return 0;
11459 }
11460
11461 static void store_regs(struct kvm_vcpu *vcpu)
11462 {
11463         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
11464
11465         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
11466                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
11467
11468         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
11469                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
11470
11471         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
11472                 kvm_vcpu_ioctl_x86_get_vcpu_events(
11473                                 vcpu, &vcpu->run->s.regs.events);
11474 }
11475
11476 static int sync_regs(struct kvm_vcpu *vcpu)
11477 {
11478         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
11479                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
11480                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
11481         }
11482         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
11483                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
11484                         return -EINVAL;
11485                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
11486         }
11487         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
11488                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
11489                                 vcpu, &vcpu->run->s.regs.events))
11490                         return -EINVAL;
11491                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
11492         }
11493
11494         return 0;
11495 }
11496
11497 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
11498 {
11499         if (kvm_check_tsc_unstable() && kvm->created_vcpus)
11500                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
11501                              "guest TSC will not be reliable\n");
11502
11503         if (!kvm->arch.max_vcpu_ids)
11504                 kvm->arch.max_vcpu_ids = KVM_MAX_VCPU_IDS;
11505
11506         if (id >= kvm->arch.max_vcpu_ids)
11507                 return -EINVAL;
11508
11509         return static_call(kvm_x86_vcpu_precreate)(kvm);
11510 }
11511
11512 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
11513 {
11514         struct page *page;
11515         int r;
11516
11517         vcpu->arch.last_vmentry_cpu = -1;
11518         vcpu->arch.regs_avail = ~0;
11519         vcpu->arch.regs_dirty = ~0;
11520
11521         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
11522                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11523         else
11524                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
11525
11526         r = kvm_mmu_create(vcpu);
11527         if (r < 0)
11528                 return r;
11529
11530         if (irqchip_in_kernel(vcpu->kvm)) {
11531                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
11532                 if (r < 0)
11533                         goto fail_mmu_destroy;
11534
11535                 /*
11536                  * Defer evaluating inhibits until the vCPU is first run, as
11537                  * this vCPU will not get notified of any changes until this
11538                  * vCPU is visible to other vCPUs (marked online and added to
11539                  * the set of vCPUs).  Opportunistically mark APICv active as
11540                  * VMX in particularly is highly unlikely to have inhibits.
11541                  * Ignore the current per-VM APICv state so that vCPU creation
11542                  * is guaranteed to run with a deterministic value, the request
11543                  * will ensure the vCPU gets the correct state before VM-Entry.
11544                  */
11545                 if (enable_apicv) {
11546                         vcpu->arch.apic->apicv_active = true;
11547                         kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
11548                 }
11549         } else
11550                 static_branch_inc(&kvm_has_noapic_vcpu);
11551
11552         r = -ENOMEM;
11553
11554         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
11555         if (!page)
11556                 goto fail_free_lapic;
11557         vcpu->arch.pio_data = page_address(page);
11558
11559         vcpu->arch.mce_banks = kcalloc(KVM_MAX_MCE_BANKS * 4, sizeof(u64),
11560                                        GFP_KERNEL_ACCOUNT);
11561         vcpu->arch.mci_ctl2_banks = kcalloc(KVM_MAX_MCE_BANKS, sizeof(u64),
11562                                             GFP_KERNEL_ACCOUNT);
11563         if (!vcpu->arch.mce_banks || !vcpu->arch.mci_ctl2_banks)
11564                 goto fail_free_pio_data;
11565         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
11566
11567         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
11568                                 GFP_KERNEL_ACCOUNT))
11569                 goto fail_free_mce_banks;
11570
11571         if (!alloc_emulate_ctxt(vcpu))
11572                 goto free_wbinvd_dirty_mask;
11573
11574         if (!fpu_alloc_guest_fpstate(&vcpu->arch.guest_fpu)) {
11575                 pr_err("kvm: failed to allocate vcpu's fpu\n");
11576                 goto free_emulate_ctxt;
11577         }
11578
11579         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11580         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11581
11582         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11583
11584         kvm_async_pf_hash_reset(vcpu);
11585         kvm_pmu_init(vcpu);
11586
11587         vcpu->arch.pending_external_vector = -1;
11588         vcpu->arch.preempted_in_kernel = false;
11589
11590 #if IS_ENABLED(CONFIG_HYPERV)
11591         vcpu->arch.hv_root_tdp = INVALID_PAGE;
11592 #endif
11593
11594         r = static_call(kvm_x86_vcpu_create)(vcpu);
11595         if (r)
11596                 goto free_guest_fpu;
11597
11598         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11599         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11600         kvm_xen_init_vcpu(vcpu);
11601         kvm_vcpu_mtrr_init(vcpu);
11602         vcpu_load(vcpu);
11603         kvm_set_tsc_khz(vcpu, vcpu->kvm->arch.default_tsc_khz);
11604         kvm_vcpu_reset(vcpu, false);
11605         kvm_init_mmu(vcpu);
11606         vcpu_put(vcpu);
11607         return 0;
11608
11609 free_guest_fpu:
11610         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11611 free_emulate_ctxt:
11612         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11613 free_wbinvd_dirty_mask:
11614         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11615 fail_free_mce_banks:
11616         kfree(vcpu->arch.mce_banks);
11617         kfree(vcpu->arch.mci_ctl2_banks);
11618 fail_free_pio_data:
11619         free_page((unsigned long)vcpu->arch.pio_data);
11620 fail_free_lapic:
11621         kvm_free_lapic(vcpu);
11622 fail_mmu_destroy:
11623         kvm_mmu_destroy(vcpu);
11624         return r;
11625 }
11626
11627 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11628 {
11629         struct kvm *kvm = vcpu->kvm;
11630
11631         if (mutex_lock_killable(&vcpu->mutex))
11632                 return;
11633         vcpu_load(vcpu);
11634         kvm_synchronize_tsc(vcpu, 0);
11635         vcpu_put(vcpu);
11636
11637         /* poll control enabled by default */
11638         vcpu->arch.msr_kvm_poll_control = 1;
11639
11640         mutex_unlock(&vcpu->mutex);
11641
11642         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11643                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11644                                                 KVMCLOCK_SYNC_PERIOD);
11645 }
11646
11647 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11648 {
11649         int idx;
11650
11651         kvmclock_reset(vcpu);
11652
11653         static_call(kvm_x86_vcpu_free)(vcpu);
11654
11655         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11656         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11657         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11658
11659         kvm_xen_destroy_vcpu(vcpu);
11660         kvm_hv_vcpu_uninit(vcpu);
11661         kvm_pmu_destroy(vcpu);
11662         kfree(vcpu->arch.mce_banks);
11663         kfree(vcpu->arch.mci_ctl2_banks);
11664         kvm_free_lapic(vcpu);
11665         idx = srcu_read_lock(&vcpu->kvm->srcu);
11666         kvm_mmu_destroy(vcpu);
11667         srcu_read_unlock(&vcpu->kvm->srcu, idx);
11668         free_page((unsigned long)vcpu->arch.pio_data);
11669         kvfree(vcpu->arch.cpuid_entries);
11670         if (!lapic_in_kernel(vcpu))
11671                 static_branch_dec(&kvm_has_noapic_vcpu);
11672 }
11673
11674 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11675 {
11676         struct kvm_cpuid_entry2 *cpuid_0x1;
11677         unsigned long old_cr0 = kvm_read_cr0(vcpu);
11678         unsigned long new_cr0;
11679
11680         /*
11681          * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11682          * to handle side effects.  RESET emulation hits those flows and relies
11683          * on emulated/virtualized registers, including those that are loaded
11684          * into hardware, to be zeroed at vCPU creation.  Use CRs as a sentinel
11685          * to detect improper or missing initialization.
11686          */
11687         WARN_ON_ONCE(!init_event &&
11688                      (old_cr0 || kvm_read_cr3(vcpu) || kvm_read_cr4(vcpu)));
11689
11690         kvm_lapic_reset(vcpu, init_event);
11691
11692         vcpu->arch.hflags = 0;
11693
11694         vcpu->arch.smi_pending = 0;
11695         vcpu->arch.smi_count = 0;
11696         atomic_set(&vcpu->arch.nmi_queued, 0);
11697         vcpu->arch.nmi_pending = 0;
11698         vcpu->arch.nmi_injected = false;
11699         kvm_clear_interrupt_queue(vcpu);
11700         kvm_clear_exception_queue(vcpu);
11701
11702         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11703         kvm_update_dr0123(vcpu);
11704         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11705         vcpu->arch.dr7 = DR7_FIXED_1;
11706         kvm_update_dr7(vcpu);
11707
11708         vcpu->arch.cr2 = 0;
11709
11710         kvm_make_request(KVM_REQ_EVENT, vcpu);
11711         vcpu->arch.apf.msr_en_val = 0;
11712         vcpu->arch.apf.msr_int_val = 0;
11713         vcpu->arch.st.msr_val = 0;
11714
11715         kvmclock_reset(vcpu);
11716
11717         kvm_clear_async_pf_completion_queue(vcpu);
11718         kvm_async_pf_hash_reset(vcpu);
11719         vcpu->arch.apf.halted = false;
11720
11721         if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) {
11722                 struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate;
11723
11724                 /*
11725                  * To avoid have the INIT path from kvm_apic_has_events() that be
11726                  * called with loaded FPU and does not let userspace fix the state.
11727                  */
11728                 if (init_event)
11729                         kvm_put_guest_fpu(vcpu);
11730
11731                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS);
11732                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR);
11733
11734                 if (init_event)
11735                         kvm_load_guest_fpu(vcpu);
11736         }
11737
11738         if (!init_event) {
11739                 kvm_pmu_reset(vcpu);
11740                 vcpu->arch.smbase = 0x30000;
11741
11742                 vcpu->arch.msr_misc_features_enables = 0;
11743                 vcpu->arch.ia32_misc_enable_msr = MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL |
11744                                                   MSR_IA32_MISC_ENABLE_BTS_UNAVAIL;
11745
11746                 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11747                 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11748         }
11749
11750         /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
11751         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11752         kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
11753
11754         /*
11755          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11756          * if no CPUID match is found.  Note, it's impossible to get a match at
11757          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11758          * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
11759          * on RESET.  But, go through the motions in case that's ever remedied.
11760          */
11761         cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1);
11762         kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
11763
11764         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11765
11766         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11767         kvm_rip_write(vcpu, 0xfff0);
11768
11769         vcpu->arch.cr3 = 0;
11770         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11771
11772         /*
11773          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
11774          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11775          * (or qualify) that with a footnote stating that CD/NW are preserved.
11776          */
11777         new_cr0 = X86_CR0_ET;
11778         if (init_event)
11779                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11780         else
11781                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11782
11783         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11784         static_call(kvm_x86_set_cr4)(vcpu, 0);
11785         static_call(kvm_x86_set_efer)(vcpu, 0);
11786         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11787
11788         /*
11789          * On the standard CR0/CR4/EFER modification paths, there are several
11790          * complex conditions determining whether the MMU has to be reset and/or
11791          * which PCIDs have to be flushed.  However, CR0.WP and the paging-related
11792          * bits in CR4 and EFER are irrelevant if CR0.PG was '0'; and a reset+flush
11793          * is needed anyway if CR0.PG was '1' (which can only happen for INIT, as
11794          * CR0 will be '0' prior to RESET).  So we only need to check CR0.PG here.
11795          */
11796         if (old_cr0 & X86_CR0_PG) {
11797                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11798                 kvm_mmu_reset_context(vcpu);
11799         }
11800
11801         /*
11802          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
11803          * APM states the TLBs are untouched by INIT, but it also states that
11804          * the TLBs are flushed on "External initialization of the processor."
11805          * Flush the guest TLB regardless of vendor, there is no meaningful
11806          * benefit in relying on the guest to flush the TLB immediately after
11807          * INIT.  A spurious TLB flush is benign and likely negligible from a
11808          * performance perspective.
11809          */
11810         if (init_event)
11811                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11812 }
11813 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11814
11815 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11816 {
11817         struct kvm_segment cs;
11818
11819         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11820         cs.selector = vector << 8;
11821         cs.base = vector << 12;
11822         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11823         kvm_rip_write(vcpu, 0);
11824 }
11825 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11826
11827 int kvm_arch_hardware_enable(void)
11828 {
11829         struct kvm *kvm;
11830         struct kvm_vcpu *vcpu;
11831         unsigned long i;
11832         int ret;
11833         u64 local_tsc;
11834         u64 max_tsc = 0;
11835         bool stable, backwards_tsc = false;
11836
11837         kvm_user_return_msr_cpu_online();
11838         ret = static_call(kvm_x86_hardware_enable)();
11839         if (ret != 0)
11840                 return ret;
11841
11842         local_tsc = rdtsc();
11843         stable = !kvm_check_tsc_unstable();
11844         list_for_each_entry(kvm, &vm_list, vm_list) {
11845                 kvm_for_each_vcpu(i, vcpu, kvm) {
11846                         if (!stable && vcpu->cpu == smp_processor_id())
11847                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11848                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11849                                 backwards_tsc = true;
11850                                 if (vcpu->arch.last_host_tsc > max_tsc)
11851                                         max_tsc = vcpu->arch.last_host_tsc;
11852                         }
11853                 }
11854         }
11855
11856         /*
11857          * Sometimes, even reliable TSCs go backwards.  This happens on
11858          * platforms that reset TSC during suspend or hibernate actions, but
11859          * maintain synchronization.  We must compensate.  Fortunately, we can
11860          * detect that condition here, which happens early in CPU bringup,
11861          * before any KVM threads can be running.  Unfortunately, we can't
11862          * bring the TSCs fully up to date with real time, as we aren't yet far
11863          * enough into CPU bringup that we know how much real time has actually
11864          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11865          * variables that haven't been updated yet.
11866          *
11867          * So we simply find the maximum observed TSC above, then record the
11868          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
11869          * the adjustment will be applied.  Note that we accumulate
11870          * adjustments, in case multiple suspend cycles happen before some VCPU
11871          * gets a chance to run again.  In the event that no KVM threads get a
11872          * chance to run, we will miss the entire elapsed period, as we'll have
11873          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11874          * loose cycle time.  This isn't too big a deal, since the loss will be
11875          * uniform across all VCPUs (not to mention the scenario is extremely
11876          * unlikely). It is possible that a second hibernate recovery happens
11877          * much faster than a first, causing the observed TSC here to be
11878          * smaller; this would require additional padding adjustment, which is
11879          * why we set last_host_tsc to the local tsc observed here.
11880          *
11881          * N.B. - this code below runs only on platforms with reliable TSC,
11882          * as that is the only way backwards_tsc is set above.  Also note
11883          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11884          * have the same delta_cyc adjustment applied if backwards_tsc
11885          * is detected.  Note further, this adjustment is only done once,
11886          * as we reset last_host_tsc on all VCPUs to stop this from being
11887          * called multiple times (one for each physical CPU bringup).
11888          *
11889          * Platforms with unreliable TSCs don't have to deal with this, they
11890          * will be compensated by the logic in vcpu_load, which sets the TSC to
11891          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11892          * guarantee that they stay in perfect synchronization.
11893          */
11894         if (backwards_tsc) {
11895                 u64 delta_cyc = max_tsc - local_tsc;
11896                 list_for_each_entry(kvm, &vm_list, vm_list) {
11897                         kvm->arch.backwards_tsc_observed = true;
11898                         kvm_for_each_vcpu(i, vcpu, kvm) {
11899                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11900                                 vcpu->arch.last_host_tsc = local_tsc;
11901                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11902                         }
11903
11904                         /*
11905                          * We have to disable TSC offset matching.. if you were
11906                          * booting a VM while issuing an S4 host suspend....
11907                          * you may have some problem.  Solving this issue is
11908                          * left as an exercise to the reader.
11909                          */
11910                         kvm->arch.last_tsc_nsec = 0;
11911                         kvm->arch.last_tsc_write = 0;
11912                 }
11913
11914         }
11915         return 0;
11916 }
11917
11918 void kvm_arch_hardware_disable(void)
11919 {
11920         static_call(kvm_x86_hardware_disable)();
11921         drop_user_return_notifiers();
11922 }
11923
11924 static inline void kvm_ops_update(struct kvm_x86_init_ops *ops)
11925 {
11926         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11927
11928 #define __KVM_X86_OP(func) \
11929         static_call_update(kvm_x86_##func, kvm_x86_ops.func);
11930 #define KVM_X86_OP(func) \
11931         WARN_ON(!kvm_x86_ops.func); __KVM_X86_OP(func)
11932 #define KVM_X86_OP_OPTIONAL __KVM_X86_OP
11933 #define KVM_X86_OP_OPTIONAL_RET0(func) \
11934         static_call_update(kvm_x86_##func, (void *)kvm_x86_ops.func ? : \
11935                                            (void *)__static_call_return0);
11936 #include <asm/kvm-x86-ops.h>
11937 #undef __KVM_X86_OP
11938
11939         kvm_pmu_ops_update(ops->pmu_ops);
11940 }
11941
11942 int kvm_arch_hardware_setup(void *opaque)
11943 {
11944         struct kvm_x86_init_ops *ops = opaque;
11945         int r;
11946
11947         rdmsrl_safe(MSR_EFER, &host_efer);
11948
11949         if (boot_cpu_has(X86_FEATURE_XSAVES))
11950                 rdmsrl(MSR_IA32_XSS, host_xss);
11951
11952         kvm_init_pmu_capability();
11953
11954         r = ops->hardware_setup();
11955         if (r != 0)
11956                 return r;
11957
11958         kvm_ops_update(ops);
11959
11960         kvm_register_perf_callbacks(ops->handle_intel_pt_intr);
11961
11962         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11963                 kvm_caps.supported_xss = 0;
11964
11965 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11966         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11967 #undef __kvm_cpu_cap_has
11968
11969         if (kvm_caps.has_tsc_control) {
11970                 /*
11971                  * Make sure the user can only configure tsc_khz values that
11972                  * fit into a signed integer.
11973                  * A min value is not calculated because it will always
11974                  * be 1 on all machines.
11975                  */
11976                 u64 max = min(0x7fffffffULL,
11977                               __scale_tsc(kvm_caps.max_tsc_scaling_ratio, tsc_khz));
11978                 kvm_caps.max_guest_tsc_khz = max;
11979         }
11980         kvm_caps.default_tsc_scaling_ratio = 1ULL << kvm_caps.tsc_scaling_ratio_frac_bits;
11981         kvm_init_msr_list();
11982         return 0;
11983 }
11984
11985 void kvm_arch_hardware_unsetup(void)
11986 {
11987         kvm_unregister_perf_callbacks();
11988
11989         static_call(kvm_x86_hardware_unsetup)();
11990 }
11991
11992 int kvm_arch_check_processor_compat(void *opaque)
11993 {
11994         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11995         struct kvm_x86_init_ops *ops = opaque;
11996
11997         WARN_ON(!irqs_disabled());
11998
11999         if (__cr4_reserved_bits(cpu_has, c) !=
12000             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
12001                 return -EIO;
12002
12003         return ops->check_processor_compatibility();
12004 }
12005
12006 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
12007 {
12008         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
12009 }
12010 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
12011
12012 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
12013 {
12014         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
12015 }
12016
12017 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
12018 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
12019
12020 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
12021 {
12022         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
12023
12024         vcpu->arch.l1tf_flush_l1d = true;
12025         if (pmu->version && unlikely(pmu->event_count)) {
12026                 pmu->need_cleanup = true;
12027                 kvm_make_request(KVM_REQ_PMU, vcpu);
12028         }
12029         static_call(kvm_x86_sched_in)(vcpu, cpu);
12030 }
12031
12032 void kvm_arch_free_vm(struct kvm *kvm)
12033 {
12034         kfree(to_kvm_hv(kvm)->hv_pa_pg);
12035         __kvm_arch_free_vm(kvm);
12036 }
12037
12038
12039 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
12040 {
12041         int ret;
12042         unsigned long flags;
12043
12044         if (type)
12045                 return -EINVAL;
12046
12047         ret = kvm_page_track_init(kvm);
12048         if (ret)
12049                 goto out;
12050
12051         ret = kvm_mmu_init_vm(kvm);
12052         if (ret)
12053                 goto out_page_track;
12054
12055         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
12056         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
12057         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
12058
12059         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
12060         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
12061         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
12062         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
12063                 &kvm->arch.irq_sources_bitmap);
12064
12065         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
12066         mutex_init(&kvm->arch.apic_map_lock);
12067         seqcount_raw_spinlock_init(&kvm->arch.pvclock_sc, &kvm->arch.tsc_write_lock);
12068         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
12069
12070         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
12071         pvclock_update_vm_gtod_copy(kvm);
12072         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
12073
12074         kvm->arch.default_tsc_khz = max_tsc_khz ? : tsc_khz;
12075         kvm->arch.guest_can_read_msr_platform_info = true;
12076         kvm->arch.enable_pmu = enable_pmu;
12077
12078 #if IS_ENABLED(CONFIG_HYPERV)
12079         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
12080         kvm->arch.hv_root_tdp = INVALID_PAGE;
12081 #endif
12082
12083         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
12084         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
12085
12086         kvm_apicv_init(kvm);
12087         kvm_hv_init_vm(kvm);
12088         kvm_xen_init_vm(kvm);
12089
12090         return static_call(kvm_x86_vm_init)(kvm);
12091
12092 out_page_track:
12093         kvm_page_track_cleanup(kvm);
12094 out:
12095         return ret;
12096 }
12097
12098 int kvm_arch_post_init_vm(struct kvm *kvm)
12099 {
12100         return kvm_mmu_post_init_vm(kvm);
12101 }
12102
12103 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
12104 {
12105         vcpu_load(vcpu);
12106         kvm_mmu_unload(vcpu);
12107         vcpu_put(vcpu);
12108 }
12109
12110 static void kvm_unload_vcpu_mmus(struct kvm *kvm)
12111 {
12112         unsigned long i;
12113         struct kvm_vcpu *vcpu;
12114
12115         kvm_for_each_vcpu(i, vcpu, kvm) {
12116                 kvm_clear_async_pf_completion_queue(vcpu);
12117                 kvm_unload_vcpu_mmu(vcpu);
12118         }
12119 }
12120
12121 void kvm_arch_sync_events(struct kvm *kvm)
12122 {
12123         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
12124         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
12125         kvm_free_pit(kvm);
12126 }
12127
12128 /**
12129  * __x86_set_memory_region: Setup KVM internal memory slot
12130  *
12131  * @kvm: the kvm pointer to the VM.
12132  * @id: the slot ID to setup.
12133  * @gpa: the GPA to install the slot (unused when @size == 0).
12134  * @size: the size of the slot. Set to zero to uninstall a slot.
12135  *
12136  * This function helps to setup a KVM internal memory slot.  Specify
12137  * @size > 0 to install a new slot, while @size == 0 to uninstall a
12138  * slot.  The return code can be one of the following:
12139  *
12140  *   HVA:           on success (uninstall will return a bogus HVA)
12141  *   -errno:        on error
12142  *
12143  * The caller should always use IS_ERR() to check the return value
12144  * before use.  Note, the KVM internal memory slots are guaranteed to
12145  * remain valid and unchanged until the VM is destroyed, i.e., the
12146  * GPA->HVA translation will not change.  However, the HVA is a user
12147  * address, i.e. its accessibility is not guaranteed, and must be
12148  * accessed via __copy_{to,from}_user().
12149  */
12150 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
12151                                       u32 size)
12152 {
12153         int i, r;
12154         unsigned long hva, old_npages;
12155         struct kvm_memslots *slots = kvm_memslots(kvm);
12156         struct kvm_memory_slot *slot;
12157
12158         /* Called with kvm->slots_lock held.  */
12159         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
12160                 return ERR_PTR_USR(-EINVAL);
12161
12162         slot = id_to_memslot(slots, id);
12163         if (size) {
12164                 if (slot && slot->npages)
12165                         return ERR_PTR_USR(-EEXIST);
12166
12167                 /*
12168                  * MAP_SHARED to prevent internal slot pages from being moved
12169                  * by fork()/COW.
12170                  */
12171                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
12172                               MAP_SHARED | MAP_ANONYMOUS, 0);
12173                 if (IS_ERR((void *)hva))
12174                         return (void __user *)hva;
12175         } else {
12176                 if (!slot || !slot->npages)
12177                         return NULL;
12178
12179                 old_npages = slot->npages;
12180                 hva = slot->userspace_addr;
12181         }
12182
12183         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
12184                 struct kvm_userspace_memory_region m;
12185
12186                 m.slot = id | (i << 16);
12187                 m.flags = 0;
12188                 m.guest_phys_addr = gpa;
12189                 m.userspace_addr = hva;
12190                 m.memory_size = size;
12191                 r = __kvm_set_memory_region(kvm, &m);
12192                 if (r < 0)
12193                         return ERR_PTR_USR(r);
12194         }
12195
12196         if (!size)
12197                 vm_munmap(hva, old_npages * PAGE_SIZE);
12198
12199         return (void __user *)hva;
12200 }
12201 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
12202
12203 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
12204 {
12205         kvm_mmu_pre_destroy_vm(kvm);
12206 }
12207
12208 void kvm_arch_destroy_vm(struct kvm *kvm)
12209 {
12210         if (current->mm == kvm->mm) {
12211                 /*
12212                  * Free memory regions allocated on behalf of userspace,
12213                  * unless the memory map has changed due to process exit
12214                  * or fd copying.
12215                  */
12216                 mutex_lock(&kvm->slots_lock);
12217                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
12218                                         0, 0);
12219                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
12220                                         0, 0);
12221                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
12222                 mutex_unlock(&kvm->slots_lock);
12223         }
12224         kvm_unload_vcpu_mmus(kvm);
12225         static_call_cond(kvm_x86_vm_destroy)(kvm);
12226         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
12227         kvm_pic_destroy(kvm);
12228         kvm_ioapic_destroy(kvm);
12229         kvm_destroy_vcpus(kvm);
12230         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
12231         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
12232         kvm_mmu_uninit_vm(kvm);
12233         kvm_page_track_cleanup(kvm);
12234         kvm_xen_destroy_vm(kvm);
12235         kvm_hv_destroy_vm(kvm);
12236 }
12237
12238 static void memslot_rmap_free(struct kvm_memory_slot *slot)
12239 {
12240         int i;
12241
12242         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
12243                 kvfree(slot->arch.rmap[i]);
12244                 slot->arch.rmap[i] = NULL;
12245         }
12246 }
12247
12248 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
12249 {
12250         int i;
12251
12252         memslot_rmap_free(slot);
12253
12254         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12255                 kvfree(slot->arch.lpage_info[i - 1]);
12256                 slot->arch.lpage_info[i - 1] = NULL;
12257         }
12258
12259         kvm_page_track_free_memslot(slot);
12260 }
12261
12262 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages)
12263 {
12264         const int sz = sizeof(*slot->arch.rmap[0]);
12265         int i;
12266
12267         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
12268                 int level = i + 1;
12269                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
12270
12271                 if (slot->arch.rmap[i])
12272                         continue;
12273
12274                 slot->arch.rmap[i] = __vcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
12275                 if (!slot->arch.rmap[i]) {
12276                         memslot_rmap_free(slot);
12277                         return -ENOMEM;
12278                 }
12279         }
12280
12281         return 0;
12282 }
12283
12284 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
12285                                       struct kvm_memory_slot *slot)
12286 {
12287         unsigned long npages = slot->npages;
12288         int i, r;
12289
12290         /*
12291          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
12292          * old arrays will be freed by __kvm_set_memory_region() if installing
12293          * the new memslot is successful.
12294          */
12295         memset(&slot->arch, 0, sizeof(slot->arch));
12296
12297         if (kvm_memslots_have_rmaps(kvm)) {
12298                 r = memslot_rmap_alloc(slot, npages);
12299                 if (r)
12300                         return r;
12301         }
12302
12303         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12304                 struct kvm_lpage_info *linfo;
12305                 unsigned long ugfn;
12306                 int lpages;
12307                 int level = i + 1;
12308
12309                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
12310
12311                 linfo = __vcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
12312                 if (!linfo)
12313                         goto out_free;
12314
12315                 slot->arch.lpage_info[i - 1] = linfo;
12316
12317                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
12318                         linfo[0].disallow_lpage = 1;
12319                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
12320                         linfo[lpages - 1].disallow_lpage = 1;
12321                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
12322                 /*
12323                  * If the gfn and userspace address are not aligned wrt each
12324                  * other, disable large page support for this slot.
12325                  */
12326                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
12327                         unsigned long j;
12328
12329                         for (j = 0; j < lpages; ++j)
12330                                 linfo[j].disallow_lpage = 1;
12331                 }
12332         }
12333
12334         if (kvm_page_track_create_memslot(kvm, slot, npages))
12335                 goto out_free;
12336
12337         return 0;
12338
12339 out_free:
12340         memslot_rmap_free(slot);
12341
12342         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12343                 kvfree(slot->arch.lpage_info[i - 1]);
12344                 slot->arch.lpage_info[i - 1] = NULL;
12345         }
12346         return -ENOMEM;
12347 }
12348
12349 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
12350 {
12351         struct kvm_vcpu *vcpu;
12352         unsigned long i;
12353
12354         /*
12355          * memslots->generation has been incremented.
12356          * mmio generation may have reached its maximum value.
12357          */
12358         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
12359
12360         /* Force re-initialization of steal_time cache */
12361         kvm_for_each_vcpu(i, vcpu, kvm)
12362                 kvm_vcpu_kick(vcpu);
12363 }
12364
12365 int kvm_arch_prepare_memory_region(struct kvm *kvm,
12366                                    const struct kvm_memory_slot *old,
12367                                    struct kvm_memory_slot *new,
12368                                    enum kvm_mr_change change)
12369 {
12370         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE) {
12371                 if ((new->base_gfn + new->npages - 1) > kvm_mmu_max_gfn())
12372                         return -EINVAL;
12373
12374                 return kvm_alloc_memslot_metadata(kvm, new);
12375         }
12376
12377         if (change == KVM_MR_FLAGS_ONLY)
12378                 memcpy(&new->arch, &old->arch, sizeof(old->arch));
12379         else if (WARN_ON_ONCE(change != KVM_MR_DELETE))
12380                 return -EIO;
12381
12382         return 0;
12383 }
12384
12385
12386 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
12387 {
12388         struct kvm_arch *ka = &kvm->arch;
12389
12390         if (!kvm_x86_ops.cpu_dirty_log_size)
12391                 return;
12392
12393         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
12394             (!enable && --ka->cpu_dirty_logging_count == 0))
12395                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
12396
12397         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
12398 }
12399
12400 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
12401                                      struct kvm_memory_slot *old,
12402                                      const struct kvm_memory_slot *new,
12403                                      enum kvm_mr_change change)
12404 {
12405         u32 old_flags = old ? old->flags : 0;
12406         u32 new_flags = new ? new->flags : 0;
12407         bool log_dirty_pages = new_flags & KVM_MEM_LOG_DIRTY_PAGES;
12408
12409         /*
12410          * Update CPU dirty logging if dirty logging is being toggled.  This
12411          * applies to all operations.
12412          */
12413         if ((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)
12414                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
12415
12416         /*
12417          * Nothing more to do for RO slots (which can't be dirtied and can't be
12418          * made writable) or CREATE/MOVE/DELETE of a slot.
12419          *
12420          * For a memslot with dirty logging disabled:
12421          * CREATE:      No dirty mappings will already exist.
12422          * MOVE/DELETE: The old mappings will already have been cleaned up by
12423          *              kvm_arch_flush_shadow_memslot()
12424          *
12425          * For a memslot with dirty logging enabled:
12426          * CREATE:      No shadow pages exist, thus nothing to write-protect
12427          *              and no dirty bits to clear.
12428          * MOVE/DELETE: The old mappings will already have been cleaned up by
12429          *              kvm_arch_flush_shadow_memslot().
12430          */
12431         if ((change != KVM_MR_FLAGS_ONLY) || (new_flags & KVM_MEM_READONLY))
12432                 return;
12433
12434         /*
12435          * READONLY and non-flags changes were filtered out above, and the only
12436          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
12437          * logging isn't being toggled on or off.
12438          */
12439         if (WARN_ON_ONCE(!((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)))
12440                 return;
12441
12442         if (!log_dirty_pages) {
12443                 /*
12444                  * Dirty logging tracks sptes in 4k granularity, meaning that
12445                  * large sptes have to be split.  If live migration succeeds,
12446                  * the guest in the source machine will be destroyed and large
12447                  * sptes will be created in the destination.  However, if the
12448                  * guest continues to run in the source machine (for example if
12449                  * live migration fails), small sptes will remain around and
12450                  * cause bad performance.
12451                  *
12452                  * Scan sptes if dirty logging has been stopped, dropping those
12453                  * which can be collapsed into a single large-page spte.  Later
12454                  * page faults will create the large-page sptes.
12455                  */
12456                 kvm_mmu_zap_collapsible_sptes(kvm, new);
12457         } else {
12458                 /*
12459                  * Initially-all-set does not require write protecting any page,
12460                  * because they're all assumed to be dirty.
12461                  */
12462                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
12463                         return;
12464
12465                 if (READ_ONCE(eager_page_split))
12466                         kvm_mmu_slot_try_split_huge_pages(kvm, new, PG_LEVEL_4K);
12467
12468                 if (kvm_x86_ops.cpu_dirty_log_size) {
12469                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
12470                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
12471                 } else {
12472                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
12473                 }
12474         }
12475 }
12476
12477 void kvm_arch_commit_memory_region(struct kvm *kvm,
12478                                 struct kvm_memory_slot *old,
12479                                 const struct kvm_memory_slot *new,
12480                                 enum kvm_mr_change change)
12481 {
12482         if (!kvm->arch.n_requested_mmu_pages &&
12483             (change == KVM_MR_CREATE || change == KVM_MR_DELETE)) {
12484                 unsigned long nr_mmu_pages;
12485
12486                 nr_mmu_pages = kvm->nr_memslot_pages / KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO;
12487                 nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES);
12488                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
12489         }
12490
12491         kvm_mmu_slot_apply_flags(kvm, old, new, change);
12492
12493         /* Free the arrays associated with the old memslot. */
12494         if (change == KVM_MR_MOVE)
12495                 kvm_arch_free_memslot(kvm, old);
12496 }
12497
12498 void kvm_arch_flush_shadow_all(struct kvm *kvm)
12499 {
12500         kvm_mmu_zap_all(kvm);
12501 }
12502
12503 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
12504                                    struct kvm_memory_slot *slot)
12505 {
12506         kvm_page_track_flush_slot(kvm, slot);
12507 }
12508
12509 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
12510 {
12511         return (is_guest_mode(vcpu) &&
12512                 static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
12513 }
12514
12515 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
12516 {
12517         if (!list_empty_careful(&vcpu->async_pf.done))
12518                 return true;
12519
12520         if (kvm_apic_has_events(vcpu))
12521                 return true;
12522
12523         if (vcpu->arch.pv.pv_unhalted)
12524                 return true;
12525
12526         if (vcpu->arch.exception.pending)
12527                 return true;
12528
12529         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12530             (vcpu->arch.nmi_pending &&
12531              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
12532                 return true;
12533
12534         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
12535             (vcpu->arch.smi_pending &&
12536              static_call(kvm_x86_smi_allowed)(vcpu, false)))
12537                 return true;
12538
12539         if (kvm_arch_interrupt_allowed(vcpu) &&
12540             (kvm_cpu_has_interrupt(vcpu) ||
12541             kvm_guest_apic_has_interrupt(vcpu)))
12542                 return true;
12543
12544         if (kvm_hv_has_stimer_pending(vcpu))
12545                 return true;
12546
12547         if (is_guest_mode(vcpu) &&
12548             kvm_x86_ops.nested_ops->hv_timer_pending &&
12549             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
12550                 return true;
12551
12552         if (kvm_xen_has_pending_events(vcpu))
12553                 return true;
12554
12555         if (kvm_test_request(KVM_REQ_TRIPLE_FAULT, vcpu))
12556                 return true;
12557
12558         return false;
12559 }
12560
12561 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
12562 {
12563         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
12564 }
12565
12566 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
12567 {
12568         if (kvm_vcpu_apicv_active(vcpu) &&
12569             static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
12570                 return true;
12571
12572         return false;
12573 }
12574
12575 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
12576 {
12577         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
12578                 return true;
12579
12580         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12581                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
12582                  kvm_test_request(KVM_REQ_EVENT, vcpu))
12583                 return true;
12584
12585         return kvm_arch_dy_has_pending_interrupt(vcpu);
12586 }
12587
12588 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
12589 {
12590         if (vcpu->arch.guest_state_protected)
12591                 return true;
12592
12593         return vcpu->arch.preempted_in_kernel;
12594 }
12595
12596 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu *vcpu)
12597 {
12598         return kvm_rip_read(vcpu);
12599 }
12600
12601 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
12602 {
12603         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
12604 }
12605
12606 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
12607 {
12608         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
12609 }
12610
12611 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
12612 {
12613         /* Can't read the RIP when guest state is protected, just return 0 */
12614         if (vcpu->arch.guest_state_protected)
12615                 return 0;
12616
12617         if (is_64_bit_mode(vcpu))
12618                 return kvm_rip_read(vcpu);
12619         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12620                      kvm_rip_read(vcpu));
12621 }
12622 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12623
12624 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12625 {
12626         return kvm_get_linear_rip(vcpu) == linear_rip;
12627 }
12628 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12629
12630 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12631 {
12632         unsigned long rflags;
12633
12634         rflags = static_call(kvm_x86_get_rflags)(vcpu);
12635         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12636                 rflags &= ~X86_EFLAGS_TF;
12637         return rflags;
12638 }
12639 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12640
12641 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12642 {
12643         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12644             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12645                 rflags |= X86_EFLAGS_TF;
12646         static_call(kvm_x86_set_rflags)(vcpu, rflags);
12647 }
12648
12649 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12650 {
12651         __kvm_set_rflags(vcpu, rflags);
12652         kvm_make_request(KVM_REQ_EVENT, vcpu);
12653 }
12654 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12655
12656 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12657 {
12658         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12659
12660         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12661 }
12662
12663 static inline u32 kvm_async_pf_next_probe(u32 key)
12664 {
12665         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12666 }
12667
12668 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12669 {
12670         u32 key = kvm_async_pf_hash_fn(gfn);
12671
12672         while (vcpu->arch.apf.gfns[key] != ~0)
12673                 key = kvm_async_pf_next_probe(key);
12674
12675         vcpu->arch.apf.gfns[key] = gfn;
12676 }
12677
12678 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12679 {
12680         int i;
12681         u32 key = kvm_async_pf_hash_fn(gfn);
12682
12683         for (i = 0; i < ASYNC_PF_PER_VCPU &&
12684                      (vcpu->arch.apf.gfns[key] != gfn &&
12685                       vcpu->arch.apf.gfns[key] != ~0); i++)
12686                 key = kvm_async_pf_next_probe(key);
12687
12688         return key;
12689 }
12690
12691 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12692 {
12693         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12694 }
12695
12696 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12697 {
12698         u32 i, j, k;
12699
12700         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12701
12702         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12703                 return;
12704
12705         while (true) {
12706                 vcpu->arch.apf.gfns[i] = ~0;
12707                 do {
12708                         j = kvm_async_pf_next_probe(j);
12709                         if (vcpu->arch.apf.gfns[j] == ~0)
12710                                 return;
12711                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12712                         /*
12713                          * k lies cyclically in ]i,j]
12714                          * |    i.k.j |
12715                          * |....j i.k.| or  |.k..j i...|
12716                          */
12717                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12718                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12719                 i = j;
12720         }
12721 }
12722
12723 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12724 {
12725         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12726
12727         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12728                                       sizeof(reason));
12729 }
12730
12731 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12732 {
12733         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12734
12735         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12736                                              &token, offset, sizeof(token));
12737 }
12738
12739 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12740 {
12741         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12742         u32 val;
12743
12744         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12745                                          &val, offset, sizeof(val)))
12746                 return false;
12747
12748         return !val;
12749 }
12750
12751 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12752 {
12753
12754         if (!kvm_pv_async_pf_enabled(vcpu))
12755                 return false;
12756
12757         if (vcpu->arch.apf.send_user_only &&
12758             static_call(kvm_x86_get_cpl)(vcpu) == 0)
12759                 return false;
12760
12761         if (is_guest_mode(vcpu)) {
12762                 /*
12763                  * L1 needs to opt into the special #PF vmexits that are
12764                  * used to deliver async page faults.
12765                  */
12766                 return vcpu->arch.apf.delivery_as_pf_vmexit;
12767         } else {
12768                 /*
12769                  * Play it safe in case the guest temporarily disables paging.
12770                  * The real mode IDT in particular is unlikely to have a #PF
12771                  * exception setup.
12772                  */
12773                 return is_paging(vcpu);
12774         }
12775 }
12776
12777 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12778 {
12779         if (unlikely(!lapic_in_kernel(vcpu) ||
12780                      kvm_event_needs_reinjection(vcpu) ||
12781                      vcpu->arch.exception.pending))
12782                 return false;
12783
12784         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12785                 return false;
12786
12787         /*
12788          * If interrupts are off we cannot even use an artificial
12789          * halt state.
12790          */
12791         return kvm_arch_interrupt_allowed(vcpu);
12792 }
12793
12794 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12795                                      struct kvm_async_pf *work)
12796 {
12797         struct x86_exception fault;
12798
12799         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12800         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12801
12802         if (kvm_can_deliver_async_pf(vcpu) &&
12803             !apf_put_user_notpresent(vcpu)) {
12804                 fault.vector = PF_VECTOR;
12805                 fault.error_code_valid = true;
12806                 fault.error_code = 0;
12807                 fault.nested_page_fault = false;
12808                 fault.address = work->arch.token;
12809                 fault.async_page_fault = true;
12810                 kvm_inject_page_fault(vcpu, &fault);
12811                 return true;
12812         } else {
12813                 /*
12814                  * It is not possible to deliver a paravirtualized asynchronous
12815                  * page fault, but putting the guest in an artificial halt state
12816                  * can be beneficial nevertheless: if an interrupt arrives, we
12817                  * can deliver it timely and perhaps the guest will schedule
12818                  * another process.  When the instruction that triggered a page
12819                  * fault is retried, hopefully the page will be ready in the host.
12820                  */
12821                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12822                 return false;
12823         }
12824 }
12825
12826 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12827                                  struct kvm_async_pf *work)
12828 {
12829         struct kvm_lapic_irq irq = {
12830                 .delivery_mode = APIC_DM_FIXED,
12831                 .vector = vcpu->arch.apf.vec
12832         };
12833
12834         if (work->wakeup_all)
12835                 work->arch.token = ~0; /* broadcast wakeup */
12836         else
12837                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12838         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12839
12840         if ((work->wakeup_all || work->notpresent_injected) &&
12841             kvm_pv_async_pf_enabled(vcpu) &&
12842             !apf_put_user_ready(vcpu, work->arch.token)) {
12843                 vcpu->arch.apf.pageready_pending = true;
12844                 kvm_apic_set_irq(vcpu, &irq, NULL);
12845         }
12846
12847         vcpu->arch.apf.halted = false;
12848         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12849 }
12850
12851 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12852 {
12853         kvm_make_request(KVM_REQ_APF_READY, vcpu);
12854         if (!vcpu->arch.apf.pageready_pending)
12855                 kvm_vcpu_kick(vcpu);
12856 }
12857
12858 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12859 {
12860         if (!kvm_pv_async_pf_enabled(vcpu))
12861                 return true;
12862         else
12863                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12864 }
12865
12866 void kvm_arch_start_assignment(struct kvm *kvm)
12867 {
12868         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12869                 static_call_cond(kvm_x86_pi_start_assignment)(kvm);
12870 }
12871 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12872
12873 void kvm_arch_end_assignment(struct kvm *kvm)
12874 {
12875         atomic_dec(&kvm->arch.assigned_device_count);
12876 }
12877 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12878
12879 bool noinstr kvm_arch_has_assigned_device(struct kvm *kvm)
12880 {
12881         return arch_atomic_read(&kvm->arch.assigned_device_count);
12882 }
12883 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12884
12885 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12886 {
12887         atomic_inc(&kvm->arch.noncoherent_dma_count);
12888 }
12889 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12890
12891 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12892 {
12893         atomic_dec(&kvm->arch.noncoherent_dma_count);
12894 }
12895 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12896
12897 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12898 {
12899         return atomic_read(&kvm->arch.noncoherent_dma_count);
12900 }
12901 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12902
12903 bool kvm_arch_has_irq_bypass(void)
12904 {
12905         return true;
12906 }
12907
12908 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12909                                       struct irq_bypass_producer *prod)
12910 {
12911         struct kvm_kernel_irqfd *irqfd =
12912                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12913         int ret;
12914
12915         irqfd->producer = prod;
12916         kvm_arch_start_assignment(irqfd->kvm);
12917         ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm,
12918                                          prod->irq, irqfd->gsi, 1);
12919
12920         if (ret)
12921                 kvm_arch_end_assignment(irqfd->kvm);
12922
12923         return ret;
12924 }
12925
12926 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12927                                       struct irq_bypass_producer *prod)
12928 {
12929         int ret;
12930         struct kvm_kernel_irqfd *irqfd =
12931                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12932
12933         WARN_ON(irqfd->producer != prod);
12934         irqfd->producer = NULL;
12935
12936         /*
12937          * When producer of consumer is unregistered, we change back to
12938          * remapped mode, so we can re-use the current implementation
12939          * when the irq is masked/disabled or the consumer side (KVM
12940          * int this case doesn't want to receive the interrupts.
12941         */
12942         ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12943         if (ret)
12944                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12945                        " fails: %d\n", irqfd->consumer.token, ret);
12946
12947         kvm_arch_end_assignment(irqfd->kvm);
12948 }
12949
12950 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12951                                    uint32_t guest_irq, bool set)
12952 {
12953         return static_call(kvm_x86_pi_update_irte)(kvm, host_irq, guest_irq, set);
12954 }
12955
12956 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
12957                                   struct kvm_kernel_irq_routing_entry *new)
12958 {
12959         if (new->type != KVM_IRQ_ROUTING_MSI)
12960                 return true;
12961
12962         return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
12963 }
12964
12965 bool kvm_vector_hashing_enabled(void)
12966 {
12967         return vector_hashing;
12968 }
12969
12970 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12971 {
12972         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12973 }
12974 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12975
12976
12977 int kvm_spec_ctrl_test_value(u64 value)
12978 {
12979         /*
12980          * test that setting IA32_SPEC_CTRL to given value
12981          * is allowed by the host processor
12982          */
12983
12984         u64 saved_value;
12985         unsigned long flags;
12986         int ret = 0;
12987
12988         local_irq_save(flags);
12989
12990         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12991                 ret = 1;
12992         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12993                 ret = 1;
12994         else
12995                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12996
12997         local_irq_restore(flags);
12998
12999         return ret;
13000 }
13001 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
13002
13003 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
13004 {
13005         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
13006         struct x86_exception fault;
13007         u64 access = error_code &
13008                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
13009
13010         if (!(error_code & PFERR_PRESENT_MASK) ||
13011             mmu->gva_to_gpa(vcpu, mmu, gva, access, &fault) != INVALID_GPA) {
13012                 /*
13013                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
13014                  * tables probably do not match the TLB.  Just proceed
13015                  * with the error code that the processor gave.
13016                  */
13017                 fault.vector = PF_VECTOR;
13018                 fault.error_code_valid = true;
13019                 fault.error_code = error_code;
13020                 fault.nested_page_fault = false;
13021                 fault.address = gva;
13022         }
13023         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
13024 }
13025 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
13026
13027 /*
13028  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
13029  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
13030  * indicates whether exit to userspace is needed.
13031  */
13032 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
13033                               struct x86_exception *e)
13034 {
13035         if (r == X86EMUL_PROPAGATE_FAULT) {
13036                 kvm_inject_emulated_page_fault(vcpu, e);
13037                 return 1;
13038         }
13039
13040         /*
13041          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
13042          * while handling a VMX instruction KVM could've handled the request
13043          * correctly by exiting to userspace and performing I/O but there
13044          * doesn't seem to be a real use-case behind such requests, just return
13045          * KVM_EXIT_INTERNAL_ERROR for now.
13046          */
13047         kvm_prepare_emulation_failure_exit(vcpu);
13048
13049         return 0;
13050 }
13051 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
13052
13053 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
13054 {
13055         bool pcid_enabled;
13056         struct x86_exception e;
13057         struct {
13058                 u64 pcid;
13059                 u64 gla;
13060         } operand;
13061         int r;
13062
13063         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
13064         if (r != X86EMUL_CONTINUE)
13065                 return kvm_handle_memory_failure(vcpu, r, &e);
13066
13067         if (operand.pcid >> 12 != 0) {
13068                 kvm_inject_gp(vcpu, 0);
13069                 return 1;
13070         }
13071
13072         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
13073
13074         switch (type) {
13075         case INVPCID_TYPE_INDIV_ADDR:
13076                 if ((!pcid_enabled && (operand.pcid != 0)) ||
13077                     is_noncanonical_address(operand.gla, vcpu)) {
13078                         kvm_inject_gp(vcpu, 0);
13079                         return 1;
13080                 }
13081                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
13082                 return kvm_skip_emulated_instruction(vcpu);
13083
13084         case INVPCID_TYPE_SINGLE_CTXT:
13085                 if (!pcid_enabled && (operand.pcid != 0)) {
13086                         kvm_inject_gp(vcpu, 0);
13087                         return 1;
13088                 }
13089
13090                 kvm_invalidate_pcid(vcpu, operand.pcid);
13091                 return kvm_skip_emulated_instruction(vcpu);
13092
13093         case INVPCID_TYPE_ALL_NON_GLOBAL:
13094                 /*
13095                  * Currently, KVM doesn't mark global entries in the shadow
13096                  * page tables, so a non-global flush just degenerates to a
13097                  * global flush. If needed, we could optimize this later by
13098                  * keeping track of global entries in shadow page tables.
13099                  */
13100
13101                 fallthrough;
13102         case INVPCID_TYPE_ALL_INCL_GLOBAL:
13103                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
13104                 return kvm_skip_emulated_instruction(vcpu);
13105
13106         default:
13107                 kvm_inject_gp(vcpu, 0);
13108                 return 1;
13109         }
13110 }
13111 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
13112
13113 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
13114 {
13115         struct kvm_run *run = vcpu->run;
13116         struct kvm_mmio_fragment *frag;
13117         unsigned int len;
13118
13119         BUG_ON(!vcpu->mmio_needed);
13120
13121         /* Complete previous fragment */
13122         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
13123         len = min(8u, frag->len);
13124         if (!vcpu->mmio_is_write)
13125                 memcpy(frag->data, run->mmio.data, len);
13126
13127         if (frag->len <= 8) {
13128                 /* Switch to the next fragment. */
13129                 frag++;
13130                 vcpu->mmio_cur_fragment++;
13131         } else {
13132                 /* Go forward to the next mmio piece. */
13133                 frag->data += len;
13134                 frag->gpa += len;
13135                 frag->len -= len;
13136         }
13137
13138         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
13139                 vcpu->mmio_needed = 0;
13140
13141                 // VMG change, at this point, we're always done
13142                 // RIP has already been advanced
13143                 return 1;
13144         }
13145
13146         // More MMIO is needed
13147         run->mmio.phys_addr = frag->gpa;
13148         run->mmio.len = min(8u, frag->len);
13149         run->mmio.is_write = vcpu->mmio_is_write;
13150         if (run->mmio.is_write)
13151                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
13152         run->exit_reason = KVM_EXIT_MMIO;
13153
13154         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
13155
13156         return 0;
13157 }
13158
13159 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
13160                           void *data)
13161 {
13162         int handled;
13163         struct kvm_mmio_fragment *frag;
13164
13165         if (!data)
13166                 return -EINVAL;
13167
13168         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
13169         if (handled == bytes)
13170                 return 1;
13171
13172         bytes -= handled;
13173         gpa += handled;
13174         data += handled;
13175
13176         /*TODO: Check if need to increment number of frags */
13177         frag = vcpu->mmio_fragments;
13178         vcpu->mmio_nr_fragments = 1;
13179         frag->len = bytes;
13180         frag->gpa = gpa;
13181         frag->data = data;
13182
13183         vcpu->mmio_needed = 1;
13184         vcpu->mmio_cur_fragment = 0;
13185
13186         vcpu->run->mmio.phys_addr = gpa;
13187         vcpu->run->mmio.len = min(8u, frag->len);
13188         vcpu->run->mmio.is_write = 1;
13189         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
13190         vcpu->run->exit_reason = KVM_EXIT_MMIO;
13191
13192         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
13193
13194         return 0;
13195 }
13196 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
13197
13198 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
13199                          void *data)
13200 {
13201         int handled;
13202         struct kvm_mmio_fragment *frag;
13203
13204         if (!data)
13205                 return -EINVAL;
13206
13207         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
13208         if (handled == bytes)
13209                 return 1;
13210
13211         bytes -= handled;
13212         gpa += handled;
13213         data += handled;
13214
13215         /*TODO: Check if need to increment number of frags */
13216         frag = vcpu->mmio_fragments;
13217         vcpu->mmio_nr_fragments = 1;
13218         frag->len = bytes;
13219         frag->gpa = gpa;
13220         frag->data = data;
13221
13222         vcpu->mmio_needed = 1;
13223         vcpu->mmio_cur_fragment = 0;
13224
13225         vcpu->run->mmio.phys_addr = gpa;
13226         vcpu->run->mmio.len = min(8u, frag->len);
13227         vcpu->run->mmio.is_write = 0;
13228         vcpu->run->exit_reason = KVM_EXIT_MMIO;
13229
13230         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
13231
13232         return 0;
13233 }
13234 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
13235
13236 static void advance_sev_es_emulated_pio(struct kvm_vcpu *vcpu, unsigned count, int size)
13237 {
13238         vcpu->arch.sev_pio_count -= count;
13239         vcpu->arch.sev_pio_data += count * size;
13240 }
13241
13242 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
13243                            unsigned int port);
13244
13245 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
13246 {
13247         int size = vcpu->arch.pio.size;
13248         int port = vcpu->arch.pio.port;
13249
13250         vcpu->arch.pio.count = 0;
13251         if (vcpu->arch.sev_pio_count)
13252                 return kvm_sev_es_outs(vcpu, size, port);
13253         return 1;
13254 }
13255
13256 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
13257                            unsigned int port)
13258 {
13259         for (;;) {
13260                 unsigned int count =
13261                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
13262                 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
13263
13264                 /* memcpy done already by emulator_pio_out.  */
13265                 advance_sev_es_emulated_pio(vcpu, count, size);
13266                 if (!ret)
13267                         break;
13268
13269                 /* Emulation done by the kernel.  */
13270                 if (!vcpu->arch.sev_pio_count)
13271                         return 1;
13272         }
13273
13274         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
13275         return 0;
13276 }
13277
13278 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
13279                           unsigned int port);
13280
13281 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
13282 {
13283         unsigned count = vcpu->arch.pio.count;
13284         int size = vcpu->arch.pio.size;
13285         int port = vcpu->arch.pio.port;
13286
13287         complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
13288         advance_sev_es_emulated_pio(vcpu, count, size);
13289         if (vcpu->arch.sev_pio_count)
13290                 return kvm_sev_es_ins(vcpu, size, port);
13291         return 1;
13292 }
13293
13294 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
13295                           unsigned int port)
13296 {
13297         for (;;) {
13298                 unsigned int count =
13299                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
13300                 if (!emulator_pio_in(vcpu, size, port, vcpu->arch.sev_pio_data, count))
13301                         break;
13302
13303                 /* Emulation done by the kernel.  */
13304                 advance_sev_es_emulated_pio(vcpu, count, size);
13305                 if (!vcpu->arch.sev_pio_count)
13306                         return 1;
13307         }
13308
13309         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
13310         return 0;
13311 }
13312
13313 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
13314                          unsigned int port, void *data,  unsigned int count,
13315                          int in)
13316 {
13317         vcpu->arch.sev_pio_data = data;
13318         vcpu->arch.sev_pio_count = count;
13319         return in ? kvm_sev_es_ins(vcpu, size, port)
13320                   : kvm_sev_es_outs(vcpu, size, port);
13321 }
13322 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
13323
13324 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
13325 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
13326 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
13327 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
13328 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
13329 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
13330 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
13331 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
13332 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
13333 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
13334 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
13335 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
13336 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
13337 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
13338 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
13339 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
13340 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
13341 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
13342 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
13343 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
13344 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
13345 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
13346 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_kick_vcpu_slowpath);
13347 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_doorbell);
13348 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq);
13349 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
13350 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
13351 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
13352 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);
13353
13354 static int __init kvm_x86_init(void)
13355 {
13356         kvm_mmu_x86_module_init();
13357         return 0;
13358 }
13359 module_init(kvm_x86_init);
13360
13361 static void __exit kvm_x86_exit(void)
13362 {
13363         /*
13364          * If module_init() is implemented, module_exit() must also be
13365          * implemented to allow module unload.
13366          */
13367 }
13368 module_exit(kvm_x86_exit);