sys/dev/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <drm/drmP.h>
  28 #include <drm/drm_crtc.h>
  29 #include <drm/drm_crtc_helper.h>
  30 #include <drm/drm_edid.h>
  31 #include "intel_drv.h"
  32 #include <drm/i915_drm.h>
  33 #include "i915_drv.h"
  34
  35 /* Here's the desired hotplug mode */
  36 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  37                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  38                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  39                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  40                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  41                            ADPA_CRT_HOTPLUG_ENABLE)
  42
  43 struct intel_crt {
  44         struct intel_encoder base;
  45         /* DPMS state is stored in the connector, which we need in the
  46          * encoder's enable/disable callbacks */
  47         struct intel_connector *connector;
  48         bool force_hotplug_required;
  49         u32 adpa_reg;
  50 };
  51
  52 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  53 {
  54         return container_of(intel_attached_encoder(connector),
  55                             struct intel_crt, base);
  56 }
  57
  58 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  59 {
  60         return container_of(encoder, struct intel_crt, base);
  61 }
  62
  63 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  64                                    enum i915_pipe *pipe)
  65 {
  66         struct drm_device *dev = encoder->base.dev;
  67         struct drm_i915_private *dev_priv = dev->dev_private;
  68         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  69         u32 tmp;
  70
  71         tmp = I915_READ(crt->adpa_reg);
  72
  73         if (!(tmp & ADPA_DAC_ENABLE))
  74                 return false;
  75
  76         if (HAS_PCH_CPT(dev))
  77                 *pipe = PORT_TO_PIPE_CPT(tmp);
  78         else
  79                 *pipe = PORT_TO_PIPE(tmp);
  80
  81         return true;
  82 }
  83
  84 /* Note: The caller is required to filter out dpms modes not supported by the
  85  * platform. */
  86 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
  87 {
  88         struct drm_device *dev = encoder->base.dev;
  89         struct drm_i915_private *dev_priv = dev->dev_private;
  90         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  91         u32 temp;
  92
  93         temp = I915_READ(crt->adpa_reg);
  94         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  95         temp &= ~ADPA_DAC_ENABLE;
  96
  97         switch (mode) {
  98         case DRM_MODE_DPMS_ON:
  99                 temp |= ADPA_DAC_ENABLE;
 100                 break;
 101         case DRM_MODE_DPMS_STANDBY:
 102                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 103                 break;
 104         case DRM_MODE_DPMS_SUSPEND:
 105                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 106                 break;
 107         case DRM_MODE_DPMS_OFF:
 108                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 109                 break;
 110         }
 111
 112         I915_WRITE(crt->adpa_reg, temp);
 113 }
 114
 115 static void intel_disable_crt(struct intel_encoder *encoder)
 116 {
 117         intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
 118 }
 119
 120 static void intel_enable_crt(struct intel_encoder *encoder)
 121 {
 122         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 123
 124         intel_crt_set_dpms(encoder, crt->connector->base.dpms);
 125 }
 126
 127
 128 static void intel_crt_dpms(struct drm_connector *connector, int mode)
 129 {
 130         struct drm_device *dev = connector->dev;
 131         struct intel_encoder *encoder = intel_attached_encoder(connector);
 132         struct drm_crtc *crtc;
 133         int old_dpms;
 134
 135         /* PCH platforms and VLV only support on/off. */
 136         if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
 137                 mode = DRM_MODE_DPMS_OFF;
 138
 139         if (mode == connector->dpms)
 140                 return;
 141
 142         old_dpms = connector->dpms;
 143         connector->dpms = mode;
 144
 145         /* Only need to change hw state when actually enabled */
 146         crtc = encoder->base.crtc;
 147         if (!crtc) {
 148                 encoder->connectors_active = false;
 149                 return;
 150         }
 151
 152         /* We need the pipe to run for anything but OFF. */
 153         if (mode == DRM_MODE_DPMS_OFF)
 154                 encoder->connectors_active = false;
 155         else
 156                 encoder->connectors_active = true;
 157
 158         if (mode < old_dpms) {
 159                 /* From off to on, enable the pipe first. */
 160                 intel_crtc_update_dpms(crtc);
 161
 162                 intel_crt_set_dpms(encoder, mode);
 163         } else {
 164                 intel_crt_set_dpms(encoder, mode);
 165
 166                 intel_crtc_update_dpms(crtc);
 167         }
 168
 169         intel_modeset_check_state(connector->dev);
 170 }
 171
 172 static int intel_crt_mode_valid(struct drm_connector *connector,
 173                                 struct drm_display_mode *mode)
 174 {
 175         struct drm_device *dev = connector->dev;
 176
 177         int max_clock = 0;
 178         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 179                 return MODE_NO_DBLESCAN;
 180
 181         if (mode->clock < 25000)
 182                 return MODE_CLOCK_LOW;
 183
 184         if (IS_GEN2(dev))
 185                 max_clock = 350000;
 186         else
 187                 max_clock = 400000;
 188         if (mode->clock > max_clock)
 189                 return MODE_CLOCK_HIGH;
 190
 191         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
 192         if (HAS_PCH_LPT(dev) &&
 193             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
 194                 return MODE_CLOCK_HIGH;
 195
 196         return MODE_OK;
 197 }
 198
 199 static bool intel_crt_compute_config(struct intel_encoder *encoder,
 200                                      struct intel_crtc_config *pipe_config)
 201 {
 202         struct drm_device *dev = encoder->base.dev;
 203
 204         if (HAS_PCH_SPLIT(dev))
 205                 pipe_config->has_pch_encoder = true;
 206
 207         return true;
 208 }
 209
 210 static void intel_crt_mode_set(struct drm_encoder *encoder,
 211                                struct drm_display_mode *mode,
 212                                struct drm_display_mode *adjusted_mode)
 213 {
 214
 215         struct drm_device *dev = encoder->dev;
 216         struct drm_crtc *crtc = encoder->crtc;
 217         struct intel_crt *crt =
 218                 intel_encoder_to_crt(to_intel_encoder(encoder));
 219         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 220         struct drm_i915_private *dev_priv = dev->dev_private;
 221         u32 adpa;
 222
 223         if (HAS_PCH_SPLIT(dev))
 224                 adpa = ADPA_HOTPLUG_BITS;
 225         else
 226                 adpa = 0;
 227
 228         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 229                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 230         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 231                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 232
 233         /* For CPT allow 3 pipe config, for others just use A or B */
 234         if (HAS_PCH_LPT(dev))
 235                 ; /* Those bits don't exist here */
 236         else if (HAS_PCH_CPT(dev))
 237                 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
 238         else if (intel_crtc->pipe == 0)
 239                 adpa |= ADPA_PIPE_A_SELECT;
 240         else
 241                 adpa |= ADPA_PIPE_B_SELECT;
 242
 243         if (!HAS_PCH_SPLIT(dev))
 244                 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
 245
 246         I915_WRITE(crt->adpa_reg, adpa);
 247 }
 248
 249 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 250 {
 251         struct drm_device *dev = connector->dev;
 252         struct intel_crt *crt = intel_attached_crt(connector);
 253         struct drm_i915_private *dev_priv = dev->dev_private;
 254         u32 adpa;
 255         bool ret;
 256
 257         /* The first time through, trigger an explicit detection cycle */
 258         if (crt->force_hotplug_required) {
 259                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 260                 u32 save_adpa;
 261
 262                 crt->force_hotplug_required = 0;
 263
 264                 save_adpa = adpa = I915_READ(crt->adpa_reg);
 265                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 266
 267                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 268                 if (turn_off_dac)
 269                         adpa &= ~ADPA_DAC_ENABLE;
 270
 271                 I915_WRITE(crt->adpa_reg, adpa);
 272
 273                 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 274                              1000))
 275                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 276
 277                 if (turn_off_dac) {
 278                         I915_WRITE(crt->adpa_reg, save_adpa);
 279                         POSTING_READ(crt->adpa_reg);
 280                 }
 281         }
 282
 283         /* Check the status to see if both blue and green are on now */
 284         adpa = I915_READ(crt->adpa_reg);
 285         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 286                 ret = true;
 287         else
 288                 ret = false;
 289         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 290
 291         return ret;
 292 }
 293
 294 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 295 {
 296         struct drm_device *dev = connector->dev;
 297         struct intel_crt *crt = intel_attached_crt(connector);
 298         struct drm_i915_private *dev_priv = dev->dev_private;
 299         u32 adpa;
 300         bool ret;
 301         u32 save_adpa;
 302
 303         save_adpa = adpa = I915_READ(crt->adpa_reg);
 304         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 305
 306         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 307
 308         I915_WRITE(crt->adpa_reg, adpa);
 309
 310         if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 311                      1000)) {
 312                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 313                 I915_WRITE(crt->adpa_reg, save_adpa);
 314         }
 315
 316         /* Check the status to see if both blue and green are on now */
 317         adpa = I915_READ(crt->adpa_reg);
 318         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 319                 ret = true;
 320         else
 321                 ret = false;
 322
 323         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 324
 325         /* FIXME: debug force function and remove */
 326         ret = true;
 327
 328         return ret;
 329 }
 330
 331 /**
 332  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 333  *
 334  * Not for i915G/i915GM
 335  *
 336  * \return true if CRT is connected.
 337  * \return false if CRT is disconnected.
 338  */
 339 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 340 {
 341         struct drm_device *dev = connector->dev;
 342         struct drm_i915_private *dev_priv = dev->dev_private;
 343         u32 hotplug_en, orig, stat;
 344         bool ret = false;
 345         int i, tries = 0;
 346
 347         if (HAS_PCH_SPLIT(dev))
 348                 return intel_ironlake_crt_detect_hotplug(connector);
 349
 350         if (IS_VALLEYVIEW(dev))
 351                 return valleyview_crt_detect_hotplug(connector);
 352
 353         /*
 354          * On 4 series desktop, CRT detect sequence need to be done twice
 355          * to get a reliable result.
 356          */
 357
 358         if (IS_G4X(dev) && !IS_GM45(dev))
 359                 tries = 2;
 360         else
 361                 tries = 1;
 362         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 363         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 364
 365         for (i = 0; i < tries ; i++) {
 366                 /* turn on the FORCE_DETECT */
 367                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 368                 /* wait for FORCE_DETECT to go off */
 369                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 370                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 371                              1000))
 372                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 373         }
 374
 375         stat = I915_READ(PORT_HOTPLUG_STAT);
 376         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 377                 ret = true;
 378
 379         /* clear the interrupt we just generated, if any */
 380         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 381
 382         /* and put the bits back */
 383         I915_WRITE(PORT_HOTPLUG_EN, orig);
 384
 385         return ret;
 386 }
 387
 388 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
 389                                 struct device *i2c)
 390 {
 391         struct edid *edid;
 392
 393         edid = drm_get_edid(connector, i2c);
 394
 395         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
 396                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
 397                 intel_gmbus_force_bit(i2c, true);
 398                 edid = drm_get_edid(connector, i2c);
 399                 intel_gmbus_force_bit(i2c, false);
 400         }
 401
 402         return edid;
 403 }
 404
 405 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
 406 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
 407                                 struct device *adapter)
 408 {
 409         struct edid *edid;
 410         int ret;
 411
 412         edid = intel_crt_get_edid(connector, adapter);
 413         if (!edid)
 414                 return 0;
 415
 416         ret = intel_connector_update_modes(connector, edid);
 417         kfree(edid);
 418
 419         return ret;
 420 }
 421
 422 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 423 {
 424         struct intel_crt *crt = intel_attached_crt(connector);
 425         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 426         struct edid *edid;
 427         struct device *i2c;
 428
 429         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 430
 431         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
 432         edid = intel_crt_get_edid(connector, i2c);
 433
 434         if (edid) {
 435                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 436
 437                 /*
 438                  * This may be a DVI-I connector with a shared DDC
 439                  * link between analog and digital outputs, so we
 440                  * have to check the EDID input spec of the attached device.
 441                  */
 442                 if (!is_digital) {
 443                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 444                         return true;
 445                 }
 446
 447                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 448         } else {
 449                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 450         }
 451
 452         drm_free(edid, M_DRM);
 453
 454         return false;
 455 }
 456
 457 static enum drm_connector_status
 458 intel_crt_load_detect(struct intel_crt *crt)
 459 {
 460         struct drm_device *dev = crt->base.base.dev;
 461         struct drm_i915_private *dev_priv = dev->dev_private;
 462         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 463         uint32_t save_bclrpat;
 464         uint32_t save_vtotal;
 465         uint32_t vtotal, vactive;
 466         uint32_t vsample;
 467         uint32_t vblank, vblank_start, vblank_end;
 468         uint32_t dsl;
 469         uint32_t bclrpat_reg;
 470         uint32_t vtotal_reg;
 471         uint32_t vblank_reg;
 472         uint32_t vsync_reg;
 473         uint32_t pipeconf_reg;
 474         uint32_t pipe_dsl_reg;
 475         uint8_t st00;
 476         enum drm_connector_status status;
 477
 478         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 479
 480         bclrpat_reg = BCLRPAT(pipe);
 481         vtotal_reg = VTOTAL(pipe);
 482         vblank_reg = VBLANK(pipe);
 483         vsync_reg = VSYNC(pipe);
 484         pipeconf_reg = PIPECONF(pipe);
 485         pipe_dsl_reg = PIPEDSL(pipe);
 486
 487         save_bclrpat = I915_READ(bclrpat_reg);
 488         save_vtotal = I915_READ(vtotal_reg);
 489         vblank = I915_READ(vblank_reg);
 490
 491         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 492         vactive = (save_vtotal & 0x7ff) + 1;
 493
 494         vblank_start = (vblank & 0xfff) + 1;
 495         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 496
 497         /* Set the border color to purple. */
 498         I915_WRITE(bclrpat_reg, 0x500050);
 499
 500         if (!IS_GEN2(dev)) {
 501                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 502                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 503                 POSTING_READ(pipeconf_reg);
 504                 /* Wait for next Vblank to substitue
 505                  * border color for Color info */
 506                 intel_wait_for_vblank(dev, pipe);
 507                 st00 = I915_READ8(VGA_MSR_WRITE);
 508                 status = ((st00 & (1 << 4)) != 0) ?
 509                         connector_status_connected :
 510                         connector_status_disconnected;
 511
 512                 I915_WRITE(pipeconf_reg, pipeconf);
 513         } else {
 514                 bool restore_vblank = false;
 515                 int count, detect;
 516
 517                 /*
 518                 * If there isn't any border, add some.
 519                 * Yes, this will flicker
 520                 */
 521                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 522                         uint32_t vsync = I915_READ(vsync_reg);
 523                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 524
 525                         vblank_start = vsync_start;
 526                         I915_WRITE(vblank_reg,
 527                                    (vblank_start - 1) |
 528                                    ((vblank_end - 1) << 16));
 529                         restore_vblank = true;
 530                 }
 531                 /* sample in the vertical border, selecting the larger one */
 532                 if (vblank_start - vactive >= vtotal - vblank_end)
 533                         vsample = (vblank_start + vactive) >> 1;
 534                 else
 535                         vsample = (vtotal + vblank_end) >> 1;
 536
 537                 /*
 538                  * Wait for the border to be displayed
 539                  */
 540                 while (I915_READ(pipe_dsl_reg) >= vactive)
 541                         ;
 542                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 543                         ;
 544                 /*
 545                  * Watch ST00 for an entire scanline
 546                  */
 547                 detect = 0;
 548                 count = 0;
 549                 do {
 550                         count++;
 551                         /* Read the ST00 VGA status register */
 552                         st00 = I915_READ8(VGA_MSR_WRITE);
 553                         if (st00 & (1 << 4))
 554                                 detect++;
 555                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 556
 557                 /* restore vblank if necessary */
 558                 if (restore_vblank)
 559                         I915_WRITE(vblank_reg, vblank);
 560                 /*
 561                  * If more than 3/4 of the scanline detected a monitor,
 562                  * then it is assumed to be present. This works even on i830,
 563                  * where there isn't any way to force the border color across
 564                  * the screen
 565                  */
 566                 status = detect * 4 > count * 3 ?
 567                          connector_status_connected :
 568                          connector_status_disconnected;
 569         }
 570
 571         /* Restore previous settings */
 572         I915_WRITE(bclrpat_reg, save_bclrpat);
 573
 574         return status;
 575 }
 576
 577 static enum drm_connector_status
 578 intel_crt_detect(struct drm_connector *connector, bool force)
 579 {
 580         struct drm_device *dev = connector->dev;
 581         struct intel_crt *crt = intel_attached_crt(connector);
 582         enum drm_connector_status status;
 583         struct intel_load_detect_pipe tmp;
 584
 585         if (I915_HAS_HOTPLUG(dev)) {
 586                 /* We can not rely on the HPD pin always being correctly wired
 587                  * up, for example many KVM do not pass it through, and so
 588                  * only trust an assertion that the monitor is connected.
 589                  */
 590                 if (intel_crt_detect_hotplug(connector)) {
 591                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 592                         return connector_status_connected;
 593                 } else
 594                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 595         }
 596
 597         if (intel_crt_detect_ddc(connector))
 598                 return connector_status_connected;
 599
 600         /* Load detection is broken on HPD capable machines. Whoever wants a
 601          * broken monitor (without edid) to work behind a broken kvm (that fails
 602          * to have the right resistors for HP detection) needs to fix this up.
 603          * For now just bail out. */
 604         if (I915_HAS_HOTPLUG(dev))
 605                 return connector_status_disconnected;
 606
 607         if (!force)
 608                 return connector->status;
 609
 610         /* for pre-945g platforms use load detect */
 611         if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
 612                 if (intel_crt_detect_ddc(connector))
 613                         status = connector_status_connected;
 614                 else
 615                         status = intel_crt_load_detect(crt);
 616                 intel_release_load_detect_pipe(connector, &tmp);
 617         } else
 618                 status = connector_status_unknown;
 619
 620         return status;
 621 }
 622
 623 static void intel_crt_destroy(struct drm_connector *connector)
 624 {
 625 #if 0
 626         drm_sysfs_connector_remove(connector);
 627 #endif
 628         drm_connector_cleanup(connector);
 629         drm_free(connector, M_DRM);
 630 }
 631
 632 static int intel_crt_get_modes(struct drm_connector *connector)
 633 {
 634         struct drm_device *dev = connector->dev;
 635         struct drm_i915_private *dev_priv = dev->dev_private;
 636         int ret;
 637         struct device *i2c;
 638
 639         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
 640         ret = intel_crt_ddc_get_modes(connector, i2c);
 641         if (ret || !IS_G4X(dev))
 642                 return ret;
 643
 644         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 645         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
 646         return intel_crt_ddc_get_modes(connector, i2c);
 647 }
 648
 649 static int intel_crt_set_property(struct drm_connector *connector,
 650                                   struct drm_property *property,
 651                                   uint64_t value)
 652 {
 653         return 0;
 654 }
 655
 656 static void intel_crt_reset(struct drm_connector *connector)
 657 {
 658         struct drm_device *dev = connector->dev;
 659         struct drm_i915_private *dev_priv = dev->dev_private;
 660         struct intel_crt *crt = intel_attached_crt(connector);
 661
 662         if (HAS_PCH_SPLIT(dev)) {
 663                 u32 adpa;
 664
 665                 adpa = I915_READ(crt->adpa_reg);
 666                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 667                 adpa |= ADPA_HOTPLUG_BITS;
 668                 I915_WRITE(crt->adpa_reg, adpa);
 669                 POSTING_READ(crt->adpa_reg);
 670
 671                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
 672                 crt->force_hotplug_required = 1;
 673         }
 674
 675 }
 676
 677 /*
 678  * Routines for controlling stuff on the analog port
 679  */
 680
 681 static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
 682         .mode_set = intel_crt_mode_set,
 683         .disable = intel_encoder_noop,
 684 };
 685
 686 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 687         .reset = intel_crt_reset,
 688         .dpms = intel_crt_dpms,
 689         .detect = intel_crt_detect,
 690         .fill_modes = drm_helper_probe_single_connector_modes,
 691         .destroy = intel_crt_destroy,
 692         .set_property = intel_crt_set_property,
 693 };
 694
 695 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 696         .mode_valid = intel_crt_mode_valid,
 697         .get_modes = intel_crt_get_modes,
 698         .best_encoder = intel_best_encoder,
 699 };
 700
 701 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 702         .destroy = intel_encoder_destroy,
 703 };
 704
 705 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 706 {
 707         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 708         return 1;
 709 }
 710
 711 static const struct dmi_system_id intel_no_crt[] = {
 712         {
 713                 .callback = intel_no_crt_dmi_callback,
 714                 .ident = "ACER ZGB",
 715                 .matches = {
 716                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 717                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 718                 },
 719         },
 720         { }
 721 };
 722
 723 void intel_crt_init(struct drm_device *dev)
 724 {
 725         struct drm_connector *connector;
 726         struct intel_crt *crt;
 727         struct intel_connector *intel_connector;
 728         struct drm_i915_private *dev_priv = dev->dev_private;
 729
 730         /* Skip machines without VGA that falsely report hotplug events */
 731         if (dmi_check_system(intel_no_crt))
 732                 return;
 733
 734         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 735         if (!crt)
 736                 return;
 737
 738         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 739         if (!intel_connector) {
 740                 kfree(crt);
 741                 return;
 742         }
 743
 744         connector = &intel_connector->base;
 745         crt->connector = intel_connector;
 746         drm_connector_init(dev, &intel_connector->base,
 747                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 748
 749         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 750                          DRM_MODE_ENCODER_DAC);
 751
 752         intel_connector_attach_encoder(intel_connector, &crt->base);
 753
 754         crt->base.type = INTEL_OUTPUT_ANALOG;
 755         crt->base.cloneable = true;
 756         if (IS_I830(dev))
 757                 crt->base.crtc_mask = (1 << 0);
 758         else
 759                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 760
 761         if (IS_GEN2(dev))
 762                 connector->interlace_allowed = 0;
 763         else
 764                 connector->interlace_allowed = 1;
 765         connector->doublescan_allowed = 0;
 766
 767         if (HAS_PCH_SPLIT(dev))
 768                 crt->adpa_reg = PCH_ADPA;
 769         else if (IS_VALLEYVIEW(dev))
 770                 crt->adpa_reg = VLV_ADPA;
 771         else
 772                 crt->adpa_reg = ADPA;
 773
 774         crt->base.compute_config = intel_crt_compute_config;
 775         crt->base.disable = intel_disable_crt;
 776         crt->base.enable = intel_enable_crt;
 777         if (I915_HAS_HOTPLUG(dev))
 778                 crt->base.hpd_pin = HPD_CRT;
 779         if (HAS_DDI(dev))
 780                 crt->base.get_hw_state = intel_ddi_get_hw_state;
 781         else
 782                 crt->base.get_hw_state = intel_crt_get_hw_state;
 783         intel_connector->get_hw_state = intel_connector_get_hw_state;
 784
 785         drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
 786         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 787
 788 #if 0
 789         drm_sysfs_connector_add(connector);
 790 #endif
 791
 792         if (!I915_HAS_HOTPLUG(dev))
 793                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 794
 795         /*
 796          * Configure the automatic hotplug detection stuff
 797          */
 798         crt->force_hotplug_required = 0;
 799
 800         /*
 801          * TODO: find a proper way to discover whether we need to set the the
 802          * polarity and link reversal bits or not, instead of relying on the
 803          * BIOS.
 804          */
 805         if (HAS_PCH_LPT(dev)) {
 806                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
 807                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
 808
 809                 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
 810         }
 811 }