2 * Copyright 2009 Jerome Glisse.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
31 * $FreeBSD: head/sys/dev/drm2/radeon/radeon_fence.c 254885 2013-08-25 19:37:15Z dumbbell $
35 #include "radeon_reg.h"
38 #include "radeon_trace.h"
39 #endif /* DUMBBELL_WIP */
43 * Fences mark an event in the GPUs pipeline and are used
44 * for GPU/CPU synchronization. When the fence is written,
45 * it is expected that all buffers associated with that fence
46 * are no longer in use by the associated ring on the GPU and
47 * that the the relevant GPU caches have been flushed. Whether
48 * we use a scratch register or memory location depends on the asic
49 * and whether writeback is enabled.
53 * radeon_fence_write - write a fence value
55 * @rdev: radeon_device pointer
56 * @seq: sequence number to write
57 * @ring: ring index the fence is associated with
59 * Writes a fence value to memory or a scratch register (all asics).
61 static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring)
63 struct radeon_fence_driver *drv = &rdev->fence_drv[ring];
64 if (likely(rdev->wb.enabled || !drv->scratch_reg)) {
65 *drv->cpu_addr = cpu_to_le32(seq);
67 WREG32(drv->scratch_reg, seq);
72 * radeon_fence_read - read a fence value
74 * @rdev: radeon_device pointer
75 * @ring: ring index the fence is associated with
77 * Reads a fence value from memory or a scratch register (all asics).
78 * Returns the value of the fence read from memory or register.
80 static u32 radeon_fence_read(struct radeon_device *rdev, int ring)
82 struct radeon_fence_driver *drv = &rdev->fence_drv[ring];
85 if (likely(rdev->wb.enabled || !drv->scratch_reg)) {
86 seq = le32_to_cpu(*drv->cpu_addr);
88 seq = RREG32(drv->scratch_reg);
94 * radeon_fence_emit - emit a fence on the requested ring
96 * @rdev: radeon_device pointer
97 * @fence: radeon fence object
98 * @ring: ring index the fence is associated with
100 * Emits a fence command on the requested ring (all asics).
101 * Returns 0 on success, -ENOMEM on failure.
103 int radeon_fence_emit(struct radeon_device *rdev,
104 struct radeon_fence **fence,
107 /* we are protected by the ring emission mutex */
108 *fence = kmalloc(sizeof(struct radeon_fence), M_DRM,
110 if ((*fence) == NULL) {
113 refcount_init(&((*fence)->kref), 1);
114 (*fence)->rdev = rdev;
115 (*fence)->seq = ++rdev->fence_drv[ring].sync_seq[ring];
116 (*fence)->ring = ring;
117 radeon_fence_ring_emit(rdev, ring, *fence);
122 * radeon_fence_process - process a fence
124 * @rdev: radeon_device pointer
125 * @ring: ring index the fence is associated with
127 * Checks the current fence value and wakes the fence queue
128 * if the sequence number has increased (all asics).
130 void radeon_fence_process(struct radeon_device *rdev, int ring)
132 uint64_t seq, last_seq, last_emitted;
133 unsigned count_loop = 0;
136 /* Note there is a scenario here for an infinite loop but it's
137 * very unlikely to happen. For it to happen, the current polling
138 * process need to be interrupted by another process and another
139 * process needs to update the last_seq btw the atomic read and
140 * xchg of the current process.
142 * More over for this to go in infinite loop there need to be
143 * continuously new fence signaled ie radeon_fence_read needs
144 * to return a different value each time for both the currently
145 * polling process and the other process that xchg the last_seq
146 * btw atomic read and xchg of the current process. And the
147 * value the other process set as last seq must be higher than
148 * the seq value we just read. Which means that current process
149 * need to be interrupted after radeon_fence_read and before
152 * To be even more safe we count the number of time we loop and
153 * we bail after 10 loop just accepting the fact that we might
154 * have temporarly set the last_seq not to the true real last
155 * seq but to an older one.
157 last_seq = atomic64_read(&rdev->fence_drv[ring].last_seq);
159 last_emitted = rdev->fence_drv[ring].sync_seq[ring];
160 seq = radeon_fence_read(rdev, ring);
161 seq |= last_seq & 0xffffffff00000000LL;
162 if (seq < last_seq) {
164 seq |= last_emitted & 0xffffffff00000000LL;
167 if (seq <= last_seq || seq > last_emitted) {
170 /* If we loop over we don't want to return without
171 * checking if a fence is signaled as it means that the
172 * seq we just read is different from the previous on.
176 if ((count_loop++) > 10) {
177 /* We looped over too many time leave with the
178 * fact that we might have set an older fence
179 * seq then the current real last seq as signaled
184 } while (atomic64_xchg(&rdev->fence_drv[ring].last_seq, seq) > seq);
187 rdev->fence_drv[ring].last_activity = jiffies;
188 wake_up_all(&rdev->fence_queue);
193 * radeon_fence_destroy - destroy a fence
197 * Frees the fence object (all asics).
199 static void radeon_fence_destroy(struct radeon_fence *fence)
202 drm_free(fence, M_DRM);
206 * radeon_fence_seq_signaled - check if a fence sequeuce number has signaled
208 * @rdev: radeon device pointer
209 * @seq: sequence number
210 * @ring: ring index the fence is associated with
212 * Check if the last singled fence sequnce number is >= the requested
213 * sequence number (all asics).
214 * Returns true if the fence has signaled (current fence value
215 * is >= requested value) or false if it has not (current fence
216 * value is < the requested value. Helper function for
217 * radeon_fence_signaled().
219 static bool radeon_fence_seq_signaled(struct radeon_device *rdev,
220 u64 seq, unsigned ring)
222 if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) {
225 /* poll new last sequence at least once */
226 radeon_fence_process(rdev, ring);
227 if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) {
234 * radeon_fence_signaled - check if a fence has signaled
236 * @fence: radeon fence object
238 * Check if the requested fence has signaled (all asics).
239 * Returns true if the fence has signaled or false if it has not.
241 bool radeon_fence_signaled(struct radeon_fence *fence)
246 if (fence->seq == RADEON_FENCE_SIGNALED_SEQ) {
249 if (radeon_fence_seq_signaled(fence->rdev, fence->seq, fence->ring)) {
250 fence->seq = RADEON_FENCE_SIGNALED_SEQ;
257 * radeon_fence_wait_seq - wait for a specific sequence number
259 * @rdev: radeon device pointer
260 * @target_seq: sequence number we want to wait for
261 * @ring: ring index the fence is associated with
262 * @intr: use interruptable sleep
263 * @lock_ring: whether the ring should be locked or not
265 * Wait for the requested sequence number to be written (all asics).
266 * @intr selects whether to use interruptable (true) or non-interruptable
267 * (false) sleep when waiting for the sequence number. Helper function
268 * for radeon_fence_wait(), et al.
269 * Returns 0 if the sequence number has passed, error for all other cases.
270 * -EDEADLK is returned when a GPU lockup has been detected and the ring is
271 * marked as not ready so no further jobs get scheduled until a successful
274 static int radeon_fence_wait_seq(struct radeon_device *rdev, u64 target_seq,
275 unsigned ring, bool intr, bool lock_ring)
277 unsigned long timeout, last_activity;
283 while (target_seq > atomic64_read(&rdev->fence_drv[ring].last_seq)) {
284 if (!rdev->ring[ring].ready) {
288 timeout = jiffies - RADEON_FENCE_JIFFIES_TIMEOUT;
289 if (time_after(rdev->fence_drv[ring].last_activity, timeout)) {
290 /* the normal case, timeout is somewhere before last_activity */
291 timeout = rdev->fence_drv[ring].last_activity - timeout;
293 /* either jiffies wrapped around, or no fence was signaled in the last 500ms
294 * anyway we will just wait for the minimum amount and then check for a lockup
298 seq = atomic64_read(&rdev->fence_drv[ring].last_seq);
299 /* Save current last activity valuee, used to check for GPU lockups */
300 last_activity = rdev->fence_drv[ring].last_activity;
302 radeon_irq_kms_sw_irq_get(rdev, ring);
304 r = wait_event_interruptible_timeout(rdev->fence_queue,
305 (signaled = radeon_fence_seq_signaled(rdev, target_seq, ring)),
308 r = wait_event_timeout(rdev->fence_queue,
309 (signaled = radeon_fence_seq_signaled(rdev, target_seq, ring)),
312 radeon_irq_kms_sw_irq_put(rdev, ring);
313 if (unlikely(r < 0)) {
317 if (unlikely(!signaled)) {
318 /* we were interrupted for some reason and fence
319 * isn't signaled yet, resume waiting */
324 /* check if sequence value has changed since last_activity */
325 if (seq != atomic64_read(&rdev->fence_drv[ring].last_seq)) {
330 lockmgr(&rdev->ring_lock, LK_EXCLUSIVE);
333 /* test if somebody else has already decided that this is a lockup */
334 if (last_activity != rdev->fence_drv[ring].last_activity) {
336 lockmgr(&rdev->ring_lock, LK_RELEASE);
341 if (radeon_ring_is_lockup(rdev, ring, &rdev->ring[ring])) {
342 /* good news we believe it's a lockup */
343 dev_warn(rdev->dev, "GPU lockup (waiting for 0x%016jx last fence id 0x%016jx)\n",
346 /* change last activity so nobody else think there is a lockup */
347 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
348 rdev->fence_drv[i].last_activity = jiffies;
351 /* mark the ring as not ready any more */
352 rdev->ring[ring].ready = false;
354 lockmgr(&rdev->ring_lock, LK_RELEASE);
360 lockmgr(&rdev->ring_lock, LK_RELEASE);
368 * radeon_fence_wait - wait for a fence to signal
370 * @fence: radeon fence object
371 * @intr: use interruptable sleep
373 * Wait for the requested fence to signal (all asics).
374 * @intr selects whether to use interruptable (true) or non-interruptable
375 * (false) sleep when waiting for the fence.
376 * Returns 0 if the fence has passed, error for all other cases.
378 int radeon_fence_wait(struct radeon_fence *fence, bool intr)
383 DRM_ERROR("Querying an invalid fence : %p !\n", fence);
387 r = radeon_fence_wait_seq(fence->rdev, fence->seq,
388 fence->ring, intr, true);
392 fence->seq = RADEON_FENCE_SIGNALED_SEQ;
396 static bool radeon_fence_any_seq_signaled(struct radeon_device *rdev, u64 *seq)
400 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
401 if (seq[i] && radeon_fence_seq_signaled(rdev, seq[i], i)) {
409 * radeon_fence_wait_any_seq - wait for a sequence number on any ring
411 * @rdev: radeon device pointer
412 * @target_seq: sequence number(s) we want to wait for
413 * @intr: use interruptable sleep
415 * Wait for the requested sequence number(s) to be written by any ring
416 * (all asics). Sequnce number array is indexed by ring id.
417 * @intr selects whether to use interruptable (true) or non-interruptable
418 * (false) sleep when waiting for the sequence number. Helper function
419 * for radeon_fence_wait_any(), et al.
420 * Returns 0 if the sequence number has passed, error for all other cases.
422 static int radeon_fence_wait_any_seq(struct radeon_device *rdev,
423 u64 *target_seq, bool intr)
425 unsigned long timeout, last_activity, tmp;
426 unsigned i, ring = RADEON_NUM_RINGS;
430 for (i = 0, last_activity = 0; i < RADEON_NUM_RINGS; ++i) {
431 if (!target_seq[i]) {
435 /* use the most recent one as indicator */
436 if (time_after(rdev->fence_drv[i].last_activity, last_activity)) {
437 last_activity = rdev->fence_drv[i].last_activity;
440 /* For lockup detection just pick the lowest ring we are
441 * actively waiting for
448 /* nothing to wait for ? */
449 if (ring == RADEON_NUM_RINGS) {
453 while (!radeon_fence_any_seq_signaled(rdev, target_seq)) {
454 timeout = jiffies - RADEON_FENCE_JIFFIES_TIMEOUT;
455 if (time_after(last_activity, timeout)) {
456 /* the normal case, timeout is somewhere before last_activity */
457 timeout = last_activity - timeout;
459 /* either jiffies wrapped around, or no fence was signaled in the last 500ms
460 * anyway we will just wait for the minimum amount and then check for a lockup
465 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
467 radeon_irq_kms_sw_irq_get(rdev, i);
471 r = wait_event_interruptible_timeout(rdev->fence_queue,
472 (signaled = radeon_fence_any_seq_signaled(rdev, target_seq)),
475 r = wait_event_timeout(rdev->fence_queue,
476 (signaled = radeon_fence_any_seq_signaled(rdev, target_seq)),
479 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
481 radeon_irq_kms_sw_irq_put(rdev, i);
484 if (unlikely(r < 0)) {
488 if (unlikely(!signaled)) {
489 /* we were interrupted for some reason and fence
490 * isn't signaled yet, resume waiting */
495 lockmgr(&rdev->ring_lock, LK_EXCLUSIVE);
496 for (i = 0, tmp = 0; i < RADEON_NUM_RINGS; ++i) {
497 if (time_after(rdev->fence_drv[i].last_activity, tmp)) {
498 tmp = rdev->fence_drv[i].last_activity;
501 /* test if somebody else has already decided that this is a lockup */
502 if (last_activity != tmp) {
504 lockmgr(&rdev->ring_lock, LK_RELEASE);
508 if (radeon_ring_is_lockup(rdev, ring, &rdev->ring[ring])) {
509 /* good news we believe it's a lockup */
510 dev_warn(rdev->dev, "GPU lockup (waiting for 0x%016jx)\n",
513 /* change last activity so nobody else think there is a lockup */
514 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
515 rdev->fence_drv[i].last_activity = jiffies;
518 /* mark the ring as not ready any more */
519 rdev->ring[ring].ready = false;
520 lockmgr(&rdev->ring_lock, LK_RELEASE);
523 lockmgr(&rdev->ring_lock, LK_RELEASE);
530 * radeon_fence_wait_any - wait for a fence to signal on any ring
532 * @rdev: radeon device pointer
533 * @fences: radeon fence object(s)
534 * @intr: use interruptable sleep
536 * Wait for any requested fence to signal (all asics). Fence
537 * array is indexed by ring id. @intr selects whether to use
538 * interruptable (true) or non-interruptable (false) sleep when
539 * waiting for the fences. Used by the suballocator.
540 * Returns 0 if any fence has passed, error for all other cases.
542 int radeon_fence_wait_any(struct radeon_device *rdev,
543 struct radeon_fence **fences,
546 uint64_t seq[RADEON_NUM_RINGS];
550 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
557 if (fences[i]->seq == RADEON_FENCE_SIGNALED_SEQ) {
558 /* something was allready signaled */
562 seq[i] = fences[i]->seq;
565 r = radeon_fence_wait_any_seq(rdev, seq, intr);
573 * radeon_fence_wait_next_locked - wait for the next fence to signal
575 * @rdev: radeon device pointer
576 * @ring: ring index the fence is associated with
578 * Wait for the next fence on the requested ring to signal (all asics).
579 * Returns 0 if the next fence has passed, error for all other cases.
580 * Caller must hold ring lock.
582 int radeon_fence_wait_next_locked(struct radeon_device *rdev, int ring)
586 seq = atomic64_read(&rdev->fence_drv[ring].last_seq) + 1ULL;
587 if (seq >= rdev->fence_drv[ring].sync_seq[ring]) {
588 /* nothing to wait for, last_seq is
589 already the last emited fence */
592 return radeon_fence_wait_seq(rdev, seq, ring, false, false);
596 * radeon_fence_wait_empty_locked - wait for all fences to signal
598 * @rdev: radeon device pointer
599 * @ring: ring index the fence is associated with
601 * Wait for all fences on the requested ring to signal (all asics).
602 * Returns 0 if the fences have passed, error for all other cases.
603 * Caller must hold ring lock.
605 int radeon_fence_wait_empty_locked(struct radeon_device *rdev, int ring)
607 uint64_t seq = rdev->fence_drv[ring].sync_seq[ring];
610 r = radeon_fence_wait_seq(rdev, seq, ring, false, false);
615 dev_err(rdev->dev, "error waiting for ring[%d] to become idle (%d)\n",
622 * radeon_fence_ref - take a ref on a fence
624 * @fence: radeon fence object
626 * Take a reference on a fence (all asics).
629 struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
631 refcount_acquire(&fence->kref);
636 * radeon_fence_unref - remove a ref on a fence
638 * @fence: radeon fence object
640 * Remove a reference on a fence (all asics).
642 void radeon_fence_unref(struct radeon_fence **fence)
644 struct radeon_fence *tmp = *fence;
648 if (refcount_release(&tmp->kref)) {
649 radeon_fence_destroy(tmp);
655 * radeon_fence_count_emitted - get the count of emitted fences
657 * @rdev: radeon device pointer
658 * @ring: ring index the fence is associated with
660 * Get the number of fences emitted on the requested ring (all asics).
661 * Returns the number of emitted fences on the ring. Used by the
662 * dynpm code to ring track activity.
664 unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring)
668 /* We are not protected by ring lock when reading the last sequence
669 * but it's ok to report slightly wrong fence count here.
671 radeon_fence_process(rdev, ring);
672 emitted = rdev->fence_drv[ring].sync_seq[ring]
673 - atomic64_read(&rdev->fence_drv[ring].last_seq);
674 /* to avoid 32bits warp around */
675 if (emitted > 0x10000000) {
676 emitted = 0x10000000;
678 return (unsigned)emitted;
682 * radeon_fence_need_sync - do we need a semaphore
684 * @fence: radeon fence object
685 * @dst_ring: which ring to check against
687 * Check if the fence needs to be synced against another ring
688 * (all asics). If so, we need to emit a semaphore.
689 * Returns true if we need to sync with another ring, false if
692 bool radeon_fence_need_sync(struct radeon_fence *fence, int dst_ring)
694 struct radeon_fence_driver *fdrv;
700 if (fence->ring == dst_ring) {
704 /* we are protected by the ring mutex */
705 fdrv = &fence->rdev->fence_drv[dst_ring];
706 if (fence->seq <= fdrv->sync_seq[fence->ring]) {
714 * radeon_fence_note_sync - record the sync point
716 * @fence: radeon fence object
717 * @dst_ring: which ring to check against
719 * Note the sequence number at which point the fence will
720 * be synced with the requested ring (all asics).
722 void radeon_fence_note_sync(struct radeon_fence *fence, int dst_ring)
724 struct radeon_fence_driver *dst, *src;
731 if (fence->ring == dst_ring) {
735 /* we are protected by the ring mutex */
736 src = &fence->rdev->fence_drv[fence->ring];
737 dst = &fence->rdev->fence_drv[dst_ring];
738 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
742 dst->sync_seq[i] = max(dst->sync_seq[i], src->sync_seq[i]);
747 * radeon_fence_driver_start_ring - make the fence driver
748 * ready for use on the requested ring.
750 * @rdev: radeon device pointer
751 * @ring: ring index to start the fence driver on
753 * Make the fence driver ready for processing (all asics).
754 * Not all asics have all rings, so each asic will only
755 * start the fence driver on the rings it has.
756 * Returns 0 for success, errors for failure.
758 int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)
763 radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
764 if (rdev->wb.use_event || !radeon_ring_supports_scratch_reg(rdev, &rdev->ring[ring])) {
765 rdev->fence_drv[ring].scratch_reg = 0;
766 index = R600_WB_EVENT_OFFSET + ring * 4;
768 r = radeon_scratch_get(rdev, &rdev->fence_drv[ring].scratch_reg);
770 dev_err(rdev->dev, "fence failed to get scratch register\n");
773 index = RADEON_WB_SCRATCH_OFFSET +
774 rdev->fence_drv[ring].scratch_reg -
775 rdev->scratch.reg_base;
777 rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4];
778 rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index;
779 radeon_fence_write(rdev, atomic64_read(&rdev->fence_drv[ring].last_seq), ring);
780 rdev->fence_drv[ring].initialized = true;
781 dev_info(rdev->dev, "fence driver on ring %d use gpu addr 0x%016jx and cpu addr 0x%p\n",
782 ring, (uintmax_t)rdev->fence_drv[ring].gpu_addr, rdev->fence_drv[ring].cpu_addr);
787 * radeon_fence_driver_init_ring - init the fence driver
788 * for the requested ring.
790 * @rdev: radeon device pointer
791 * @ring: ring index to start the fence driver on
793 * Init the fence driver for the requested ring (all asics).
794 * Helper function for radeon_fence_driver_init().
796 static void radeon_fence_driver_init_ring(struct radeon_device *rdev, int ring)
800 rdev->fence_drv[ring].scratch_reg = -1;
801 rdev->fence_drv[ring].cpu_addr = NULL;
802 rdev->fence_drv[ring].gpu_addr = 0;
803 for (i = 0; i < RADEON_NUM_RINGS; ++i)
804 rdev->fence_drv[ring].sync_seq[i] = 0;
805 atomic64_set(&rdev->fence_drv[ring].last_seq, 0);
806 rdev->fence_drv[ring].last_activity = jiffies;
807 rdev->fence_drv[ring].initialized = false;
811 * radeon_fence_driver_init - init the fence driver
812 * for all possible rings.
814 * @rdev: radeon device pointer
816 * Init the fence driver for all possible rings (all asics).
817 * Not all asics have all rings, so each asic will only
818 * start the fence driver on the rings it has using
819 * radeon_fence_driver_start_ring().
820 * Returns 0 for success.
822 int radeon_fence_driver_init(struct radeon_device *rdev)
826 init_waitqueue_head(&rdev->fence_queue);
827 for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
828 radeon_fence_driver_init_ring(rdev, ring);
830 if (radeon_debugfs_fence_init(rdev)) {
831 dev_err(rdev->dev, "fence debugfs file creation failed\n");
837 * radeon_fence_driver_fini - tear down the fence driver
838 * for all possible rings.
840 * @rdev: radeon device pointer
842 * Tear down the fence driver for all possible rings (all asics).
844 void radeon_fence_driver_fini(struct radeon_device *rdev)
848 lockmgr(&rdev->ring_lock, LK_EXCLUSIVE);
849 for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
850 if (!rdev->fence_drv[ring].initialized)
852 r = radeon_fence_wait_empty_locked(rdev, ring);
854 /* no need to trigger GPU reset as we are unloading */
855 radeon_fence_driver_force_completion(rdev);
857 wake_up_all(&rdev->fence_queue);
858 radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
859 rdev->fence_drv[ring].initialized = false;
861 lockmgr(&rdev->ring_lock, LK_RELEASE);
865 * radeon_fence_driver_force_completion - force all fence waiter to complete
867 * @rdev: radeon device pointer
869 * In case of GPU reset failure make sure no process keep waiting on fence
870 * that will never complete.
872 void radeon_fence_driver_force_completion(struct radeon_device *rdev)
876 for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
877 if (!rdev->fence_drv[ring].initialized)
879 radeon_fence_write(rdev, rdev->fence_drv[ring].sync_seq[ring], ring);
887 #if defined(CONFIG_DEBUG_FS)
888 static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
890 struct drm_info_node *node = (struct drm_info_node *)m->private;
891 struct drm_device *dev = node->minor->dev;
892 struct radeon_device *rdev = dev->dev_private;
895 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
896 if (!rdev->fence_drv[i].initialized)
899 seq_printf(m, "--- ring %d ---\n", i);
900 seq_printf(m, "Last signaled fence 0x%016llx\n",
901 (unsigned long long)atomic_load_acq_64(&rdev->fence_drv[i].last_seq));
902 seq_printf(m, "Last emitted 0x%016llx\n",
903 rdev->fence_drv[i].sync_seq[i]);
905 for (j = 0; j < RADEON_NUM_RINGS; ++j) {
906 if (i != j && rdev->fence_drv[j].initialized)
907 seq_printf(m, "Last sync to ring %d 0x%016llx\n",
908 j, rdev->fence_drv[i].sync_seq[j]);
914 static struct drm_info_list radeon_debugfs_fence_list[] = {
915 {"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
919 int radeon_debugfs_fence_init(struct radeon_device *rdev)
921 #if defined(CONFIG_DEBUG_FS)
922 return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);