2 * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 #include <sys/param.h>
27 #include <sys/systm.h>
30 #include <sys/kernel.h>
31 #include <sys/module.h>
32 #include <sys/resource.h>
34 #include <sys/taskqueue.h>
38 #include <dev/acpica/acpivar.h>
40 #include <bus/pci/pcivar.h>
42 #include <machine/stdarg.h>
44 #include <bus/mmc/bridge.h>
45 #include <bus/mmc/mmcreg.h>
46 #include <bus/mmc/mmcbrvar.h>
52 ACPI_MODULE_NAME("sdhci_acpi");
54 struct sdhci_acpi_softc {
55 device_t dev; /* Controller device */
57 struct resource *irq_res; /* IRQ resource */
58 void *intrhand; /* Interrupt handle */
60 struct sdhci_slot slot;
61 struct resource *mem_res; /* Memory resource */
65 sdhci_acpi_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off)
67 struct sdhci_acpi_softc *sc = device_get_softc(dev);
69 bus_barrier(sc->mem_res, 0, 0xFF,
70 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
71 return bus_read_1(sc->mem_res, off);
75 sdhci_acpi_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint8_t val)
77 struct sdhci_acpi_softc *sc = device_get_softc(dev);
79 bus_barrier(sc->mem_res, 0, 0xFF,
80 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
81 bus_write_1(sc->mem_res, off, val);
85 sdhci_acpi_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off)
87 struct sdhci_acpi_softc *sc = device_get_softc(dev);
89 bus_barrier(sc->mem_res, 0, 0xFF,
90 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
91 return bus_read_2(sc->mem_res, off);
95 sdhci_acpi_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint16_t val)
97 struct sdhci_acpi_softc *sc = device_get_softc(dev);
99 bus_barrier(sc->mem_res, 0, 0xFF,
100 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
101 bus_write_2(sc->mem_res, off, val);
105 sdhci_acpi_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off)
107 struct sdhci_acpi_softc *sc = device_get_softc(dev);
109 bus_barrier(sc->mem_res, 0, 0xFF,
110 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
111 return bus_read_4(sc->mem_res, off);
115 sdhci_acpi_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint32_t val)
117 struct sdhci_acpi_softc *sc = device_get_softc(dev);
119 bus_barrier(sc->mem_res, 0, 0xFF,
120 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
121 bus_write_4(sc->mem_res, off, val);
125 sdhci_acpi_read_multi_4(device_t dev, struct sdhci_slot *slot,
126 bus_size_t off, uint32_t *data, bus_size_t count)
128 struct sdhci_acpi_softc *sc = device_get_softc(dev);
130 bus_read_multi_stream_4(sc->mem_res, off, data, count);
134 sdhci_acpi_write_multi_4(device_t dev, struct sdhci_slot *slot,
135 bus_size_t off, uint32_t *data, bus_size_t count)
137 struct sdhci_acpi_softc *sc = device_get_softc(dev);
139 bus_write_multi_stream_4(sc->mem_res, off, data, count);
142 static void sdhci_acpi_intr(void *arg);
145 sdhci_acpi_probe(device_t dev)
147 static char *sdhci_ids[] = { "80860F14", "80860F16", NULL };
149 if (acpi_disabled("sdhci") ||
150 ACPI_ID_PROBE(device_get_parent(dev), dev, sdhci_ids) == NULL)
153 device_set_desc(dev, "SDHCI controller");
158 sdhci_acpi_attach(device_t dev)
160 struct sdhci_acpi_softc *sc = device_get_softc(dev);
164 sc->handle = acpi_get_handle(dev);
168 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
170 if (sc->irq_res == NULL) {
171 device_printf(dev, "Can't allocate IRQ\n");
176 /* Allocate memory. */
178 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
180 if (sc->mem_res == NULL) {
181 device_printf(dev, "Can't allocate memory for slot %d\n", 0);
186 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
187 /* The Intel sdhci controllers all work fine with ADMA2. */
188 sc->slot.quirks = SDHCI_QUIRK_WHITELIST_ADMA2;
189 if (sdhci_init_slot(dev, &sc->slot, 0) != 0) {
190 device_printf(dev, "sdhci initialization failed\n");
191 pci_set_powerstate(dev, PCI_POWERSTATE_D3);
196 device_printf(dev, "%d slot(s) allocated\n", 1);
197 /* Activate the interrupt */
198 err = bus_setup_intr(dev, sc->irq_res, INTR_MPSAFE,
199 sdhci_acpi_intr, sc, &sc->intrhand, NULL);
201 device_printf(dev, "Can't setup IRQ\n");
203 /* Process cards detection. */
204 sdhci_start_slot(&sc->slot);
209 if (sc->irq_res != NULL) {
210 bus_release_resource(dev, SYS_RES_IRQ,
211 rman_get_rid(sc->irq_res), sc->irq_res);
213 if (sc->mem_res != NULL) {
214 bus_release_resource(dev, SYS_RES_MEMORY,
215 rman_get_rid(sc->mem_res), sc->mem_res);
221 sdhci_acpi_detach(device_t dev)
223 struct sdhci_acpi_softc *sc = device_get_softc(dev);
225 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
226 bus_release_resource(dev, SYS_RES_IRQ,
227 rman_get_rid(sc->irq_res), sc->irq_res);
229 sdhci_cleanup_slot(&sc->slot);
230 bus_release_resource(dev, SYS_RES_MEMORY,
231 rman_get_rid(sc->mem_res), sc->mem_res);
232 pci_set_powerstate(dev, PCI_POWERSTATE_D3);
237 sdhci_acpi_suspend(device_t dev)
239 struct sdhci_acpi_softc *sc = device_get_softc(dev);
242 err = bus_generic_suspend(dev);
245 sdhci_generic_suspend(&sc->slot);
250 sdhci_acpi_resume(device_t dev)
252 struct sdhci_acpi_softc *sc = device_get_softc(dev);
254 sdhci_generic_resume(&sc->slot);
255 return (bus_generic_resume(dev));
259 sdhci_acpi_intr(void *arg)
261 struct sdhci_acpi_softc *sc = (struct sdhci_acpi_softc *)arg;
263 sdhci_generic_intr(&sc->slot);
266 static device_method_t sdhci_methods[] = {
268 DEVMETHOD(device_probe, sdhci_acpi_probe),
269 DEVMETHOD(device_attach, sdhci_acpi_attach),
270 DEVMETHOD(device_detach, sdhci_acpi_detach),
271 DEVMETHOD(device_suspend, sdhci_acpi_suspend),
272 DEVMETHOD(device_resume, sdhci_acpi_resume),
275 DEVMETHOD(bus_read_ivar, sdhci_generic_read_ivar),
276 DEVMETHOD(bus_write_ivar, sdhci_generic_write_ivar),
279 DEVMETHOD(mmcbr_update_ios, sdhci_generic_update_ios),
280 DEVMETHOD(mmcbr_request, sdhci_generic_request),
281 DEVMETHOD(mmcbr_get_ro, sdhci_generic_get_ro),
282 DEVMETHOD(mmcbr_acquire_host, sdhci_generic_acquire_host),
283 DEVMETHOD(mmcbr_release_host, sdhci_generic_release_host),
285 /* SDHCI registers accessors */
286 DEVMETHOD(sdhci_read_1, sdhci_acpi_read_1),
287 DEVMETHOD(sdhci_read_2, sdhci_acpi_read_2),
288 DEVMETHOD(sdhci_read_4, sdhci_acpi_read_4),
289 DEVMETHOD(sdhci_read_multi_4, sdhci_acpi_read_multi_4),
290 DEVMETHOD(sdhci_write_1, sdhci_acpi_write_1),
291 DEVMETHOD(sdhci_write_2, sdhci_acpi_write_2),
292 DEVMETHOD(sdhci_write_4, sdhci_acpi_write_4),
293 DEVMETHOD(sdhci_write_multi_4, sdhci_acpi_write_multi_4),
298 static driver_t sdhci_acpi_driver = {
301 sizeof(struct sdhci_acpi_softc),
303 static devclass_t sdhci_acpi_devclass;
305 DRIVER_MODULE(sdhci_acpi, acpi, sdhci_acpi_driver, sdhci_acpi_devclass, NULL,
307 MODULE_DEPEND(sdhci_acpi, sdhci, 1, 1, 1);