sys/dev/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28
  29 #include <drm/drmP.h>
  30 #include <drm/drm_crtc.h>
  31 #include <drm/drm_edid.h>
  32 #include "intel_drv.h"
  33 #include <drm/i915_drm.h>
  34 #include "i915_drv.h"
  35 #include "intel_sdvo_regs.h"
  36
  37 #include <bus/iicbus/iic.h>
  38 #include <bus/iicbus/iiconf.h>
  39 #include "iicbus_if.h"
  40
  41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  42 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  44 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  45
  46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  47                         SDVO_TV_MASK)
  48
  49 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  50 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  51 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  54
  55
  56 static const char *tv_format_names[] = {
  57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  63         "SECAM_60"
  64 };
  65
  66 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
  67
  68 struct intel_sdvo {
  69         struct intel_encoder base;
  70
  71         device_t i2c;
  72         u8 slave_addr;
  73
  74         device_t ddc_iic_bus, ddc;
  75
  76         /* Register for the SDVO device: SDVOB or SDVOC */
  77         uint32_t sdvo_reg;
  78
  79         /* Active outputs controlled by this SDVO output */
  80         uint16_t controlled_output;
  81
  82         /*
  83          * Capabilities of the SDVO device returned by
  84          * i830_sdvo_get_capabilities()
  85          */
  86         struct intel_sdvo_caps caps;
  87
  88         /* Pixel clock limitations reported by the SDVO device, in kHz */
  89         int pixel_clock_min, pixel_clock_max;
  90
  91         /*
  92         * For multiple function SDVO device,
  93         * this is for current attached outputs.
  94         */
  95         uint16_t attached_output;
  96
  97         /*
  98          * Hotplug activation bits for this device
  99          */
 100         uint16_t hotplug_active;
 101
 102         /**
 103          * This is used to select the color range of RBG outputs in HDMI mode.
 104          * It is only valid when using TMDS encoding and 8 bit per color mode.
 105          */
 106         uint32_t color_range;
 107         bool color_range_auto;
 108
 109         /**
 110          * This is set if we're going to treat the device as TV-out.
 111          *
 112          * While we have these nice friendly flags for output types that ought
 113          * to decide this for us, the S-Video output on our HDMI+S-Video card
 114          * shows up as RGB1 (VGA).
 115          */
 116         bool is_tv;
 117
 118         /* On different gens SDVOB is at different places. */
 119         bool is_sdvob;
 120
 121         /* This is for current tv format name */
 122         int tv_format_index;
 123
 124         /**
 125          * This is set if we treat the device as HDMI, instead of DVI.
 126          */
 127         bool is_hdmi;
 128         bool has_hdmi_monitor;
 129         bool has_hdmi_audio;
 130         bool rgb_quant_range_selectable;
 131
 132         /**
 133          * This is set if we detect output of sdvo device as LVDS and
 134          * have a valid fixed mode to use with the panel.
 135          */
 136         bool is_lvds;
 137
 138         /**
 139          * This is sdvo fixed pannel mode pointer
 140          */
 141         struct drm_display_mode *sdvo_lvds_fixed_mode;
 142
 143         /* DDC bus used by this SDVO encoder */
 144         uint8_t ddc_bus;
 145
 146         /*
 147          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 148          */
 149         uint8_t dtd_sdvo_flags;
 150 };
 151
 152 struct intel_sdvo_connector {
 153         struct intel_connector base;
 154
 155         /* Mark the type of connector */
 156         uint16_t output_flag;
 157
 158         enum hdmi_force_audio force_audio;
 159
 160         /* This contains all current supported TV format */
 161         u8 tv_format_supported[TV_FORMAT_NUM];
 162         int   format_supported_num;
 163         struct drm_property *tv_format;
 164
 165         /* add the property for the SDVO-TV */
 166         struct drm_property *left;
 167         struct drm_property *right;
 168         struct drm_property *top;
 169         struct drm_property *bottom;
 170         struct drm_property *hpos;
 171         struct drm_property *vpos;
 172         struct drm_property *contrast;
 173         struct drm_property *saturation;
 174         struct drm_property *hue;
 175         struct drm_property *sharpness;
 176         struct drm_property *flicker_filter;
 177         struct drm_property *flicker_filter_adaptive;
 178         struct drm_property *flicker_filter_2d;
 179         struct drm_property *tv_chroma_filter;
 180         struct drm_property *tv_luma_filter;
 181         struct drm_property *dot_crawl;
 182
 183         /* add the property for the SDVO-TV/LVDS */
 184         struct drm_property *brightness;
 185
 186         /* Add variable to record current setting for the above property */
 187         u32     left_margin, right_margin, top_margin, bottom_margin;
 188
 189         /* this is to get the range of margin.*/
 190         u32     max_hscan,  max_vscan;
 191         u32     max_hpos, cur_hpos;
 192         u32     max_vpos, cur_vpos;
 193         u32     cur_brightness, max_brightness;
 194         u32     cur_contrast,   max_contrast;
 195         u32     cur_saturation, max_saturation;
 196         u32     cur_hue,        max_hue;
 197         u32     cur_sharpness,  max_sharpness;
 198         u32     cur_flicker_filter,             max_flicker_filter;
 199         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 200         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 201         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 202         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 203         u32     cur_dot_crawl,  max_dot_crawl;
 204 };
 205
 206 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
 207 {
 208         return container_of(encoder, struct intel_sdvo, base.base);
 209 }
 210
 211 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 212 {
 213         return container_of(intel_attached_encoder(connector),
 214                             struct intel_sdvo, base);
 215 }
 216
 217 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
 218 {
 219         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
 220 }
 221
 222 static bool
 223 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 224 static bool
 225 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 226                               struct intel_sdvo_connector *intel_sdvo_connector,
 227                               int type);
 228 static bool
 229 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 230                                    struct intel_sdvo_connector *intel_sdvo_connector);
 231
 232 /**
 233  * Writes the SDVOB or SDVOC with the given value, but always writes both
 234  * SDVOB and SDVOC to work around apparent hardware issues (according to
 235  * comments in the BIOS).
 236  */
 237 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 238 {
 239         struct drm_device *dev = intel_sdvo->base.base.dev;
 240         struct drm_i915_private *dev_priv = dev->dev_private;
 241         u32 bval = val, cval = val;
 242         int i;
 243
 244         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
 245                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 246                 I915_READ(intel_sdvo->sdvo_reg);
 247                 return;
 248         }
 249
 250         if (intel_sdvo->sdvo_reg == GEN3_SDVOB)
 251                 cval = I915_READ(GEN3_SDVOC);
 252         else
 253                 bval = I915_READ(GEN3_SDVOB);
 254
 255         /*
 256          * Write the registers twice for luck. Sometimes,
 257          * writing them only once doesn't appear to 'stick'.
 258          * The BIOS does this too. Yay, magic
 259          */
 260         for (i = 0; i < 2; i++)
 261         {
 262                 I915_WRITE(GEN3_SDVOB, bval);
 263                 I915_READ(GEN3_SDVOB);
 264                 I915_WRITE(GEN3_SDVOC, cval);
 265                 I915_READ(GEN3_SDVOC);
 266         }
 267 }
 268
 269 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 270 {
 271         struct iic_msg msgs[] = {
 272                 {
 273                         .slave = intel_sdvo->slave_addr << 1,
 274                         .flags = 0,
 275                         .len = 1,
 276                         .buf = &addr,
 277                 },
 278                 {
 279                         .slave = intel_sdvo->slave_addr << 1,
 280                         .flags = IIC_M_RD,
 281                         .len = 1,
 282                         .buf = ch,
 283                 }
 284         };
 285         int ret;
 286
 287         if ((ret = iicbus_transfer(intel_sdvo->i2c, msgs, 2)) == 0)
 288                 return true;
 289
 290         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 291         return false;
 292 }
 293
 294 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 295 /** Mapping of command numbers to names, for debug output */
 296 static const struct _sdvo_cmd_name {
 297         u8 cmd;
 298         const char *name;
 299 } sdvo_cmd_names[] = {
 300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 343
 344         /* Add the op code for SDVO enhancements */
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 389
 390         /* HDMI op code */
 391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 407         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 408         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 409         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 410         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 411 };
 412
 413 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
 414
 415 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 416                                    const void *args, int args_len)
 417 {
 418         int i;
 419
 420         DRM_DEBUG_KMS("%s: W: %02X ",
 421                                 SDVO_NAME(intel_sdvo), cmd);
 422         for (i = 0; i < args_len; i++)
 423                 kprintf("%02X ", ((const u8 *)args)[i]);
 424         for (; i < 8; i++)
 425                 DRM_LOG_KMS("   ");
 426         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 427                 if (cmd == sdvo_cmd_names[i].cmd) {
 428                         DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
 429                         break;
 430                 }
 431         }
 432         if (i == ARRAY_SIZE(sdvo_cmd_names))
 433                 DRM_LOG_KMS("(%02X)", cmd);
 434         DRM_LOG_KMS("\n");
 435 }
 436
 437 static const char *cmd_status_names[] = {
 438         "Power on",
 439         "Success",
 440         "Not supported",
 441         "Invalid arg",
 442         "Pending",
 443         "Target not specified",
 444         "Scaling not supported"
 445 };
 446
 447 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 448                                  const void *args, int args_len)
 449 {
 450         u8 buf[args_len*2 + 2], status;
 451         struct iic_msg msgs[args_len + 3];
 452         int i, ret;
 453
 454         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 455
 456         for (i = 0; i < args_len; i++) {
 457                 msgs[i].slave = intel_sdvo->slave_addr << 1;
 458                 msgs[i].flags = 0;
 459                 msgs[i].len = 2;
 460                 msgs[i].buf = buf + 2 *i;
 461                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 462                 buf[2*i + 1] = ((const u8*)args)[i];
 463         }
 464         msgs[i].slave = intel_sdvo->slave_addr << 1;
 465         msgs[i].flags = 0;
 466         msgs[i].len = 2;
 467         msgs[i].buf = buf + 2*i;
 468         buf[2*i + 0] = SDVO_I2C_OPCODE;
 469         buf[2*i + 1] = cmd;
 470
 471         /* the following two are to read the response */
 472         status = SDVO_I2C_CMD_STATUS;
 473         msgs[i+1].slave = intel_sdvo->slave_addr << 1;
 474         msgs[i+1].flags = 0;
 475         msgs[i+1].len = 1;
 476         msgs[i+1].buf = &status;
 477
 478         msgs[i+2].slave = intel_sdvo->slave_addr << 1;
 479         msgs[i+2].flags = IIC_M_RD;
 480         msgs[i+2].len = 1;
 481         msgs[i+2].buf = &status;
 482
 483         ret = iicbus_transfer(intel_sdvo->i2c, msgs, i+3);
 484         if (ret != 0) {
 485                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 486                 return (false);
 487         }
 488 #if 0
 489         if (ret != i+3) {
 490                 /* failure in I2C transfer */
 491                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 492                 return false;
 493         }
 494 #endif
 495
 496         return true;
 497 }
 498
 499 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 500                                      void *response, int response_len)
 501 {
 502         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 503         u8 status;
 504         int i;
 505
 506         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
 507
 508         /*
 509          * The documentation states that all commands will be
 510          * processed within 15µs, and that we need only poll
 511          * the status byte a maximum of 3 times in order for the
 512          * command to be complete.
 513          *
 514          * Check 5 times in case the hardware failed to read the docs.
 515          *
 516          * Also beware that the first response by many devices is to
 517          * reply PENDING and stall for time. TVs are notorious for
 518          * requiring longer than specified to complete their replies.
 519          * Originally (in the DDX long ago), the delay was only ever 15ms
 520          * with an additional delay of 30ms applied for TVs added later after
 521          * many experiments. To accommodate both sets of delays, we do a
 522          * sequence of slow checks if the device is falling behind and fails
 523          * to reply within 5*15µs.
 524          */
 525         if (!intel_sdvo_read_byte(intel_sdvo,
 526                                   SDVO_I2C_CMD_STATUS,
 527                                   &status))
 528                 goto log_fail;
 529
 530         while (status == SDVO_CMD_STATUS_PENDING && --retry) {
 531                 if (retry < 10)
 532                         msleep(15);
 533                 else
 534                         udelay(15);
 535
 536                 if (!intel_sdvo_read_byte(intel_sdvo,
 537                                           SDVO_I2C_CMD_STATUS,
 538                                           &status))
 539                         goto log_fail;
 540         }
 541
 542         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 543                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
 544         else
 545                 DRM_LOG_KMS("(??? %d)", status);
 546
 547         if (status != SDVO_CMD_STATUS_SUCCESS)
 548                 goto log_fail;
 549
 550         /* Read the command response */
 551         for (i = 0; i < response_len; i++) {
 552                 if (!intel_sdvo_read_byte(intel_sdvo,
 553                                           SDVO_I2C_RETURN_0 + i,
 554                                           &((u8 *)response)[i]))
 555                         goto log_fail;
 556                 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
 557         }
 558         DRM_LOG_KMS("\n");
 559         return true;
 560
 561 log_fail:
 562         DRM_LOG_KMS("... failed\n");
 563         return false;
 564 }
 565
 566 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 567 {
 568         if (mode->clock >= 100000)
 569                 return 1;
 570         else if (mode->clock >= 50000)
 571                 return 2;
 572         else
 573                 return 4;
 574 }
 575
 576 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 577                                               u8 ddc_bus)
 578 {
 579         /* This must be the immediately preceding write before the i2c xfer */
 580         return intel_sdvo_write_cmd(intel_sdvo,
 581                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 582                                     &ddc_bus, 1);
 583 }
 584
 585 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 586 {
 587         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 588                 return false;
 589
 590         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 591 }
 592
 593 static bool
 594 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 595 {
 596         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 597                 return false;
 598
 599         return intel_sdvo_read_response(intel_sdvo, value, len);
 600 }
 601
 602 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 603 {
 604         struct intel_sdvo_set_target_input_args targets = {0};
 605         return intel_sdvo_set_value(intel_sdvo,
 606                                     SDVO_CMD_SET_TARGET_INPUT,
 607                                     &targets, sizeof(targets));
 608 }
 609
 610 /**
 611  * Return whether each input is trained.
 612  *
 613  * This function is making an assumption about the layout of the response,
 614  * which should be checked against the docs.
 615  */
 616 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 617 {
 618         struct intel_sdvo_get_trained_inputs_response response;
 619
 620         BUILD_BUG_ON(sizeof(response) != 1);
 621         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 622                                   &response, sizeof(response)))
 623                 return false;
 624
 625         *input_1 = response.input0_trained;
 626         *input_2 = response.input1_trained;
 627         return true;
 628 }
 629
 630 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 631                                           u16 outputs)
 632 {
 633         return intel_sdvo_set_value(intel_sdvo,
 634                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 635                                     &outputs, sizeof(outputs));
 636 }
 637
 638 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 639                                           u16 *outputs)
 640 {
 641         return intel_sdvo_get_value(intel_sdvo,
 642                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 643                                     outputs, sizeof(*outputs));
 644 }
 645
 646 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 647                                                int mode)
 648 {
 649         u8 state = SDVO_ENCODER_STATE_ON;
 650
 651         switch (mode) {
 652         case DRM_MODE_DPMS_ON:
 653                 state = SDVO_ENCODER_STATE_ON;
 654                 break;
 655         case DRM_MODE_DPMS_STANDBY:
 656                 state = SDVO_ENCODER_STATE_STANDBY;
 657                 break;
 658         case DRM_MODE_DPMS_SUSPEND:
 659                 state = SDVO_ENCODER_STATE_SUSPEND;
 660                 break;
 661         case DRM_MODE_DPMS_OFF:
 662                 state = SDVO_ENCODER_STATE_OFF;
 663                 break;
 664         }
 665
 666         return intel_sdvo_set_value(intel_sdvo,
 667                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 668 }
 669
 670 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 671                                                    int *clock_min,
 672                                                    int *clock_max)
 673 {
 674         struct intel_sdvo_pixel_clock_range clocks;
 675
 676         BUILD_BUG_ON(sizeof(clocks) != 4);
 677         if (!intel_sdvo_get_value(intel_sdvo,
 678                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 679                                   &clocks, sizeof(clocks)))
 680                 return false;
 681
 682         /* Convert the values from units of 10 kHz to kHz. */
 683         *clock_min = clocks.min * 10;
 684         *clock_max = clocks.max * 10;
 685         return true;
 686 }
 687
 688 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 689                                          u16 outputs)
 690 {
 691         return intel_sdvo_set_value(intel_sdvo,
 692                                     SDVO_CMD_SET_TARGET_OUTPUT,
 693                                     &outputs, sizeof(outputs));
 694 }
 695
 696 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 697                                   struct intel_sdvo_dtd *dtd)
 698 {
 699         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 700                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 701 }
 702
 703 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 704                                          struct intel_sdvo_dtd *dtd)
 705 {
 706         return intel_sdvo_set_timing(intel_sdvo,
 707                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 708 }
 709
 710 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 711                                          struct intel_sdvo_dtd *dtd)
 712 {
 713         return intel_sdvo_set_timing(intel_sdvo,
 714                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 715 }
 716
 717 static bool
 718 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 719                                          uint16_t clock,
 720                                          uint16_t width,
 721                                          uint16_t height)
 722 {
 723         struct intel_sdvo_preferred_input_timing_args args;
 724
 725         memset(&args, 0, sizeof(args));
 726         args.clock = clock;
 727         args.width = width;
 728         args.height = height;
 729         args.interlace = 0;
 730
 731         if (intel_sdvo->is_lvds &&
 732            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 733             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 734                 args.scaled = 1;
 735
 736         return intel_sdvo_set_value(intel_sdvo,
 737                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 738                                     &args, sizeof(args));
 739 }
 740
 741 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 742                                                   struct intel_sdvo_dtd *dtd)
 743 {
 744         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 745         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 746         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 747                                     &dtd->part1, sizeof(dtd->part1)) &&
 748                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 749                                      &dtd->part2, sizeof(dtd->part2));
 750 }
 751
 752 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 753 {
 754         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 755 }
 756
 757 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 758                                          const struct drm_display_mode *mode)
 759 {
 760         uint16_t width, height;
 761         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 762         uint16_t h_sync_offset, v_sync_offset;
 763         int mode_clock;
 764
 765         width = mode->hdisplay;
 766         height = mode->vdisplay;
 767
 768         /* do some mode translations */
 769         h_blank_len = mode->htotal - mode->hdisplay;
 770         h_sync_len = mode->hsync_end - mode->hsync_start;
 771
 772         v_blank_len = mode->vtotal - mode->vdisplay;
 773         v_sync_len = mode->vsync_end - mode->vsync_start;
 774
 775         h_sync_offset = mode->hsync_start - mode->hdisplay;
 776         v_sync_offset = mode->vsync_start - mode->vdisplay;
 777
 778         mode_clock = mode->clock;
 779         mode_clock /= 10;
 780         dtd->part1.clock = mode_clock;
 781
 782         dtd->part1.h_active = width & 0xff;
 783         dtd->part1.h_blank = h_blank_len & 0xff;
 784         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 785                 ((h_blank_len >> 8) & 0xf);
 786         dtd->part1.v_active = height & 0xff;
 787         dtd->part1.v_blank = v_blank_len & 0xff;
 788         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 789                 ((v_blank_len >> 8) & 0xf);
 790
 791         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 792         dtd->part2.h_sync_width = h_sync_len & 0xff;
 793         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 794                 (v_sync_len & 0xf);
 795         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 796                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 797                 ((v_sync_len & 0x30) >> 4);
 798
 799         dtd->part2.dtd_flags = 0x18;
 800         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 801                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 802         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 803                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 804         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 805                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 806
 807         dtd->part2.sdvo_flags = 0;
 808         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 809         dtd->part2.reserved = 0;
 810 }
 811
 812 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
 813                                          const struct intel_sdvo_dtd *dtd)
 814 {
 815         mode->hdisplay = dtd->part1.h_active;
 816         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 817         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
 818         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 819         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
 820         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 821         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
 822         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
 823
 824         mode->vdisplay = dtd->part1.v_active;
 825         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 826         mode->vsync_start = mode->vdisplay;
 827         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 828         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 829         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 830         mode->vsync_end = mode->vsync_start +
 831                 (dtd->part2.v_sync_off_width & 0xf);
 832         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 833         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
 834         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
 835
 836         mode->clock = dtd->part1.clock * 10;
 837
 838         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
 839         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 840                 mode->flags |= DRM_MODE_FLAG_INTERLACE;
 841         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 842                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
 843         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 844                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
 845 }
 846
 847 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 848 {
 849         struct intel_sdvo_encode encode;
 850
 851         BUILD_BUG_ON(sizeof(encode) != 2);
 852         return intel_sdvo_get_value(intel_sdvo,
 853                                   SDVO_CMD_GET_SUPP_ENCODE,
 854                                   &encode, sizeof(encode));
 855 }
 856
 857 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 858                                   uint8_t mode)
 859 {
 860         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 861 }
 862
 863 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 864                                        uint8_t mode)
 865 {
 866         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 867 }
 868
 869 #if 0
 870 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 871 {
 872         int i, j;
 873         uint8_t set_buf_index[2];
 874         uint8_t av_split;
 875         uint8_t buf_size;
 876         uint8_t buf[48];
 877         uint8_t *pos;
 878
 879         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 880
 881         for (i = 0; i <= av_split; i++) {
 882                 set_buf_index[0] = i; set_buf_index[1] = 0;
 883                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 884                                      set_buf_index, 2);
 885                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 886                 intel_sdvo_read_response(encoder, &buf_size, 1);
 887
 888                 pos = buf;
 889                 for (j = 0; j <= buf_size; j += 8) {
 890                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 891                                              NULL, 0);
 892                         intel_sdvo_read_response(encoder, pos, 8);
 893                         pos += 8;
 894                 }
 895         }
 896 }
 897 #endif
 898
 899 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 900                                        unsigned if_index, uint8_t tx_rate,
 901                                        uint8_t *data, unsigned length)
 902 {
 903         uint8_t set_buf_index[2] = { if_index, 0 };
 904         uint8_t hbuf_size, tmp[8];
 905         int i;
 906
 907         if (!intel_sdvo_set_value(intel_sdvo,
 908                                   SDVO_CMD_SET_HBUF_INDEX,
 909                                   set_buf_index, 2))
 910                 return false;
 911
 912         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 913                                   &hbuf_size, 1))
 914                 return false;
 915
 916         /* Buffer size is 0 based, hooray! */
 917         hbuf_size++;
 918
 919         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 920                       if_index, length, hbuf_size);
 921
 922         for (i = 0; i < hbuf_size; i += 8) {
 923                 memset(tmp, 0, 8);
 924                 if (i < length)
 925                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 926
 927                 if (!intel_sdvo_set_value(intel_sdvo,
 928                                           SDVO_CMD_SET_HBUF_DATA,
 929                                           tmp, 8))
 930                         return false;
 931         }
 932
 933         return intel_sdvo_set_value(intel_sdvo,
 934                                     SDVO_CMD_SET_HBUF_TXRATE,
 935                                     &tx_rate, 1);
 936 }
 937
 938 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
 939                                          const struct drm_display_mode *adjusted_mode)
 940 {
 941         struct dip_infoframe avi_if = {
 942                 .type = DIP_TYPE_AVI,
 943                 .ver = DIP_VERSION_AVI,
 944                 .len = DIP_LEN_AVI,
 945         };
 946         uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
 947         struct intel_crtc *intel_crtc = to_intel_crtc(intel_sdvo->base.base.crtc);
 948
 949         if (intel_sdvo->rgb_quant_range_selectable) {
 950                 if (intel_crtc->config.limited_color_range)
 951                         avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED;
 952                 else
 953                         avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL;
 954         }
 955
 956         avi_if.body.avi.VIC = drm_match_cea_mode(adjusted_mode);
 957
 958         intel_dip_infoframe_csum(&avi_if);
 959
 960         /* sdvo spec says that the ecc is handled by the hw, and it looks like
 961          * we must not send the ecc field, either. */
 962         memcpy(sdvo_data, &avi_if, 3);
 963         sdvo_data[3] = avi_if.checksum;
 964         memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
 965
 966         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
 967                                           SDVO_HBUF_TX_VSYNC,
 968                                           sdvo_data, sizeof(sdvo_data));
 969 }
 970
 971 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
 972 {
 973         struct intel_sdvo_tv_format format;
 974         uint32_t format_map;
 975
 976         format_map = 1 << intel_sdvo->tv_format_index;
 977         memset(&format, 0, sizeof(format));
 978         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
 979
 980         BUILD_BUG_ON(sizeof(format) != 6);
 981         return intel_sdvo_set_value(intel_sdvo,
 982                                     SDVO_CMD_SET_TV_FORMAT,
 983                                     &format, sizeof(format));
 984 }
 985
 986 static bool
 987 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
 988                                         const struct drm_display_mode *mode)
 989 {
 990         struct intel_sdvo_dtd output_dtd;
 991
 992         if (!intel_sdvo_set_target_output(intel_sdvo,
 993                                           intel_sdvo->attached_output))
 994                 return false;
 995
 996         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
 997         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
 998                 return false;
 999
1000         return true;
1001 }
1002
1003 /* Asks the sdvo controller for the preferred input mode given the output mode.
1004  * Unfortunately we have to set up the full output mode to do that. */
1005 static bool
1006 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1007                                     const struct drm_display_mode *mode,
1008                                     struct drm_display_mode *adjusted_mode)
1009 {
1010         struct intel_sdvo_dtd input_dtd;
1011
1012         /* Reset the input timing to the screen. Assume always input 0. */
1013         if (!intel_sdvo_set_target_input(intel_sdvo))
1014                 return false;
1015
1016         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1017                                                       mode->clock / 10,
1018                                                       mode->hdisplay,
1019                                                       mode->vdisplay))
1020                 return false;
1021
1022         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1023                                                    &input_dtd))
1024                 return false;
1025
1026         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1027         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1028
1029         return true;
1030 }
1031
1032 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1033                                       struct intel_crtc_config *pipe_config)
1034 {
1035         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1036         struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
1037         struct drm_display_mode *mode = &pipe_config->requested_mode;
1038
1039         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1040         pipe_config->pipe_bpp = 8*3;
1041
1042         if (HAS_PCH_SPLIT(encoder->base.dev))
1043                 pipe_config->has_pch_encoder = true;
1044
1045         /* We need to construct preferred input timings based on our
1046          * output timings.  To do that, we have to set the output
1047          * timings, even though this isn't really the right place in
1048          * the sequence to do it. Oh well.
1049          */
1050         if (intel_sdvo->is_tv) {
1051                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1052                         return false;
1053
1054                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1055                                                            mode,
1056                                                            adjusted_mode);
1057         } else if (intel_sdvo->is_lvds) {
1058                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1059                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1060                         return false;
1061
1062                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1063                                                            mode,
1064                                                            adjusted_mode);
1065         }
1066
1067         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1068          * SDVO device will factor out the multiplier during mode_set.
1069          */
1070         pipe_config->pixel_multiplier =
1071                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1072         adjusted_mode->clock *= pipe_config->pixel_multiplier;
1073
1074         if (intel_sdvo->color_range_auto) {
1075                 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1076                 /* FIXME: This bit is only valid when using TMDS encoding and 8
1077                  * bit per color mode. */
1078                 if (intel_sdvo->has_hdmi_monitor &&
1079                     drm_match_cea_mode(adjusted_mode) > 1)
1080                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
1081                 else
1082                         intel_sdvo->color_range = 0;
1083         }
1084
1085         if (intel_sdvo->color_range)
1086                 pipe_config->limited_color_range = true;
1087
1088         return true;
1089 }
1090
1091 static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
1092 {
1093         struct drm_device *dev = intel_encoder->base.dev;
1094         struct drm_i915_private *dev_priv = dev->dev_private;
1095         struct drm_crtc *crtc = intel_encoder->base.crtc;
1096         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1097         struct drm_display_mode *adjusted_mode =
1098                 &intel_crtc->config.adjusted_mode;
1099         struct drm_display_mode *mode = &intel_crtc->config.requested_mode;
1100         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&intel_encoder->base);
1101         u32 sdvox;
1102         struct intel_sdvo_in_out_map in_out;
1103         struct intel_sdvo_dtd input_dtd, output_dtd;
1104         int rate;
1105
1106         if (!mode)
1107                 return;
1108
1109         /* First, set the input mapping for the first input to our controlled
1110          * output. This is only correct if we're a single-input device, in
1111          * which case the first input is the output from the appropriate SDVO
1112          * channel on the motherboard.  In a two-input device, the first input
1113          * will be SDVOB and the second SDVOC.
1114          */
1115         in_out.in0 = intel_sdvo->attached_output;
1116         in_out.in1 = 0;
1117
1118         intel_sdvo_set_value(intel_sdvo,
1119                              SDVO_CMD_SET_IN_OUT_MAP,
1120                              &in_out, sizeof(in_out));
1121
1122         /* Set the output timings to the screen */
1123         if (!intel_sdvo_set_target_output(intel_sdvo,
1124                                           intel_sdvo->attached_output))
1125                 return;
1126
1127         /* lvds has a special fixed output timing. */
1128         if (intel_sdvo->is_lvds)
1129                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1130                                              intel_sdvo->sdvo_lvds_fixed_mode);
1131         else
1132                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1133         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1134                 DRM_INFO("Setting output timings on %s failed\n",
1135                          SDVO_NAME(intel_sdvo));
1136
1137         /* Set the input timing to the screen. Assume always input 0. */
1138         if (!intel_sdvo_set_target_input(intel_sdvo))
1139                 return;
1140
1141         if (intel_sdvo->has_hdmi_monitor) {
1142                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1143                 intel_sdvo_set_colorimetry(intel_sdvo,
1144                                            SDVO_COLORIMETRY_RGB256);
1145                 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
1146         } else
1147                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1148
1149         if (intel_sdvo->is_tv &&
1150             !intel_sdvo_set_tv_format(intel_sdvo))
1151                 return;
1152
1153         /* We have tried to get input timing in mode_fixup, and filled into
1154          * adjusted_mode.
1155          */
1156         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1157         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1158                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1159         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1160                 DRM_INFO("Setting input timings on %s failed\n",
1161                          SDVO_NAME(intel_sdvo));
1162
1163         switch (intel_crtc->config.pixel_multiplier) {
1164         default:
1165         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1166         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1167         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1168         }
1169         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1170                 return;
1171
1172         /* Set the SDVO control regs. */
1173         if (INTEL_INFO(dev)->gen >= 4) {
1174                 /* The real mode polarity is set by the SDVO commands, using
1175                  * struct intel_sdvo_dtd. */
1176                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1177                 if (!HAS_PCH_SPLIT(dev) && intel_sdvo->is_hdmi)
1178                         sdvox |= intel_sdvo->color_range;
1179                 if (INTEL_INFO(dev)->gen < 5)
1180                         sdvox |= SDVO_BORDER_ENABLE;
1181         } else {
1182                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1183                 switch (intel_sdvo->sdvo_reg) {
1184                 case GEN3_SDVOB:
1185                         sdvox &= SDVOB_PRESERVE_MASK;
1186                         break;
1187                 case GEN3_SDVOC:
1188                         sdvox &= SDVOC_PRESERVE_MASK;
1189                         break;
1190                 }
1191                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1192         }
1193
1194         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1195                 sdvox |= SDVO_PIPE_SEL_CPT(intel_crtc->pipe);
1196         else
1197                 sdvox |= SDVO_PIPE_SEL(intel_crtc->pipe);
1198
1199         if (intel_sdvo->has_hdmi_audio)
1200                 sdvox |= SDVO_AUDIO_ENABLE;
1201
1202         if (INTEL_INFO(dev)->gen >= 4) {
1203                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1204         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1205                 /* done in crtc_mode_set as it lives inside the dpll register */
1206         } else {
1207                 sdvox |= (intel_crtc->config.pixel_multiplier - 1)
1208                         << SDVO_PORT_MULTIPLY_SHIFT;
1209         }
1210
1211         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1212             INTEL_INFO(dev)->gen < 5)
1213                 sdvox |= SDVO_STALL_SELECT;
1214         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1215 }
1216
1217 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1218 {
1219         struct intel_sdvo_connector *intel_sdvo_connector =
1220                 to_intel_sdvo_connector(&connector->base);
1221         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1222         u16 active_outputs;
1223
1224         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1225
1226         if (active_outputs & intel_sdvo_connector->output_flag)
1227                 return true;
1228         else
1229                 return false;
1230 }
1231
1232 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1233                                     enum i915_pipe *pipe)
1234 {
1235         struct drm_device *dev = encoder->base.dev;
1236         struct drm_i915_private *dev_priv = dev->dev_private;
1237         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1238         u16 active_outputs;
1239         u32 tmp;
1240
1241         tmp = I915_READ(intel_sdvo->sdvo_reg);
1242         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1243
1244         if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1245                 return false;
1246
1247         if (HAS_PCH_CPT(dev))
1248                 *pipe = PORT_TO_PIPE_CPT(tmp);
1249         else
1250                 *pipe = PORT_TO_PIPE(tmp);
1251
1252         return true;
1253 }
1254
1255 static void intel_disable_sdvo(struct intel_encoder *encoder)
1256 {
1257         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1258         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1259         u32 temp;
1260
1261         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1262         if (0)
1263                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1264                                                    DRM_MODE_DPMS_OFF);
1265
1266         temp = I915_READ(intel_sdvo->sdvo_reg);
1267         if ((temp & SDVO_ENABLE) != 0) {
1268                 /* HW workaround for IBX, we need to move the port to
1269                  * transcoder A before disabling it. */
1270                 if (HAS_PCH_IBX(encoder->base.dev)) {
1271                         struct drm_crtc *crtc = encoder->base.crtc;
1272                         int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1273
1274                         if (temp & SDVO_PIPE_B_SELECT) {
1275                                 temp &= ~SDVO_PIPE_B_SELECT;
1276                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1277                                 POSTING_READ(intel_sdvo->sdvo_reg);
1278
1279                                 /* Again we need to write this twice. */
1280                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1281                                 POSTING_READ(intel_sdvo->sdvo_reg);
1282
1283                                 /* Transcoder selection bits only update
1284                                  * effectively on vblank. */
1285                                 if (crtc)
1286                                         intel_wait_for_vblank(encoder->base.dev, pipe);
1287                                 else
1288                                         msleep(50);
1289                         }
1290                 }
1291
1292                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1293         }
1294 }
1295
1296 static void intel_enable_sdvo(struct intel_encoder *encoder)
1297 {
1298         struct drm_device *dev = encoder->base.dev;
1299         struct drm_i915_private *dev_priv = dev->dev_private;
1300         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1301         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1302         u32 temp;
1303         bool input1, input2;
1304         int i;
1305         u8 status;
1306
1307         temp = I915_READ(intel_sdvo->sdvo_reg);
1308         if ((temp & SDVO_ENABLE) == 0) {
1309                 /* HW workaround for IBX, we need to move the port
1310                  * to transcoder A before disabling it, so restore it here. */
1311                 if (HAS_PCH_IBX(dev))
1312                         temp |= SDVO_PIPE_SEL(intel_crtc->pipe);
1313
1314                 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1315         }
1316         for (i = 0; i < 2; i++)
1317                 intel_wait_for_vblank(dev, intel_crtc->pipe);
1318
1319         status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1320         /* Warn if the device reported failure to sync.
1321          * A lot of SDVO devices fail to notify of sync, but it's
1322          * a given it the status is a success, we succeeded.
1323          */
1324         if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1325                 DRM_DEBUG_KMS("First %s output reported failure to "
1326                                 "sync\n", SDVO_NAME(intel_sdvo));
1327         }
1328
1329         if (0)
1330                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1331                                                    DRM_MODE_DPMS_ON);
1332         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1333 }
1334
1335 static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
1336 {
1337         struct drm_crtc *crtc;
1338         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1339
1340         /* dvo supports only 2 dpms states. */
1341         if (mode != DRM_MODE_DPMS_ON)
1342                 mode = DRM_MODE_DPMS_OFF;
1343
1344         if (mode == connector->dpms)
1345                 return;
1346
1347         connector->dpms = mode;
1348
1349         /* Only need to change hw state when actually enabled */
1350         crtc = intel_sdvo->base.base.crtc;
1351         if (!crtc) {
1352                 intel_sdvo->base.connectors_active = false;
1353                 return;
1354         }
1355
1356         if (mode != DRM_MODE_DPMS_ON) {
1357                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1358                 if (0)
1359                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1360
1361                 intel_sdvo->base.connectors_active = false;
1362
1363                 intel_crtc_update_dpms(crtc);
1364         } else {
1365                 intel_sdvo->base.connectors_active = true;
1366
1367                 intel_crtc_update_dpms(crtc);
1368
1369                 if (0)
1370                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1371                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1372         }
1373
1374         intel_modeset_check_state(connector->dev);
1375 }
1376
1377 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1378                                  struct drm_display_mode *mode)
1379 {
1380         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1381
1382         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1383                 return MODE_NO_DBLESCAN;
1384
1385         if (intel_sdvo->pixel_clock_min > mode->clock)
1386                 return MODE_CLOCK_LOW;
1387
1388         if (intel_sdvo->pixel_clock_max < mode->clock)
1389                 return MODE_CLOCK_HIGH;
1390
1391         if (intel_sdvo->is_lvds) {
1392                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1393                         return MODE_PANEL;
1394
1395                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1396                         return MODE_PANEL;
1397         }
1398
1399         return MODE_OK;
1400 }
1401
1402 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1403 {
1404         BUILD_BUG_ON(sizeof(*caps) != 8);
1405         if (!intel_sdvo_get_value(intel_sdvo,
1406                                   SDVO_CMD_GET_DEVICE_CAPS,
1407                                   caps, sizeof(*caps)))
1408                 return false;
1409
1410         DRM_DEBUG_KMS("SDVO capabilities:\n"
1411                       "  vendor_id: %d\n"
1412                       "  device_id: %d\n"
1413                       "  device_rev_id: %d\n"
1414                       "  sdvo_version_major: %d\n"
1415                       "  sdvo_version_minor: %d\n"
1416                       "  sdvo_inputs_mask: %d\n"
1417                       "  smooth_scaling: %d\n"
1418                       "  sharp_scaling: %d\n"
1419                       "  up_scaling: %d\n"
1420                       "  down_scaling: %d\n"
1421                       "  stall_support: %d\n"
1422                       "  output_flags: %d\n",
1423                       caps->vendor_id,
1424                       caps->device_id,
1425                       caps->device_rev_id,
1426                       caps->sdvo_version_major,
1427                       caps->sdvo_version_minor,
1428                       caps->sdvo_inputs_mask,
1429                       caps->smooth_scaling,
1430                       caps->sharp_scaling,
1431                       caps->up_scaling,
1432                       caps->down_scaling,
1433                       caps->stall_support,
1434                       caps->output_flags);
1435
1436         return true;
1437 }
1438
1439 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1440 {
1441         struct drm_device *dev = intel_sdvo->base.base.dev;
1442         uint16_t hotplug;
1443
1444         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1445          * on the line. */
1446         if (IS_I945G(dev) || IS_I945GM(dev))
1447                 return 0;
1448
1449         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1450                                         &hotplug, sizeof(hotplug)))
1451                 return 0;
1452
1453         return hotplug;
1454 }
1455
1456 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1457 {
1458         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1459
1460         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1461                         &intel_sdvo->hotplug_active, 2);
1462 }
1463
1464 static bool
1465 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1466 {
1467         /* Is there more than one type of output? */
1468         return hweight16(intel_sdvo->caps.output_flags) > 1;
1469 }
1470
1471 static struct edid *
1472 intel_sdvo_get_edid(struct drm_connector *connector)
1473 {
1474         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1475         return drm_get_edid(connector, sdvo->ddc);
1476 }
1477
1478 /* Mac mini hack -- use the same DDC as the analog connector */
1479 static struct edid *
1480 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1481 {
1482         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1483
1484         return drm_get_edid(connector,
1485                             intel_gmbus_get_adapter(dev_priv,
1486                                                     dev_priv->crt_ddc_pin));
1487 }
1488
1489 static enum drm_connector_status
1490 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1491 {
1492         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1493         enum drm_connector_status status;
1494         struct edid *edid;
1495
1496         edid = intel_sdvo_get_edid(connector);
1497
1498         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1499                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1500
1501                 /*
1502                  * Don't use the 1 as the argument of DDC bus switch to get
1503                  * the EDID. It is used for SDVO SPD ROM.
1504                  */
1505                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1506                         intel_sdvo->ddc_bus = ddc;
1507                         edid = intel_sdvo_get_edid(connector);
1508                         if (edid)
1509                                 break;
1510                 }
1511                 /*
1512                  * If we found the EDID on the other bus,
1513                  * assume that is the correct DDC bus.
1514                  */
1515                 if (edid == NULL)
1516                         intel_sdvo->ddc_bus = saved_ddc;
1517         }
1518
1519         /*
1520          * When there is no edid and no monitor is connected with VGA
1521          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1522          */
1523         if (edid == NULL)
1524                 edid = intel_sdvo_get_analog_edid(connector);
1525
1526         status = connector_status_unknown;
1527         if (edid != NULL) {
1528                 /* DDC bus is shared, match EDID to connector type */
1529                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1530                         status = connector_status_connected;
1531                         if (intel_sdvo->is_hdmi) {
1532                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1533                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1534                                 intel_sdvo->rgb_quant_range_selectable =
1535                                         drm_rgb_quant_range_selectable(edid);
1536                         }
1537                 } else
1538                         status = connector_status_disconnected;
1539                 drm_free(edid, M_DRM);
1540         }
1541
1542         if (status == connector_status_connected) {
1543                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1544                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1545                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1546         }
1547
1548         return status;
1549 }
1550
1551 static bool
1552 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1553                                   struct edid *edid)
1554 {
1555         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1556         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1557
1558         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1559                       connector_is_digital, monitor_is_digital);
1560         return connector_is_digital == monitor_is_digital;
1561 }
1562
1563 static enum drm_connector_status
1564 intel_sdvo_detect(struct drm_connector *connector, bool force)
1565 {
1566         uint16_t response;
1567         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1568         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1569         enum drm_connector_status ret;
1570
1571         if (!intel_sdvo_get_value(intel_sdvo,
1572                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1573                                   &response, 2))
1574                 return connector_status_unknown;
1575
1576         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1577                       response & 0xff, response >> 8,
1578                       intel_sdvo_connector->output_flag);
1579
1580         if (response == 0)
1581                 return connector_status_disconnected;
1582
1583         intel_sdvo->attached_output = response;
1584
1585         intel_sdvo->has_hdmi_monitor = false;
1586         intel_sdvo->has_hdmi_audio = false;
1587         intel_sdvo->rgb_quant_range_selectable = false;
1588
1589         if ((intel_sdvo_connector->output_flag & response) == 0)
1590                 ret = connector_status_disconnected;
1591         else if (IS_TMDS(intel_sdvo_connector))
1592                 ret = intel_sdvo_tmds_sink_detect(connector);
1593         else {
1594                 struct edid *edid;
1595
1596                 /* if we have an edid check it matches the connection */
1597                 edid = intel_sdvo_get_edid(connector);
1598                 if (edid == NULL)
1599                         edid = intel_sdvo_get_analog_edid(connector);
1600                 if (edid != NULL) {
1601                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1602                                                               edid))
1603                                 ret = connector_status_connected;
1604                         else
1605                                 ret = connector_status_disconnected;
1606
1607                         kfree(edid);
1608                 } else
1609                         ret = connector_status_connected;
1610         }
1611
1612         /* May update encoder flag for like clock for SDVO TV, etc.*/
1613         if (ret == connector_status_connected) {
1614                 intel_sdvo->is_tv = false;
1615                 intel_sdvo->is_lvds = false;
1616                 intel_sdvo->base.needs_tv_clock = false;
1617
1618                 if (response & SDVO_TV_MASK) {
1619                         intel_sdvo->is_tv = true;
1620                         intel_sdvo->base.needs_tv_clock = true;
1621                 }
1622                 if (response & SDVO_LVDS_MASK)
1623                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1624         }
1625
1626         return ret;
1627 }
1628
1629 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1630 {
1631         struct edid *edid;
1632
1633         /* set the bus switch and get the modes */
1634         edid = intel_sdvo_get_edid(connector);
1635
1636         /*
1637          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1638          * link between analog and digital outputs. So, if the regular SDVO
1639          * DDC fails, check to see if the analog output is disconnected, in
1640          * which case we'll look there for the digital DDC data.
1641          */
1642         if (edid == NULL)
1643                 edid = intel_sdvo_get_analog_edid(connector);
1644
1645         if (edid != NULL) {
1646                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1647                                                       edid)) {
1648                         drm_mode_connector_update_edid_property(connector, edid);
1649                         drm_add_edid_modes(connector, edid);
1650                 }
1651
1652                 drm_free(edid, M_DRM);
1653         }
1654 }
1655
1656 /*
1657  * Set of SDVO TV modes.
1658  * Note!  This is in reply order (see loop in get_tv_modes).
1659  * XXX: all 60Hz refresh?
1660  */
1661 static const struct drm_display_mode sdvo_tv_modes[] = {
1662         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1663                    416, 0, 200, 201, 232, 233, 0,
1664                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1665         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1666                    416, 0, 240, 241, 272, 273, 0,
1667                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1668         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1669                    496, 0, 300, 301, 332, 333, 0,
1670                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1671         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1672                    736, 0, 350, 351, 382, 383, 0,
1673                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1674         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1675                    736, 0, 400, 401, 432, 433, 0,
1676                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1677         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1678                    736, 0, 480, 481, 512, 513, 0,
1679                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1680         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1681                    800, 0, 480, 481, 512, 513, 0,
1682                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1683         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1684                    800, 0, 576, 577, 608, 609, 0,
1685                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1686         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1687                    816, 0, 350, 351, 382, 383, 0,
1688                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1689         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1690                    816, 0, 400, 401, 432, 433, 0,
1691                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1692         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1693                    816, 0, 480, 481, 512, 513, 0,
1694                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1695         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1696                    816, 0, 540, 541, 572, 573, 0,
1697                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1698         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1699                    816, 0, 576, 577, 608, 609, 0,
1700                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1701         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1702                    864, 0, 576, 577, 608, 609, 0,
1703                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1704         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1705                    896, 0, 600, 601, 632, 633, 0,
1706                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1707         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1708                    928, 0, 624, 625, 656, 657, 0,
1709                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1710         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1711                    1016, 0, 766, 767, 798, 799, 0,
1712                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1713         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1714                    1120, 0, 768, 769, 800, 801, 0,
1715                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1716         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1717                    1376, 0, 1024, 1025, 1056, 1057, 0,
1718                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1719 };
1720
1721 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1722 {
1723         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1724         struct intel_sdvo_sdtv_resolution_request tv_res;
1725         uint32_t reply = 0, format_map = 0;
1726         int i;
1727
1728         /* Read the list of supported input resolutions for the selected TV
1729          * format.
1730          */
1731         format_map = 1 << intel_sdvo->tv_format_index;
1732         memcpy(&tv_res, &format_map,
1733                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1734
1735         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1736                 return;
1737
1738         BUILD_BUG_ON(sizeof(tv_res) != 3);
1739         if (!intel_sdvo_write_cmd(intel_sdvo,
1740                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1741                                   &tv_res, sizeof(tv_res)))
1742                 return;
1743         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1744                 return;
1745
1746         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1747                 if (reply & (1 << i)) {
1748                         struct drm_display_mode *nmode;
1749                         nmode = drm_mode_duplicate(connector->dev,
1750                                                    &sdvo_tv_modes[i]);
1751                         if (nmode)
1752                                 drm_mode_probed_add(connector, nmode);
1753                 }
1754 }
1755
1756 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1757 {
1758         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1759         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1760         struct drm_display_mode *newmode;
1761
1762         /*
1763          * Attempt to get the mode list from DDC.
1764          * Assume that the preferred modes are
1765          * arranged in priority order.
1766          */
1767         intel_ddc_get_modes(connector, intel_sdvo->ddc);
1768
1769         /*
1770          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1771          * SDVO->LVDS transcoders can't cope with the EDID mode. Since
1772          * drm_mode_probed_add adds the mode at the head of the list we add it
1773          * last.
1774          */
1775         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1776                 newmode = drm_mode_duplicate(connector->dev,
1777                                              dev_priv->sdvo_lvds_vbt_mode);
1778                 if (newmode != NULL) {
1779                         /* Guarantee the mode is preferred */
1780                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1781                                          DRM_MODE_TYPE_DRIVER);
1782                         drm_mode_probed_add(connector, newmode);
1783                 }
1784         }
1785
1786         list_for_each_entry(newmode, &connector->probed_modes, head) {
1787                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1788                         intel_sdvo->sdvo_lvds_fixed_mode =
1789                                 drm_mode_duplicate(connector->dev, newmode);
1790
1791                         intel_sdvo->is_lvds = true;
1792                         break;
1793                 }
1794         }
1795
1796 }
1797
1798 static int intel_sdvo_get_modes(struct drm_connector *connector)
1799 {
1800         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1801
1802         if (IS_TV(intel_sdvo_connector))
1803                 intel_sdvo_get_tv_modes(connector);
1804         else if (IS_LVDS(intel_sdvo_connector))
1805                 intel_sdvo_get_lvds_modes(connector);
1806         else
1807                 intel_sdvo_get_ddc_modes(connector);
1808
1809         return !list_empty(&connector->probed_modes);
1810 }
1811
1812 static void
1813 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1814 {
1815         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1816         struct drm_device *dev = connector->dev;
1817
1818         if (intel_sdvo_connector->left)
1819                 drm_property_destroy(dev, intel_sdvo_connector->left);
1820         if (intel_sdvo_connector->right)
1821                 drm_property_destroy(dev, intel_sdvo_connector->right);
1822         if (intel_sdvo_connector->top)
1823                 drm_property_destroy(dev, intel_sdvo_connector->top);
1824         if (intel_sdvo_connector->bottom)
1825                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1826         if (intel_sdvo_connector->hpos)
1827                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1828         if (intel_sdvo_connector->vpos)
1829                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1830         if (intel_sdvo_connector->saturation)
1831                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1832         if (intel_sdvo_connector->contrast)
1833                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1834         if (intel_sdvo_connector->hue)
1835                 drm_property_destroy(dev, intel_sdvo_connector->hue);
1836         if (intel_sdvo_connector->sharpness)
1837                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1838         if (intel_sdvo_connector->flicker_filter)
1839                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1840         if (intel_sdvo_connector->flicker_filter_2d)
1841                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1842         if (intel_sdvo_connector->flicker_filter_adaptive)
1843                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1844         if (intel_sdvo_connector->tv_luma_filter)
1845                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1846         if (intel_sdvo_connector->tv_chroma_filter)
1847                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1848         if (intel_sdvo_connector->dot_crawl)
1849                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1850         if (intel_sdvo_connector->brightness)
1851                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1852 }
1853
1854 static void intel_sdvo_destroy(struct drm_connector *connector)
1855 {
1856         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1857
1858         if (intel_sdvo_connector->tv_format)
1859                 drm_property_destroy(connector->dev,
1860                                      intel_sdvo_connector->tv_format);
1861
1862         intel_sdvo_destroy_enhance_property(connector);
1863 #if 0
1864         drm_sysfs_connector_remove(connector);
1865 #endif
1866         drm_connector_cleanup(connector);
1867         drm_free(intel_sdvo_connector, M_DRM);
1868 }
1869
1870 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1871 {
1872         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1873         struct edid *edid;
1874         bool has_audio = false;
1875
1876         if (!intel_sdvo->is_hdmi)
1877                 return false;
1878
1879         edid = intel_sdvo_get_edid(connector);
1880         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1881                 has_audio = drm_detect_monitor_audio(edid);
1882
1883         return has_audio;
1884 }
1885
1886 static int
1887 intel_sdvo_set_property(struct drm_connector *connector,
1888                         struct drm_property *property,
1889                         uint64_t val)
1890 {
1891         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1892         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1893         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1894         uint16_t temp_value;
1895         uint8_t cmd;
1896         int ret;
1897
1898         ret = drm_object_property_set_value(&connector->base, property, val);
1899         if (ret)
1900                 return ret;
1901
1902         if (property == dev_priv->force_audio_property) {
1903                 int i = val;
1904                 bool has_audio;
1905
1906                 if (i == intel_sdvo_connector->force_audio)
1907                         return 0;
1908
1909                 intel_sdvo_connector->force_audio = i;
1910
1911                 if (i == HDMI_AUDIO_AUTO)
1912                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
1913                 else
1914                         has_audio = (i == HDMI_AUDIO_ON);
1915
1916                 if (has_audio == intel_sdvo->has_hdmi_audio)
1917                         return 0;
1918
1919                 intel_sdvo->has_hdmi_audio = has_audio;
1920                 goto done;
1921         }
1922
1923         if (property == dev_priv->broadcast_rgb_property) {
1924                 bool old_auto = intel_sdvo->color_range_auto;
1925                 uint32_t old_range = intel_sdvo->color_range;
1926
1927                 switch (val) {
1928                 case INTEL_BROADCAST_RGB_AUTO:
1929                         intel_sdvo->color_range_auto = true;
1930                         break;
1931                 case INTEL_BROADCAST_RGB_FULL:
1932                         intel_sdvo->color_range_auto = false;
1933                         intel_sdvo->color_range = 0;
1934                         break;
1935                 case INTEL_BROADCAST_RGB_LIMITED:
1936                         intel_sdvo->color_range_auto = false;
1937                         /* FIXME: this bit is only valid when using TMDS
1938                          * encoding and 8 bit per color mode. */
1939                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
1940                         break;
1941                 default:
1942                         return -EINVAL;
1943                 }
1944
1945                 if (old_auto == intel_sdvo->color_range_auto &&
1946                     old_range == intel_sdvo->color_range)
1947                         return 0;
1948
1949                 goto done;
1950         }
1951
1952 #define CHECK_PROPERTY(name, NAME) \
1953         if (intel_sdvo_connector->name == property) { \
1954                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1955                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1956                 cmd = SDVO_CMD_SET_##NAME; \
1957                 intel_sdvo_connector->cur_##name = temp_value; \
1958                 goto set_value; \
1959         }
1960
1961         if (property == intel_sdvo_connector->tv_format) {
1962                 if (val >= TV_FORMAT_NUM)
1963                         return -EINVAL;
1964
1965                 if (intel_sdvo->tv_format_index ==
1966                     intel_sdvo_connector->tv_format_supported[val])
1967                         return 0;
1968
1969                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1970                 goto done;
1971         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1972                 temp_value = val;
1973                 if (intel_sdvo_connector->left == property) {
1974                         drm_object_property_set_value(&connector->base,
1975                                                          intel_sdvo_connector->right, val);
1976                         if (intel_sdvo_connector->left_margin == temp_value)
1977                                 return 0;
1978
1979                         intel_sdvo_connector->left_margin = temp_value;
1980                         intel_sdvo_connector->right_margin = temp_value;
1981                         temp_value = intel_sdvo_connector->max_hscan -
1982                                 intel_sdvo_connector->left_margin;
1983                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1984                         goto set_value;
1985                 } else if (intel_sdvo_connector->right == property) {
1986                         drm_object_property_set_value(&connector->base,
1987                                                          intel_sdvo_connector->left, val);
1988                         if (intel_sdvo_connector->right_margin == temp_value)
1989                                 return 0;
1990
1991                         intel_sdvo_connector->left_margin = temp_value;
1992                         intel_sdvo_connector->right_margin = temp_value;
1993                         temp_value = intel_sdvo_connector->max_hscan -
1994                                 intel_sdvo_connector->left_margin;
1995                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1996                         goto set_value;
1997                 } else if (intel_sdvo_connector->top == property) {
1998                         drm_object_property_set_value(&connector->base,
1999                                                          intel_sdvo_connector->bottom, val);
2000                         if (intel_sdvo_connector->top_margin == temp_value)
2001                                 return 0;
2002
2003                         intel_sdvo_connector->top_margin = temp_value;
2004                         intel_sdvo_connector->bottom_margin = temp_value;
2005                         temp_value = intel_sdvo_connector->max_vscan -
2006                                 intel_sdvo_connector->top_margin;
2007                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2008                         goto set_value;
2009                 } else if (intel_sdvo_connector->bottom == property) {
2010                         drm_object_property_set_value(&connector->base,
2011                                                          intel_sdvo_connector->top, val);
2012                         if (intel_sdvo_connector->bottom_margin == temp_value)
2013                                 return 0;
2014
2015                         intel_sdvo_connector->top_margin = temp_value;
2016                         intel_sdvo_connector->bottom_margin = temp_value;
2017                         temp_value = intel_sdvo_connector->max_vscan -
2018                                 intel_sdvo_connector->top_margin;
2019                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2020                         goto set_value;
2021                 }
2022                 CHECK_PROPERTY(hpos, HPOS)
2023                 CHECK_PROPERTY(vpos, VPOS)
2024                 CHECK_PROPERTY(saturation, SATURATION)
2025                 CHECK_PROPERTY(contrast, CONTRAST)
2026                 CHECK_PROPERTY(hue, HUE)
2027                 CHECK_PROPERTY(brightness, BRIGHTNESS)
2028                 CHECK_PROPERTY(sharpness, SHARPNESS)
2029                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2030                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2031                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2032                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2033                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
2034                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
2035         }
2036
2037         return -EINVAL; /* unknown property */
2038
2039 set_value:
2040         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2041                 return -EIO;
2042
2043
2044 done:
2045         if (intel_sdvo->base.base.crtc)
2046                 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
2047
2048         return 0;
2049 #undef CHECK_PROPERTY
2050 }
2051
2052 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
2053         .disable = intel_encoder_noop,
2054 };
2055
2056 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2057         .dpms = intel_sdvo_dpms,
2058         .detect = intel_sdvo_detect,
2059         .fill_modes = drm_helper_probe_single_connector_modes,
2060         .set_property = intel_sdvo_set_property,
2061         .destroy = intel_sdvo_destroy,
2062 };
2063
2064 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2065         .get_modes = intel_sdvo_get_modes,
2066         .mode_valid = intel_sdvo_mode_valid,
2067         .best_encoder = intel_best_encoder,
2068 };
2069
2070 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2071 {
2072         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
2073
2074         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2075                 drm_mode_destroy(encoder->dev,
2076                                  intel_sdvo->sdvo_lvds_fixed_mode);
2077
2078         device_delete_child(intel_sdvo->base.base.dev->dev,
2079             intel_sdvo->ddc_iic_bus);
2080         intel_encoder_destroy(encoder);
2081 }
2082
2083 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2084         .destroy = intel_sdvo_enc_destroy,
2085 };
2086
2087 static void
2088 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2089 {
2090         uint16_t mask = 0;
2091         unsigned int num_bits;
2092
2093         /* Make a mask of outputs less than or equal to our own priority in the
2094          * list.
2095          */
2096         switch (sdvo->controlled_output) {
2097         case SDVO_OUTPUT_LVDS1:
2098                 mask |= SDVO_OUTPUT_LVDS1;
2099         case SDVO_OUTPUT_LVDS0:
2100                 mask |= SDVO_OUTPUT_LVDS0;
2101         case SDVO_OUTPUT_TMDS1:
2102                 mask |= SDVO_OUTPUT_TMDS1;
2103         case SDVO_OUTPUT_TMDS0:
2104                 mask |= SDVO_OUTPUT_TMDS0;
2105         case SDVO_OUTPUT_RGB1:
2106                 mask |= SDVO_OUTPUT_RGB1;
2107         case SDVO_OUTPUT_RGB0:
2108                 mask |= SDVO_OUTPUT_RGB0;
2109                 break;
2110         }
2111
2112         /* Count bits to find what number we are in the priority list. */
2113         mask &= sdvo->caps.output_flags;
2114         num_bits = hweight16(mask);
2115         /* If more than 3 outputs, default to DDC bus 3 for now. */
2116         if (num_bits > 3)
2117                 num_bits = 3;
2118
2119         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2120         sdvo->ddc_bus = 1 << num_bits;
2121 }
2122
2123 /**
2124  * Choose the appropriate DDC bus for control bus switch command for this
2125  * SDVO output based on the controlled output.
2126  *
2127  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2128  * outputs, then LVDS outputs.
2129  */
2130 static void
2131 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2132                           struct intel_sdvo *sdvo, u32 reg)
2133 {
2134         struct sdvo_device_mapping *mapping;
2135
2136         if (sdvo->is_sdvob)
2137                 mapping = &(dev_priv->sdvo_mappings[0]);
2138         else
2139                 mapping = &(dev_priv->sdvo_mappings[1]);
2140
2141         if (mapping->initialized)
2142                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2143         else
2144                 intel_sdvo_guess_ddc_bus(sdvo);
2145 }
2146
2147 static void
2148 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2149                           struct intel_sdvo *sdvo, u32 reg)
2150 {
2151         struct sdvo_device_mapping *mapping;
2152         u8 pin;
2153
2154         if (sdvo->is_sdvob)
2155                 mapping = &dev_priv->sdvo_mappings[0];
2156         else
2157                 mapping = &dev_priv->sdvo_mappings[1];
2158
2159         if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
2160                 pin = mapping->i2c_pin;
2161         else
2162                 pin = GMBUS_PORT_DPB;
2163
2164         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2165
2166         /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2167          * our code totally fails once we start using gmbus. Hence fall back to
2168          * bit banging for now. */
2169         intel_gmbus_force_bit(sdvo->i2c, true);
2170 }
2171
2172 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2173 static void
2174 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2175 {
2176         intel_gmbus_force_bit(sdvo->i2c, false);
2177 }
2178
2179 static bool
2180 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2181 {
2182         return intel_sdvo_check_supp_encode(intel_sdvo);
2183 }
2184
2185 static u8
2186 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2187 {
2188         struct drm_i915_private *dev_priv = dev->dev_private;
2189         struct sdvo_device_mapping *my_mapping, *other_mapping;
2190
2191         if (sdvo->is_sdvob) {
2192                 my_mapping = &dev_priv->sdvo_mappings[0];
2193                 other_mapping = &dev_priv->sdvo_mappings[1];
2194         } else {
2195                 my_mapping = &dev_priv->sdvo_mappings[1];
2196                 other_mapping = &dev_priv->sdvo_mappings[0];
2197         }
2198
2199         /* If the BIOS described our SDVO device, take advantage of it. */
2200         if (my_mapping->slave_addr)
2201                 return my_mapping->slave_addr;
2202
2203         /* If the BIOS only described a different SDVO device, use the
2204          * address that it isn't using.
2205          */
2206         if (other_mapping->slave_addr) {
2207                 if (other_mapping->slave_addr == 0x70)
2208                         return 0x72;
2209                 else
2210                         return 0x70;
2211         }
2212
2213         /* No SDVO device info is found for another DVO port,
2214          * so use mapping assumption we had before BIOS parsing.
2215          */
2216         if (sdvo->is_sdvob)
2217                 return 0x70;
2218         else
2219                 return 0x72;
2220 }
2221
2222 static void
2223 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2224                           struct intel_sdvo *encoder)
2225 {
2226         drm_connector_init(encoder->base.base.dev,
2227                            &connector->base.base,
2228                            &intel_sdvo_connector_funcs,
2229                            connector->base.base.connector_type);
2230
2231         drm_connector_helper_add(&connector->base.base,
2232                                  &intel_sdvo_connector_helper_funcs);
2233
2234         connector->base.base.interlace_allowed = 1;
2235         connector->base.base.doublescan_allowed = 0;
2236         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2237         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2238
2239         intel_connector_attach_encoder(&connector->base, &encoder->base);
2240 #if 0
2241         drm_sysfs_connector_add(&connector->base.base);
2242 #endif
2243 }
2244
2245 static void
2246 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2247                                struct intel_sdvo_connector *connector)
2248 {
2249         struct drm_device *dev = connector->base.base.dev;
2250
2251         intel_attach_force_audio_property(&connector->base.base);
2252         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
2253                 intel_attach_broadcast_rgb_property(&connector->base.base);
2254                 intel_sdvo->color_range_auto = true;
2255         }
2256 }
2257
2258 static bool
2259 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2260 {
2261         struct drm_encoder *encoder = &intel_sdvo->base.base;
2262         struct drm_connector *connector;
2263         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2264         struct intel_connector *intel_connector;
2265         struct intel_sdvo_connector *intel_sdvo_connector;
2266
2267         intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector),
2268             M_DRM, M_WAITOK | M_ZERO);
2269         if (!intel_sdvo_connector)
2270                 return false;
2271
2272         if (device == 0) {
2273                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2274                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2275         } else if (device == 1) {
2276                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2277                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2278         }
2279
2280         intel_connector = &intel_sdvo_connector->base;
2281         connector = &intel_connector->base;
2282         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2283                 intel_sdvo_connector->output_flag) {
2284                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2285                 /* Some SDVO devices have one-shot hotplug interrupts.
2286                  * Ensure that they get re-enabled when an interrupt happens.
2287                  */
2288                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2289                 intel_sdvo_enable_hotplug(intel_encoder);
2290         } else {
2291                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2292         }
2293         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2294         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2295
2296         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2297                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2298                 intel_sdvo->is_hdmi = true;
2299         }
2300
2301         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2302         if (intel_sdvo->is_hdmi)
2303                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2304
2305         return true;
2306 }
2307
2308 static bool
2309 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2310 {
2311         struct drm_encoder *encoder = &intel_sdvo->base.base;
2312         struct drm_connector *connector;
2313         struct intel_connector *intel_connector;
2314         struct intel_sdvo_connector *intel_sdvo_connector;
2315
2316         intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector),
2317             M_DRM, M_WAITOK | M_ZERO);
2318         if (!intel_sdvo_connector)
2319                 return false;
2320
2321         intel_connector = &intel_sdvo_connector->base;
2322         connector = &intel_connector->base;
2323         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2324         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2325
2326         intel_sdvo->controlled_output |= type;
2327         intel_sdvo_connector->output_flag = type;
2328
2329         intel_sdvo->is_tv = true;
2330         intel_sdvo->base.needs_tv_clock = true;
2331
2332         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2333
2334         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2335                 goto err;
2336
2337         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2338                 goto err;
2339
2340         return true;
2341
2342 err:
2343         intel_sdvo_destroy(connector);
2344         return false;
2345 }
2346
2347 static bool
2348 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2349 {
2350         struct drm_encoder *encoder = &intel_sdvo->base.base;
2351         struct drm_connector *connector;
2352         struct intel_connector *intel_connector;
2353         struct intel_sdvo_connector *intel_sdvo_connector;
2354
2355         intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector),
2356             M_DRM, M_WAITOK | M_ZERO);
2357         if (!intel_sdvo_connector)
2358                 return false;
2359
2360         intel_connector = &intel_sdvo_connector->base;
2361         connector = &intel_connector->base;
2362         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2363         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2364         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2365
2366         if (device == 0) {
2367                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2368                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2369         } else if (device == 1) {
2370                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2371                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2372         }
2373
2374         intel_sdvo_connector_init(intel_sdvo_connector,
2375                                   intel_sdvo);
2376         return true;
2377 }
2378
2379 static bool
2380 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2381 {
2382         struct drm_encoder *encoder = &intel_sdvo->base.base;
2383         struct drm_connector *connector;
2384         struct intel_connector *intel_connector;
2385         struct intel_sdvo_connector *intel_sdvo_connector;
2386
2387         intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector),
2388             M_DRM, M_WAITOK | M_ZERO);
2389         if (!intel_sdvo_connector)
2390                 return false;
2391
2392         intel_connector = &intel_sdvo_connector->base;
2393         connector = &intel_connector->base;
2394         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2395         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2396
2397         if (device == 0) {
2398                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2399                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2400         } else if (device == 1) {
2401                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2402                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2403         }
2404
2405         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2406         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2407                 goto err;
2408
2409         return true;
2410
2411 err:
2412         intel_sdvo_destroy(connector);
2413         return false;
2414 }
2415
2416 static bool
2417 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2418 {
2419         intel_sdvo->is_tv = false;
2420         intel_sdvo->base.needs_tv_clock = false;
2421         intel_sdvo->is_lvds = false;
2422
2423         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2424
2425         if (flags & SDVO_OUTPUT_TMDS0)
2426                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2427                         return false;
2428
2429         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2430                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2431                         return false;
2432
2433         /* TV has no XXX1 function block */
2434         if (flags & SDVO_OUTPUT_SVID0)
2435                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2436                         return false;
2437
2438         if (flags & SDVO_OUTPUT_CVBS0)
2439                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2440                         return false;
2441
2442         if (flags & SDVO_OUTPUT_YPRPB0)
2443                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2444                         return false;
2445
2446         if (flags & SDVO_OUTPUT_RGB0)
2447                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2448                         return false;
2449
2450         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2451                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2452                         return false;
2453
2454         if (flags & SDVO_OUTPUT_LVDS0)
2455                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2456                         return false;
2457
2458         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2459                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2460                         return false;
2461
2462         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2463                 unsigned char bytes[2];
2464
2465                 intel_sdvo->controlled_output = 0;
2466                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2467                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2468                               SDVO_NAME(intel_sdvo),
2469                               bytes[0], bytes[1]);
2470                 return false;
2471         }
2472         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2473
2474         return true;
2475 }
2476
2477 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2478 {
2479         struct drm_device *dev = intel_sdvo->base.base.dev;
2480         struct drm_connector *connector, *tmp;
2481
2482         list_for_each_entry_safe(connector, tmp,
2483                                  &dev->mode_config.connector_list, head) {
2484                 if (intel_attached_encoder(connector) == &intel_sdvo->base)
2485                         intel_sdvo_destroy(connector);
2486         }
2487 }
2488
2489 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2490                                           struct intel_sdvo_connector *intel_sdvo_connector,
2491                                           int type)
2492 {
2493         struct drm_device *dev = intel_sdvo->base.base.dev;
2494         struct intel_sdvo_tv_format format;
2495         uint32_t format_map, i;
2496
2497         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2498                 return false;
2499
2500         BUILD_BUG_ON(sizeof(format) != 6);
2501         if (!intel_sdvo_get_value(intel_sdvo,
2502                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2503                                   &format, sizeof(format)))
2504                 return false;
2505
2506         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2507
2508         if (format_map == 0)
2509                 return false;
2510
2511         intel_sdvo_connector->format_supported_num = 0;
2512         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2513                 if (format_map & (1 << i))
2514                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2515
2516
2517         intel_sdvo_connector->tv_format =
2518                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2519                                             "mode", intel_sdvo_connector->format_supported_num);
2520         if (!intel_sdvo_connector->tv_format)
2521                 return false;
2522
2523         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2524                 drm_property_add_enum(
2525                                 intel_sdvo_connector->tv_format, i,
2526                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2527
2528         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2529         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2530                                       intel_sdvo_connector->tv_format, 0);
2531         return true;
2532
2533 }
2534
2535 #define ENHANCEMENT(name, NAME) do { \
2536         if (enhancements.name) { \
2537                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2538                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2539                         return false; \
2540                 intel_sdvo_connector->max_##name = data_value[0]; \
2541                 intel_sdvo_connector->cur_##name = response; \
2542                 intel_sdvo_connector->name = \
2543                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2544                 if (!intel_sdvo_connector->name) return false; \
2545                 drm_object_attach_property(&connector->base, \
2546                                               intel_sdvo_connector->name, \
2547                                               intel_sdvo_connector->cur_##name); \
2548                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2549                               data_value[0], data_value[1], response); \
2550         } \
2551 } while (0)
2552
2553 static bool
2554 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2555                                       struct intel_sdvo_connector *intel_sdvo_connector,
2556                                       struct intel_sdvo_enhancements_reply enhancements)
2557 {
2558         struct drm_device *dev = intel_sdvo->base.base.dev;
2559         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2560         uint16_t response, data_value[2];
2561
2562         /* when horizontal overscan is supported, Add the left/right  property */
2563         if (enhancements.overscan_h) {
2564                 if (!intel_sdvo_get_value(intel_sdvo,
2565                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2566                                           &data_value, 4))
2567                         return false;
2568
2569                 if (!intel_sdvo_get_value(intel_sdvo,
2570                                           SDVO_CMD_GET_OVERSCAN_H,
2571                                           &response, 2))
2572                         return false;
2573
2574                 intel_sdvo_connector->max_hscan = data_value[0];
2575                 intel_sdvo_connector->left_margin = data_value[0] - response;
2576                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2577                 intel_sdvo_connector->left =
2578                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2579                 if (!intel_sdvo_connector->left)
2580                         return false;
2581
2582                 drm_object_attach_property(&connector->base,
2583                                               intel_sdvo_connector->left,
2584                                               intel_sdvo_connector->left_margin);
2585
2586                 intel_sdvo_connector->right =
2587                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2588                 if (!intel_sdvo_connector->right)
2589                         return false;
2590
2591                 drm_object_attach_property(&connector->base,
2592                                               intel_sdvo_connector->right,
2593                                               intel_sdvo_connector->right_margin);
2594                 DRM_DEBUG_KMS("h_overscan: max %d, "
2595                               "default %d, current %d\n",
2596                               data_value[0], data_value[1], response);
2597         }
2598
2599         if (enhancements.overscan_v) {
2600                 if (!intel_sdvo_get_value(intel_sdvo,
2601                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2602                                           &data_value, 4))
2603                         return false;
2604
2605                 if (!intel_sdvo_get_value(intel_sdvo,
2606                                           SDVO_CMD_GET_OVERSCAN_V,
2607                                           &response, 2))
2608                         return false;
2609
2610                 intel_sdvo_connector->max_vscan = data_value[0];
2611                 intel_sdvo_connector->top_margin = data_value[0] - response;
2612                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2613                 intel_sdvo_connector->top =
2614                         drm_property_create_range(dev, 0,
2615                                             "top_margin", 0, data_value[0]);
2616                 if (!intel_sdvo_connector->top)
2617                         return false;
2618
2619                 drm_object_attach_property(&connector->base,
2620                                               intel_sdvo_connector->top,
2621                                               intel_sdvo_connector->top_margin);
2622
2623                 intel_sdvo_connector->bottom =
2624                         drm_property_create_range(dev, 0,
2625                                             "bottom_margin", 0, data_value[0]);
2626                 if (!intel_sdvo_connector->bottom)
2627                         return false;
2628
2629                 drm_object_attach_property(&connector->base,
2630                                               intel_sdvo_connector->bottom,
2631                                               intel_sdvo_connector->bottom_margin);
2632                 DRM_DEBUG_KMS("v_overscan: max %d, "
2633                               "default %d, current %d\n",
2634                               data_value[0], data_value[1], response);
2635         }
2636
2637         ENHANCEMENT(hpos, HPOS);
2638         ENHANCEMENT(vpos, VPOS);
2639         ENHANCEMENT(saturation, SATURATION);
2640         ENHANCEMENT(contrast, CONTRAST);
2641         ENHANCEMENT(hue, HUE);
2642         ENHANCEMENT(sharpness, SHARPNESS);
2643         ENHANCEMENT(brightness, BRIGHTNESS);
2644         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2645         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2646         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2647         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2648         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2649
2650         if (enhancements.dot_crawl) {
2651                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2652                         return false;
2653
2654                 intel_sdvo_connector->max_dot_crawl = 1;
2655                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2656                 intel_sdvo_connector->dot_crawl =
2657                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2658                 if (!intel_sdvo_connector->dot_crawl)
2659                         return false;
2660
2661                 drm_object_attach_property(&connector->base,
2662                                               intel_sdvo_connector->dot_crawl,
2663                                               intel_sdvo_connector->cur_dot_crawl);
2664                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2665         }
2666
2667         return true;
2668 }
2669
2670 static bool
2671 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2672                                         struct intel_sdvo_connector *intel_sdvo_connector,
2673                                         struct intel_sdvo_enhancements_reply enhancements)
2674 {
2675         struct drm_device *dev = intel_sdvo->base.base.dev;
2676         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2677         uint16_t response, data_value[2];
2678
2679         ENHANCEMENT(brightness, BRIGHTNESS);
2680
2681         return true;
2682 }
2683 #undef ENHANCEMENT
2684
2685 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2686                                                struct intel_sdvo_connector *intel_sdvo_connector)
2687 {
2688         union {
2689                 struct intel_sdvo_enhancements_reply reply;
2690                 uint16_t response;
2691         } enhancements;
2692
2693         BUILD_BUG_ON(sizeof(enhancements) != 2);
2694
2695         enhancements.response = 0;
2696         intel_sdvo_get_value(intel_sdvo,
2697                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2698                              &enhancements, sizeof(enhancements));
2699         if (enhancements.response == 0) {
2700                 DRM_DEBUG_KMS("No enhancement is supported\n");
2701                 return true;
2702         }
2703
2704         if (IS_TV(intel_sdvo_connector))
2705                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2706         else if (IS_LVDS(intel_sdvo_connector))
2707                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2708         else
2709                 return true;
2710 }
2711
2712 struct intel_sdvo_ddc_proxy_sc {
2713         struct intel_sdvo *intel_sdvo;
2714         device_t port;
2715 };
2716
2717 static int
2718 intel_sdvo_ddc_proxy_probe(device_t idev)
2719 {
2720
2721         return (BUS_PROBE_DEFAULT);
2722 }
2723
2724 static int
2725 intel_sdvo_ddc_proxy_attach(device_t idev)
2726 {
2727         struct intel_sdvo_ddc_proxy_sc *sc;
2728
2729         sc = device_get_softc(idev);
2730         sc->port = device_add_child(idev, "iicbus", -1);
2731         if (sc->port == NULL)
2732                 return (ENXIO);
2733         device_quiet(sc->port);
2734         bus_generic_attach(idev);
2735         return (0);
2736 }
2737
2738 static int
2739 intel_sdvo_ddc_proxy_detach(device_t idev)
2740 {
2741         struct intel_sdvo_ddc_proxy_sc *sc;
2742         device_t port;
2743
2744         sc = device_get_softc(idev);
2745         port = sc->port;
2746         bus_generic_detach(idev);
2747         if (port != NULL)
2748                 device_delete_child(idev, port);
2749         return (0);
2750 }
2751
2752 static int
2753 intel_sdvo_ddc_proxy_reset(device_t idev, u_char speed, u_char addr,
2754     u_char *oldaddr)
2755 {
2756         struct intel_sdvo_ddc_proxy_sc *sc;
2757         struct intel_sdvo *sdvo;
2758
2759         sc = device_get_softc(idev);
2760         sdvo = sc->intel_sdvo;
2761
2762         return (IICBUS_RESET(device_get_parent(sdvo->i2c), speed, addr,
2763             oldaddr));
2764 }
2765
2766 static int
2767 intel_sdvo_ddc_proxy_transfer(device_t idev, struct iic_msg *msgs, uint32_t num)
2768 {
2769         struct intel_sdvo_ddc_proxy_sc *sc;
2770         struct intel_sdvo *sdvo;
2771
2772         sc = device_get_softc(idev);
2773         sdvo = sc->intel_sdvo;
2774
2775         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2776                 return (EIO);
2777
2778         return (iicbus_transfer(sdvo->i2c, msgs, num));
2779 }
2780
2781 static bool
2782 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, struct drm_device *dev,
2783     int sdvo_reg)
2784 {
2785         struct intel_sdvo_ddc_proxy_sc *sc;
2786         int ret;
2787
2788         sdvo->ddc_iic_bus = device_add_child(dev->dev,
2789             "intel_sdvo_ddc_proxy", sdvo_reg);
2790         if (sdvo->ddc_iic_bus == NULL) {
2791                 DRM_ERROR("cannot create ddc proxy bus %d\n", sdvo_reg);
2792                 return (false);
2793         }
2794         device_quiet(sdvo->ddc_iic_bus);
2795         ret = device_probe_and_attach(sdvo->ddc_iic_bus);
2796         if (ret != 0) {
2797                 DRM_ERROR("cannot attach proxy bus %d error %d\n",
2798                     sdvo_reg, ret);
2799                 device_delete_child(dev->dev, sdvo->ddc_iic_bus);
2800                 return (false);
2801         }
2802         sc = device_get_softc(sdvo->ddc_iic_bus);
2803         sc->intel_sdvo = sdvo;
2804
2805         sdvo->ddc = sc->port;
2806         return (true);
2807 }
2808
2809 static device_method_t intel_sdvo_ddc_proxy_methods[] = {
2810         DEVMETHOD(device_probe,         intel_sdvo_ddc_proxy_probe),
2811         DEVMETHOD(device_attach,        intel_sdvo_ddc_proxy_attach),
2812         DEVMETHOD(device_detach,        intel_sdvo_ddc_proxy_detach),
2813         DEVMETHOD(iicbus_reset,         intel_sdvo_ddc_proxy_reset),
2814         DEVMETHOD(iicbus_transfer,      intel_sdvo_ddc_proxy_transfer),
2815         DEVMETHOD_END
2816 };
2817 static driver_t intel_sdvo_ddc_proxy_driver = {
2818         "intel_sdvo_ddc_proxy",
2819         intel_sdvo_ddc_proxy_methods,
2820         sizeof(struct intel_sdvo_ddc_proxy_sc)
2821 };
2822 static devclass_t intel_sdvo_devclass;
2823 DRIVER_MODULE_ORDERED(intel_sdvo_ddc_proxy, drm, intel_sdvo_ddc_proxy_driver,
2824     intel_sdvo_devclass, 0, 0, SI_ORDER_FIRST);
2825
2826 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2827 {
2828         struct drm_i915_private *dev_priv = dev->dev_private;
2829         struct intel_encoder *intel_encoder;
2830         struct intel_sdvo *intel_sdvo;
2831         u32 hotplug_mask;
2832         int i;
2833
2834         intel_sdvo = kmalloc(sizeof(struct intel_sdvo), M_DRM,
2835             M_WAITOK | M_ZERO);
2836         if (!intel_sdvo)
2837                 return false;
2838
2839         intel_sdvo->sdvo_reg = sdvo_reg;
2840         intel_sdvo->is_sdvob = is_sdvob;
2841         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2842         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2843         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev, sdvo_reg)) {
2844                 kfree(intel_sdvo);
2845                 return false;
2846         }
2847
2848         /* encoder type will be decided later */
2849         intel_encoder = &intel_sdvo->base;
2850         intel_encoder->type = INTEL_OUTPUT_SDVO;
2851         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2852
2853         /* Read the regs to test if we can talk to the device */
2854         for (i = 0; i < 0x40; i++) {
2855                 u8 byte;
2856
2857                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2858                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
2859                                       SDVO_NAME(intel_sdvo));
2860                         goto err;
2861                 }
2862         }
2863
2864         hotplug_mask = 0;
2865         if (IS_G4X(dev)) {
2866                 hotplug_mask = intel_sdvo->is_sdvob ?
2867                         SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2868         } else if (IS_GEN4(dev)) {
2869                 hotplug_mask = intel_sdvo->is_sdvob ?
2870                         SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2871         } else {
2872                 hotplug_mask = intel_sdvo->is_sdvob ?
2873                         SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2874         }
2875
2876         /* Only enable the hotplug irq if we need it, to work around noisy
2877          * hotplug lines.
2878          */
2879         if (intel_sdvo->hotplug_active) {
2880                 intel_encoder->hpd_pin =
2881                         intel_sdvo->is_sdvob ?  HPD_SDVO_B : HPD_SDVO_C;
2882         }
2883
2884         drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2885
2886         intel_encoder->compute_config = intel_sdvo_compute_config;
2887         intel_encoder->disable = intel_disable_sdvo;
2888         intel_encoder->mode_set = intel_sdvo_mode_set;
2889         intel_encoder->enable = intel_enable_sdvo;
2890         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2891
2892         /* In default case sdvo lvds is false */
2893         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2894                 goto err;
2895
2896         if (intel_sdvo_output_setup(intel_sdvo,
2897                                     intel_sdvo->caps.output_flags) != true) {
2898                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2899                               SDVO_NAME(intel_sdvo));
2900                 /* Output_setup can leave behind connectors! */
2901                 goto err_output;
2902         }
2903
2904         /* Only enable the hotplug irq if we need it, to work around noisy
2905          * hotplug lines.
2906          */
2907         if (intel_sdvo->hotplug_active) {
2908                 intel_encoder->hpd_pin =
2909                         intel_sdvo->is_sdvob ?  HPD_SDVO_B : HPD_SDVO_C;
2910         }
2911
2912         /*
2913          * Cloning SDVO with anything is often impossible, since the SDVO
2914          * encoder can request a special input timing mode. And even if that's
2915          * not the case we have evidence that cloning a plain unscaled mode with
2916          * VGA doesn't really work. Furthermore the cloning flags are way too
2917          * simplistic anyway to express such constraints, so just give up on
2918          * cloning for SDVO encoders.
2919          */
2920         intel_sdvo->base.cloneable = false;
2921
2922         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2923
2924         /* Set the input timing to the screen. Assume always input 0. */
2925         if (!intel_sdvo_set_target_input(intel_sdvo))
2926                 goto err_output;
2927
2928         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2929                                                     &intel_sdvo->pixel_clock_min,
2930                                                     &intel_sdvo->pixel_clock_max))
2931                 goto err_output;
2932
2933         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2934                         "clock range %dMHz - %dMHz, "
2935                         "input 1: %c, input 2: %c, "
2936                         "output 1: %c, output 2: %c\n",
2937                         SDVO_NAME(intel_sdvo),
2938                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2939                         intel_sdvo->caps.device_rev_id,
2940                         intel_sdvo->pixel_clock_min / 1000,
2941                         intel_sdvo->pixel_clock_max / 1000,
2942                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2943                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2944                         /* check currently supported outputs */
2945                         intel_sdvo->caps.output_flags &
2946                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2947                         intel_sdvo->caps.output_flags &
2948                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2949         return true;
2950
2951 err_output:
2952         intel_sdvo_output_cleanup(intel_sdvo);
2953
2954 err:
2955         drm_encoder_cleanup(&intel_encoder->base);
2956         intel_sdvo_unselect_i2c_bus(intel_sdvo);
2957         kfree(intel_sdvo);
2958
2959         return false;
2960 }